/usr/bin/java -ea -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --core.log.level.for.class de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN -tc ../../../trunk/examples/toolchains/AutomizerCTransformed.xml -s ../../../trunk/examples/settings/automizer/LoopAccelerationJordanC.epf -i ../../../trunk/examples/svcomp/loop-acceleration/diamond_1-1.c -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-34549b5 [2022-04-07 16:56:24,489 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-04-07 16:56:24,490 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-04-07 16:56:24,511 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-04-07 16:56:24,512 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-04-07 16:56:24,512 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-04-07 16:56:24,513 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-04-07 16:56:24,514 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-04-07 16:56:24,515 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-04-07 16:56:24,515 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-04-07 16:56:24,516 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-04-07 16:56:24,517 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-04-07 16:56:24,517 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-04-07 16:56:24,517 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-04-07 16:56:24,518 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-04-07 16:56:24,519 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-04-07 16:56:24,519 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-04-07 16:56:24,520 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-04-07 16:56:24,521 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-04-07 16:56:24,522 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-04-07 16:56:24,523 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-04-07 16:56:24,524 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-04-07 16:56:24,524 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-04-07 16:56:24,525 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-04-07 16:56:24,526 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-04-07 16:56:24,528 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2022-04-07 16:56:24,532 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-04-07 16:56:24,533 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-04-07 16:56:24,533 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-04-07 16:56:24,534 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/automizer/LoopAccelerationJordanC.epf [2022-04-07 16:56:24,540 INFO L113 SettingsManager]: Loading preferences was successful [2022-04-07 16:56:24,540 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-04-07 16:56:24,541 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-04-07 16:56:24,541 INFO L138 SettingsManager]: * sizeof long=4 [2022-04-07 16:56:24,541 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-04-07 16:56:24,541 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-04-07 16:56:24,541 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-04-07 16:56:24,541 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-04-07 16:56:24,541 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-04-07 16:56:24,541 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-04-07 16:56:24,542 INFO L138 SettingsManager]: * sizeof long double=12 [2022-04-07 16:56:24,542 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-04-07 16:56:24,542 INFO L138 SettingsManager]: * Use constant arrays=true [2022-04-07 16:56:24,542 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-04-07 16:56:24,542 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-04-07 16:56:24,542 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-04-07 16:56:24,542 INFO L138 SettingsManager]: * To the following directory=./dump/ [2022-04-07 16:56:24,542 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-04-07 16:56:24,542 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-07 16:56:24,543 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-04-07 16:56:24,543 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-04-07 16:56:24,543 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-04-07 16:56:24,543 INFO L138 SettingsManager]: * TransformationType=LOOP_ACCELERATION_JORDAN WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.core: Log level for class -> de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN; [2022-04-07 16:56:24,722 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-04-07 16:56:24,734 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-04-07 16:56:24,735 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-04-07 16:56:24,736 INFO L271 PluginConnector]: Initializing CDTParser... [2022-04-07 16:56:24,739 INFO L275 PluginConnector]: CDTParser initialized [2022-04-07 16:56:24,739 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loop-acceleration/diamond_1-1.c [2022-04-07 16:56:24,784 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/14f895262/3abd865c00594b20bca48dbac903e315/FLAG08076a1d3 [2022-04-07 16:56:25,109 INFO L306 CDTParser]: Found 1 translation units. [2022-04-07 16:56:25,109 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loop-acceleration/diamond_1-1.c [2022-04-07 16:56:25,112 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/14f895262/3abd865c00594b20bca48dbac903e315/FLAG08076a1d3 [2022-04-07 16:56:25,122 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/14f895262/3abd865c00594b20bca48dbac903e315 [2022-04-07 16:56:25,124 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-04-07 16:56:25,125 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2022-04-07 16:56:25,126 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-04-07 16:56:25,126 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-04-07 16:56:25,128 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-04-07 16:56:25,129 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.04 04:56:25" (1/1) ... [2022-04-07 16:56:25,129 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@76c1b4b9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 04:56:25, skipping insertion in model container [2022-04-07 16:56:25,130 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.04 04:56:25" (1/1) ... [2022-04-07 16:56:25,134 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-04-07 16:56:25,140 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-04-07 16:56:25,261 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loop-acceleration/diamond_1-1.c[373,386] [2022-04-07 16:56:25,271 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-07 16:56:25,276 INFO L203 MainTranslator]: Completed pre-run [2022-04-07 16:56:25,288 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loop-acceleration/diamond_1-1.c[373,386] [2022-04-07 16:56:25,290 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-07 16:56:25,303 INFO L208 MainTranslator]: Completed translation [2022-04-07 16:56:25,304 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 04:56:25 WrapperNode [2022-04-07 16:56:25,304 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-04-07 16:56:25,305 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-04-07 16:56:25,305 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-04-07 16:56:25,305 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-04-07 16:56:25,314 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 04:56:25" (1/1) ... [2022-04-07 16:56:25,315 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 04:56:25" (1/1) ... [2022-04-07 16:56:25,320 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 04:56:25" (1/1) ... [2022-04-07 16:56:25,320 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 04:56:25" (1/1) ... [2022-04-07 16:56:25,323 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 04:56:25" (1/1) ... [2022-04-07 16:56:25,325 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 04:56:25" (1/1) ... [2022-04-07 16:56:25,326 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 04:56:25" (1/1) ... [2022-04-07 16:56:25,328 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-04-07 16:56:25,329 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-04-07 16:56:25,329 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-04-07 16:56:25,329 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-04-07 16:56:25,330 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 04:56:25" (1/1) ... [2022-04-07 16:56:25,342 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-07 16:56:25,350 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 16:56:25,360 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-04-07 16:56:25,362 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-04-07 16:56:25,385 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2022-04-07 16:56:25,386 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-04-07 16:56:25,386 INFO L138 BoogieDeclarations]: Found implementation of procedure reach_error [2022-04-07 16:56:25,386 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2022-04-07 16:56:25,386 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2022-04-07 16:56:25,386 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2022-04-07 16:56:25,386 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_fail [2022-04-07 16:56:25,386 INFO L130 BoogieDeclarations]: Found specification of procedure reach_error [2022-04-07 16:56:25,386 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-04-07 16:56:25,386 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_uint [2022-04-07 16:56:25,386 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2022-04-07 16:56:25,386 INFO L130 BoogieDeclarations]: Found specification of procedure main [2022-04-07 16:56:25,387 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2022-04-07 16:56:25,387 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-04-07 16:56:25,387 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-04-07 16:56:25,387 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-04-07 16:56:25,387 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-04-07 16:56:25,387 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-04-07 16:56:25,439 INFO L234 CfgBuilder]: Building ICFG [2022-04-07 16:56:25,440 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-04-07 16:56:25,525 INFO L275 CfgBuilder]: Performing block encoding [2022-04-07 16:56:25,530 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-04-07 16:56:25,531 INFO L299 CfgBuilder]: Removed 1 assume(true) statements. [2022-04-07 16:56:25,532 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.04 04:56:25 BoogieIcfgContainer [2022-04-07 16:56:25,532 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-04-07 16:56:25,532 INFO L113 PluginConnector]: ------------------------IcfgTransformer---------------------------- [2022-04-07 16:56:25,533 INFO L271 PluginConnector]: Initializing IcfgTransformer... [2022-04-07 16:56:25,533 INFO L275 PluginConnector]: IcfgTransformer initialized [2022-04-07 16:56:25,535 INFO L185 PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.04 04:56:25" (1/1) ... [2022-04-07 16:56:25,536 INFO L168 ansformationObserver]: Applying ICFG transformation LOOP_ACCELERATION_JORDAN [2022-04-07 16:56:25,557 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 07.04 04:56:25 BasicIcfg [2022-04-07 16:56:25,557 INFO L132 PluginConnector]: ------------------------ END IcfgTransformer---------------------------- [2022-04-07 16:56:25,570 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-04-07 16:56:25,570 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-04-07 16:56:25,574 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-04-07 16:56:25,574 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.04 04:56:25" (1/4) ... [2022-04-07 16:56:25,575 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@562de452 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.04 04:56:25, skipping insertion in model container [2022-04-07 16:56:25,575 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 04:56:25" (2/4) ... [2022-04-07 16:56:25,575 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@562de452 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.04 04:56:25, skipping insertion in model container [2022-04-07 16:56:25,575 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.04 04:56:25" (3/4) ... [2022-04-07 16:56:25,575 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@562de452 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.04 04:56:25, skipping insertion in model container [2022-04-07 16:56:25,575 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 07.04 04:56:25" (4/4) ... [2022-04-07 16:56:25,576 INFO L111 eAbstractionObserver]: Analyzing ICFG diamond_1-1.cJordan [2022-04-07 16:56:25,579 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:ForwardPredicates Determinization: PREDICATE_ABSTRACTION [2022-04-07 16:56:25,580 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-04-07 16:56:25,611 INFO L339 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-04-07 16:56:25,615 INFO L340 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=ForwardPredicates, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=false, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=All, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP [2022-04-07 16:56:25,615 INFO L341 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-04-07 16:56:25,626 INFO L276 IsEmpty]: Start isEmpty. Operand has 19 states, 11 states have (on average 1.4545454545454546) internal successors, (16), 12 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 16:56:25,630 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2022-04-07 16:56:25,630 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 16:56:25,631 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 16:56:25,631 INFO L403 AbstractCegarLoop]: === Iteration 1 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 16:56:25,641 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 16:56:25,641 INFO L85 PathProgramCache]: Analyzing trace with hash -756157467, now seen corresponding path program 1 times [2022-04-07 16:56:25,650 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 16:56:25,650 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [404754529] [2022-04-07 16:56:25,651 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 16:56:25,651 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 16:56:25,723 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 16:56:25,759 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 16:56:25,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 16:56:25,772 INFO L290 TraceCheckUtils]: 0: Hoare triple {27#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {22#true} is VALID [2022-04-07 16:56:25,773 INFO L290 TraceCheckUtils]: 1: Hoare triple {22#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {22#true} is VALID [2022-04-07 16:56:25,773 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {22#true} {22#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {22#true} is VALID [2022-04-07 16:56:25,774 INFO L272 TraceCheckUtils]: 0: Hoare triple {22#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {27#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 16:56:25,775 INFO L290 TraceCheckUtils]: 1: Hoare triple {27#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {22#true} is VALID [2022-04-07 16:56:25,775 INFO L290 TraceCheckUtils]: 2: Hoare triple {22#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {22#true} is VALID [2022-04-07 16:56:25,775 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {22#true} {22#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {22#true} is VALID [2022-04-07 16:56:25,775 INFO L272 TraceCheckUtils]: 4: Hoare triple {22#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {22#true} is VALID [2022-04-07 16:56:25,775 INFO L290 TraceCheckUtils]: 5: Hoare triple {22#true} [49] mainENTRY-->L18-2: Formula: (and (= v_main_~y~0_2 |v_main_#t~nondet4_2|) (= v_main_~x~0_3 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~y~0] {22#true} is VALID [2022-04-07 16:56:25,776 INFO L290 TraceCheckUtils]: 6: Hoare triple {22#true} [51] L18-2-->L17-2: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {23#false} is VALID [2022-04-07 16:56:25,776 INFO L272 TraceCheckUtils]: 7: Hoare triple {23#false} [54] L17-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) (mod v_main_~y~0_5 2)) 1 0)) InVars {main_~x~0=v_main_~x~0_9, main_~y~0=v_main_~y~0_5} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~y~0] {23#false} is VALID [2022-04-07 16:56:25,777 INFO L290 TraceCheckUtils]: 8: Hoare triple {23#false} [58] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {23#false} is VALID [2022-04-07 16:56:25,777 INFO L290 TraceCheckUtils]: 9: Hoare triple {23#false} [59] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {23#false} is VALID [2022-04-07 16:56:25,777 INFO L290 TraceCheckUtils]: 10: Hoare triple {23#false} [61] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23#false} is VALID [2022-04-07 16:56:25,777 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 16:56:25,778 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 16:56:25,778 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [404754529] [2022-04-07 16:56:25,778 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [404754529] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 16:56:25,778 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 16:56:25,779 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-07 16:56:25,780 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1962992388] [2022-04-07 16:56:25,780 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 16:56:25,784 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 2 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 11 [2022-04-07 16:56:25,785 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 16:56:25,787 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 2 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:56:25,799 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 11 edges. 11 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 16:56:25,800 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-07 16:56:25,800 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 16:56:25,814 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-07 16:56:25,815 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-07 16:56:25,816 INFO L87 Difference]: Start difference. First operand has 19 states, 11 states have (on average 1.4545454545454546) internal successors, (16), 12 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 2 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:56:25,883 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 16:56:25,883 INFO L93 Difference]: Finished difference Result 19 states and 20 transitions. [2022-04-07 16:56:25,883 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-07 16:56:25,883 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 2 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 11 [2022-04-07 16:56:25,883 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 16:56:25,884 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 2 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:56:25,890 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 22 transitions. [2022-04-07 16:56:25,890 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 2 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:56:25,896 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 22 transitions. [2022-04-07 16:56:25,896 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 22 transitions. [2022-04-07 16:56:25,924 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 22 edges. 22 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 16:56:25,930 INFO L225 Difference]: With dead ends: 19 [2022-04-07 16:56:25,930 INFO L226 Difference]: Without dead ends: 13 [2022-04-07 16:56:25,931 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-07 16:56:25,937 INFO L913 BasicCegarLoop]: 19 mSDtfsCounter, 11 mSDsluCounter, 3 mSDsCounter, 0 mSdLazyCounter, 3 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 12 SdHoareTripleChecker+Valid, 22 SdHoareTripleChecker+Invalid, 5 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 3 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 16:56:25,939 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [12 Valid, 22 Invalid, 5 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 3 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 16:56:25,950 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13 states. [2022-04-07 16:56:25,955 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13 to 13. [2022-04-07 16:56:25,956 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 16:56:25,956 INFO L82 GeneralOperation]: Start isEquivalent. First operand 13 states. Second operand has 13 states, 8 states have (on average 1.25) internal successors, (10), 8 states have internal predecessors, (10), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:56:25,957 INFO L74 IsIncluded]: Start isIncluded. First operand 13 states. Second operand has 13 states, 8 states have (on average 1.25) internal successors, (10), 8 states have internal predecessors, (10), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:56:25,957 INFO L87 Difference]: Start difference. First operand 13 states. Second operand has 13 states, 8 states have (on average 1.25) internal successors, (10), 8 states have internal predecessors, (10), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:56:25,961 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 16:56:25,961 INFO L93 Difference]: Finished difference Result 13 states and 14 transitions. [2022-04-07 16:56:25,961 INFO L276 IsEmpty]: Start isEmpty. Operand 13 states and 14 transitions. [2022-04-07 16:56:25,962 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 16:56:25,963 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 16:56:25,963 INFO L74 IsIncluded]: Start isIncluded. First operand has 13 states, 8 states have (on average 1.25) internal successors, (10), 8 states have internal predecessors, (10), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 13 states. [2022-04-07 16:56:25,964 INFO L87 Difference]: Start difference. First operand has 13 states, 8 states have (on average 1.25) internal successors, (10), 8 states have internal predecessors, (10), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 13 states. [2022-04-07 16:56:25,969 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 16:56:25,969 INFO L93 Difference]: Finished difference Result 13 states and 14 transitions. [2022-04-07 16:56:25,969 INFO L276 IsEmpty]: Start isEmpty. Operand 13 states and 14 transitions. [2022-04-07 16:56:25,970 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 16:56:25,970 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 16:56:25,970 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 16:56:25,970 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 16:56:25,970 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13 states, 8 states have (on average 1.25) internal successors, (10), 8 states have internal predecessors, (10), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:56:25,971 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 14 transitions. [2022-04-07 16:56:25,972 INFO L78 Accepts]: Start accepts. Automaton has 13 states and 14 transitions. Word has length 11 [2022-04-07 16:56:25,972 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 16:56:25,972 INFO L478 AbstractCegarLoop]: Abstraction has 13 states and 14 transitions. [2022-04-07 16:56:25,973 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 2 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:56:25,973 INFO L276 IsEmpty]: Start isEmpty. Operand 13 states and 14 transitions. [2022-04-07 16:56:25,974 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2022-04-07 16:56:25,974 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 16:56:25,974 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 16:56:25,975 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-04-07 16:56:25,975 INFO L403 AbstractCegarLoop]: === Iteration 2 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 16:56:25,981 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 16:56:25,982 INFO L85 PathProgramCache]: Analyzing trace with hash -755233946, now seen corresponding path program 1 times [2022-04-07 16:56:25,999 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 16:56:25,999 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1790764782] [2022-04-07 16:56:26,000 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 16:56:26,000 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 16:56:26,036 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 16:56:26,123 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 16:56:26,131 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 16:56:26,139 INFO L290 TraceCheckUtils]: 0: Hoare triple {94#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {88#true} is VALID [2022-04-07 16:56:26,139 INFO L290 TraceCheckUtils]: 1: Hoare triple {88#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {88#true} is VALID [2022-04-07 16:56:26,139 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {88#true} {88#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {88#true} is VALID [2022-04-07 16:56:26,141 INFO L272 TraceCheckUtils]: 0: Hoare triple {88#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {94#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 16:56:26,143 INFO L290 TraceCheckUtils]: 1: Hoare triple {94#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {88#true} is VALID [2022-04-07 16:56:26,143 INFO L290 TraceCheckUtils]: 2: Hoare triple {88#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {88#true} is VALID [2022-04-07 16:56:26,143 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {88#true} {88#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {88#true} is VALID [2022-04-07 16:56:26,143 INFO L272 TraceCheckUtils]: 4: Hoare triple {88#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {88#true} is VALID [2022-04-07 16:56:26,144 INFO L290 TraceCheckUtils]: 5: Hoare triple {88#true} [49] mainENTRY-->L18-2: Formula: (and (= v_main_~y~0_2 |v_main_#t~nondet4_2|) (= v_main_~x~0_3 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~y~0] {93#(= main_~x~0 0)} is VALID [2022-04-07 16:56:26,144 INFO L290 TraceCheckUtils]: 6: Hoare triple {93#(= main_~x~0 0)} [52] L18-2-->L17-2: Formula: (not (< (mod v_main_~x~0_5 4294967296) 99)) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {89#false} is VALID [2022-04-07 16:56:26,144 INFO L272 TraceCheckUtils]: 7: Hoare triple {89#false} [54] L17-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) (mod v_main_~y~0_5 2)) 1 0)) InVars {main_~x~0=v_main_~x~0_9, main_~y~0=v_main_~y~0_5} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~y~0] {89#false} is VALID [2022-04-07 16:56:26,144 INFO L290 TraceCheckUtils]: 8: Hoare triple {89#false} [58] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {89#false} is VALID [2022-04-07 16:56:26,145 INFO L290 TraceCheckUtils]: 9: Hoare triple {89#false} [59] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {89#false} is VALID [2022-04-07 16:56:26,145 INFO L290 TraceCheckUtils]: 10: Hoare triple {89#false} [61] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {89#false} is VALID [2022-04-07 16:56:26,145 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 16:56:26,145 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 16:56:26,146 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1790764782] [2022-04-07 16:56:26,146 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1790764782] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 16:56:26,146 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 16:56:26,146 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-07 16:56:26,146 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1507721459] [2022-04-07 16:56:26,146 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 16:56:26,147 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 1.75) internal successors, (7), 3 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 11 [2022-04-07 16:56:26,148 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 16:56:26,148 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 1.75) internal successors, (7), 3 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:56:26,158 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 11 edges. 11 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 16:56:26,158 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-07 16:56:26,158 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 16:56:26,159 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-07 16:56:26,160 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-07 16:56:26,161 INFO L87 Difference]: Start difference. First operand 13 states and 14 transitions. Second operand has 4 states, 4 states have (on average 1.75) internal successors, (7), 3 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:56:26,221 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 16:56:26,221 INFO L93 Difference]: Finished difference Result 15 states and 17 transitions. [2022-04-07 16:56:26,222 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-07 16:56:26,222 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 1.75) internal successors, (7), 3 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 11 [2022-04-07 16:56:26,222 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 16:56:26,223 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 1.75) internal successors, (7), 3 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:56:26,225 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 18 transitions. [2022-04-07 16:56:26,225 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 1.75) internal successors, (7), 3 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:56:26,227 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 18 transitions. [2022-04-07 16:56:26,227 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 18 transitions. [2022-04-07 16:56:26,244 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 18 edges. 18 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 16:56:26,246 INFO L225 Difference]: With dead ends: 15 [2022-04-07 16:56:26,246 INFO L226 Difference]: Without dead ends: 15 [2022-04-07 16:56:26,249 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-07 16:56:26,251 INFO L913 BasicCegarLoop]: 11 mSDtfsCounter, 10 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 12 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 10 SdHoareTripleChecker+Valid, 18 SdHoareTripleChecker+Invalid, 16 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 12 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 16:56:26,251 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [10 Valid, 18 Invalid, 16 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 12 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 16:56:26,253 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15 states. [2022-04-07 16:56:26,256 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15 to 14. [2022-04-07 16:56:26,256 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 16:56:26,256 INFO L82 GeneralOperation]: Start isEquivalent. First operand 15 states. Second operand has 14 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 9 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:56:26,257 INFO L74 IsIncluded]: Start isIncluded. First operand 15 states. Second operand has 14 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 9 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:56:26,257 INFO L87 Difference]: Start difference. First operand 15 states. Second operand has 14 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 9 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:56:26,263 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 16:56:26,264 INFO L93 Difference]: Finished difference Result 15 states and 17 transitions. [2022-04-07 16:56:26,264 INFO L276 IsEmpty]: Start isEmpty. Operand 15 states and 17 transitions. [2022-04-07 16:56:26,264 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 16:56:26,264 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 16:56:26,264 INFO L74 IsIncluded]: Start isIncluded. First operand has 14 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 9 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 15 states. [2022-04-07 16:56:26,265 INFO L87 Difference]: Start difference. First operand has 14 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 9 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 15 states. [2022-04-07 16:56:26,266 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 16:56:26,266 INFO L93 Difference]: Finished difference Result 15 states and 17 transitions. [2022-04-07 16:56:26,266 INFO L276 IsEmpty]: Start isEmpty. Operand 15 states and 17 transitions. [2022-04-07 16:56:26,266 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 16:56:26,266 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 16:56:26,266 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 16:56:26,266 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 16:56:26,267 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 9 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:56:26,268 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 15 transitions. [2022-04-07 16:56:26,268 INFO L78 Accepts]: Start accepts. Automaton has 14 states and 15 transitions. Word has length 11 [2022-04-07 16:56:26,269 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 16:56:26,269 INFO L478 AbstractCegarLoop]: Abstraction has 14 states and 15 transitions. [2022-04-07 16:56:26,269 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 1.75) internal successors, (7), 3 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:56:26,269 INFO L276 IsEmpty]: Start isEmpty. Operand 14 states and 15 transitions. [2022-04-07 16:56:26,269 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2022-04-07 16:56:26,270 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 16:56:26,270 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 16:56:26,270 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-04-07 16:56:26,270 INFO L403 AbstractCegarLoop]: === Iteration 3 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 16:56:26,270 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 16:56:26,270 INFO L85 PathProgramCache]: Analyzing trace with hash 980092676, now seen corresponding path program 1 times [2022-04-07 16:56:26,271 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 16:56:26,271 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [549765102] [2022-04-07 16:56:26,271 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 16:56:26,271 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 16:56:26,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 16:56:26,372 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 16:56:26,374 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 16:56:26,380 INFO L290 TraceCheckUtils]: 0: Hoare triple {165#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {158#true} is VALID [2022-04-07 16:56:26,381 INFO L290 TraceCheckUtils]: 1: Hoare triple {158#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {158#true} is VALID [2022-04-07 16:56:26,381 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {158#true} {158#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {158#true} is VALID [2022-04-07 16:56:26,381 INFO L272 TraceCheckUtils]: 0: Hoare triple {158#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {165#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 16:56:26,382 INFO L290 TraceCheckUtils]: 1: Hoare triple {165#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {158#true} is VALID [2022-04-07 16:56:26,382 INFO L290 TraceCheckUtils]: 2: Hoare triple {158#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {158#true} is VALID [2022-04-07 16:56:26,382 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {158#true} {158#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {158#true} is VALID [2022-04-07 16:56:26,382 INFO L272 TraceCheckUtils]: 4: Hoare triple {158#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {158#true} is VALID [2022-04-07 16:56:26,383 INFO L290 TraceCheckUtils]: 5: Hoare triple {158#true} [49] mainENTRY-->L18-2: Formula: (and (= v_main_~y~0_2 |v_main_#t~nondet4_2|) (= v_main_~x~0_3 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~y~0] {163#(= main_~x~0 0)} is VALID [2022-04-07 16:56:26,383 INFO L290 TraceCheckUtils]: 6: Hoare triple {163#(= main_~x~0 0)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {163#(= main_~x~0 0)} is VALID [2022-04-07 16:56:26,383 INFO L290 TraceCheckUtils]: 7: Hoare triple {163#(= main_~x~0 0)} [55] L18-->L18-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_8 2)) (= (mod v_main_~y~0_4 2) 0)) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_4} AuxVars[] AssignedVars[main_~x~0] {164#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 2))} is VALID [2022-04-07 16:56:26,384 INFO L290 TraceCheckUtils]: 8: Hoare triple {164#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 2))} [52] L18-2-->L17-2: Formula: (not (< (mod v_main_~x~0_5 4294967296) 99)) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {159#false} is VALID [2022-04-07 16:56:26,385 INFO L272 TraceCheckUtils]: 9: Hoare triple {159#false} [54] L17-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) (mod v_main_~y~0_5 2)) 1 0)) InVars {main_~x~0=v_main_~x~0_9, main_~y~0=v_main_~y~0_5} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~y~0] {159#false} is VALID [2022-04-07 16:56:26,385 INFO L290 TraceCheckUtils]: 10: Hoare triple {159#false} [58] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {159#false} is VALID [2022-04-07 16:56:26,385 INFO L290 TraceCheckUtils]: 11: Hoare triple {159#false} [59] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {159#false} is VALID [2022-04-07 16:56:26,386 INFO L290 TraceCheckUtils]: 12: Hoare triple {159#false} [61] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {159#false} is VALID [2022-04-07 16:56:26,386 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 16:56:26,386 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 16:56:26,387 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [549765102] [2022-04-07 16:56:26,387 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [549765102] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 16:56:26,387 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1363582532] [2022-04-07 16:56:26,387 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 16:56:26,387 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 16:56:26,388 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 16:56:26,389 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 16:56:26,389 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-04-07 16:56:26,424 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 16:56:26,425 INFO L263 TraceCheckSpWp]: Trace formula consists of 58 conjuncts, 8 conjunts are in the unsatisfiable core [2022-04-07 16:56:26,433 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 16:56:26,436 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 16:56:26,763 INFO L272 TraceCheckUtils]: 0: Hoare triple {158#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {158#true} is VALID [2022-04-07 16:56:26,764 INFO L290 TraceCheckUtils]: 1: Hoare triple {158#true} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {158#true} is VALID [2022-04-07 16:56:26,765 INFO L290 TraceCheckUtils]: 2: Hoare triple {158#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {158#true} is VALID [2022-04-07 16:56:26,766 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {158#true} {158#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {158#true} is VALID [2022-04-07 16:56:26,766 INFO L272 TraceCheckUtils]: 4: Hoare triple {158#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {158#true} is VALID [2022-04-07 16:56:26,771 INFO L290 TraceCheckUtils]: 5: Hoare triple {158#true} [49] mainENTRY-->L18-2: Formula: (and (= v_main_~y~0_2 |v_main_#t~nondet4_2|) (= v_main_~x~0_3 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~y~0] {163#(= main_~x~0 0)} is VALID [2022-04-07 16:56:26,771 INFO L290 TraceCheckUtils]: 6: Hoare triple {163#(= main_~x~0 0)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {163#(= main_~x~0 0)} is VALID [2022-04-07 16:56:26,772 INFO L290 TraceCheckUtils]: 7: Hoare triple {163#(= main_~x~0 0)} [55] L18-->L18-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_8 2)) (= (mod v_main_~y~0_4 2) 0)) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_4} AuxVars[] AssignedVars[main_~x~0] {190#(and (<= (mod main_~y~0 2) 0) (= main_~x~0 2))} is VALID [2022-04-07 16:56:26,772 INFO L290 TraceCheckUtils]: 8: Hoare triple {190#(and (<= (mod main_~y~0 2) 0) (= main_~x~0 2))} [52] L18-2-->L17-2: Formula: (not (< (mod v_main_~x~0_5 4294967296) 99)) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {190#(and (<= (mod main_~y~0 2) 0) (= main_~x~0 2))} is VALID [2022-04-07 16:56:26,774 INFO L272 TraceCheckUtils]: 9: Hoare triple {190#(and (<= (mod main_~y~0 2) 0) (= main_~x~0 2))} [54] L17-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) (mod v_main_~y~0_5 2)) 1 0)) InVars {main_~x~0=v_main_~x~0_9, main_~y~0=v_main_~y~0_5} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~y~0] {197#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 16:56:26,774 INFO L290 TraceCheckUtils]: 10: Hoare triple {197#(<= 1 |__VERIFIER_assert_#in~cond|)} [58] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {201#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 16:56:26,776 INFO L290 TraceCheckUtils]: 11: Hoare triple {201#(<= 1 __VERIFIER_assert_~cond)} [59] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {159#false} is VALID [2022-04-07 16:56:26,776 INFO L290 TraceCheckUtils]: 12: Hoare triple {159#false} [61] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {159#false} is VALID [2022-04-07 16:56:26,776 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 16:56:26,776 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 16:56:27,079 INFO L290 TraceCheckUtils]: 12: Hoare triple {159#false} [61] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {159#false} is VALID [2022-04-07 16:56:27,080 INFO L290 TraceCheckUtils]: 11: Hoare triple {201#(<= 1 __VERIFIER_assert_~cond)} [59] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {159#false} is VALID [2022-04-07 16:56:27,081 INFO L290 TraceCheckUtils]: 10: Hoare triple {197#(<= 1 |__VERIFIER_assert_#in~cond|)} [58] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {201#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 16:56:27,081 INFO L272 TraceCheckUtils]: 9: Hoare triple {217#(= (mod main_~x~0 2) (mod main_~y~0 2))} [54] L17-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) (mod v_main_~y~0_5 2)) 1 0)) InVars {main_~x~0=v_main_~x~0_9, main_~y~0=v_main_~y~0_5} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~y~0] {197#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 16:56:27,082 INFO L290 TraceCheckUtils]: 8: Hoare triple {217#(= (mod main_~x~0 2) (mod main_~y~0 2))} [52] L18-2-->L17-2: Formula: (not (< (mod v_main_~x~0_5 4294967296) 99)) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {217#(= (mod main_~x~0 2) (mod main_~y~0 2))} is VALID [2022-04-07 16:56:27,082 INFO L290 TraceCheckUtils]: 7: Hoare triple {224#(<= (mod main_~x~0 2) 0)} [55] L18-->L18-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_8 2)) (= (mod v_main_~y~0_4 2) 0)) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_4} AuxVars[] AssignedVars[main_~x~0] {217#(= (mod main_~x~0 2) (mod main_~y~0 2))} is VALID [2022-04-07 16:56:27,083 INFO L290 TraceCheckUtils]: 6: Hoare triple {224#(<= (mod main_~x~0 2) 0)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {224#(<= (mod main_~x~0 2) 0)} is VALID [2022-04-07 16:56:27,083 INFO L290 TraceCheckUtils]: 5: Hoare triple {158#true} [49] mainENTRY-->L18-2: Formula: (and (= v_main_~y~0_2 |v_main_#t~nondet4_2|) (= v_main_~x~0_3 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~y~0] {224#(<= (mod main_~x~0 2) 0)} is VALID [2022-04-07 16:56:27,083 INFO L272 TraceCheckUtils]: 4: Hoare triple {158#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {158#true} is VALID [2022-04-07 16:56:27,083 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {158#true} {158#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {158#true} is VALID [2022-04-07 16:56:27,083 INFO L290 TraceCheckUtils]: 2: Hoare triple {158#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {158#true} is VALID [2022-04-07 16:56:27,084 INFO L290 TraceCheckUtils]: 1: Hoare triple {158#true} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {158#true} is VALID [2022-04-07 16:56:27,084 INFO L272 TraceCheckUtils]: 0: Hoare triple {158#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {158#true} is VALID [2022-04-07 16:56:27,084 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 16:56:27,084 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1363582532] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 16:56:27,084 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 16:56:27,084 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 6, 6] total 10 [2022-04-07 16:56:27,086 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [108687465] [2022-04-07 16:56:27,086 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 16:56:27,088 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 1.8) internal successors, (18), 8 states have internal predecessors, (18), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 13 [2022-04-07 16:56:27,088 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 16:56:27,088 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 10 states, 10 states have (on average 1.8) internal successors, (18), 8 states have internal predecessors, (18), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:56:27,103 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 25 edges. 25 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 16:56:27,105 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2022-04-07 16:56:27,105 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 16:56:27,106 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2022-04-07 16:56:27,106 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=68, Unknown=0, NotChecked=0, Total=90 [2022-04-07 16:56:27,106 INFO L87 Difference]: Start difference. First operand 14 states and 15 transitions. Second operand has 10 states, 10 states have (on average 1.8) internal successors, (18), 8 states have internal predecessors, (18), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:56:27,370 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 16:56:27,370 INFO L93 Difference]: Finished difference Result 29 states and 35 transitions. [2022-04-07 16:56:27,370 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-04-07 16:56:27,370 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 1.8) internal successors, (18), 8 states have internal predecessors, (18), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 13 [2022-04-07 16:56:27,370 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 16:56:27,370 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 1.8) internal successors, (18), 8 states have internal predecessors, (18), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:56:27,372 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 41 transitions. [2022-04-07 16:56:27,372 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 1.8) internal successors, (18), 8 states have internal predecessors, (18), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:56:27,373 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 41 transitions. [2022-04-07 16:56:27,373 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 12 states and 41 transitions. [2022-04-07 16:56:27,410 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 41 edges. 41 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 16:56:27,410 INFO L225 Difference]: With dead ends: 29 [2022-04-07 16:56:27,410 INFO L226 Difference]: Without dead ends: 21 [2022-04-07 16:56:27,411 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 23 SyntacticMatches, 1 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 51 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=79, Invalid=263, Unknown=0, NotChecked=0, Total=342 [2022-04-07 16:56:27,412 INFO L913 BasicCegarLoop]: 9 mSDtfsCounter, 26 mSDsluCounter, 27 mSDsCounter, 0 mSdLazyCounter, 63 mSolverCounterSat, 35 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 26 SdHoareTripleChecker+Valid, 36 SdHoareTripleChecker+Invalid, 98 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 35 IncrementalHoareTripleChecker+Valid, 63 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 16:56:27,412 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [26 Valid, 36 Invalid, 98 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [35 Valid, 63 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-07 16:56:27,412 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21 states. [2022-04-07 16:56:27,413 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21 to 20. [2022-04-07 16:56:27,413 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 16:56:27,414 INFO L82 GeneralOperation]: Start isEquivalent. First operand 21 states. Second operand has 20 states, 15 states have (on average 1.0666666666666667) internal successors, (16), 15 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:56:27,414 INFO L74 IsIncluded]: Start isIncluded. First operand 21 states. Second operand has 20 states, 15 states have (on average 1.0666666666666667) internal successors, (16), 15 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:56:27,414 INFO L87 Difference]: Start difference. First operand 21 states. Second operand has 20 states, 15 states have (on average 1.0666666666666667) internal successors, (16), 15 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:56:27,415 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 16:56:27,415 INFO L93 Difference]: Finished difference Result 21 states and 21 transitions. [2022-04-07 16:56:27,415 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 21 transitions. [2022-04-07 16:56:27,415 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 16:56:27,415 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 16:56:27,415 INFO L74 IsIncluded]: Start isIncluded. First operand has 20 states, 15 states have (on average 1.0666666666666667) internal successors, (16), 15 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 21 states. [2022-04-07 16:56:27,415 INFO L87 Difference]: Start difference. First operand has 20 states, 15 states have (on average 1.0666666666666667) internal successors, (16), 15 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 21 states. [2022-04-07 16:56:27,416 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 16:56:27,416 INFO L93 Difference]: Finished difference Result 21 states and 21 transitions. [2022-04-07 16:56:27,416 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 21 transitions. [2022-04-07 16:56:27,416 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 16:56:27,416 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 16:56:27,416 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 16:56:27,417 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 16:56:27,417 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 15 states have (on average 1.0666666666666667) internal successors, (16), 15 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:56:27,417 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 20 transitions. [2022-04-07 16:56:27,417 INFO L78 Accepts]: Start accepts. Automaton has 20 states and 20 transitions. Word has length 13 [2022-04-07 16:56:27,417 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 16:56:27,417 INFO L478 AbstractCegarLoop]: Abstraction has 20 states and 20 transitions. [2022-04-07 16:56:27,418 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 1.8) internal successors, (18), 8 states have internal predecessors, (18), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:56:27,418 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 20 transitions. [2022-04-07 16:56:27,418 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-07 16:56:27,418 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 16:56:27,418 INFO L499 BasicCegarLoop]: trace histogram [4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 16:56:27,436 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2022-04-07 16:56:27,632 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2,2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 16:56:27,632 INFO L403 AbstractCegarLoop]: === Iteration 4 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 16:56:27,633 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 16:56:27,633 INFO L85 PathProgramCache]: Analyzing trace with hash -1058670374, now seen corresponding path program 1 times [2022-04-07 16:56:27,633 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 16:56:27,633 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1262529387] [2022-04-07 16:56:27,633 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 16:56:27,633 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 16:56:27,647 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 16:56:27,733 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 16:56:27,735 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 16:56:27,743 INFO L290 TraceCheckUtils]: 0: Hoare triple {367#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {357#true} is VALID [2022-04-07 16:56:27,744 INFO L290 TraceCheckUtils]: 1: Hoare triple {357#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {357#true} is VALID [2022-04-07 16:56:27,744 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {357#true} {357#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {357#true} is VALID [2022-04-07 16:56:27,744 INFO L272 TraceCheckUtils]: 0: Hoare triple {357#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {367#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 16:56:27,744 INFO L290 TraceCheckUtils]: 1: Hoare triple {367#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {357#true} is VALID [2022-04-07 16:56:27,744 INFO L290 TraceCheckUtils]: 2: Hoare triple {357#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {357#true} is VALID [2022-04-07 16:56:27,745 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {357#true} {357#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {357#true} is VALID [2022-04-07 16:56:27,745 INFO L272 TraceCheckUtils]: 4: Hoare triple {357#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {357#true} is VALID [2022-04-07 16:56:27,745 INFO L290 TraceCheckUtils]: 5: Hoare triple {357#true} [49] mainENTRY-->L18-2: Formula: (and (= v_main_~y~0_2 |v_main_#t~nondet4_2|) (= v_main_~x~0_3 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~y~0] {362#(= main_~x~0 0)} is VALID [2022-04-07 16:56:27,745 INFO L290 TraceCheckUtils]: 6: Hoare triple {362#(= main_~x~0 0)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {362#(= main_~x~0 0)} is VALID [2022-04-07 16:56:27,746 INFO L290 TraceCheckUtils]: 7: Hoare triple {362#(= main_~x~0 0)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {363#(and (<= 1 main_~x~0) (<= main_~x~0 1))} is VALID [2022-04-07 16:56:27,746 INFO L290 TraceCheckUtils]: 8: Hoare triple {363#(and (<= 1 main_~x~0) (<= main_~x~0 1))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {363#(and (<= 1 main_~x~0) (<= main_~x~0 1))} is VALID [2022-04-07 16:56:27,747 INFO L290 TraceCheckUtils]: 9: Hoare triple {363#(and (<= 1 main_~x~0) (<= main_~x~0 1))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {364#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-07 16:56:27,747 INFO L290 TraceCheckUtils]: 10: Hoare triple {364#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {364#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-07 16:56:27,748 INFO L290 TraceCheckUtils]: 11: Hoare triple {364#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {365#(and (<= main_~x~0 3) (<= 3 main_~x~0))} is VALID [2022-04-07 16:56:27,748 INFO L290 TraceCheckUtils]: 12: Hoare triple {365#(and (<= main_~x~0 3) (<= 3 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {365#(and (<= main_~x~0 3) (<= 3 main_~x~0))} is VALID [2022-04-07 16:56:27,749 INFO L290 TraceCheckUtils]: 13: Hoare triple {365#(and (<= main_~x~0 3) (<= 3 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {366#(and (<= main_~x~0 4) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} is VALID [2022-04-07 16:56:27,749 INFO L290 TraceCheckUtils]: 14: Hoare triple {366#(and (<= main_~x~0 4) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} [52] L18-2-->L17-2: Formula: (not (< (mod v_main_~x~0_5 4294967296) 99)) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {358#false} is VALID [2022-04-07 16:56:27,749 INFO L272 TraceCheckUtils]: 15: Hoare triple {358#false} [54] L17-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) (mod v_main_~y~0_5 2)) 1 0)) InVars {main_~x~0=v_main_~x~0_9, main_~y~0=v_main_~y~0_5} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~y~0] {358#false} is VALID [2022-04-07 16:56:27,749 INFO L290 TraceCheckUtils]: 16: Hoare triple {358#false} [58] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {358#false} is VALID [2022-04-07 16:56:27,749 INFO L290 TraceCheckUtils]: 17: Hoare triple {358#false} [59] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {358#false} is VALID [2022-04-07 16:56:27,750 INFO L290 TraceCheckUtils]: 18: Hoare triple {358#false} [61] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {358#false} is VALID [2022-04-07 16:56:27,750 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 16:56:27,750 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 16:56:27,750 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1262529387] [2022-04-07 16:56:27,750 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1262529387] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 16:56:27,750 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1997568616] [2022-04-07 16:56:27,750 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 16:56:27,750 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 16:56:27,751 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 16:56:27,751 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 16:56:27,752 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-04-07 16:56:27,779 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 16:56:27,779 INFO L263 TraceCheckSpWp]: Trace formula consists of 69 conjuncts, 11 conjunts are in the unsatisfiable core [2022-04-07 16:56:27,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 16:56:27,784 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 16:56:27,961 INFO L272 TraceCheckUtils]: 0: Hoare triple {357#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {357#true} is VALID [2022-04-07 16:56:27,961 INFO L290 TraceCheckUtils]: 1: Hoare triple {357#true} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {357#true} is VALID [2022-04-07 16:56:27,961 INFO L290 TraceCheckUtils]: 2: Hoare triple {357#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {357#true} is VALID [2022-04-07 16:56:27,961 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {357#true} {357#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {357#true} is VALID [2022-04-07 16:56:27,961 INFO L272 TraceCheckUtils]: 4: Hoare triple {357#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {357#true} is VALID [2022-04-07 16:56:27,962 INFO L290 TraceCheckUtils]: 5: Hoare triple {357#true} [49] mainENTRY-->L18-2: Formula: (and (= v_main_~y~0_2 |v_main_#t~nondet4_2|) (= v_main_~x~0_3 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~y~0] {362#(= main_~x~0 0)} is VALID [2022-04-07 16:56:27,962 INFO L290 TraceCheckUtils]: 6: Hoare triple {362#(= main_~x~0 0)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {362#(= main_~x~0 0)} is VALID [2022-04-07 16:56:27,963 INFO L290 TraceCheckUtils]: 7: Hoare triple {362#(= main_~x~0 0)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {363#(and (<= 1 main_~x~0) (<= main_~x~0 1))} is VALID [2022-04-07 16:56:27,963 INFO L290 TraceCheckUtils]: 8: Hoare triple {363#(and (<= 1 main_~x~0) (<= main_~x~0 1))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {363#(and (<= 1 main_~x~0) (<= main_~x~0 1))} is VALID [2022-04-07 16:56:27,964 INFO L290 TraceCheckUtils]: 9: Hoare triple {363#(and (<= 1 main_~x~0) (<= main_~x~0 1))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {364#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-07 16:56:27,964 INFO L290 TraceCheckUtils]: 10: Hoare triple {364#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {364#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-07 16:56:27,965 INFO L290 TraceCheckUtils]: 11: Hoare triple {364#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {365#(and (<= main_~x~0 3) (<= 3 main_~x~0))} is VALID [2022-04-07 16:56:27,966 INFO L290 TraceCheckUtils]: 12: Hoare triple {365#(and (<= main_~x~0 3) (<= 3 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {365#(and (<= main_~x~0 3) (<= 3 main_~x~0))} is VALID [2022-04-07 16:56:27,967 INFO L290 TraceCheckUtils]: 13: Hoare triple {365#(and (<= main_~x~0 3) (<= 3 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {410#(and (<= main_~x~0 4) (<= 4 main_~x~0))} is VALID [2022-04-07 16:56:27,967 INFO L290 TraceCheckUtils]: 14: Hoare triple {410#(and (<= main_~x~0 4) (<= 4 main_~x~0))} [52] L18-2-->L17-2: Formula: (not (< (mod v_main_~x~0_5 4294967296) 99)) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {358#false} is VALID [2022-04-07 16:56:27,967 INFO L272 TraceCheckUtils]: 15: Hoare triple {358#false} [54] L17-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) (mod v_main_~y~0_5 2)) 1 0)) InVars {main_~x~0=v_main_~x~0_9, main_~y~0=v_main_~y~0_5} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~y~0] {358#false} is VALID [2022-04-07 16:56:27,968 INFO L290 TraceCheckUtils]: 16: Hoare triple {358#false} [58] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {358#false} is VALID [2022-04-07 16:56:27,968 INFO L290 TraceCheckUtils]: 17: Hoare triple {358#false} [59] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {358#false} is VALID [2022-04-07 16:56:27,968 INFO L290 TraceCheckUtils]: 18: Hoare triple {358#false} [61] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {358#false} is VALID [2022-04-07 16:56:27,968 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 16:56:27,968 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 16:56:28,080 INFO L290 TraceCheckUtils]: 18: Hoare triple {358#false} [61] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {358#false} is VALID [2022-04-07 16:56:28,081 INFO L290 TraceCheckUtils]: 17: Hoare triple {358#false} [59] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {358#false} is VALID [2022-04-07 16:56:28,081 INFO L290 TraceCheckUtils]: 16: Hoare triple {358#false} [58] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {358#false} is VALID [2022-04-07 16:56:28,082 INFO L272 TraceCheckUtils]: 15: Hoare triple {358#false} [54] L17-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) (mod v_main_~y~0_5 2)) 1 0)) InVars {main_~x~0=v_main_~x~0_9, main_~y~0=v_main_~y~0_5} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~y~0] {358#false} is VALID [2022-04-07 16:56:28,082 INFO L290 TraceCheckUtils]: 14: Hoare triple {438#(< (mod main_~x~0 4294967296) 99)} [52] L18-2-->L17-2: Formula: (not (< (mod v_main_~x~0_5 4294967296) 99)) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {358#false} is VALID [2022-04-07 16:56:28,084 INFO L290 TraceCheckUtils]: 13: Hoare triple {442#(< (mod (+ main_~x~0 1) 4294967296) 99)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {438#(< (mod main_~x~0 4294967296) 99)} is VALID [2022-04-07 16:56:28,085 INFO L290 TraceCheckUtils]: 12: Hoare triple {442#(< (mod (+ main_~x~0 1) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {442#(< (mod (+ main_~x~0 1) 4294967296) 99)} is VALID [2022-04-07 16:56:28,085 INFO L290 TraceCheckUtils]: 11: Hoare triple {449#(< (mod (+ main_~x~0 2) 4294967296) 99)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {442#(< (mod (+ main_~x~0 1) 4294967296) 99)} is VALID [2022-04-07 16:56:28,092 INFO L290 TraceCheckUtils]: 10: Hoare triple {449#(< (mod (+ main_~x~0 2) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {449#(< (mod (+ main_~x~0 2) 4294967296) 99)} is VALID [2022-04-07 16:56:28,093 INFO L290 TraceCheckUtils]: 9: Hoare triple {456#(< (mod (+ main_~x~0 3) 4294967296) 99)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {449#(< (mod (+ main_~x~0 2) 4294967296) 99)} is VALID [2022-04-07 16:56:28,096 INFO L290 TraceCheckUtils]: 8: Hoare triple {456#(< (mod (+ main_~x~0 3) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {456#(< (mod (+ main_~x~0 3) 4294967296) 99)} is VALID [2022-04-07 16:56:28,096 INFO L290 TraceCheckUtils]: 7: Hoare triple {463#(< (mod (+ main_~x~0 4) 4294967296) 99)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {456#(< (mod (+ main_~x~0 3) 4294967296) 99)} is VALID [2022-04-07 16:56:28,097 INFO L290 TraceCheckUtils]: 6: Hoare triple {463#(< (mod (+ main_~x~0 4) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {463#(< (mod (+ main_~x~0 4) 4294967296) 99)} is VALID [2022-04-07 16:56:28,098 INFO L290 TraceCheckUtils]: 5: Hoare triple {357#true} [49] mainENTRY-->L18-2: Formula: (and (= v_main_~y~0_2 |v_main_#t~nondet4_2|) (= v_main_~x~0_3 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~y~0] {463#(< (mod (+ main_~x~0 4) 4294967296) 99)} is VALID [2022-04-07 16:56:28,098 INFO L272 TraceCheckUtils]: 4: Hoare triple {357#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {357#true} is VALID [2022-04-07 16:56:28,098 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {357#true} {357#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {357#true} is VALID [2022-04-07 16:56:28,098 INFO L290 TraceCheckUtils]: 2: Hoare triple {357#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {357#true} is VALID [2022-04-07 16:56:28,098 INFO L290 TraceCheckUtils]: 1: Hoare triple {357#true} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {357#true} is VALID [2022-04-07 16:56:28,098 INFO L272 TraceCheckUtils]: 0: Hoare triple {357#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {357#true} is VALID [2022-04-07 16:56:28,098 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 16:56:28,099 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1997568616] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 16:56:28,099 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 16:56:28,099 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7, 7] total 14 [2022-04-07 16:56:28,099 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1394942657] [2022-04-07 16:56:28,099 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 16:56:28,099 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 2.0) internal successors, (28), 13 states have internal predecessors, (28), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-07 16:56:28,100 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 16:56:28,100 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 14 states, 14 states have (on average 2.0) internal successors, (28), 13 states have internal predecessors, (28), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:56:28,126 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 33 edges. 33 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 16:56:28,127 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2022-04-07 16:56:28,129 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 16:56:28,129 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-04-07 16:56:28,129 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=60, Invalid=122, Unknown=0, NotChecked=0, Total=182 [2022-04-07 16:56:28,130 INFO L87 Difference]: Start difference. First operand 20 states and 20 transitions. Second operand has 14 states, 14 states have (on average 2.0) internal successors, (28), 13 states have internal predecessors, (28), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:56:28,549 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 16:56:28,549 INFO L93 Difference]: Finished difference Result 34 states and 34 transitions. [2022-04-07 16:56:28,550 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-04-07 16:56:28,550 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 2.0) internal successors, (28), 13 states have internal predecessors, (28), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-07 16:56:28,550 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 16:56:28,550 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 14 states have (on average 2.0) internal successors, (28), 13 states have internal predecessors, (28), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:56:28,551 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 35 transitions. [2022-04-07 16:56:28,551 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 14 states have (on average 2.0) internal successors, (28), 13 states have internal predecessors, (28), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:56:28,552 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 35 transitions. [2022-04-07 16:56:28,552 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 13 states and 35 transitions. [2022-04-07 16:56:28,588 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 35 edges. 35 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 16:56:28,589 INFO L225 Difference]: With dead ends: 34 [2022-04-07 16:56:28,589 INFO L226 Difference]: Without dead ends: 34 [2022-04-07 16:56:28,589 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 57 GetRequests, 34 SyntacticMatches, 1 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 64 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=175, Invalid=377, Unknown=0, NotChecked=0, Total=552 [2022-04-07 16:56:28,590 INFO L913 BasicCegarLoop]: 11 mSDtfsCounter, 27 mSDsluCounter, 27 mSDsCounter, 0 mSdLazyCounter, 89 mSolverCounterSat, 25 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 27 SdHoareTripleChecker+Valid, 38 SdHoareTripleChecker+Invalid, 114 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 25 IncrementalHoareTripleChecker+Valid, 89 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 16:56:28,590 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [27 Valid, 38 Invalid, 114 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [25 Valid, 89 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-07 16:56:28,591 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2022-04-07 16:56:28,592 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 32. [2022-04-07 16:56:28,592 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 16:56:28,592 INFO L82 GeneralOperation]: Start isEquivalent. First operand 34 states. Second operand has 32 states, 27 states have (on average 1.037037037037037) internal successors, (28), 27 states have internal predecessors, (28), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:56:28,592 INFO L74 IsIncluded]: Start isIncluded. First operand 34 states. Second operand has 32 states, 27 states have (on average 1.037037037037037) internal successors, (28), 27 states have internal predecessors, (28), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:56:28,592 INFO L87 Difference]: Start difference. First operand 34 states. Second operand has 32 states, 27 states have (on average 1.037037037037037) internal successors, (28), 27 states have internal predecessors, (28), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:56:28,594 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 16:56:28,594 INFO L93 Difference]: Finished difference Result 34 states and 34 transitions. [2022-04-07 16:56:28,594 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 34 transitions. [2022-04-07 16:56:28,594 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 16:56:28,594 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 16:56:28,594 INFO L74 IsIncluded]: Start isIncluded. First operand has 32 states, 27 states have (on average 1.037037037037037) internal successors, (28), 27 states have internal predecessors, (28), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 34 states. [2022-04-07 16:56:28,594 INFO L87 Difference]: Start difference. First operand has 32 states, 27 states have (on average 1.037037037037037) internal successors, (28), 27 states have internal predecessors, (28), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 34 states. [2022-04-07 16:56:28,595 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 16:56:28,595 INFO L93 Difference]: Finished difference Result 34 states and 34 transitions. [2022-04-07 16:56:28,595 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 34 transitions. [2022-04-07 16:56:28,596 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 16:56:28,596 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 16:56:28,596 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 16:56:28,596 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 16:56:28,596 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 32 states, 27 states have (on average 1.037037037037037) internal successors, (28), 27 states have internal predecessors, (28), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:56:28,597 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 32 transitions. [2022-04-07 16:56:28,597 INFO L78 Accepts]: Start accepts. Automaton has 32 states and 32 transitions. Word has length 19 [2022-04-07 16:56:28,597 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 16:56:28,597 INFO L478 AbstractCegarLoop]: Abstraction has 32 states and 32 transitions. [2022-04-07 16:56:28,597 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 14 states have (on average 2.0) internal successors, (28), 13 states have internal predecessors, (28), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:56:28,597 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 32 transitions. [2022-04-07 16:56:28,597 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-04-07 16:56:28,597 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 16:56:28,598 INFO L499 BasicCegarLoop]: trace histogram [10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 16:56:28,615 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2022-04-07 16:56:28,803 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable3 [2022-04-07 16:56:28,804 INFO L403 AbstractCegarLoop]: === Iteration 5 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 16:56:28,804 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 16:56:28,804 INFO L85 PathProgramCache]: Analyzing trace with hash -2013590648, now seen corresponding path program 2 times [2022-04-07 16:56:28,804 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 16:56:28,804 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [547481986] [2022-04-07 16:56:28,804 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 16:56:28,804 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 16:56:28,830 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 16:56:29,005 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 16:56:29,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 16:56:29,017 INFO L290 TraceCheckUtils]: 0: Hoare triple {657#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {641#true} is VALID [2022-04-07 16:56:29,017 INFO L290 TraceCheckUtils]: 1: Hoare triple {641#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {641#true} is VALID [2022-04-07 16:56:29,017 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {641#true} {641#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {641#true} is VALID [2022-04-07 16:56:29,017 INFO L272 TraceCheckUtils]: 0: Hoare triple {641#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {657#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 16:56:29,017 INFO L290 TraceCheckUtils]: 1: Hoare triple {657#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {641#true} is VALID [2022-04-07 16:56:29,018 INFO L290 TraceCheckUtils]: 2: Hoare triple {641#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {641#true} is VALID [2022-04-07 16:56:29,018 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {641#true} {641#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {641#true} is VALID [2022-04-07 16:56:29,018 INFO L272 TraceCheckUtils]: 4: Hoare triple {641#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {641#true} is VALID [2022-04-07 16:56:29,018 INFO L290 TraceCheckUtils]: 5: Hoare triple {641#true} [49] mainENTRY-->L18-2: Formula: (and (= v_main_~y~0_2 |v_main_#t~nondet4_2|) (= v_main_~x~0_3 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~y~0] {646#(= main_~x~0 0)} is VALID [2022-04-07 16:56:29,018 INFO L290 TraceCheckUtils]: 6: Hoare triple {646#(= main_~x~0 0)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {646#(= main_~x~0 0)} is VALID [2022-04-07 16:56:29,019 INFO L290 TraceCheckUtils]: 7: Hoare triple {646#(= main_~x~0 0)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {647#(and (<= 1 main_~x~0) (<= main_~x~0 1))} is VALID [2022-04-07 16:56:29,019 INFO L290 TraceCheckUtils]: 8: Hoare triple {647#(and (<= 1 main_~x~0) (<= main_~x~0 1))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {647#(and (<= 1 main_~x~0) (<= main_~x~0 1))} is VALID [2022-04-07 16:56:29,020 INFO L290 TraceCheckUtils]: 9: Hoare triple {647#(and (<= 1 main_~x~0) (<= main_~x~0 1))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {648#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-07 16:56:29,020 INFO L290 TraceCheckUtils]: 10: Hoare triple {648#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {648#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-07 16:56:29,020 INFO L290 TraceCheckUtils]: 11: Hoare triple {648#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {649#(and (<= main_~x~0 3) (<= 3 main_~x~0))} is VALID [2022-04-07 16:56:29,021 INFO L290 TraceCheckUtils]: 12: Hoare triple {649#(and (<= main_~x~0 3) (<= 3 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {649#(and (<= main_~x~0 3) (<= 3 main_~x~0))} is VALID [2022-04-07 16:56:29,021 INFO L290 TraceCheckUtils]: 13: Hoare triple {649#(and (<= main_~x~0 3) (<= 3 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {650#(and (<= main_~x~0 4) (<= 4 main_~x~0))} is VALID [2022-04-07 16:56:29,021 INFO L290 TraceCheckUtils]: 14: Hoare triple {650#(and (<= main_~x~0 4) (<= 4 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {650#(and (<= main_~x~0 4) (<= 4 main_~x~0))} is VALID [2022-04-07 16:56:29,022 INFO L290 TraceCheckUtils]: 15: Hoare triple {650#(and (<= main_~x~0 4) (<= 4 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {651#(and (<= 5 main_~x~0) (<= main_~x~0 5))} is VALID [2022-04-07 16:56:29,022 INFO L290 TraceCheckUtils]: 16: Hoare triple {651#(and (<= 5 main_~x~0) (<= main_~x~0 5))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {651#(and (<= 5 main_~x~0) (<= main_~x~0 5))} is VALID [2022-04-07 16:56:29,023 INFO L290 TraceCheckUtils]: 17: Hoare triple {651#(and (<= 5 main_~x~0) (<= main_~x~0 5))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {652#(and (<= 6 main_~x~0) (<= main_~x~0 6))} is VALID [2022-04-07 16:56:29,023 INFO L290 TraceCheckUtils]: 18: Hoare triple {652#(and (<= 6 main_~x~0) (<= main_~x~0 6))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {652#(and (<= 6 main_~x~0) (<= main_~x~0 6))} is VALID [2022-04-07 16:56:29,023 INFO L290 TraceCheckUtils]: 19: Hoare triple {652#(and (<= 6 main_~x~0) (<= main_~x~0 6))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {653#(and (<= main_~x~0 7) (<= 7 main_~x~0))} is VALID [2022-04-07 16:56:29,024 INFO L290 TraceCheckUtils]: 20: Hoare triple {653#(and (<= main_~x~0 7) (<= 7 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {653#(and (<= main_~x~0 7) (<= 7 main_~x~0))} is VALID [2022-04-07 16:56:29,024 INFO L290 TraceCheckUtils]: 21: Hoare triple {653#(and (<= main_~x~0 7) (<= 7 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {654#(and (<= main_~x~0 8) (<= 8 main_~x~0))} is VALID [2022-04-07 16:56:29,025 INFO L290 TraceCheckUtils]: 22: Hoare triple {654#(and (<= main_~x~0 8) (<= 8 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {654#(and (<= main_~x~0 8) (<= 8 main_~x~0))} is VALID [2022-04-07 16:56:29,025 INFO L290 TraceCheckUtils]: 23: Hoare triple {654#(and (<= main_~x~0 8) (<= 8 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {655#(and (<= main_~x~0 9) (<= 9 main_~x~0))} is VALID [2022-04-07 16:56:29,025 INFO L290 TraceCheckUtils]: 24: Hoare triple {655#(and (<= main_~x~0 9) (<= 9 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {655#(and (<= main_~x~0 9) (<= 9 main_~x~0))} is VALID [2022-04-07 16:56:29,026 INFO L290 TraceCheckUtils]: 25: Hoare triple {655#(and (<= main_~x~0 9) (<= 9 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {656#(and (<= main_~x~0 10) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} is VALID [2022-04-07 16:56:29,026 INFO L290 TraceCheckUtils]: 26: Hoare triple {656#(and (<= main_~x~0 10) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} [52] L18-2-->L17-2: Formula: (not (< (mod v_main_~x~0_5 4294967296) 99)) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {642#false} is VALID [2022-04-07 16:56:29,026 INFO L272 TraceCheckUtils]: 27: Hoare triple {642#false} [54] L17-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) (mod v_main_~y~0_5 2)) 1 0)) InVars {main_~x~0=v_main_~x~0_9, main_~y~0=v_main_~y~0_5} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~y~0] {642#false} is VALID [2022-04-07 16:56:29,027 INFO L290 TraceCheckUtils]: 28: Hoare triple {642#false} [58] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {642#false} is VALID [2022-04-07 16:56:29,027 INFO L290 TraceCheckUtils]: 29: Hoare triple {642#false} [59] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {642#false} is VALID [2022-04-07 16:56:29,027 INFO L290 TraceCheckUtils]: 30: Hoare triple {642#false} [61] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {642#false} is VALID [2022-04-07 16:56:29,027 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 16:56:29,028 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 16:56:29,028 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [547481986] [2022-04-07 16:56:29,028 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [547481986] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 16:56:29,028 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [820319349] [2022-04-07 16:56:29,028 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-07 16:56:29,028 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 16:56:29,028 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 16:56:29,030 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 16:56:29,030 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-04-07 16:56:29,069 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-07 16:56:29,069 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 16:56:29,070 INFO L263 TraceCheckSpWp]: Trace formula consists of 93 conjuncts, 23 conjunts are in the unsatisfiable core [2022-04-07 16:56:29,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 16:56:29,076 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 16:56:29,332 INFO L272 TraceCheckUtils]: 0: Hoare triple {641#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {641#true} is VALID [2022-04-07 16:56:29,332 INFO L290 TraceCheckUtils]: 1: Hoare triple {641#true} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {641#true} is VALID [2022-04-07 16:56:29,332 INFO L290 TraceCheckUtils]: 2: Hoare triple {641#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {641#true} is VALID [2022-04-07 16:56:29,332 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {641#true} {641#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {641#true} is VALID [2022-04-07 16:56:29,332 INFO L272 TraceCheckUtils]: 4: Hoare triple {641#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {641#true} is VALID [2022-04-07 16:56:29,333 INFO L290 TraceCheckUtils]: 5: Hoare triple {641#true} [49] mainENTRY-->L18-2: Formula: (and (= v_main_~y~0_2 |v_main_#t~nondet4_2|) (= v_main_~x~0_3 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~y~0] {646#(= main_~x~0 0)} is VALID [2022-04-07 16:56:29,333 INFO L290 TraceCheckUtils]: 6: Hoare triple {646#(= main_~x~0 0)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {646#(= main_~x~0 0)} is VALID [2022-04-07 16:56:29,334 INFO L290 TraceCheckUtils]: 7: Hoare triple {646#(= main_~x~0 0)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {647#(and (<= 1 main_~x~0) (<= main_~x~0 1))} is VALID [2022-04-07 16:56:29,334 INFO L290 TraceCheckUtils]: 8: Hoare triple {647#(and (<= 1 main_~x~0) (<= main_~x~0 1))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {647#(and (<= 1 main_~x~0) (<= main_~x~0 1))} is VALID [2022-04-07 16:56:29,335 INFO L290 TraceCheckUtils]: 9: Hoare triple {647#(and (<= 1 main_~x~0) (<= main_~x~0 1))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {648#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-07 16:56:29,335 INFO L290 TraceCheckUtils]: 10: Hoare triple {648#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {648#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-07 16:56:29,335 INFO L290 TraceCheckUtils]: 11: Hoare triple {648#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {649#(and (<= main_~x~0 3) (<= 3 main_~x~0))} is VALID [2022-04-07 16:56:29,336 INFO L290 TraceCheckUtils]: 12: Hoare triple {649#(and (<= main_~x~0 3) (<= 3 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {649#(and (<= main_~x~0 3) (<= 3 main_~x~0))} is VALID [2022-04-07 16:56:29,336 INFO L290 TraceCheckUtils]: 13: Hoare triple {649#(and (<= main_~x~0 3) (<= 3 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {650#(and (<= main_~x~0 4) (<= 4 main_~x~0))} is VALID [2022-04-07 16:56:29,337 INFO L290 TraceCheckUtils]: 14: Hoare triple {650#(and (<= main_~x~0 4) (<= 4 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {650#(and (<= main_~x~0 4) (<= 4 main_~x~0))} is VALID [2022-04-07 16:56:29,337 INFO L290 TraceCheckUtils]: 15: Hoare triple {650#(and (<= main_~x~0 4) (<= 4 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {651#(and (<= 5 main_~x~0) (<= main_~x~0 5))} is VALID [2022-04-07 16:56:29,337 INFO L290 TraceCheckUtils]: 16: Hoare triple {651#(and (<= 5 main_~x~0) (<= main_~x~0 5))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {651#(and (<= 5 main_~x~0) (<= main_~x~0 5))} is VALID [2022-04-07 16:56:29,338 INFO L290 TraceCheckUtils]: 17: Hoare triple {651#(and (<= 5 main_~x~0) (<= main_~x~0 5))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {652#(and (<= 6 main_~x~0) (<= main_~x~0 6))} is VALID [2022-04-07 16:56:29,338 INFO L290 TraceCheckUtils]: 18: Hoare triple {652#(and (<= 6 main_~x~0) (<= main_~x~0 6))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {652#(and (<= 6 main_~x~0) (<= main_~x~0 6))} is VALID [2022-04-07 16:56:29,339 INFO L290 TraceCheckUtils]: 19: Hoare triple {652#(and (<= 6 main_~x~0) (<= main_~x~0 6))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {653#(and (<= main_~x~0 7) (<= 7 main_~x~0))} is VALID [2022-04-07 16:56:29,339 INFO L290 TraceCheckUtils]: 20: Hoare triple {653#(and (<= main_~x~0 7) (<= 7 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {653#(and (<= main_~x~0 7) (<= 7 main_~x~0))} is VALID [2022-04-07 16:56:29,339 INFO L290 TraceCheckUtils]: 21: Hoare triple {653#(and (<= main_~x~0 7) (<= 7 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {654#(and (<= main_~x~0 8) (<= 8 main_~x~0))} is VALID [2022-04-07 16:56:29,340 INFO L290 TraceCheckUtils]: 22: Hoare triple {654#(and (<= main_~x~0 8) (<= 8 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {654#(and (<= main_~x~0 8) (<= 8 main_~x~0))} is VALID [2022-04-07 16:56:29,340 INFO L290 TraceCheckUtils]: 23: Hoare triple {654#(and (<= main_~x~0 8) (<= 8 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {655#(and (<= main_~x~0 9) (<= 9 main_~x~0))} is VALID [2022-04-07 16:56:29,341 INFO L290 TraceCheckUtils]: 24: Hoare triple {655#(and (<= main_~x~0 9) (<= 9 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {655#(and (<= main_~x~0 9) (<= 9 main_~x~0))} is VALID [2022-04-07 16:56:29,341 INFO L290 TraceCheckUtils]: 25: Hoare triple {655#(and (<= main_~x~0 9) (<= 9 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {736#(and (<= main_~x~0 10) (<= 10 main_~x~0))} is VALID [2022-04-07 16:56:29,342 INFO L290 TraceCheckUtils]: 26: Hoare triple {736#(and (<= main_~x~0 10) (<= 10 main_~x~0))} [52] L18-2-->L17-2: Formula: (not (< (mod v_main_~x~0_5 4294967296) 99)) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {642#false} is VALID [2022-04-07 16:56:29,342 INFO L272 TraceCheckUtils]: 27: Hoare triple {642#false} [54] L17-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) (mod v_main_~y~0_5 2)) 1 0)) InVars {main_~x~0=v_main_~x~0_9, main_~y~0=v_main_~y~0_5} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~y~0] {642#false} is VALID [2022-04-07 16:56:29,342 INFO L290 TraceCheckUtils]: 28: Hoare triple {642#false} [58] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {642#false} is VALID [2022-04-07 16:56:29,342 INFO L290 TraceCheckUtils]: 29: Hoare triple {642#false} [59] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {642#false} is VALID [2022-04-07 16:56:29,342 INFO L290 TraceCheckUtils]: 30: Hoare triple {642#false} [61] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {642#false} is VALID [2022-04-07 16:56:29,342 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 16:56:29,342 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 16:56:29,649 INFO L290 TraceCheckUtils]: 30: Hoare triple {642#false} [61] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {642#false} is VALID [2022-04-07 16:56:29,650 INFO L290 TraceCheckUtils]: 29: Hoare triple {642#false} [59] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {642#false} is VALID [2022-04-07 16:56:29,650 INFO L290 TraceCheckUtils]: 28: Hoare triple {642#false} [58] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {642#false} is VALID [2022-04-07 16:56:29,650 INFO L272 TraceCheckUtils]: 27: Hoare triple {642#false} [54] L17-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) (mod v_main_~y~0_5 2)) 1 0)) InVars {main_~x~0=v_main_~x~0_9, main_~y~0=v_main_~y~0_5} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~y~0] {642#false} is VALID [2022-04-07 16:56:29,650 INFO L290 TraceCheckUtils]: 26: Hoare triple {764#(< (mod main_~x~0 4294967296) 99)} [52] L18-2-->L17-2: Formula: (not (< (mod v_main_~x~0_5 4294967296) 99)) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {642#false} is VALID [2022-04-07 16:56:29,651 INFO L290 TraceCheckUtils]: 25: Hoare triple {768#(< (mod (+ main_~x~0 1) 4294967296) 99)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {764#(< (mod main_~x~0 4294967296) 99)} is VALID [2022-04-07 16:56:29,651 INFO L290 TraceCheckUtils]: 24: Hoare triple {768#(< (mod (+ main_~x~0 1) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {768#(< (mod (+ main_~x~0 1) 4294967296) 99)} is VALID [2022-04-07 16:56:29,655 INFO L290 TraceCheckUtils]: 23: Hoare triple {775#(< (mod (+ main_~x~0 2) 4294967296) 99)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {768#(< (mod (+ main_~x~0 1) 4294967296) 99)} is VALID [2022-04-07 16:56:29,656 INFO L290 TraceCheckUtils]: 22: Hoare triple {775#(< (mod (+ main_~x~0 2) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {775#(< (mod (+ main_~x~0 2) 4294967296) 99)} is VALID [2022-04-07 16:56:29,656 INFO L290 TraceCheckUtils]: 21: Hoare triple {782#(< (mod (+ main_~x~0 3) 4294967296) 99)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {775#(< (mod (+ main_~x~0 2) 4294967296) 99)} is VALID [2022-04-07 16:56:29,657 INFO L290 TraceCheckUtils]: 20: Hoare triple {782#(< (mod (+ main_~x~0 3) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {782#(< (mod (+ main_~x~0 3) 4294967296) 99)} is VALID [2022-04-07 16:56:29,657 INFO L290 TraceCheckUtils]: 19: Hoare triple {789#(< (mod (+ main_~x~0 4) 4294967296) 99)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {782#(< (mod (+ main_~x~0 3) 4294967296) 99)} is VALID [2022-04-07 16:56:29,658 INFO L290 TraceCheckUtils]: 18: Hoare triple {789#(< (mod (+ main_~x~0 4) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {789#(< (mod (+ main_~x~0 4) 4294967296) 99)} is VALID [2022-04-07 16:56:29,658 INFO L290 TraceCheckUtils]: 17: Hoare triple {796#(< (mod (+ 5 main_~x~0) 4294967296) 99)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {789#(< (mod (+ main_~x~0 4) 4294967296) 99)} is VALID [2022-04-07 16:56:29,658 INFO L290 TraceCheckUtils]: 16: Hoare triple {796#(< (mod (+ 5 main_~x~0) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {796#(< (mod (+ 5 main_~x~0) 4294967296) 99)} is VALID [2022-04-07 16:56:29,659 INFO L290 TraceCheckUtils]: 15: Hoare triple {803#(< (mod (+ main_~x~0 6) 4294967296) 99)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {796#(< (mod (+ 5 main_~x~0) 4294967296) 99)} is VALID [2022-04-07 16:56:29,659 INFO L290 TraceCheckUtils]: 14: Hoare triple {803#(< (mod (+ main_~x~0 6) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {803#(< (mod (+ main_~x~0 6) 4294967296) 99)} is VALID [2022-04-07 16:56:29,660 INFO L290 TraceCheckUtils]: 13: Hoare triple {810#(< (mod (+ 7 main_~x~0) 4294967296) 99)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {803#(< (mod (+ main_~x~0 6) 4294967296) 99)} is VALID [2022-04-07 16:56:29,660 INFO L290 TraceCheckUtils]: 12: Hoare triple {810#(< (mod (+ 7 main_~x~0) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {810#(< (mod (+ 7 main_~x~0) 4294967296) 99)} is VALID [2022-04-07 16:56:29,661 INFO L290 TraceCheckUtils]: 11: Hoare triple {817#(< (mod (+ main_~x~0 8) 4294967296) 99)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {810#(< (mod (+ 7 main_~x~0) 4294967296) 99)} is VALID [2022-04-07 16:56:29,661 INFO L290 TraceCheckUtils]: 10: Hoare triple {817#(< (mod (+ main_~x~0 8) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {817#(< (mod (+ main_~x~0 8) 4294967296) 99)} is VALID [2022-04-07 16:56:29,662 INFO L290 TraceCheckUtils]: 9: Hoare triple {824#(< (mod (+ main_~x~0 9) 4294967296) 99)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {817#(< (mod (+ main_~x~0 8) 4294967296) 99)} is VALID [2022-04-07 16:56:29,662 INFO L290 TraceCheckUtils]: 8: Hoare triple {824#(< (mod (+ main_~x~0 9) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {824#(< (mod (+ main_~x~0 9) 4294967296) 99)} is VALID [2022-04-07 16:56:29,663 INFO L290 TraceCheckUtils]: 7: Hoare triple {831#(< (mod (+ main_~x~0 10) 4294967296) 99)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {824#(< (mod (+ main_~x~0 9) 4294967296) 99)} is VALID [2022-04-07 16:56:29,663 INFO L290 TraceCheckUtils]: 6: Hoare triple {831#(< (mod (+ main_~x~0 10) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {831#(< (mod (+ main_~x~0 10) 4294967296) 99)} is VALID [2022-04-07 16:56:29,664 INFO L290 TraceCheckUtils]: 5: Hoare triple {641#true} [49] mainENTRY-->L18-2: Formula: (and (= v_main_~y~0_2 |v_main_#t~nondet4_2|) (= v_main_~x~0_3 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~y~0] {831#(< (mod (+ main_~x~0 10) 4294967296) 99)} is VALID [2022-04-07 16:56:29,664 INFO L272 TraceCheckUtils]: 4: Hoare triple {641#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {641#true} is VALID [2022-04-07 16:56:29,664 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {641#true} {641#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {641#true} is VALID [2022-04-07 16:56:29,664 INFO L290 TraceCheckUtils]: 2: Hoare triple {641#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {641#true} is VALID [2022-04-07 16:56:29,664 INFO L290 TraceCheckUtils]: 1: Hoare triple {641#true} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {641#true} is VALID [2022-04-07 16:56:29,664 INFO L272 TraceCheckUtils]: 0: Hoare triple {641#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {641#true} is VALID [2022-04-07 16:56:29,664 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 16:56:29,664 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [820319349] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 16:56:29,664 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 16:56:29,665 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 13, 13] total 26 [2022-04-07 16:56:29,665 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [203968871] [2022-04-07 16:56:29,665 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 16:56:29,665 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 26 states have (on average 2.0) internal successors, (52), 25 states have internal predecessors, (52), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-07 16:56:29,666 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 16:56:29,666 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 26 states, 26 states have (on average 2.0) internal successors, (52), 25 states have internal predecessors, (52), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:56:29,704 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 57 edges. 57 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 16:56:29,704 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 26 states [2022-04-07 16:56:29,705 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 16:56:29,705 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2022-04-07 16:56:29,705 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=192, Invalid=458, Unknown=0, NotChecked=0, Total=650 [2022-04-07 16:56:29,705 INFO L87 Difference]: Start difference. First operand 32 states and 32 transitions. Second operand has 26 states, 26 states have (on average 2.0) internal successors, (52), 25 states have internal predecessors, (52), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:56:33,256 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 16:56:33,256 INFO L93 Difference]: Finished difference Result 58 states and 58 transitions. [2022-04-07 16:56:33,256 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2022-04-07 16:56:33,256 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 26 states have (on average 2.0) internal successors, (52), 25 states have internal predecessors, (52), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-07 16:56:33,257 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 16:56:33,257 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 26 states have (on average 2.0) internal successors, (52), 25 states have internal predecessors, (52), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:56:33,258 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 62 transitions. [2022-04-07 16:56:33,258 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 26 states have (on average 2.0) internal successors, (52), 25 states have internal predecessors, (52), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:56:33,259 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 62 transitions. [2022-04-07 16:56:33,259 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 25 states and 62 transitions. [2022-04-07 16:56:33,327 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 62 edges. 62 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 16:56:33,328 INFO L225 Difference]: With dead ends: 58 [2022-04-07 16:56:33,328 INFO L226 Difference]: Without dead ends: 58 [2022-04-07 16:56:33,329 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 99 GetRequests, 52 SyntacticMatches, 1 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 268 ImplicationChecksByTransitivity, 3.2s TimeCoverageRelationStatistics Valid=643, Invalid=1613, Unknown=0, NotChecked=0, Total=2256 [2022-04-07 16:56:33,329 INFO L913 BasicCegarLoop]: 11 mSDtfsCounter, 50 mSDsluCounter, 67 mSDsCounter, 0 mSdLazyCounter, 341 mSolverCounterSat, 52 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 50 SdHoareTripleChecker+Valid, 78 SdHoareTripleChecker+Invalid, 393 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 52 IncrementalHoareTripleChecker+Valid, 341 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-04-07 16:56:33,329 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [50 Valid, 78 Invalid, 393 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [52 Valid, 341 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-04-07 16:56:33,330 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58 states. [2022-04-07 16:56:33,332 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58 to 56. [2022-04-07 16:56:33,332 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 16:56:33,332 INFO L82 GeneralOperation]: Start isEquivalent. First operand 58 states. Second operand has 56 states, 51 states have (on average 1.0196078431372548) internal successors, (52), 51 states have internal predecessors, (52), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:56:33,332 INFO L74 IsIncluded]: Start isIncluded. First operand 58 states. Second operand has 56 states, 51 states have (on average 1.0196078431372548) internal successors, (52), 51 states have internal predecessors, (52), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:56:33,332 INFO L87 Difference]: Start difference. First operand 58 states. Second operand has 56 states, 51 states have (on average 1.0196078431372548) internal successors, (52), 51 states have internal predecessors, (52), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:56:33,334 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 16:56:33,334 INFO L93 Difference]: Finished difference Result 58 states and 58 transitions. [2022-04-07 16:56:33,334 INFO L276 IsEmpty]: Start isEmpty. Operand 58 states and 58 transitions. [2022-04-07 16:56:33,334 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 16:56:33,334 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 16:56:33,334 INFO L74 IsIncluded]: Start isIncluded. First operand has 56 states, 51 states have (on average 1.0196078431372548) internal successors, (52), 51 states have internal predecessors, (52), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 58 states. [2022-04-07 16:56:33,334 INFO L87 Difference]: Start difference. First operand has 56 states, 51 states have (on average 1.0196078431372548) internal successors, (52), 51 states have internal predecessors, (52), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 58 states. [2022-04-07 16:56:33,336 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 16:56:33,336 INFO L93 Difference]: Finished difference Result 58 states and 58 transitions. [2022-04-07 16:56:33,336 INFO L276 IsEmpty]: Start isEmpty. Operand 58 states and 58 transitions. [2022-04-07 16:56:33,336 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 16:56:33,336 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 16:56:33,336 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 16:56:33,336 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 16:56:33,337 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 56 states, 51 states have (on average 1.0196078431372548) internal successors, (52), 51 states have internal predecessors, (52), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:56:33,338 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56 states to 56 states and 56 transitions. [2022-04-07 16:56:33,338 INFO L78 Accepts]: Start accepts. Automaton has 56 states and 56 transitions. Word has length 31 [2022-04-07 16:56:33,338 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 16:56:33,338 INFO L478 AbstractCegarLoop]: Abstraction has 56 states and 56 transitions. [2022-04-07 16:56:33,338 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 26 states, 26 states have (on average 2.0) internal successors, (52), 25 states have internal predecessors, (52), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:56:33,339 INFO L276 IsEmpty]: Start isEmpty. Operand 56 states and 56 transitions. [2022-04-07 16:56:33,339 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2022-04-07 16:56:33,339 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 16:56:33,340 INFO L499 BasicCegarLoop]: trace histogram [22, 22, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 16:56:33,362 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-04-07 16:56:33,560 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 16:56:33,560 INFO L403 AbstractCegarLoop]: === Iteration 6 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 16:56:33,561 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 16:56:33,561 INFO L85 PathProgramCache]: Analyzing trace with hash 23523812, now seen corresponding path program 3 times [2022-04-07 16:56:33,561 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 16:56:33,561 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1463216102] [2022-04-07 16:56:33,561 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 16:56:33,561 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 16:56:33,611 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 16:56:33,997 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 16:56:33,998 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 16:56:34,008 INFO L290 TraceCheckUtils]: 0: Hoare triple {1157#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1129#true} is VALID [2022-04-07 16:56:34,008 INFO L290 TraceCheckUtils]: 1: Hoare triple {1129#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-07 16:56:34,008 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1129#true} {1129#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-07 16:56:34,009 INFO L272 TraceCheckUtils]: 0: Hoare triple {1129#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1157#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 16:56:34,009 INFO L290 TraceCheckUtils]: 1: Hoare triple {1157#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1129#true} is VALID [2022-04-07 16:56:34,009 INFO L290 TraceCheckUtils]: 2: Hoare triple {1129#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-07 16:56:34,009 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1129#true} {1129#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-07 16:56:34,009 INFO L272 TraceCheckUtils]: 4: Hoare triple {1129#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-07 16:56:34,010 INFO L290 TraceCheckUtils]: 5: Hoare triple {1129#true} [49] mainENTRY-->L18-2: Formula: (and (= v_main_~y~0_2 |v_main_#t~nondet4_2|) (= v_main_~x~0_3 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~y~0] {1134#(= main_~x~0 0)} is VALID [2022-04-07 16:56:34,010 INFO L290 TraceCheckUtils]: 6: Hoare triple {1134#(= main_~x~0 0)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1134#(= main_~x~0 0)} is VALID [2022-04-07 16:56:34,010 INFO L290 TraceCheckUtils]: 7: Hoare triple {1134#(= main_~x~0 0)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1135#(and (<= 1 main_~x~0) (<= main_~x~0 1))} is VALID [2022-04-07 16:56:34,010 INFO L290 TraceCheckUtils]: 8: Hoare triple {1135#(and (<= 1 main_~x~0) (<= main_~x~0 1))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1135#(and (<= 1 main_~x~0) (<= main_~x~0 1))} is VALID [2022-04-07 16:56:34,011 INFO L290 TraceCheckUtils]: 9: Hoare triple {1135#(and (<= 1 main_~x~0) (<= main_~x~0 1))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1136#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-07 16:56:34,011 INFO L290 TraceCheckUtils]: 10: Hoare triple {1136#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1136#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-07 16:56:34,012 INFO L290 TraceCheckUtils]: 11: Hoare triple {1136#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1137#(and (<= main_~x~0 3) (<= 3 main_~x~0))} is VALID [2022-04-07 16:56:34,012 INFO L290 TraceCheckUtils]: 12: Hoare triple {1137#(and (<= main_~x~0 3) (<= 3 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1137#(and (<= main_~x~0 3) (<= 3 main_~x~0))} is VALID [2022-04-07 16:56:34,013 INFO L290 TraceCheckUtils]: 13: Hoare triple {1137#(and (<= main_~x~0 3) (<= 3 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1138#(and (<= main_~x~0 4) (<= 4 main_~x~0))} is VALID [2022-04-07 16:56:34,013 INFO L290 TraceCheckUtils]: 14: Hoare triple {1138#(and (<= main_~x~0 4) (<= 4 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1138#(and (<= main_~x~0 4) (<= 4 main_~x~0))} is VALID [2022-04-07 16:56:34,013 INFO L290 TraceCheckUtils]: 15: Hoare triple {1138#(and (<= main_~x~0 4) (<= 4 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1139#(and (<= 5 main_~x~0) (<= main_~x~0 5))} is VALID [2022-04-07 16:56:34,014 INFO L290 TraceCheckUtils]: 16: Hoare triple {1139#(and (<= 5 main_~x~0) (<= main_~x~0 5))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1139#(and (<= 5 main_~x~0) (<= main_~x~0 5))} is VALID [2022-04-07 16:56:34,014 INFO L290 TraceCheckUtils]: 17: Hoare triple {1139#(and (<= 5 main_~x~0) (<= main_~x~0 5))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1140#(and (<= 6 main_~x~0) (<= main_~x~0 6))} is VALID [2022-04-07 16:56:34,014 INFO L290 TraceCheckUtils]: 18: Hoare triple {1140#(and (<= 6 main_~x~0) (<= main_~x~0 6))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1140#(and (<= 6 main_~x~0) (<= main_~x~0 6))} is VALID [2022-04-07 16:56:34,015 INFO L290 TraceCheckUtils]: 19: Hoare triple {1140#(and (<= 6 main_~x~0) (<= main_~x~0 6))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1141#(and (<= main_~x~0 7) (<= 7 main_~x~0))} is VALID [2022-04-07 16:56:34,015 INFO L290 TraceCheckUtils]: 20: Hoare triple {1141#(and (<= main_~x~0 7) (<= 7 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1141#(and (<= main_~x~0 7) (<= 7 main_~x~0))} is VALID [2022-04-07 16:56:34,016 INFO L290 TraceCheckUtils]: 21: Hoare triple {1141#(and (<= main_~x~0 7) (<= 7 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1142#(and (<= main_~x~0 8) (<= 8 main_~x~0))} is VALID [2022-04-07 16:56:34,016 INFO L290 TraceCheckUtils]: 22: Hoare triple {1142#(and (<= main_~x~0 8) (<= 8 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1142#(and (<= main_~x~0 8) (<= 8 main_~x~0))} is VALID [2022-04-07 16:56:34,016 INFO L290 TraceCheckUtils]: 23: Hoare triple {1142#(and (<= main_~x~0 8) (<= 8 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1143#(and (<= main_~x~0 9) (<= 9 main_~x~0))} is VALID [2022-04-07 16:56:34,017 INFO L290 TraceCheckUtils]: 24: Hoare triple {1143#(and (<= main_~x~0 9) (<= 9 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1143#(and (<= main_~x~0 9) (<= 9 main_~x~0))} is VALID [2022-04-07 16:56:34,017 INFO L290 TraceCheckUtils]: 25: Hoare triple {1143#(and (<= main_~x~0 9) (<= 9 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1144#(and (<= main_~x~0 10) (<= 10 main_~x~0))} is VALID [2022-04-07 16:56:34,017 INFO L290 TraceCheckUtils]: 26: Hoare triple {1144#(and (<= main_~x~0 10) (<= 10 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1144#(and (<= main_~x~0 10) (<= 10 main_~x~0))} is VALID [2022-04-07 16:56:34,018 INFO L290 TraceCheckUtils]: 27: Hoare triple {1144#(and (<= main_~x~0 10) (<= 10 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1145#(and (<= main_~x~0 11) (<= 11 main_~x~0))} is VALID [2022-04-07 16:56:34,018 INFO L290 TraceCheckUtils]: 28: Hoare triple {1145#(and (<= main_~x~0 11) (<= 11 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1145#(and (<= main_~x~0 11) (<= 11 main_~x~0))} is VALID [2022-04-07 16:56:34,018 INFO L290 TraceCheckUtils]: 29: Hoare triple {1145#(and (<= main_~x~0 11) (<= 11 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1146#(and (<= main_~x~0 12) (<= 12 main_~x~0))} is VALID [2022-04-07 16:56:34,019 INFO L290 TraceCheckUtils]: 30: Hoare triple {1146#(and (<= main_~x~0 12) (<= 12 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1146#(and (<= main_~x~0 12) (<= 12 main_~x~0))} is VALID [2022-04-07 16:56:34,019 INFO L290 TraceCheckUtils]: 31: Hoare triple {1146#(and (<= main_~x~0 12) (<= 12 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1147#(and (<= main_~x~0 13) (<= 13 main_~x~0))} is VALID [2022-04-07 16:56:34,019 INFO L290 TraceCheckUtils]: 32: Hoare triple {1147#(and (<= main_~x~0 13) (<= 13 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1147#(and (<= main_~x~0 13) (<= 13 main_~x~0))} is VALID [2022-04-07 16:56:34,020 INFO L290 TraceCheckUtils]: 33: Hoare triple {1147#(and (<= main_~x~0 13) (<= 13 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1148#(and (<= 14 main_~x~0) (<= main_~x~0 14))} is VALID [2022-04-07 16:56:34,020 INFO L290 TraceCheckUtils]: 34: Hoare triple {1148#(and (<= 14 main_~x~0) (<= main_~x~0 14))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1148#(and (<= 14 main_~x~0) (<= main_~x~0 14))} is VALID [2022-04-07 16:56:34,021 INFO L290 TraceCheckUtils]: 35: Hoare triple {1148#(and (<= 14 main_~x~0) (<= main_~x~0 14))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1149#(and (<= 15 main_~x~0) (<= main_~x~0 15))} is VALID [2022-04-07 16:56:34,021 INFO L290 TraceCheckUtils]: 36: Hoare triple {1149#(and (<= 15 main_~x~0) (<= main_~x~0 15))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1149#(and (<= 15 main_~x~0) (<= main_~x~0 15))} is VALID [2022-04-07 16:56:34,021 INFO L290 TraceCheckUtils]: 37: Hoare triple {1149#(and (<= 15 main_~x~0) (<= main_~x~0 15))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1150#(and (<= main_~x~0 16) (<= 16 main_~x~0))} is VALID [2022-04-07 16:56:34,022 INFO L290 TraceCheckUtils]: 38: Hoare triple {1150#(and (<= main_~x~0 16) (<= 16 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1150#(and (<= main_~x~0 16) (<= 16 main_~x~0))} is VALID [2022-04-07 16:56:34,022 INFO L290 TraceCheckUtils]: 39: Hoare triple {1150#(and (<= main_~x~0 16) (<= 16 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1151#(and (<= 17 main_~x~0) (<= main_~x~0 17))} is VALID [2022-04-07 16:56:34,022 INFO L290 TraceCheckUtils]: 40: Hoare triple {1151#(and (<= 17 main_~x~0) (<= main_~x~0 17))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1151#(and (<= 17 main_~x~0) (<= main_~x~0 17))} is VALID [2022-04-07 16:56:34,023 INFO L290 TraceCheckUtils]: 41: Hoare triple {1151#(and (<= 17 main_~x~0) (<= main_~x~0 17))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1152#(and (<= main_~x~0 18) (<= 18 main_~x~0))} is VALID [2022-04-07 16:56:34,023 INFO L290 TraceCheckUtils]: 42: Hoare triple {1152#(and (<= main_~x~0 18) (<= 18 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1152#(and (<= main_~x~0 18) (<= 18 main_~x~0))} is VALID [2022-04-07 16:56:34,024 INFO L290 TraceCheckUtils]: 43: Hoare triple {1152#(and (<= main_~x~0 18) (<= 18 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1153#(and (<= 19 main_~x~0) (<= main_~x~0 19))} is VALID [2022-04-07 16:56:34,024 INFO L290 TraceCheckUtils]: 44: Hoare triple {1153#(and (<= 19 main_~x~0) (<= main_~x~0 19))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1153#(and (<= 19 main_~x~0) (<= main_~x~0 19))} is VALID [2022-04-07 16:56:34,024 INFO L290 TraceCheckUtils]: 45: Hoare triple {1153#(and (<= 19 main_~x~0) (<= main_~x~0 19))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1154#(and (<= main_~x~0 20) (<= 20 main_~x~0))} is VALID [2022-04-07 16:56:34,025 INFO L290 TraceCheckUtils]: 46: Hoare triple {1154#(and (<= main_~x~0 20) (<= 20 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1154#(and (<= main_~x~0 20) (<= 20 main_~x~0))} is VALID [2022-04-07 16:56:34,025 INFO L290 TraceCheckUtils]: 47: Hoare triple {1154#(and (<= main_~x~0 20) (<= 20 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1155#(and (<= 21 main_~x~0) (<= main_~x~0 21))} is VALID [2022-04-07 16:56:34,025 INFO L290 TraceCheckUtils]: 48: Hoare triple {1155#(and (<= 21 main_~x~0) (<= main_~x~0 21))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1155#(and (<= 21 main_~x~0) (<= main_~x~0 21))} is VALID [2022-04-07 16:56:34,026 INFO L290 TraceCheckUtils]: 49: Hoare triple {1155#(and (<= 21 main_~x~0) (<= main_~x~0 21))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1156#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 22))} is VALID [2022-04-07 16:56:34,026 INFO L290 TraceCheckUtils]: 50: Hoare triple {1156#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 22))} [52] L18-2-->L17-2: Formula: (not (< (mod v_main_~x~0_5 4294967296) 99)) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1130#false} is VALID [2022-04-07 16:56:34,026 INFO L272 TraceCheckUtils]: 51: Hoare triple {1130#false} [54] L17-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) (mod v_main_~y~0_5 2)) 1 0)) InVars {main_~x~0=v_main_~x~0_9, main_~y~0=v_main_~y~0_5} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~y~0] {1130#false} is VALID [2022-04-07 16:56:34,026 INFO L290 TraceCheckUtils]: 52: Hoare triple {1130#false} [58] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1130#false} is VALID [2022-04-07 16:56:34,027 INFO L290 TraceCheckUtils]: 53: Hoare triple {1130#false} [59] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1130#false} is VALID [2022-04-07 16:56:34,027 INFO L290 TraceCheckUtils]: 54: Hoare triple {1130#false} [61] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1130#false} is VALID [2022-04-07 16:56:34,027 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 16:56:34,027 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 16:56:34,027 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1463216102] [2022-04-07 16:56:34,027 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1463216102] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 16:56:34,027 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [941447627] [2022-04-07 16:56:34,027 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-07 16:56:34,028 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 16:56:34,028 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 16:56:34,028 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 16:56:34,029 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-04-07 16:56:34,075 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2022-04-07 16:56:34,075 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 16:56:34,075 INFO L263 TraceCheckSpWp]: Trace formula consists of 61 conjuncts, 8 conjunts are in the unsatisfiable core [2022-04-07 16:56:34,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 16:56:34,086 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 16:56:34,951 INFO L272 TraceCheckUtils]: 0: Hoare triple {1129#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-07 16:56:34,951 INFO L290 TraceCheckUtils]: 1: Hoare triple {1129#true} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1129#true} is VALID [2022-04-07 16:56:34,951 INFO L290 TraceCheckUtils]: 2: Hoare triple {1129#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-07 16:56:34,951 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1129#true} {1129#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-07 16:56:34,951 INFO L272 TraceCheckUtils]: 4: Hoare triple {1129#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-07 16:56:34,951 INFO L290 TraceCheckUtils]: 5: Hoare triple {1129#true} [49] mainENTRY-->L18-2: Formula: (and (= v_main_~y~0_2 |v_main_#t~nondet4_2|) (= v_main_~x~0_3 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~y~0] {1129#true} is VALID [2022-04-07 16:56:34,952 INFO L290 TraceCheckUtils]: 6: Hoare triple {1129#true} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-07 16:56:34,952 INFO L290 TraceCheckUtils]: 7: Hoare triple {1129#true} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1129#true} is VALID [2022-04-07 16:56:34,952 INFO L290 TraceCheckUtils]: 8: Hoare triple {1129#true} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-07 16:56:34,952 INFO L290 TraceCheckUtils]: 9: Hoare triple {1129#true} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1129#true} is VALID [2022-04-07 16:56:34,952 INFO L290 TraceCheckUtils]: 10: Hoare triple {1129#true} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-07 16:56:34,952 INFO L290 TraceCheckUtils]: 11: Hoare triple {1129#true} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1129#true} is VALID [2022-04-07 16:56:34,952 INFO L290 TraceCheckUtils]: 12: Hoare triple {1129#true} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-07 16:56:34,952 INFO L290 TraceCheckUtils]: 13: Hoare triple {1129#true} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1129#true} is VALID [2022-04-07 16:56:34,952 INFO L290 TraceCheckUtils]: 14: Hoare triple {1129#true} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-07 16:56:34,952 INFO L290 TraceCheckUtils]: 15: Hoare triple {1129#true} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1129#true} is VALID [2022-04-07 16:56:34,952 INFO L290 TraceCheckUtils]: 16: Hoare triple {1129#true} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-07 16:56:34,952 INFO L290 TraceCheckUtils]: 17: Hoare triple {1129#true} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1129#true} is VALID [2022-04-07 16:56:34,952 INFO L290 TraceCheckUtils]: 18: Hoare triple {1129#true} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-07 16:56:34,953 INFO L290 TraceCheckUtils]: 19: Hoare triple {1129#true} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1129#true} is VALID [2022-04-07 16:56:34,953 INFO L290 TraceCheckUtils]: 20: Hoare triple {1129#true} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-07 16:56:34,953 INFO L290 TraceCheckUtils]: 21: Hoare triple {1129#true} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1129#true} is VALID [2022-04-07 16:56:34,953 INFO L290 TraceCheckUtils]: 22: Hoare triple {1129#true} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-07 16:56:34,953 INFO L290 TraceCheckUtils]: 23: Hoare triple {1129#true} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1129#true} is VALID [2022-04-07 16:56:34,953 INFO L290 TraceCheckUtils]: 24: Hoare triple {1129#true} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-07 16:56:34,953 INFO L290 TraceCheckUtils]: 25: Hoare triple {1129#true} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1129#true} is VALID [2022-04-07 16:56:34,953 INFO L290 TraceCheckUtils]: 26: Hoare triple {1129#true} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-07 16:56:34,953 INFO L290 TraceCheckUtils]: 27: Hoare triple {1129#true} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1129#true} is VALID [2022-04-07 16:56:34,953 INFO L290 TraceCheckUtils]: 28: Hoare triple {1129#true} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-07 16:56:34,953 INFO L290 TraceCheckUtils]: 29: Hoare triple {1129#true} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1129#true} is VALID [2022-04-07 16:56:34,953 INFO L290 TraceCheckUtils]: 30: Hoare triple {1129#true} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-07 16:56:34,953 INFO L290 TraceCheckUtils]: 31: Hoare triple {1129#true} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1129#true} is VALID [2022-04-07 16:56:34,954 INFO L290 TraceCheckUtils]: 32: Hoare triple {1129#true} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-07 16:56:34,954 INFO L290 TraceCheckUtils]: 33: Hoare triple {1129#true} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1129#true} is VALID [2022-04-07 16:56:34,954 INFO L290 TraceCheckUtils]: 34: Hoare triple {1129#true} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-07 16:56:34,954 INFO L290 TraceCheckUtils]: 35: Hoare triple {1129#true} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1129#true} is VALID [2022-04-07 16:56:34,954 INFO L290 TraceCheckUtils]: 36: Hoare triple {1129#true} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-07 16:56:34,954 INFO L290 TraceCheckUtils]: 37: Hoare triple {1129#true} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1129#true} is VALID [2022-04-07 16:56:34,954 INFO L290 TraceCheckUtils]: 38: Hoare triple {1129#true} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-07 16:56:34,954 INFO L290 TraceCheckUtils]: 39: Hoare triple {1129#true} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1129#true} is VALID [2022-04-07 16:56:34,954 INFO L290 TraceCheckUtils]: 40: Hoare triple {1129#true} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-07 16:56:34,954 INFO L290 TraceCheckUtils]: 41: Hoare triple {1129#true} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1129#true} is VALID [2022-04-07 16:56:34,954 INFO L290 TraceCheckUtils]: 42: Hoare triple {1129#true} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-07 16:56:34,954 INFO L290 TraceCheckUtils]: 43: Hoare triple {1129#true} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1129#true} is VALID [2022-04-07 16:56:34,954 INFO L290 TraceCheckUtils]: 44: Hoare triple {1129#true} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-07 16:56:34,954 INFO L290 TraceCheckUtils]: 45: Hoare triple {1129#true} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1129#true} is VALID [2022-04-07 16:56:34,955 INFO L290 TraceCheckUtils]: 46: Hoare triple {1129#true} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-07 16:56:34,955 INFO L290 TraceCheckUtils]: 47: Hoare triple {1129#true} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1129#true} is VALID [2022-04-07 16:56:34,961 INFO L290 TraceCheckUtils]: 48: Hoare triple {1129#true} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1305#(< (mod main_~x~0 4294967296) 99)} is VALID [2022-04-07 16:56:34,969 INFO L290 TraceCheckUtils]: 49: Hoare triple {1305#(< (mod main_~x~0 4294967296) 99)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1309#(and (not (= (mod main_~y~0 2) 0)) (< (mod (+ main_~x~0 4294967295) 4294967296) 99))} is VALID [2022-04-07 16:56:34,970 INFO L290 TraceCheckUtils]: 50: Hoare triple {1309#(and (not (= (mod main_~y~0 2) 0)) (< (mod (+ main_~x~0 4294967295) 4294967296) 99))} [52] L18-2-->L17-2: Formula: (not (< (mod v_main_~x~0_5 4294967296) 99)) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1313#(and (not (= (mod main_~y~0 2) 0)) (< (mod (+ main_~x~0 4294967295) 4294967296) 99) (not (< (mod main_~x~0 4294967296) 99)))} is VALID [2022-04-07 16:56:35,010 INFO L272 TraceCheckUtils]: 51: Hoare triple {1313#(and (not (= (mod main_~y~0 2) 0)) (< (mod (+ main_~x~0 4294967295) 4294967296) 99) (not (< (mod main_~x~0 4294967296) 99)))} [54] L17-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) (mod v_main_~y~0_5 2)) 1 0)) InVars {main_~x~0=v_main_~x~0_9, main_~y~0=v_main_~y~0_5} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~y~0] {1317#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 16:56:35,013 INFO L290 TraceCheckUtils]: 52: Hoare triple {1317#(<= 1 |__VERIFIER_assert_#in~cond|)} [58] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1321#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 16:56:35,013 INFO L290 TraceCheckUtils]: 53: Hoare triple {1321#(<= 1 __VERIFIER_assert_~cond)} [59] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1130#false} is VALID [2022-04-07 16:56:35,013 INFO L290 TraceCheckUtils]: 54: Hoare triple {1130#false} [61] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1130#false} is VALID [2022-04-07 16:56:35,013 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 43 proven. 0 refuted. 0 times theorem prover too weak. 441 trivial. 0 not checked. [2022-04-07 16:56:35,013 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-07 16:56:35,014 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [941447627] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 16:56:35,014 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-07 16:56:35,014 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [26] total 31 [2022-04-07 16:56:35,014 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [512488244] [2022-04-07 16:56:35,014 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 16:56:35,014 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 6 states have (on average 1.8333333333333333) internal successors, (11), 6 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 55 [2022-04-07 16:56:35,015 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 16:56:35,015 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 7 states, 6 states have (on average 1.8333333333333333) internal successors, (11), 6 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:56:35,026 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 15 edges. 15 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 16:56:35,026 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-04-07 16:56:35,026 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 16:56:35,026 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-04-07 16:56:35,027 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=105, Invalid=825, Unknown=0, NotChecked=0, Total=930 [2022-04-07 16:56:35,027 INFO L87 Difference]: Start difference. First operand 56 states and 56 transitions. Second operand has 7 states, 6 states have (on average 1.8333333333333333) internal successors, (11), 6 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:56:35,135 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 16:56:35,135 INFO L93 Difference]: Finished difference Result 54 states and 54 transitions. [2022-04-07 16:56:35,135 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-04-07 16:56:35,135 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 6 states have (on average 1.8333333333333333) internal successors, (11), 6 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 55 [2022-04-07 16:56:35,136 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 16:56:35,136 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 6 states have (on average 1.8333333333333333) internal successors, (11), 6 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:56:35,136 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 14 transitions. [2022-04-07 16:56:35,136 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 6 states have (on average 1.8333333333333333) internal successors, (11), 6 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:56:35,137 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 14 transitions. [2022-04-07 16:56:35,137 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 8 states and 14 transitions. [2022-04-07 16:56:35,152 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 14 edges. 14 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 16:56:35,152 INFO L225 Difference]: With dead ends: 54 [2022-04-07 16:56:35,152 INFO L226 Difference]: Without dead ends: 0 [2022-04-07 16:56:35,152 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 84 GetRequests, 53 SyntacticMatches, 0 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=113, Invalid=943, Unknown=0, NotChecked=0, Total=1056 [2022-04-07 16:56:35,153 INFO L913 BasicCegarLoop]: 7 mSDtfsCounter, 3 mSDsluCounter, 22 mSDsCounter, 0 mSdLazyCounter, 29 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3 SdHoareTripleChecker+Valid, 29 SdHoareTripleChecker+Invalid, 30 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 29 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 16:56:35,153 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [3 Valid, 29 Invalid, 30 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 29 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 16:56:35,153 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 0 states. [2022-04-07 16:56:35,153 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 0 to 0. [2022-04-07 16:56:35,153 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 16:56:35,154 INFO L82 GeneralOperation]: Start isEquivalent. First operand 0 states. Second operand has 0 states, 0 states have (on average 0.0) internal successors, (0), 0 states have internal predecessors, (0), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-04-07 16:56:35,154 INFO L74 IsIncluded]: Start isIncluded. First operand 0 states. Second operand has 0 states, 0 states have (on average 0.0) internal successors, (0), 0 states have internal predecessors, (0), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-04-07 16:56:35,154 INFO L87 Difference]: Start difference. First operand 0 states. Second operand has 0 states, 0 states have (on average 0.0) internal successors, (0), 0 states have internal predecessors, (0), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-04-07 16:56:35,154 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 16:56:35,154 INFO L93 Difference]: Finished difference Result 0 states and 0 transitions. [2022-04-07 16:56:35,154 INFO L276 IsEmpty]: Start isEmpty. Operand 0 states and 0 transitions. [2022-04-07 16:56:35,154 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 16:56:35,154 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 16:56:35,154 INFO L74 IsIncluded]: Start isIncluded. First operand has 0 states, 0 states have (on average 0.0) internal successors, (0), 0 states have internal predecessors, (0), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand 0 states. [2022-04-07 16:56:35,154 INFO L87 Difference]: Start difference. First operand has 0 states, 0 states have (on average 0.0) internal successors, (0), 0 states have internal predecessors, (0), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand 0 states. [2022-04-07 16:56:35,154 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 16:56:35,154 INFO L93 Difference]: Finished difference Result 0 states and 0 transitions. [2022-04-07 16:56:35,154 INFO L276 IsEmpty]: Start isEmpty. Operand 0 states and 0 transitions. [2022-04-07 16:56:35,154 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 16:56:35,154 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 16:56:35,154 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 16:56:35,154 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 16:56:35,154 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 0 states, 0 states have (on average 0.0) internal successors, (0), 0 states have internal predecessors, (0), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-04-07 16:56:35,154 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 0 states to 0 states and 0 transitions. [2022-04-07 16:56:35,154 INFO L78 Accepts]: Start accepts. Automaton has 0 states and 0 transitions. Word has length 55 [2022-04-07 16:56:35,155 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 16:56:35,155 INFO L478 AbstractCegarLoop]: Abstraction has 0 states and 0 transitions. [2022-04-07 16:56:35,155 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 6 states have (on average 1.8333333333333333) internal successors, (11), 6 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:56:35,155 INFO L276 IsEmpty]: Start isEmpty. Operand 0 states and 0 transitions. [2022-04-07 16:56:35,155 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 16:56:35,157 INFO L788 garLoopResultBuilder]: Registering result SAFE for location __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2022-04-07 16:56:35,173 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2022-04-07 16:56:35,367 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5,5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 16:56:35,370 INFO L719 BasicCegarLoop]: Path program histogram: [3, 1, 1, 1] [2022-04-07 16:56:35,371 INFO L178 ceAbstractionStarter]: Computing trace abstraction results [2022-04-07 16:56:35,372 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.04 04:56:35 BasicIcfg [2022-04-07 16:56:35,372 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2022-04-07 16:56:35,373 INFO L158 Benchmark]: Toolchain (without parser) took 10247.68ms. Allocated memory was 194.0MB in the beginning and 278.9MB in the end (delta: 84.9MB). Free memory was 138.7MB in the beginning and 133.5MB in the end (delta: 5.2MB). Peak memory consumption was 91.4MB. Max. memory is 8.0GB. [2022-04-07 16:56:35,373 INFO L158 Benchmark]: CDTParser took 0.11ms. Allocated memory is still 194.0MB. Free memory is still 154.8MB. There was no memory consumed. Max. memory is 8.0GB. [2022-04-07 16:56:35,373 INFO L158 Benchmark]: CACSL2BoogieTranslator took 178.26ms. Allocated memory was 194.0MB in the beginning and 278.9MB in the end (delta: 84.9MB). Free memory was 138.6MB in the beginning and 250.8MB in the end (delta: -112.2MB). Peak memory consumption was 7.0MB. Max. memory is 8.0GB. [2022-04-07 16:56:35,373 INFO L158 Benchmark]: Boogie Preprocessor took 23.52ms. Allocated memory is still 278.9MB. Free memory was 250.8MB in the beginning and 249.0MB in the end (delta: 1.8MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. [2022-04-07 16:56:35,373 INFO L158 Benchmark]: RCFGBuilder took 202.90ms. Allocated memory is still 278.9MB. Free memory was 249.0MB in the beginning and 236.9MB in the end (delta: 12.1MB). Peak memory consumption was 11.5MB. Max. memory is 8.0GB. [2022-04-07 16:56:35,374 INFO L158 Benchmark]: IcfgTransformer took 24.51ms. Allocated memory is still 278.9MB. Free memory was 236.9MB in the beginning and 235.9MB in the end (delta: 1.0MB). Peak memory consumption was 1.0MB. Max. memory is 8.0GB. [2022-04-07 16:56:35,374 INFO L158 Benchmark]: TraceAbstraction took 9802.11ms. Allocated memory is still 278.9MB. Free memory was 235.3MB in the beginning and 133.5MB in the end (delta: 101.9MB). Peak memory consumption was 102.9MB. Max. memory is 8.0GB. [2022-04-07 16:56:35,374 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - AssertionsEnabledResult: Assertions are enabled Assertions are enabled - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.11ms. Allocated memory is still 194.0MB. Free memory is still 154.8MB. There was no memory consumed. Max. memory is 8.0GB. * CACSL2BoogieTranslator took 178.26ms. Allocated memory was 194.0MB in the beginning and 278.9MB in the end (delta: 84.9MB). Free memory was 138.6MB in the beginning and 250.8MB in the end (delta: -112.2MB). Peak memory consumption was 7.0MB. Max. memory is 8.0GB. * Boogie Preprocessor took 23.52ms. Allocated memory is still 278.9MB. Free memory was 250.8MB in the beginning and 249.0MB in the end (delta: 1.8MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. * RCFGBuilder took 202.90ms. Allocated memory is still 278.9MB. Free memory was 249.0MB in the beginning and 236.9MB in the end (delta: 12.1MB). Peak memory consumption was 11.5MB. Max. memory is 8.0GB. * IcfgTransformer took 24.51ms. Allocated memory is still 278.9MB. Free memory was 236.9MB in the beginning and 235.9MB in the end (delta: 1.0MB). Peak memory consumption was 1.0MB. Max. memory is 8.0GB. * TraceAbstraction took 9802.11ms. Allocated memory is still 278.9MB. Free memory was 235.3MB in the beginning and 133.5MB in the end (delta: 101.9MB). Peak memory consumption was 102.9MB. Max. memory is 8.0GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - PositiveResult [Line: 8]: call to reach_error is unreachable For all program executions holds that call to reach_error is unreachable at this location - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 19 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 9.8s, OverallIterations: 6, TraceHistogramMax: 22, PathProgramHistogramMax: 3, EmptinessCheckTime: 0.0s, AutomataDifference: 4.8s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, PartialOrderReductionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 128 SdHoareTripleChecker+Valid, 0.6s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 127 mSDsluCounter, 221 SdHoareTripleChecker+Invalid, 0.6s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 153 mSDsCounter, 119 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 537 IncrementalHoareTripleChecker+Invalid, 656 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 119 mSolverCounterUnsat, 68 mSDtfsCounter, 537 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 292 GetRequests, 169 SyntacticMatches, 3 SemanticMatches, 120 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 396 ImplicationChecksByTransitivity, 4.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=56occurred in iteration=5, InterpolantAutomatonStates: 65, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 6 MinimizatonAttempts, 6 StatesRemovedByMinimization, 4 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 3.5s InterpolantComputationTime, 258 NumberOfCodeBlocks, 218 NumberOfCodeBlocksAsserted, 13 NumberOfCheckSat, 308 ConstructedInterpolants, 0 QuantifiedInterpolants, 1230 SizeOfPredicates, 5 NumberOfNonLiveVariables, 281 ConjunctsInSsa, 50 ConjunctsInUnsatCore, 13 InterpolantComputations, 3 PerfectInterpolantSequences, 484/1319 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available - AllSpecificationsHoldResult: All specifications hold 1 specifications checked. All of them hold RESULT: Ultimate proved your program to be correct! [2022-04-07 16:56:35,399 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request...