/usr/bin/java -ea -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --core.log.level.for.class de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN -tc ../../../trunk/examples/toolchains/AutomizerCTransformed.xml -s ../../../trunk/examples/settings/automizer/LoopAccelerationJordanC.epf -i ../../../trunk/examples/svcomp/nla-digbench-scaling/divbin2_unwindbound10.i -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-34549b5 [2022-04-07 18:33:54,768 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-04-07 18:33:54,769 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-04-07 18:33:54,801 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-04-07 18:33:54,802 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-04-07 18:33:54,803 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-04-07 18:33:54,805 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-04-07 18:33:54,806 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-04-07 18:33:54,808 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-04-07 18:33:54,811 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-04-07 18:33:54,812 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-04-07 18:33:54,812 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-04-07 18:33:54,813 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-04-07 18:33:54,814 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-04-07 18:33:54,815 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-04-07 18:33:54,817 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-04-07 18:33:54,817 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-04-07 18:33:54,818 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-04-07 18:33:54,819 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-04-07 18:33:54,823 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-04-07 18:33:54,824 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-04-07 18:33:54,825 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-04-07 18:33:54,825 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-04-07 18:33:54,826 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-04-07 18:33:54,827 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-04-07 18:33:54,831 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2022-04-07 18:33:54,837 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-04-07 18:33:54,837 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-04-07 18:33:54,838 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-04-07 18:33:54,839 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/automizer/LoopAccelerationJordanC.epf [2022-04-07 18:33:54,847 INFO L113 SettingsManager]: Loading preferences was successful [2022-04-07 18:33:54,847 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-04-07 18:33:54,848 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-04-07 18:33:54,848 INFO L138 SettingsManager]: * sizeof long=4 [2022-04-07 18:33:54,848 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-04-07 18:33:54,848 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-04-07 18:33:54,848 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-04-07 18:33:54,849 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-04-07 18:33:54,849 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-04-07 18:33:54,849 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-04-07 18:33:54,849 INFO L138 SettingsManager]: * sizeof long double=12 [2022-04-07 18:33:54,850 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-04-07 18:33:54,850 INFO L138 SettingsManager]: * Use constant arrays=true [2022-04-07 18:33:54,850 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-04-07 18:33:54,850 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-04-07 18:33:54,850 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-04-07 18:33:54,850 INFO L138 SettingsManager]: * To the following directory=./dump/ [2022-04-07 18:33:54,850 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-04-07 18:33:54,850 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-07 18:33:54,850 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-04-07 18:33:54,851 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-04-07 18:33:54,851 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-04-07 18:33:54,851 INFO L138 SettingsManager]: * TransformationType=LOOP_ACCELERATION_JORDAN WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.core: Log level for class -> de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN; [2022-04-07 18:33:55,033 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-04-07 18:33:55,049 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-04-07 18:33:55,050 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-04-07 18:33:55,051 INFO L271 PluginConnector]: Initializing CDTParser... [2022-04-07 18:33:55,051 INFO L275 PluginConnector]: CDTParser initialized [2022-04-07 18:33:55,052 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/nla-digbench-scaling/divbin2_unwindbound10.i [2022-04-07 18:33:55,091 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/54f5fde40/b471a26f5f3549558632a3f93271d025/FLAG318908a46 [2022-04-07 18:33:55,448 INFO L306 CDTParser]: Found 1 translation units. [2022-04-07 18:33:55,448 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/nla-digbench-scaling/divbin2_unwindbound10.i [2022-04-07 18:33:55,452 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/54f5fde40/b471a26f5f3549558632a3f93271d025/FLAG318908a46 [2022-04-07 18:33:55,463 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/54f5fde40/b471a26f5f3549558632a3f93271d025 [2022-04-07 18:33:55,465 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-04-07 18:33:55,466 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2022-04-07 18:33:55,468 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-04-07 18:33:55,468 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-04-07 18:33:55,470 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-04-07 18:33:55,471 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.04 06:33:55" (1/1) ... [2022-04-07 18:33:55,472 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@388803d3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 06:33:55, skipping insertion in model container [2022-04-07 18:33:55,472 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.04 06:33:55" (1/1) ... [2022-04-07 18:33:55,496 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-04-07 18:33:55,505 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-04-07 18:33:55,628 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/nla-digbench-scaling/divbin2_unwindbound10.i[951,964] [2022-04-07 18:33:55,648 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-07 18:33:55,654 INFO L203 MainTranslator]: Completed pre-run [2022-04-07 18:33:55,666 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/nla-digbench-scaling/divbin2_unwindbound10.i[951,964] [2022-04-07 18:33:55,680 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-07 18:33:55,687 INFO L208 MainTranslator]: Completed translation [2022-04-07 18:33:55,688 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 06:33:55 WrapperNode [2022-04-07 18:33:55,688 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-04-07 18:33:55,688 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-04-07 18:33:55,688 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-04-07 18:33:55,689 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-04-07 18:33:55,695 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 06:33:55" (1/1) ... [2022-04-07 18:33:55,696 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 06:33:55" (1/1) ... [2022-04-07 18:33:55,700 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 06:33:55" (1/1) ... [2022-04-07 18:33:55,700 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 06:33:55" (1/1) ... [2022-04-07 18:33:55,711 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 06:33:55" (1/1) ... [2022-04-07 18:33:55,715 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 06:33:55" (1/1) ... [2022-04-07 18:33:55,719 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 06:33:55" (1/1) ... [2022-04-07 18:33:55,721 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-04-07 18:33:55,722 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-04-07 18:33:55,722 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-04-07 18:33:55,722 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-04-07 18:33:55,722 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 06:33:55" (1/1) ... [2022-04-07 18:33:55,727 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-07 18:33:55,733 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 18:33:55,748 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-04-07 18:33:55,766 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-04-07 18:33:55,781 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2022-04-07 18:33:55,781 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-04-07 18:33:55,781 INFO L138 BoogieDeclarations]: Found implementation of procedure reach_error [2022-04-07 18:33:55,781 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2022-04-07 18:33:55,782 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2022-04-07 18:33:55,782 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2022-04-07 18:33:55,782 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2022-04-07 18:33:55,782 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_fail [2022-04-07 18:33:55,782 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_perror_fail [2022-04-07 18:33:55,782 INFO L130 BoogieDeclarations]: Found specification of procedure __assert [2022-04-07 18:33:55,782 INFO L130 BoogieDeclarations]: Found specification of procedure reach_error [2022-04-07 18:33:55,783 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-04-07 18:33:55,783 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_uint [2022-04-07 18:33:55,783 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2022-04-07 18:33:55,783 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2022-04-07 18:33:55,784 INFO L130 BoogieDeclarations]: Found specification of procedure main [2022-04-07 18:33:55,784 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2022-04-07 18:33:55,784 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-04-07 18:33:55,784 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-04-07 18:33:55,784 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-04-07 18:33:55,784 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-04-07 18:33:55,785 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-04-07 18:33:55,827 INFO L234 CfgBuilder]: Building ICFG [2022-04-07 18:33:55,828 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-04-07 18:33:55,927 INFO L275 CfgBuilder]: Performing block encoding [2022-04-07 18:33:55,931 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-04-07 18:33:55,931 INFO L299 CfgBuilder]: Removed 2 assume(true) statements. [2022-04-07 18:33:55,932 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.04 06:33:55 BoogieIcfgContainer [2022-04-07 18:33:55,932 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-04-07 18:33:55,932 INFO L113 PluginConnector]: ------------------------IcfgTransformer---------------------------- [2022-04-07 18:33:55,933 INFO L271 PluginConnector]: Initializing IcfgTransformer... [2022-04-07 18:33:55,941 INFO L275 PluginConnector]: IcfgTransformer initialized [2022-04-07 18:33:55,946 INFO L185 PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.04 06:33:55" (1/1) ... [2022-04-07 18:33:55,948 INFO L168 ansformationObserver]: Applying ICFG transformation LOOP_ACCELERATION_JORDAN [2022-04-07 18:33:55,982 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 07.04 06:33:55 BasicIcfg [2022-04-07 18:33:55,982 INFO L132 PluginConnector]: ------------------------ END IcfgTransformer---------------------------- [2022-04-07 18:33:55,983 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-04-07 18:33:55,983 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-04-07 18:33:55,985 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-04-07 18:33:55,985 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.04 06:33:55" (1/4) ... [2022-04-07 18:33:55,985 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@107a32ac and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.04 06:33:55, skipping insertion in model container [2022-04-07 18:33:55,985 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 06:33:55" (2/4) ... [2022-04-07 18:33:55,986 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@107a32ac and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.04 06:33:55, skipping insertion in model container [2022-04-07 18:33:55,986 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.04 06:33:55" (3/4) ... [2022-04-07 18:33:55,986 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@107a32ac and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.04 06:33:55, skipping insertion in model container [2022-04-07 18:33:55,986 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 07.04 06:33:55" (4/4) ... [2022-04-07 18:33:55,986 INFO L111 eAbstractionObserver]: Analyzing ICFG divbin2_unwindbound10.iJordan [2022-04-07 18:33:55,989 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:ForwardPredicates Determinization: PREDICATE_ABSTRACTION [2022-04-07 18:33:55,989 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-04-07 18:33:56,013 INFO L339 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-04-07 18:33:56,017 INFO L340 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=ForwardPredicates, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=false, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=All, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP [2022-04-07 18:33:56,018 INFO L341 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-04-07 18:33:56,027 INFO L276 IsEmpty]: Start isEmpty. Operand has 26 states, 17 states have (on average 1.5294117647058822) internal successors, (26), 18 states have internal predecessors, (26), 4 states have call successors, (4), 3 states have call predecessors, (4), 3 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-07 18:33:56,031 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2022-04-07 18:33:56,031 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 18:33:56,032 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 18:33:56,032 INFO L403 AbstractCegarLoop]: === Iteration 1 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 18:33:56,035 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 18:33:56,035 INFO L85 PathProgramCache]: Analyzing trace with hash 2097950667, now seen corresponding path program 1 times [2022-04-07 18:33:56,041 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 18:33:56,042 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1188346102] [2022-04-07 18:33:56,042 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 18:33:56,043 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 18:33:56,100 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 18:33:56,151 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 18:33:56,155 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 18:33:56,164 INFO L290 TraceCheckUtils]: 0: Hoare triple {34#(and (= ~counter~0 |old(~counter~0)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [87] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0) (= v_~counter~0_5 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{~counter~0=v_~counter~0_5, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[~counter~0, #NULL.offset, #NULL.base] {29#true} is VALID [2022-04-07 18:33:56,165 INFO L290 TraceCheckUtils]: 1: Hoare triple {29#true} [90] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {29#true} is VALID [2022-04-07 18:33:56,165 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {29#true} {29#true} [115] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {29#true} is VALID [2022-04-07 18:33:56,168 INFO L272 TraceCheckUtils]: 0: Hoare triple {29#true} [85] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {34#(and (= ~counter~0 |old(~counter~0)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 18:33:56,168 INFO L290 TraceCheckUtils]: 1: Hoare triple {34#(and (= ~counter~0 |old(~counter~0)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [87] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0) (= v_~counter~0_5 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{~counter~0=v_~counter~0_5, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[~counter~0, #NULL.offset, #NULL.base] {29#true} is VALID [2022-04-07 18:33:56,169 INFO L290 TraceCheckUtils]: 2: Hoare triple {29#true} [90] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {29#true} is VALID [2022-04-07 18:33:56,169 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {29#true} {29#true} [115] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {29#true} is VALID [2022-04-07 18:33:56,169 INFO L272 TraceCheckUtils]: 4: Hoare triple {29#true} [86] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {29#true} is VALID [2022-04-07 18:33:56,170 INFO L290 TraceCheckUtils]: 5: Hoare triple {29#true} [89] mainENTRY-->L34-3: Formula: (and (= v_main_~B~0_2 1) (= v_main_~B~0_2 v_main_~b~0_3) (= v_main_~q~0_2 0) (= v_main_~A~0_2 |v_main_#t~nondet1_2|) (= v_main_~A~0_2 v_main_~r~0_2)) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~q~0=v_main_~q~0_2, main_~B~0=v_main_~B~0_2, main_~b~0=v_main_~b~0_3, main_~A~0=v_main_~A~0_2, main_~r~0=v_main_~r~0_2} AuxVars[] AssignedVars[main_~q~0, main_#t~nondet1, main_~B~0, main_~b~0, main_~A~0, main_~r~0] {29#true} is VALID [2022-04-07 18:33:56,172 INFO L290 TraceCheckUtils]: 6: Hoare triple {29#true} [91] L34-3-->L43-2: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {30#false} is VALID [2022-04-07 18:33:56,172 INFO L290 TraceCheckUtils]: 7: Hoare triple {30#false} [93] L43-2-->L38-2: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {30#false} is VALID [2022-04-07 18:33:56,172 INFO L272 TraceCheckUtils]: 8: Hoare triple {30#false} [97] L38-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_2| (ite (= (mod v_main_~A~0_7 4294967296) (mod (+ v_main_~r~0_12 (* v_main_~q~0_11 v_main_~b~0_15)) 4294967296)) 1 0)) InVars {main_~q~0=v_main_~q~0_11, main_~A~0=v_main_~A~0_7, main_~b~0=v_main_~b~0_15, main_~r~0=v_main_~r~0_12} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_2|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {30#false} is VALID [2022-04-07 18:33:56,172 INFO L290 TraceCheckUtils]: 9: Hoare triple {30#false} [103] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {30#false} is VALID [2022-04-07 18:33:56,172 INFO L290 TraceCheckUtils]: 10: Hoare triple {30#false} [106] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {30#false} is VALID [2022-04-07 18:33:56,173 INFO L290 TraceCheckUtils]: 11: Hoare triple {30#false} [110] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30#false} is VALID [2022-04-07 18:33:56,173 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 18:33:56,173 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 18:33:56,173 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1188346102] [2022-04-07 18:33:56,174 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1188346102] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 18:33:56,174 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 18:33:56,174 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-07 18:33:56,175 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [87143084] [2022-04-07 18:33:56,175 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 18:33:56,178 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 2.6666666666666665) internal successors, (8), 2 states have internal predecessors, (8), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 12 [2022-04-07 18:33:56,179 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 18:33:56,181 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 2.6666666666666665) internal successors, (8), 2 states have internal predecessors, (8), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:33:56,201 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 12 edges. 12 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 18:33:56,202 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-07 18:33:56,202 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 18:33:56,217 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-07 18:33:56,218 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-07 18:33:56,220 INFO L87 Difference]: Start difference. First operand has 26 states, 17 states have (on average 1.5294117647058822) internal successors, (26), 18 states have internal predecessors, (26), 4 states have call successors, (4), 3 states have call predecessors, (4), 3 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) Second operand has 3 states, 3 states have (on average 2.6666666666666665) internal successors, (8), 2 states have internal predecessors, (8), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:33:56,323 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:33:56,323 INFO L93 Difference]: Finished difference Result 27 states and 32 transitions. [2022-04-07 18:33:56,323 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-07 18:33:56,323 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 2.6666666666666665) internal successors, (8), 2 states have internal predecessors, (8), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 12 [2022-04-07 18:33:56,323 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 18:33:56,324 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 2.6666666666666665) internal successors, (8), 2 states have internal predecessors, (8), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:33:56,328 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 36 transitions. [2022-04-07 18:33:56,328 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 2.6666666666666665) internal successors, (8), 2 states have internal predecessors, (8), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:33:56,330 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 36 transitions. [2022-04-07 18:33:56,331 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 36 transitions. [2022-04-07 18:33:56,375 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 36 edges. 36 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 18:33:56,383 INFO L225 Difference]: With dead ends: 27 [2022-04-07 18:33:56,383 INFO L226 Difference]: Without dead ends: 22 [2022-04-07 18:33:56,384 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-07 18:33:56,388 INFO L913 BasicCegarLoop]: 30 mSDtfsCounter, 6 mSDsluCounter, 4 mSDsCounter, 0 mSdLazyCounter, 18 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 34 SdHoareTripleChecker+Invalid, 21 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 18 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 18:33:56,389 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [6 Valid, 34 Invalid, 21 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 18 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 18:33:56,399 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2022-04-07 18:33:56,408 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 21. [2022-04-07 18:33:56,408 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 18:33:56,409 INFO L82 GeneralOperation]: Start isEquivalent. First operand 22 states. Second operand has 21 states, 14 states have (on average 1.4285714285714286) internal successors, (20), 15 states have internal predecessors, (20), 4 states have call successors, (4), 3 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 18:33:56,410 INFO L74 IsIncluded]: Start isIncluded. First operand 22 states. Second operand has 21 states, 14 states have (on average 1.4285714285714286) internal successors, (20), 15 states have internal predecessors, (20), 4 states have call successors, (4), 3 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 18:33:56,410 INFO L87 Difference]: Start difference. First operand 22 states. Second operand has 21 states, 14 states have (on average 1.4285714285714286) internal successors, (20), 15 states have internal predecessors, (20), 4 states have call successors, (4), 3 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 18:33:56,417 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:33:56,417 INFO L93 Difference]: Finished difference Result 22 states and 27 transitions. [2022-04-07 18:33:56,418 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 27 transitions. [2022-04-07 18:33:56,418 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 18:33:56,418 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 18:33:56,418 INFO L74 IsIncluded]: Start isIncluded. First operand has 21 states, 14 states have (on average 1.4285714285714286) internal successors, (20), 15 states have internal predecessors, (20), 4 states have call successors, (4), 3 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 22 states. [2022-04-07 18:33:56,419 INFO L87 Difference]: Start difference. First operand has 21 states, 14 states have (on average 1.4285714285714286) internal successors, (20), 15 states have internal predecessors, (20), 4 states have call successors, (4), 3 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 22 states. [2022-04-07 18:33:56,423 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:33:56,423 INFO L93 Difference]: Finished difference Result 22 states and 27 transitions. [2022-04-07 18:33:56,423 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 27 transitions. [2022-04-07 18:33:56,423 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 18:33:56,423 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 18:33:56,423 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 18:33:56,424 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 18:33:56,424 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 14 states have (on average 1.4285714285714286) internal successors, (20), 15 states have internal predecessors, (20), 4 states have call successors, (4), 3 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 18:33:56,429 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 26 transitions. [2022-04-07 18:33:56,430 INFO L78 Accepts]: Start accepts. Automaton has 21 states and 26 transitions. Word has length 12 [2022-04-07 18:33:56,430 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 18:33:56,430 INFO L478 AbstractCegarLoop]: Abstraction has 21 states and 26 transitions. [2022-04-07 18:33:56,431 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 2.6666666666666665) internal successors, (8), 2 states have internal predecessors, (8), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:33:56,431 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 26 transitions. [2022-04-07 18:33:56,433 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2022-04-07 18:33:56,434 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 18:33:56,438 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 18:33:56,438 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-04-07 18:33:56,439 INFO L403 AbstractCegarLoop]: === Iteration 2 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 18:33:56,440 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 18:33:56,440 INFO L85 PathProgramCache]: Analyzing trace with hash 923003056, now seen corresponding path program 1 times [2022-04-07 18:33:56,440 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 18:33:56,440 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1721941669] [2022-04-07 18:33:56,441 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 18:33:56,441 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 18:33:56,459 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 18:33:56,514 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 18:33:56,527 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 18:33:56,540 INFO L290 TraceCheckUtils]: 0: Hoare triple {136#(and (= ~counter~0 |old(~counter~0)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [87] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0) (= v_~counter~0_5 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{~counter~0=v_~counter~0_5, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[~counter~0, #NULL.offset, #NULL.base] {134#(<= ~counter~0 0)} is VALID [2022-04-07 18:33:56,540 INFO L290 TraceCheckUtils]: 1: Hoare triple {134#(<= ~counter~0 0)} [90] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {134#(<= ~counter~0 0)} is VALID [2022-04-07 18:33:56,542 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {134#(<= ~counter~0 0)} {129#true} [115] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {134#(<= ~counter~0 0)} is VALID [2022-04-07 18:33:56,543 INFO L272 TraceCheckUtils]: 0: Hoare triple {129#true} [85] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {136#(and (= ~counter~0 |old(~counter~0)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 18:33:56,544 INFO L290 TraceCheckUtils]: 1: Hoare triple {136#(and (= ~counter~0 |old(~counter~0)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [87] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0) (= v_~counter~0_5 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{~counter~0=v_~counter~0_5, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[~counter~0, #NULL.offset, #NULL.base] {134#(<= ~counter~0 0)} is VALID [2022-04-07 18:33:56,544 INFO L290 TraceCheckUtils]: 2: Hoare triple {134#(<= ~counter~0 0)} [90] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {134#(<= ~counter~0 0)} is VALID [2022-04-07 18:33:56,545 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {134#(<= ~counter~0 0)} {129#true} [115] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {134#(<= ~counter~0 0)} is VALID [2022-04-07 18:33:56,545 INFO L272 TraceCheckUtils]: 4: Hoare triple {134#(<= ~counter~0 0)} [86] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {134#(<= ~counter~0 0)} is VALID [2022-04-07 18:33:56,545 INFO L290 TraceCheckUtils]: 5: Hoare triple {134#(<= ~counter~0 0)} [89] mainENTRY-->L34-3: Formula: (and (= v_main_~B~0_2 1) (= v_main_~B~0_2 v_main_~b~0_3) (= v_main_~q~0_2 0) (= v_main_~A~0_2 |v_main_#t~nondet1_2|) (= v_main_~A~0_2 v_main_~r~0_2)) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~q~0=v_main_~q~0_2, main_~B~0=v_main_~B~0_2, main_~b~0=v_main_~b~0_3, main_~A~0=v_main_~A~0_2, main_~r~0=v_main_~r~0_2} AuxVars[] AssignedVars[main_~q~0, main_#t~nondet1, main_~B~0, main_~b~0, main_~A~0, main_~r~0] {134#(<= ~counter~0 0)} is VALID [2022-04-07 18:33:56,546 INFO L290 TraceCheckUtils]: 6: Hoare triple {134#(<= ~counter~0 0)} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {135#(<= |main_#t~post2| 0)} is VALID [2022-04-07 18:33:56,546 INFO L290 TraceCheckUtils]: 7: Hoare triple {135#(<= |main_#t~post2| 0)} [95] L34-1-->L43-2: Formula: (not (< |v_main_#t~post2_3| 10)) InVars {main_#t~post2=|v_main_#t~post2_3|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {130#false} is VALID [2022-04-07 18:33:56,547 INFO L290 TraceCheckUtils]: 8: Hoare triple {130#false} [94] L43-2-->L38: Formula: (and (= |v_main_#t~post3_1| v_~counter~0_2) (= (+ |v_main_#t~post3_1| 1) v_~counter~0_1)) InVars {~counter~0=v_~counter~0_2} OutVars{~counter~0=v_~counter~0_1, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post3] {130#false} is VALID [2022-04-07 18:33:56,547 INFO L290 TraceCheckUtils]: 9: Hoare triple {130#false} [98] L38-->L38-2: Formula: (not (< |v_main_#t~post3_3| 10)) InVars {main_#t~post3=|v_main_#t~post3_3|} OutVars{} AuxVars[] AssignedVars[main_#t~post3] {130#false} is VALID [2022-04-07 18:33:56,548 INFO L272 TraceCheckUtils]: 10: Hoare triple {130#false} [97] L38-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_2| (ite (= (mod v_main_~A~0_7 4294967296) (mod (+ v_main_~r~0_12 (* v_main_~q~0_11 v_main_~b~0_15)) 4294967296)) 1 0)) InVars {main_~q~0=v_main_~q~0_11, main_~A~0=v_main_~A~0_7, main_~b~0=v_main_~b~0_15, main_~r~0=v_main_~r~0_12} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_2|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {130#false} is VALID [2022-04-07 18:33:56,548 INFO L290 TraceCheckUtils]: 11: Hoare triple {130#false} [103] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {130#false} is VALID [2022-04-07 18:33:56,549 INFO L290 TraceCheckUtils]: 12: Hoare triple {130#false} [106] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {130#false} is VALID [2022-04-07 18:33:56,549 INFO L290 TraceCheckUtils]: 13: Hoare triple {130#false} [110] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {130#false} is VALID [2022-04-07 18:33:56,549 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 18:33:56,549 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 18:33:56,549 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1721941669] [2022-04-07 18:33:56,550 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1721941669] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 18:33:56,550 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 18:33:56,550 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-07 18:33:56,550 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1584763257] [2022-04-07 18:33:56,550 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 18:33:56,553 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 4 states have (on average 2.5) internal successors, (10), 3 states have internal predecessors, (10), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 14 [2022-04-07 18:33:56,553 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 18:33:56,553 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 5 states, 4 states have (on average 2.5) internal successors, (10), 3 states have internal predecessors, (10), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:33:56,575 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 14 edges. 14 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 18:33:56,575 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-04-07 18:33:56,576 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 18:33:56,576 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-04-07 18:33:56,576 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-04-07 18:33:56,576 INFO L87 Difference]: Start difference. First operand 21 states and 26 transitions. Second operand has 5 states, 4 states have (on average 2.5) internal successors, (10), 3 states have internal predecessors, (10), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:33:56,696 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:33:56,696 INFO L93 Difference]: Finished difference Result 23 states and 28 transitions. [2022-04-07 18:33:56,696 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-04-07 18:33:56,697 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 4 states have (on average 2.5) internal successors, (10), 3 states have internal predecessors, (10), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 14 [2022-04-07 18:33:56,697 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 18:33:56,697 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 4 states have (on average 2.5) internal successors, (10), 3 states have internal predecessors, (10), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:33:56,701 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 29 transitions. [2022-04-07 18:33:56,701 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 4 states have (on average 2.5) internal successors, (10), 3 states have internal predecessors, (10), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:33:56,702 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 29 transitions. [2022-04-07 18:33:56,702 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 6 states and 29 transitions. [2022-04-07 18:33:56,726 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 29 edges. 29 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 18:33:56,728 INFO L225 Difference]: With dead ends: 23 [2022-04-07 18:33:56,728 INFO L226 Difference]: Without dead ends: 23 [2022-04-07 18:33:56,730 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2022-04-07 18:33:56,731 INFO L913 BasicCegarLoop]: 24 mSDtfsCounter, 6 mSDsluCounter, 29 mSDsCounter, 0 mSdLazyCounter, 36 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 53 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 36 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 18:33:56,731 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [6 Valid, 53 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 36 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 18:33:56,732 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states. [2022-04-07 18:33:56,733 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 23. [2022-04-07 18:33:56,733 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 18:33:56,734 INFO L82 GeneralOperation]: Start isEquivalent. First operand 23 states. Second operand has 23 states, 16 states have (on average 1.375) internal successors, (22), 17 states have internal predecessors, (22), 4 states have call successors, (4), 3 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 18:33:56,734 INFO L74 IsIncluded]: Start isIncluded. First operand 23 states. Second operand has 23 states, 16 states have (on average 1.375) internal successors, (22), 17 states have internal predecessors, (22), 4 states have call successors, (4), 3 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 18:33:56,734 INFO L87 Difference]: Start difference. First operand 23 states. Second operand has 23 states, 16 states have (on average 1.375) internal successors, (22), 17 states have internal predecessors, (22), 4 states have call successors, (4), 3 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 18:33:56,735 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:33:56,735 INFO L93 Difference]: Finished difference Result 23 states and 28 transitions. [2022-04-07 18:33:56,735 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 28 transitions. [2022-04-07 18:33:56,735 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 18:33:56,735 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 18:33:56,736 INFO L74 IsIncluded]: Start isIncluded. First operand has 23 states, 16 states have (on average 1.375) internal successors, (22), 17 states have internal predecessors, (22), 4 states have call successors, (4), 3 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 23 states. [2022-04-07 18:33:56,736 INFO L87 Difference]: Start difference. First operand has 23 states, 16 states have (on average 1.375) internal successors, (22), 17 states have internal predecessors, (22), 4 states have call successors, (4), 3 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 23 states. [2022-04-07 18:33:56,737 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:33:56,737 INFO L93 Difference]: Finished difference Result 23 states and 28 transitions. [2022-04-07 18:33:56,737 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 28 transitions. [2022-04-07 18:33:56,737 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 18:33:56,737 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 18:33:56,737 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 18:33:56,737 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 18:33:56,738 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 16 states have (on average 1.375) internal successors, (22), 17 states have internal predecessors, (22), 4 states have call successors, (4), 3 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 18:33:56,738 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 28 transitions. [2022-04-07 18:33:56,739 INFO L78 Accepts]: Start accepts. Automaton has 23 states and 28 transitions. Word has length 14 [2022-04-07 18:33:56,739 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 18:33:56,739 INFO L478 AbstractCegarLoop]: Abstraction has 23 states and 28 transitions. [2022-04-07 18:33:56,739 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 4 states have (on average 2.5) internal successors, (10), 3 states have internal predecessors, (10), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:33:56,739 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 28 transitions. [2022-04-07 18:33:56,739 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2022-04-07 18:33:56,739 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 18:33:56,739 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 18:33:56,740 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-04-07 18:33:56,740 INFO L403 AbstractCegarLoop]: === Iteration 3 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 18:33:56,740 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 18:33:56,740 INFO L85 PathProgramCache]: Analyzing trace with hash 1207414063, now seen corresponding path program 1 times [2022-04-07 18:33:56,740 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 18:33:56,740 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1000489076] [2022-04-07 18:33:56,740 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 18:33:56,741 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 18:33:56,761 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-04-07 18:33:56,762 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1477863684] [2022-04-07 18:33:56,762 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 18:33:56,762 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 18:33:56,762 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 18:33:56,791 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 18:33:56,820 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-04-07 18:33:56,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 18:33:56,829 INFO L263 TraceCheckSpWp]: Trace formula consists of 73 conjuncts, 7 conjunts are in the unsatisfiable core [2022-04-07 18:33:56,836 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 18:33:56,839 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 18:33:56,986 INFO L272 TraceCheckUtils]: 0: Hoare triple {233#true} [85] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {233#true} is VALID [2022-04-07 18:33:56,987 INFO L290 TraceCheckUtils]: 1: Hoare triple {233#true} [87] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0) (= v_~counter~0_5 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{~counter~0=v_~counter~0_5, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[~counter~0, #NULL.offset, #NULL.base] {241#(<= ~counter~0 0)} is VALID [2022-04-07 18:33:56,988 INFO L290 TraceCheckUtils]: 2: Hoare triple {241#(<= ~counter~0 0)} [90] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {241#(<= ~counter~0 0)} is VALID [2022-04-07 18:33:56,988 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {241#(<= ~counter~0 0)} {233#true} [115] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {241#(<= ~counter~0 0)} is VALID [2022-04-07 18:33:56,988 INFO L272 TraceCheckUtils]: 4: Hoare triple {241#(<= ~counter~0 0)} [86] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {241#(<= ~counter~0 0)} is VALID [2022-04-07 18:33:56,989 INFO L290 TraceCheckUtils]: 5: Hoare triple {241#(<= ~counter~0 0)} [89] mainENTRY-->L34-3: Formula: (and (= v_main_~B~0_2 1) (= v_main_~B~0_2 v_main_~b~0_3) (= v_main_~q~0_2 0) (= v_main_~A~0_2 |v_main_#t~nondet1_2|) (= v_main_~A~0_2 v_main_~r~0_2)) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~q~0=v_main_~q~0_2, main_~B~0=v_main_~B~0_2, main_~b~0=v_main_~b~0_3, main_~A~0=v_main_~A~0_2, main_~r~0=v_main_~r~0_2} AuxVars[] AssignedVars[main_~q~0, main_#t~nondet1, main_~B~0, main_~b~0, main_~A~0, main_~r~0] {241#(<= ~counter~0 0)} is VALID [2022-04-07 18:33:56,989 INFO L290 TraceCheckUtils]: 6: Hoare triple {241#(<= ~counter~0 0)} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {257#(<= ~counter~0 1)} is VALID [2022-04-07 18:33:56,990 INFO L290 TraceCheckUtils]: 7: Hoare triple {257#(<= ~counter~0 1)} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 10) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {257#(<= ~counter~0 1)} is VALID [2022-04-07 18:33:56,990 INFO L290 TraceCheckUtils]: 8: Hoare triple {257#(<= ~counter~0 1)} [100] L35-->L43-2: Formula: (not (<= (mod v_main_~b~0_11 4294967296) (mod v_main_~r~0_9 4294967296))) InVars {main_~b~0=v_main_~b~0_11, main_~r~0=v_main_~r~0_9} OutVars{main_~b~0=v_main_~b~0_11, main_~r~0=v_main_~r~0_9} AuxVars[] AssignedVars[] {257#(<= ~counter~0 1)} is VALID [2022-04-07 18:33:56,990 INFO L290 TraceCheckUtils]: 9: Hoare triple {257#(<= ~counter~0 1)} [94] L43-2-->L38: Formula: (and (= |v_main_#t~post3_1| v_~counter~0_2) (= (+ |v_main_#t~post3_1| 1) v_~counter~0_1)) InVars {~counter~0=v_~counter~0_2} OutVars{~counter~0=v_~counter~0_1, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post3] {267#(<= |main_#t~post3| 1)} is VALID [2022-04-07 18:33:56,991 INFO L290 TraceCheckUtils]: 10: Hoare triple {267#(<= |main_#t~post3| 1)} [98] L38-->L38-2: Formula: (not (< |v_main_#t~post3_3| 10)) InVars {main_#t~post3=|v_main_#t~post3_3|} OutVars{} AuxVars[] AssignedVars[main_#t~post3] {234#false} is VALID [2022-04-07 18:33:56,991 INFO L272 TraceCheckUtils]: 11: Hoare triple {234#false} [97] L38-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_2| (ite (= (mod v_main_~A~0_7 4294967296) (mod (+ v_main_~r~0_12 (* v_main_~q~0_11 v_main_~b~0_15)) 4294967296)) 1 0)) InVars {main_~q~0=v_main_~q~0_11, main_~A~0=v_main_~A~0_7, main_~b~0=v_main_~b~0_15, main_~r~0=v_main_~r~0_12} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_2|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {234#false} is VALID [2022-04-07 18:33:56,991 INFO L290 TraceCheckUtils]: 12: Hoare triple {234#false} [103] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {234#false} is VALID [2022-04-07 18:33:56,991 INFO L290 TraceCheckUtils]: 13: Hoare triple {234#false} [106] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {234#false} is VALID [2022-04-07 18:33:56,992 INFO L290 TraceCheckUtils]: 14: Hoare triple {234#false} [110] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {234#false} is VALID [2022-04-07 18:33:56,992 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 18:33:56,992 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-07 18:33:56,992 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 18:33:56,992 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1000489076] [2022-04-07 18:33:56,992 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-04-07 18:33:56,992 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1477863684] [2022-04-07 18:33:56,992 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1477863684] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 18:33:56,993 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 18:33:56,993 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-04-07 18:33:56,993 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [505971920] [2022-04-07 18:33:56,993 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 18:33:56,993 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 2.2) internal successors, (11), 4 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-07 18:33:56,993 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 18:33:56,994 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 2.2) internal successors, (11), 4 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:33:57,003 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 15 edges. 15 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 18:33:57,004 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-04-07 18:33:57,004 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 18:33:57,004 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-04-07 18:33:57,004 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2022-04-07 18:33:57,005 INFO L87 Difference]: Start difference. First operand 23 states and 28 transitions. Second operand has 5 states, 5 states have (on average 2.2) internal successors, (11), 4 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:33:57,058 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:33:57,059 INFO L93 Difference]: Finished difference Result 27 states and 33 transitions. [2022-04-07 18:33:57,059 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-04-07 18:33:57,059 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 2.2) internal successors, (11), 4 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-07 18:33:57,059 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 18:33:57,059 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 2.2) internal successors, (11), 4 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:33:57,060 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 34 transitions. [2022-04-07 18:33:57,060 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 2.2) internal successors, (11), 4 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:33:57,061 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 34 transitions. [2022-04-07 18:33:57,061 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 5 states and 34 transitions. [2022-04-07 18:33:57,084 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 34 edges. 34 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 18:33:57,084 INFO L225 Difference]: With dead ends: 27 [2022-04-07 18:33:57,084 INFO L226 Difference]: Without dead ends: 27 [2022-04-07 18:33:57,085 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 11 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2022-04-07 18:33:57,085 INFO L913 BasicCegarLoop]: 23 mSDtfsCounter, 3 mSDsluCounter, 58 mSDsCounter, 0 mSdLazyCounter, 13 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3 SdHoareTripleChecker+Valid, 81 SdHoareTripleChecker+Invalid, 16 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 13 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 18:33:57,086 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [3 Valid, 81 Invalid, 16 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 13 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 18:33:57,086 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states. [2022-04-07 18:33:57,087 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 26. [2022-04-07 18:33:57,088 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 18:33:57,088 INFO L82 GeneralOperation]: Start isEquivalent. First operand 27 states. Second operand has 26 states, 19 states have (on average 1.368421052631579) internal successors, (26), 20 states have internal predecessors, (26), 4 states have call successors, (4), 3 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 18:33:57,088 INFO L74 IsIncluded]: Start isIncluded. First operand 27 states. Second operand has 26 states, 19 states have (on average 1.368421052631579) internal successors, (26), 20 states have internal predecessors, (26), 4 states have call successors, (4), 3 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 18:33:57,088 INFO L87 Difference]: Start difference. First operand 27 states. Second operand has 26 states, 19 states have (on average 1.368421052631579) internal successors, (26), 20 states have internal predecessors, (26), 4 states have call successors, (4), 3 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 18:33:57,089 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:33:57,089 INFO L93 Difference]: Finished difference Result 27 states and 33 transitions. [2022-04-07 18:33:57,089 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 33 transitions. [2022-04-07 18:33:57,090 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 18:33:57,090 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 18:33:57,090 INFO L74 IsIncluded]: Start isIncluded. First operand has 26 states, 19 states have (on average 1.368421052631579) internal successors, (26), 20 states have internal predecessors, (26), 4 states have call successors, (4), 3 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 27 states. [2022-04-07 18:33:57,090 INFO L87 Difference]: Start difference. First operand has 26 states, 19 states have (on average 1.368421052631579) internal successors, (26), 20 states have internal predecessors, (26), 4 states have call successors, (4), 3 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 27 states. [2022-04-07 18:33:57,091 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:33:57,091 INFO L93 Difference]: Finished difference Result 27 states and 33 transitions. [2022-04-07 18:33:57,091 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 33 transitions. [2022-04-07 18:33:57,092 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 18:33:57,092 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 18:33:57,092 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 18:33:57,092 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 18:33:57,092 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 19 states have (on average 1.368421052631579) internal successors, (26), 20 states have internal predecessors, (26), 4 states have call successors, (4), 3 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 18:33:57,093 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 32 transitions. [2022-04-07 18:33:57,093 INFO L78 Accepts]: Start accepts. Automaton has 26 states and 32 transitions. Word has length 15 [2022-04-07 18:33:57,093 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 18:33:57,093 INFO L478 AbstractCegarLoop]: Abstraction has 26 states and 32 transitions. [2022-04-07 18:33:57,093 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 2.2) internal successors, (11), 4 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:33:57,093 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 32 transitions. [2022-04-07 18:33:57,094 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2022-04-07 18:33:57,094 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 18:33:57,094 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 18:33:57,118 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2022-04-07 18:33:57,318 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2,2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 18:33:57,318 INFO L403 AbstractCegarLoop]: === Iteration 4 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 18:33:57,319 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 18:33:57,319 INFO L85 PathProgramCache]: Analyzing trace with hash 1208546121, now seen corresponding path program 1 times [2022-04-07 18:33:57,319 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 18:33:57,319 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1346087513] [2022-04-07 18:33:57,319 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 18:33:57,319 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 18:33:57,329 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-04-07 18:33:57,330 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [506047713] [2022-04-07 18:33:57,330 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 18:33:57,330 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 18:33:57,330 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 18:33:57,331 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 18:33:57,332 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-04-07 18:33:57,369 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 18:33:57,370 INFO L263 TraceCheckSpWp]: Trace formula consists of 73 conjuncts, 14 conjunts are in the unsatisfiable core [2022-04-07 18:33:57,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 18:33:57,378 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 18:33:57,609 INFO L272 TraceCheckUtils]: 0: Hoare triple {389#true} [85] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {389#true} is VALID [2022-04-07 18:33:57,609 INFO L290 TraceCheckUtils]: 1: Hoare triple {389#true} [87] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0) (= v_~counter~0_5 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{~counter~0=v_~counter~0_5, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[~counter~0, #NULL.offset, #NULL.base] {389#true} is VALID [2022-04-07 18:33:57,609 INFO L290 TraceCheckUtils]: 2: Hoare triple {389#true} [90] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {389#true} is VALID [2022-04-07 18:33:57,609 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {389#true} {389#true} [115] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {389#true} is VALID [2022-04-07 18:33:57,609 INFO L272 TraceCheckUtils]: 4: Hoare triple {389#true} [86] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {389#true} is VALID [2022-04-07 18:33:57,610 INFO L290 TraceCheckUtils]: 5: Hoare triple {389#true} [89] mainENTRY-->L34-3: Formula: (and (= v_main_~B~0_2 1) (= v_main_~B~0_2 v_main_~b~0_3) (= v_main_~q~0_2 0) (= v_main_~A~0_2 |v_main_#t~nondet1_2|) (= v_main_~A~0_2 v_main_~r~0_2)) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~q~0=v_main_~q~0_2, main_~B~0=v_main_~B~0_2, main_~b~0=v_main_~b~0_3, main_~A~0=v_main_~A~0_2, main_~r~0=v_main_~r~0_2} AuxVars[] AssignedVars[main_~q~0, main_#t~nondet1, main_~B~0, main_~b~0, main_~A~0, main_~r~0] {409#(and (= main_~b~0 1) (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:33:57,611 INFO L290 TraceCheckUtils]: 6: Hoare triple {409#(and (= main_~b~0 1) (= main_~A~0 main_~r~0) (= main_~q~0 0))} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {409#(and (= main_~b~0 1) (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:33:57,611 INFO L290 TraceCheckUtils]: 7: Hoare triple {409#(and (= main_~b~0 1) (= main_~A~0 main_~r~0) (= main_~q~0 0))} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 10) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {409#(and (= main_~b~0 1) (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:33:57,612 INFO L290 TraceCheckUtils]: 8: Hoare triple {409#(and (= main_~b~0 1) (= main_~A~0 main_~r~0) (= main_~q~0 0))} [100] L35-->L43-2: Formula: (not (<= (mod v_main_~b~0_11 4294967296) (mod v_main_~r~0_9 4294967296))) InVars {main_~b~0=v_main_~b~0_11, main_~r~0=v_main_~r~0_9} OutVars{main_~b~0=v_main_~b~0_11, main_~r~0=v_main_~r~0_9} AuxVars[] AssignedVars[] {419#(and (= main_~b~0 1) (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:33:57,612 INFO L290 TraceCheckUtils]: 9: Hoare triple {419#(and (= main_~b~0 1) (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (= main_~A~0 main_~r~0) (= main_~q~0 0))} [94] L43-2-->L38: Formula: (and (= |v_main_#t~post3_1| v_~counter~0_2) (= (+ |v_main_#t~post3_1| 1) v_~counter~0_1)) InVars {~counter~0=v_~counter~0_2} OutVars{~counter~0=v_~counter~0_1, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post3] {419#(and (= main_~b~0 1) (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:33:57,613 INFO L290 TraceCheckUtils]: 10: Hoare triple {419#(and (= main_~b~0 1) (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (= main_~A~0 main_~r~0) (= main_~q~0 0))} [99] L38-->L39: Formula: (< |v_main_#t~post3_5| 10) InVars {main_#t~post3=|v_main_#t~post3_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post3] {419#(and (= main_~b~0 1) (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:33:57,614 INFO L272 TraceCheckUtils]: 11: Hoare triple {419#(and (= main_~b~0 1) (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (= main_~A~0 main_~r~0) (= main_~q~0 0))} [104] L39-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~A~0_6 4294967296) (mod (+ v_main_~r~0_11 (* v_main_~q~0_10 v_main_~b~0_14)) 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~q~0=v_main_~q~0_10, main_~A~0=v_main_~A~0_6, main_~b~0=v_main_~b~0_14, main_~r~0=v_main_~r~0_11} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {429#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 18:33:57,614 INFO L290 TraceCheckUtils]: 12: Hoare triple {429#(<= 1 |__VERIFIER_assert_#in~cond|)} [103] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {433#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 18:33:57,615 INFO L290 TraceCheckUtils]: 13: Hoare triple {433#(<= 1 __VERIFIER_assert_~cond)} [106] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {390#false} is VALID [2022-04-07 18:33:57,615 INFO L290 TraceCheckUtils]: 14: Hoare triple {390#false} [110] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {390#false} is VALID [2022-04-07 18:33:57,615 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 18:33:57,615 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-07 18:33:57,615 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 18:33:57,615 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1346087513] [2022-04-07 18:33:57,615 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-04-07 18:33:57,616 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [506047713] [2022-04-07 18:33:57,616 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [506047713] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 18:33:57,616 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 18:33:57,616 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-04-07 18:33:57,616 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [925359396] [2022-04-07 18:33:57,616 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 18:33:57,616 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 1.8333333333333333) internal successors, (11), 5 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-07 18:33:57,616 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 18:33:57,617 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 6 states, 6 states have (on average 1.8333333333333333) internal successors, (11), 5 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:33:57,629 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 15 edges. 15 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 18:33:57,629 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-04-07 18:33:57,629 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 18:33:57,630 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-04-07 18:33:57,630 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2022-04-07 18:33:57,630 INFO L87 Difference]: Start difference. First operand 26 states and 32 transitions. Second operand has 6 states, 6 states have (on average 1.8333333333333333) internal successors, (11), 5 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:33:57,762 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:33:57,762 INFO L93 Difference]: Finished difference Result 33 states and 40 transitions. [2022-04-07 18:33:57,762 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-04-07 18:33:57,762 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 1.8333333333333333) internal successors, (11), 5 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-07 18:33:57,762 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 18:33:57,762 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 1.8333333333333333) internal successors, (11), 5 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:33:57,764 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 41 transitions. [2022-04-07 18:33:57,764 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 1.8333333333333333) internal successors, (11), 5 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:33:57,765 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 41 transitions. [2022-04-07 18:33:57,765 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 6 states and 41 transitions. [2022-04-07 18:33:57,796 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 41 edges. 41 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 18:33:57,797 INFO L225 Difference]: With dead ends: 33 [2022-04-07 18:33:57,797 INFO L226 Difference]: Without dead ends: 32 [2022-04-07 18:33:57,797 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 10 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2022-04-07 18:33:57,798 INFO L913 BasicCegarLoop]: 21 mSDtfsCounter, 9 mSDsluCounter, 67 mSDsCounter, 0 mSdLazyCounter, 48 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 10 SdHoareTripleChecker+Valid, 88 SdHoareTripleChecker+Invalid, 49 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 48 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 18:33:57,798 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [10 Valid, 88 Invalid, 49 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 48 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 18:33:57,798 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states. [2022-04-07 18:33:57,800 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 32. [2022-04-07 18:33:57,800 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 18:33:57,800 INFO L82 GeneralOperation]: Start isEquivalent. First operand 32 states. Second operand has 32 states, 23 states have (on average 1.3043478260869565) internal successors, (30), 24 states have internal predecessors, (30), 5 states have call successors, (5), 4 states have call predecessors, (5), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 18:33:57,800 INFO L74 IsIncluded]: Start isIncluded. First operand 32 states. Second operand has 32 states, 23 states have (on average 1.3043478260869565) internal successors, (30), 24 states have internal predecessors, (30), 5 states have call successors, (5), 4 states have call predecessors, (5), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 18:33:57,801 INFO L87 Difference]: Start difference. First operand 32 states. Second operand has 32 states, 23 states have (on average 1.3043478260869565) internal successors, (30), 24 states have internal predecessors, (30), 5 states have call successors, (5), 4 states have call predecessors, (5), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 18:33:57,802 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:33:57,802 INFO L93 Difference]: Finished difference Result 32 states and 38 transitions. [2022-04-07 18:33:57,802 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 38 transitions. [2022-04-07 18:33:57,802 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 18:33:57,802 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 18:33:57,802 INFO L74 IsIncluded]: Start isIncluded. First operand has 32 states, 23 states have (on average 1.3043478260869565) internal successors, (30), 24 states have internal predecessors, (30), 5 states have call successors, (5), 4 states have call predecessors, (5), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand 32 states. [2022-04-07 18:33:57,803 INFO L87 Difference]: Start difference. First operand has 32 states, 23 states have (on average 1.3043478260869565) internal successors, (30), 24 states have internal predecessors, (30), 5 states have call successors, (5), 4 states have call predecessors, (5), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand 32 states. [2022-04-07 18:33:57,804 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:33:57,804 INFO L93 Difference]: Finished difference Result 32 states and 38 transitions. [2022-04-07 18:33:57,804 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 38 transitions. [2022-04-07 18:33:57,804 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 18:33:57,804 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 18:33:57,804 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 18:33:57,804 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 18:33:57,804 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 32 states, 23 states have (on average 1.3043478260869565) internal successors, (30), 24 states have internal predecessors, (30), 5 states have call successors, (5), 4 states have call predecessors, (5), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 18:33:57,805 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 38 transitions. [2022-04-07 18:33:57,805 INFO L78 Accepts]: Start accepts. Automaton has 32 states and 38 transitions. Word has length 15 [2022-04-07 18:33:57,805 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 18:33:57,805 INFO L478 AbstractCegarLoop]: Abstraction has 32 states and 38 transitions. [2022-04-07 18:33:57,806 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 1.8333333333333333) internal successors, (11), 5 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:33:57,806 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 38 transitions. [2022-04-07 18:33:57,806 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-04-07 18:33:57,806 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 18:33:57,806 INFO L499 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 18:33:57,823 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2022-04-07 18:33:58,022 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable3 [2022-04-07 18:33:58,022 INFO L403 AbstractCegarLoop]: === Iteration 5 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 18:33:58,023 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 18:33:58,023 INFO L85 PathProgramCache]: Analyzing trace with hash 1227316531, now seen corresponding path program 1 times [2022-04-07 18:33:58,023 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 18:33:58,023 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [968190396] [2022-04-07 18:33:58,023 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 18:33:58,023 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 18:33:58,034 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-04-07 18:33:58,034 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [751436517] [2022-04-07 18:33:58,034 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 18:33:58,034 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 18:33:58,035 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 18:33:58,035 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 18:33:58,036 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-04-07 18:33:58,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 18:33:58,065 INFO L263 TraceCheckSpWp]: Trace formula consists of 80 conjuncts, 7 conjunts are in the unsatisfiable core [2022-04-07 18:33:58,071 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 18:33:58,072 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 18:33:58,165 INFO L272 TraceCheckUtils]: 0: Hoare triple {570#true} [85] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {570#true} is VALID [2022-04-07 18:33:58,166 INFO L290 TraceCheckUtils]: 1: Hoare triple {570#true} [87] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0) (= v_~counter~0_5 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{~counter~0=v_~counter~0_5, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[~counter~0, #NULL.offset, #NULL.base] {578#(<= ~counter~0 0)} is VALID [2022-04-07 18:33:58,166 INFO L290 TraceCheckUtils]: 2: Hoare triple {578#(<= ~counter~0 0)} [90] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {578#(<= ~counter~0 0)} is VALID [2022-04-07 18:33:58,167 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {578#(<= ~counter~0 0)} {570#true} [115] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {578#(<= ~counter~0 0)} is VALID [2022-04-07 18:33:58,167 INFO L272 TraceCheckUtils]: 4: Hoare triple {578#(<= ~counter~0 0)} [86] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {578#(<= ~counter~0 0)} is VALID [2022-04-07 18:33:58,168 INFO L290 TraceCheckUtils]: 5: Hoare triple {578#(<= ~counter~0 0)} [89] mainENTRY-->L34-3: Formula: (and (= v_main_~B~0_2 1) (= v_main_~B~0_2 v_main_~b~0_3) (= v_main_~q~0_2 0) (= v_main_~A~0_2 |v_main_#t~nondet1_2|) (= v_main_~A~0_2 v_main_~r~0_2)) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~q~0=v_main_~q~0_2, main_~B~0=v_main_~B~0_2, main_~b~0=v_main_~b~0_3, main_~A~0=v_main_~A~0_2, main_~r~0=v_main_~r~0_2} AuxVars[] AssignedVars[main_~q~0, main_#t~nondet1, main_~B~0, main_~b~0, main_~A~0, main_~r~0] {578#(<= ~counter~0 0)} is VALID [2022-04-07 18:33:58,169 INFO L290 TraceCheckUtils]: 6: Hoare triple {578#(<= ~counter~0 0)} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {594#(<= ~counter~0 1)} is VALID [2022-04-07 18:33:58,169 INFO L290 TraceCheckUtils]: 7: Hoare triple {594#(<= ~counter~0 1)} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 10) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {594#(<= ~counter~0 1)} is VALID [2022-04-07 18:33:58,170 INFO L290 TraceCheckUtils]: 8: Hoare triple {594#(<= ~counter~0 1)} [101] L35-->L34-3: Formula: (and (= (* 2 v_main_~b~0_13) v_main_~b~0_12) (<= (mod v_main_~b~0_13 4294967296) (mod v_main_~r~0_10 4294967296))) InVars {main_~b~0=v_main_~b~0_13, main_~r~0=v_main_~r~0_10} OutVars{main_~b~0=v_main_~b~0_12, main_~r~0=v_main_~r~0_10} AuxVars[] AssignedVars[main_~b~0] {594#(<= ~counter~0 1)} is VALID [2022-04-07 18:33:58,170 INFO L290 TraceCheckUtils]: 9: Hoare triple {594#(<= ~counter~0 1)} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {604#(<= |main_#t~post2| 1)} is VALID [2022-04-07 18:33:58,171 INFO L290 TraceCheckUtils]: 10: Hoare triple {604#(<= |main_#t~post2| 1)} [95] L34-1-->L43-2: Formula: (not (< |v_main_#t~post2_3| 10)) InVars {main_#t~post2=|v_main_#t~post2_3|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {571#false} is VALID [2022-04-07 18:33:58,171 INFO L290 TraceCheckUtils]: 11: Hoare triple {571#false} [94] L43-2-->L38: Formula: (and (= |v_main_#t~post3_1| v_~counter~0_2) (= (+ |v_main_#t~post3_1| 1) v_~counter~0_1)) InVars {~counter~0=v_~counter~0_2} OutVars{~counter~0=v_~counter~0_1, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post3] {571#false} is VALID [2022-04-07 18:33:58,171 INFO L290 TraceCheckUtils]: 12: Hoare triple {571#false} [98] L38-->L38-2: Formula: (not (< |v_main_#t~post3_3| 10)) InVars {main_#t~post3=|v_main_#t~post3_3|} OutVars{} AuxVars[] AssignedVars[main_#t~post3] {571#false} is VALID [2022-04-07 18:33:58,171 INFO L272 TraceCheckUtils]: 13: Hoare triple {571#false} [97] L38-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_2| (ite (= (mod v_main_~A~0_7 4294967296) (mod (+ v_main_~r~0_12 (* v_main_~q~0_11 v_main_~b~0_15)) 4294967296)) 1 0)) InVars {main_~q~0=v_main_~q~0_11, main_~A~0=v_main_~A~0_7, main_~b~0=v_main_~b~0_15, main_~r~0=v_main_~r~0_12} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_2|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {571#false} is VALID [2022-04-07 18:33:58,171 INFO L290 TraceCheckUtils]: 14: Hoare triple {571#false} [103] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {571#false} is VALID [2022-04-07 18:33:58,174 INFO L290 TraceCheckUtils]: 15: Hoare triple {571#false} [106] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {571#false} is VALID [2022-04-07 18:33:58,174 INFO L290 TraceCheckUtils]: 16: Hoare triple {571#false} [110] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {571#false} is VALID [2022-04-07 18:33:58,174 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 18:33:58,174 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 18:33:58,279 INFO L290 TraceCheckUtils]: 16: Hoare triple {571#false} [110] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {571#false} is VALID [2022-04-07 18:33:58,279 INFO L290 TraceCheckUtils]: 15: Hoare triple {571#false} [106] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {571#false} is VALID [2022-04-07 18:33:58,280 INFO L290 TraceCheckUtils]: 14: Hoare triple {571#false} [103] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {571#false} is VALID [2022-04-07 18:33:58,280 INFO L272 TraceCheckUtils]: 13: Hoare triple {571#false} [97] L38-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_2| (ite (= (mod v_main_~A~0_7 4294967296) (mod (+ v_main_~r~0_12 (* v_main_~q~0_11 v_main_~b~0_15)) 4294967296)) 1 0)) InVars {main_~q~0=v_main_~q~0_11, main_~A~0=v_main_~A~0_7, main_~b~0=v_main_~b~0_15, main_~r~0=v_main_~r~0_12} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_2|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {571#false} is VALID [2022-04-07 18:33:58,280 INFO L290 TraceCheckUtils]: 12: Hoare triple {571#false} [98] L38-->L38-2: Formula: (not (< |v_main_#t~post3_3| 10)) InVars {main_#t~post3=|v_main_#t~post3_3|} OutVars{} AuxVars[] AssignedVars[main_#t~post3] {571#false} is VALID [2022-04-07 18:33:58,280 INFO L290 TraceCheckUtils]: 11: Hoare triple {571#false} [94] L43-2-->L38: Formula: (and (= |v_main_#t~post3_1| v_~counter~0_2) (= (+ |v_main_#t~post3_1| 1) v_~counter~0_1)) InVars {~counter~0=v_~counter~0_2} OutVars{~counter~0=v_~counter~0_1, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post3] {571#false} is VALID [2022-04-07 18:33:58,281 INFO L290 TraceCheckUtils]: 10: Hoare triple {644#(< |main_#t~post2| 10)} [95] L34-1-->L43-2: Formula: (not (< |v_main_#t~post2_3| 10)) InVars {main_#t~post2=|v_main_#t~post2_3|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {571#false} is VALID [2022-04-07 18:33:58,281 INFO L290 TraceCheckUtils]: 9: Hoare triple {648#(< ~counter~0 10)} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {644#(< |main_#t~post2| 10)} is VALID [2022-04-07 18:33:58,281 INFO L290 TraceCheckUtils]: 8: Hoare triple {648#(< ~counter~0 10)} [101] L35-->L34-3: Formula: (and (= (* 2 v_main_~b~0_13) v_main_~b~0_12) (<= (mod v_main_~b~0_13 4294967296) (mod v_main_~r~0_10 4294967296))) InVars {main_~b~0=v_main_~b~0_13, main_~r~0=v_main_~r~0_10} OutVars{main_~b~0=v_main_~b~0_12, main_~r~0=v_main_~r~0_10} AuxVars[] AssignedVars[main_~b~0] {648#(< ~counter~0 10)} is VALID [2022-04-07 18:33:58,282 INFO L290 TraceCheckUtils]: 7: Hoare triple {648#(< ~counter~0 10)} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 10) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {648#(< ~counter~0 10)} is VALID [2022-04-07 18:33:58,282 INFO L290 TraceCheckUtils]: 6: Hoare triple {658#(< ~counter~0 9)} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {648#(< ~counter~0 10)} is VALID [2022-04-07 18:33:58,282 INFO L290 TraceCheckUtils]: 5: Hoare triple {658#(< ~counter~0 9)} [89] mainENTRY-->L34-3: Formula: (and (= v_main_~B~0_2 1) (= v_main_~B~0_2 v_main_~b~0_3) (= v_main_~q~0_2 0) (= v_main_~A~0_2 |v_main_#t~nondet1_2|) (= v_main_~A~0_2 v_main_~r~0_2)) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~q~0=v_main_~q~0_2, main_~B~0=v_main_~B~0_2, main_~b~0=v_main_~b~0_3, main_~A~0=v_main_~A~0_2, main_~r~0=v_main_~r~0_2} AuxVars[] AssignedVars[main_~q~0, main_#t~nondet1, main_~B~0, main_~b~0, main_~A~0, main_~r~0] {658#(< ~counter~0 9)} is VALID [2022-04-07 18:33:58,284 INFO L272 TraceCheckUtils]: 4: Hoare triple {658#(< ~counter~0 9)} [86] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {658#(< ~counter~0 9)} is VALID [2022-04-07 18:33:58,285 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {658#(< ~counter~0 9)} {570#true} [115] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {658#(< ~counter~0 9)} is VALID [2022-04-07 18:33:58,285 INFO L290 TraceCheckUtils]: 2: Hoare triple {658#(< ~counter~0 9)} [90] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {658#(< ~counter~0 9)} is VALID [2022-04-07 18:33:58,286 INFO L290 TraceCheckUtils]: 1: Hoare triple {570#true} [87] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0) (= v_~counter~0_5 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{~counter~0=v_~counter~0_5, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[~counter~0, #NULL.offset, #NULL.base] {658#(< ~counter~0 9)} is VALID [2022-04-07 18:33:58,286 INFO L272 TraceCheckUtils]: 0: Hoare triple {570#true} [85] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {570#true} is VALID [2022-04-07 18:33:58,286 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 18:33:58,286 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 18:33:58,286 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [968190396] [2022-04-07 18:33:58,286 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-04-07 18:33:58,286 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [751436517] [2022-04-07 18:33:58,286 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [751436517] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 18:33:58,286 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-04-07 18:33:58,287 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 8 [2022-04-07 18:33:58,287 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1458995089] [2022-04-07 18:33:58,287 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-04-07 18:33:58,287 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 2.625) internal successors, (21), 7 states have internal predecessors, (21), 4 states have call successors, (4), 4 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) Word has length 17 [2022-04-07 18:33:58,288 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 18:33:58,288 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 8 states, 8 states have (on average 2.625) internal successors, (21), 7 states have internal predecessors, (21), 4 states have call successors, (4), 4 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-07 18:33:58,319 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 27 edges. 27 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 18:33:58,319 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-04-07 18:33:58,319 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 18:33:58,319 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-04-07 18:33:58,320 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 [2022-04-07 18:33:58,320 INFO L87 Difference]: Start difference. First operand 32 states and 38 transitions. Second operand has 8 states, 8 states have (on average 2.625) internal successors, (21), 7 states have internal predecessors, (21), 4 states have call successors, (4), 4 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-07 18:33:58,480 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:33:58,480 INFO L93 Difference]: Finished difference Result 54 states and 66 transitions. [2022-04-07 18:33:58,480 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-04-07 18:33:58,481 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 2.625) internal successors, (21), 7 states have internal predecessors, (21), 4 states have call successors, (4), 4 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) Word has length 17 [2022-04-07 18:33:58,481 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 18:33:58,481 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 2.625) internal successors, (21), 7 states have internal predecessors, (21), 4 states have call successors, (4), 4 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-07 18:33:58,482 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 69 transitions. [2022-04-07 18:33:58,483 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 2.625) internal successors, (21), 7 states have internal predecessors, (21), 4 states have call successors, (4), 4 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-07 18:33:58,484 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 69 transitions. [2022-04-07 18:33:58,484 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 10 states and 69 transitions. [2022-04-07 18:33:58,539 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 69 edges. 69 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 18:33:58,540 INFO L225 Difference]: With dead ends: 54 [2022-04-07 18:33:58,540 INFO L226 Difference]: Without dead ends: 54 [2022-04-07 18:33:58,541 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 27 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=40, Invalid=70, Unknown=0, NotChecked=0, Total=110 [2022-04-07 18:33:58,541 INFO L913 BasicCegarLoop]: 25 mSDtfsCounter, 42 mSDsluCounter, 97 mSDsCounter, 0 mSdLazyCounter, 30 mSolverCounterSat, 15 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 42 SdHoareTripleChecker+Valid, 122 SdHoareTripleChecker+Invalid, 45 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 15 IncrementalHoareTripleChecker+Valid, 30 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 18:33:58,541 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [42 Valid, 122 Invalid, 45 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [15 Valid, 30 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 18:33:58,542 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54 states. [2022-04-07 18:33:58,544 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54 to 40. [2022-04-07 18:33:58,544 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 18:33:58,545 INFO L82 GeneralOperation]: Start isEquivalent. First operand 54 states. Second operand has 40 states, 31 states have (on average 1.2903225806451613) internal successors, (40), 32 states have internal predecessors, (40), 5 states have call successors, (5), 4 states have call predecessors, (5), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 18:33:58,545 INFO L74 IsIncluded]: Start isIncluded. First operand 54 states. Second operand has 40 states, 31 states have (on average 1.2903225806451613) internal successors, (40), 32 states have internal predecessors, (40), 5 states have call successors, (5), 4 states have call predecessors, (5), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 18:33:58,545 INFO L87 Difference]: Start difference. First operand 54 states. Second operand has 40 states, 31 states have (on average 1.2903225806451613) internal successors, (40), 32 states have internal predecessors, (40), 5 states have call successors, (5), 4 states have call predecessors, (5), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 18:33:58,546 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:33:58,547 INFO L93 Difference]: Finished difference Result 54 states and 66 transitions. [2022-04-07 18:33:58,547 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 66 transitions. [2022-04-07 18:33:58,547 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 18:33:58,547 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 18:33:58,547 INFO L74 IsIncluded]: Start isIncluded. First operand has 40 states, 31 states have (on average 1.2903225806451613) internal successors, (40), 32 states have internal predecessors, (40), 5 states have call successors, (5), 4 states have call predecessors, (5), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand 54 states. [2022-04-07 18:33:58,547 INFO L87 Difference]: Start difference. First operand has 40 states, 31 states have (on average 1.2903225806451613) internal successors, (40), 32 states have internal predecessors, (40), 5 states have call successors, (5), 4 states have call predecessors, (5), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand 54 states. [2022-04-07 18:33:58,552 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:33:58,552 INFO L93 Difference]: Finished difference Result 54 states and 66 transitions. [2022-04-07 18:33:58,552 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 66 transitions. [2022-04-07 18:33:58,552 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 18:33:58,552 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 18:33:58,552 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 18:33:58,552 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 18:33:58,553 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 40 states, 31 states have (on average 1.2903225806451613) internal successors, (40), 32 states have internal predecessors, (40), 5 states have call successors, (5), 4 states have call predecessors, (5), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 18:33:58,553 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 48 transitions. [2022-04-07 18:33:58,554 INFO L78 Accepts]: Start accepts. Automaton has 40 states and 48 transitions. Word has length 17 [2022-04-07 18:33:58,554 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 18:33:58,554 INFO L478 AbstractCegarLoop]: Abstraction has 40 states and 48 transitions. [2022-04-07 18:33:58,554 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 2.625) internal successors, (21), 7 states have internal predecessors, (21), 4 states have call successors, (4), 4 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-07 18:33:58,554 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 48 transitions. [2022-04-07 18:33:58,554 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-04-07 18:33:58,554 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 18:33:58,554 INFO L499 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 18:33:58,572 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-04-07 18:33:58,771 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 18:33:58,772 INFO L403 AbstractCegarLoop]: === Iteration 6 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 18:33:58,772 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 18:33:58,772 INFO L85 PathProgramCache]: Analyzing trace with hash 2051197196, now seen corresponding path program 1 times [2022-04-07 18:33:58,772 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 18:33:58,772 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1820279663] [2022-04-07 18:33:58,772 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 18:33:58,772 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 18:33:58,785 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-04-07 18:33:58,786 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1887230702] [2022-04-07 18:33:58,786 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 18:33:58,786 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 18:33:58,786 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 18:33:58,787 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 18:33:58,799 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-04-07 18:33:58,826 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 18:33:58,827 INFO L263 TraceCheckSpWp]: Trace formula consists of 81 conjuncts, 9 conjunts are in the unsatisfiable core [2022-04-07 18:33:58,833 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 18:33:58,834 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 18:33:58,937 INFO L272 TraceCheckUtils]: 0: Hoare triple {887#true} [85] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {887#true} is VALID [2022-04-07 18:33:58,937 INFO L290 TraceCheckUtils]: 1: Hoare triple {887#true} [87] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0) (= v_~counter~0_5 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{~counter~0=v_~counter~0_5, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[~counter~0, #NULL.offset, #NULL.base] {895#(<= ~counter~0 0)} is VALID [2022-04-07 18:33:58,938 INFO L290 TraceCheckUtils]: 2: Hoare triple {895#(<= ~counter~0 0)} [90] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {895#(<= ~counter~0 0)} is VALID [2022-04-07 18:33:58,938 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {895#(<= ~counter~0 0)} {887#true} [115] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {895#(<= ~counter~0 0)} is VALID [2022-04-07 18:33:58,939 INFO L272 TraceCheckUtils]: 4: Hoare triple {895#(<= ~counter~0 0)} [86] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {895#(<= ~counter~0 0)} is VALID [2022-04-07 18:33:58,939 INFO L290 TraceCheckUtils]: 5: Hoare triple {895#(<= ~counter~0 0)} [89] mainENTRY-->L34-3: Formula: (and (= v_main_~B~0_2 1) (= v_main_~B~0_2 v_main_~b~0_3) (= v_main_~q~0_2 0) (= v_main_~A~0_2 |v_main_#t~nondet1_2|) (= v_main_~A~0_2 v_main_~r~0_2)) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~q~0=v_main_~q~0_2, main_~B~0=v_main_~B~0_2, main_~b~0=v_main_~b~0_3, main_~A~0=v_main_~A~0_2, main_~r~0=v_main_~r~0_2} AuxVars[] AssignedVars[main_~q~0, main_#t~nondet1, main_~B~0, main_~b~0, main_~A~0, main_~r~0] {895#(<= ~counter~0 0)} is VALID [2022-04-07 18:33:58,940 INFO L290 TraceCheckUtils]: 6: Hoare triple {895#(<= ~counter~0 0)} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {911#(<= ~counter~0 1)} is VALID [2022-04-07 18:33:58,940 INFO L290 TraceCheckUtils]: 7: Hoare triple {911#(<= ~counter~0 1)} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 10) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {911#(<= ~counter~0 1)} is VALID [2022-04-07 18:33:58,942 INFO L290 TraceCheckUtils]: 8: Hoare triple {911#(<= ~counter~0 1)} [101] L35-->L34-3: Formula: (and (= (* 2 v_main_~b~0_13) v_main_~b~0_12) (<= (mod v_main_~b~0_13 4294967296) (mod v_main_~r~0_10 4294967296))) InVars {main_~b~0=v_main_~b~0_13, main_~r~0=v_main_~r~0_10} OutVars{main_~b~0=v_main_~b~0_12, main_~r~0=v_main_~r~0_10} AuxVars[] AssignedVars[main_~b~0] {911#(<= ~counter~0 1)} is VALID [2022-04-07 18:33:58,942 INFO L290 TraceCheckUtils]: 9: Hoare triple {911#(<= ~counter~0 1)} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {921#(<= ~counter~0 2)} is VALID [2022-04-07 18:33:58,942 INFO L290 TraceCheckUtils]: 10: Hoare triple {921#(<= ~counter~0 2)} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 10) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {921#(<= ~counter~0 2)} is VALID [2022-04-07 18:33:58,943 INFO L290 TraceCheckUtils]: 11: Hoare triple {921#(<= ~counter~0 2)} [100] L35-->L43-2: Formula: (not (<= (mod v_main_~b~0_11 4294967296) (mod v_main_~r~0_9 4294967296))) InVars {main_~b~0=v_main_~b~0_11, main_~r~0=v_main_~r~0_9} OutVars{main_~b~0=v_main_~b~0_11, main_~r~0=v_main_~r~0_9} AuxVars[] AssignedVars[] {921#(<= ~counter~0 2)} is VALID [2022-04-07 18:33:58,943 INFO L290 TraceCheckUtils]: 12: Hoare triple {921#(<= ~counter~0 2)} [94] L43-2-->L38: Formula: (and (= |v_main_#t~post3_1| v_~counter~0_2) (= (+ |v_main_#t~post3_1| 1) v_~counter~0_1)) InVars {~counter~0=v_~counter~0_2} OutVars{~counter~0=v_~counter~0_1, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post3] {931#(<= |main_#t~post3| 2)} is VALID [2022-04-07 18:33:58,943 INFO L290 TraceCheckUtils]: 13: Hoare triple {931#(<= |main_#t~post3| 2)} [98] L38-->L38-2: Formula: (not (< |v_main_#t~post3_3| 10)) InVars {main_#t~post3=|v_main_#t~post3_3|} OutVars{} AuxVars[] AssignedVars[main_#t~post3] {888#false} is VALID [2022-04-07 18:33:58,943 INFO L272 TraceCheckUtils]: 14: Hoare triple {888#false} [97] L38-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_2| (ite (= (mod v_main_~A~0_7 4294967296) (mod (+ v_main_~r~0_12 (* v_main_~q~0_11 v_main_~b~0_15)) 4294967296)) 1 0)) InVars {main_~q~0=v_main_~q~0_11, main_~A~0=v_main_~A~0_7, main_~b~0=v_main_~b~0_15, main_~r~0=v_main_~r~0_12} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_2|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {888#false} is VALID [2022-04-07 18:33:58,944 INFO L290 TraceCheckUtils]: 15: Hoare triple {888#false} [103] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {888#false} is VALID [2022-04-07 18:33:58,944 INFO L290 TraceCheckUtils]: 16: Hoare triple {888#false} [106] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {888#false} is VALID [2022-04-07 18:33:58,944 INFO L290 TraceCheckUtils]: 17: Hoare triple {888#false} [110] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {888#false} is VALID [2022-04-07 18:33:58,944 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 18:33:58,944 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 18:33:59,070 INFO L290 TraceCheckUtils]: 17: Hoare triple {888#false} [110] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {888#false} is VALID [2022-04-07 18:33:59,070 INFO L290 TraceCheckUtils]: 16: Hoare triple {888#false} [106] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {888#false} is VALID [2022-04-07 18:33:59,071 INFO L290 TraceCheckUtils]: 15: Hoare triple {888#false} [103] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {888#false} is VALID [2022-04-07 18:33:59,071 INFO L272 TraceCheckUtils]: 14: Hoare triple {888#false} [97] L38-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_2| (ite (= (mod v_main_~A~0_7 4294967296) (mod (+ v_main_~r~0_12 (* v_main_~q~0_11 v_main_~b~0_15)) 4294967296)) 1 0)) InVars {main_~q~0=v_main_~q~0_11, main_~A~0=v_main_~A~0_7, main_~b~0=v_main_~b~0_15, main_~r~0=v_main_~r~0_12} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_2|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {888#false} is VALID [2022-04-07 18:33:59,071 INFO L290 TraceCheckUtils]: 13: Hoare triple {959#(< |main_#t~post3| 10)} [98] L38-->L38-2: Formula: (not (< |v_main_#t~post3_3| 10)) InVars {main_#t~post3=|v_main_#t~post3_3|} OutVars{} AuxVars[] AssignedVars[main_#t~post3] {888#false} is VALID [2022-04-07 18:33:59,072 INFO L290 TraceCheckUtils]: 12: Hoare triple {963#(< ~counter~0 10)} [94] L43-2-->L38: Formula: (and (= |v_main_#t~post3_1| v_~counter~0_2) (= (+ |v_main_#t~post3_1| 1) v_~counter~0_1)) InVars {~counter~0=v_~counter~0_2} OutVars{~counter~0=v_~counter~0_1, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post3] {959#(< |main_#t~post3| 10)} is VALID [2022-04-07 18:33:59,083 INFO L290 TraceCheckUtils]: 11: Hoare triple {963#(< ~counter~0 10)} [100] L35-->L43-2: Formula: (not (<= (mod v_main_~b~0_11 4294967296) (mod v_main_~r~0_9 4294967296))) InVars {main_~b~0=v_main_~b~0_11, main_~r~0=v_main_~r~0_9} OutVars{main_~b~0=v_main_~b~0_11, main_~r~0=v_main_~r~0_9} AuxVars[] AssignedVars[] {963#(< ~counter~0 10)} is VALID [2022-04-07 18:33:59,086 INFO L290 TraceCheckUtils]: 10: Hoare triple {963#(< ~counter~0 10)} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 10) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {963#(< ~counter~0 10)} is VALID [2022-04-07 18:33:59,087 INFO L290 TraceCheckUtils]: 9: Hoare triple {973#(< ~counter~0 9)} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {963#(< ~counter~0 10)} is VALID [2022-04-07 18:33:59,087 INFO L290 TraceCheckUtils]: 8: Hoare triple {973#(< ~counter~0 9)} [101] L35-->L34-3: Formula: (and (= (* 2 v_main_~b~0_13) v_main_~b~0_12) (<= (mod v_main_~b~0_13 4294967296) (mod v_main_~r~0_10 4294967296))) InVars {main_~b~0=v_main_~b~0_13, main_~r~0=v_main_~r~0_10} OutVars{main_~b~0=v_main_~b~0_12, main_~r~0=v_main_~r~0_10} AuxVars[] AssignedVars[main_~b~0] {973#(< ~counter~0 9)} is VALID [2022-04-07 18:33:59,088 INFO L290 TraceCheckUtils]: 7: Hoare triple {973#(< ~counter~0 9)} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 10) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {973#(< ~counter~0 9)} is VALID [2022-04-07 18:33:59,089 INFO L290 TraceCheckUtils]: 6: Hoare triple {983#(< ~counter~0 8)} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {973#(< ~counter~0 9)} is VALID [2022-04-07 18:33:59,089 INFO L290 TraceCheckUtils]: 5: Hoare triple {983#(< ~counter~0 8)} [89] mainENTRY-->L34-3: Formula: (and (= v_main_~B~0_2 1) (= v_main_~B~0_2 v_main_~b~0_3) (= v_main_~q~0_2 0) (= v_main_~A~0_2 |v_main_#t~nondet1_2|) (= v_main_~A~0_2 v_main_~r~0_2)) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~q~0=v_main_~q~0_2, main_~B~0=v_main_~B~0_2, main_~b~0=v_main_~b~0_3, main_~A~0=v_main_~A~0_2, main_~r~0=v_main_~r~0_2} AuxVars[] AssignedVars[main_~q~0, main_#t~nondet1, main_~B~0, main_~b~0, main_~A~0, main_~r~0] {983#(< ~counter~0 8)} is VALID [2022-04-07 18:33:59,090 INFO L272 TraceCheckUtils]: 4: Hoare triple {983#(< ~counter~0 8)} [86] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {983#(< ~counter~0 8)} is VALID [2022-04-07 18:33:59,090 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {983#(< ~counter~0 8)} {887#true} [115] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {983#(< ~counter~0 8)} is VALID [2022-04-07 18:33:59,090 INFO L290 TraceCheckUtils]: 2: Hoare triple {983#(< ~counter~0 8)} [90] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {983#(< ~counter~0 8)} is VALID [2022-04-07 18:33:59,091 INFO L290 TraceCheckUtils]: 1: Hoare triple {887#true} [87] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0) (= v_~counter~0_5 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{~counter~0=v_~counter~0_5, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[~counter~0, #NULL.offset, #NULL.base] {983#(< ~counter~0 8)} is VALID [2022-04-07 18:33:59,091 INFO L272 TraceCheckUtils]: 0: Hoare triple {887#true} [85] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {887#true} is VALID [2022-04-07 18:33:59,091 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 18:33:59,091 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 18:33:59,091 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1820279663] [2022-04-07 18:33:59,092 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-04-07 18:33:59,092 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1887230702] [2022-04-07 18:33:59,092 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1887230702] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 18:33:59,092 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-04-07 18:33:59,092 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 10 [2022-04-07 18:33:59,092 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [523196548] [2022-04-07 18:33:59,092 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-04-07 18:33:59,092 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 2.5) internal successors, (25), 9 states have internal predecessors, (25), 4 states have call successors, (4), 4 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) Word has length 18 [2022-04-07 18:33:59,093 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 18:33:59,093 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 10 states, 10 states have (on average 2.5) internal successors, (25), 9 states have internal predecessors, (25), 4 states have call successors, (4), 4 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-07 18:33:59,112 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 31 edges. 31 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 18:33:59,112 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2022-04-07 18:33:59,112 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 18:33:59,113 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2022-04-07 18:33:59,113 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=57, Unknown=0, NotChecked=0, Total=90 [2022-04-07 18:33:59,114 INFO L87 Difference]: Start difference. First operand 40 states and 48 transitions. Second operand has 10 states, 10 states have (on average 2.5) internal successors, (25), 9 states have internal predecessors, (25), 4 states have call successors, (4), 4 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-07 18:33:59,338 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:33:59,338 INFO L93 Difference]: Finished difference Result 84 states and 102 transitions. [2022-04-07 18:33:59,338 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-04-07 18:33:59,338 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 2.5) internal successors, (25), 9 states have internal predecessors, (25), 4 states have call successors, (4), 4 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) Word has length 18 [2022-04-07 18:33:59,338 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 18:33:59,339 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 2.5) internal successors, (25), 9 states have internal predecessors, (25), 4 states have call successors, (4), 4 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-07 18:33:59,341 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 106 transitions. [2022-04-07 18:33:59,341 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 2.5) internal successors, (25), 9 states have internal predecessors, (25), 4 states have call successors, (4), 4 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-07 18:33:59,343 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 106 transitions. [2022-04-07 18:33:59,343 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 13 states and 106 transitions. [2022-04-07 18:33:59,419 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 106 edges. 106 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 18:33:59,420 INFO L225 Difference]: With dead ends: 84 [2022-04-07 18:33:59,420 INFO L226 Difference]: Without dead ends: 84 [2022-04-07 18:33:59,420 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 27 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=63, Invalid=119, Unknown=0, NotChecked=0, Total=182 [2022-04-07 18:33:59,421 INFO L913 BasicCegarLoop]: 27 mSDtfsCounter, 76 mSDsluCounter, 130 mSDsCounter, 0 mSdLazyCounter, 43 mSolverCounterSat, 23 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 76 SdHoareTripleChecker+Valid, 157 SdHoareTripleChecker+Invalid, 66 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 23 IncrementalHoareTripleChecker+Valid, 43 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 18:33:59,421 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [76 Valid, 157 Invalid, 66 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [23 Valid, 43 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 18:33:59,421 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 84 states. [2022-04-07 18:33:59,425 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 84 to 77. [2022-04-07 18:33:59,425 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 18:33:59,425 INFO L82 GeneralOperation]: Start isEquivalent. First operand 84 states. Second operand has 77 states, 59 states have (on average 1.3728813559322033) internal successors, (81), 63 states have internal predecessors, (81), 11 states have call successors, (11), 7 states have call predecessors, (11), 6 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-07 18:33:59,425 INFO L74 IsIncluded]: Start isIncluded. First operand 84 states. Second operand has 77 states, 59 states have (on average 1.3728813559322033) internal successors, (81), 63 states have internal predecessors, (81), 11 states have call successors, (11), 7 states have call predecessors, (11), 6 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-07 18:33:59,425 INFO L87 Difference]: Start difference. First operand 84 states. Second operand has 77 states, 59 states have (on average 1.3728813559322033) internal successors, (81), 63 states have internal predecessors, (81), 11 states have call successors, (11), 7 states have call predecessors, (11), 6 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-07 18:33:59,427 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:33:59,428 INFO L93 Difference]: Finished difference Result 84 states and 102 transitions. [2022-04-07 18:33:59,428 INFO L276 IsEmpty]: Start isEmpty. Operand 84 states and 102 transitions. [2022-04-07 18:33:59,428 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 18:33:59,428 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 18:33:59,428 INFO L74 IsIncluded]: Start isIncluded. First operand has 77 states, 59 states have (on average 1.3728813559322033) internal successors, (81), 63 states have internal predecessors, (81), 11 states have call successors, (11), 7 states have call predecessors, (11), 6 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) Second operand 84 states. [2022-04-07 18:33:59,429 INFO L87 Difference]: Start difference. First operand has 77 states, 59 states have (on average 1.3728813559322033) internal successors, (81), 63 states have internal predecessors, (81), 11 states have call successors, (11), 7 states have call predecessors, (11), 6 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) Second operand 84 states. [2022-04-07 18:33:59,431 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:33:59,431 INFO L93 Difference]: Finished difference Result 84 states and 102 transitions. [2022-04-07 18:33:59,431 INFO L276 IsEmpty]: Start isEmpty. Operand 84 states and 102 transitions. [2022-04-07 18:33:59,431 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 18:33:59,431 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 18:33:59,431 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 18:33:59,431 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 18:33:59,432 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 77 states, 59 states have (on average 1.3728813559322033) internal successors, (81), 63 states have internal predecessors, (81), 11 states have call successors, (11), 7 states have call predecessors, (11), 6 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-07 18:33:59,433 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77 states to 77 states and 98 transitions. [2022-04-07 18:33:59,433 INFO L78 Accepts]: Start accepts. Automaton has 77 states and 98 transitions. Word has length 18 [2022-04-07 18:33:59,433 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 18:33:59,433 INFO L478 AbstractCegarLoop]: Abstraction has 77 states and 98 transitions. [2022-04-07 18:33:59,434 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 2.5) internal successors, (25), 9 states have internal predecessors, (25), 4 states have call successors, (4), 4 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-07 18:33:59,434 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 98 transitions. [2022-04-07 18:33:59,434 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-04-07 18:33:59,434 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 18:33:59,434 INFO L499 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 18:33:59,455 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Ended with exit code 0 [2022-04-07 18:33:59,647 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5,5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 18:33:59,648 INFO L403 AbstractCegarLoop]: === Iteration 7 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 18:33:59,648 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 18:33:59,648 INFO L85 PathProgramCache]: Analyzing trace with hash 2052329254, now seen corresponding path program 1 times [2022-04-07 18:33:59,648 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 18:33:59,648 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1950980893] [2022-04-07 18:33:59,648 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 18:33:59,648 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 18:33:59,658 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-04-07 18:33:59,658 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1145411688] [2022-04-07 18:33:59,658 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 18:33:59,659 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 18:33:59,659 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 18:33:59,659 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 18:33:59,660 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-04-07 18:33:59,702 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 18:33:59,702 INFO L263 TraceCheckSpWp]: Trace formula consists of 81 conjuncts, 14 conjunts are in the unsatisfiable core [2022-04-07 18:33:59,734 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 18:33:59,734 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 18:33:59,939 INFO L272 TraceCheckUtils]: 0: Hoare triple {1341#true} [85] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1341#true} is VALID [2022-04-07 18:33:59,940 INFO L290 TraceCheckUtils]: 1: Hoare triple {1341#true} [87] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0) (= v_~counter~0_5 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{~counter~0=v_~counter~0_5, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[~counter~0, #NULL.offset, #NULL.base] {1341#true} is VALID [2022-04-07 18:33:59,940 INFO L290 TraceCheckUtils]: 2: Hoare triple {1341#true} [90] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1341#true} is VALID [2022-04-07 18:33:59,940 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1341#true} {1341#true} [115] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1341#true} is VALID [2022-04-07 18:33:59,940 INFO L272 TraceCheckUtils]: 4: Hoare triple {1341#true} [86] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1341#true} is VALID [2022-04-07 18:33:59,940 INFO L290 TraceCheckUtils]: 5: Hoare triple {1341#true} [89] mainENTRY-->L34-3: Formula: (and (= v_main_~B~0_2 1) (= v_main_~B~0_2 v_main_~b~0_3) (= v_main_~q~0_2 0) (= v_main_~A~0_2 |v_main_#t~nondet1_2|) (= v_main_~A~0_2 v_main_~r~0_2)) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~q~0=v_main_~q~0_2, main_~B~0=v_main_~B~0_2, main_~b~0=v_main_~b~0_3, main_~A~0=v_main_~A~0_2, main_~r~0=v_main_~r~0_2} AuxVars[] AssignedVars[main_~q~0, main_#t~nondet1, main_~B~0, main_~b~0, main_~A~0, main_~r~0] {1361#(and (= main_~b~0 1) (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:33:59,941 INFO L290 TraceCheckUtils]: 6: Hoare triple {1361#(and (= main_~b~0 1) (= main_~A~0 main_~r~0) (= main_~q~0 0))} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {1361#(and (= main_~b~0 1) (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:33:59,941 INFO L290 TraceCheckUtils]: 7: Hoare triple {1361#(and (= main_~b~0 1) (= main_~A~0 main_~r~0) (= main_~q~0 0))} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 10) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {1361#(and (= main_~b~0 1) (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:33:59,941 INFO L290 TraceCheckUtils]: 8: Hoare triple {1361#(and (= main_~b~0 1) (= main_~A~0 main_~r~0) (= main_~q~0 0))} [101] L35-->L34-3: Formula: (and (= (* 2 v_main_~b~0_13) v_main_~b~0_12) (<= (mod v_main_~b~0_13 4294967296) (mod v_main_~r~0_10 4294967296))) InVars {main_~b~0=v_main_~b~0_13, main_~r~0=v_main_~r~0_10} OutVars{main_~b~0=v_main_~b~0_12, main_~r~0=v_main_~r~0_10} AuxVars[] AssignedVars[main_~b~0] {1371#(and (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} is VALID [2022-04-07 18:33:59,942 INFO L290 TraceCheckUtils]: 9: Hoare triple {1371#(and (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {1371#(and (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} is VALID [2022-04-07 18:33:59,942 INFO L290 TraceCheckUtils]: 10: Hoare triple {1371#(and (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 10) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {1371#(and (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} is VALID [2022-04-07 18:33:59,942 INFO L290 TraceCheckUtils]: 11: Hoare triple {1371#(and (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} [100] L35-->L43-2: Formula: (not (<= (mod v_main_~b~0_11 4294967296) (mod v_main_~r~0_9 4294967296))) InVars {main_~b~0=v_main_~b~0_11, main_~r~0=v_main_~r~0_9} OutVars{main_~b~0=v_main_~b~0_11, main_~r~0=v_main_~r~0_9} AuxVars[] AssignedVars[] {1371#(and (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} is VALID [2022-04-07 18:33:59,943 INFO L290 TraceCheckUtils]: 12: Hoare triple {1371#(and (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} [94] L43-2-->L38: Formula: (and (= |v_main_#t~post3_1| v_~counter~0_2) (= (+ |v_main_#t~post3_1| 1) v_~counter~0_1)) InVars {~counter~0=v_~counter~0_2} OutVars{~counter~0=v_~counter~0_1, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post3] {1371#(and (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} is VALID [2022-04-07 18:33:59,943 INFO L290 TraceCheckUtils]: 13: Hoare triple {1371#(and (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} [99] L38-->L39: Formula: (< |v_main_#t~post3_5| 10) InVars {main_#t~post3=|v_main_#t~post3_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post3] {1371#(and (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} is VALID [2022-04-07 18:33:59,943 INFO L272 TraceCheckUtils]: 14: Hoare triple {1371#(and (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} [104] L39-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~A~0_6 4294967296) (mod (+ v_main_~r~0_11 (* v_main_~q~0_10 v_main_~b~0_14)) 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~q~0=v_main_~q~0_10, main_~A~0=v_main_~A~0_6, main_~b~0=v_main_~b~0_14, main_~r~0=v_main_~r~0_11} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {1390#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 18:33:59,944 INFO L290 TraceCheckUtils]: 15: Hoare triple {1390#(<= 1 |__VERIFIER_assert_#in~cond|)} [103] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1394#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 18:33:59,944 INFO L290 TraceCheckUtils]: 16: Hoare triple {1394#(<= 1 __VERIFIER_assert_~cond)} [106] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1342#false} is VALID [2022-04-07 18:33:59,944 INFO L290 TraceCheckUtils]: 17: Hoare triple {1342#false} [110] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1342#false} is VALID [2022-04-07 18:33:59,944 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 18:33:59,944 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 18:34:00,301 INFO L290 TraceCheckUtils]: 17: Hoare triple {1342#false} [110] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1342#false} is VALID [2022-04-07 18:34:00,301 INFO L290 TraceCheckUtils]: 16: Hoare triple {1394#(<= 1 __VERIFIER_assert_~cond)} [106] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1342#false} is VALID [2022-04-07 18:34:00,302 INFO L290 TraceCheckUtils]: 15: Hoare triple {1390#(<= 1 |__VERIFIER_assert_#in~cond|)} [103] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1394#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 18:34:00,303 INFO L272 TraceCheckUtils]: 14: Hoare triple {1410#(forall ((main_~b~0 Int)) (= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296)))} [104] L39-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~A~0_6 4294967296) (mod (+ v_main_~r~0_11 (* v_main_~q~0_10 v_main_~b~0_14)) 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~q~0=v_main_~q~0_10, main_~A~0=v_main_~A~0_6, main_~b~0=v_main_~b~0_14, main_~r~0=v_main_~r~0_11} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {1390#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 18:34:00,303 INFO L290 TraceCheckUtils]: 13: Hoare triple {1410#(forall ((main_~b~0 Int)) (= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296)))} [99] L38-->L39: Formula: (< |v_main_#t~post3_5| 10) InVars {main_#t~post3=|v_main_#t~post3_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post3] {1410#(forall ((main_~b~0 Int)) (= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296)))} is VALID [2022-04-07 18:34:00,304 INFO L290 TraceCheckUtils]: 12: Hoare triple {1410#(forall ((main_~b~0 Int)) (= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296)))} [94] L43-2-->L38: Formula: (and (= |v_main_#t~post3_1| v_~counter~0_2) (= (+ |v_main_#t~post3_1| 1) v_~counter~0_1)) InVars {~counter~0=v_~counter~0_2} OutVars{~counter~0=v_~counter~0_1, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post3] {1410#(forall ((main_~b~0 Int)) (= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296)))} is VALID [2022-04-07 18:34:00,304 INFO L290 TraceCheckUtils]: 11: Hoare triple {1410#(forall ((main_~b~0 Int)) (= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296)))} [100] L35-->L43-2: Formula: (not (<= (mod v_main_~b~0_11 4294967296) (mod v_main_~r~0_9 4294967296))) InVars {main_~b~0=v_main_~b~0_11, main_~r~0=v_main_~r~0_9} OutVars{main_~b~0=v_main_~b~0_11, main_~r~0=v_main_~r~0_9} AuxVars[] AssignedVars[] {1410#(forall ((main_~b~0 Int)) (= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296)))} is VALID [2022-04-07 18:34:00,304 INFO L290 TraceCheckUtils]: 10: Hoare triple {1410#(forall ((main_~b~0 Int)) (= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296)))} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 10) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {1410#(forall ((main_~b~0 Int)) (= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296)))} is VALID [2022-04-07 18:34:00,305 INFO L290 TraceCheckUtils]: 9: Hoare triple {1410#(forall ((main_~b~0 Int)) (= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296)))} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {1410#(forall ((main_~b~0 Int)) (= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296)))} is VALID [2022-04-07 18:34:00,305 INFO L290 TraceCheckUtils]: 8: Hoare triple {1429#(or (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (forall ((main_~b~0 Int)) (= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296))))} [101] L35-->L34-3: Formula: (and (= (* 2 v_main_~b~0_13) v_main_~b~0_12) (<= (mod v_main_~b~0_13 4294967296) (mod v_main_~r~0_10 4294967296))) InVars {main_~b~0=v_main_~b~0_13, main_~r~0=v_main_~r~0_10} OutVars{main_~b~0=v_main_~b~0_12, main_~r~0=v_main_~r~0_10} AuxVars[] AssignedVars[main_~b~0] {1410#(forall ((main_~b~0 Int)) (= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296)))} is VALID [2022-04-07 18:34:00,306 INFO L290 TraceCheckUtils]: 7: Hoare triple {1429#(or (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (forall ((main_~b~0 Int)) (= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296))))} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 10) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {1429#(or (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (forall ((main_~b~0 Int)) (= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296))))} is VALID [2022-04-07 18:34:00,306 INFO L290 TraceCheckUtils]: 6: Hoare triple {1429#(or (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (forall ((main_~b~0 Int)) (= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296))))} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {1429#(or (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (forall ((main_~b~0 Int)) (= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296))))} is VALID [2022-04-07 18:34:00,307 INFO L290 TraceCheckUtils]: 5: Hoare triple {1341#true} [89] mainENTRY-->L34-3: Formula: (and (= v_main_~B~0_2 1) (= v_main_~B~0_2 v_main_~b~0_3) (= v_main_~q~0_2 0) (= v_main_~A~0_2 |v_main_#t~nondet1_2|) (= v_main_~A~0_2 v_main_~r~0_2)) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~q~0=v_main_~q~0_2, main_~B~0=v_main_~B~0_2, main_~b~0=v_main_~b~0_3, main_~A~0=v_main_~A~0_2, main_~r~0=v_main_~r~0_2} AuxVars[] AssignedVars[main_~q~0, main_#t~nondet1, main_~B~0, main_~b~0, main_~A~0, main_~r~0] {1429#(or (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (forall ((main_~b~0 Int)) (= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296))))} is VALID [2022-04-07 18:34:00,307 INFO L272 TraceCheckUtils]: 4: Hoare triple {1341#true} [86] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1341#true} is VALID [2022-04-07 18:34:00,307 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1341#true} {1341#true} [115] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1341#true} is VALID [2022-04-07 18:34:00,307 INFO L290 TraceCheckUtils]: 2: Hoare triple {1341#true} [90] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1341#true} is VALID [2022-04-07 18:34:00,307 INFO L290 TraceCheckUtils]: 1: Hoare triple {1341#true} [87] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0) (= v_~counter~0_5 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{~counter~0=v_~counter~0_5, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[~counter~0, #NULL.offset, #NULL.base] {1341#true} is VALID [2022-04-07 18:34:00,308 INFO L272 TraceCheckUtils]: 0: Hoare triple {1341#true} [85] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1341#true} is VALID [2022-04-07 18:34:00,308 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 18:34:00,308 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 18:34:00,308 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1950980893] [2022-04-07 18:34:00,308 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-04-07 18:34:00,308 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1145411688] [2022-04-07 18:34:00,308 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1145411688] provided 1 perfect and 1 imperfect interpolant sequences [2022-04-07 18:34:00,308 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-07 18:34:00,308 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [6] total 8 [2022-04-07 18:34:00,308 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [336057103] [2022-04-07 18:34:00,308 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 18:34:00,309 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 2.3333333333333335) internal successors, (14), 5 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-07 18:34:00,309 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 18:34:00,309 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 6 states, 6 states have (on average 2.3333333333333335) internal successors, (14), 5 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:34:02,347 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 18 edges. 17 inductive. 0 not inductive. 1 times theorem prover too weak to decide inductivity. [2022-04-07 18:34:02,347 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-04-07 18:34:02,347 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 18:34:02,348 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-04-07 18:34:02,348 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2022-04-07 18:34:02,348 INFO L87 Difference]: Start difference. First operand 77 states and 98 transitions. Second operand has 6 states, 6 states have (on average 2.3333333333333335) internal successors, (14), 5 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:34:02,433 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:34:02,433 INFO L93 Difference]: Finished difference Result 108 states and 130 transitions. [2022-04-07 18:34:02,433 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-04-07 18:34:02,433 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 2.3333333333333335) internal successors, (14), 5 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-07 18:34:02,434 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 18:34:02,434 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 2.3333333333333335) internal successors, (14), 5 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:34:02,435 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 40 transitions. [2022-04-07 18:34:02,435 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 2.3333333333333335) internal successors, (14), 5 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:34:02,435 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 40 transitions. [2022-04-07 18:34:02,436 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 6 states and 40 transitions. [2022-04-07 18:34:04,505 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 40 edges. 39 inductive. 0 not inductive. 1 times theorem prover too weak to decide inductivity. [2022-04-07 18:34:04,507 INFO L225 Difference]: With dead ends: 108 [2022-04-07 18:34:04,507 INFO L226 Difference]: Without dead ends: 108 [2022-04-07 18:34:04,507 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 28 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=50, Unknown=0, NotChecked=0, Total=72 [2022-04-07 18:34:04,507 INFO L913 BasicCegarLoop]: 31 mSDtfsCounter, 11 mSDsluCounter, 67 mSDsCounter, 0 mSdLazyCounter, 8 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 11 SdHoareTripleChecker+Valid, 98 SdHoareTripleChecker+Invalid, 25 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 8 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 17 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 18:34:04,507 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [11 Valid, 98 Invalid, 25 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 8 Invalid, 0 Unknown, 17 Unchecked, 0.0s Time] [2022-04-07 18:34:04,508 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 108 states. [2022-04-07 18:34:04,512 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 108 to 107. [2022-04-07 18:34:04,512 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 18:34:04,512 INFO L82 GeneralOperation]: Start isEquivalent. First operand 108 states. Second operand has 107 states, 81 states have (on average 1.2839506172839505) internal successors, (104), 89 states have internal predecessors, (104), 15 states have call successors, (15), 11 states have call predecessors, (15), 10 states have return successors, (10), 6 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-07 18:34:04,513 INFO L74 IsIncluded]: Start isIncluded. First operand 108 states. Second operand has 107 states, 81 states have (on average 1.2839506172839505) internal successors, (104), 89 states have internal predecessors, (104), 15 states have call successors, (15), 11 states have call predecessors, (15), 10 states have return successors, (10), 6 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-07 18:34:04,513 INFO L87 Difference]: Start difference. First operand 108 states. Second operand has 107 states, 81 states have (on average 1.2839506172839505) internal successors, (104), 89 states have internal predecessors, (104), 15 states have call successors, (15), 11 states have call predecessors, (15), 10 states have return successors, (10), 6 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-07 18:34:04,515 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:34:04,515 INFO L93 Difference]: Finished difference Result 108 states and 130 transitions. [2022-04-07 18:34:04,515 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 130 transitions. [2022-04-07 18:34:04,516 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 18:34:04,516 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 18:34:04,516 INFO L74 IsIncluded]: Start isIncluded. First operand has 107 states, 81 states have (on average 1.2839506172839505) internal successors, (104), 89 states have internal predecessors, (104), 15 states have call successors, (15), 11 states have call predecessors, (15), 10 states have return successors, (10), 6 states have call predecessors, (10), 10 states have call successors, (10) Second operand 108 states. [2022-04-07 18:34:04,516 INFO L87 Difference]: Start difference. First operand has 107 states, 81 states have (on average 1.2839506172839505) internal successors, (104), 89 states have internal predecessors, (104), 15 states have call successors, (15), 11 states have call predecessors, (15), 10 states have return successors, (10), 6 states have call predecessors, (10), 10 states have call successors, (10) Second operand 108 states. [2022-04-07 18:34:04,520 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:34:04,520 INFO L93 Difference]: Finished difference Result 108 states and 130 transitions. [2022-04-07 18:34:04,520 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 130 transitions. [2022-04-07 18:34:04,521 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 18:34:04,521 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 18:34:04,521 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 18:34:04,521 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 18:34:04,521 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 107 states, 81 states have (on average 1.2839506172839505) internal successors, (104), 89 states have internal predecessors, (104), 15 states have call successors, (15), 11 states have call predecessors, (15), 10 states have return successors, (10), 6 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-07 18:34:04,527 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 107 states to 107 states and 129 transitions. [2022-04-07 18:34:04,527 INFO L78 Accepts]: Start accepts. Automaton has 107 states and 129 transitions. Word has length 18 [2022-04-07 18:34:04,528 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 18:34:04,528 INFO L478 AbstractCegarLoop]: Abstraction has 107 states and 129 transitions. [2022-04-07 18:34:04,528 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 2.3333333333333335) internal successors, (14), 5 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:34:04,528 INFO L276 IsEmpty]: Start isEmpty. Operand 107 states and 129 transitions. [2022-04-07 18:34:04,528 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2022-04-07 18:34:04,528 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 18:34:04,528 INFO L499 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 18:34:04,547 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2022-04-07 18:34:04,745 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6,6 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 18:34:04,746 INFO L403 AbstractCegarLoop]: === Iteration 8 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 18:34:04,746 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 18:34:04,746 INFO L85 PathProgramCache]: Analyzing trace with hash 462666167, now seen corresponding path program 1 times [2022-04-07 18:34:04,746 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 18:34:04,746 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [396115976] [2022-04-07 18:34:04,746 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 18:34:04,746 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 18:34:04,755 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-04-07 18:34:04,755 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [668814646] [2022-04-07 18:34:04,755 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 18:34:04,755 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 18:34:04,756 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 18:34:04,756 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 18:34:04,757 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-04-07 18:34:04,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 18:34:04,790 INFO L263 TraceCheckSpWp]: Trace formula consists of 97 conjuncts, 5 conjunts are in the unsatisfiable core [2022-04-07 18:34:04,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 18:34:04,795 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 18:34:04,858 INFO L272 TraceCheckUtils]: 0: Hoare triple {1889#true} [85] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1889#true} is VALID [2022-04-07 18:34:04,858 INFO L290 TraceCheckUtils]: 1: Hoare triple {1889#true} [87] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0) (= v_~counter~0_5 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{~counter~0=v_~counter~0_5, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[~counter~0, #NULL.offset, #NULL.base] {1889#true} is VALID [2022-04-07 18:34:04,858 INFO L290 TraceCheckUtils]: 2: Hoare triple {1889#true} [90] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1889#true} is VALID [2022-04-07 18:34:04,858 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1889#true} {1889#true} [115] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1889#true} is VALID [2022-04-07 18:34:04,858 INFO L272 TraceCheckUtils]: 4: Hoare triple {1889#true} [86] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1889#true} is VALID [2022-04-07 18:34:04,859 INFO L290 TraceCheckUtils]: 5: Hoare triple {1889#true} [89] mainENTRY-->L34-3: Formula: (and (= v_main_~B~0_2 1) (= v_main_~B~0_2 v_main_~b~0_3) (= v_main_~q~0_2 0) (= v_main_~A~0_2 |v_main_#t~nondet1_2|) (= v_main_~A~0_2 v_main_~r~0_2)) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~q~0=v_main_~q~0_2, main_~B~0=v_main_~B~0_2, main_~b~0=v_main_~b~0_3, main_~A~0=v_main_~A~0_2, main_~r~0=v_main_~r~0_2} AuxVars[] AssignedVars[main_~q~0, main_#t~nondet1, main_~B~0, main_~b~0, main_~A~0, main_~r~0] {1909#(and (= main_~B~0 main_~b~0) (= main_~B~0 1))} is VALID [2022-04-07 18:34:04,859 INFO L290 TraceCheckUtils]: 6: Hoare triple {1909#(and (= main_~B~0 main_~b~0) (= main_~B~0 1))} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {1909#(and (= main_~B~0 main_~b~0) (= main_~B~0 1))} is VALID [2022-04-07 18:34:04,859 INFO L290 TraceCheckUtils]: 7: Hoare triple {1909#(and (= main_~B~0 main_~b~0) (= main_~B~0 1))} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 10) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {1909#(and (= main_~B~0 main_~b~0) (= main_~B~0 1))} is VALID [2022-04-07 18:34:04,860 INFO L290 TraceCheckUtils]: 8: Hoare triple {1909#(and (= main_~B~0 main_~b~0) (= main_~B~0 1))} [100] L35-->L43-2: Formula: (not (<= (mod v_main_~b~0_11 4294967296) (mod v_main_~r~0_9 4294967296))) InVars {main_~b~0=v_main_~b~0_11, main_~r~0=v_main_~r~0_9} OutVars{main_~b~0=v_main_~b~0_11, main_~r~0=v_main_~r~0_9} AuxVars[] AssignedVars[] {1909#(and (= main_~B~0 main_~b~0) (= main_~B~0 1))} is VALID [2022-04-07 18:34:04,860 INFO L290 TraceCheckUtils]: 9: Hoare triple {1909#(and (= main_~B~0 main_~b~0) (= main_~B~0 1))} [94] L43-2-->L38: Formula: (and (= |v_main_#t~post3_1| v_~counter~0_2) (= (+ |v_main_#t~post3_1| 1) v_~counter~0_1)) InVars {~counter~0=v_~counter~0_2} OutVars{~counter~0=v_~counter~0_1, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post3] {1909#(and (= main_~B~0 main_~b~0) (= main_~B~0 1))} is VALID [2022-04-07 18:34:04,860 INFO L290 TraceCheckUtils]: 10: Hoare triple {1909#(and (= main_~B~0 main_~b~0) (= main_~B~0 1))} [99] L38-->L39: Formula: (< |v_main_#t~post3_5| 10) InVars {main_#t~post3=|v_main_#t~post3_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post3] {1909#(and (= main_~B~0 main_~b~0) (= main_~B~0 1))} is VALID [2022-04-07 18:34:04,861 INFO L272 TraceCheckUtils]: 11: Hoare triple {1909#(and (= main_~B~0 main_~b~0) (= main_~B~0 1))} [104] L39-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~A~0_6 4294967296) (mod (+ v_main_~r~0_11 (* v_main_~q~0_10 v_main_~b~0_14)) 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~q~0=v_main_~q~0_10, main_~A~0=v_main_~A~0_6, main_~b~0=v_main_~b~0_14, main_~r~0=v_main_~r~0_11} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {1889#true} is VALID [2022-04-07 18:34:04,861 INFO L290 TraceCheckUtils]: 12: Hoare triple {1889#true} [103] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1889#true} is VALID [2022-04-07 18:34:04,861 INFO L290 TraceCheckUtils]: 13: Hoare triple {1889#true} [107] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_3 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1889#true} is VALID [2022-04-07 18:34:04,861 INFO L290 TraceCheckUtils]: 14: Hoare triple {1889#true} [112] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1889#true} is VALID [2022-04-07 18:34:04,862 INFO L284 TraceCheckUtils]: 15: Hoare quadruple {1889#true} {1909#(and (= main_~B~0 main_~b~0) (= main_~B~0 1))} [117] __VERIFIER_assertEXIT-->L39-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= (ite (= (mod v_main_~A~0_6 4294967296) (mod (+ v_main_~r~0_11 (* v_main_~q~0_10 v_main_~b~0_14)) 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~q~0=v_main_~q~0_10, main_~A~0=v_main_~A~0_6, main_~b~0=v_main_~b~0_14, main_~r~0=v_main_~r~0_11} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {1909#(and (= main_~B~0 main_~b~0) (= main_~B~0 1))} is VALID [2022-04-07 18:34:04,863 INFO L290 TraceCheckUtils]: 16: Hoare triple {1909#(and (= main_~B~0 main_~b~0) (= main_~B~0 1))} [109] L39-1-->L43: Formula: (let ((.cse0 (mod v_main_~b~0_7 4294967296))) (and (= (* v_main_~q~0_6 2) v_main_~q~0_5) (= v_main_~b~0_6 (div .cse0 2)) (not (= (mod v_main_~B~0_5 4294967296) .cse0)))) InVars {main_~q~0=v_main_~q~0_6, main_~B~0=v_main_~B~0_5, main_~b~0=v_main_~b~0_7} OutVars{main_~q~0=v_main_~q~0_5, main_~B~0=v_main_~B~0_5, main_~b~0=v_main_~b~0_6} AuxVars[] AssignedVars[main_~q~0, main_~b~0] {1890#false} is VALID [2022-04-07 18:34:04,863 INFO L290 TraceCheckUtils]: 17: Hoare triple {1890#false} [113] L43-->L43-2: Formula: (and (<= (mod v_main_~b~0_8 4294967296) (mod v_main_~r~0_6 4294967296)) (= v_main_~q~0_7 (+ v_main_~q~0_8 1)) (= (+ (* (- 1) v_main_~b~0_8) v_main_~r~0_6) v_main_~r~0_5)) InVars {main_~q~0=v_main_~q~0_8, main_~b~0=v_main_~b~0_8, main_~r~0=v_main_~r~0_6} OutVars{main_~q~0=v_main_~q~0_7, main_~b~0=v_main_~b~0_8, main_~r~0=v_main_~r~0_5} AuxVars[] AssignedVars[main_~q~0, main_~r~0] {1890#false} is VALID [2022-04-07 18:34:04,863 INFO L290 TraceCheckUtils]: 18: Hoare triple {1890#false} [94] L43-2-->L38: Formula: (and (= |v_main_#t~post3_1| v_~counter~0_2) (= (+ |v_main_#t~post3_1| 1) v_~counter~0_1)) InVars {~counter~0=v_~counter~0_2} OutVars{~counter~0=v_~counter~0_1, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post3] {1890#false} is VALID [2022-04-07 18:34:04,863 INFO L290 TraceCheckUtils]: 19: Hoare triple {1890#false} [99] L38-->L39: Formula: (< |v_main_#t~post3_5| 10) InVars {main_#t~post3=|v_main_#t~post3_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post3] {1890#false} is VALID [2022-04-07 18:34:04,863 INFO L272 TraceCheckUtils]: 20: Hoare triple {1890#false} [104] L39-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~A~0_6 4294967296) (mod (+ v_main_~r~0_11 (* v_main_~q~0_10 v_main_~b~0_14)) 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~q~0=v_main_~q~0_10, main_~A~0=v_main_~A~0_6, main_~b~0=v_main_~b~0_14, main_~r~0=v_main_~r~0_11} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {1890#false} is VALID [2022-04-07 18:34:04,863 INFO L290 TraceCheckUtils]: 21: Hoare triple {1890#false} [103] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1890#false} is VALID [2022-04-07 18:34:04,863 INFO L290 TraceCheckUtils]: 22: Hoare triple {1890#false} [106] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1890#false} is VALID [2022-04-07 18:34:04,864 INFO L290 TraceCheckUtils]: 23: Hoare triple {1890#false} [110] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1890#false} is VALID [2022-04-07 18:34:04,864 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 18:34:04,864 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-07 18:34:04,864 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 18:34:04,864 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [396115976] [2022-04-07 18:34:04,864 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-04-07 18:34:04,864 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [668814646] [2022-04-07 18:34:04,864 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [668814646] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 18:34:04,864 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 18:34:04,864 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-07 18:34:04,864 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [561811562] [2022-04-07 18:34:04,864 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 18:34:04,865 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 3 states have call successors, (4), 2 states have call predecessors, (4), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Word has length 24 [2022-04-07 18:34:04,865 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 18:34:04,865 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 3 states have call successors, (4), 2 states have call predecessors, (4), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 18:34:04,879 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 24 edges. 24 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 18:34:04,880 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-07 18:34:04,880 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 18:34:04,880 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-07 18:34:04,880 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-07 18:34:04,880 INFO L87 Difference]: Start difference. First operand 107 states and 129 transitions. Second operand has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 3 states have call successors, (4), 2 states have call predecessors, (4), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 18:34:04,913 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:34:04,913 INFO L93 Difference]: Finished difference Result 103 states and 122 transitions. [2022-04-07 18:34:04,913 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-07 18:34:04,913 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 3 states have call successors, (4), 2 states have call predecessors, (4), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Word has length 24 [2022-04-07 18:34:04,914 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 18:34:04,914 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 3 states have call successors, (4), 2 states have call predecessors, (4), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 18:34:04,914 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 35 transitions. [2022-04-07 18:34:04,914 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 3 states have call successors, (4), 2 states have call predecessors, (4), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 18:34:04,915 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 35 transitions. [2022-04-07 18:34:04,915 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 35 transitions. [2022-04-07 18:34:04,938 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 35 edges. 35 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 18:34:04,940 INFO L225 Difference]: With dead ends: 103 [2022-04-07 18:34:04,940 INFO L226 Difference]: Without dead ends: 93 [2022-04-07 18:34:04,940 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-07 18:34:04,940 INFO L913 BasicCegarLoop]: 25 mSDtfsCounter, 0 mSDsluCounter, 17 mSDsCounter, 0 mSdLazyCounter, 10 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 42 SdHoareTripleChecker+Invalid, 10 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 10 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 18:34:04,940 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [0 Valid, 42 Invalid, 10 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 10 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 18:34:04,941 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 93 states. [2022-04-07 18:34:04,944 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 93 to 93. [2022-04-07 18:34:04,944 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 18:34:04,944 INFO L82 GeneralOperation]: Start isEquivalent. First operand 93 states. Second operand has 93 states, 71 states have (on average 1.2816901408450705) internal successors, (91), 77 states have internal predecessors, (91), 13 states have call successors, (13), 10 states have call predecessors, (13), 8 states have return successors, (8), 5 states have call predecessors, (8), 8 states have call successors, (8) [2022-04-07 18:34:04,945 INFO L74 IsIncluded]: Start isIncluded. First operand 93 states. Second operand has 93 states, 71 states have (on average 1.2816901408450705) internal successors, (91), 77 states have internal predecessors, (91), 13 states have call successors, (13), 10 states have call predecessors, (13), 8 states have return successors, (8), 5 states have call predecessors, (8), 8 states have call successors, (8) [2022-04-07 18:34:04,945 INFO L87 Difference]: Start difference. First operand 93 states. Second operand has 93 states, 71 states have (on average 1.2816901408450705) internal successors, (91), 77 states have internal predecessors, (91), 13 states have call successors, (13), 10 states have call predecessors, (13), 8 states have return successors, (8), 5 states have call predecessors, (8), 8 states have call successors, (8) [2022-04-07 18:34:04,947 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:34:04,947 INFO L93 Difference]: Finished difference Result 93 states and 112 transitions. [2022-04-07 18:34:04,947 INFO L276 IsEmpty]: Start isEmpty. Operand 93 states and 112 transitions. [2022-04-07 18:34:04,947 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 18:34:04,948 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 18:34:04,948 INFO L74 IsIncluded]: Start isIncluded. First operand has 93 states, 71 states have (on average 1.2816901408450705) internal successors, (91), 77 states have internal predecessors, (91), 13 states have call successors, (13), 10 states have call predecessors, (13), 8 states have return successors, (8), 5 states have call predecessors, (8), 8 states have call successors, (8) Second operand 93 states. [2022-04-07 18:34:04,948 INFO L87 Difference]: Start difference. First operand has 93 states, 71 states have (on average 1.2816901408450705) internal successors, (91), 77 states have internal predecessors, (91), 13 states have call successors, (13), 10 states have call predecessors, (13), 8 states have return successors, (8), 5 states have call predecessors, (8), 8 states have call successors, (8) Second operand 93 states. [2022-04-07 18:34:04,950 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:34:04,950 INFO L93 Difference]: Finished difference Result 93 states and 112 transitions. [2022-04-07 18:34:04,950 INFO L276 IsEmpty]: Start isEmpty. Operand 93 states and 112 transitions. [2022-04-07 18:34:04,950 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 18:34:04,950 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 18:34:04,950 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 18:34:04,951 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 18:34:04,951 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 93 states, 71 states have (on average 1.2816901408450705) internal successors, (91), 77 states have internal predecessors, (91), 13 states have call successors, (13), 10 states have call predecessors, (13), 8 states have return successors, (8), 5 states have call predecessors, (8), 8 states have call successors, (8) [2022-04-07 18:34:04,953 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 93 states to 93 states and 112 transitions. [2022-04-07 18:34:04,953 INFO L78 Accepts]: Start accepts. Automaton has 93 states and 112 transitions. Word has length 24 [2022-04-07 18:34:04,953 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 18:34:04,953 INFO L478 AbstractCegarLoop]: Abstraction has 93 states and 112 transitions. [2022-04-07 18:34:04,953 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 3 states have call successors, (4), 2 states have call predecessors, (4), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 18:34:04,953 INFO L276 IsEmpty]: Start isEmpty. Operand 93 states and 112 transitions. [2022-04-07 18:34:04,953 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2022-04-07 18:34:04,953 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 18:34:04,953 INFO L499 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 18:34:04,989 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2022-04-07 18:34:05,189 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7,7 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 18:34:05,190 INFO L403 AbstractCegarLoop]: === Iteration 9 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 18:34:05,190 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 18:34:05,190 INFO L85 PathProgramCache]: Analyzing trace with hash 1651364104, now seen corresponding path program 1 times [2022-04-07 18:34:05,190 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 18:34:05,190 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2141110401] [2022-04-07 18:34:05,190 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 18:34:05,190 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 18:34:05,204 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-04-07 18:34:05,204 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [2029006346] [2022-04-07 18:34:05,204 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 18:34:05,204 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 18:34:05,204 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 18:34:05,207 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 18:34:05,226 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2022-04-07 18:34:05,248 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 18:34:05,249 INFO L263 TraceCheckSpWp]: Trace formula consists of 92 conjuncts, 11 conjunts are in the unsatisfiable core [2022-04-07 18:34:05,255 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 18:34:05,255 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 18:34:05,416 INFO L272 TraceCheckUtils]: 0: Hoare triple {2345#true} [85] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2345#true} is VALID [2022-04-07 18:34:05,416 INFO L290 TraceCheckUtils]: 1: Hoare triple {2345#true} [87] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0) (= v_~counter~0_5 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{~counter~0=v_~counter~0_5, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[~counter~0, #NULL.offset, #NULL.base] {2345#true} is VALID [2022-04-07 18:34:05,417 INFO L290 TraceCheckUtils]: 2: Hoare triple {2345#true} [90] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2345#true} is VALID [2022-04-07 18:34:05,417 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2345#true} {2345#true} [115] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2345#true} is VALID [2022-04-07 18:34:05,417 INFO L272 TraceCheckUtils]: 4: Hoare triple {2345#true} [86] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2345#true} is VALID [2022-04-07 18:34:05,417 INFO L290 TraceCheckUtils]: 5: Hoare triple {2345#true} [89] mainENTRY-->L34-3: Formula: (and (= v_main_~B~0_2 1) (= v_main_~B~0_2 v_main_~b~0_3) (= v_main_~q~0_2 0) (= v_main_~A~0_2 |v_main_#t~nondet1_2|) (= v_main_~A~0_2 v_main_~r~0_2)) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~q~0=v_main_~q~0_2, main_~B~0=v_main_~B~0_2, main_~b~0=v_main_~b~0_3, main_~A~0=v_main_~A~0_2, main_~r~0=v_main_~r~0_2} AuxVars[] AssignedVars[main_~q~0, main_#t~nondet1, main_~B~0, main_~b~0, main_~A~0, main_~r~0] {2345#true} is VALID [2022-04-07 18:34:05,417 INFO L290 TraceCheckUtils]: 6: Hoare triple {2345#true} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {2345#true} is VALID [2022-04-07 18:34:05,417 INFO L290 TraceCheckUtils]: 7: Hoare triple {2345#true} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 10) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {2345#true} is VALID [2022-04-07 18:34:05,417 INFO L290 TraceCheckUtils]: 8: Hoare triple {2345#true} [101] L35-->L34-3: Formula: (and (= (* 2 v_main_~b~0_13) v_main_~b~0_12) (<= (mod v_main_~b~0_13 4294967296) (mod v_main_~r~0_10 4294967296))) InVars {main_~b~0=v_main_~b~0_13, main_~r~0=v_main_~r~0_10} OutVars{main_~b~0=v_main_~b~0_12, main_~r~0=v_main_~r~0_10} AuxVars[] AssignedVars[main_~b~0] {2345#true} is VALID [2022-04-07 18:34:05,417 INFO L290 TraceCheckUtils]: 9: Hoare triple {2345#true} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {2345#true} is VALID [2022-04-07 18:34:05,417 INFO L290 TraceCheckUtils]: 10: Hoare triple {2345#true} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 10) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {2345#true} is VALID [2022-04-07 18:34:05,418 INFO L290 TraceCheckUtils]: 11: Hoare triple {2345#true} [100] L35-->L43-2: Formula: (not (<= (mod v_main_~b~0_11 4294967296) (mod v_main_~r~0_9 4294967296))) InVars {main_~b~0=v_main_~b~0_11, main_~r~0=v_main_~r~0_9} OutVars{main_~b~0=v_main_~b~0_11, main_~r~0=v_main_~r~0_9} AuxVars[] AssignedVars[] {2345#true} is VALID [2022-04-07 18:34:05,418 INFO L290 TraceCheckUtils]: 12: Hoare triple {2345#true} [94] L43-2-->L38: Formula: (and (= |v_main_#t~post3_1| v_~counter~0_2) (= (+ |v_main_#t~post3_1| 1) v_~counter~0_1)) InVars {~counter~0=v_~counter~0_2} OutVars{~counter~0=v_~counter~0_1, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post3] {2345#true} is VALID [2022-04-07 18:34:05,418 INFO L290 TraceCheckUtils]: 13: Hoare triple {2345#true} [99] L38-->L39: Formula: (< |v_main_#t~post3_5| 10) InVars {main_#t~post3=|v_main_#t~post3_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post3] {2345#true} is VALID [2022-04-07 18:34:05,418 INFO L272 TraceCheckUtils]: 14: Hoare triple {2345#true} [104] L39-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~A~0_6 4294967296) (mod (+ v_main_~r~0_11 (* v_main_~q~0_10 v_main_~b~0_14)) 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~q~0=v_main_~q~0_10, main_~A~0=v_main_~A~0_6, main_~b~0=v_main_~b~0_14, main_~r~0=v_main_~r~0_11} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {2345#true} is VALID [2022-04-07 18:34:05,422 INFO L290 TraceCheckUtils]: 15: Hoare triple {2345#true} [103] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2395#(= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)} is VALID [2022-04-07 18:34:05,422 INFO L290 TraceCheckUtils]: 16: Hoare triple {2395#(= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)} [107] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_3 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2399#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 18:34:05,422 INFO L290 TraceCheckUtils]: 17: Hoare triple {2399#(not (= |__VERIFIER_assert_#in~cond| 0))} [112] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2399#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 18:34:05,423 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {2399#(not (= |__VERIFIER_assert_#in~cond| 0))} {2345#true} [117] __VERIFIER_assertEXIT-->L39-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= (ite (= (mod v_main_~A~0_6 4294967296) (mod (+ v_main_~r~0_11 (* v_main_~q~0_10 v_main_~b~0_14)) 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~q~0=v_main_~q~0_10, main_~A~0=v_main_~A~0_6, main_~b~0=v_main_~b~0_14, main_~r~0=v_main_~r~0_11} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {2406#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296))} is VALID [2022-04-07 18:34:05,424 INFO L290 TraceCheckUtils]: 19: Hoare triple {2406#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296))} [108] L39-1-->L38-2: Formula: (= (mod v_main_~B~0_1 4294967296) (mod v_main_~b~0_2 4294967296)) InVars {main_~b~0=v_main_~b~0_2, main_~B~0=v_main_~B~0_1} OutVars{main_~b~0=v_main_~b~0_2, main_~B~0=v_main_~B~0_1} AuxVars[] AssignedVars[] {2406#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296))} is VALID [2022-04-07 18:34:05,424 INFO L272 TraceCheckUtils]: 20: Hoare triple {2406#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296))} [97] L38-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_2| (ite (= (mod v_main_~A~0_7 4294967296) (mod (+ v_main_~r~0_12 (* v_main_~q~0_11 v_main_~b~0_15)) 4294967296)) 1 0)) InVars {main_~q~0=v_main_~q~0_11, main_~A~0=v_main_~A~0_7, main_~b~0=v_main_~b~0_15, main_~r~0=v_main_~r~0_12} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_2|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {2413#(= |__VERIFIER_assert_#in~cond| 1)} is VALID [2022-04-07 18:34:05,425 INFO L290 TraceCheckUtils]: 21: Hoare triple {2413#(= |__VERIFIER_assert_#in~cond| 1)} [103] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2417#(= __VERIFIER_assert_~cond 1)} is VALID [2022-04-07 18:34:05,425 INFO L290 TraceCheckUtils]: 22: Hoare triple {2417#(= __VERIFIER_assert_~cond 1)} [106] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2346#false} is VALID [2022-04-07 18:34:05,425 INFO L290 TraceCheckUtils]: 23: Hoare triple {2346#false} [110] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2346#false} is VALID [2022-04-07 18:34:05,425 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-07 18:34:05,425 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 18:34:06,103 INFO L290 TraceCheckUtils]: 23: Hoare triple {2346#false} [110] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2346#false} is VALID [2022-04-07 18:34:06,103 INFO L290 TraceCheckUtils]: 22: Hoare triple {2427#(not (= __VERIFIER_assert_~cond 0))} [106] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2346#false} is VALID [2022-04-07 18:34:06,104 INFO L290 TraceCheckUtils]: 21: Hoare triple {2399#(not (= |__VERIFIER_assert_#in~cond| 0))} [103] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2427#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 18:34:06,105 INFO L272 TraceCheckUtils]: 20: Hoare triple {2406#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296))} [97] L38-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_2| (ite (= (mod v_main_~A~0_7 4294967296) (mod (+ v_main_~r~0_12 (* v_main_~q~0_11 v_main_~b~0_15)) 4294967296)) 1 0)) InVars {main_~q~0=v_main_~q~0_11, main_~A~0=v_main_~A~0_7, main_~b~0=v_main_~b~0_15, main_~r~0=v_main_~r~0_12} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_2|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {2399#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 18:34:06,105 INFO L290 TraceCheckUtils]: 19: Hoare triple {2406#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296))} [108] L39-1-->L38-2: Formula: (= (mod v_main_~B~0_1 4294967296) (mod v_main_~b~0_2 4294967296)) InVars {main_~b~0=v_main_~b~0_2, main_~B~0=v_main_~B~0_1} OutVars{main_~b~0=v_main_~b~0_2, main_~B~0=v_main_~B~0_1} AuxVars[] AssignedVars[] {2406#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296))} is VALID [2022-04-07 18:34:06,106 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {2399#(not (= |__VERIFIER_assert_#in~cond| 0))} {2345#true} [117] __VERIFIER_assertEXIT-->L39-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= (ite (= (mod v_main_~A~0_6 4294967296) (mod (+ v_main_~r~0_11 (* v_main_~q~0_10 v_main_~b~0_14)) 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~q~0=v_main_~q~0_10, main_~A~0=v_main_~A~0_6, main_~b~0=v_main_~b~0_14, main_~r~0=v_main_~r~0_11} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {2406#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296))} is VALID [2022-04-07 18:34:06,106 INFO L290 TraceCheckUtils]: 17: Hoare triple {2399#(not (= |__VERIFIER_assert_#in~cond| 0))} [112] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2399#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 18:34:06,106 INFO L290 TraceCheckUtils]: 16: Hoare triple {2449#(or (not (= |__VERIFIER_assert_#in~cond| 0)) (= __VERIFIER_assert_~cond 0))} [107] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_3 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2399#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 18:34:06,107 INFO L290 TraceCheckUtils]: 15: Hoare triple {2345#true} [103] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2449#(or (not (= |__VERIFIER_assert_#in~cond| 0)) (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 18:34:06,107 INFO L272 TraceCheckUtils]: 14: Hoare triple {2345#true} [104] L39-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~A~0_6 4294967296) (mod (+ v_main_~r~0_11 (* v_main_~q~0_10 v_main_~b~0_14)) 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~q~0=v_main_~q~0_10, main_~A~0=v_main_~A~0_6, main_~b~0=v_main_~b~0_14, main_~r~0=v_main_~r~0_11} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {2345#true} is VALID [2022-04-07 18:34:06,107 INFO L290 TraceCheckUtils]: 13: Hoare triple {2345#true} [99] L38-->L39: Formula: (< |v_main_#t~post3_5| 10) InVars {main_#t~post3=|v_main_#t~post3_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post3] {2345#true} is VALID [2022-04-07 18:34:06,107 INFO L290 TraceCheckUtils]: 12: Hoare triple {2345#true} [94] L43-2-->L38: Formula: (and (= |v_main_#t~post3_1| v_~counter~0_2) (= (+ |v_main_#t~post3_1| 1) v_~counter~0_1)) InVars {~counter~0=v_~counter~0_2} OutVars{~counter~0=v_~counter~0_1, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post3] {2345#true} is VALID [2022-04-07 18:34:06,107 INFO L290 TraceCheckUtils]: 11: Hoare triple {2345#true} [100] L35-->L43-2: Formula: (not (<= (mod v_main_~b~0_11 4294967296) (mod v_main_~r~0_9 4294967296))) InVars {main_~b~0=v_main_~b~0_11, main_~r~0=v_main_~r~0_9} OutVars{main_~b~0=v_main_~b~0_11, main_~r~0=v_main_~r~0_9} AuxVars[] AssignedVars[] {2345#true} is VALID [2022-04-07 18:34:06,107 INFO L290 TraceCheckUtils]: 10: Hoare triple {2345#true} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 10) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {2345#true} is VALID [2022-04-07 18:34:06,107 INFO L290 TraceCheckUtils]: 9: Hoare triple {2345#true} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {2345#true} is VALID [2022-04-07 18:34:06,107 INFO L290 TraceCheckUtils]: 8: Hoare triple {2345#true} [101] L35-->L34-3: Formula: (and (= (* 2 v_main_~b~0_13) v_main_~b~0_12) (<= (mod v_main_~b~0_13 4294967296) (mod v_main_~r~0_10 4294967296))) InVars {main_~b~0=v_main_~b~0_13, main_~r~0=v_main_~r~0_10} OutVars{main_~b~0=v_main_~b~0_12, main_~r~0=v_main_~r~0_10} AuxVars[] AssignedVars[main_~b~0] {2345#true} is VALID [2022-04-07 18:34:06,108 INFO L290 TraceCheckUtils]: 7: Hoare triple {2345#true} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 10) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {2345#true} is VALID [2022-04-07 18:34:06,108 INFO L290 TraceCheckUtils]: 6: Hoare triple {2345#true} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {2345#true} is VALID [2022-04-07 18:34:06,108 INFO L290 TraceCheckUtils]: 5: Hoare triple {2345#true} [89] mainENTRY-->L34-3: Formula: (and (= v_main_~B~0_2 1) (= v_main_~B~0_2 v_main_~b~0_3) (= v_main_~q~0_2 0) (= v_main_~A~0_2 |v_main_#t~nondet1_2|) (= v_main_~A~0_2 v_main_~r~0_2)) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~q~0=v_main_~q~0_2, main_~B~0=v_main_~B~0_2, main_~b~0=v_main_~b~0_3, main_~A~0=v_main_~A~0_2, main_~r~0=v_main_~r~0_2} AuxVars[] AssignedVars[main_~q~0, main_#t~nondet1, main_~B~0, main_~b~0, main_~A~0, main_~r~0] {2345#true} is VALID [2022-04-07 18:34:06,108 INFO L272 TraceCheckUtils]: 4: Hoare triple {2345#true} [86] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2345#true} is VALID [2022-04-07 18:34:06,108 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2345#true} {2345#true} [115] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2345#true} is VALID [2022-04-07 18:34:06,108 INFO L290 TraceCheckUtils]: 2: Hoare triple {2345#true} [90] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2345#true} is VALID [2022-04-07 18:34:06,108 INFO L290 TraceCheckUtils]: 1: Hoare triple {2345#true} [87] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0) (= v_~counter~0_5 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{~counter~0=v_~counter~0_5, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[~counter~0, #NULL.offset, #NULL.base] {2345#true} is VALID [2022-04-07 18:34:06,108 INFO L272 TraceCheckUtils]: 0: Hoare triple {2345#true} [85] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2345#true} is VALID [2022-04-07 18:34:06,108 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-07 18:34:06,109 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 18:34:06,109 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2141110401] [2022-04-07 18:34:06,109 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-04-07 18:34:06,109 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2029006346] [2022-04-07 18:34:06,109 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2029006346] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 18:34:06,109 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-04-07 18:34:06,109 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 6] total 9 [2022-04-07 18:34:06,109 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [441724687] [2022-04-07 18:34:06,109 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-04-07 18:34:06,110 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 2.2222222222222223) internal successors, (20), 8 states have internal predecessors, (20), 2 states have call successors, (5), 3 states have call predecessors, (5), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) Word has length 24 [2022-04-07 18:34:06,110 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 18:34:06,110 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 9 states, 9 states have (on average 2.2222222222222223) internal successors, (20), 8 states have internal predecessors, (20), 2 states have call successors, (5), 3 states have call predecessors, (5), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-07 18:34:06,130 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 27 edges. 27 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 18:34:06,130 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2022-04-07 18:34:06,130 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 18:34:06,131 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2022-04-07 18:34:06,131 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72 [2022-04-07 18:34:06,131 INFO L87 Difference]: Start difference. First operand 93 states and 112 transitions. Second operand has 9 states, 9 states have (on average 2.2222222222222223) internal successors, (20), 8 states have internal predecessors, (20), 2 states have call successors, (5), 3 states have call predecessors, (5), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-07 18:34:08,675 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:34:08,675 INFO L93 Difference]: Finished difference Result 106 states and 121 transitions. [2022-04-07 18:34:08,675 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-04-07 18:34:08,675 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 2.2222222222222223) internal successors, (20), 8 states have internal predecessors, (20), 2 states have call successors, (5), 3 states have call predecessors, (5), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) Word has length 24 [2022-04-07 18:34:08,675 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 18:34:08,676 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 9 states have (on average 2.2222222222222223) internal successors, (20), 8 states have internal predecessors, (20), 2 states have call successors, (5), 3 states have call predecessors, (5), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-07 18:34:08,676 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 34 transitions. [2022-04-07 18:34:08,677 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 9 states have (on average 2.2222222222222223) internal successors, (20), 8 states have internal predecessors, (20), 2 states have call successors, (5), 3 states have call predecessors, (5), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-07 18:34:08,677 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 34 transitions. [2022-04-07 18:34:08,677 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 7 states and 34 transitions. [2022-04-07 18:34:08,699 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 34 edges. 34 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 18:34:08,700 INFO L225 Difference]: With dead ends: 106 [2022-04-07 18:34:08,700 INFO L226 Difference]: Without dead ends: 88 [2022-04-07 18:34:08,701 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 40 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=35, Invalid=75, Unknown=0, NotChecked=0, Total=110 [2022-04-07 18:34:08,701 INFO L913 BasicCegarLoop]: 21 mSDtfsCounter, 16 mSDsluCounter, 66 mSDsCounter, 0 mSdLazyCounter, 45 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 16 SdHoareTripleChecker+Valid, 87 SdHoareTripleChecker+Invalid, 48 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 45 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 18:34:08,701 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [16 Valid, 87 Invalid, 48 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 45 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 18:34:08,702 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 88 states. [2022-04-07 18:34:08,704 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 88 to 88. [2022-04-07 18:34:08,704 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 18:34:08,705 INFO L82 GeneralOperation]: Start isEquivalent. First operand 88 states. Second operand has 88 states, 69 states have (on average 1.2318840579710144) internal successors, (85), 73 states have internal predecessors, (85), 10 states have call successors, (10), 9 states have call predecessors, (10), 8 states have return successors, (8), 5 states have call predecessors, (8), 8 states have call successors, (8) [2022-04-07 18:34:08,705 INFO L74 IsIncluded]: Start isIncluded. First operand 88 states. Second operand has 88 states, 69 states have (on average 1.2318840579710144) internal successors, (85), 73 states have internal predecessors, (85), 10 states have call successors, (10), 9 states have call predecessors, (10), 8 states have return successors, (8), 5 states have call predecessors, (8), 8 states have call successors, (8) [2022-04-07 18:34:08,705 INFO L87 Difference]: Start difference. First operand 88 states. Second operand has 88 states, 69 states have (on average 1.2318840579710144) internal successors, (85), 73 states have internal predecessors, (85), 10 states have call successors, (10), 9 states have call predecessors, (10), 8 states have return successors, (8), 5 states have call predecessors, (8), 8 states have call successors, (8) [2022-04-07 18:34:08,707 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:34:08,707 INFO L93 Difference]: Finished difference Result 88 states and 103 transitions. [2022-04-07 18:34:08,707 INFO L276 IsEmpty]: Start isEmpty. Operand 88 states and 103 transitions. [2022-04-07 18:34:08,707 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 18:34:08,707 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 18:34:08,707 INFO L74 IsIncluded]: Start isIncluded. First operand has 88 states, 69 states have (on average 1.2318840579710144) internal successors, (85), 73 states have internal predecessors, (85), 10 states have call successors, (10), 9 states have call predecessors, (10), 8 states have return successors, (8), 5 states have call predecessors, (8), 8 states have call successors, (8) Second operand 88 states. [2022-04-07 18:34:08,708 INFO L87 Difference]: Start difference. First operand has 88 states, 69 states have (on average 1.2318840579710144) internal successors, (85), 73 states have internal predecessors, (85), 10 states have call successors, (10), 9 states have call predecessors, (10), 8 states have return successors, (8), 5 states have call predecessors, (8), 8 states have call successors, (8) Second operand 88 states. [2022-04-07 18:34:08,709 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:34:08,709 INFO L93 Difference]: Finished difference Result 88 states and 103 transitions. [2022-04-07 18:34:08,709 INFO L276 IsEmpty]: Start isEmpty. Operand 88 states and 103 transitions. [2022-04-07 18:34:08,710 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 18:34:08,710 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 18:34:08,710 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 18:34:08,710 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 18:34:08,710 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 88 states, 69 states have (on average 1.2318840579710144) internal successors, (85), 73 states have internal predecessors, (85), 10 states have call successors, (10), 9 states have call predecessors, (10), 8 states have return successors, (8), 5 states have call predecessors, (8), 8 states have call successors, (8) [2022-04-07 18:34:08,711 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 88 states to 88 states and 103 transitions. [2022-04-07 18:34:08,712 INFO L78 Accepts]: Start accepts. Automaton has 88 states and 103 transitions. Word has length 24 [2022-04-07 18:34:08,712 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 18:34:08,712 INFO L478 AbstractCegarLoop]: Abstraction has 88 states and 103 transitions. [2022-04-07 18:34:08,712 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 2.2222222222222223) internal successors, (20), 8 states have internal predecessors, (20), 2 states have call successors, (5), 3 states have call predecessors, (5), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-07 18:34:08,712 INFO L276 IsEmpty]: Start isEmpty. Operand 88 states and 103 transitions. [2022-04-07 18:34:08,712 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2022-04-07 18:34:08,712 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 18:34:08,712 INFO L499 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 18:34:08,730 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2022-04-07 18:34:08,927 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8,8 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 18:34:08,927 INFO L403 AbstractCegarLoop]: === Iteration 10 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 18:34:08,927 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 18:34:08,927 INFO L85 PathProgramCache]: Analyzing trace with hash -268589446, now seen corresponding path program 1 times [2022-04-07 18:34:08,928 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 18:34:08,928 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2124849439] [2022-04-07 18:34:08,928 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 18:34:08,928 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 18:34:08,939 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-04-07 18:34:08,940 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1585413597] [2022-04-07 18:34:08,940 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 18:34:08,940 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 18:34:08,940 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 18:34:08,945 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 18:34:08,946 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2022-04-07 18:34:08,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 18:34:08,995 INFO L263 TraceCheckSpWp]: Trace formula consists of 105 conjuncts, 25 conjunts are in the unsatisfiable core [2022-04-07 18:34:09,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 18:34:09,007 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 18:34:09,731 INFO L272 TraceCheckUtils]: 0: Hoare triple {2871#true} [85] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2871#true} is VALID [2022-04-07 18:34:09,732 INFO L290 TraceCheckUtils]: 1: Hoare triple {2871#true} [87] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0) (= v_~counter~0_5 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{~counter~0=v_~counter~0_5, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[~counter~0, #NULL.offset, #NULL.base] {2871#true} is VALID [2022-04-07 18:34:09,732 INFO L290 TraceCheckUtils]: 2: Hoare triple {2871#true} [90] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2871#true} is VALID [2022-04-07 18:34:09,732 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2871#true} {2871#true} [115] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2871#true} is VALID [2022-04-07 18:34:09,732 INFO L272 TraceCheckUtils]: 4: Hoare triple {2871#true} [86] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2871#true} is VALID [2022-04-07 18:34:09,736 INFO L290 TraceCheckUtils]: 5: Hoare triple {2871#true} [89] mainENTRY-->L34-3: Formula: (and (= v_main_~B~0_2 1) (= v_main_~B~0_2 v_main_~b~0_3) (= v_main_~q~0_2 0) (= v_main_~A~0_2 |v_main_#t~nondet1_2|) (= v_main_~A~0_2 v_main_~r~0_2)) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~q~0=v_main_~q~0_2, main_~B~0=v_main_~B~0_2, main_~b~0=v_main_~b~0_3, main_~A~0=v_main_~A~0_2, main_~r~0=v_main_~r~0_2} AuxVars[] AssignedVars[main_~q~0, main_#t~nondet1, main_~B~0, main_~b~0, main_~A~0, main_~r~0] {2891#(and (= main_~b~0 1) (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:34:09,737 INFO L290 TraceCheckUtils]: 6: Hoare triple {2891#(and (= main_~b~0 1) (= main_~A~0 main_~r~0) (= main_~q~0 0))} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {2891#(and (= main_~b~0 1) (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:34:09,737 INFO L290 TraceCheckUtils]: 7: Hoare triple {2891#(and (= main_~b~0 1) (= main_~A~0 main_~r~0) (= main_~q~0 0))} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 10) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {2891#(and (= main_~b~0 1) (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:34:09,738 INFO L290 TraceCheckUtils]: 8: Hoare triple {2891#(and (= main_~b~0 1) (= main_~A~0 main_~r~0) (= main_~q~0 0))} [101] L35-->L34-3: Formula: (and (= (* 2 v_main_~b~0_13) v_main_~b~0_12) (<= (mod v_main_~b~0_13 4294967296) (mod v_main_~r~0_10 4294967296))) InVars {main_~b~0=v_main_~b~0_13, main_~r~0=v_main_~r~0_10} OutVars{main_~b~0=v_main_~b~0_12, main_~r~0=v_main_~r~0_10} AuxVars[] AssignedVars[main_~b~0] {2901#(and (= main_~b~0 2) (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} is VALID [2022-04-07 18:34:09,738 INFO L290 TraceCheckUtils]: 9: Hoare triple {2901#(and (= main_~b~0 2) (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {2901#(and (= main_~b~0 2) (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} is VALID [2022-04-07 18:34:09,739 INFO L290 TraceCheckUtils]: 10: Hoare triple {2901#(and (= main_~b~0 2) (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 10) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {2901#(and (= main_~b~0 2) (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} is VALID [2022-04-07 18:34:09,739 INFO L290 TraceCheckUtils]: 11: Hoare triple {2901#(and (= main_~b~0 2) (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} [100] L35-->L43-2: Formula: (not (<= (mod v_main_~b~0_11 4294967296) (mod v_main_~r~0_9 4294967296))) InVars {main_~b~0=v_main_~b~0_11, main_~r~0=v_main_~r~0_9} OutVars{main_~b~0=v_main_~b~0_11, main_~r~0=v_main_~r~0_9} AuxVars[] AssignedVars[] {2911#(and (= main_~b~0 2) (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} is VALID [2022-04-07 18:34:09,740 INFO L290 TraceCheckUtils]: 12: Hoare triple {2911#(and (= main_~b~0 2) (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} [94] L43-2-->L38: Formula: (and (= |v_main_#t~post3_1| v_~counter~0_2) (= (+ |v_main_#t~post3_1| 1) v_~counter~0_1)) InVars {~counter~0=v_~counter~0_2} OutVars{~counter~0=v_~counter~0_1, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post3] {2911#(and (= main_~b~0 2) (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} is VALID [2022-04-07 18:34:09,740 INFO L290 TraceCheckUtils]: 13: Hoare triple {2911#(and (= main_~b~0 2) (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} [99] L38-->L39: Formula: (< |v_main_#t~post3_5| 10) InVars {main_#t~post3=|v_main_#t~post3_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post3] {2911#(and (= main_~b~0 2) (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} is VALID [2022-04-07 18:34:09,740 INFO L272 TraceCheckUtils]: 14: Hoare triple {2911#(and (= main_~b~0 2) (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} [104] L39-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~A~0_6 4294967296) (mod (+ v_main_~r~0_11 (* v_main_~q~0_10 v_main_~b~0_14)) 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~q~0=v_main_~q~0_10, main_~A~0=v_main_~A~0_6, main_~b~0=v_main_~b~0_14, main_~r~0=v_main_~r~0_11} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {2871#true} is VALID [2022-04-07 18:34:09,740 INFO L290 TraceCheckUtils]: 15: Hoare triple {2871#true} [103] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2871#true} is VALID [2022-04-07 18:34:09,741 INFO L290 TraceCheckUtils]: 16: Hoare triple {2871#true} [107] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_3 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2871#true} is VALID [2022-04-07 18:34:09,741 INFO L290 TraceCheckUtils]: 17: Hoare triple {2871#true} [112] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2871#true} is VALID [2022-04-07 18:34:09,741 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {2871#true} {2911#(and (= main_~b~0 2) (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} [117] __VERIFIER_assertEXIT-->L39-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= (ite (= (mod v_main_~A~0_6 4294967296) (mod (+ v_main_~r~0_11 (* v_main_~q~0_10 v_main_~b~0_14)) 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~q~0=v_main_~q~0_10, main_~A~0=v_main_~A~0_6, main_~b~0=v_main_~b~0_14, main_~r~0=v_main_~r~0_11} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {2911#(and (= main_~b~0 2) (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} is VALID [2022-04-07 18:34:09,743 INFO L290 TraceCheckUtils]: 19: Hoare triple {2911#(and (= main_~b~0 2) (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} [109] L39-1-->L43: Formula: (let ((.cse0 (mod v_main_~b~0_7 4294967296))) (and (= (* v_main_~q~0_6 2) v_main_~q~0_5) (= v_main_~b~0_6 (div .cse0 2)) (not (= (mod v_main_~B~0_5 4294967296) .cse0)))) InVars {main_~q~0=v_main_~q~0_6, main_~B~0=v_main_~B~0_5, main_~b~0=v_main_~b~0_7} OutVars{main_~q~0=v_main_~q~0_5, main_~B~0=v_main_~B~0_5, main_~b~0=v_main_~b~0_6} AuxVars[] AssignedVars[main_~q~0, main_~b~0] {2936#(and (= main_~b~0 1) (= main_~A~0 main_~r~0) (not (<= 2 (mod main_~r~0 4294967296))) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} is VALID [2022-04-07 18:34:09,743 INFO L290 TraceCheckUtils]: 20: Hoare triple {2936#(and (= main_~b~0 1) (= main_~A~0 main_~r~0) (not (<= 2 (mod main_~r~0 4294967296))) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} [113] L43-->L43-2: Formula: (and (<= (mod v_main_~b~0_8 4294967296) (mod v_main_~r~0_6 4294967296)) (= v_main_~q~0_7 (+ v_main_~q~0_8 1)) (= (+ (* (- 1) v_main_~b~0_8) v_main_~r~0_6) v_main_~r~0_5)) InVars {main_~q~0=v_main_~q~0_8, main_~b~0=v_main_~b~0_8, main_~r~0=v_main_~r~0_6} OutVars{main_~q~0=v_main_~q~0_7, main_~b~0=v_main_~b~0_8, main_~r~0=v_main_~r~0_5} AuxVars[] AssignedVars[main_~q~0, main_~r~0] {2940#(and (= (+ main_~A~0 (* (- 1) main_~b~0)) main_~r~0) (= main_~b~0 1) (not (<= 2 (mod main_~A~0 4294967296))) (<= 1 (mod main_~A~0 4294967296)) (= main_~q~0 1))} is VALID [2022-04-07 18:34:09,744 INFO L290 TraceCheckUtils]: 21: Hoare triple {2940#(and (= (+ main_~A~0 (* (- 1) main_~b~0)) main_~r~0) (= main_~b~0 1) (not (<= 2 (mod main_~A~0 4294967296))) (<= 1 (mod main_~A~0 4294967296)) (= main_~q~0 1))} [94] L43-2-->L38: Formula: (and (= |v_main_#t~post3_1| v_~counter~0_2) (= (+ |v_main_#t~post3_1| 1) v_~counter~0_1)) InVars {~counter~0=v_~counter~0_2} OutVars{~counter~0=v_~counter~0_1, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post3] {2940#(and (= (+ main_~A~0 (* (- 1) main_~b~0)) main_~r~0) (= main_~b~0 1) (not (<= 2 (mod main_~A~0 4294967296))) (<= 1 (mod main_~A~0 4294967296)) (= main_~q~0 1))} is VALID [2022-04-07 18:34:09,744 INFO L290 TraceCheckUtils]: 22: Hoare triple {2940#(and (= (+ main_~A~0 (* (- 1) main_~b~0)) main_~r~0) (= main_~b~0 1) (not (<= 2 (mod main_~A~0 4294967296))) (<= 1 (mod main_~A~0 4294967296)) (= main_~q~0 1))} [99] L38-->L39: Formula: (< |v_main_#t~post3_5| 10) InVars {main_#t~post3=|v_main_#t~post3_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post3] {2940#(and (= (+ main_~A~0 (* (- 1) main_~b~0)) main_~r~0) (= main_~b~0 1) (not (<= 2 (mod main_~A~0 4294967296))) (<= 1 (mod main_~A~0 4294967296)) (= main_~q~0 1))} is VALID [2022-04-07 18:34:09,746 INFO L272 TraceCheckUtils]: 23: Hoare triple {2940#(and (= (+ main_~A~0 (* (- 1) main_~b~0)) main_~r~0) (= main_~b~0 1) (not (<= 2 (mod main_~A~0 4294967296))) (<= 1 (mod main_~A~0 4294967296)) (= main_~q~0 1))} [104] L39-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~A~0_6 4294967296) (mod (+ v_main_~r~0_11 (* v_main_~q~0_10 v_main_~b~0_14)) 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~q~0=v_main_~q~0_10, main_~A~0=v_main_~A~0_6, main_~b~0=v_main_~b~0_14, main_~r~0=v_main_~r~0_11} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {2950#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 18:34:09,746 INFO L290 TraceCheckUtils]: 24: Hoare triple {2950#(<= 1 |__VERIFIER_assert_#in~cond|)} [103] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2954#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 18:34:09,747 INFO L290 TraceCheckUtils]: 25: Hoare triple {2954#(<= 1 __VERIFIER_assert_~cond)} [106] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2872#false} is VALID [2022-04-07 18:34:09,747 INFO L290 TraceCheckUtils]: 26: Hoare triple {2872#false} [110] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2872#false} is VALID [2022-04-07 18:34:09,747 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 18:34:09,747 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 18:34:37,349 WARN L232 SmtUtils]: Spent 10.58s on a formula simplification that was a NOOP. DAG size: 17 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 18:34:56,562 WARN L855 $PredicateComparison]: unable to prove that (let ((.cse1 (mod (* c_main_~b~0 2) 4294967296)) (.cse0 (mod c_main_~r~0 4294967296))) (or (not (<= (mod c_main_~b~0 4294967296) .cse0)) (= (mod c_main_~A~0 4294967296) (mod (+ (* (div .cse1 2) (* c_main_~q~0 2)) c_main_~r~0) 4294967296)) (<= .cse1 .cse0))) is different from true [2022-04-07 18:35:15,704 INFO L290 TraceCheckUtils]: 26: Hoare triple {2872#false} [110] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2872#false} is VALID [2022-04-07 18:35:15,705 INFO L290 TraceCheckUtils]: 25: Hoare triple {2954#(<= 1 __VERIFIER_assert_~cond)} [106] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2872#false} is VALID [2022-04-07 18:35:15,705 INFO L290 TraceCheckUtils]: 24: Hoare triple {2950#(<= 1 |__VERIFIER_assert_#in~cond|)} [103] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2954#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 18:35:15,706 INFO L272 TraceCheckUtils]: 23: Hoare triple {2970#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296))} [104] L39-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~A~0_6 4294967296) (mod (+ v_main_~r~0_11 (* v_main_~q~0_10 v_main_~b~0_14)) 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~q~0=v_main_~q~0_10, main_~A~0=v_main_~A~0_6, main_~b~0=v_main_~b~0_14, main_~r~0=v_main_~r~0_11} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {2950#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 18:35:15,706 INFO L290 TraceCheckUtils]: 22: Hoare triple {2970#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296))} [99] L38-->L39: Formula: (< |v_main_#t~post3_5| 10) InVars {main_#t~post3=|v_main_#t~post3_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post3] {2970#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296))} is VALID [2022-04-07 18:35:15,706 INFO L290 TraceCheckUtils]: 21: Hoare triple {2970#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296))} [94] L43-2-->L38: Formula: (and (= |v_main_#t~post3_1| v_~counter~0_2) (= (+ |v_main_#t~post3_1| 1) v_~counter~0_1)) InVars {~counter~0=v_~counter~0_2} OutVars{~counter~0=v_~counter~0_1, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post3] {2970#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296))} is VALID [2022-04-07 18:35:17,709 WARN L290 TraceCheckUtils]: 20: Hoare triple {2970#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296))} [113] L43-->L43-2: Formula: (and (<= (mod v_main_~b~0_8 4294967296) (mod v_main_~r~0_6 4294967296)) (= v_main_~q~0_7 (+ v_main_~q~0_8 1)) (= (+ (* (- 1) v_main_~b~0_8) v_main_~r~0_6) v_main_~r~0_5)) InVars {main_~q~0=v_main_~q~0_8, main_~b~0=v_main_~b~0_8, main_~r~0=v_main_~r~0_6} OutVars{main_~q~0=v_main_~q~0_7, main_~b~0=v_main_~b~0_8, main_~r~0=v_main_~r~0_5} AuxVars[] AssignedVars[main_~q~0, main_~r~0] {2970#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296))} is UNKNOWN [2022-04-07 18:35:19,831 WARN L290 TraceCheckUtils]: 19: Hoare triple {2983#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* (div (mod main_~b~0 4294967296) 2) (* main_~q~0 2))) 4294967296))} [109] L39-1-->L43: Formula: (let ((.cse0 (mod v_main_~b~0_7 4294967296))) (and (= (* v_main_~q~0_6 2) v_main_~q~0_5) (= v_main_~b~0_6 (div .cse0 2)) (not (= (mod v_main_~B~0_5 4294967296) .cse0)))) InVars {main_~q~0=v_main_~q~0_6, main_~B~0=v_main_~B~0_5, main_~b~0=v_main_~b~0_7} OutVars{main_~q~0=v_main_~q~0_5, main_~B~0=v_main_~B~0_5, main_~b~0=v_main_~b~0_6} AuxVars[] AssignedVars[main_~q~0, main_~b~0] {2970#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296))} is UNKNOWN [2022-04-07 18:35:19,832 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {2871#true} {2983#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* (div (mod main_~b~0 4294967296) 2) (* main_~q~0 2))) 4294967296))} [117] __VERIFIER_assertEXIT-->L39-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= (ite (= (mod v_main_~A~0_6 4294967296) (mod (+ v_main_~r~0_11 (* v_main_~q~0_10 v_main_~b~0_14)) 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~q~0=v_main_~q~0_10, main_~A~0=v_main_~A~0_6, main_~b~0=v_main_~b~0_14, main_~r~0=v_main_~r~0_11} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {2983#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* (div (mod main_~b~0 4294967296) 2) (* main_~q~0 2))) 4294967296))} is VALID [2022-04-07 18:35:19,832 INFO L290 TraceCheckUtils]: 17: Hoare triple {2871#true} [112] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2871#true} is VALID [2022-04-07 18:35:19,832 INFO L290 TraceCheckUtils]: 16: Hoare triple {2871#true} [107] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_3 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2871#true} is VALID [2022-04-07 18:35:19,832 INFO L290 TraceCheckUtils]: 15: Hoare triple {2871#true} [103] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2871#true} is VALID [2022-04-07 18:35:19,832 INFO L272 TraceCheckUtils]: 14: Hoare triple {2983#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* (div (mod main_~b~0 4294967296) 2) (* main_~q~0 2))) 4294967296))} [104] L39-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~A~0_6 4294967296) (mod (+ v_main_~r~0_11 (* v_main_~q~0_10 v_main_~b~0_14)) 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~q~0=v_main_~q~0_10, main_~A~0=v_main_~A~0_6, main_~b~0=v_main_~b~0_14, main_~r~0=v_main_~r~0_11} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {2871#true} is VALID [2022-04-07 18:35:19,833 INFO L290 TraceCheckUtils]: 13: Hoare triple {2983#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* (div (mod main_~b~0 4294967296) 2) (* main_~q~0 2))) 4294967296))} [99] L38-->L39: Formula: (< |v_main_#t~post3_5| 10) InVars {main_#t~post3=|v_main_#t~post3_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post3] {2983#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* (div (mod main_~b~0 4294967296) 2) (* main_~q~0 2))) 4294967296))} is VALID [2022-04-07 18:35:19,833 INFO L290 TraceCheckUtils]: 12: Hoare triple {2983#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* (div (mod main_~b~0 4294967296) 2) (* main_~q~0 2))) 4294967296))} [94] L43-2-->L38: Formula: (and (= |v_main_#t~post3_1| v_~counter~0_2) (= (+ |v_main_#t~post3_1| 1) v_~counter~0_1)) InVars {~counter~0=v_~counter~0_2} OutVars{~counter~0=v_~counter~0_1, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post3] {2983#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* (div (mod main_~b~0 4294967296) 2) (* main_~q~0 2))) 4294967296))} is VALID [2022-04-07 18:35:19,834 INFO L290 TraceCheckUtils]: 11: Hoare triple {3008#(or (= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* (div (mod main_~b~0 4294967296) 2) (* main_~q~0 2))) 4294967296)) (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296)))} [100] L35-->L43-2: Formula: (not (<= (mod v_main_~b~0_11 4294967296) (mod v_main_~r~0_9 4294967296))) InVars {main_~b~0=v_main_~b~0_11, main_~r~0=v_main_~r~0_9} OutVars{main_~b~0=v_main_~b~0_11, main_~r~0=v_main_~r~0_9} AuxVars[] AssignedVars[] {2983#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* (div (mod main_~b~0 4294967296) 2) (* main_~q~0 2))) 4294967296))} is VALID [2022-04-07 18:35:19,834 INFO L290 TraceCheckUtils]: 10: Hoare triple {3008#(or (= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* (div (mod main_~b~0 4294967296) 2) (* main_~q~0 2))) 4294967296)) (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296)))} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 10) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {3008#(or (= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* (div (mod main_~b~0 4294967296) 2) (* main_~q~0 2))) 4294967296)) (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296)))} is VALID [2022-04-07 18:35:19,834 INFO L290 TraceCheckUtils]: 9: Hoare triple {3008#(or (= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* (div (mod main_~b~0 4294967296) 2) (* main_~q~0 2))) 4294967296)) (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296)))} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {3008#(or (= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* (div (mod main_~b~0 4294967296) 2) (* main_~q~0 2))) 4294967296)) (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296)))} is VALID [2022-04-07 18:35:21,934 WARN L290 TraceCheckUtils]: 8: Hoare triple {3018#(or (= (mod main_~A~0 4294967296) (mod (+ (* (* main_~q~0 2) (div (mod (* main_~b~0 2) 4294967296) 2)) main_~r~0) 4294967296)) (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (<= (mod (* main_~b~0 2) 4294967296) (mod main_~r~0 4294967296)))} [101] L35-->L34-3: Formula: (and (= (* 2 v_main_~b~0_13) v_main_~b~0_12) (<= (mod v_main_~b~0_13 4294967296) (mod v_main_~r~0_10 4294967296))) InVars {main_~b~0=v_main_~b~0_13, main_~r~0=v_main_~r~0_10} OutVars{main_~b~0=v_main_~b~0_12, main_~r~0=v_main_~r~0_10} AuxVars[] AssignedVars[main_~b~0] {3008#(or (= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* (div (mod main_~b~0 4294967296) 2) (* main_~q~0 2))) 4294967296)) (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296)))} is UNKNOWN [2022-04-07 18:35:21,935 INFO L290 TraceCheckUtils]: 7: Hoare triple {3018#(or (= (mod main_~A~0 4294967296) (mod (+ (* (* main_~q~0 2) (div (mod (* main_~b~0 2) 4294967296) 2)) main_~r~0) 4294967296)) (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (<= (mod (* main_~b~0 2) 4294967296) (mod main_~r~0 4294967296)))} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 10) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {3018#(or (= (mod main_~A~0 4294967296) (mod (+ (* (* main_~q~0 2) (div (mod (* main_~b~0 2) 4294967296) 2)) main_~r~0) 4294967296)) (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (<= (mod (* main_~b~0 2) 4294967296) (mod main_~r~0 4294967296)))} is VALID [2022-04-07 18:35:21,936 INFO L290 TraceCheckUtils]: 6: Hoare triple {3018#(or (= (mod main_~A~0 4294967296) (mod (+ (* (* main_~q~0 2) (div (mod (* main_~b~0 2) 4294967296) 2)) main_~r~0) 4294967296)) (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (<= (mod (* main_~b~0 2) 4294967296) (mod main_~r~0 4294967296)))} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {3018#(or (= (mod main_~A~0 4294967296) (mod (+ (* (* main_~q~0 2) (div (mod (* main_~b~0 2) 4294967296) 2)) main_~r~0) 4294967296)) (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (<= (mod (* main_~b~0 2) 4294967296) (mod main_~r~0 4294967296)))} is VALID [2022-04-07 18:35:21,937 INFO L290 TraceCheckUtils]: 5: Hoare triple {2871#true} [89] mainENTRY-->L34-3: Formula: (and (= v_main_~B~0_2 1) (= v_main_~B~0_2 v_main_~b~0_3) (= v_main_~q~0_2 0) (= v_main_~A~0_2 |v_main_#t~nondet1_2|) (= v_main_~A~0_2 v_main_~r~0_2)) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~q~0=v_main_~q~0_2, main_~B~0=v_main_~B~0_2, main_~b~0=v_main_~b~0_3, main_~A~0=v_main_~A~0_2, main_~r~0=v_main_~r~0_2} AuxVars[] AssignedVars[main_~q~0, main_#t~nondet1, main_~B~0, main_~b~0, main_~A~0, main_~r~0] {3018#(or (= (mod main_~A~0 4294967296) (mod (+ (* (* main_~q~0 2) (div (mod (* main_~b~0 2) 4294967296) 2)) main_~r~0) 4294967296)) (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (<= (mod (* main_~b~0 2) 4294967296) (mod main_~r~0 4294967296)))} is VALID [2022-04-07 18:35:21,937 INFO L272 TraceCheckUtils]: 4: Hoare triple {2871#true} [86] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2871#true} is VALID [2022-04-07 18:35:21,937 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2871#true} {2871#true} [115] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2871#true} is VALID [2022-04-07 18:35:21,937 INFO L290 TraceCheckUtils]: 2: Hoare triple {2871#true} [90] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2871#true} is VALID [2022-04-07 18:35:21,937 INFO L290 TraceCheckUtils]: 1: Hoare triple {2871#true} [87] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0) (= v_~counter~0_5 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{~counter~0=v_~counter~0_5, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[~counter~0, #NULL.offset, #NULL.base] {2871#true} is VALID [2022-04-07 18:35:21,937 INFO L272 TraceCheckUtils]: 0: Hoare triple {2871#true} [85] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2871#true} is VALID [2022-04-07 18:35:21,937 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 3 not checked. [2022-04-07 18:35:21,937 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 18:35:21,937 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2124849439] [2022-04-07 18:35:21,938 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-04-07 18:35:21,938 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1585413597] [2022-04-07 18:35:21,938 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1585413597] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 18:35:21,938 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-04-07 18:35:21,938 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 8] total 13 [2022-04-07 18:35:21,938 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1224463748] [2022-04-07 18:35:21,938 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-04-07 18:35:21,939 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 2.6153846153846154) internal successors, (34), 12 states have internal predecessors, (34), 5 states have call successors, (6), 2 states have call predecessors, (6), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Word has length 27 [2022-04-07 18:35:21,939 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 18:35:21,939 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 13 states, 13 states have (on average 2.6153846153846154) internal successors, (34), 12 states have internal predecessors, (34), 5 states have call successors, (6), 2 states have call predecessors, (6), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 18:35:28,169 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 43 edges. 40 inductive. 0 not inductive. 3 times theorem prover too weak to decide inductivity. [2022-04-07 18:35:28,170 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 13 states [2022-04-07 18:35:28,170 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 18:35:28,170 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2022-04-07 18:35:28,170 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=90, Unknown=7, NotChecked=20, Total=156 [2022-04-07 18:35:28,170 INFO L87 Difference]: Start difference. First operand 88 states and 103 transitions. Second operand has 13 states, 13 states have (on average 2.6153846153846154) internal successors, (34), 12 states have internal predecessors, (34), 5 states have call successors, (6), 2 states have call predecessors, (6), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 18:35:43,943 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=true, quantifiers [] [2022-04-07 18:35:46,057 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=true, quantifiers [] [2022-04-07 18:35:48,178 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.11s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=true, quantifiers [] [2022-04-07 18:35:50,279 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.10s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=true, quantifiers [] [2022-04-07 18:35:52,409 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.13s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=true, quantifiers [] [2022-04-07 18:35:54,535 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.12s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=true, quantifiers [] [2022-04-07 18:36:07,892 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=true, quantifiers [] [2022-04-07 18:36:14,277 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=true, quantifiers [] [2022-04-07 18:36:18,525 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-04-07 18:36:25,118 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=true, quantifiers [] [2022-04-07 18:36:27,343 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=true, quantifiers [] [2022-04-07 18:36:29,659 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=true, quantifiers [] [2022-04-07 18:36:41,284 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=true, quantifiers [] [2022-04-07 18:36:48,089 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=true, quantifiers [] [2022-04-07 18:36:50,335 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=true, quantifiers [] [2022-04-07 18:36:52,736 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:36:52,737 INFO L93 Difference]: Finished difference Result 111 states and 127 transitions. [2022-04-07 18:36:52,737 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-04-07 18:36:52,737 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 2.6153846153846154) internal successors, (34), 12 states have internal predecessors, (34), 5 states have call successors, (6), 2 states have call predecessors, (6), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Word has length 27 [2022-04-07 18:36:52,737 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 18:36:52,737 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13 states, 13 states have (on average 2.6153846153846154) internal successors, (34), 12 states have internal predecessors, (34), 5 states have call successors, (6), 2 states have call predecessors, (6), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 18:36:52,739 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 71 transitions. [2022-04-07 18:36:52,739 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13 states, 13 states have (on average 2.6153846153846154) internal successors, (34), 12 states have internal predecessors, (34), 5 states have call successors, (6), 2 states have call predecessors, (6), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 18:36:52,740 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 71 transitions. [2022-04-07 18:36:52,740 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 13 states and 71 transitions. [2022-04-07 18:37:01,031 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 71 edges. 67 inductive. 0 not inductive. 4 times theorem prover too weak to decide inductivity. [2022-04-07 18:37:01,033 INFO L225 Difference]: With dead ends: 111 [2022-04-07 18:37:01,033 INFO L226 Difference]: Without dead ends: 111 [2022-04-07 18:37:01,033 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 57 GetRequests, 41 SyntacticMatches, 3 SemanticMatches, 13 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 35 ImplicationChecksByTransitivity, 30.5s TimeCoverageRelationStatistics Valid=52, Invalid=126, Unknown=8, NotChecked=24, Total=210 [2022-04-07 18:37:01,034 INFO L913 BasicCegarLoop]: 24 mSDtfsCounter, 27 mSDsluCounter, 128 mSDsCounter, 0 mSdLazyCounter, 119 mSolverCounterSat, 14 mSolverCounterUnsat, 15 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 31.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 29 SdHoareTripleChecker+Valid, 152 SdHoareTripleChecker+Invalid, 185 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 14 IncrementalHoareTripleChecker+Valid, 119 IncrementalHoareTripleChecker+Invalid, 15 IncrementalHoareTripleChecker+Unknown, 37 IncrementalHoareTripleChecker+Unchecked, 33.1s IncrementalHoareTripleChecker+Time [2022-04-07 18:37:01,034 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [29 Valid, 152 Invalid, 185 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [14 Valid, 119 Invalid, 15 Unknown, 37 Unchecked, 33.1s Time] [2022-04-07 18:37:01,034 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 111 states. [2022-04-07 18:37:01,037 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 111 to 95. [2022-04-07 18:37:01,037 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 18:37:01,038 INFO L82 GeneralOperation]: Start isEquivalent. First operand 111 states. Second operand has 95 states, 75 states have (on average 1.2133333333333334) internal successors, (91), 78 states have internal predecessors, (91), 11 states have call successors, (11), 9 states have call predecessors, (11), 8 states have return successors, (9), 7 states have call predecessors, (9), 9 states have call successors, (9) [2022-04-07 18:37:01,038 INFO L74 IsIncluded]: Start isIncluded. First operand 111 states. Second operand has 95 states, 75 states have (on average 1.2133333333333334) internal successors, (91), 78 states have internal predecessors, (91), 11 states have call successors, (11), 9 states have call predecessors, (11), 8 states have return successors, (9), 7 states have call predecessors, (9), 9 states have call successors, (9) [2022-04-07 18:37:01,038 INFO L87 Difference]: Start difference. First operand 111 states. Second operand has 95 states, 75 states have (on average 1.2133333333333334) internal successors, (91), 78 states have internal predecessors, (91), 11 states have call successors, (11), 9 states have call predecessors, (11), 8 states have return successors, (9), 7 states have call predecessors, (9), 9 states have call successors, (9) [2022-04-07 18:37:01,040 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:37:01,040 INFO L93 Difference]: Finished difference Result 111 states and 127 transitions. [2022-04-07 18:37:01,040 INFO L276 IsEmpty]: Start isEmpty. Operand 111 states and 127 transitions. [2022-04-07 18:37:01,040 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 18:37:01,040 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 18:37:01,041 INFO L74 IsIncluded]: Start isIncluded. First operand has 95 states, 75 states have (on average 1.2133333333333334) internal successors, (91), 78 states have internal predecessors, (91), 11 states have call successors, (11), 9 states have call predecessors, (11), 8 states have return successors, (9), 7 states have call predecessors, (9), 9 states have call successors, (9) Second operand 111 states. [2022-04-07 18:37:01,041 INFO L87 Difference]: Start difference. First operand has 95 states, 75 states have (on average 1.2133333333333334) internal successors, (91), 78 states have internal predecessors, (91), 11 states have call successors, (11), 9 states have call predecessors, (11), 8 states have return successors, (9), 7 states have call predecessors, (9), 9 states have call successors, (9) Second operand 111 states. [2022-04-07 18:37:01,042 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:37:01,042 INFO L93 Difference]: Finished difference Result 111 states and 127 transitions. [2022-04-07 18:37:01,043 INFO L276 IsEmpty]: Start isEmpty. Operand 111 states and 127 transitions. [2022-04-07 18:37:01,043 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 18:37:01,043 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 18:37:01,043 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 18:37:01,043 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 18:37:01,043 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 95 states, 75 states have (on average 1.2133333333333334) internal successors, (91), 78 states have internal predecessors, (91), 11 states have call successors, (11), 9 states have call predecessors, (11), 8 states have return successors, (9), 7 states have call predecessors, (9), 9 states have call successors, (9) [2022-04-07 18:37:01,044 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 95 states to 95 states and 111 transitions. [2022-04-07 18:37:01,045 INFO L78 Accepts]: Start accepts. Automaton has 95 states and 111 transitions. Word has length 27 [2022-04-07 18:37:01,045 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 18:37:01,045 INFO L478 AbstractCegarLoop]: Abstraction has 95 states and 111 transitions. [2022-04-07 18:37:01,045 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 13 states, 13 states have (on average 2.6153846153846154) internal successors, (34), 12 states have internal predecessors, (34), 5 states have call successors, (6), 2 states have call predecessors, (6), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 18:37:01,045 INFO L276 IsEmpty]: Start isEmpty. Operand 95 states and 111 transitions. [2022-04-07 18:37:01,045 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2022-04-07 18:37:01,045 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 18:37:01,046 INFO L499 BasicCegarLoop]: trace histogram [6, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 18:37:01,062 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2022-04-07 18:37:01,259 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable9 [2022-04-07 18:37:01,259 INFO L403 AbstractCegarLoop]: === Iteration 11 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 18:37:01,259 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 18:37:01,259 INFO L85 PathProgramCache]: Analyzing trace with hash 1969058547, now seen corresponding path program 2 times [2022-04-07 18:37:01,259 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 18:37:01,260 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1601818778] [2022-04-07 18:37:01,260 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 18:37:01,260 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 18:37:01,283 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-04-07 18:37:01,284 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [219382709] [2022-04-07 18:37:01,284 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-07 18:37:01,284 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 18:37:01,284 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 18:37:01,285 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 18:37:01,285 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2022-04-07 18:37:01,324 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2022-04-07 18:37:01,324 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 18:37:01,325 INFO L263 TraceCheckSpWp]: Trace formula consists of 72 conjuncts, 7 conjunts are in the unsatisfiable core [2022-04-07 18:37:01,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 18:37:01,331 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 18:37:01,489 INFO L272 TraceCheckUtils]: 0: Hoare triple {3479#true} [85] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3479#true} is VALID [2022-04-07 18:37:01,490 INFO L290 TraceCheckUtils]: 1: Hoare triple {3479#true} [87] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0) (= v_~counter~0_5 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{~counter~0=v_~counter~0_5, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[~counter~0, #NULL.offset, #NULL.base] {3479#true} is VALID [2022-04-07 18:37:01,490 INFO L290 TraceCheckUtils]: 2: Hoare triple {3479#true} [90] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3479#true} is VALID [2022-04-07 18:37:01,490 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3479#true} {3479#true} [115] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3479#true} is VALID [2022-04-07 18:37:01,490 INFO L272 TraceCheckUtils]: 4: Hoare triple {3479#true} [86] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3479#true} is VALID [2022-04-07 18:37:01,490 INFO L290 TraceCheckUtils]: 5: Hoare triple {3479#true} [89] mainENTRY-->L34-3: Formula: (and (= v_main_~B~0_2 1) (= v_main_~B~0_2 v_main_~b~0_3) (= v_main_~q~0_2 0) (= v_main_~A~0_2 |v_main_#t~nondet1_2|) (= v_main_~A~0_2 v_main_~r~0_2)) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~q~0=v_main_~q~0_2, main_~B~0=v_main_~B~0_2, main_~b~0=v_main_~b~0_3, main_~A~0=v_main_~A~0_2, main_~r~0=v_main_~r~0_2} AuxVars[] AssignedVars[main_~q~0, main_#t~nondet1, main_~B~0, main_~b~0, main_~A~0, main_~r~0] {3499#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:37:01,491 INFO L290 TraceCheckUtils]: 6: Hoare triple {3499#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {3499#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:37:01,491 INFO L290 TraceCheckUtils]: 7: Hoare triple {3499#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 10) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {3499#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:37:01,492 INFO L290 TraceCheckUtils]: 8: Hoare triple {3499#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} [101] L35-->L34-3: Formula: (and (= (* 2 v_main_~b~0_13) v_main_~b~0_12) (<= (mod v_main_~b~0_13 4294967296) (mod v_main_~r~0_10 4294967296))) InVars {main_~b~0=v_main_~b~0_13, main_~r~0=v_main_~r~0_10} OutVars{main_~b~0=v_main_~b~0_12, main_~r~0=v_main_~r~0_10} AuxVars[] AssignedVars[main_~b~0] {3499#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:37:01,492 INFO L290 TraceCheckUtils]: 9: Hoare triple {3499#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {3499#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:37:01,493 INFO L290 TraceCheckUtils]: 10: Hoare triple {3499#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 10) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {3499#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:37:01,493 INFO L290 TraceCheckUtils]: 11: Hoare triple {3499#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} [101] L35-->L34-3: Formula: (and (= (* 2 v_main_~b~0_13) v_main_~b~0_12) (<= (mod v_main_~b~0_13 4294967296) (mod v_main_~r~0_10 4294967296))) InVars {main_~b~0=v_main_~b~0_13, main_~r~0=v_main_~r~0_10} OutVars{main_~b~0=v_main_~b~0_12, main_~r~0=v_main_~r~0_10} AuxVars[] AssignedVars[main_~b~0] {3499#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:37:01,493 INFO L290 TraceCheckUtils]: 12: Hoare triple {3499#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {3499#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:37:01,494 INFO L290 TraceCheckUtils]: 13: Hoare triple {3499#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 10) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {3499#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:37:01,494 INFO L290 TraceCheckUtils]: 14: Hoare triple {3499#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} [101] L35-->L34-3: Formula: (and (= (* 2 v_main_~b~0_13) v_main_~b~0_12) (<= (mod v_main_~b~0_13 4294967296) (mod v_main_~r~0_10 4294967296))) InVars {main_~b~0=v_main_~b~0_13, main_~r~0=v_main_~r~0_10} OutVars{main_~b~0=v_main_~b~0_12, main_~r~0=v_main_~r~0_10} AuxVars[] AssignedVars[main_~b~0] {3499#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:37:01,495 INFO L290 TraceCheckUtils]: 15: Hoare triple {3499#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {3499#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:37:01,495 INFO L290 TraceCheckUtils]: 16: Hoare triple {3499#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 10) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {3499#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:37:01,495 INFO L290 TraceCheckUtils]: 17: Hoare triple {3499#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} [101] L35-->L34-3: Formula: (and (= (* 2 v_main_~b~0_13) v_main_~b~0_12) (<= (mod v_main_~b~0_13 4294967296) (mod v_main_~r~0_10 4294967296))) InVars {main_~b~0=v_main_~b~0_13, main_~r~0=v_main_~r~0_10} OutVars{main_~b~0=v_main_~b~0_12, main_~r~0=v_main_~r~0_10} AuxVars[] AssignedVars[main_~b~0] {3499#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:37:01,496 INFO L290 TraceCheckUtils]: 18: Hoare triple {3499#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {3499#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:37:01,496 INFO L290 TraceCheckUtils]: 19: Hoare triple {3499#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 10) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {3499#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:37:01,497 INFO L290 TraceCheckUtils]: 20: Hoare triple {3499#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} [101] L35-->L34-3: Formula: (and (= (* 2 v_main_~b~0_13) v_main_~b~0_12) (<= (mod v_main_~b~0_13 4294967296) (mod v_main_~r~0_10 4294967296))) InVars {main_~b~0=v_main_~b~0_13, main_~r~0=v_main_~r~0_10} OutVars{main_~b~0=v_main_~b~0_12, main_~r~0=v_main_~r~0_10} AuxVars[] AssignedVars[main_~b~0] {3499#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:37:01,497 INFO L290 TraceCheckUtils]: 21: Hoare triple {3499#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {3499#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:37:01,498 INFO L290 TraceCheckUtils]: 22: Hoare triple {3499#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} [95] L34-1-->L43-2: Formula: (not (< |v_main_#t~post2_3| 10)) InVars {main_#t~post2=|v_main_#t~post2_3|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {3499#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:37:01,498 INFO L290 TraceCheckUtils]: 23: Hoare triple {3499#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} [94] L43-2-->L38: Formula: (and (= |v_main_#t~post3_1| v_~counter~0_2) (= (+ |v_main_#t~post3_1| 1) v_~counter~0_1)) InVars {~counter~0=v_~counter~0_2} OutVars{~counter~0=v_~counter~0_1, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post3] {3499#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:37:01,498 INFO L290 TraceCheckUtils]: 24: Hoare triple {3499#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} [98] L38-->L38-2: Formula: (not (< |v_main_#t~post3_3| 10)) InVars {main_#t~post3=|v_main_#t~post3_3|} OutVars{} AuxVars[] AssignedVars[main_#t~post3] {3499#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:37:01,499 INFO L272 TraceCheckUtils]: 25: Hoare triple {3499#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} [97] L38-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_2| (ite (= (mod v_main_~A~0_7 4294967296) (mod (+ v_main_~r~0_12 (* v_main_~q~0_11 v_main_~b~0_15)) 4294967296)) 1 0)) InVars {main_~q~0=v_main_~q~0_11, main_~A~0=v_main_~A~0_7, main_~b~0=v_main_~b~0_15, main_~r~0=v_main_~r~0_12} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_2|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {3560#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 18:37:01,500 INFO L290 TraceCheckUtils]: 26: Hoare triple {3560#(<= 1 |__VERIFIER_assert_#in~cond|)} [103] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3564#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 18:37:01,500 INFO L290 TraceCheckUtils]: 27: Hoare triple {3564#(<= 1 __VERIFIER_assert_~cond)} [106] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3480#false} is VALID [2022-04-07 18:37:01,500 INFO L290 TraceCheckUtils]: 28: Hoare triple {3480#false} [110] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3480#false} is VALID [2022-04-07 18:37:01,500 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2022-04-07 18:37:01,500 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-07 18:37:01,501 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 18:37:01,501 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1601818778] [2022-04-07 18:37:01,501 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-04-07 18:37:01,501 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [219382709] [2022-04-07 18:37:01,501 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [219382709] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 18:37:01,501 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 18:37:01,501 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-04-07 18:37:01,501 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1473738851] [2022-04-07 18:37:01,501 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 18:37:01,501 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 2.4) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-07 18:37:01,502 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 18:37:01,502 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 2.4) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:37:01,564 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 16 edges. 16 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 18:37:01,565 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-04-07 18:37:01,565 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 18:37:01,565 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-04-07 18:37:01,565 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-04-07 18:37:01,565 INFO L87 Difference]: Start difference. First operand 95 states and 111 transitions. Second operand has 5 states, 5 states have (on average 2.4) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:37:01,980 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:37:01,980 INFO L93 Difference]: Finished difference Result 123 states and 142 transitions. [2022-04-07 18:37:01,980 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-04-07 18:37:01,981 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 2.4) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-07 18:37:01,981 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 18:37:01,981 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 2.4) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:37:01,981 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 38 transitions. [2022-04-07 18:37:01,981 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 2.4) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:37:01,982 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 38 transitions. [2022-04-07 18:37:01,982 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 5 states and 38 transitions. [2022-04-07 18:37:02,151 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 38 edges. 38 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 18:37:02,153 INFO L225 Difference]: With dead ends: 123 [2022-04-07 18:37:02,153 INFO L226 Difference]: Without dead ends: 122 [2022-04-07 18:37:02,153 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 25 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2022-04-07 18:37:02,153 INFO L913 BasicCegarLoop]: 18 mSDtfsCounter, 8 mSDsluCounter, 44 mSDsCounter, 0 mSdLazyCounter, 35 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 9 SdHoareTripleChecker+Valid, 62 SdHoareTripleChecker+Invalid, 37 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 35 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-04-07 18:37:02,154 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [9 Valid, 62 Invalid, 37 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 35 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-04-07 18:37:02,154 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 122 states. [2022-04-07 18:37:02,157 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 122 to 108. [2022-04-07 18:37:02,157 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 18:37:02,157 INFO L82 GeneralOperation]: Start isEquivalent. First operand 122 states. Second operand has 108 states, 84 states have (on average 1.1785714285714286) internal successors, (99), 87 states have internal predecessors, (99), 13 states have call successors, (13), 11 states have call predecessors, (13), 10 states have return successors, (11), 9 states have call predecessors, (11), 11 states have call successors, (11) [2022-04-07 18:37:02,157 INFO L74 IsIncluded]: Start isIncluded. First operand 122 states. Second operand has 108 states, 84 states have (on average 1.1785714285714286) internal successors, (99), 87 states have internal predecessors, (99), 13 states have call successors, (13), 11 states have call predecessors, (13), 10 states have return successors, (11), 9 states have call predecessors, (11), 11 states have call successors, (11) [2022-04-07 18:37:02,157 INFO L87 Difference]: Start difference. First operand 122 states. Second operand has 108 states, 84 states have (on average 1.1785714285714286) internal successors, (99), 87 states have internal predecessors, (99), 13 states have call successors, (13), 11 states have call predecessors, (13), 10 states have return successors, (11), 9 states have call predecessors, (11), 11 states have call successors, (11) [2022-04-07 18:37:02,159 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:37:02,159 INFO L93 Difference]: Finished difference Result 122 states and 139 transitions. [2022-04-07 18:37:02,160 INFO L276 IsEmpty]: Start isEmpty. Operand 122 states and 139 transitions. [2022-04-07 18:37:02,160 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 18:37:02,160 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 18:37:02,161 INFO L74 IsIncluded]: Start isIncluded. First operand has 108 states, 84 states have (on average 1.1785714285714286) internal successors, (99), 87 states have internal predecessors, (99), 13 states have call successors, (13), 11 states have call predecessors, (13), 10 states have return successors, (11), 9 states have call predecessors, (11), 11 states have call successors, (11) Second operand 122 states. [2022-04-07 18:37:02,161 INFO L87 Difference]: Start difference. First operand has 108 states, 84 states have (on average 1.1785714285714286) internal successors, (99), 87 states have internal predecessors, (99), 13 states have call successors, (13), 11 states have call predecessors, (13), 10 states have return successors, (11), 9 states have call predecessors, (11), 11 states have call successors, (11) Second operand 122 states. [2022-04-07 18:37:02,162 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:37:02,162 INFO L93 Difference]: Finished difference Result 122 states and 139 transitions. [2022-04-07 18:37:02,163 INFO L276 IsEmpty]: Start isEmpty. Operand 122 states and 139 transitions. [2022-04-07 18:37:02,163 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 18:37:02,163 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 18:37:02,163 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 18:37:02,163 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 18:37:02,163 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 108 states, 84 states have (on average 1.1785714285714286) internal successors, (99), 87 states have internal predecessors, (99), 13 states have call successors, (13), 11 states have call predecessors, (13), 10 states have return successors, (11), 9 states have call predecessors, (11), 11 states have call successors, (11) [2022-04-07 18:37:02,164 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 123 transitions. [2022-04-07 18:37:02,164 INFO L78 Accepts]: Start accepts. Automaton has 108 states and 123 transitions. Word has length 29 [2022-04-07 18:37:02,165 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 18:37:02,165 INFO L478 AbstractCegarLoop]: Abstraction has 108 states and 123 transitions. [2022-04-07 18:37:02,165 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 2.4) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:37:02,165 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 123 transitions. [2022-04-07 18:37:02,165 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2022-04-07 18:37:02,165 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 18:37:02,165 INFO L499 BasicCegarLoop]: trace histogram [4, 4, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 18:37:02,202 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2022-04-07 18:37:02,382 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10,10 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 18:37:02,382 INFO L403 AbstractCegarLoop]: === Iteration 12 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 18:37:02,382 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 18:37:02,382 INFO L85 PathProgramCache]: Analyzing trace with hash 1849486682, now seen corresponding path program 2 times [2022-04-07 18:37:02,383 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 18:37:02,383 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [429518555] [2022-04-07 18:37:02,383 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 18:37:02,383 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 18:37:02,396 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-04-07 18:37:02,397 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1820377398] [2022-04-07 18:37:02,397 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-07 18:37:02,397 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 18:37:02,397 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 18:37:02,407 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 18:37:02,409 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process