/usr/bin/java -ea -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --core.log.level.for.class de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN -tc ../../../trunk/examples/toolchains/AutomizerCTransformed.xml -s ../../../trunk/examples/settings/automizer/LoopAccelerationJordanC.epf -i ../../../trunk/examples/svcomp/nla-digbench-scaling/divbin2_unwindbound100.i -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-34549b5 [2022-04-07 18:35:50,169 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-04-07 18:35:50,170 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-04-07 18:35:50,191 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-04-07 18:35:50,191 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-04-07 18:35:50,192 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-04-07 18:35:50,193 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-04-07 18:35:50,194 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-04-07 18:35:50,195 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-04-07 18:35:50,195 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-04-07 18:35:50,196 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-04-07 18:35:50,197 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-04-07 18:35:50,197 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-04-07 18:35:50,197 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-04-07 18:35:50,198 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-04-07 18:35:50,199 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-04-07 18:35:50,199 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-04-07 18:35:50,200 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-04-07 18:35:50,201 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-04-07 18:35:50,202 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-04-07 18:35:50,208 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-04-07 18:35:50,211 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-04-07 18:35:50,213 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-04-07 18:35:50,216 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-04-07 18:35:50,218 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-04-07 18:35:50,225 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2022-04-07 18:35:50,230 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-04-07 18:35:50,231 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-04-07 18:35:50,237 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-04-07 18:35:50,237 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/automizer/LoopAccelerationJordanC.epf [2022-04-07 18:35:50,247 INFO L113 SettingsManager]: Loading preferences was successful [2022-04-07 18:35:50,248 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-04-07 18:35:50,249 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-04-07 18:35:50,249 INFO L138 SettingsManager]: * sizeof long=4 [2022-04-07 18:35:50,249 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-04-07 18:35:50,249 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-04-07 18:35:50,249 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-04-07 18:35:50,249 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-04-07 18:35:50,249 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-04-07 18:35:50,250 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-04-07 18:35:50,250 INFO L138 SettingsManager]: * sizeof long double=12 [2022-04-07 18:35:50,250 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-04-07 18:35:50,251 INFO L138 SettingsManager]: * Use constant arrays=true [2022-04-07 18:35:50,251 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-04-07 18:35:50,251 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-04-07 18:35:50,251 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-04-07 18:35:50,251 INFO L138 SettingsManager]: * To the following directory=./dump/ [2022-04-07 18:35:50,251 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-04-07 18:35:50,251 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-07 18:35:50,251 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-04-07 18:35:50,251 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-04-07 18:35:50,252 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-04-07 18:35:50,252 INFO L138 SettingsManager]: * TransformationType=LOOP_ACCELERATION_JORDAN WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.core: Log level for class -> de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN; [2022-04-07 18:35:50,429 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-04-07 18:35:50,443 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-04-07 18:35:50,445 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-04-07 18:35:50,446 INFO L271 PluginConnector]: Initializing CDTParser... [2022-04-07 18:35:50,446 INFO L275 PluginConnector]: CDTParser initialized [2022-04-07 18:35:50,447 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/nla-digbench-scaling/divbin2_unwindbound100.i [2022-04-07 18:35:50,489 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/9e96150a1/f0972eaaf6c94abaaebfa732aa01ff19/FLAGa638b2b57 [2022-04-07 18:35:50,799 INFO L306 CDTParser]: Found 1 translation units. [2022-04-07 18:35:50,800 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/nla-digbench-scaling/divbin2_unwindbound100.i [2022-04-07 18:35:50,806 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/9e96150a1/f0972eaaf6c94abaaebfa732aa01ff19/FLAGa638b2b57 [2022-04-07 18:35:51,242 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/9e96150a1/f0972eaaf6c94abaaebfa732aa01ff19 [2022-04-07 18:35:51,244 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-04-07 18:35:51,245 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2022-04-07 18:35:51,246 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-04-07 18:35:51,246 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-04-07 18:35:51,249 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-04-07 18:35:51,250 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.04 06:35:51" (1/1) ... [2022-04-07 18:35:51,251 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@517cd8f7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 06:35:51, skipping insertion in model container [2022-04-07 18:35:51,251 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.04 06:35:51" (1/1) ... [2022-04-07 18:35:51,255 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-04-07 18:35:51,266 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-04-07 18:35:51,408 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/nla-digbench-scaling/divbin2_unwindbound100.i[951,964] [2022-04-07 18:35:51,418 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-07 18:35:51,424 INFO L203 MainTranslator]: Completed pre-run [2022-04-07 18:35:51,432 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/nla-digbench-scaling/divbin2_unwindbound100.i[951,964] [2022-04-07 18:35:51,439 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-07 18:35:51,448 INFO L208 MainTranslator]: Completed translation [2022-04-07 18:35:51,448 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 06:35:51 WrapperNode [2022-04-07 18:35:51,449 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-04-07 18:35:51,449 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-04-07 18:35:51,449 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-04-07 18:35:51,449 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-04-07 18:35:51,456 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 06:35:51" (1/1) ... [2022-04-07 18:35:51,456 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 06:35:51" (1/1) ... [2022-04-07 18:35:51,461 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 06:35:51" (1/1) ... [2022-04-07 18:35:51,462 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 06:35:51" (1/1) ... [2022-04-07 18:35:51,466 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 06:35:51" (1/1) ... [2022-04-07 18:35:51,469 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 06:35:51" (1/1) ... [2022-04-07 18:35:51,470 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 06:35:51" (1/1) ... [2022-04-07 18:35:51,471 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-04-07 18:35:51,472 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-04-07 18:35:51,472 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-04-07 18:35:51,472 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-04-07 18:35:51,472 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 06:35:51" (1/1) ... [2022-04-07 18:35:51,477 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-07 18:35:51,483 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 18:35:51,509 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-04-07 18:35:51,524 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-04-07 18:35:51,534 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2022-04-07 18:35:51,534 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-04-07 18:35:51,534 INFO L138 BoogieDeclarations]: Found implementation of procedure reach_error [2022-04-07 18:35:51,534 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2022-04-07 18:35:51,534 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2022-04-07 18:35:51,535 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2022-04-07 18:35:51,535 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2022-04-07 18:35:51,535 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_fail [2022-04-07 18:35:51,535 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_perror_fail [2022-04-07 18:35:51,535 INFO L130 BoogieDeclarations]: Found specification of procedure __assert [2022-04-07 18:35:51,535 INFO L130 BoogieDeclarations]: Found specification of procedure reach_error [2022-04-07 18:35:51,535 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-04-07 18:35:51,535 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_uint [2022-04-07 18:35:51,535 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2022-04-07 18:35:51,535 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2022-04-07 18:35:51,535 INFO L130 BoogieDeclarations]: Found specification of procedure main [2022-04-07 18:35:51,535 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2022-04-07 18:35:51,535 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-04-07 18:35:51,536 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-04-07 18:35:51,536 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-04-07 18:35:51,536 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-04-07 18:35:51,536 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-04-07 18:35:51,579 INFO L234 CfgBuilder]: Building ICFG [2022-04-07 18:35:51,580 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-04-07 18:35:51,743 INFO L275 CfgBuilder]: Performing block encoding [2022-04-07 18:35:51,747 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-04-07 18:35:51,747 INFO L299 CfgBuilder]: Removed 2 assume(true) statements. [2022-04-07 18:35:51,748 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.04 06:35:51 BoogieIcfgContainer [2022-04-07 18:35:51,748 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-04-07 18:35:51,749 INFO L113 PluginConnector]: ------------------------IcfgTransformer---------------------------- [2022-04-07 18:35:51,749 INFO L271 PluginConnector]: Initializing IcfgTransformer... [2022-04-07 18:35:51,764 INFO L275 PluginConnector]: IcfgTransformer initialized [2022-04-07 18:35:51,766 INFO L185 PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.04 06:35:51" (1/1) ... [2022-04-07 18:35:51,767 INFO L168 ansformationObserver]: Applying ICFG transformation LOOP_ACCELERATION_JORDAN [2022-04-07 18:35:51,792 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 07.04 06:35:51 BasicIcfg [2022-04-07 18:35:51,792 INFO L132 PluginConnector]: ------------------------ END IcfgTransformer---------------------------- [2022-04-07 18:35:51,793 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-04-07 18:35:51,793 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-04-07 18:35:51,795 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-04-07 18:35:51,796 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.04 06:35:51" (1/4) ... [2022-04-07 18:35:51,796 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2c0a03a8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.04 06:35:51, skipping insertion in model container [2022-04-07 18:35:51,796 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 06:35:51" (2/4) ... [2022-04-07 18:35:51,796 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2c0a03a8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.04 06:35:51, skipping insertion in model container [2022-04-07 18:35:51,796 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.04 06:35:51" (3/4) ... [2022-04-07 18:35:51,797 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2c0a03a8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.04 06:35:51, skipping insertion in model container [2022-04-07 18:35:51,797 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 07.04 06:35:51" (4/4) ... [2022-04-07 18:35:51,797 INFO L111 eAbstractionObserver]: Analyzing ICFG divbin2_unwindbound100.iJordan [2022-04-07 18:35:51,800 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:ForwardPredicates Determinization: PREDICATE_ABSTRACTION [2022-04-07 18:35:51,800 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-04-07 18:35:51,845 INFO L339 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-04-07 18:35:51,849 INFO L340 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=ForwardPredicates, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=false, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=All, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP [2022-04-07 18:35:51,849 INFO L341 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-04-07 18:35:51,889 INFO L276 IsEmpty]: Start isEmpty. Operand has 26 states, 17 states have (on average 1.5294117647058822) internal successors, (26), 18 states have internal predecessors, (26), 4 states have call successors, (4), 3 states have call predecessors, (4), 3 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-07 18:35:51,893 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2022-04-07 18:35:51,893 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 18:35:51,900 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 18:35:51,900 INFO L403 AbstractCegarLoop]: === Iteration 1 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 18:35:51,903 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 18:35:51,903 INFO L85 PathProgramCache]: Analyzing trace with hash 2097950667, now seen corresponding path program 1 times [2022-04-07 18:35:51,909 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 18:35:51,909 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [888927571] [2022-04-07 18:35:51,909 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 18:35:51,909 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 18:35:51,988 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 18:35:52,050 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 18:35:52,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 18:35:52,067 INFO L290 TraceCheckUtils]: 0: Hoare triple {34#(and (= ~counter~0 |old(~counter~0)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [87] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0) (= v_~counter~0_5 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{~counter~0=v_~counter~0_5, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[~counter~0, #NULL.offset, #NULL.base] {29#true} is VALID [2022-04-07 18:35:52,067 INFO L290 TraceCheckUtils]: 1: Hoare triple {29#true} [90] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {29#true} is VALID [2022-04-07 18:35:52,067 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {29#true} {29#true} [115] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {29#true} is VALID [2022-04-07 18:35:52,069 INFO L272 TraceCheckUtils]: 0: Hoare triple {29#true} [85] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {34#(and (= ~counter~0 |old(~counter~0)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 18:35:52,071 INFO L290 TraceCheckUtils]: 1: Hoare triple {34#(and (= ~counter~0 |old(~counter~0)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [87] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0) (= v_~counter~0_5 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{~counter~0=v_~counter~0_5, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[~counter~0, #NULL.offset, #NULL.base] {29#true} is VALID [2022-04-07 18:35:52,071 INFO L290 TraceCheckUtils]: 2: Hoare triple {29#true} [90] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {29#true} is VALID [2022-04-07 18:35:52,071 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {29#true} {29#true} [115] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {29#true} is VALID [2022-04-07 18:35:52,071 INFO L272 TraceCheckUtils]: 4: Hoare triple {29#true} [86] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {29#true} is VALID [2022-04-07 18:35:52,073 INFO L290 TraceCheckUtils]: 5: Hoare triple {29#true} [89] mainENTRY-->L34-3: Formula: (and (= v_main_~B~0_2 1) (= v_main_~B~0_2 v_main_~b~0_3) (= v_main_~q~0_2 0) (= v_main_~A~0_2 |v_main_#t~nondet1_2|) (= v_main_~A~0_2 v_main_~r~0_2)) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~q~0=v_main_~q~0_2, main_~B~0=v_main_~B~0_2, main_~b~0=v_main_~b~0_3, main_~A~0=v_main_~A~0_2, main_~r~0=v_main_~r~0_2} AuxVars[] AssignedVars[main_~q~0, main_#t~nondet1, main_~B~0, main_~b~0, main_~A~0, main_~r~0] {29#true} is VALID [2022-04-07 18:35:52,073 INFO L290 TraceCheckUtils]: 6: Hoare triple {29#true} [91] L34-3-->L43-2: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {30#false} is VALID [2022-04-07 18:35:52,073 INFO L290 TraceCheckUtils]: 7: Hoare triple {30#false} [93] L43-2-->L38-2: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {30#false} is VALID [2022-04-07 18:35:52,074 INFO L272 TraceCheckUtils]: 8: Hoare triple {30#false} [97] L38-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_2| (ite (= (mod v_main_~A~0_7 4294967296) (mod (+ v_main_~r~0_12 (* v_main_~q~0_11 v_main_~b~0_15)) 4294967296)) 1 0)) InVars {main_~q~0=v_main_~q~0_11, main_~A~0=v_main_~A~0_7, main_~b~0=v_main_~b~0_15, main_~r~0=v_main_~r~0_12} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_2|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {30#false} is VALID [2022-04-07 18:35:52,074 INFO L290 TraceCheckUtils]: 9: Hoare triple {30#false} [103] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {30#false} is VALID [2022-04-07 18:35:52,075 INFO L290 TraceCheckUtils]: 10: Hoare triple {30#false} [106] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {30#false} is VALID [2022-04-07 18:35:52,075 INFO L290 TraceCheckUtils]: 11: Hoare triple {30#false} [110] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30#false} is VALID [2022-04-07 18:35:52,075 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 18:35:52,076 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 18:35:52,076 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [888927571] [2022-04-07 18:35:52,077 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [888927571] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 18:35:52,077 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 18:35:52,077 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-07 18:35:52,078 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [687222008] [2022-04-07 18:35:52,078 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 18:35:52,082 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 2.6666666666666665) internal successors, (8), 2 states have internal predecessors, (8), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 12 [2022-04-07 18:35:52,083 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 18:35:52,085 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 2.6666666666666665) internal successors, (8), 2 states have internal predecessors, (8), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:35:52,111 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 12 edges. 12 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 18:35:52,111 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-07 18:35:52,111 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 18:35:52,130 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-07 18:35:52,130 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-07 18:35:52,132 INFO L87 Difference]: Start difference. First operand has 26 states, 17 states have (on average 1.5294117647058822) internal successors, (26), 18 states have internal predecessors, (26), 4 states have call successors, (4), 3 states have call predecessors, (4), 3 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) Second operand has 3 states, 3 states have (on average 2.6666666666666665) internal successors, (8), 2 states have internal predecessors, (8), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:35:52,222 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:35:52,222 INFO L93 Difference]: Finished difference Result 27 states and 32 transitions. [2022-04-07 18:35:52,222 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-07 18:35:52,223 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 2.6666666666666665) internal successors, (8), 2 states have internal predecessors, (8), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 12 [2022-04-07 18:35:52,223 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 18:35:52,224 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 2.6666666666666665) internal successors, (8), 2 states have internal predecessors, (8), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:35:52,229 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 36 transitions. [2022-04-07 18:35:52,230 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 2.6666666666666665) internal successors, (8), 2 states have internal predecessors, (8), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:35:52,231 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 36 transitions. [2022-04-07 18:35:52,232 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 36 transitions. [2022-04-07 18:35:52,272 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 36 edges. 36 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 18:35:52,280 INFO L225 Difference]: With dead ends: 27 [2022-04-07 18:35:52,280 INFO L226 Difference]: Without dead ends: 22 [2022-04-07 18:35:52,281 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-07 18:35:52,284 INFO L913 BasicCegarLoop]: 30 mSDtfsCounter, 6 mSDsluCounter, 4 mSDsCounter, 0 mSdLazyCounter, 18 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 34 SdHoareTripleChecker+Invalid, 21 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 18 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 18:35:52,284 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [6 Valid, 34 Invalid, 21 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 18 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 18:35:52,295 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2022-04-07 18:35:52,305 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 21. [2022-04-07 18:35:52,305 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 18:35:52,306 INFO L82 GeneralOperation]: Start isEquivalent. First operand 22 states. Second operand has 21 states, 14 states have (on average 1.4285714285714286) internal successors, (20), 15 states have internal predecessors, (20), 4 states have call successors, (4), 3 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 18:35:52,307 INFO L74 IsIncluded]: Start isIncluded. First operand 22 states. Second operand has 21 states, 14 states have (on average 1.4285714285714286) internal successors, (20), 15 states have internal predecessors, (20), 4 states have call successors, (4), 3 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 18:35:52,307 INFO L87 Difference]: Start difference. First operand 22 states. Second operand has 21 states, 14 states have (on average 1.4285714285714286) internal successors, (20), 15 states have internal predecessors, (20), 4 states have call successors, (4), 3 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 18:35:52,310 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:35:52,311 INFO L93 Difference]: Finished difference Result 22 states and 27 transitions. [2022-04-07 18:35:52,311 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 27 transitions. [2022-04-07 18:35:52,311 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 18:35:52,311 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 18:35:52,312 INFO L74 IsIncluded]: Start isIncluded. First operand has 21 states, 14 states have (on average 1.4285714285714286) internal successors, (20), 15 states have internal predecessors, (20), 4 states have call successors, (4), 3 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 22 states. [2022-04-07 18:35:52,312 INFO L87 Difference]: Start difference. First operand has 21 states, 14 states have (on average 1.4285714285714286) internal successors, (20), 15 states have internal predecessors, (20), 4 states have call successors, (4), 3 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 22 states. [2022-04-07 18:35:52,318 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:35:52,318 INFO L93 Difference]: Finished difference Result 22 states and 27 transitions. [2022-04-07 18:35:52,318 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 27 transitions. [2022-04-07 18:35:52,318 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 18:35:52,318 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 18:35:52,318 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 18:35:52,318 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 18:35:52,319 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 14 states have (on average 1.4285714285714286) internal successors, (20), 15 states have internal predecessors, (20), 4 states have call successors, (4), 3 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 18:35:52,320 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 26 transitions. [2022-04-07 18:35:52,320 INFO L78 Accepts]: Start accepts. Automaton has 21 states and 26 transitions. Word has length 12 [2022-04-07 18:35:52,321 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 18:35:52,321 INFO L478 AbstractCegarLoop]: Abstraction has 21 states and 26 transitions. [2022-04-07 18:35:52,321 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 2.6666666666666665) internal successors, (8), 2 states have internal predecessors, (8), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:35:52,321 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 26 transitions. [2022-04-07 18:35:52,321 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2022-04-07 18:35:52,322 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 18:35:52,322 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 18:35:52,322 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-04-07 18:35:52,322 INFO L403 AbstractCegarLoop]: === Iteration 2 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 18:35:52,323 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 18:35:52,323 INFO L85 PathProgramCache]: Analyzing trace with hash 923003056, now seen corresponding path program 1 times [2022-04-07 18:35:52,323 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 18:35:52,323 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [239206112] [2022-04-07 18:35:52,323 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 18:35:52,323 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 18:35:52,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 18:35:52,374 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 18:35:52,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 18:35:52,394 INFO L290 TraceCheckUtils]: 0: Hoare triple {136#(and (= ~counter~0 |old(~counter~0)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [87] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0) (= v_~counter~0_5 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{~counter~0=v_~counter~0_5, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[~counter~0, #NULL.offset, #NULL.base] {134#(<= ~counter~0 0)} is VALID [2022-04-07 18:35:52,394 INFO L290 TraceCheckUtils]: 1: Hoare triple {134#(<= ~counter~0 0)} [90] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {134#(<= ~counter~0 0)} is VALID [2022-04-07 18:35:52,395 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {134#(<= ~counter~0 0)} {129#true} [115] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {134#(<= ~counter~0 0)} is VALID [2022-04-07 18:35:52,396 INFO L272 TraceCheckUtils]: 0: Hoare triple {129#true} [85] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {136#(and (= ~counter~0 |old(~counter~0)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 18:35:52,396 INFO L290 TraceCheckUtils]: 1: Hoare triple {136#(and (= ~counter~0 |old(~counter~0)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [87] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0) (= v_~counter~0_5 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{~counter~0=v_~counter~0_5, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[~counter~0, #NULL.offset, #NULL.base] {134#(<= ~counter~0 0)} is VALID [2022-04-07 18:35:52,397 INFO L290 TraceCheckUtils]: 2: Hoare triple {134#(<= ~counter~0 0)} [90] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {134#(<= ~counter~0 0)} is VALID [2022-04-07 18:35:52,397 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {134#(<= ~counter~0 0)} {129#true} [115] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {134#(<= ~counter~0 0)} is VALID [2022-04-07 18:35:52,398 INFO L272 TraceCheckUtils]: 4: Hoare triple {134#(<= ~counter~0 0)} [86] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {134#(<= ~counter~0 0)} is VALID [2022-04-07 18:35:52,398 INFO L290 TraceCheckUtils]: 5: Hoare triple {134#(<= ~counter~0 0)} [89] mainENTRY-->L34-3: Formula: (and (= v_main_~B~0_2 1) (= v_main_~B~0_2 v_main_~b~0_3) (= v_main_~q~0_2 0) (= v_main_~A~0_2 |v_main_#t~nondet1_2|) (= v_main_~A~0_2 v_main_~r~0_2)) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~q~0=v_main_~q~0_2, main_~B~0=v_main_~B~0_2, main_~b~0=v_main_~b~0_3, main_~A~0=v_main_~A~0_2, main_~r~0=v_main_~r~0_2} AuxVars[] AssignedVars[main_~q~0, main_#t~nondet1, main_~B~0, main_~b~0, main_~A~0, main_~r~0] {134#(<= ~counter~0 0)} is VALID [2022-04-07 18:35:52,398 INFO L290 TraceCheckUtils]: 6: Hoare triple {134#(<= ~counter~0 0)} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {135#(<= |main_#t~post2| 0)} is VALID [2022-04-07 18:35:52,399 INFO L290 TraceCheckUtils]: 7: Hoare triple {135#(<= |main_#t~post2| 0)} [95] L34-1-->L43-2: Formula: (not (< |v_main_#t~post2_3| 100)) InVars {main_#t~post2=|v_main_#t~post2_3|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {130#false} is VALID [2022-04-07 18:35:52,399 INFO L290 TraceCheckUtils]: 8: Hoare triple {130#false} [94] L43-2-->L38: Formula: (and (= |v_main_#t~post3_1| v_~counter~0_2) (= (+ |v_main_#t~post3_1| 1) v_~counter~0_1)) InVars {~counter~0=v_~counter~0_2} OutVars{~counter~0=v_~counter~0_1, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post3] {130#false} is VALID [2022-04-07 18:35:52,399 INFO L290 TraceCheckUtils]: 9: Hoare triple {130#false} [98] L38-->L38-2: Formula: (not (< |v_main_#t~post3_3| 100)) InVars {main_#t~post3=|v_main_#t~post3_3|} OutVars{} AuxVars[] AssignedVars[main_#t~post3] {130#false} is VALID [2022-04-07 18:35:52,399 INFO L272 TraceCheckUtils]: 10: Hoare triple {130#false} [97] L38-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_2| (ite (= (mod v_main_~A~0_7 4294967296) (mod (+ v_main_~r~0_12 (* v_main_~q~0_11 v_main_~b~0_15)) 4294967296)) 1 0)) InVars {main_~q~0=v_main_~q~0_11, main_~A~0=v_main_~A~0_7, main_~b~0=v_main_~b~0_15, main_~r~0=v_main_~r~0_12} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_2|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {130#false} is VALID [2022-04-07 18:35:52,400 INFO L290 TraceCheckUtils]: 11: Hoare triple {130#false} [103] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {130#false} is VALID [2022-04-07 18:35:52,400 INFO L290 TraceCheckUtils]: 12: Hoare triple {130#false} [106] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {130#false} is VALID [2022-04-07 18:35:52,400 INFO L290 TraceCheckUtils]: 13: Hoare triple {130#false} [110] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {130#false} is VALID [2022-04-07 18:35:52,400 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 18:35:52,400 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 18:35:52,400 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [239206112] [2022-04-07 18:35:52,401 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [239206112] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 18:35:52,401 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 18:35:52,401 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-07 18:35:52,401 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [665161104] [2022-04-07 18:35:52,401 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 18:35:52,402 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 4 states have (on average 2.5) internal successors, (10), 3 states have internal predecessors, (10), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 14 [2022-04-07 18:35:52,402 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 18:35:52,402 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 5 states, 4 states have (on average 2.5) internal successors, (10), 3 states have internal predecessors, (10), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:35:52,412 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 14 edges. 14 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 18:35:52,412 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-04-07 18:35:52,412 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 18:35:52,413 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-04-07 18:35:52,413 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-04-07 18:35:52,413 INFO L87 Difference]: Start difference. First operand 21 states and 26 transitions. Second operand has 5 states, 4 states have (on average 2.5) internal successors, (10), 3 states have internal predecessors, (10), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:35:52,507 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:35:52,507 INFO L93 Difference]: Finished difference Result 23 states and 28 transitions. [2022-04-07 18:35:52,507 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-04-07 18:35:52,507 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 4 states have (on average 2.5) internal successors, (10), 3 states have internal predecessors, (10), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 14 [2022-04-07 18:35:52,507 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 18:35:52,508 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 4 states have (on average 2.5) internal successors, (10), 3 states have internal predecessors, (10), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:35:52,509 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 29 transitions. [2022-04-07 18:35:52,509 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 4 states have (on average 2.5) internal successors, (10), 3 states have internal predecessors, (10), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:35:52,510 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 29 transitions. [2022-04-07 18:35:52,510 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 6 states and 29 transitions. [2022-04-07 18:35:52,532 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 29 edges. 29 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 18:35:52,533 INFO L225 Difference]: With dead ends: 23 [2022-04-07 18:35:52,533 INFO L226 Difference]: Without dead ends: 23 [2022-04-07 18:35:52,533 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2022-04-07 18:35:52,534 INFO L913 BasicCegarLoop]: 24 mSDtfsCounter, 6 mSDsluCounter, 29 mSDsCounter, 0 mSdLazyCounter, 36 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 53 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 36 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 18:35:52,535 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [6 Valid, 53 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 36 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 18:35:52,535 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states. [2022-04-07 18:35:52,537 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 23. [2022-04-07 18:35:52,537 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 18:35:52,537 INFO L82 GeneralOperation]: Start isEquivalent. First operand 23 states. Second operand has 23 states, 16 states have (on average 1.375) internal successors, (22), 17 states have internal predecessors, (22), 4 states have call successors, (4), 3 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 18:35:52,537 INFO L74 IsIncluded]: Start isIncluded. First operand 23 states. Second operand has 23 states, 16 states have (on average 1.375) internal successors, (22), 17 states have internal predecessors, (22), 4 states have call successors, (4), 3 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 18:35:52,537 INFO L87 Difference]: Start difference. First operand 23 states. Second operand has 23 states, 16 states have (on average 1.375) internal successors, (22), 17 states have internal predecessors, (22), 4 states have call successors, (4), 3 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 18:35:52,539 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:35:52,539 INFO L93 Difference]: Finished difference Result 23 states and 28 transitions. [2022-04-07 18:35:52,539 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 28 transitions. [2022-04-07 18:35:52,539 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 18:35:52,539 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 18:35:52,540 INFO L74 IsIncluded]: Start isIncluded. First operand has 23 states, 16 states have (on average 1.375) internal successors, (22), 17 states have internal predecessors, (22), 4 states have call successors, (4), 3 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 23 states. [2022-04-07 18:35:52,540 INFO L87 Difference]: Start difference. First operand has 23 states, 16 states have (on average 1.375) internal successors, (22), 17 states have internal predecessors, (22), 4 states have call successors, (4), 3 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 23 states. [2022-04-07 18:35:52,541 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:35:52,541 INFO L93 Difference]: Finished difference Result 23 states and 28 transitions. [2022-04-07 18:35:52,541 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 28 transitions. [2022-04-07 18:35:52,541 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 18:35:52,542 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 18:35:52,542 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 18:35:52,542 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 18:35:52,542 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 16 states have (on average 1.375) internal successors, (22), 17 states have internal predecessors, (22), 4 states have call successors, (4), 3 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 18:35:52,543 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 28 transitions. [2022-04-07 18:35:52,543 INFO L78 Accepts]: Start accepts. Automaton has 23 states and 28 transitions. Word has length 14 [2022-04-07 18:35:52,543 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 18:35:52,543 INFO L478 AbstractCegarLoop]: Abstraction has 23 states and 28 transitions. [2022-04-07 18:35:52,544 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 4 states have (on average 2.5) internal successors, (10), 3 states have internal predecessors, (10), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:35:52,544 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 28 transitions. [2022-04-07 18:35:52,544 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2022-04-07 18:35:52,544 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 18:35:52,544 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 18:35:52,544 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-04-07 18:35:52,544 INFO L403 AbstractCegarLoop]: === Iteration 3 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 18:35:52,545 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 18:35:52,545 INFO L85 PathProgramCache]: Analyzing trace with hash 1207414063, now seen corresponding path program 1 times [2022-04-07 18:35:52,545 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 18:35:52,545 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1049587930] [2022-04-07 18:35:52,545 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 18:35:52,546 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 18:35:52,572 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-04-07 18:35:52,572 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1418237327] [2022-04-07 18:35:52,572 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 18:35:52,572 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 18:35:52,572 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 18:35:52,608 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 18:35:52,617 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-04-07 18:35:52,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 18:35:52,666 INFO L263 TraceCheckSpWp]: Trace formula consists of 73 conjuncts, 7 conjunts are in the unsatisfiable core [2022-04-07 18:35:52,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 18:35:52,676 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 18:35:52,791 INFO L272 TraceCheckUtils]: 0: Hoare triple {233#true} [85] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {233#true} is VALID [2022-04-07 18:35:52,791 INFO L290 TraceCheckUtils]: 1: Hoare triple {233#true} [87] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0) (= v_~counter~0_5 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{~counter~0=v_~counter~0_5, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[~counter~0, #NULL.offset, #NULL.base] {241#(<= ~counter~0 0)} is VALID [2022-04-07 18:35:52,792 INFO L290 TraceCheckUtils]: 2: Hoare triple {241#(<= ~counter~0 0)} [90] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {241#(<= ~counter~0 0)} is VALID [2022-04-07 18:35:52,792 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {241#(<= ~counter~0 0)} {233#true} [115] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {241#(<= ~counter~0 0)} is VALID [2022-04-07 18:35:52,793 INFO L272 TraceCheckUtils]: 4: Hoare triple {241#(<= ~counter~0 0)} [86] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {241#(<= ~counter~0 0)} is VALID [2022-04-07 18:35:52,793 INFO L290 TraceCheckUtils]: 5: Hoare triple {241#(<= ~counter~0 0)} [89] mainENTRY-->L34-3: Formula: (and (= v_main_~B~0_2 1) (= v_main_~B~0_2 v_main_~b~0_3) (= v_main_~q~0_2 0) (= v_main_~A~0_2 |v_main_#t~nondet1_2|) (= v_main_~A~0_2 v_main_~r~0_2)) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~q~0=v_main_~q~0_2, main_~B~0=v_main_~B~0_2, main_~b~0=v_main_~b~0_3, main_~A~0=v_main_~A~0_2, main_~r~0=v_main_~r~0_2} AuxVars[] AssignedVars[main_~q~0, main_#t~nondet1, main_~B~0, main_~b~0, main_~A~0, main_~r~0] {241#(<= ~counter~0 0)} is VALID [2022-04-07 18:35:52,794 INFO L290 TraceCheckUtils]: 6: Hoare triple {241#(<= ~counter~0 0)} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {257#(<= ~counter~0 1)} is VALID [2022-04-07 18:35:52,794 INFO L290 TraceCheckUtils]: 7: Hoare triple {257#(<= ~counter~0 1)} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 100) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {257#(<= ~counter~0 1)} is VALID [2022-04-07 18:35:52,795 INFO L290 TraceCheckUtils]: 8: Hoare triple {257#(<= ~counter~0 1)} [100] L35-->L43-2: Formula: (not (<= (mod v_main_~b~0_11 4294967296) (mod v_main_~r~0_9 4294967296))) InVars {main_~b~0=v_main_~b~0_11, main_~r~0=v_main_~r~0_9} OutVars{main_~b~0=v_main_~b~0_11, main_~r~0=v_main_~r~0_9} AuxVars[] AssignedVars[] {257#(<= ~counter~0 1)} is VALID [2022-04-07 18:35:52,795 INFO L290 TraceCheckUtils]: 9: Hoare triple {257#(<= ~counter~0 1)} [94] L43-2-->L38: Formula: (and (= |v_main_#t~post3_1| v_~counter~0_2) (= (+ |v_main_#t~post3_1| 1) v_~counter~0_1)) InVars {~counter~0=v_~counter~0_2} OutVars{~counter~0=v_~counter~0_1, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post3] {267#(<= |main_#t~post3| 1)} is VALID [2022-04-07 18:35:52,796 INFO L290 TraceCheckUtils]: 10: Hoare triple {267#(<= |main_#t~post3| 1)} [98] L38-->L38-2: Formula: (not (< |v_main_#t~post3_3| 100)) InVars {main_#t~post3=|v_main_#t~post3_3|} OutVars{} AuxVars[] AssignedVars[main_#t~post3] {234#false} is VALID [2022-04-07 18:35:52,796 INFO L272 TraceCheckUtils]: 11: Hoare triple {234#false} [97] L38-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_2| (ite (= (mod v_main_~A~0_7 4294967296) (mod (+ v_main_~r~0_12 (* v_main_~q~0_11 v_main_~b~0_15)) 4294967296)) 1 0)) InVars {main_~q~0=v_main_~q~0_11, main_~A~0=v_main_~A~0_7, main_~b~0=v_main_~b~0_15, main_~r~0=v_main_~r~0_12} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_2|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {234#false} is VALID [2022-04-07 18:35:52,796 INFO L290 TraceCheckUtils]: 12: Hoare triple {234#false} [103] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {234#false} is VALID [2022-04-07 18:35:52,796 INFO L290 TraceCheckUtils]: 13: Hoare triple {234#false} [106] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {234#false} is VALID [2022-04-07 18:35:52,796 INFO L290 TraceCheckUtils]: 14: Hoare triple {234#false} [110] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {234#false} is VALID [2022-04-07 18:35:52,796 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 18:35:52,797 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-07 18:35:52,797 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 18:35:52,797 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1049587930] [2022-04-07 18:35:52,797 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-04-07 18:35:52,797 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1418237327] [2022-04-07 18:35:52,797 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1418237327] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 18:35:52,797 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 18:35:52,798 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-04-07 18:35:52,798 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1752100883] [2022-04-07 18:35:52,798 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 18:35:52,798 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 2.2) internal successors, (11), 4 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-07 18:35:52,798 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 18:35:52,799 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 2.2) internal successors, (11), 4 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:35:52,809 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 15 edges. 15 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 18:35:52,809 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-04-07 18:35:52,809 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 18:35:52,810 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-04-07 18:35:52,810 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2022-04-07 18:35:52,810 INFO L87 Difference]: Start difference. First operand 23 states and 28 transitions. Second operand has 5 states, 5 states have (on average 2.2) internal successors, (11), 4 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:35:52,865 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:35:52,865 INFO L93 Difference]: Finished difference Result 27 states and 33 transitions. [2022-04-07 18:35:52,865 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-04-07 18:35:52,865 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 2.2) internal successors, (11), 4 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-07 18:35:52,865 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 18:35:52,866 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 2.2) internal successors, (11), 4 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:35:52,867 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 34 transitions. [2022-04-07 18:35:52,867 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 2.2) internal successors, (11), 4 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:35:52,868 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 34 transitions. [2022-04-07 18:35:52,868 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 5 states and 34 transitions. [2022-04-07 18:35:52,893 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 34 edges. 34 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 18:35:52,894 INFO L225 Difference]: With dead ends: 27 [2022-04-07 18:35:52,894 INFO L226 Difference]: Without dead ends: 27 [2022-04-07 18:35:52,894 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 11 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2022-04-07 18:35:52,895 INFO L913 BasicCegarLoop]: 23 mSDtfsCounter, 3 mSDsluCounter, 58 mSDsCounter, 0 mSdLazyCounter, 13 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3 SdHoareTripleChecker+Valid, 81 SdHoareTripleChecker+Invalid, 16 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 13 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 18:35:52,896 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [3 Valid, 81 Invalid, 16 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 13 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 18:35:52,896 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states. [2022-04-07 18:35:52,898 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 26. [2022-04-07 18:35:52,898 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 18:35:52,898 INFO L82 GeneralOperation]: Start isEquivalent. First operand 27 states. Second operand has 26 states, 19 states have (on average 1.368421052631579) internal successors, (26), 20 states have internal predecessors, (26), 4 states have call successors, (4), 3 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 18:35:52,898 INFO L74 IsIncluded]: Start isIncluded. First operand 27 states. Second operand has 26 states, 19 states have (on average 1.368421052631579) internal successors, (26), 20 states have internal predecessors, (26), 4 states have call successors, (4), 3 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 18:35:52,898 INFO L87 Difference]: Start difference. First operand 27 states. Second operand has 26 states, 19 states have (on average 1.368421052631579) internal successors, (26), 20 states have internal predecessors, (26), 4 states have call successors, (4), 3 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 18:35:52,900 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:35:52,900 INFO L93 Difference]: Finished difference Result 27 states and 33 transitions. [2022-04-07 18:35:52,900 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 33 transitions. [2022-04-07 18:35:52,900 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 18:35:52,900 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 18:35:52,901 INFO L74 IsIncluded]: Start isIncluded. First operand has 26 states, 19 states have (on average 1.368421052631579) internal successors, (26), 20 states have internal predecessors, (26), 4 states have call successors, (4), 3 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 27 states. [2022-04-07 18:35:52,901 INFO L87 Difference]: Start difference. First operand has 26 states, 19 states have (on average 1.368421052631579) internal successors, (26), 20 states have internal predecessors, (26), 4 states have call successors, (4), 3 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 27 states. [2022-04-07 18:35:52,902 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:35:52,902 INFO L93 Difference]: Finished difference Result 27 states and 33 transitions. [2022-04-07 18:35:52,902 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 33 transitions. [2022-04-07 18:35:52,902 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 18:35:52,903 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 18:35:52,903 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 18:35:52,903 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 18:35:52,903 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 19 states have (on average 1.368421052631579) internal successors, (26), 20 states have internal predecessors, (26), 4 states have call successors, (4), 3 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 18:35:52,904 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 32 transitions. [2022-04-07 18:35:52,904 INFO L78 Accepts]: Start accepts. Automaton has 26 states and 32 transitions. Word has length 15 [2022-04-07 18:35:52,904 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 18:35:52,904 INFO L478 AbstractCegarLoop]: Abstraction has 26 states and 32 transitions. [2022-04-07 18:35:52,904 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 2.2) internal successors, (11), 4 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:35:52,905 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 32 transitions. [2022-04-07 18:35:52,905 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2022-04-07 18:35:52,905 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 18:35:52,905 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 18:35:52,932 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2022-04-07 18:35:53,119 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2,2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 18:35:53,120 INFO L403 AbstractCegarLoop]: === Iteration 4 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 18:35:53,120 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 18:35:53,120 INFO L85 PathProgramCache]: Analyzing trace with hash 1208546121, now seen corresponding path program 1 times [2022-04-07 18:35:53,120 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 18:35:53,121 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [67841549] [2022-04-07 18:35:53,121 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 18:35:53,121 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 18:35:53,132 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-04-07 18:35:53,132 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [370083068] [2022-04-07 18:35:53,132 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 18:35:53,133 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 18:35:53,133 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 18:35:53,134 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 18:35:53,135 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-04-07 18:35:53,172 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 18:35:53,173 INFO L263 TraceCheckSpWp]: Trace formula consists of 73 conjuncts, 14 conjunts are in the unsatisfiable core [2022-04-07 18:35:53,179 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 18:35:53,180 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 18:35:53,390 INFO L272 TraceCheckUtils]: 0: Hoare triple {389#true} [85] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {389#true} is VALID [2022-04-07 18:35:53,390 INFO L290 TraceCheckUtils]: 1: Hoare triple {389#true} [87] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0) (= v_~counter~0_5 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{~counter~0=v_~counter~0_5, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[~counter~0, #NULL.offset, #NULL.base] {389#true} is VALID [2022-04-07 18:35:53,390 INFO L290 TraceCheckUtils]: 2: Hoare triple {389#true} [90] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {389#true} is VALID [2022-04-07 18:35:53,390 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {389#true} {389#true} [115] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {389#true} is VALID [2022-04-07 18:35:53,391 INFO L272 TraceCheckUtils]: 4: Hoare triple {389#true} [86] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {389#true} is VALID [2022-04-07 18:35:53,391 INFO L290 TraceCheckUtils]: 5: Hoare triple {389#true} [89] mainENTRY-->L34-3: Formula: (and (= v_main_~B~0_2 1) (= v_main_~B~0_2 v_main_~b~0_3) (= v_main_~q~0_2 0) (= v_main_~A~0_2 |v_main_#t~nondet1_2|) (= v_main_~A~0_2 v_main_~r~0_2)) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~q~0=v_main_~q~0_2, main_~B~0=v_main_~B~0_2, main_~b~0=v_main_~b~0_3, main_~A~0=v_main_~A~0_2, main_~r~0=v_main_~r~0_2} AuxVars[] AssignedVars[main_~q~0, main_#t~nondet1, main_~B~0, main_~b~0, main_~A~0, main_~r~0] {409#(and (= main_~b~0 1) (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:35:53,392 INFO L290 TraceCheckUtils]: 6: Hoare triple {409#(and (= main_~b~0 1) (= main_~A~0 main_~r~0) (= main_~q~0 0))} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {409#(and (= main_~b~0 1) (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:35:53,392 INFO L290 TraceCheckUtils]: 7: Hoare triple {409#(and (= main_~b~0 1) (= main_~A~0 main_~r~0) (= main_~q~0 0))} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 100) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {409#(and (= main_~b~0 1) (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:35:53,393 INFO L290 TraceCheckUtils]: 8: Hoare triple {409#(and (= main_~b~0 1) (= main_~A~0 main_~r~0) (= main_~q~0 0))} [100] L35-->L43-2: Formula: (not (<= (mod v_main_~b~0_11 4294967296) (mod v_main_~r~0_9 4294967296))) InVars {main_~b~0=v_main_~b~0_11, main_~r~0=v_main_~r~0_9} OutVars{main_~b~0=v_main_~b~0_11, main_~r~0=v_main_~r~0_9} AuxVars[] AssignedVars[] {419#(and (= main_~b~0 1) (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:35:53,393 INFO L290 TraceCheckUtils]: 9: Hoare triple {419#(and (= main_~b~0 1) (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (= main_~A~0 main_~r~0) (= main_~q~0 0))} [94] L43-2-->L38: Formula: (and (= |v_main_#t~post3_1| v_~counter~0_2) (= (+ |v_main_#t~post3_1| 1) v_~counter~0_1)) InVars {~counter~0=v_~counter~0_2} OutVars{~counter~0=v_~counter~0_1, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post3] {419#(and (= main_~b~0 1) (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:35:53,394 INFO L290 TraceCheckUtils]: 10: Hoare triple {419#(and (= main_~b~0 1) (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (= main_~A~0 main_~r~0) (= main_~q~0 0))} [99] L38-->L39: Formula: (< |v_main_#t~post3_5| 100) InVars {main_#t~post3=|v_main_#t~post3_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post3] {419#(and (= main_~b~0 1) (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:35:53,395 INFO L272 TraceCheckUtils]: 11: Hoare triple {419#(and (= main_~b~0 1) (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (= main_~A~0 main_~r~0) (= main_~q~0 0))} [104] L39-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~A~0_6 4294967296) (mod (+ v_main_~r~0_11 (* v_main_~q~0_10 v_main_~b~0_14)) 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~q~0=v_main_~q~0_10, main_~A~0=v_main_~A~0_6, main_~b~0=v_main_~b~0_14, main_~r~0=v_main_~r~0_11} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {429#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 18:35:53,395 INFO L290 TraceCheckUtils]: 12: Hoare triple {429#(<= 1 |__VERIFIER_assert_#in~cond|)} [103] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {433#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 18:35:53,396 INFO L290 TraceCheckUtils]: 13: Hoare triple {433#(<= 1 __VERIFIER_assert_~cond)} [106] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {390#false} is VALID [2022-04-07 18:35:53,396 INFO L290 TraceCheckUtils]: 14: Hoare triple {390#false} [110] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {390#false} is VALID [2022-04-07 18:35:53,396 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 18:35:53,396 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-07 18:35:53,396 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 18:35:53,396 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [67841549] [2022-04-07 18:35:53,396 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-04-07 18:35:53,397 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [370083068] [2022-04-07 18:35:53,397 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [370083068] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 18:35:53,397 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 18:35:53,397 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-04-07 18:35:53,397 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [63630124] [2022-04-07 18:35:53,397 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 18:35:53,397 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 1.8333333333333333) internal successors, (11), 5 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-07 18:35:53,398 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 18:35:53,398 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 6 states, 6 states have (on average 1.8333333333333333) internal successors, (11), 5 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:35:53,411 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 15 edges. 15 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 18:35:53,411 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-04-07 18:35:53,412 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 18:35:53,412 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-04-07 18:35:53,412 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2022-04-07 18:35:53,412 INFO L87 Difference]: Start difference. First operand 26 states and 32 transitions. Second operand has 6 states, 6 states have (on average 1.8333333333333333) internal successors, (11), 5 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:35:53,552 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:35:53,553 INFO L93 Difference]: Finished difference Result 33 states and 40 transitions. [2022-04-07 18:35:53,553 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-04-07 18:35:53,553 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 1.8333333333333333) internal successors, (11), 5 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-07 18:35:53,553 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 18:35:53,553 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 1.8333333333333333) internal successors, (11), 5 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:35:53,555 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 41 transitions. [2022-04-07 18:35:53,555 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 1.8333333333333333) internal successors, (11), 5 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:35:53,556 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 41 transitions. [2022-04-07 18:35:53,556 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 6 states and 41 transitions. [2022-04-07 18:35:53,593 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 41 edges. 41 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 18:35:53,594 INFO L225 Difference]: With dead ends: 33 [2022-04-07 18:35:53,594 INFO L226 Difference]: Without dead ends: 32 [2022-04-07 18:35:53,595 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 10 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2022-04-07 18:35:53,595 INFO L913 BasicCegarLoop]: 21 mSDtfsCounter, 9 mSDsluCounter, 67 mSDsCounter, 0 mSdLazyCounter, 48 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 10 SdHoareTripleChecker+Valid, 88 SdHoareTripleChecker+Invalid, 49 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 48 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 18:35:53,595 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [10 Valid, 88 Invalid, 49 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 48 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 18:35:53,596 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states. [2022-04-07 18:35:53,598 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 32. [2022-04-07 18:35:53,598 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 18:35:53,598 INFO L82 GeneralOperation]: Start isEquivalent. First operand 32 states. Second operand has 32 states, 23 states have (on average 1.3043478260869565) internal successors, (30), 24 states have internal predecessors, (30), 5 states have call successors, (5), 4 states have call predecessors, (5), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 18:35:53,598 INFO L74 IsIncluded]: Start isIncluded. First operand 32 states. Second operand has 32 states, 23 states have (on average 1.3043478260869565) internal successors, (30), 24 states have internal predecessors, (30), 5 states have call successors, (5), 4 states have call predecessors, (5), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 18:35:53,598 INFO L87 Difference]: Start difference. First operand 32 states. Second operand has 32 states, 23 states have (on average 1.3043478260869565) internal successors, (30), 24 states have internal predecessors, (30), 5 states have call successors, (5), 4 states have call predecessors, (5), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 18:35:53,599 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:35:53,599 INFO L93 Difference]: Finished difference Result 32 states and 38 transitions. [2022-04-07 18:35:53,600 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 38 transitions. [2022-04-07 18:35:53,600 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 18:35:53,600 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 18:35:53,600 INFO L74 IsIncluded]: Start isIncluded. First operand has 32 states, 23 states have (on average 1.3043478260869565) internal successors, (30), 24 states have internal predecessors, (30), 5 states have call successors, (5), 4 states have call predecessors, (5), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand 32 states. [2022-04-07 18:35:53,600 INFO L87 Difference]: Start difference. First operand has 32 states, 23 states have (on average 1.3043478260869565) internal successors, (30), 24 states have internal predecessors, (30), 5 states have call successors, (5), 4 states have call predecessors, (5), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand 32 states. [2022-04-07 18:35:53,601 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:35:53,601 INFO L93 Difference]: Finished difference Result 32 states and 38 transitions. [2022-04-07 18:35:53,601 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 38 transitions. [2022-04-07 18:35:53,602 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 18:35:53,602 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 18:35:53,602 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 18:35:53,602 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 18:35:53,602 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 32 states, 23 states have (on average 1.3043478260869565) internal successors, (30), 24 states have internal predecessors, (30), 5 states have call successors, (5), 4 states have call predecessors, (5), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 18:35:53,603 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 38 transitions. [2022-04-07 18:35:53,603 INFO L78 Accepts]: Start accepts. Automaton has 32 states and 38 transitions. Word has length 15 [2022-04-07 18:35:53,603 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 18:35:53,603 INFO L478 AbstractCegarLoop]: Abstraction has 32 states and 38 transitions. [2022-04-07 18:35:53,603 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 1.8333333333333333) internal successors, (11), 5 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:35:53,604 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 38 transitions. [2022-04-07 18:35:53,604 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-04-07 18:35:53,604 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 18:35:53,604 INFO L499 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 18:35:53,621 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Ended with exit code 0 [2022-04-07 18:35:53,820 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable3 [2022-04-07 18:35:53,821 INFO L403 AbstractCegarLoop]: === Iteration 5 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 18:35:53,822 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 18:35:53,822 INFO L85 PathProgramCache]: Analyzing trace with hash 1227316531, now seen corresponding path program 1 times [2022-04-07 18:35:53,822 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 18:35:53,822 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1086529030] [2022-04-07 18:35:53,822 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 18:35:53,822 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 18:35:53,846 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-04-07 18:35:53,846 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [103312121] [2022-04-07 18:35:53,847 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 18:35:53,847 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 18:35:53,847 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 18:35:53,854 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 18:35:53,859 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-04-07 18:35:53,920 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 18:35:53,924 INFO L263 TraceCheckSpWp]: Trace formula consists of 80 conjuncts, 7 conjunts are in the unsatisfiable core [2022-04-07 18:35:53,937 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 18:35:53,938 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 18:35:54,029 INFO L272 TraceCheckUtils]: 0: Hoare triple {570#true} [85] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {570#true} is VALID [2022-04-07 18:35:54,030 INFO L290 TraceCheckUtils]: 1: Hoare triple {570#true} [87] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0) (= v_~counter~0_5 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{~counter~0=v_~counter~0_5, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[~counter~0, #NULL.offset, #NULL.base] {578#(<= ~counter~0 0)} is VALID [2022-04-07 18:35:54,031 INFO L290 TraceCheckUtils]: 2: Hoare triple {578#(<= ~counter~0 0)} [90] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {578#(<= ~counter~0 0)} is VALID [2022-04-07 18:35:54,031 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {578#(<= ~counter~0 0)} {570#true} [115] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {578#(<= ~counter~0 0)} is VALID [2022-04-07 18:35:54,031 INFO L272 TraceCheckUtils]: 4: Hoare triple {578#(<= ~counter~0 0)} [86] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {578#(<= ~counter~0 0)} is VALID [2022-04-07 18:35:54,032 INFO L290 TraceCheckUtils]: 5: Hoare triple {578#(<= ~counter~0 0)} [89] mainENTRY-->L34-3: Formula: (and (= v_main_~B~0_2 1) (= v_main_~B~0_2 v_main_~b~0_3) (= v_main_~q~0_2 0) (= v_main_~A~0_2 |v_main_#t~nondet1_2|) (= v_main_~A~0_2 v_main_~r~0_2)) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~q~0=v_main_~q~0_2, main_~B~0=v_main_~B~0_2, main_~b~0=v_main_~b~0_3, main_~A~0=v_main_~A~0_2, main_~r~0=v_main_~r~0_2} AuxVars[] AssignedVars[main_~q~0, main_#t~nondet1, main_~B~0, main_~b~0, main_~A~0, main_~r~0] {578#(<= ~counter~0 0)} is VALID [2022-04-07 18:35:54,032 INFO L290 TraceCheckUtils]: 6: Hoare triple {578#(<= ~counter~0 0)} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {594#(<= ~counter~0 1)} is VALID [2022-04-07 18:35:54,033 INFO L290 TraceCheckUtils]: 7: Hoare triple {594#(<= ~counter~0 1)} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 100) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {594#(<= ~counter~0 1)} is VALID [2022-04-07 18:35:54,033 INFO L290 TraceCheckUtils]: 8: Hoare triple {594#(<= ~counter~0 1)} [101] L35-->L34-3: Formula: (and (= (* 2 v_main_~b~0_13) v_main_~b~0_12) (<= (mod v_main_~b~0_13 4294967296) (mod v_main_~r~0_10 4294967296))) InVars {main_~b~0=v_main_~b~0_13, main_~r~0=v_main_~r~0_10} OutVars{main_~b~0=v_main_~b~0_12, main_~r~0=v_main_~r~0_10} AuxVars[] AssignedVars[main_~b~0] {594#(<= ~counter~0 1)} is VALID [2022-04-07 18:35:54,033 INFO L290 TraceCheckUtils]: 9: Hoare triple {594#(<= ~counter~0 1)} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {604#(<= |main_#t~post2| 1)} is VALID [2022-04-07 18:35:54,034 INFO L290 TraceCheckUtils]: 10: Hoare triple {604#(<= |main_#t~post2| 1)} [95] L34-1-->L43-2: Formula: (not (< |v_main_#t~post2_3| 100)) InVars {main_#t~post2=|v_main_#t~post2_3|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {571#false} is VALID [2022-04-07 18:35:54,034 INFO L290 TraceCheckUtils]: 11: Hoare triple {571#false} [94] L43-2-->L38: Formula: (and (= |v_main_#t~post3_1| v_~counter~0_2) (= (+ |v_main_#t~post3_1| 1) v_~counter~0_1)) InVars {~counter~0=v_~counter~0_2} OutVars{~counter~0=v_~counter~0_1, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post3] {571#false} is VALID [2022-04-07 18:35:54,034 INFO L290 TraceCheckUtils]: 12: Hoare triple {571#false} [98] L38-->L38-2: Formula: (not (< |v_main_#t~post3_3| 100)) InVars {main_#t~post3=|v_main_#t~post3_3|} OutVars{} AuxVars[] AssignedVars[main_#t~post3] {571#false} is VALID [2022-04-07 18:35:54,034 INFO L272 TraceCheckUtils]: 13: Hoare triple {571#false} [97] L38-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_2| (ite (= (mod v_main_~A~0_7 4294967296) (mod (+ v_main_~r~0_12 (* v_main_~q~0_11 v_main_~b~0_15)) 4294967296)) 1 0)) InVars {main_~q~0=v_main_~q~0_11, main_~A~0=v_main_~A~0_7, main_~b~0=v_main_~b~0_15, main_~r~0=v_main_~r~0_12} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_2|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {571#false} is VALID [2022-04-07 18:35:54,034 INFO L290 TraceCheckUtils]: 14: Hoare triple {571#false} [103] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {571#false} is VALID [2022-04-07 18:35:54,035 INFO L290 TraceCheckUtils]: 15: Hoare triple {571#false} [106] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {571#false} is VALID [2022-04-07 18:35:54,035 INFO L290 TraceCheckUtils]: 16: Hoare triple {571#false} [110] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {571#false} is VALID [2022-04-07 18:35:54,035 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 18:35:54,035 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 18:35:54,166 INFO L290 TraceCheckUtils]: 16: Hoare triple {571#false} [110] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {571#false} is VALID [2022-04-07 18:35:54,166 INFO L290 TraceCheckUtils]: 15: Hoare triple {571#false} [106] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {571#false} is VALID [2022-04-07 18:35:54,166 INFO L290 TraceCheckUtils]: 14: Hoare triple {571#false} [103] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {571#false} is VALID [2022-04-07 18:35:54,166 INFO L272 TraceCheckUtils]: 13: Hoare triple {571#false} [97] L38-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_2| (ite (= (mod v_main_~A~0_7 4294967296) (mod (+ v_main_~r~0_12 (* v_main_~q~0_11 v_main_~b~0_15)) 4294967296)) 1 0)) InVars {main_~q~0=v_main_~q~0_11, main_~A~0=v_main_~A~0_7, main_~b~0=v_main_~b~0_15, main_~r~0=v_main_~r~0_12} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_2|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {571#false} is VALID [2022-04-07 18:35:54,167 INFO L290 TraceCheckUtils]: 12: Hoare triple {571#false} [98] L38-->L38-2: Formula: (not (< |v_main_#t~post3_3| 100)) InVars {main_#t~post3=|v_main_#t~post3_3|} OutVars{} AuxVars[] AssignedVars[main_#t~post3] {571#false} is VALID [2022-04-07 18:35:54,167 INFO L290 TraceCheckUtils]: 11: Hoare triple {571#false} [94] L43-2-->L38: Formula: (and (= |v_main_#t~post3_1| v_~counter~0_2) (= (+ |v_main_#t~post3_1| 1) v_~counter~0_1)) InVars {~counter~0=v_~counter~0_2} OutVars{~counter~0=v_~counter~0_1, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post3] {571#false} is VALID [2022-04-07 18:35:54,167 INFO L290 TraceCheckUtils]: 10: Hoare triple {644#(< |main_#t~post2| 100)} [95] L34-1-->L43-2: Formula: (not (< |v_main_#t~post2_3| 100)) InVars {main_#t~post2=|v_main_#t~post2_3|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {571#false} is VALID [2022-04-07 18:35:54,168 INFO L290 TraceCheckUtils]: 9: Hoare triple {648#(< ~counter~0 100)} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {644#(< |main_#t~post2| 100)} is VALID [2022-04-07 18:35:54,168 INFO L290 TraceCheckUtils]: 8: Hoare triple {648#(< ~counter~0 100)} [101] L35-->L34-3: Formula: (and (= (* 2 v_main_~b~0_13) v_main_~b~0_12) (<= (mod v_main_~b~0_13 4294967296) (mod v_main_~r~0_10 4294967296))) InVars {main_~b~0=v_main_~b~0_13, main_~r~0=v_main_~r~0_10} OutVars{main_~b~0=v_main_~b~0_12, main_~r~0=v_main_~r~0_10} AuxVars[] AssignedVars[main_~b~0] {648#(< ~counter~0 100)} is VALID [2022-04-07 18:35:54,169 INFO L290 TraceCheckUtils]: 7: Hoare triple {648#(< ~counter~0 100)} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 100) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {648#(< ~counter~0 100)} is VALID [2022-04-07 18:35:54,169 INFO L290 TraceCheckUtils]: 6: Hoare triple {658#(< ~counter~0 99)} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {648#(< ~counter~0 100)} is VALID [2022-04-07 18:35:54,170 INFO L290 TraceCheckUtils]: 5: Hoare triple {658#(< ~counter~0 99)} [89] mainENTRY-->L34-3: Formula: (and (= v_main_~B~0_2 1) (= v_main_~B~0_2 v_main_~b~0_3) (= v_main_~q~0_2 0) (= v_main_~A~0_2 |v_main_#t~nondet1_2|) (= v_main_~A~0_2 v_main_~r~0_2)) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~q~0=v_main_~q~0_2, main_~B~0=v_main_~B~0_2, main_~b~0=v_main_~b~0_3, main_~A~0=v_main_~A~0_2, main_~r~0=v_main_~r~0_2} AuxVars[] AssignedVars[main_~q~0, main_#t~nondet1, main_~B~0, main_~b~0, main_~A~0, main_~r~0] {658#(< ~counter~0 99)} is VALID [2022-04-07 18:35:54,171 INFO L272 TraceCheckUtils]: 4: Hoare triple {658#(< ~counter~0 99)} [86] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {658#(< ~counter~0 99)} is VALID [2022-04-07 18:35:54,172 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {658#(< ~counter~0 99)} {570#true} [115] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {658#(< ~counter~0 99)} is VALID [2022-04-07 18:35:54,172 INFO L290 TraceCheckUtils]: 2: Hoare triple {658#(< ~counter~0 99)} [90] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {658#(< ~counter~0 99)} is VALID [2022-04-07 18:35:54,173 INFO L290 TraceCheckUtils]: 1: Hoare triple {570#true} [87] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0) (= v_~counter~0_5 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{~counter~0=v_~counter~0_5, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[~counter~0, #NULL.offset, #NULL.base] {658#(< ~counter~0 99)} is VALID [2022-04-07 18:35:54,173 INFO L272 TraceCheckUtils]: 0: Hoare triple {570#true} [85] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {570#true} is VALID [2022-04-07 18:35:54,173 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 18:35:54,173 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 18:35:54,173 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1086529030] [2022-04-07 18:35:54,173 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-04-07 18:35:54,173 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [103312121] [2022-04-07 18:35:54,174 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [103312121] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 18:35:54,174 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-04-07 18:35:54,174 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 8 [2022-04-07 18:35:54,174 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [936879544] [2022-04-07 18:35:54,174 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-04-07 18:35:54,174 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 2.625) internal successors, (21), 7 states have internal predecessors, (21), 4 states have call successors, (4), 4 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) Word has length 17 [2022-04-07 18:35:54,174 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 18:35:54,175 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 8 states, 8 states have (on average 2.625) internal successors, (21), 7 states have internal predecessors, (21), 4 states have call successors, (4), 4 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-07 18:35:54,192 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 27 edges. 27 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 18:35:54,192 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-04-07 18:35:54,192 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 18:35:54,193 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-04-07 18:35:54,193 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 [2022-04-07 18:35:54,193 INFO L87 Difference]: Start difference. First operand 32 states and 38 transitions. Second operand has 8 states, 8 states have (on average 2.625) internal successors, (21), 7 states have internal predecessors, (21), 4 states have call successors, (4), 4 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-07 18:35:54,343 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:35:54,343 INFO L93 Difference]: Finished difference Result 54 states and 66 transitions. [2022-04-07 18:35:54,344 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-04-07 18:35:54,344 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 2.625) internal successors, (21), 7 states have internal predecessors, (21), 4 states have call successors, (4), 4 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) Word has length 17 [2022-04-07 18:35:54,344 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 18:35:54,344 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 2.625) internal successors, (21), 7 states have internal predecessors, (21), 4 states have call successors, (4), 4 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-07 18:35:54,347 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 69 transitions. [2022-04-07 18:35:54,347 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 2.625) internal successors, (21), 7 states have internal predecessors, (21), 4 states have call successors, (4), 4 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-07 18:35:54,351 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 69 transitions. [2022-04-07 18:35:54,351 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 10 states and 69 transitions. [2022-04-07 18:35:54,392 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 69 edges. 69 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 18:35:54,394 INFO L225 Difference]: With dead ends: 54 [2022-04-07 18:35:54,394 INFO L226 Difference]: Without dead ends: 54 [2022-04-07 18:35:54,395 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 27 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=40, Invalid=70, Unknown=0, NotChecked=0, Total=110 [2022-04-07 18:35:54,396 INFO L913 BasicCegarLoop]: 25 mSDtfsCounter, 42 mSDsluCounter, 97 mSDsCounter, 0 mSdLazyCounter, 30 mSolverCounterSat, 15 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 42 SdHoareTripleChecker+Valid, 122 SdHoareTripleChecker+Invalid, 45 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 15 IncrementalHoareTripleChecker+Valid, 30 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 18:35:54,397 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [42 Valid, 122 Invalid, 45 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [15 Valid, 30 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 18:35:54,399 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54 states. [2022-04-07 18:35:54,407 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54 to 40. [2022-04-07 18:35:54,407 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 18:35:54,407 INFO L82 GeneralOperation]: Start isEquivalent. First operand 54 states. Second operand has 40 states, 31 states have (on average 1.2903225806451613) internal successors, (40), 32 states have internal predecessors, (40), 5 states have call successors, (5), 4 states have call predecessors, (5), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 18:35:54,408 INFO L74 IsIncluded]: Start isIncluded. First operand 54 states. Second operand has 40 states, 31 states have (on average 1.2903225806451613) internal successors, (40), 32 states have internal predecessors, (40), 5 states have call successors, (5), 4 states have call predecessors, (5), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 18:35:54,408 INFO L87 Difference]: Start difference. First operand 54 states. Second operand has 40 states, 31 states have (on average 1.2903225806451613) internal successors, (40), 32 states have internal predecessors, (40), 5 states have call successors, (5), 4 states have call predecessors, (5), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 18:35:54,414 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:35:54,414 INFO L93 Difference]: Finished difference Result 54 states and 66 transitions. [2022-04-07 18:35:54,414 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 66 transitions. [2022-04-07 18:35:54,417 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 18:35:54,417 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 18:35:54,417 INFO L74 IsIncluded]: Start isIncluded. First operand has 40 states, 31 states have (on average 1.2903225806451613) internal successors, (40), 32 states have internal predecessors, (40), 5 states have call successors, (5), 4 states have call predecessors, (5), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand 54 states. [2022-04-07 18:35:54,417 INFO L87 Difference]: Start difference. First operand has 40 states, 31 states have (on average 1.2903225806451613) internal successors, (40), 32 states have internal predecessors, (40), 5 states have call successors, (5), 4 states have call predecessors, (5), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand 54 states. [2022-04-07 18:35:54,419 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:35:54,419 INFO L93 Difference]: Finished difference Result 54 states and 66 transitions. [2022-04-07 18:35:54,419 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 66 transitions. [2022-04-07 18:35:54,419 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 18:35:54,420 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 18:35:54,420 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 18:35:54,420 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 18:35:54,420 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 40 states, 31 states have (on average 1.2903225806451613) internal successors, (40), 32 states have internal predecessors, (40), 5 states have call successors, (5), 4 states have call predecessors, (5), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 18:35:54,421 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 48 transitions. [2022-04-07 18:35:54,421 INFO L78 Accepts]: Start accepts. Automaton has 40 states and 48 transitions. Word has length 17 [2022-04-07 18:35:54,421 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 18:35:54,421 INFO L478 AbstractCegarLoop]: Abstraction has 40 states and 48 transitions. [2022-04-07 18:35:54,421 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 2.625) internal successors, (21), 7 states have internal predecessors, (21), 4 states have call successors, (4), 4 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-07 18:35:54,421 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 48 transitions. [2022-04-07 18:35:54,421 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-04-07 18:35:54,422 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 18:35:54,422 INFO L499 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 18:35:54,463 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Ended with exit code 0 [2022-04-07 18:35:54,639 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 18:35:54,639 INFO L403 AbstractCegarLoop]: === Iteration 6 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 18:35:54,639 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 18:35:54,639 INFO L85 PathProgramCache]: Analyzing trace with hash 2051197196, now seen corresponding path program 1 times [2022-04-07 18:35:54,640 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 18:35:54,640 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1301037718] [2022-04-07 18:35:54,640 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 18:35:54,640 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 18:35:54,651 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-04-07 18:35:54,651 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [831719935] [2022-04-07 18:35:54,651 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 18:35:54,651 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 18:35:54,651 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 18:35:54,668 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 18:35:54,669 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-04-07 18:35:54,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 18:35:54,697 INFO L263 TraceCheckSpWp]: Trace formula consists of 81 conjuncts, 9 conjunts are in the unsatisfiable core [2022-04-07 18:35:54,703 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 18:35:54,704 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 18:35:54,798 INFO L272 TraceCheckUtils]: 0: Hoare triple {887#true} [85] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {887#true} is VALID [2022-04-07 18:35:54,798 INFO L290 TraceCheckUtils]: 1: Hoare triple {887#true} [87] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0) (= v_~counter~0_5 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{~counter~0=v_~counter~0_5, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[~counter~0, #NULL.offset, #NULL.base] {895#(<= ~counter~0 0)} is VALID [2022-04-07 18:35:54,799 INFO L290 TraceCheckUtils]: 2: Hoare triple {895#(<= ~counter~0 0)} [90] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {895#(<= ~counter~0 0)} is VALID [2022-04-07 18:35:54,799 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {895#(<= ~counter~0 0)} {887#true} [115] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {895#(<= ~counter~0 0)} is VALID [2022-04-07 18:35:54,799 INFO L272 TraceCheckUtils]: 4: Hoare triple {895#(<= ~counter~0 0)} [86] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {895#(<= ~counter~0 0)} is VALID [2022-04-07 18:35:54,800 INFO L290 TraceCheckUtils]: 5: Hoare triple {895#(<= ~counter~0 0)} [89] mainENTRY-->L34-3: Formula: (and (= v_main_~B~0_2 1) (= v_main_~B~0_2 v_main_~b~0_3) (= v_main_~q~0_2 0) (= v_main_~A~0_2 |v_main_#t~nondet1_2|) (= v_main_~A~0_2 v_main_~r~0_2)) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~q~0=v_main_~q~0_2, main_~B~0=v_main_~B~0_2, main_~b~0=v_main_~b~0_3, main_~A~0=v_main_~A~0_2, main_~r~0=v_main_~r~0_2} AuxVars[] AssignedVars[main_~q~0, main_#t~nondet1, main_~B~0, main_~b~0, main_~A~0, main_~r~0] {895#(<= ~counter~0 0)} is VALID [2022-04-07 18:35:54,801 INFO L290 TraceCheckUtils]: 6: Hoare triple {895#(<= ~counter~0 0)} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {911#(<= ~counter~0 1)} is VALID [2022-04-07 18:35:54,801 INFO L290 TraceCheckUtils]: 7: Hoare triple {911#(<= ~counter~0 1)} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 100) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {911#(<= ~counter~0 1)} is VALID [2022-04-07 18:35:54,803 INFO L290 TraceCheckUtils]: 8: Hoare triple {911#(<= ~counter~0 1)} [101] L35-->L34-3: Formula: (and (= (* 2 v_main_~b~0_13) v_main_~b~0_12) (<= (mod v_main_~b~0_13 4294967296) (mod v_main_~r~0_10 4294967296))) InVars {main_~b~0=v_main_~b~0_13, main_~r~0=v_main_~r~0_10} OutVars{main_~b~0=v_main_~b~0_12, main_~r~0=v_main_~r~0_10} AuxVars[] AssignedVars[main_~b~0] {911#(<= ~counter~0 1)} is VALID [2022-04-07 18:35:54,803 INFO L290 TraceCheckUtils]: 9: Hoare triple {911#(<= ~counter~0 1)} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {921#(<= ~counter~0 2)} is VALID [2022-04-07 18:35:54,804 INFO L290 TraceCheckUtils]: 10: Hoare triple {921#(<= ~counter~0 2)} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 100) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {921#(<= ~counter~0 2)} is VALID [2022-04-07 18:35:54,804 INFO L290 TraceCheckUtils]: 11: Hoare triple {921#(<= ~counter~0 2)} [100] L35-->L43-2: Formula: (not (<= (mod v_main_~b~0_11 4294967296) (mod v_main_~r~0_9 4294967296))) InVars {main_~b~0=v_main_~b~0_11, main_~r~0=v_main_~r~0_9} OutVars{main_~b~0=v_main_~b~0_11, main_~r~0=v_main_~r~0_9} AuxVars[] AssignedVars[] {921#(<= ~counter~0 2)} is VALID [2022-04-07 18:35:54,805 INFO L290 TraceCheckUtils]: 12: Hoare triple {921#(<= ~counter~0 2)} [94] L43-2-->L38: Formula: (and (= |v_main_#t~post3_1| v_~counter~0_2) (= (+ |v_main_#t~post3_1| 1) v_~counter~0_1)) InVars {~counter~0=v_~counter~0_2} OutVars{~counter~0=v_~counter~0_1, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post3] {931#(<= |main_#t~post3| 2)} is VALID [2022-04-07 18:35:54,805 INFO L290 TraceCheckUtils]: 13: Hoare triple {931#(<= |main_#t~post3| 2)} [98] L38-->L38-2: Formula: (not (< |v_main_#t~post3_3| 100)) InVars {main_#t~post3=|v_main_#t~post3_3|} OutVars{} AuxVars[] AssignedVars[main_#t~post3] {888#false} is VALID [2022-04-07 18:35:54,805 INFO L272 TraceCheckUtils]: 14: Hoare triple {888#false} [97] L38-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_2| (ite (= (mod v_main_~A~0_7 4294967296) (mod (+ v_main_~r~0_12 (* v_main_~q~0_11 v_main_~b~0_15)) 4294967296)) 1 0)) InVars {main_~q~0=v_main_~q~0_11, main_~A~0=v_main_~A~0_7, main_~b~0=v_main_~b~0_15, main_~r~0=v_main_~r~0_12} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_2|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {888#false} is VALID [2022-04-07 18:35:54,805 INFO L290 TraceCheckUtils]: 15: Hoare triple {888#false} [103] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {888#false} is VALID [2022-04-07 18:35:54,805 INFO L290 TraceCheckUtils]: 16: Hoare triple {888#false} [106] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {888#false} is VALID [2022-04-07 18:35:54,805 INFO L290 TraceCheckUtils]: 17: Hoare triple {888#false} [110] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {888#false} is VALID [2022-04-07 18:35:54,806 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 18:35:54,806 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 18:35:54,930 INFO L290 TraceCheckUtils]: 17: Hoare triple {888#false} [110] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {888#false} is VALID [2022-04-07 18:35:54,930 INFO L290 TraceCheckUtils]: 16: Hoare triple {888#false} [106] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {888#false} is VALID [2022-04-07 18:35:54,930 INFO L290 TraceCheckUtils]: 15: Hoare triple {888#false} [103] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {888#false} is VALID [2022-04-07 18:35:54,931 INFO L272 TraceCheckUtils]: 14: Hoare triple {888#false} [97] L38-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_2| (ite (= (mod v_main_~A~0_7 4294967296) (mod (+ v_main_~r~0_12 (* v_main_~q~0_11 v_main_~b~0_15)) 4294967296)) 1 0)) InVars {main_~q~0=v_main_~q~0_11, main_~A~0=v_main_~A~0_7, main_~b~0=v_main_~b~0_15, main_~r~0=v_main_~r~0_12} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_2|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {888#false} is VALID [2022-04-07 18:35:54,931 INFO L290 TraceCheckUtils]: 13: Hoare triple {959#(< |main_#t~post3| 100)} [98] L38-->L38-2: Formula: (not (< |v_main_#t~post3_3| 100)) InVars {main_#t~post3=|v_main_#t~post3_3|} OutVars{} AuxVars[] AssignedVars[main_#t~post3] {888#false} is VALID [2022-04-07 18:35:54,932 INFO L290 TraceCheckUtils]: 12: Hoare triple {963#(< ~counter~0 100)} [94] L43-2-->L38: Formula: (and (= |v_main_#t~post3_1| v_~counter~0_2) (= (+ |v_main_#t~post3_1| 1) v_~counter~0_1)) InVars {~counter~0=v_~counter~0_2} OutVars{~counter~0=v_~counter~0_1, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post3] {959#(< |main_#t~post3| 100)} is VALID [2022-04-07 18:35:54,932 INFO L290 TraceCheckUtils]: 11: Hoare triple {963#(< ~counter~0 100)} [100] L35-->L43-2: Formula: (not (<= (mod v_main_~b~0_11 4294967296) (mod v_main_~r~0_9 4294967296))) InVars {main_~b~0=v_main_~b~0_11, main_~r~0=v_main_~r~0_9} OutVars{main_~b~0=v_main_~b~0_11, main_~r~0=v_main_~r~0_9} AuxVars[] AssignedVars[] {963#(< ~counter~0 100)} is VALID [2022-04-07 18:35:54,934 INFO L290 TraceCheckUtils]: 10: Hoare triple {963#(< ~counter~0 100)} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 100) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {963#(< ~counter~0 100)} is VALID [2022-04-07 18:35:54,946 INFO L290 TraceCheckUtils]: 9: Hoare triple {973#(< ~counter~0 99)} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {963#(< ~counter~0 100)} is VALID [2022-04-07 18:35:54,946 INFO L290 TraceCheckUtils]: 8: Hoare triple {973#(< ~counter~0 99)} [101] L35-->L34-3: Formula: (and (= (* 2 v_main_~b~0_13) v_main_~b~0_12) (<= (mod v_main_~b~0_13 4294967296) (mod v_main_~r~0_10 4294967296))) InVars {main_~b~0=v_main_~b~0_13, main_~r~0=v_main_~r~0_10} OutVars{main_~b~0=v_main_~b~0_12, main_~r~0=v_main_~r~0_10} AuxVars[] AssignedVars[main_~b~0] {973#(< ~counter~0 99)} is VALID [2022-04-07 18:35:54,949 INFO L290 TraceCheckUtils]: 7: Hoare triple {973#(< ~counter~0 99)} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 100) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {973#(< ~counter~0 99)} is VALID [2022-04-07 18:35:54,950 INFO L290 TraceCheckUtils]: 6: Hoare triple {983#(< ~counter~0 98)} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {973#(< ~counter~0 99)} is VALID [2022-04-07 18:35:54,950 INFO L290 TraceCheckUtils]: 5: Hoare triple {983#(< ~counter~0 98)} [89] mainENTRY-->L34-3: Formula: (and (= v_main_~B~0_2 1) (= v_main_~B~0_2 v_main_~b~0_3) (= v_main_~q~0_2 0) (= v_main_~A~0_2 |v_main_#t~nondet1_2|) (= v_main_~A~0_2 v_main_~r~0_2)) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~q~0=v_main_~q~0_2, main_~B~0=v_main_~B~0_2, main_~b~0=v_main_~b~0_3, main_~A~0=v_main_~A~0_2, main_~r~0=v_main_~r~0_2} AuxVars[] AssignedVars[main_~q~0, main_#t~nondet1, main_~B~0, main_~b~0, main_~A~0, main_~r~0] {983#(< ~counter~0 98)} is VALID [2022-04-07 18:35:54,950 INFO L272 TraceCheckUtils]: 4: Hoare triple {983#(< ~counter~0 98)} [86] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {983#(< ~counter~0 98)} is VALID [2022-04-07 18:35:54,951 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {983#(< ~counter~0 98)} {887#true} [115] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {983#(< ~counter~0 98)} is VALID [2022-04-07 18:35:54,951 INFO L290 TraceCheckUtils]: 2: Hoare triple {983#(< ~counter~0 98)} [90] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {983#(< ~counter~0 98)} is VALID [2022-04-07 18:35:54,951 INFO L290 TraceCheckUtils]: 1: Hoare triple {887#true} [87] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0) (= v_~counter~0_5 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{~counter~0=v_~counter~0_5, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[~counter~0, #NULL.offset, #NULL.base] {983#(< ~counter~0 98)} is VALID [2022-04-07 18:35:54,952 INFO L272 TraceCheckUtils]: 0: Hoare triple {887#true} [85] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {887#true} is VALID [2022-04-07 18:35:54,952 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 18:35:54,952 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 18:35:54,952 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1301037718] [2022-04-07 18:35:54,952 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-04-07 18:35:54,952 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [831719935] [2022-04-07 18:35:54,952 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [831719935] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 18:35:54,952 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-04-07 18:35:54,952 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 10 [2022-04-07 18:35:54,952 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [578972958] [2022-04-07 18:35:54,952 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-04-07 18:35:54,953 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 2.5) internal successors, (25), 9 states have internal predecessors, (25), 4 states have call successors, (4), 4 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) Word has length 18 [2022-04-07 18:35:54,953 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 18:35:54,953 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 10 states, 10 states have (on average 2.5) internal successors, (25), 9 states have internal predecessors, (25), 4 states have call successors, (4), 4 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-07 18:35:54,971 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 31 edges. 31 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 18:35:54,971 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2022-04-07 18:35:54,971 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 18:35:54,972 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2022-04-07 18:35:54,972 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=57, Unknown=0, NotChecked=0, Total=90 [2022-04-07 18:35:54,972 INFO L87 Difference]: Start difference. First operand 40 states and 48 transitions. Second operand has 10 states, 10 states have (on average 2.5) internal successors, (25), 9 states have internal predecessors, (25), 4 states have call successors, (4), 4 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-07 18:35:55,201 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:35:55,202 INFO L93 Difference]: Finished difference Result 84 states and 102 transitions. [2022-04-07 18:35:55,202 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-04-07 18:35:55,202 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 2.5) internal successors, (25), 9 states have internal predecessors, (25), 4 states have call successors, (4), 4 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) Word has length 18 [2022-04-07 18:35:55,202 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 18:35:55,202 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 2.5) internal successors, (25), 9 states have internal predecessors, (25), 4 states have call successors, (4), 4 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-07 18:35:55,204 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 106 transitions. [2022-04-07 18:35:55,204 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 2.5) internal successors, (25), 9 states have internal predecessors, (25), 4 states have call successors, (4), 4 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-07 18:35:55,206 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 106 transitions. [2022-04-07 18:35:55,206 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 13 states and 106 transitions. [2022-04-07 18:35:55,279 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 106 edges. 106 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 18:35:55,280 INFO L225 Difference]: With dead ends: 84 [2022-04-07 18:35:55,280 INFO L226 Difference]: Without dead ends: 84 [2022-04-07 18:35:55,281 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 27 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=63, Invalid=119, Unknown=0, NotChecked=0, Total=182 [2022-04-07 18:35:55,281 INFO L913 BasicCegarLoop]: 27 mSDtfsCounter, 76 mSDsluCounter, 130 mSDsCounter, 0 mSdLazyCounter, 43 mSolverCounterSat, 23 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 76 SdHoareTripleChecker+Valid, 157 SdHoareTripleChecker+Invalid, 66 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 23 IncrementalHoareTripleChecker+Valid, 43 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 18:35:55,281 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [76 Valid, 157 Invalid, 66 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [23 Valid, 43 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-07 18:35:55,282 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 84 states. [2022-04-07 18:35:55,288 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 84 to 77. [2022-04-07 18:35:55,288 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 18:35:55,289 INFO L82 GeneralOperation]: Start isEquivalent. First operand 84 states. Second operand has 77 states, 59 states have (on average 1.3728813559322033) internal successors, (81), 63 states have internal predecessors, (81), 11 states have call successors, (11), 7 states have call predecessors, (11), 6 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-07 18:35:55,289 INFO L74 IsIncluded]: Start isIncluded. First operand 84 states. Second operand has 77 states, 59 states have (on average 1.3728813559322033) internal successors, (81), 63 states have internal predecessors, (81), 11 states have call successors, (11), 7 states have call predecessors, (11), 6 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-07 18:35:55,290 INFO L87 Difference]: Start difference. First operand 84 states. Second operand has 77 states, 59 states have (on average 1.3728813559322033) internal successors, (81), 63 states have internal predecessors, (81), 11 states have call successors, (11), 7 states have call predecessors, (11), 6 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-07 18:35:55,293 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:35:55,293 INFO L93 Difference]: Finished difference Result 84 states and 102 transitions. [2022-04-07 18:35:55,293 INFO L276 IsEmpty]: Start isEmpty. Operand 84 states and 102 transitions. [2022-04-07 18:35:55,294 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 18:35:55,294 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 18:35:55,294 INFO L74 IsIncluded]: Start isIncluded. First operand has 77 states, 59 states have (on average 1.3728813559322033) internal successors, (81), 63 states have internal predecessors, (81), 11 states have call successors, (11), 7 states have call predecessors, (11), 6 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) Second operand 84 states. [2022-04-07 18:35:55,294 INFO L87 Difference]: Start difference. First operand has 77 states, 59 states have (on average 1.3728813559322033) internal successors, (81), 63 states have internal predecessors, (81), 11 states have call successors, (11), 7 states have call predecessors, (11), 6 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) Second operand 84 states. [2022-04-07 18:35:55,297 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:35:55,297 INFO L93 Difference]: Finished difference Result 84 states and 102 transitions. [2022-04-07 18:35:55,297 INFO L276 IsEmpty]: Start isEmpty. Operand 84 states and 102 transitions. [2022-04-07 18:35:55,298 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 18:35:55,298 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 18:35:55,298 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 18:35:55,298 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 18:35:55,298 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 77 states, 59 states have (on average 1.3728813559322033) internal successors, (81), 63 states have internal predecessors, (81), 11 states have call successors, (11), 7 states have call predecessors, (11), 6 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-07 18:35:55,300 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77 states to 77 states and 98 transitions. [2022-04-07 18:35:55,300 INFO L78 Accepts]: Start accepts. Automaton has 77 states and 98 transitions. Word has length 18 [2022-04-07 18:35:55,300 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 18:35:55,300 INFO L478 AbstractCegarLoop]: Abstraction has 77 states and 98 transitions. [2022-04-07 18:35:55,300 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 2.5) internal successors, (25), 9 states have internal predecessors, (25), 4 states have call successors, (4), 4 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-07 18:35:55,300 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 98 transitions. [2022-04-07 18:35:55,300 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-04-07 18:35:55,300 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 18:35:55,300 INFO L499 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 18:35:55,336 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Ended with exit code 0 [2022-04-07 18:35:55,517 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5,5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 18:35:55,517 INFO L403 AbstractCegarLoop]: === Iteration 7 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 18:35:55,517 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 18:35:55,517 INFO L85 PathProgramCache]: Analyzing trace with hash 2052329254, now seen corresponding path program 1 times [2022-04-07 18:35:55,517 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 18:35:55,518 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [225793294] [2022-04-07 18:35:55,518 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 18:35:55,518 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 18:35:55,528 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-04-07 18:35:55,528 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1628457887] [2022-04-07 18:35:55,528 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 18:35:55,528 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 18:35:55,528 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 18:35:55,544 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 18:35:55,564 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-04-07 18:35:55,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 18:35:55,610 INFO L263 TraceCheckSpWp]: Trace formula consists of 81 conjuncts, 14 conjunts are in the unsatisfiable core [2022-04-07 18:35:55,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 18:35:55,623 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 18:35:55,843 INFO L272 TraceCheckUtils]: 0: Hoare triple {1341#true} [85] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1341#true} is VALID [2022-04-07 18:35:55,844 INFO L290 TraceCheckUtils]: 1: Hoare triple {1341#true} [87] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0) (= v_~counter~0_5 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{~counter~0=v_~counter~0_5, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[~counter~0, #NULL.offset, #NULL.base] {1341#true} is VALID [2022-04-07 18:35:55,844 INFO L290 TraceCheckUtils]: 2: Hoare triple {1341#true} [90] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1341#true} is VALID [2022-04-07 18:35:55,844 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1341#true} {1341#true} [115] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1341#true} is VALID [2022-04-07 18:35:55,844 INFO L272 TraceCheckUtils]: 4: Hoare triple {1341#true} [86] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1341#true} is VALID [2022-04-07 18:35:55,844 INFO L290 TraceCheckUtils]: 5: Hoare triple {1341#true} [89] mainENTRY-->L34-3: Formula: (and (= v_main_~B~0_2 1) (= v_main_~B~0_2 v_main_~b~0_3) (= v_main_~q~0_2 0) (= v_main_~A~0_2 |v_main_#t~nondet1_2|) (= v_main_~A~0_2 v_main_~r~0_2)) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~q~0=v_main_~q~0_2, main_~B~0=v_main_~B~0_2, main_~b~0=v_main_~b~0_3, main_~A~0=v_main_~A~0_2, main_~r~0=v_main_~r~0_2} AuxVars[] AssignedVars[main_~q~0, main_#t~nondet1, main_~B~0, main_~b~0, main_~A~0, main_~r~0] {1361#(and (= main_~b~0 1) (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:35:55,845 INFO L290 TraceCheckUtils]: 6: Hoare triple {1361#(and (= main_~b~0 1) (= main_~A~0 main_~r~0) (= main_~q~0 0))} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {1361#(and (= main_~b~0 1) (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:35:55,845 INFO L290 TraceCheckUtils]: 7: Hoare triple {1361#(and (= main_~b~0 1) (= main_~A~0 main_~r~0) (= main_~q~0 0))} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 100) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {1361#(and (= main_~b~0 1) (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:35:55,846 INFO L290 TraceCheckUtils]: 8: Hoare triple {1361#(and (= main_~b~0 1) (= main_~A~0 main_~r~0) (= main_~q~0 0))} [101] L35-->L34-3: Formula: (and (= (* 2 v_main_~b~0_13) v_main_~b~0_12) (<= (mod v_main_~b~0_13 4294967296) (mod v_main_~r~0_10 4294967296))) InVars {main_~b~0=v_main_~b~0_13, main_~r~0=v_main_~r~0_10} OutVars{main_~b~0=v_main_~b~0_12, main_~r~0=v_main_~r~0_10} AuxVars[] AssignedVars[main_~b~0] {1371#(and (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} is VALID [2022-04-07 18:35:55,846 INFO L290 TraceCheckUtils]: 9: Hoare triple {1371#(and (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {1371#(and (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} is VALID [2022-04-07 18:35:55,847 INFO L290 TraceCheckUtils]: 10: Hoare triple {1371#(and (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 100) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {1371#(and (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} is VALID [2022-04-07 18:35:55,847 INFO L290 TraceCheckUtils]: 11: Hoare triple {1371#(and (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} [100] L35-->L43-2: Formula: (not (<= (mod v_main_~b~0_11 4294967296) (mod v_main_~r~0_9 4294967296))) InVars {main_~b~0=v_main_~b~0_11, main_~r~0=v_main_~r~0_9} OutVars{main_~b~0=v_main_~b~0_11, main_~r~0=v_main_~r~0_9} AuxVars[] AssignedVars[] {1371#(and (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} is VALID [2022-04-07 18:35:55,848 INFO L290 TraceCheckUtils]: 12: Hoare triple {1371#(and (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} [94] L43-2-->L38: Formula: (and (= |v_main_#t~post3_1| v_~counter~0_2) (= (+ |v_main_#t~post3_1| 1) v_~counter~0_1)) InVars {~counter~0=v_~counter~0_2} OutVars{~counter~0=v_~counter~0_1, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post3] {1371#(and (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} is VALID [2022-04-07 18:35:55,848 INFO L290 TraceCheckUtils]: 13: Hoare triple {1371#(and (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} [99] L38-->L39: Formula: (< |v_main_#t~post3_5| 100) InVars {main_#t~post3=|v_main_#t~post3_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post3] {1371#(and (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} is VALID [2022-04-07 18:35:55,849 INFO L272 TraceCheckUtils]: 14: Hoare triple {1371#(and (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} [104] L39-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~A~0_6 4294967296) (mod (+ v_main_~r~0_11 (* v_main_~q~0_10 v_main_~b~0_14)) 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~q~0=v_main_~q~0_10, main_~A~0=v_main_~A~0_6, main_~b~0=v_main_~b~0_14, main_~r~0=v_main_~r~0_11} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {1390#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 18:35:55,850 INFO L290 TraceCheckUtils]: 15: Hoare triple {1390#(<= 1 |__VERIFIER_assert_#in~cond|)} [103] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1394#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 18:35:55,850 INFO L290 TraceCheckUtils]: 16: Hoare triple {1394#(<= 1 __VERIFIER_assert_~cond)} [106] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1342#false} is VALID [2022-04-07 18:35:55,850 INFO L290 TraceCheckUtils]: 17: Hoare triple {1342#false} [110] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1342#false} is VALID [2022-04-07 18:35:55,850 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 18:35:55,850 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 18:35:56,200 INFO L290 TraceCheckUtils]: 17: Hoare triple {1342#false} [110] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1342#false} is VALID [2022-04-07 18:35:56,200 INFO L290 TraceCheckUtils]: 16: Hoare triple {1394#(<= 1 __VERIFIER_assert_~cond)} [106] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1342#false} is VALID [2022-04-07 18:35:56,203 INFO L290 TraceCheckUtils]: 15: Hoare triple {1390#(<= 1 |__VERIFIER_assert_#in~cond|)} [103] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1394#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 18:35:56,204 INFO L272 TraceCheckUtils]: 14: Hoare triple {1410#(forall ((main_~b~0 Int)) (= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296)))} [104] L39-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~A~0_6 4294967296) (mod (+ v_main_~r~0_11 (* v_main_~q~0_10 v_main_~b~0_14)) 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~q~0=v_main_~q~0_10, main_~A~0=v_main_~A~0_6, main_~b~0=v_main_~b~0_14, main_~r~0=v_main_~r~0_11} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {1390#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 18:35:56,205 INFO L290 TraceCheckUtils]: 13: Hoare triple {1410#(forall ((main_~b~0 Int)) (= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296)))} [99] L38-->L39: Formula: (< |v_main_#t~post3_5| 100) InVars {main_#t~post3=|v_main_#t~post3_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post3] {1410#(forall ((main_~b~0 Int)) (= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296)))} is VALID [2022-04-07 18:35:56,205 INFO L290 TraceCheckUtils]: 12: Hoare triple {1410#(forall ((main_~b~0 Int)) (= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296)))} [94] L43-2-->L38: Formula: (and (= |v_main_#t~post3_1| v_~counter~0_2) (= (+ |v_main_#t~post3_1| 1) v_~counter~0_1)) InVars {~counter~0=v_~counter~0_2} OutVars{~counter~0=v_~counter~0_1, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post3] {1410#(forall ((main_~b~0 Int)) (= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296)))} is VALID [2022-04-07 18:35:56,205 INFO L290 TraceCheckUtils]: 11: Hoare triple {1410#(forall ((main_~b~0 Int)) (= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296)))} [100] L35-->L43-2: Formula: (not (<= (mod v_main_~b~0_11 4294967296) (mod v_main_~r~0_9 4294967296))) InVars {main_~b~0=v_main_~b~0_11, main_~r~0=v_main_~r~0_9} OutVars{main_~b~0=v_main_~b~0_11, main_~r~0=v_main_~r~0_9} AuxVars[] AssignedVars[] {1410#(forall ((main_~b~0 Int)) (= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296)))} is VALID [2022-04-07 18:35:56,206 INFO L290 TraceCheckUtils]: 10: Hoare triple {1410#(forall ((main_~b~0 Int)) (= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296)))} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 100) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {1410#(forall ((main_~b~0 Int)) (= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296)))} is VALID [2022-04-07 18:35:56,206 INFO L290 TraceCheckUtils]: 9: Hoare triple {1410#(forall ((main_~b~0 Int)) (= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296)))} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {1410#(forall ((main_~b~0 Int)) (= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296)))} is VALID [2022-04-07 18:35:56,207 INFO L290 TraceCheckUtils]: 8: Hoare triple {1429#(or (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (forall ((main_~b~0 Int)) (= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296))))} [101] L35-->L34-3: Formula: (and (= (* 2 v_main_~b~0_13) v_main_~b~0_12) (<= (mod v_main_~b~0_13 4294967296) (mod v_main_~r~0_10 4294967296))) InVars {main_~b~0=v_main_~b~0_13, main_~r~0=v_main_~r~0_10} OutVars{main_~b~0=v_main_~b~0_12, main_~r~0=v_main_~r~0_10} AuxVars[] AssignedVars[main_~b~0] {1410#(forall ((main_~b~0 Int)) (= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296)))} is VALID [2022-04-07 18:35:56,207 INFO L290 TraceCheckUtils]: 7: Hoare triple {1429#(or (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (forall ((main_~b~0 Int)) (= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296))))} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 100) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {1429#(or (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (forall ((main_~b~0 Int)) (= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296))))} is VALID [2022-04-07 18:35:56,208 INFO L290 TraceCheckUtils]: 6: Hoare triple {1429#(or (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (forall ((main_~b~0 Int)) (= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296))))} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {1429#(or (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (forall ((main_~b~0 Int)) (= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296))))} is VALID [2022-04-07 18:35:56,208 INFO L290 TraceCheckUtils]: 5: Hoare triple {1341#true} [89] mainENTRY-->L34-3: Formula: (and (= v_main_~B~0_2 1) (= v_main_~B~0_2 v_main_~b~0_3) (= v_main_~q~0_2 0) (= v_main_~A~0_2 |v_main_#t~nondet1_2|) (= v_main_~A~0_2 v_main_~r~0_2)) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~q~0=v_main_~q~0_2, main_~B~0=v_main_~B~0_2, main_~b~0=v_main_~b~0_3, main_~A~0=v_main_~A~0_2, main_~r~0=v_main_~r~0_2} AuxVars[] AssignedVars[main_~q~0, main_#t~nondet1, main_~B~0, main_~b~0, main_~A~0, main_~r~0] {1429#(or (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (forall ((main_~b~0 Int)) (= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296))))} is VALID [2022-04-07 18:35:56,209 INFO L272 TraceCheckUtils]: 4: Hoare triple {1341#true} [86] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1341#true} is VALID [2022-04-07 18:35:56,209 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1341#true} {1341#true} [115] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1341#true} is VALID [2022-04-07 18:35:56,209 INFO L290 TraceCheckUtils]: 2: Hoare triple {1341#true} [90] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1341#true} is VALID [2022-04-07 18:35:56,209 INFO L290 TraceCheckUtils]: 1: Hoare triple {1341#true} [87] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0) (= v_~counter~0_5 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{~counter~0=v_~counter~0_5, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[~counter~0, #NULL.offset, #NULL.base] {1341#true} is VALID [2022-04-07 18:35:56,209 INFO L272 TraceCheckUtils]: 0: Hoare triple {1341#true} [85] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1341#true} is VALID [2022-04-07 18:35:56,209 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 18:35:56,209 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 18:35:56,209 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [225793294] [2022-04-07 18:35:56,210 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-04-07 18:35:56,210 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1628457887] [2022-04-07 18:35:56,210 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1628457887] provided 1 perfect and 1 imperfect interpolant sequences [2022-04-07 18:35:56,210 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-07 18:35:56,210 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [6] total 8 [2022-04-07 18:35:56,210 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1733920595] [2022-04-07 18:35:56,210 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 18:35:56,210 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 2.3333333333333335) internal successors, (14), 5 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-07 18:35:56,210 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 18:35:56,211 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 6 states, 6 states have (on average 2.3333333333333335) internal successors, (14), 5 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:35:56,355 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 18 edges. 18 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 18:35:56,355 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-04-07 18:35:56,356 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 18:35:56,356 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-04-07 18:35:56,356 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2022-04-07 18:35:56,356 INFO L87 Difference]: Start difference. First operand 77 states and 98 transitions. Second operand has 6 states, 6 states have (on average 2.3333333333333335) internal successors, (14), 5 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:35:56,443 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:35:56,443 INFO L93 Difference]: Finished difference Result 108 states and 130 transitions. [2022-04-07 18:35:56,443 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-04-07 18:35:56,443 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 2.3333333333333335) internal successors, (14), 5 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-07 18:35:56,443 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 18:35:56,444 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 2.3333333333333335) internal successors, (14), 5 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:35:56,444 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 40 transitions. [2022-04-07 18:35:56,444 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 2.3333333333333335) internal successors, (14), 5 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:35:56,445 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 40 transitions. [2022-04-07 18:35:56,445 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 6 states and 40 transitions. [2022-04-07 18:35:58,503 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 40 edges. 39 inductive. 0 not inductive. 1 times theorem prover too weak to decide inductivity. [2022-04-07 18:35:58,505 INFO L225 Difference]: With dead ends: 108 [2022-04-07 18:35:58,505 INFO L226 Difference]: Without dead ends: 108 [2022-04-07 18:35:58,505 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 28 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=22, Invalid=50, Unknown=0, NotChecked=0, Total=72 [2022-04-07 18:35:58,506 INFO L913 BasicCegarLoop]: 31 mSDtfsCounter, 11 mSDsluCounter, 67 mSDsCounter, 0 mSdLazyCounter, 8 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 11 SdHoareTripleChecker+Valid, 98 SdHoareTripleChecker+Invalid, 25 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 8 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 17 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 18:35:58,506 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [11 Valid, 98 Invalid, 25 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 8 Invalid, 0 Unknown, 17 Unchecked, 0.0s Time] [2022-04-07 18:35:58,507 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 108 states. [2022-04-07 18:35:58,510 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 108 to 107. [2022-04-07 18:35:58,510 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 18:35:58,510 INFO L82 GeneralOperation]: Start isEquivalent. First operand 108 states. Second operand has 107 states, 81 states have (on average 1.2839506172839505) internal successors, (104), 89 states have internal predecessors, (104), 15 states have call successors, (15), 11 states have call predecessors, (15), 10 states have return successors, (10), 6 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-07 18:35:58,511 INFO L74 IsIncluded]: Start isIncluded. First operand 108 states. Second operand has 107 states, 81 states have (on average 1.2839506172839505) internal successors, (104), 89 states have internal predecessors, (104), 15 states have call successors, (15), 11 states have call predecessors, (15), 10 states have return successors, (10), 6 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-07 18:35:58,511 INFO L87 Difference]: Start difference. First operand 108 states. Second operand has 107 states, 81 states have (on average 1.2839506172839505) internal successors, (104), 89 states have internal predecessors, (104), 15 states have call successors, (15), 11 states have call predecessors, (15), 10 states have return successors, (10), 6 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-07 18:35:58,514 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:35:58,514 INFO L93 Difference]: Finished difference Result 108 states and 130 transitions. [2022-04-07 18:35:58,514 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 130 transitions. [2022-04-07 18:35:58,514 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 18:35:58,514 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 18:35:58,514 INFO L74 IsIncluded]: Start isIncluded. First operand has 107 states, 81 states have (on average 1.2839506172839505) internal successors, (104), 89 states have internal predecessors, (104), 15 states have call successors, (15), 11 states have call predecessors, (15), 10 states have return successors, (10), 6 states have call predecessors, (10), 10 states have call successors, (10) Second operand 108 states. [2022-04-07 18:35:58,515 INFO L87 Difference]: Start difference. First operand has 107 states, 81 states have (on average 1.2839506172839505) internal successors, (104), 89 states have internal predecessors, (104), 15 states have call successors, (15), 11 states have call predecessors, (15), 10 states have return successors, (10), 6 states have call predecessors, (10), 10 states have call successors, (10) Second operand 108 states. [2022-04-07 18:35:58,517 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:35:58,517 INFO L93 Difference]: Finished difference Result 108 states and 130 transitions. [2022-04-07 18:35:58,517 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 130 transitions. [2022-04-07 18:35:58,517 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 18:35:58,517 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 18:35:58,518 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 18:35:58,518 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 18:35:58,518 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 107 states, 81 states have (on average 1.2839506172839505) internal successors, (104), 89 states have internal predecessors, (104), 15 states have call successors, (15), 11 states have call predecessors, (15), 10 states have return successors, (10), 6 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-07 18:35:58,520 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 107 states to 107 states and 129 transitions. [2022-04-07 18:35:58,520 INFO L78 Accepts]: Start accepts. Automaton has 107 states and 129 transitions. Word has length 18 [2022-04-07 18:35:58,520 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 18:35:58,520 INFO L478 AbstractCegarLoop]: Abstraction has 107 states and 129 transitions. [2022-04-07 18:35:58,520 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 2.3333333333333335) internal successors, (14), 5 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:35:58,520 INFO L276 IsEmpty]: Start isEmpty. Operand 107 states and 129 transitions. [2022-04-07 18:35:58,521 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2022-04-07 18:35:58,521 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 18:35:58,521 INFO L499 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 18:35:58,539 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2022-04-07 18:35:58,739 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6,6 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 18:35:58,739 INFO L403 AbstractCegarLoop]: === Iteration 8 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 18:35:58,739 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 18:35:58,739 INFO L85 PathProgramCache]: Analyzing trace with hash 462666167, now seen corresponding path program 1 times [2022-04-07 18:35:58,739 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 18:35:58,739 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [235356687] [2022-04-07 18:35:58,740 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 18:35:58,740 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 18:35:58,750 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-04-07 18:35:58,750 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1595740561] [2022-04-07 18:35:58,750 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 18:35:58,750 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 18:35:58,750 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 18:35:58,764 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 18:35:58,765 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-04-07 18:35:58,806 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 18:35:58,807 INFO L263 TraceCheckSpWp]: Trace formula consists of 97 conjuncts, 5 conjunts are in the unsatisfiable core [2022-04-07 18:35:58,812 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 18:35:58,813 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 18:35:58,911 INFO L272 TraceCheckUtils]: 0: Hoare triple {1889#true} [85] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1889#true} is VALID [2022-04-07 18:35:58,911 INFO L290 TraceCheckUtils]: 1: Hoare triple {1889#true} [87] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0) (= v_~counter~0_5 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{~counter~0=v_~counter~0_5, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[~counter~0, #NULL.offset, #NULL.base] {1889#true} is VALID [2022-04-07 18:35:58,911 INFO L290 TraceCheckUtils]: 2: Hoare triple {1889#true} [90] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1889#true} is VALID [2022-04-07 18:35:58,911 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1889#true} {1889#true} [115] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1889#true} is VALID [2022-04-07 18:35:58,911 INFO L272 TraceCheckUtils]: 4: Hoare triple {1889#true} [86] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1889#true} is VALID [2022-04-07 18:35:58,912 INFO L290 TraceCheckUtils]: 5: Hoare triple {1889#true} [89] mainENTRY-->L34-3: Formula: (and (= v_main_~B~0_2 1) (= v_main_~B~0_2 v_main_~b~0_3) (= v_main_~q~0_2 0) (= v_main_~A~0_2 |v_main_#t~nondet1_2|) (= v_main_~A~0_2 v_main_~r~0_2)) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~q~0=v_main_~q~0_2, main_~B~0=v_main_~B~0_2, main_~b~0=v_main_~b~0_3, main_~A~0=v_main_~A~0_2, main_~r~0=v_main_~r~0_2} AuxVars[] AssignedVars[main_~q~0, main_#t~nondet1, main_~B~0, main_~b~0, main_~A~0, main_~r~0] {1909#(and (= main_~B~0 main_~b~0) (= main_~B~0 1))} is VALID [2022-04-07 18:35:58,912 INFO L290 TraceCheckUtils]: 6: Hoare triple {1909#(and (= main_~B~0 main_~b~0) (= main_~B~0 1))} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {1909#(and (= main_~B~0 main_~b~0) (= main_~B~0 1))} is VALID [2022-04-07 18:35:58,913 INFO L290 TraceCheckUtils]: 7: Hoare triple {1909#(and (= main_~B~0 main_~b~0) (= main_~B~0 1))} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 100) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {1909#(and (= main_~B~0 main_~b~0) (= main_~B~0 1))} is VALID [2022-04-07 18:35:58,913 INFO L290 TraceCheckUtils]: 8: Hoare triple {1909#(and (= main_~B~0 main_~b~0) (= main_~B~0 1))} [100] L35-->L43-2: Formula: (not (<= (mod v_main_~b~0_11 4294967296) (mod v_main_~r~0_9 4294967296))) InVars {main_~b~0=v_main_~b~0_11, main_~r~0=v_main_~r~0_9} OutVars{main_~b~0=v_main_~b~0_11, main_~r~0=v_main_~r~0_9} AuxVars[] AssignedVars[] {1909#(and (= main_~B~0 main_~b~0) (= main_~B~0 1))} is VALID [2022-04-07 18:35:58,914 INFO L290 TraceCheckUtils]: 9: Hoare triple {1909#(and (= main_~B~0 main_~b~0) (= main_~B~0 1))} [94] L43-2-->L38: Formula: (and (= |v_main_#t~post3_1| v_~counter~0_2) (= (+ |v_main_#t~post3_1| 1) v_~counter~0_1)) InVars {~counter~0=v_~counter~0_2} OutVars{~counter~0=v_~counter~0_1, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post3] {1909#(and (= main_~B~0 main_~b~0) (= main_~B~0 1))} is VALID [2022-04-07 18:35:58,914 INFO L290 TraceCheckUtils]: 10: Hoare triple {1909#(and (= main_~B~0 main_~b~0) (= main_~B~0 1))} [99] L38-->L39: Formula: (< |v_main_#t~post3_5| 100) InVars {main_#t~post3=|v_main_#t~post3_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post3] {1909#(and (= main_~B~0 main_~b~0) (= main_~B~0 1))} is VALID [2022-04-07 18:35:58,914 INFO L272 TraceCheckUtils]: 11: Hoare triple {1909#(and (= main_~B~0 main_~b~0) (= main_~B~0 1))} [104] L39-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~A~0_6 4294967296) (mod (+ v_main_~r~0_11 (* v_main_~q~0_10 v_main_~b~0_14)) 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~q~0=v_main_~q~0_10, main_~A~0=v_main_~A~0_6, main_~b~0=v_main_~b~0_14, main_~r~0=v_main_~r~0_11} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {1889#true} is VALID [2022-04-07 18:35:58,914 INFO L290 TraceCheckUtils]: 12: Hoare triple {1889#true} [103] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1889#true} is VALID [2022-04-07 18:35:58,914 INFO L290 TraceCheckUtils]: 13: Hoare triple {1889#true} [107] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_3 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1889#true} is VALID [2022-04-07 18:35:58,914 INFO L290 TraceCheckUtils]: 14: Hoare triple {1889#true} [112] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1889#true} is VALID [2022-04-07 18:35:58,915 INFO L284 TraceCheckUtils]: 15: Hoare quadruple {1889#true} {1909#(and (= main_~B~0 main_~b~0) (= main_~B~0 1))} [117] __VERIFIER_assertEXIT-->L39-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= (ite (= (mod v_main_~A~0_6 4294967296) (mod (+ v_main_~r~0_11 (* v_main_~q~0_10 v_main_~b~0_14)) 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~q~0=v_main_~q~0_10, main_~A~0=v_main_~A~0_6, main_~b~0=v_main_~b~0_14, main_~r~0=v_main_~r~0_11} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {1909#(and (= main_~B~0 main_~b~0) (= main_~B~0 1))} is VALID [2022-04-07 18:35:58,916 INFO L290 TraceCheckUtils]: 16: Hoare triple {1909#(and (= main_~B~0 main_~b~0) (= main_~B~0 1))} [109] L39-1-->L43: Formula: (let ((.cse0 (mod v_main_~b~0_7 4294967296))) (and (= (* v_main_~q~0_6 2) v_main_~q~0_5) (= v_main_~b~0_6 (div .cse0 2)) (not (= (mod v_main_~B~0_5 4294967296) .cse0)))) InVars {main_~q~0=v_main_~q~0_6, main_~B~0=v_main_~B~0_5, main_~b~0=v_main_~b~0_7} OutVars{main_~q~0=v_main_~q~0_5, main_~B~0=v_main_~B~0_5, main_~b~0=v_main_~b~0_6} AuxVars[] AssignedVars[main_~q~0, main_~b~0] {1890#false} is VALID [2022-04-07 18:35:58,916 INFO L290 TraceCheckUtils]: 17: Hoare triple {1890#false} [113] L43-->L43-2: Formula: (and (<= (mod v_main_~b~0_8 4294967296) (mod v_main_~r~0_6 4294967296)) (= v_main_~q~0_7 (+ v_main_~q~0_8 1)) (= (+ (* (- 1) v_main_~b~0_8) v_main_~r~0_6) v_main_~r~0_5)) InVars {main_~q~0=v_main_~q~0_8, main_~b~0=v_main_~b~0_8, main_~r~0=v_main_~r~0_6} OutVars{main_~q~0=v_main_~q~0_7, main_~b~0=v_main_~b~0_8, main_~r~0=v_main_~r~0_5} AuxVars[] AssignedVars[main_~q~0, main_~r~0] {1890#false} is VALID [2022-04-07 18:35:58,916 INFO L290 TraceCheckUtils]: 18: Hoare triple {1890#false} [94] L43-2-->L38: Formula: (and (= |v_main_#t~post3_1| v_~counter~0_2) (= (+ |v_main_#t~post3_1| 1) v_~counter~0_1)) InVars {~counter~0=v_~counter~0_2} OutVars{~counter~0=v_~counter~0_1, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post3] {1890#false} is VALID [2022-04-07 18:35:58,916 INFO L290 TraceCheckUtils]: 19: Hoare triple {1890#false} [99] L38-->L39: Formula: (< |v_main_#t~post3_5| 100) InVars {main_#t~post3=|v_main_#t~post3_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post3] {1890#false} is VALID [2022-04-07 18:35:58,916 INFO L272 TraceCheckUtils]: 20: Hoare triple {1890#false} [104] L39-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~A~0_6 4294967296) (mod (+ v_main_~r~0_11 (* v_main_~q~0_10 v_main_~b~0_14)) 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~q~0=v_main_~q~0_10, main_~A~0=v_main_~A~0_6, main_~b~0=v_main_~b~0_14, main_~r~0=v_main_~r~0_11} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {1890#false} is VALID [2022-04-07 18:35:58,916 INFO L290 TraceCheckUtils]: 21: Hoare triple {1890#false} [103] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1890#false} is VALID [2022-04-07 18:35:58,916 INFO L290 TraceCheckUtils]: 22: Hoare triple {1890#false} [106] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1890#false} is VALID [2022-04-07 18:35:58,916 INFO L290 TraceCheckUtils]: 23: Hoare triple {1890#false} [110] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1890#false} is VALID [2022-04-07 18:35:58,916 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 18:35:58,917 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-07 18:35:58,917 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 18:35:58,917 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [235356687] [2022-04-07 18:35:58,917 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-04-07 18:35:58,917 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1595740561] [2022-04-07 18:35:58,917 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1595740561] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 18:35:58,917 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 18:35:58,917 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-07 18:35:58,917 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1256381278] [2022-04-07 18:35:58,917 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 18:35:58,918 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 3 states have call successors, (4), 2 states have call predecessors, (4), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Word has length 24 [2022-04-07 18:35:58,918 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 18:35:58,918 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 3 states have call successors, (4), 2 states have call predecessors, (4), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 18:35:58,945 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 24 edges. 24 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 18:35:58,945 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-07 18:35:58,945 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 18:35:58,946 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-07 18:35:58,946 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-07 18:35:58,946 INFO L87 Difference]: Start difference. First operand 107 states and 129 transitions. Second operand has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 3 states have call successors, (4), 2 states have call predecessors, (4), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 18:35:58,998 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:35:58,998 INFO L93 Difference]: Finished difference Result 103 states and 122 transitions. [2022-04-07 18:35:58,998 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-07 18:35:58,999 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 3 states have call successors, (4), 2 states have call predecessors, (4), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Word has length 24 [2022-04-07 18:35:58,999 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 18:35:58,999 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 3 states have call successors, (4), 2 states have call predecessors, (4), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 18:35:59,000 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 35 transitions. [2022-04-07 18:35:59,000 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 3 states have call successors, (4), 2 states have call predecessors, (4), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 18:35:59,000 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 35 transitions. [2022-04-07 18:35:59,000 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 35 transitions. [2022-04-07 18:35:59,037 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 35 edges. 35 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 18:35:59,038 INFO L225 Difference]: With dead ends: 103 [2022-04-07 18:35:59,038 INFO L226 Difference]: Without dead ends: 93 [2022-04-07 18:35:59,038 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-07 18:35:59,039 INFO L913 BasicCegarLoop]: 25 mSDtfsCounter, 0 mSDsluCounter, 17 mSDsCounter, 0 mSdLazyCounter, 10 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 42 SdHoareTripleChecker+Invalid, 10 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 10 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 18:35:59,039 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [0 Valid, 42 Invalid, 10 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 10 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 18:35:59,039 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 93 states. [2022-04-07 18:35:59,042 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 93 to 93. [2022-04-07 18:35:59,042 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 18:35:59,042 INFO L82 GeneralOperation]: Start isEquivalent. First operand 93 states. Second operand has 93 states, 71 states have (on average 1.2816901408450705) internal successors, (91), 77 states have internal predecessors, (91), 13 states have call successors, (13), 10 states have call predecessors, (13), 8 states have return successors, (8), 5 states have call predecessors, (8), 8 states have call successors, (8) [2022-04-07 18:35:59,043 INFO L74 IsIncluded]: Start isIncluded. First operand 93 states. Second operand has 93 states, 71 states have (on average 1.2816901408450705) internal successors, (91), 77 states have internal predecessors, (91), 13 states have call successors, (13), 10 states have call predecessors, (13), 8 states have return successors, (8), 5 states have call predecessors, (8), 8 states have call successors, (8) [2022-04-07 18:35:59,043 INFO L87 Difference]: Start difference. First operand 93 states. Second operand has 93 states, 71 states have (on average 1.2816901408450705) internal successors, (91), 77 states have internal predecessors, (91), 13 states have call successors, (13), 10 states have call predecessors, (13), 8 states have return successors, (8), 5 states have call predecessors, (8), 8 states have call successors, (8) [2022-04-07 18:35:59,045 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:35:59,045 INFO L93 Difference]: Finished difference Result 93 states and 112 transitions. [2022-04-07 18:35:59,045 INFO L276 IsEmpty]: Start isEmpty. Operand 93 states and 112 transitions. [2022-04-07 18:35:59,045 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 18:35:59,045 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 18:35:59,045 INFO L74 IsIncluded]: Start isIncluded. First operand has 93 states, 71 states have (on average 1.2816901408450705) internal successors, (91), 77 states have internal predecessors, (91), 13 states have call successors, (13), 10 states have call predecessors, (13), 8 states have return successors, (8), 5 states have call predecessors, (8), 8 states have call successors, (8) Second operand 93 states. [2022-04-07 18:35:59,045 INFO L87 Difference]: Start difference. First operand has 93 states, 71 states have (on average 1.2816901408450705) internal successors, (91), 77 states have internal predecessors, (91), 13 states have call successors, (13), 10 states have call predecessors, (13), 8 states have return successors, (8), 5 states have call predecessors, (8), 8 states have call successors, (8) Second operand 93 states. [2022-04-07 18:35:59,047 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:35:59,048 INFO L93 Difference]: Finished difference Result 93 states and 112 transitions. [2022-04-07 18:35:59,048 INFO L276 IsEmpty]: Start isEmpty. Operand 93 states and 112 transitions. [2022-04-07 18:35:59,048 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 18:35:59,048 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 18:35:59,048 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 18:35:59,048 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 18:35:59,048 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 93 states, 71 states have (on average 1.2816901408450705) internal successors, (91), 77 states have internal predecessors, (91), 13 states have call successors, (13), 10 states have call predecessors, (13), 8 states have return successors, (8), 5 states have call predecessors, (8), 8 states have call successors, (8) [2022-04-07 18:35:59,050 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 93 states to 93 states and 112 transitions. [2022-04-07 18:35:59,050 INFO L78 Accepts]: Start accepts. Automaton has 93 states and 112 transitions. Word has length 24 [2022-04-07 18:35:59,050 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 18:35:59,050 INFO L478 AbstractCegarLoop]: Abstraction has 93 states and 112 transitions. [2022-04-07 18:35:59,050 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 3 states have call successors, (4), 2 states have call predecessors, (4), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 18:35:59,050 INFO L276 IsEmpty]: Start isEmpty. Operand 93 states and 112 transitions. [2022-04-07 18:35:59,050 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2022-04-07 18:35:59,050 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 18:35:59,051 INFO L499 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 18:35:59,079 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2022-04-07 18:35:59,279 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7,7 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 18:35:59,279 INFO L403 AbstractCegarLoop]: === Iteration 9 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 18:35:59,279 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 18:35:59,279 INFO L85 PathProgramCache]: Analyzing trace with hash 1651364104, now seen corresponding path program 1 times [2022-04-07 18:35:59,280 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 18:35:59,280 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [838179272] [2022-04-07 18:35:59,280 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 18:35:59,280 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 18:35:59,294 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-04-07 18:35:59,294 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [749123473] [2022-04-07 18:35:59,294 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 18:35:59,294 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 18:35:59,294 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 18:35:59,299 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 18:35:59,312 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2022-04-07 18:35:59,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 18:35:59,356 INFO L263 TraceCheckSpWp]: Trace formula consists of 92 conjuncts, 11 conjunts are in the unsatisfiable core [2022-04-07 18:35:59,361 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 18:35:59,362 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 18:35:59,565 INFO L272 TraceCheckUtils]: 0: Hoare triple {2345#true} [85] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2345#true} is VALID [2022-04-07 18:35:59,566 INFO L290 TraceCheckUtils]: 1: Hoare triple {2345#true} [87] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0) (= v_~counter~0_5 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{~counter~0=v_~counter~0_5, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[~counter~0, #NULL.offset, #NULL.base] {2345#true} is VALID [2022-04-07 18:35:59,566 INFO L290 TraceCheckUtils]: 2: Hoare triple {2345#true} [90] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2345#true} is VALID [2022-04-07 18:35:59,566 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2345#true} {2345#true} [115] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2345#true} is VALID [2022-04-07 18:35:59,566 INFO L272 TraceCheckUtils]: 4: Hoare triple {2345#true} [86] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2345#true} is VALID [2022-04-07 18:35:59,566 INFO L290 TraceCheckUtils]: 5: Hoare triple {2345#true} [89] mainENTRY-->L34-3: Formula: (and (= v_main_~B~0_2 1) (= v_main_~B~0_2 v_main_~b~0_3) (= v_main_~q~0_2 0) (= v_main_~A~0_2 |v_main_#t~nondet1_2|) (= v_main_~A~0_2 v_main_~r~0_2)) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~q~0=v_main_~q~0_2, main_~B~0=v_main_~B~0_2, main_~b~0=v_main_~b~0_3, main_~A~0=v_main_~A~0_2, main_~r~0=v_main_~r~0_2} AuxVars[] AssignedVars[main_~q~0, main_#t~nondet1, main_~B~0, main_~b~0, main_~A~0, main_~r~0] {2345#true} is VALID [2022-04-07 18:35:59,566 INFO L290 TraceCheckUtils]: 6: Hoare triple {2345#true} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {2345#true} is VALID [2022-04-07 18:35:59,566 INFO L290 TraceCheckUtils]: 7: Hoare triple {2345#true} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 100) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {2345#true} is VALID [2022-04-07 18:35:59,566 INFO L290 TraceCheckUtils]: 8: Hoare triple {2345#true} [101] L35-->L34-3: Formula: (and (= (* 2 v_main_~b~0_13) v_main_~b~0_12) (<= (mod v_main_~b~0_13 4294967296) (mod v_main_~r~0_10 4294967296))) InVars {main_~b~0=v_main_~b~0_13, main_~r~0=v_main_~r~0_10} OutVars{main_~b~0=v_main_~b~0_12, main_~r~0=v_main_~r~0_10} AuxVars[] AssignedVars[main_~b~0] {2345#true} is VALID [2022-04-07 18:35:59,566 INFO L290 TraceCheckUtils]: 9: Hoare triple {2345#true} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {2345#true} is VALID [2022-04-07 18:35:59,566 INFO L290 TraceCheckUtils]: 10: Hoare triple {2345#true} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 100) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {2345#true} is VALID [2022-04-07 18:35:59,567 INFO L290 TraceCheckUtils]: 11: Hoare triple {2345#true} [100] L35-->L43-2: Formula: (not (<= (mod v_main_~b~0_11 4294967296) (mod v_main_~r~0_9 4294967296))) InVars {main_~b~0=v_main_~b~0_11, main_~r~0=v_main_~r~0_9} OutVars{main_~b~0=v_main_~b~0_11, main_~r~0=v_main_~r~0_9} AuxVars[] AssignedVars[] {2345#true} is VALID [2022-04-07 18:35:59,567 INFO L290 TraceCheckUtils]: 12: Hoare triple {2345#true} [94] L43-2-->L38: Formula: (and (= |v_main_#t~post3_1| v_~counter~0_2) (= (+ |v_main_#t~post3_1| 1) v_~counter~0_1)) InVars {~counter~0=v_~counter~0_2} OutVars{~counter~0=v_~counter~0_1, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post3] {2345#true} is VALID [2022-04-07 18:35:59,567 INFO L290 TraceCheckUtils]: 13: Hoare triple {2345#true} [99] L38-->L39: Formula: (< |v_main_#t~post3_5| 100) InVars {main_#t~post3=|v_main_#t~post3_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post3] {2345#true} is VALID [2022-04-07 18:35:59,567 INFO L272 TraceCheckUtils]: 14: Hoare triple {2345#true} [104] L39-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~A~0_6 4294967296) (mod (+ v_main_~r~0_11 (* v_main_~q~0_10 v_main_~b~0_14)) 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~q~0=v_main_~q~0_10, main_~A~0=v_main_~A~0_6, main_~b~0=v_main_~b~0_14, main_~r~0=v_main_~r~0_11} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {2345#true} is VALID [2022-04-07 18:35:59,569 INFO L290 TraceCheckUtils]: 15: Hoare triple {2345#true} [103] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2395#(= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)} is VALID [2022-04-07 18:35:59,570 INFO L290 TraceCheckUtils]: 16: Hoare triple {2395#(= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)} [107] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_3 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2399#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 18:35:59,570 INFO L290 TraceCheckUtils]: 17: Hoare triple {2399#(not (= |__VERIFIER_assert_#in~cond| 0))} [112] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2399#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 18:35:59,571 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {2399#(not (= |__VERIFIER_assert_#in~cond| 0))} {2345#true} [117] __VERIFIER_assertEXIT-->L39-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= (ite (= (mod v_main_~A~0_6 4294967296) (mod (+ v_main_~r~0_11 (* v_main_~q~0_10 v_main_~b~0_14)) 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~q~0=v_main_~q~0_10, main_~A~0=v_main_~A~0_6, main_~b~0=v_main_~b~0_14, main_~r~0=v_main_~r~0_11} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {2406#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296))} is VALID [2022-04-07 18:35:59,571 INFO L290 TraceCheckUtils]: 19: Hoare triple {2406#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296))} [108] L39-1-->L38-2: Formula: (= (mod v_main_~B~0_1 4294967296) (mod v_main_~b~0_2 4294967296)) InVars {main_~b~0=v_main_~b~0_2, main_~B~0=v_main_~B~0_1} OutVars{main_~b~0=v_main_~b~0_2, main_~B~0=v_main_~B~0_1} AuxVars[] AssignedVars[] {2406#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296))} is VALID [2022-04-07 18:35:59,572 INFO L272 TraceCheckUtils]: 20: Hoare triple {2406#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296))} [97] L38-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_2| (ite (= (mod v_main_~A~0_7 4294967296) (mod (+ v_main_~r~0_12 (* v_main_~q~0_11 v_main_~b~0_15)) 4294967296)) 1 0)) InVars {main_~q~0=v_main_~q~0_11, main_~A~0=v_main_~A~0_7, main_~b~0=v_main_~b~0_15, main_~r~0=v_main_~r~0_12} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_2|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {2413#(= |__VERIFIER_assert_#in~cond| 1)} is VALID [2022-04-07 18:35:59,572 INFO L290 TraceCheckUtils]: 21: Hoare triple {2413#(= |__VERIFIER_assert_#in~cond| 1)} [103] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2417#(= __VERIFIER_assert_~cond 1)} is VALID [2022-04-07 18:35:59,572 INFO L290 TraceCheckUtils]: 22: Hoare triple {2417#(= __VERIFIER_assert_~cond 1)} [106] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2346#false} is VALID [2022-04-07 18:35:59,573 INFO L290 TraceCheckUtils]: 23: Hoare triple {2346#false} [110] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2346#false} is VALID [2022-04-07 18:35:59,573 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-07 18:35:59,573 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 18:36:00,268 INFO L290 TraceCheckUtils]: 23: Hoare triple {2346#false} [110] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2346#false} is VALID [2022-04-07 18:36:00,269 INFO L290 TraceCheckUtils]: 22: Hoare triple {2427#(not (= __VERIFIER_assert_~cond 0))} [106] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2346#false} is VALID [2022-04-07 18:36:00,269 INFO L290 TraceCheckUtils]: 21: Hoare triple {2399#(not (= |__VERIFIER_assert_#in~cond| 0))} [103] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2427#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 18:36:00,270 INFO L272 TraceCheckUtils]: 20: Hoare triple {2406#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296))} [97] L38-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_2| (ite (= (mod v_main_~A~0_7 4294967296) (mod (+ v_main_~r~0_12 (* v_main_~q~0_11 v_main_~b~0_15)) 4294967296)) 1 0)) InVars {main_~q~0=v_main_~q~0_11, main_~A~0=v_main_~A~0_7, main_~b~0=v_main_~b~0_15, main_~r~0=v_main_~r~0_12} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_2|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {2399#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 18:36:00,270 INFO L290 TraceCheckUtils]: 19: Hoare triple {2406#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296))} [108] L39-1-->L38-2: Formula: (= (mod v_main_~B~0_1 4294967296) (mod v_main_~b~0_2 4294967296)) InVars {main_~b~0=v_main_~b~0_2, main_~B~0=v_main_~B~0_1} OutVars{main_~b~0=v_main_~b~0_2, main_~B~0=v_main_~B~0_1} AuxVars[] AssignedVars[] {2406#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296))} is VALID [2022-04-07 18:36:00,271 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {2399#(not (= |__VERIFIER_assert_#in~cond| 0))} {2345#true} [117] __VERIFIER_assertEXIT-->L39-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= (ite (= (mod v_main_~A~0_6 4294967296) (mod (+ v_main_~r~0_11 (* v_main_~q~0_10 v_main_~b~0_14)) 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~q~0=v_main_~q~0_10, main_~A~0=v_main_~A~0_6, main_~b~0=v_main_~b~0_14, main_~r~0=v_main_~r~0_11} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {2406#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296))} is VALID [2022-04-07 18:36:00,271 INFO L290 TraceCheckUtils]: 17: Hoare triple {2399#(not (= |__VERIFIER_assert_#in~cond| 0))} [112] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2399#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 18:36:00,271 INFO L290 TraceCheckUtils]: 16: Hoare triple {2449#(or (not (= |__VERIFIER_assert_#in~cond| 0)) (= __VERIFIER_assert_~cond 0))} [107] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_3 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2399#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 18:36:00,272 INFO L290 TraceCheckUtils]: 15: Hoare triple {2345#true} [103] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2449#(or (not (= |__VERIFIER_assert_#in~cond| 0)) (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 18:36:00,272 INFO L272 TraceCheckUtils]: 14: Hoare triple {2345#true} [104] L39-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~A~0_6 4294967296) (mod (+ v_main_~r~0_11 (* v_main_~q~0_10 v_main_~b~0_14)) 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~q~0=v_main_~q~0_10, main_~A~0=v_main_~A~0_6, main_~b~0=v_main_~b~0_14, main_~r~0=v_main_~r~0_11} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {2345#true} is VALID [2022-04-07 18:36:00,272 INFO L290 TraceCheckUtils]: 13: Hoare triple {2345#true} [99] L38-->L39: Formula: (< |v_main_#t~post3_5| 100) InVars {main_#t~post3=|v_main_#t~post3_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post3] {2345#true} is VALID [2022-04-07 18:36:00,272 INFO L290 TraceCheckUtils]: 12: Hoare triple {2345#true} [94] L43-2-->L38: Formula: (and (= |v_main_#t~post3_1| v_~counter~0_2) (= (+ |v_main_#t~post3_1| 1) v_~counter~0_1)) InVars {~counter~0=v_~counter~0_2} OutVars{~counter~0=v_~counter~0_1, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post3] {2345#true} is VALID [2022-04-07 18:36:00,272 INFO L290 TraceCheckUtils]: 11: Hoare triple {2345#true} [100] L35-->L43-2: Formula: (not (<= (mod v_main_~b~0_11 4294967296) (mod v_main_~r~0_9 4294967296))) InVars {main_~b~0=v_main_~b~0_11, main_~r~0=v_main_~r~0_9} OutVars{main_~b~0=v_main_~b~0_11, main_~r~0=v_main_~r~0_9} AuxVars[] AssignedVars[] {2345#true} is VALID [2022-04-07 18:36:00,272 INFO L290 TraceCheckUtils]: 10: Hoare triple {2345#true} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 100) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {2345#true} is VALID [2022-04-07 18:36:00,272 INFO L290 TraceCheckUtils]: 9: Hoare triple {2345#true} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {2345#true} is VALID [2022-04-07 18:36:00,272 INFO L290 TraceCheckUtils]: 8: Hoare triple {2345#true} [101] L35-->L34-3: Formula: (and (= (* 2 v_main_~b~0_13) v_main_~b~0_12) (<= (mod v_main_~b~0_13 4294967296) (mod v_main_~r~0_10 4294967296))) InVars {main_~b~0=v_main_~b~0_13, main_~r~0=v_main_~r~0_10} OutVars{main_~b~0=v_main_~b~0_12, main_~r~0=v_main_~r~0_10} AuxVars[] AssignedVars[main_~b~0] {2345#true} is VALID [2022-04-07 18:36:00,273 INFO L290 TraceCheckUtils]: 7: Hoare triple {2345#true} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 100) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {2345#true} is VALID [2022-04-07 18:36:00,273 INFO L290 TraceCheckUtils]: 6: Hoare triple {2345#true} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {2345#true} is VALID [2022-04-07 18:36:00,273 INFO L290 TraceCheckUtils]: 5: Hoare triple {2345#true} [89] mainENTRY-->L34-3: Formula: (and (= v_main_~B~0_2 1) (= v_main_~B~0_2 v_main_~b~0_3) (= v_main_~q~0_2 0) (= v_main_~A~0_2 |v_main_#t~nondet1_2|) (= v_main_~A~0_2 v_main_~r~0_2)) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~q~0=v_main_~q~0_2, main_~B~0=v_main_~B~0_2, main_~b~0=v_main_~b~0_3, main_~A~0=v_main_~A~0_2, main_~r~0=v_main_~r~0_2} AuxVars[] AssignedVars[main_~q~0, main_#t~nondet1, main_~B~0, main_~b~0, main_~A~0, main_~r~0] {2345#true} is VALID [2022-04-07 18:36:00,273 INFO L272 TraceCheckUtils]: 4: Hoare triple {2345#true} [86] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2345#true} is VALID [2022-04-07 18:36:00,273 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2345#true} {2345#true} [115] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2345#true} is VALID [2022-04-07 18:36:00,273 INFO L290 TraceCheckUtils]: 2: Hoare triple {2345#true} [90] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2345#true} is VALID [2022-04-07 18:36:00,273 INFO L290 TraceCheckUtils]: 1: Hoare triple {2345#true} [87] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0) (= v_~counter~0_5 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{~counter~0=v_~counter~0_5, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[~counter~0, #NULL.offset, #NULL.base] {2345#true} is VALID [2022-04-07 18:36:00,273 INFO L272 TraceCheckUtils]: 0: Hoare triple {2345#true} [85] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2345#true} is VALID [2022-04-07 18:36:00,274 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-07 18:36:00,274 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 18:36:00,274 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [838179272] [2022-04-07 18:36:00,274 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-04-07 18:36:00,274 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [749123473] [2022-04-07 18:36:00,274 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [749123473] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 18:36:00,274 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-04-07 18:36:00,274 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 6] total 9 [2022-04-07 18:36:00,274 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [890288400] [2022-04-07 18:36:00,274 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-04-07 18:36:00,275 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 2.2222222222222223) internal successors, (20), 8 states have internal predecessors, (20), 2 states have call successors, (5), 3 states have call predecessors, (5), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) Word has length 24 [2022-04-07 18:36:00,275 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 18:36:00,275 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 9 states, 9 states have (on average 2.2222222222222223) internal successors, (20), 8 states have internal predecessors, (20), 2 states have call successors, (5), 3 states have call predecessors, (5), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-07 18:36:00,292 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 27 edges. 27 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 18:36:00,293 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2022-04-07 18:36:00,293 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 18:36:00,293 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2022-04-07 18:36:00,293 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72 [2022-04-07 18:36:00,293 INFO L87 Difference]: Start difference. First operand 93 states and 112 transitions. Second operand has 9 states, 9 states have (on average 2.2222222222222223) internal successors, (20), 8 states have internal predecessors, (20), 2 states have call successors, (5), 3 states have call predecessors, (5), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-07 18:36:00,703 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:36:00,703 INFO L93 Difference]: Finished difference Result 106 states and 121 transitions. [2022-04-07 18:36:00,703 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-04-07 18:36:00,704 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 2.2222222222222223) internal successors, (20), 8 states have internal predecessors, (20), 2 states have call successors, (5), 3 states have call predecessors, (5), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) Word has length 24 [2022-04-07 18:36:00,704 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 18:36:00,704 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 9 states have (on average 2.2222222222222223) internal successors, (20), 8 states have internal predecessors, (20), 2 states have call successors, (5), 3 states have call predecessors, (5), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-07 18:36:00,705 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 34 transitions. [2022-04-07 18:36:00,705 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 9 states have (on average 2.2222222222222223) internal successors, (20), 8 states have internal predecessors, (20), 2 states have call successors, (5), 3 states have call predecessors, (5), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-07 18:36:00,705 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 34 transitions. [2022-04-07 18:36:00,705 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 7 states and 34 transitions. [2022-04-07 18:36:00,729 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 34 edges. 34 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 18:36:00,730 INFO L225 Difference]: With dead ends: 106 [2022-04-07 18:36:00,730 INFO L226 Difference]: Without dead ends: 88 [2022-04-07 18:36:00,731 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 40 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=35, Invalid=75, Unknown=0, NotChecked=0, Total=110 [2022-04-07 18:36:00,731 INFO L913 BasicCegarLoop]: 21 mSDtfsCounter, 16 mSDsluCounter, 66 mSDsCounter, 0 mSdLazyCounter, 45 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 16 SdHoareTripleChecker+Valid, 87 SdHoareTripleChecker+Invalid, 48 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 45 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-04-07 18:36:00,731 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [16 Valid, 87 Invalid, 48 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 45 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-04-07 18:36:00,732 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 88 states. [2022-04-07 18:36:00,734 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 88 to 88. [2022-04-07 18:36:00,734 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 18:36:00,735 INFO L82 GeneralOperation]: Start isEquivalent. First operand 88 states. Second operand has 88 states, 69 states have (on average 1.2318840579710144) internal successors, (85), 73 states have internal predecessors, (85), 10 states have call successors, (10), 9 states have call predecessors, (10), 8 states have return successors, (8), 5 states have call predecessors, (8), 8 states have call successors, (8) [2022-04-07 18:36:00,735 INFO L74 IsIncluded]: Start isIncluded. First operand 88 states. Second operand has 88 states, 69 states have (on average 1.2318840579710144) internal successors, (85), 73 states have internal predecessors, (85), 10 states have call successors, (10), 9 states have call predecessors, (10), 8 states have return successors, (8), 5 states have call predecessors, (8), 8 states have call successors, (8) [2022-04-07 18:36:00,735 INFO L87 Difference]: Start difference. First operand 88 states. Second operand has 88 states, 69 states have (on average 1.2318840579710144) internal successors, (85), 73 states have internal predecessors, (85), 10 states have call successors, (10), 9 states have call predecessors, (10), 8 states have return successors, (8), 5 states have call predecessors, (8), 8 states have call successors, (8) [2022-04-07 18:36:00,737 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:36:00,737 INFO L93 Difference]: Finished difference Result 88 states and 103 transitions. [2022-04-07 18:36:00,737 INFO L276 IsEmpty]: Start isEmpty. Operand 88 states and 103 transitions. [2022-04-07 18:36:00,737 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 18:36:00,737 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 18:36:00,738 INFO L74 IsIncluded]: Start isIncluded. First operand has 88 states, 69 states have (on average 1.2318840579710144) internal successors, (85), 73 states have internal predecessors, (85), 10 states have call successors, (10), 9 states have call predecessors, (10), 8 states have return successors, (8), 5 states have call predecessors, (8), 8 states have call successors, (8) Second operand 88 states. [2022-04-07 18:36:00,738 INFO L87 Difference]: Start difference. First operand has 88 states, 69 states have (on average 1.2318840579710144) internal successors, (85), 73 states have internal predecessors, (85), 10 states have call successors, (10), 9 states have call predecessors, (10), 8 states have return successors, (8), 5 states have call predecessors, (8), 8 states have call successors, (8) Second operand 88 states. [2022-04-07 18:36:00,740 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:36:00,740 INFO L93 Difference]: Finished difference Result 88 states and 103 transitions. [2022-04-07 18:36:00,740 INFO L276 IsEmpty]: Start isEmpty. Operand 88 states and 103 transitions. [2022-04-07 18:36:00,740 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 18:36:00,740 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 18:36:00,740 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 18:36:00,740 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 18:36:00,740 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 88 states, 69 states have (on average 1.2318840579710144) internal successors, (85), 73 states have internal predecessors, (85), 10 states have call successors, (10), 9 states have call predecessors, (10), 8 states have return successors, (8), 5 states have call predecessors, (8), 8 states have call successors, (8) [2022-04-07 18:36:00,742 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 88 states to 88 states and 103 transitions. [2022-04-07 18:36:00,742 INFO L78 Accepts]: Start accepts. Automaton has 88 states and 103 transitions. Word has length 24 [2022-04-07 18:36:00,742 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 18:36:00,742 INFO L478 AbstractCegarLoop]: Abstraction has 88 states and 103 transitions. [2022-04-07 18:36:00,742 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 2.2222222222222223) internal successors, (20), 8 states have internal predecessors, (20), 2 states have call successors, (5), 3 states have call predecessors, (5), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-07 18:36:00,743 INFO L276 IsEmpty]: Start isEmpty. Operand 88 states and 103 transitions. [2022-04-07 18:36:00,743 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2022-04-07 18:36:00,743 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 18:36:00,743 INFO L499 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 18:36:00,776 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2022-04-07 18:36:00,943 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8,8 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 18:36:00,944 INFO L403 AbstractCegarLoop]: === Iteration 10 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 18:36:00,944 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 18:36:00,944 INFO L85 PathProgramCache]: Analyzing trace with hash -268589446, now seen corresponding path program 1 times [2022-04-07 18:36:00,944 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 18:36:00,944 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [92342254] [2022-04-07 18:36:00,944 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 18:36:00,944 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 18:36:00,957 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-04-07 18:36:00,957 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [380682970] [2022-04-07 18:36:00,957 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 18:36:00,957 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 18:36:00,957 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 18:36:00,960 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 18:36:00,961 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2022-04-07 18:36:01,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 18:36:01,018 INFO L263 TraceCheckSpWp]: Trace formula consists of 105 conjuncts, 25 conjunts are in the unsatisfiable core [2022-04-07 18:36:01,027 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 18:36:01,028 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 18:36:01,684 INFO L272 TraceCheckUtils]: 0: Hoare triple {2871#true} [85] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2871#true} is VALID [2022-04-07 18:36:01,684 INFO L290 TraceCheckUtils]: 1: Hoare triple {2871#true} [87] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0) (= v_~counter~0_5 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{~counter~0=v_~counter~0_5, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[~counter~0, #NULL.offset, #NULL.base] {2871#true} is VALID [2022-04-07 18:36:01,685 INFO L290 TraceCheckUtils]: 2: Hoare triple {2871#true} [90] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2871#true} is VALID [2022-04-07 18:36:01,685 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2871#true} {2871#true} [115] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2871#true} is VALID [2022-04-07 18:36:01,685 INFO L272 TraceCheckUtils]: 4: Hoare triple {2871#true} [86] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2871#true} is VALID [2022-04-07 18:36:01,685 INFO L290 TraceCheckUtils]: 5: Hoare triple {2871#true} [89] mainENTRY-->L34-3: Formula: (and (= v_main_~B~0_2 1) (= v_main_~B~0_2 v_main_~b~0_3) (= v_main_~q~0_2 0) (= v_main_~A~0_2 |v_main_#t~nondet1_2|) (= v_main_~A~0_2 v_main_~r~0_2)) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~q~0=v_main_~q~0_2, main_~B~0=v_main_~B~0_2, main_~b~0=v_main_~b~0_3, main_~A~0=v_main_~A~0_2, main_~r~0=v_main_~r~0_2} AuxVars[] AssignedVars[main_~q~0, main_#t~nondet1, main_~B~0, main_~b~0, main_~A~0, main_~r~0] {2891#(and (= main_~b~0 1) (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:36:01,686 INFO L290 TraceCheckUtils]: 6: Hoare triple {2891#(and (= main_~b~0 1) (= main_~A~0 main_~r~0) (= main_~q~0 0))} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {2891#(and (= main_~b~0 1) (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:36:01,686 INFO L290 TraceCheckUtils]: 7: Hoare triple {2891#(and (= main_~b~0 1) (= main_~A~0 main_~r~0) (= main_~q~0 0))} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 100) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {2891#(and (= main_~b~0 1) (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:36:01,686 INFO L290 TraceCheckUtils]: 8: Hoare triple {2891#(and (= main_~b~0 1) (= main_~A~0 main_~r~0) (= main_~q~0 0))} [101] L35-->L34-3: Formula: (and (= (* 2 v_main_~b~0_13) v_main_~b~0_12) (<= (mod v_main_~b~0_13 4294967296) (mod v_main_~r~0_10 4294967296))) InVars {main_~b~0=v_main_~b~0_13, main_~r~0=v_main_~r~0_10} OutVars{main_~b~0=v_main_~b~0_12, main_~r~0=v_main_~r~0_10} AuxVars[] AssignedVars[main_~b~0] {2901#(and (= main_~b~0 2) (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} is VALID [2022-04-07 18:36:01,687 INFO L290 TraceCheckUtils]: 9: Hoare triple {2901#(and (= main_~b~0 2) (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {2901#(and (= main_~b~0 2) (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} is VALID [2022-04-07 18:36:01,688 INFO L290 TraceCheckUtils]: 10: Hoare triple {2901#(and (= main_~b~0 2) (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 100) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {2901#(and (= main_~b~0 2) (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} is VALID [2022-04-07 18:36:01,690 INFO L290 TraceCheckUtils]: 11: Hoare triple {2901#(and (= main_~b~0 2) (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} [100] L35-->L43-2: Formula: (not (<= (mod v_main_~b~0_11 4294967296) (mod v_main_~r~0_9 4294967296))) InVars {main_~b~0=v_main_~b~0_11, main_~r~0=v_main_~r~0_9} OutVars{main_~b~0=v_main_~b~0_11, main_~r~0=v_main_~r~0_9} AuxVars[] AssignedVars[] {2911#(and (= main_~b~0 2) (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} is VALID [2022-04-07 18:36:01,691 INFO L290 TraceCheckUtils]: 12: Hoare triple {2911#(and (= main_~b~0 2) (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} [94] L43-2-->L38: Formula: (and (= |v_main_#t~post3_1| v_~counter~0_2) (= (+ |v_main_#t~post3_1| 1) v_~counter~0_1)) InVars {~counter~0=v_~counter~0_2} OutVars{~counter~0=v_~counter~0_1, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post3] {2911#(and (= main_~b~0 2) (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} is VALID [2022-04-07 18:36:01,692 INFO L290 TraceCheckUtils]: 13: Hoare triple {2911#(and (= main_~b~0 2) (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} [99] L38-->L39: Formula: (< |v_main_#t~post3_5| 100) InVars {main_#t~post3=|v_main_#t~post3_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post3] {2911#(and (= main_~b~0 2) (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} is VALID [2022-04-07 18:36:01,693 INFO L272 TraceCheckUtils]: 14: Hoare triple {2911#(and (= main_~b~0 2) (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} [104] L39-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~A~0_6 4294967296) (mod (+ v_main_~r~0_11 (* v_main_~q~0_10 v_main_~b~0_14)) 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~q~0=v_main_~q~0_10, main_~A~0=v_main_~A~0_6, main_~b~0=v_main_~b~0_14, main_~r~0=v_main_~r~0_11} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {2871#true} is VALID [2022-04-07 18:36:01,693 INFO L290 TraceCheckUtils]: 15: Hoare triple {2871#true} [103] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2871#true} is VALID [2022-04-07 18:36:01,693 INFO L290 TraceCheckUtils]: 16: Hoare triple {2871#true} [107] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_3 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2871#true} is VALID [2022-04-07 18:36:01,693 INFO L290 TraceCheckUtils]: 17: Hoare triple {2871#true} [112] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2871#true} is VALID [2022-04-07 18:36:01,694 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {2871#true} {2911#(and (= main_~b~0 2) (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} [117] __VERIFIER_assertEXIT-->L39-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= (ite (= (mod v_main_~A~0_6 4294967296) (mod (+ v_main_~r~0_11 (* v_main_~q~0_10 v_main_~b~0_14)) 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~q~0=v_main_~q~0_10, main_~A~0=v_main_~A~0_6, main_~b~0=v_main_~b~0_14, main_~r~0=v_main_~r~0_11} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {2911#(and (= main_~b~0 2) (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} is VALID [2022-04-07 18:36:01,696 INFO L290 TraceCheckUtils]: 19: Hoare triple {2911#(and (= main_~b~0 2) (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} [109] L39-1-->L43: Formula: (let ((.cse0 (mod v_main_~b~0_7 4294967296))) (and (= (* v_main_~q~0_6 2) v_main_~q~0_5) (= v_main_~b~0_6 (div .cse0 2)) (not (= (mod v_main_~B~0_5 4294967296) .cse0)))) InVars {main_~q~0=v_main_~q~0_6, main_~B~0=v_main_~B~0_5, main_~b~0=v_main_~b~0_7} OutVars{main_~q~0=v_main_~q~0_5, main_~B~0=v_main_~B~0_5, main_~b~0=v_main_~b~0_6} AuxVars[] AssignedVars[main_~q~0, main_~b~0] {2936#(and (= main_~b~0 1) (= main_~A~0 main_~r~0) (not (<= 2 (mod main_~r~0 4294967296))) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} is VALID [2022-04-07 18:36:01,697 INFO L290 TraceCheckUtils]: 20: Hoare triple {2936#(and (= main_~b~0 1) (= main_~A~0 main_~r~0) (not (<= 2 (mod main_~r~0 4294967296))) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} [113] L43-->L43-2: Formula: (and (<= (mod v_main_~b~0_8 4294967296) (mod v_main_~r~0_6 4294967296)) (= v_main_~q~0_7 (+ v_main_~q~0_8 1)) (= (+ (* (- 1) v_main_~b~0_8) v_main_~r~0_6) v_main_~r~0_5)) InVars {main_~q~0=v_main_~q~0_8, main_~b~0=v_main_~b~0_8, main_~r~0=v_main_~r~0_6} OutVars{main_~q~0=v_main_~q~0_7, main_~b~0=v_main_~b~0_8, main_~r~0=v_main_~r~0_5} AuxVars[] AssignedVars[main_~q~0, main_~r~0] {2940#(and (= (+ main_~A~0 (* (- 1) main_~b~0)) main_~r~0) (= main_~b~0 1) (not (<= 2 (mod main_~A~0 4294967296))) (<= 1 (mod main_~A~0 4294967296)) (= main_~q~0 1))} is VALID [2022-04-07 18:36:01,697 INFO L290 TraceCheckUtils]: 21: Hoare triple {2940#(and (= (+ main_~A~0 (* (- 1) main_~b~0)) main_~r~0) (= main_~b~0 1) (not (<= 2 (mod main_~A~0 4294967296))) (<= 1 (mod main_~A~0 4294967296)) (= main_~q~0 1))} [94] L43-2-->L38: Formula: (and (= |v_main_#t~post3_1| v_~counter~0_2) (= (+ |v_main_#t~post3_1| 1) v_~counter~0_1)) InVars {~counter~0=v_~counter~0_2} OutVars{~counter~0=v_~counter~0_1, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post3] {2940#(and (= (+ main_~A~0 (* (- 1) main_~b~0)) main_~r~0) (= main_~b~0 1) (not (<= 2 (mod main_~A~0 4294967296))) (<= 1 (mod main_~A~0 4294967296)) (= main_~q~0 1))} is VALID [2022-04-07 18:36:01,698 INFO L290 TraceCheckUtils]: 22: Hoare triple {2940#(and (= (+ main_~A~0 (* (- 1) main_~b~0)) main_~r~0) (= main_~b~0 1) (not (<= 2 (mod main_~A~0 4294967296))) (<= 1 (mod main_~A~0 4294967296)) (= main_~q~0 1))} [99] L38-->L39: Formula: (< |v_main_#t~post3_5| 100) InVars {main_#t~post3=|v_main_#t~post3_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post3] {2940#(and (= (+ main_~A~0 (* (- 1) main_~b~0)) main_~r~0) (= main_~b~0 1) (not (<= 2 (mod main_~A~0 4294967296))) (<= 1 (mod main_~A~0 4294967296)) (= main_~q~0 1))} is VALID [2022-04-07 18:36:01,699 INFO L272 TraceCheckUtils]: 23: Hoare triple {2940#(and (= (+ main_~A~0 (* (- 1) main_~b~0)) main_~r~0) (= main_~b~0 1) (not (<= 2 (mod main_~A~0 4294967296))) (<= 1 (mod main_~A~0 4294967296)) (= main_~q~0 1))} [104] L39-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~A~0_6 4294967296) (mod (+ v_main_~r~0_11 (* v_main_~q~0_10 v_main_~b~0_14)) 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~q~0=v_main_~q~0_10, main_~A~0=v_main_~A~0_6, main_~b~0=v_main_~b~0_14, main_~r~0=v_main_~r~0_11} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {2950#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 18:36:01,699 INFO L290 TraceCheckUtils]: 24: Hoare triple {2950#(<= 1 |__VERIFIER_assert_#in~cond|)} [103] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2954#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 18:36:01,699 INFO L290 TraceCheckUtils]: 25: Hoare triple {2954#(<= 1 __VERIFIER_assert_~cond)} [106] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2872#false} is VALID [2022-04-07 18:36:01,699 INFO L290 TraceCheckUtils]: 26: Hoare triple {2872#false} [110] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2872#false} is VALID [2022-04-07 18:36:01,700 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 18:36:01,700 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 18:36:16,817 WARN L232 SmtUtils]: Spent 6.40s on a formula simplification that was a NOOP. DAG size: 17 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 18:36:31,697 WARN L855 $PredicateComparison]: unable to prove that (let ((.cse1 (mod (* c_main_~b~0 2) 4294967296)) (.cse0 (mod c_main_~r~0 4294967296))) (or (not (<= (mod c_main_~b~0 4294967296) .cse0)) (= (mod c_main_~A~0 4294967296) (mod (+ (* (div .cse1 2) (* c_main_~q~0 2)) c_main_~r~0) 4294967296)) (<= .cse1 .cse0))) is different from true [2022-04-07 18:36:52,973 INFO L290 TraceCheckUtils]: 26: Hoare triple {2872#false} [110] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2872#false} is VALID [2022-04-07 18:36:52,974 INFO L290 TraceCheckUtils]: 25: Hoare triple {2954#(<= 1 __VERIFIER_assert_~cond)} [106] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2872#false} is VALID [2022-04-07 18:36:52,974 INFO L290 TraceCheckUtils]: 24: Hoare triple {2950#(<= 1 |__VERIFIER_assert_#in~cond|)} [103] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2954#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 18:36:52,975 INFO L272 TraceCheckUtils]: 23: Hoare triple {2970#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296))} [104] L39-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~A~0_6 4294967296) (mod (+ v_main_~r~0_11 (* v_main_~q~0_10 v_main_~b~0_14)) 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~q~0=v_main_~q~0_10, main_~A~0=v_main_~A~0_6, main_~b~0=v_main_~b~0_14, main_~r~0=v_main_~r~0_11} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {2950#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 18:36:52,976 INFO L290 TraceCheckUtils]: 22: Hoare triple {2970#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296))} [99] L38-->L39: Formula: (< |v_main_#t~post3_5| 100) InVars {main_#t~post3=|v_main_#t~post3_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post3] {2970#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296))} is VALID [2022-04-07 18:36:52,976 INFO L290 TraceCheckUtils]: 21: Hoare triple {2970#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296))} [94] L43-2-->L38: Formula: (and (= |v_main_#t~post3_1| v_~counter~0_2) (= (+ |v_main_#t~post3_1| 1) v_~counter~0_1)) InVars {~counter~0=v_~counter~0_2} OutVars{~counter~0=v_~counter~0_1, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post3] {2970#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296))} is VALID [2022-04-07 18:36:54,991 WARN L290 TraceCheckUtils]: 20: Hoare triple {2970#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296))} [113] L43-->L43-2: Formula: (and (<= (mod v_main_~b~0_8 4294967296) (mod v_main_~r~0_6 4294967296)) (= v_main_~q~0_7 (+ v_main_~q~0_8 1)) (= (+ (* (- 1) v_main_~b~0_8) v_main_~r~0_6) v_main_~r~0_5)) InVars {main_~q~0=v_main_~q~0_8, main_~b~0=v_main_~b~0_8, main_~r~0=v_main_~r~0_6} OutVars{main_~q~0=v_main_~q~0_7, main_~b~0=v_main_~b~0_8, main_~r~0=v_main_~r~0_5} AuxVars[] AssignedVars[main_~q~0, main_~r~0] {2970#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296))} is UNKNOWN [2022-04-07 18:36:56,996 WARN L290 TraceCheckUtils]: 19: Hoare triple {2983#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* (div (mod main_~b~0 4294967296) 2) (* main_~q~0 2))) 4294967296))} [109] L39-1-->L43: Formula: (let ((.cse0 (mod v_main_~b~0_7 4294967296))) (and (= (* v_main_~q~0_6 2) v_main_~q~0_5) (= v_main_~b~0_6 (div .cse0 2)) (not (= (mod v_main_~B~0_5 4294967296) .cse0)))) InVars {main_~q~0=v_main_~q~0_6, main_~B~0=v_main_~B~0_5, main_~b~0=v_main_~b~0_7} OutVars{main_~q~0=v_main_~q~0_5, main_~B~0=v_main_~B~0_5, main_~b~0=v_main_~b~0_6} AuxVars[] AssignedVars[main_~q~0, main_~b~0] {2970#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296))} is UNKNOWN [2022-04-07 18:36:56,997 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {2871#true} {2983#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* (div (mod main_~b~0 4294967296) 2) (* main_~q~0 2))) 4294967296))} [117] __VERIFIER_assertEXIT-->L39-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= (ite (= (mod v_main_~A~0_6 4294967296) (mod (+ v_main_~r~0_11 (* v_main_~q~0_10 v_main_~b~0_14)) 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~q~0=v_main_~q~0_10, main_~A~0=v_main_~A~0_6, main_~b~0=v_main_~b~0_14, main_~r~0=v_main_~r~0_11} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {2983#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* (div (mod main_~b~0 4294967296) 2) (* main_~q~0 2))) 4294967296))} is VALID [2022-04-07 18:36:56,997 INFO L290 TraceCheckUtils]: 17: Hoare triple {2871#true} [112] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2871#true} is VALID [2022-04-07 18:36:56,997 INFO L290 TraceCheckUtils]: 16: Hoare triple {2871#true} [107] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_3 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2871#true} is VALID [2022-04-07 18:36:56,997 INFO L290 TraceCheckUtils]: 15: Hoare triple {2871#true} [103] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2871#true} is VALID [2022-04-07 18:36:56,998 INFO L272 TraceCheckUtils]: 14: Hoare triple {2983#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* (div (mod main_~b~0 4294967296) 2) (* main_~q~0 2))) 4294967296))} [104] L39-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~A~0_6 4294967296) (mod (+ v_main_~r~0_11 (* v_main_~q~0_10 v_main_~b~0_14)) 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~q~0=v_main_~q~0_10, main_~A~0=v_main_~A~0_6, main_~b~0=v_main_~b~0_14, main_~r~0=v_main_~r~0_11} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {2871#true} is VALID [2022-04-07 18:36:56,998 INFO L290 TraceCheckUtils]: 13: Hoare triple {2983#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* (div (mod main_~b~0 4294967296) 2) (* main_~q~0 2))) 4294967296))} [99] L38-->L39: Formula: (< |v_main_#t~post3_5| 100) InVars {main_#t~post3=|v_main_#t~post3_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post3] {2983#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* (div (mod main_~b~0 4294967296) 2) (* main_~q~0 2))) 4294967296))} is VALID [2022-04-07 18:36:56,999 INFO L290 TraceCheckUtils]: 12: Hoare triple {2983#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* (div (mod main_~b~0 4294967296) 2) (* main_~q~0 2))) 4294967296))} [94] L43-2-->L38: Formula: (and (= |v_main_#t~post3_1| v_~counter~0_2) (= (+ |v_main_#t~post3_1| 1) v_~counter~0_1)) InVars {~counter~0=v_~counter~0_2} OutVars{~counter~0=v_~counter~0_1, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post3] {2983#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* (div (mod main_~b~0 4294967296) 2) (* main_~q~0 2))) 4294967296))} is VALID [2022-04-07 18:36:56,999 INFO L290 TraceCheckUtils]: 11: Hoare triple {3008#(or (= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* (div (mod main_~b~0 4294967296) 2) (* main_~q~0 2))) 4294967296)) (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296)))} [100] L35-->L43-2: Formula: (not (<= (mod v_main_~b~0_11 4294967296) (mod v_main_~r~0_9 4294967296))) InVars {main_~b~0=v_main_~b~0_11, main_~r~0=v_main_~r~0_9} OutVars{main_~b~0=v_main_~b~0_11, main_~r~0=v_main_~r~0_9} AuxVars[] AssignedVars[] {2983#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* (div (mod main_~b~0 4294967296) 2) (* main_~q~0 2))) 4294967296))} is VALID [2022-04-07 18:36:56,999 INFO L290 TraceCheckUtils]: 10: Hoare triple {3008#(or (= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* (div (mod main_~b~0 4294967296) 2) (* main_~q~0 2))) 4294967296)) (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296)))} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 100) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {3008#(or (= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* (div (mod main_~b~0 4294967296) 2) (* main_~q~0 2))) 4294967296)) (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296)))} is VALID [2022-04-07 18:36:57,000 INFO L290 TraceCheckUtils]: 9: Hoare triple {3008#(or (= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* (div (mod main_~b~0 4294967296) 2) (* main_~q~0 2))) 4294967296)) (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296)))} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {3008#(or (= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* (div (mod main_~b~0 4294967296) 2) (* main_~q~0 2))) 4294967296)) (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296)))} is VALID [2022-04-07 18:36:59,144 WARN L290 TraceCheckUtils]: 8: Hoare triple {3018#(or (= (mod main_~A~0 4294967296) (mod (+ (* (* main_~q~0 2) (div (mod (* main_~b~0 2) 4294967296) 2)) main_~r~0) 4294967296)) (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (<= (mod (* main_~b~0 2) 4294967296) (mod main_~r~0 4294967296)))} [101] L35-->L34-3: Formula: (and (= (* 2 v_main_~b~0_13) v_main_~b~0_12) (<= (mod v_main_~b~0_13 4294967296) (mod v_main_~r~0_10 4294967296))) InVars {main_~b~0=v_main_~b~0_13, main_~r~0=v_main_~r~0_10} OutVars{main_~b~0=v_main_~b~0_12, main_~r~0=v_main_~r~0_10} AuxVars[] AssignedVars[main_~b~0] {3008#(or (= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* (div (mod main_~b~0 4294967296) 2) (* main_~q~0 2))) 4294967296)) (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296)))} is UNKNOWN [2022-04-07 18:36:59,145 INFO L290 TraceCheckUtils]: 7: Hoare triple {3018#(or (= (mod main_~A~0 4294967296) (mod (+ (* (* main_~q~0 2) (div (mod (* main_~b~0 2) 4294967296) 2)) main_~r~0) 4294967296)) (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (<= (mod (* main_~b~0 2) 4294967296) (mod main_~r~0 4294967296)))} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 100) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {3018#(or (= (mod main_~A~0 4294967296) (mod (+ (* (* main_~q~0 2) (div (mod (* main_~b~0 2) 4294967296) 2)) main_~r~0) 4294967296)) (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (<= (mod (* main_~b~0 2) 4294967296) (mod main_~r~0 4294967296)))} is VALID [2022-04-07 18:36:59,146 INFO L290 TraceCheckUtils]: 6: Hoare triple {3018#(or (= (mod main_~A~0 4294967296) (mod (+ (* (* main_~q~0 2) (div (mod (* main_~b~0 2) 4294967296) 2)) main_~r~0) 4294967296)) (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (<= (mod (* main_~b~0 2) 4294967296) (mod main_~r~0 4294967296)))} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {3018#(or (= (mod main_~A~0 4294967296) (mod (+ (* (* main_~q~0 2) (div (mod (* main_~b~0 2) 4294967296) 2)) main_~r~0) 4294967296)) (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (<= (mod (* main_~b~0 2) 4294967296) (mod main_~r~0 4294967296)))} is VALID [2022-04-07 18:36:59,146 INFO L290 TraceCheckUtils]: 5: Hoare triple {2871#true} [89] mainENTRY-->L34-3: Formula: (and (= v_main_~B~0_2 1) (= v_main_~B~0_2 v_main_~b~0_3) (= v_main_~q~0_2 0) (= v_main_~A~0_2 |v_main_#t~nondet1_2|) (= v_main_~A~0_2 v_main_~r~0_2)) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~q~0=v_main_~q~0_2, main_~B~0=v_main_~B~0_2, main_~b~0=v_main_~b~0_3, main_~A~0=v_main_~A~0_2, main_~r~0=v_main_~r~0_2} AuxVars[] AssignedVars[main_~q~0, main_#t~nondet1, main_~B~0, main_~b~0, main_~A~0, main_~r~0] {3018#(or (= (mod main_~A~0 4294967296) (mod (+ (* (* main_~q~0 2) (div (mod (* main_~b~0 2) 4294967296) 2)) main_~r~0) 4294967296)) (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (<= (mod (* main_~b~0 2) 4294967296) (mod main_~r~0 4294967296)))} is VALID [2022-04-07 18:36:59,146 INFO L272 TraceCheckUtils]: 4: Hoare triple {2871#true} [86] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2871#true} is VALID [2022-04-07 18:36:59,146 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2871#true} {2871#true} [115] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2871#true} is VALID [2022-04-07 18:36:59,147 INFO L290 TraceCheckUtils]: 2: Hoare triple {2871#true} [90] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2871#true} is VALID [2022-04-07 18:36:59,147 INFO L290 TraceCheckUtils]: 1: Hoare triple {2871#true} [87] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0) (= v_~counter~0_5 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{~counter~0=v_~counter~0_5, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[~counter~0, #NULL.offset, #NULL.base] {2871#true} is VALID [2022-04-07 18:36:59,147 INFO L272 TraceCheckUtils]: 0: Hoare triple {2871#true} [85] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2871#true} is VALID [2022-04-07 18:36:59,147 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 3 not checked. [2022-04-07 18:36:59,147 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 18:36:59,147 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [92342254] [2022-04-07 18:36:59,147 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-04-07 18:36:59,147 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [380682970] [2022-04-07 18:36:59,148 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [380682970] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 18:36:59,148 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-04-07 18:36:59,148 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 8] total 13 [2022-04-07 18:36:59,148 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1625097986] [2022-04-07 18:36:59,148 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-04-07 18:36:59,148 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 2.6153846153846154) internal successors, (34), 12 states have internal predecessors, (34), 5 states have call successors, (6), 2 states have call predecessors, (6), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Word has length 27 [2022-04-07 18:36:59,149 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 18:36:59,149 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 13 states, 13 states have (on average 2.6153846153846154) internal successors, (34), 12 states have internal predecessors, (34), 5 states have call successors, (6), 2 states have call predecessors, (6), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 18:37:05,389 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 43 edges. 40 inductive. 0 not inductive. 3 times theorem prover too weak to decide inductivity. [2022-04-07 18:37:05,389 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 13 states [2022-04-07 18:37:05,389 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 18:37:05,390 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2022-04-07 18:37:05,390 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=94, Unknown=3, NotChecked=20, Total=156 [2022-04-07 18:37:05,390 INFO L87 Difference]: Start difference. First operand 88 states and 103 transitions. Second operand has 13 states, 13 states have (on average 2.6153846153846154) internal successors, (34), 12 states have internal predecessors, (34), 5 states have call successors, (6), 2 states have call predecessors, (6), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 18:37:18,313 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=true, quantifiers [] [2022-04-07 18:37:20,520 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=true, quantifiers [] [2022-04-07 18:37:24,780 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=true, quantifiers [] [2022-04-07 18:37:26,897 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.12s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=true, quantifiers [] [2022-04-07 18:37:29,042 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.14s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=true, quantifiers [] [2022-04-07 18:37:31,186 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.14s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=true, quantifiers [] [2022-04-07 18:37:33,401 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=true, quantifiers [] [2022-04-07 18:37:40,017 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=true, quantifiers [] [2022-04-07 18:37:42,191 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=true, quantifiers [] [2022-04-07 18:37:44,467 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=true, quantifiers [] [2022-04-07 18:37:50,929 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=true, quantifiers [] [2022-04-07 18:37:59,874 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=true, quantifiers [] [2022-04-07 18:38:02,068 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=true, quantifiers [] [2022-04-07 18:38:04,307 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=true, quantifiers [] [2022-04-07 18:38:08,868 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=true, quantifiers [] [2022-04-07 18:38:11,197 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=true, quantifiers [] [2022-04-07 18:38:15,755 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=true, quantifiers [] [2022-04-07 18:38:17,987 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=true, quantifiers [] [2022-04-07 18:38:22,269 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=true, quantifiers [] [2022-04-07 18:38:24,469 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=true, quantifiers [] [2022-04-07 18:38:24,471 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:38:24,471 INFO L93 Difference]: Finished difference Result 98 states and 112 transitions. [2022-04-07 18:38:24,607 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-04-07 18:38:24,607 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 2.6153846153846154) internal successors, (34), 12 states have internal predecessors, (34), 5 states have call successors, (6), 2 states have call predecessors, (6), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Word has length 27 [2022-04-07 18:38:24,607 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 18:38:24,607 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13 states, 13 states have (on average 2.6153846153846154) internal successors, (34), 12 states have internal predecessors, (34), 5 states have call successors, (6), 2 states have call predecessors, (6), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 18:38:24,609 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 64 transitions. [2022-04-07 18:38:24,609 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13 states, 13 states have (on average 2.6153846153846154) internal successors, (34), 12 states have internal predecessors, (34), 5 states have call successors, (6), 2 states have call predecessors, (6), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 18:38:24,610 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 64 transitions. [2022-04-07 18:38:24,610 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 11 states and 64 transitions. [2022-04-07 18:38:28,809 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 64 edges. 62 inductive. 0 not inductive. 2 times theorem prover too weak to decide inductivity. [2022-04-07 18:38:28,811 INFO L225 Difference]: With dead ends: 98 [2022-04-07 18:38:28,811 INFO L226 Difference]: Without dead ends: 98 [2022-04-07 18:38:28,812 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 57 GetRequests, 41 SyntacticMatches, 3 SemanticMatches, 13 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 34 ImplicationChecksByTransitivity, 17.2s TimeCoverageRelationStatistics Valid=52, Invalid=130, Unknown=4, NotChecked=24, Total=210 [2022-04-07 18:38:28,812 INFO L913 BasicCegarLoop]: 23 mSDtfsCounter, 25 mSDsluCounter, 127 mSDsCounter, 0 mSdLazyCounter, 108 mSolverCounterSat, 11 mSolverCounterUnsat, 20 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 41.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 27 SdHoareTripleChecker+Valid, 150 SdHoareTripleChecker+Invalid, 173 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 11 IncrementalHoareTripleChecker+Valid, 108 IncrementalHoareTripleChecker+Invalid, 20 IncrementalHoareTripleChecker+Unknown, 34 IncrementalHoareTripleChecker+Unchecked, 42.8s IncrementalHoareTripleChecker+Time [2022-04-07 18:38:28,812 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [27 Valid, 150 Invalid, 173 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [11 Valid, 108 Invalid, 20 Unknown, 34 Unchecked, 42.8s Time] [2022-04-07 18:38:28,813 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 98 states. [2022-04-07 18:38:28,815 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 98 to 90. [2022-04-07 18:38:28,815 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 18:38:28,815 INFO L82 GeneralOperation]: Start isEquivalent. First operand 98 states. Second operand has 90 states, 71 states have (on average 1.2112676056338028) internal successors, (86), 74 states have internal predecessors, (86), 10 states have call successors, (10), 9 states have call predecessors, (10), 8 states have return successors, (8), 6 states have call predecessors, (8), 8 states have call successors, (8) [2022-04-07 18:38:28,815 INFO L74 IsIncluded]: Start isIncluded. First operand 98 states. Second operand has 90 states, 71 states have (on average 1.2112676056338028) internal successors, (86), 74 states have internal predecessors, (86), 10 states have call successors, (10), 9 states have call predecessors, (10), 8 states have return successors, (8), 6 states have call predecessors, (8), 8 states have call successors, (8) [2022-04-07 18:38:28,815 INFO L87 Difference]: Start difference. First operand 98 states. Second operand has 90 states, 71 states have (on average 1.2112676056338028) internal successors, (86), 74 states have internal predecessors, (86), 10 states have call successors, (10), 9 states have call predecessors, (10), 8 states have return successors, (8), 6 states have call predecessors, (8), 8 states have call successors, (8) [2022-04-07 18:38:28,817 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:38:28,817 INFO L93 Difference]: Finished difference Result 98 states and 112 transitions. [2022-04-07 18:38:28,818 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 112 transitions. [2022-04-07 18:38:28,818 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 18:38:28,818 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 18:38:28,818 INFO L74 IsIncluded]: Start isIncluded. First operand has 90 states, 71 states have (on average 1.2112676056338028) internal successors, (86), 74 states have internal predecessors, (86), 10 states have call successors, (10), 9 states have call predecessors, (10), 8 states have return successors, (8), 6 states have call predecessors, (8), 8 states have call successors, (8) Second operand 98 states. [2022-04-07 18:38:28,818 INFO L87 Difference]: Start difference. First operand has 90 states, 71 states have (on average 1.2112676056338028) internal successors, (86), 74 states have internal predecessors, (86), 10 states have call successors, (10), 9 states have call predecessors, (10), 8 states have return successors, (8), 6 states have call predecessors, (8), 8 states have call successors, (8) Second operand 98 states. [2022-04-07 18:38:28,825 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:38:28,826 INFO L93 Difference]: Finished difference Result 98 states and 112 transitions. [2022-04-07 18:38:28,826 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 112 transitions. [2022-04-07 18:38:28,826 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 18:38:28,826 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 18:38:28,826 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 18:38:28,826 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 18:38:28,827 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 90 states, 71 states have (on average 1.2112676056338028) internal successors, (86), 74 states have internal predecessors, (86), 10 states have call successors, (10), 9 states have call predecessors, (10), 8 states have return successors, (8), 6 states have call predecessors, (8), 8 states have call successors, (8) [2022-04-07 18:38:28,828 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 90 states to 90 states and 104 transitions. [2022-04-07 18:38:28,828 INFO L78 Accepts]: Start accepts. Automaton has 90 states and 104 transitions. Word has length 27 [2022-04-07 18:38:28,828 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 18:38:28,829 INFO L478 AbstractCegarLoop]: Abstraction has 90 states and 104 transitions. [2022-04-07 18:38:28,829 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 13 states, 13 states have (on average 2.6153846153846154) internal successors, (34), 12 states have internal predecessors, (34), 5 states have call successors, (6), 2 states have call predecessors, (6), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 18:38:28,829 INFO L276 IsEmpty]: Start isEmpty. Operand 90 states and 104 transitions. [2022-04-07 18:38:28,829 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2022-04-07 18:38:28,829 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 18:38:28,829 INFO L499 BasicCegarLoop]: trace histogram [6, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 18:38:28,847 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Ended with exit code 0 [2022-04-07 18:38:29,043 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable9 [2022-04-07 18:38:29,044 INFO L403 AbstractCegarLoop]: === Iteration 11 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 18:38:29,044 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 18:38:29,044 INFO L85 PathProgramCache]: Analyzing trace with hash 1969058547, now seen corresponding path program 2 times [2022-04-07 18:38:29,044 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 18:38:29,044 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [301756353] [2022-04-07 18:38:29,044 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 18:38:29,044 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 18:38:29,058 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-04-07 18:38:29,058 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1113943135] [2022-04-07 18:38:29,058 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-07 18:38:29,058 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 18:38:29,058 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 18:38:29,059 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 18:38:29,060 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2022-04-07 18:38:29,096 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2022-04-07 18:38:29,096 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 18:38:29,097 INFO L263 TraceCheckSpWp]: Trace formula consists of 72 conjuncts, 7 conjunts are in the unsatisfiable core [2022-04-07 18:38:29,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 18:38:29,103 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 18:38:29,292 INFO L272 TraceCheckUtils]: 0: Hoare triple {3435#true} [85] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3435#true} is VALID [2022-04-07 18:38:29,292 INFO L290 TraceCheckUtils]: 1: Hoare triple {3435#true} [87] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0) (= v_~counter~0_5 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{~counter~0=v_~counter~0_5, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[~counter~0, #NULL.offset, #NULL.base] {3435#true} is VALID [2022-04-07 18:38:29,292 INFO L290 TraceCheckUtils]: 2: Hoare triple {3435#true} [90] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3435#true} is VALID [2022-04-07 18:38:29,292 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3435#true} {3435#true} [115] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3435#true} is VALID [2022-04-07 18:38:29,292 INFO L272 TraceCheckUtils]: 4: Hoare triple {3435#true} [86] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3435#true} is VALID [2022-04-07 18:38:29,293 INFO L290 TraceCheckUtils]: 5: Hoare triple {3435#true} [89] mainENTRY-->L34-3: Formula: (and (= v_main_~B~0_2 1) (= v_main_~B~0_2 v_main_~b~0_3) (= v_main_~q~0_2 0) (= v_main_~A~0_2 |v_main_#t~nondet1_2|) (= v_main_~A~0_2 v_main_~r~0_2)) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~q~0=v_main_~q~0_2, main_~B~0=v_main_~B~0_2, main_~b~0=v_main_~b~0_3, main_~A~0=v_main_~A~0_2, main_~r~0=v_main_~r~0_2} AuxVars[] AssignedVars[main_~q~0, main_#t~nondet1, main_~B~0, main_~b~0, main_~A~0, main_~r~0] {3455#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:38:29,293 INFO L290 TraceCheckUtils]: 6: Hoare triple {3455#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {3455#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:38:29,294 INFO L290 TraceCheckUtils]: 7: Hoare triple {3455#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 100) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {3455#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:38:29,295 INFO L290 TraceCheckUtils]: 8: Hoare triple {3455#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} [101] L35-->L34-3: Formula: (and (= (* 2 v_main_~b~0_13) v_main_~b~0_12) (<= (mod v_main_~b~0_13 4294967296) (mod v_main_~r~0_10 4294967296))) InVars {main_~b~0=v_main_~b~0_13, main_~r~0=v_main_~r~0_10} OutVars{main_~b~0=v_main_~b~0_12, main_~r~0=v_main_~r~0_10} AuxVars[] AssignedVars[main_~b~0] {3455#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:38:29,295 INFO L290 TraceCheckUtils]: 9: Hoare triple {3455#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {3455#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:38:29,296 INFO L290 TraceCheckUtils]: 10: Hoare triple {3455#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 100) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {3455#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:38:29,296 INFO L290 TraceCheckUtils]: 11: Hoare triple {3455#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} [101] L35-->L34-3: Formula: (and (= (* 2 v_main_~b~0_13) v_main_~b~0_12) (<= (mod v_main_~b~0_13 4294967296) (mod v_main_~r~0_10 4294967296))) InVars {main_~b~0=v_main_~b~0_13, main_~r~0=v_main_~r~0_10} OutVars{main_~b~0=v_main_~b~0_12, main_~r~0=v_main_~r~0_10} AuxVars[] AssignedVars[main_~b~0] {3455#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:38:29,296 INFO L290 TraceCheckUtils]: 12: Hoare triple {3455#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {3455#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:38:29,297 INFO L290 TraceCheckUtils]: 13: Hoare triple {3455#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 100) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {3455#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:38:29,298 INFO L290 TraceCheckUtils]: 14: Hoare triple {3455#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} [101] L35-->L34-3: Formula: (and (= (* 2 v_main_~b~0_13) v_main_~b~0_12) (<= (mod v_main_~b~0_13 4294967296) (mod v_main_~r~0_10 4294967296))) InVars {main_~b~0=v_main_~b~0_13, main_~r~0=v_main_~r~0_10} OutVars{main_~b~0=v_main_~b~0_12, main_~r~0=v_main_~r~0_10} AuxVars[] AssignedVars[main_~b~0] {3455#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:38:29,298 INFO L290 TraceCheckUtils]: 15: Hoare triple {3455#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {3455#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:38:29,298 INFO L290 TraceCheckUtils]: 16: Hoare triple {3455#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 100) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {3455#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:38:29,299 INFO L290 TraceCheckUtils]: 17: Hoare triple {3455#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} [101] L35-->L34-3: Formula: (and (= (* 2 v_main_~b~0_13) v_main_~b~0_12) (<= (mod v_main_~b~0_13 4294967296) (mod v_main_~r~0_10 4294967296))) InVars {main_~b~0=v_main_~b~0_13, main_~r~0=v_main_~r~0_10} OutVars{main_~b~0=v_main_~b~0_12, main_~r~0=v_main_~r~0_10} AuxVars[] AssignedVars[main_~b~0] {3455#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:38:29,299 INFO L290 TraceCheckUtils]: 18: Hoare triple {3455#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {3455#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:38:29,299 INFO L290 TraceCheckUtils]: 19: Hoare triple {3455#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 100) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {3455#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:38:29,300 INFO L290 TraceCheckUtils]: 20: Hoare triple {3455#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} [101] L35-->L34-3: Formula: (and (= (* 2 v_main_~b~0_13) v_main_~b~0_12) (<= (mod v_main_~b~0_13 4294967296) (mod v_main_~r~0_10 4294967296))) InVars {main_~b~0=v_main_~b~0_13, main_~r~0=v_main_~r~0_10} OutVars{main_~b~0=v_main_~b~0_12, main_~r~0=v_main_~r~0_10} AuxVars[] AssignedVars[main_~b~0] {3455#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:38:29,300 INFO L290 TraceCheckUtils]: 21: Hoare triple {3455#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {3455#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:38:29,301 INFO L290 TraceCheckUtils]: 22: Hoare triple {3455#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} [95] L34-1-->L43-2: Formula: (not (< |v_main_#t~post2_3| 100)) InVars {main_#t~post2=|v_main_#t~post2_3|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {3455#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:38:29,301 INFO L290 TraceCheckUtils]: 23: Hoare triple {3455#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} [94] L43-2-->L38: Formula: (and (= |v_main_#t~post3_1| v_~counter~0_2) (= (+ |v_main_#t~post3_1| 1) v_~counter~0_1)) InVars {~counter~0=v_~counter~0_2} OutVars{~counter~0=v_~counter~0_1, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post3] {3455#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:38:29,301 INFO L290 TraceCheckUtils]: 24: Hoare triple {3455#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} [98] L38-->L38-2: Formula: (not (< |v_main_#t~post3_3| 100)) InVars {main_#t~post3=|v_main_#t~post3_3|} OutVars{} AuxVars[] AssignedVars[main_#t~post3] {3455#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:38:29,302 INFO L272 TraceCheckUtils]: 25: Hoare triple {3455#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} [97] L38-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_2| (ite (= (mod v_main_~A~0_7 4294967296) (mod (+ v_main_~r~0_12 (* v_main_~q~0_11 v_main_~b~0_15)) 4294967296)) 1 0)) InVars {main_~q~0=v_main_~q~0_11, main_~A~0=v_main_~A~0_7, main_~b~0=v_main_~b~0_15, main_~r~0=v_main_~r~0_12} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_2|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {3516#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 18:38:29,302 INFO L290 TraceCheckUtils]: 26: Hoare triple {3516#(<= 1 |__VERIFIER_assert_#in~cond|)} [103] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3520#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 18:38:29,303 INFO L290 TraceCheckUtils]: 27: Hoare triple {3520#(<= 1 __VERIFIER_assert_~cond)} [106] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3436#false} is VALID [2022-04-07 18:38:29,303 INFO L290 TraceCheckUtils]: 28: Hoare triple {3436#false} [110] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3436#false} is VALID [2022-04-07 18:38:29,303 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2022-04-07 18:38:29,303 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-07 18:38:29,303 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 18:38:29,303 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [301756353] [2022-04-07 18:38:29,303 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-04-07 18:38:29,303 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1113943135] [2022-04-07 18:38:29,304 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1113943135] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 18:38:29,304 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 18:38:29,304 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-04-07 18:38:29,304 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [608538675] [2022-04-07 18:38:29,304 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 18:38:29,304 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 2.4) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-07 18:38:29,304 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 18:38:29,304 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 2.4) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:38:29,360 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 16 edges. 16 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 18:38:29,360 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-04-07 18:38:29,360 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 18:38:29,361 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-04-07 18:38:29,361 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-04-07 18:38:29,361 INFO L87 Difference]: Start difference. First operand 90 states and 104 transitions. Second operand has 5 states, 5 states have (on average 2.4) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:38:29,771 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:38:29,771 INFO L93 Difference]: Finished difference Result 111 states and 128 transitions. [2022-04-07 18:38:29,771 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-04-07 18:38:29,771 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 2.4) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-07 18:38:29,772 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 18:38:29,772 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 2.4) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:38:29,772 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 38 transitions. [2022-04-07 18:38:29,772 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 2.4) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:38:29,773 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 38 transitions. [2022-04-07 18:38:29,773 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 5 states and 38 transitions. [2022-04-07 18:38:29,906 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 38 edges. 38 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 18:38:29,907 INFO L225 Difference]: With dead ends: 111 [2022-04-07 18:38:29,907 INFO L226 Difference]: Without dead ends: 110 [2022-04-07 18:38:29,907 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 25 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2022-04-07 18:38:29,908 INFO L913 BasicCegarLoop]: 18 mSDtfsCounter, 8 mSDsluCounter, 44 mSDsCounter, 0 mSdLazyCounter, 35 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 9 SdHoareTripleChecker+Valid, 62 SdHoareTripleChecker+Invalid, 37 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 35 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-07 18:38:29,908 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [9 Valid, 62 Invalid, 37 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 35 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-07 18:38:29,908 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 110 states. [2022-04-07 18:38:29,911 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 110 to 96. [2022-04-07 18:38:29,911 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 18:38:29,911 INFO L82 GeneralOperation]: Start isEquivalent. First operand 110 states. Second operand has 96 states, 75 states have (on average 1.1866666666666668) internal successors, (89), 77 states have internal predecessors, (89), 11 states have call successors, (11), 10 states have call predecessors, (11), 9 states have return successors, (9), 8 states have call predecessors, (9), 9 states have call successors, (9) [2022-04-07 18:38:29,911 INFO L74 IsIncluded]: Start isIncluded. First operand 110 states. Second operand has 96 states, 75 states have (on average 1.1866666666666668) internal successors, (89), 77 states have internal predecessors, (89), 11 states have call successors, (11), 10 states have call predecessors, (11), 9 states have return successors, (9), 8 states have call predecessors, (9), 9 states have call successors, (9) [2022-04-07 18:38:29,911 INFO L87 Difference]: Start difference. First operand 110 states. Second operand has 96 states, 75 states have (on average 1.1866666666666668) internal successors, (89), 77 states have internal predecessors, (89), 11 states have call successors, (11), 10 states have call predecessors, (11), 9 states have return successors, (9), 8 states have call predecessors, (9), 9 states have call successors, (9) [2022-04-07 18:38:29,913 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:38:29,913 INFO L93 Difference]: Finished difference Result 110 states and 125 transitions. [2022-04-07 18:38:29,913 INFO L276 IsEmpty]: Start isEmpty. Operand 110 states and 125 transitions. [2022-04-07 18:38:29,913 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 18:38:29,913 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 18:38:29,913 INFO L74 IsIncluded]: Start isIncluded. First operand has 96 states, 75 states have (on average 1.1866666666666668) internal successors, (89), 77 states have internal predecessors, (89), 11 states have call successors, (11), 10 states have call predecessors, (11), 9 states have return successors, (9), 8 states have call predecessors, (9), 9 states have call successors, (9) Second operand 110 states. [2022-04-07 18:38:29,914 INFO L87 Difference]: Start difference. First operand has 96 states, 75 states have (on average 1.1866666666666668) internal successors, (89), 77 states have internal predecessors, (89), 11 states have call successors, (11), 10 states have call predecessors, (11), 9 states have return successors, (9), 8 states have call predecessors, (9), 9 states have call successors, (9) Second operand 110 states. [2022-04-07 18:38:29,915 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:38:29,915 INFO L93 Difference]: Finished difference Result 110 states and 125 transitions. [2022-04-07 18:38:29,915 INFO L276 IsEmpty]: Start isEmpty. Operand 110 states and 125 transitions. [2022-04-07 18:38:29,915 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 18:38:29,915 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 18:38:29,915 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 18:38:29,915 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 18:38:29,916 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 96 states, 75 states have (on average 1.1866666666666668) internal successors, (89), 77 states have internal predecessors, (89), 11 states have call successors, (11), 10 states have call predecessors, (11), 9 states have return successors, (9), 8 states have call predecessors, (9), 9 states have call successors, (9) [2022-04-07 18:38:29,917 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 96 states to 96 states and 109 transitions. [2022-04-07 18:38:29,917 INFO L78 Accepts]: Start accepts. Automaton has 96 states and 109 transitions. Word has length 29 [2022-04-07 18:38:29,917 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 18:38:29,917 INFO L478 AbstractCegarLoop]: Abstraction has 96 states and 109 transitions. [2022-04-07 18:38:29,917 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 2.4) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:38:29,917 INFO L276 IsEmpty]: Start isEmpty. Operand 96 states and 109 transitions. [2022-04-07 18:38:29,917 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2022-04-07 18:38:29,917 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 18:38:29,917 INFO L499 BasicCegarLoop]: trace histogram [4, 4, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 18:38:29,934 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Ended with exit code 0 [2022-04-07 18:38:30,134 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10,10 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 18:38:30,135 INFO L403 AbstractCegarLoop]: === Iteration 12 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 18:38:30,135 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 18:38:30,135 INFO L85 PathProgramCache]: Analyzing trace with hash 1849486682, now seen corresponding path program 2 times [2022-04-07 18:38:30,135 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 18:38:30,135 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [459706105] [2022-04-07 18:38:30,135 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 18:38:30,135 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 18:38:30,155 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-04-07 18:38:30,156 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [2009095570] [2022-04-07 18:38:30,156 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-07 18:38:30,156 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 18:38:30,156 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 18:38:30,166 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 18:38:30,170 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process