/usr/bin/java -ea -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --core.log.level.for.class de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN -tc ../../../trunk/examples/toolchains/AutomizerCTransformed.xml -s ../../../trunk/examples/settings/automizer/LoopAccelerationJordanC.epf -i ../../../trunk/examples/svcomp/nla-digbench-scaling/divbin2_unwindbound5.i -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-34549b5 [2022-04-07 18:47:12,920 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-04-07 18:47:12,921 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-04-07 18:47:12,948 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-04-07 18:47:12,949 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-04-07 18:47:12,951 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-04-07 18:47:12,954 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-04-07 18:47:12,958 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-04-07 18:47:12,960 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-04-07 18:47:12,975 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-04-07 18:47:12,975 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-04-07 18:47:12,977 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-04-07 18:47:12,977 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-04-07 18:47:12,979 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-04-07 18:47:12,979 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-04-07 18:47:12,980 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-04-07 18:47:12,981 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-04-07 18:47:12,981 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-04-07 18:47:12,984 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-04-07 18:47:12,988 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-04-07 18:47:12,989 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-04-07 18:47:12,990 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-04-07 18:47:12,991 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-04-07 18:47:12,991 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-04-07 18:47:12,992 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-04-07 18:47:12,997 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2022-04-07 18:47:13,003 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-04-07 18:47:13,003 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-04-07 18:47:13,004 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-04-07 18:47:13,005 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/automizer/LoopAccelerationJordanC.epf [2022-04-07 18:47:13,018 INFO L113 SettingsManager]: Loading preferences was successful [2022-04-07 18:47:13,018 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-04-07 18:47:13,019 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-04-07 18:47:13,019 INFO L138 SettingsManager]: * sizeof long=4 [2022-04-07 18:47:13,019 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-04-07 18:47:13,019 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-04-07 18:47:13,019 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-04-07 18:47:13,019 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-04-07 18:47:13,019 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-04-07 18:47:13,020 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-04-07 18:47:13,020 INFO L138 SettingsManager]: * sizeof long double=12 [2022-04-07 18:47:13,021 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-04-07 18:47:13,021 INFO L138 SettingsManager]: * Use constant arrays=true [2022-04-07 18:47:13,021 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-04-07 18:47:13,021 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-04-07 18:47:13,021 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-04-07 18:47:13,021 INFO L138 SettingsManager]: * To the following directory=./dump/ [2022-04-07 18:47:13,021 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-04-07 18:47:13,021 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-07 18:47:13,022 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-04-07 18:47:13,022 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-04-07 18:47:13,022 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-04-07 18:47:13,022 INFO L138 SettingsManager]: * TransformationType=LOOP_ACCELERATION_JORDAN WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.core: Log level for class -> de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN; [2022-04-07 18:47:13,206 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-04-07 18:47:13,222 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-04-07 18:47:13,224 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-04-07 18:47:13,225 INFO L271 PluginConnector]: Initializing CDTParser... [2022-04-07 18:47:13,225 INFO L275 PluginConnector]: CDTParser initialized [2022-04-07 18:47:13,226 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/nla-digbench-scaling/divbin2_unwindbound5.i [2022-04-07 18:47:13,275 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/6b3267cb7/6a8f0aeb764347fbb2ab247f44f791ec/FLAGa85293bde [2022-04-07 18:47:13,677 INFO L306 CDTParser]: Found 1 translation units. [2022-04-07 18:47:13,677 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/nla-digbench-scaling/divbin2_unwindbound5.i [2022-04-07 18:47:13,689 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/6b3267cb7/6a8f0aeb764347fbb2ab247f44f791ec/FLAGa85293bde [2022-04-07 18:47:13,703 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/6b3267cb7/6a8f0aeb764347fbb2ab247f44f791ec [2022-04-07 18:47:13,705 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-04-07 18:47:13,706 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2022-04-07 18:47:13,717 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-04-07 18:47:13,717 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-04-07 18:47:13,720 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-04-07 18:47:13,724 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.04 06:47:13" (1/1) ... [2022-04-07 18:47:13,725 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6c9aee15 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 06:47:13, skipping insertion in model container [2022-04-07 18:47:13,725 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.04 06:47:13" (1/1) ... [2022-04-07 18:47:13,738 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-04-07 18:47:13,749 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-04-07 18:47:13,865 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/nla-digbench-scaling/divbin2_unwindbound5.i[951,964] [2022-04-07 18:47:13,903 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-07 18:47:13,910 INFO L203 MainTranslator]: Completed pre-run [2022-04-07 18:47:13,930 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/nla-digbench-scaling/divbin2_unwindbound5.i[951,964] [2022-04-07 18:47:13,934 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-07 18:47:13,950 INFO L208 MainTranslator]: Completed translation [2022-04-07 18:47:13,950 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 06:47:13 WrapperNode [2022-04-07 18:47:13,950 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-04-07 18:47:13,951 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-04-07 18:47:13,951 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-04-07 18:47:13,951 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-04-07 18:47:13,958 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 06:47:13" (1/1) ... [2022-04-07 18:47:13,959 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 06:47:13" (1/1) ... [2022-04-07 18:47:13,963 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 06:47:13" (1/1) ... [2022-04-07 18:47:13,963 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 06:47:13" (1/1) ... [2022-04-07 18:47:13,968 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 06:47:13" (1/1) ... [2022-04-07 18:47:13,971 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 06:47:13" (1/1) ... [2022-04-07 18:47:13,972 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 06:47:13" (1/1) ... [2022-04-07 18:47:13,974 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-04-07 18:47:13,975 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-04-07 18:47:13,975 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-04-07 18:47:13,975 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-04-07 18:47:13,976 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 06:47:13" (1/1) ... [2022-04-07 18:47:13,982 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-07 18:47:13,989 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 18:47:13,999 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-04-07 18:47:14,001 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-04-07 18:47:14,030 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2022-04-07 18:47:14,031 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-04-07 18:47:14,031 INFO L138 BoogieDeclarations]: Found implementation of procedure reach_error [2022-04-07 18:47:14,031 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2022-04-07 18:47:14,031 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2022-04-07 18:47:14,031 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2022-04-07 18:47:14,031 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2022-04-07 18:47:14,031 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_fail [2022-04-07 18:47:14,031 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_perror_fail [2022-04-07 18:47:14,031 INFO L130 BoogieDeclarations]: Found specification of procedure __assert [2022-04-07 18:47:14,031 INFO L130 BoogieDeclarations]: Found specification of procedure reach_error [2022-04-07 18:47:14,031 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-04-07 18:47:14,032 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_uint [2022-04-07 18:47:14,032 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2022-04-07 18:47:14,032 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2022-04-07 18:47:14,032 INFO L130 BoogieDeclarations]: Found specification of procedure main [2022-04-07 18:47:14,032 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2022-04-07 18:47:14,032 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-04-07 18:47:14,032 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-04-07 18:47:14,032 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-04-07 18:47:14,032 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-04-07 18:47:14,032 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-04-07 18:47:14,077 INFO L234 CfgBuilder]: Building ICFG [2022-04-07 18:47:14,078 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-04-07 18:47:14,175 INFO L275 CfgBuilder]: Performing block encoding [2022-04-07 18:47:14,180 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-04-07 18:47:14,180 INFO L299 CfgBuilder]: Removed 2 assume(true) statements. [2022-04-07 18:47:14,181 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.04 06:47:14 BoogieIcfgContainer [2022-04-07 18:47:14,181 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-04-07 18:47:14,182 INFO L113 PluginConnector]: ------------------------IcfgTransformer---------------------------- [2022-04-07 18:47:14,182 INFO L271 PluginConnector]: Initializing IcfgTransformer... [2022-04-07 18:47:14,182 INFO L275 PluginConnector]: IcfgTransformer initialized [2022-04-07 18:47:14,185 INFO L185 PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.04 06:47:14" (1/1) ... [2022-04-07 18:47:14,186 INFO L168 ansformationObserver]: Applying ICFG transformation LOOP_ACCELERATION_JORDAN [2022-04-07 18:47:14,203 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 07.04 06:47:14 BasicIcfg [2022-04-07 18:47:14,203 INFO L132 PluginConnector]: ------------------------ END IcfgTransformer---------------------------- [2022-04-07 18:47:14,204 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-04-07 18:47:14,204 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-04-07 18:47:14,220 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-04-07 18:47:14,221 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.04 06:47:13" (1/4) ... [2022-04-07 18:47:14,221 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@70f72dd2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.04 06:47:14, skipping insertion in model container [2022-04-07 18:47:14,221 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 06:47:13" (2/4) ... [2022-04-07 18:47:14,221 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@70f72dd2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.04 06:47:14, skipping insertion in model container [2022-04-07 18:47:14,221 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.04 06:47:14" (3/4) ... [2022-04-07 18:47:14,222 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@70f72dd2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.04 06:47:14, skipping insertion in model container [2022-04-07 18:47:14,222 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 07.04 06:47:14" (4/4) ... [2022-04-07 18:47:14,222 INFO L111 eAbstractionObserver]: Analyzing ICFG divbin2_unwindbound5.iJordan [2022-04-07 18:47:14,226 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:ForwardPredicates Determinization: PREDICATE_ABSTRACTION [2022-04-07 18:47:14,226 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-04-07 18:47:14,252 INFO L339 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-04-07 18:47:14,256 INFO L340 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=ForwardPredicates, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=false, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=All, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP [2022-04-07 18:47:14,257 INFO L341 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-04-07 18:47:14,267 INFO L276 IsEmpty]: Start isEmpty. Operand has 26 states, 17 states have (on average 1.5294117647058822) internal successors, (26), 18 states have internal predecessors, (26), 4 states have call successors, (4), 3 states have call predecessors, (4), 3 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-07 18:47:14,272 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2022-04-07 18:47:14,272 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 18:47:14,272 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 18:47:14,278 INFO L403 AbstractCegarLoop]: === Iteration 1 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 18:47:14,281 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 18:47:14,281 INFO L85 PathProgramCache]: Analyzing trace with hash 2097950667, now seen corresponding path program 1 times [2022-04-07 18:47:14,287 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 18:47:14,288 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1429530563] [2022-04-07 18:47:14,288 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 18:47:14,288 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 18:47:14,361 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 18:47:14,415 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 18:47:14,420 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 18:47:14,446 INFO L290 TraceCheckUtils]: 0: Hoare triple {34#(and (= ~counter~0 |old(~counter~0)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [87] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0) (= v_~counter~0_5 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{~counter~0=v_~counter~0_5, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[~counter~0, #NULL.offset, #NULL.base] {29#true} is VALID [2022-04-07 18:47:14,446 INFO L290 TraceCheckUtils]: 1: Hoare triple {29#true} [90] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {29#true} is VALID [2022-04-07 18:47:14,446 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {29#true} {29#true} [115] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {29#true} is VALID [2022-04-07 18:47:14,448 INFO L272 TraceCheckUtils]: 0: Hoare triple {29#true} [85] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {34#(and (= ~counter~0 |old(~counter~0)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 18:47:14,449 INFO L290 TraceCheckUtils]: 1: Hoare triple {34#(and (= ~counter~0 |old(~counter~0)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [87] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0) (= v_~counter~0_5 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{~counter~0=v_~counter~0_5, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[~counter~0, #NULL.offset, #NULL.base] {29#true} is VALID [2022-04-07 18:47:14,449 INFO L290 TraceCheckUtils]: 2: Hoare triple {29#true} [90] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {29#true} is VALID [2022-04-07 18:47:14,449 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {29#true} {29#true} [115] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {29#true} is VALID [2022-04-07 18:47:14,450 INFO L272 TraceCheckUtils]: 4: Hoare triple {29#true} [86] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {29#true} is VALID [2022-04-07 18:47:14,450 INFO L290 TraceCheckUtils]: 5: Hoare triple {29#true} [89] mainENTRY-->L34-3: Formula: (and (= v_main_~B~0_2 1) (= v_main_~B~0_2 v_main_~b~0_3) (= v_main_~q~0_2 0) (= v_main_~A~0_2 |v_main_#t~nondet1_2|) (= v_main_~A~0_2 v_main_~r~0_2)) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~q~0=v_main_~q~0_2, main_~B~0=v_main_~B~0_2, main_~b~0=v_main_~b~0_3, main_~A~0=v_main_~A~0_2, main_~r~0=v_main_~r~0_2} AuxVars[] AssignedVars[main_~q~0, main_#t~nondet1, main_~B~0, main_~b~0, main_~A~0, main_~r~0] {29#true} is VALID [2022-04-07 18:47:14,451 INFO L290 TraceCheckUtils]: 6: Hoare triple {29#true} [91] L34-3-->L43-2: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {30#false} is VALID [2022-04-07 18:47:14,451 INFO L290 TraceCheckUtils]: 7: Hoare triple {30#false} [93] L43-2-->L38-2: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {30#false} is VALID [2022-04-07 18:47:14,451 INFO L272 TraceCheckUtils]: 8: Hoare triple {30#false} [97] L38-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_2| (ite (= (mod v_main_~A~0_7 4294967296) (mod (+ v_main_~r~0_12 (* v_main_~q~0_11 v_main_~b~0_15)) 4294967296)) 1 0)) InVars {main_~q~0=v_main_~q~0_11, main_~A~0=v_main_~A~0_7, main_~b~0=v_main_~b~0_15, main_~r~0=v_main_~r~0_12} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_2|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {30#false} is VALID [2022-04-07 18:47:14,452 INFO L290 TraceCheckUtils]: 9: Hoare triple {30#false} [103] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {30#false} is VALID [2022-04-07 18:47:14,452 INFO L290 TraceCheckUtils]: 10: Hoare triple {30#false} [106] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {30#false} is VALID [2022-04-07 18:47:14,452 INFO L290 TraceCheckUtils]: 11: Hoare triple {30#false} [110] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30#false} is VALID [2022-04-07 18:47:14,453 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 18:47:14,453 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 18:47:14,453 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1429530563] [2022-04-07 18:47:14,454 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1429530563] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 18:47:14,454 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 18:47:14,454 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-07 18:47:14,455 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1070130811] [2022-04-07 18:47:14,456 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 18:47:14,460 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 2.6666666666666665) internal successors, (8), 2 states have internal predecessors, (8), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 12 [2022-04-07 18:47:14,461 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 18:47:14,464 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 2.6666666666666665) internal successors, (8), 2 states have internal predecessors, (8), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:47:14,482 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 12 edges. 12 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 18:47:14,482 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-07 18:47:14,483 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 18:47:14,509 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-07 18:47:14,511 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-07 18:47:14,514 INFO L87 Difference]: Start difference. First operand has 26 states, 17 states have (on average 1.5294117647058822) internal successors, (26), 18 states have internal predecessors, (26), 4 states have call successors, (4), 3 states have call predecessors, (4), 3 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) Second operand has 3 states, 3 states have (on average 2.6666666666666665) internal successors, (8), 2 states have internal predecessors, (8), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:47:14,672 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:47:14,672 INFO L93 Difference]: Finished difference Result 27 states and 32 transitions. [2022-04-07 18:47:14,672 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-07 18:47:14,673 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 2.6666666666666665) internal successors, (8), 2 states have internal predecessors, (8), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 12 [2022-04-07 18:47:14,673 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 18:47:14,673 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 2.6666666666666665) internal successors, (8), 2 states have internal predecessors, (8), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:47:14,678 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 36 transitions. [2022-04-07 18:47:14,678 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 2.6666666666666665) internal successors, (8), 2 states have internal predecessors, (8), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:47:14,692 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 36 transitions. [2022-04-07 18:47:14,692 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 36 transitions. [2022-04-07 18:47:14,728 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 36 edges. 36 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 18:47:14,737 INFO L225 Difference]: With dead ends: 27 [2022-04-07 18:47:14,737 INFO L226 Difference]: Without dead ends: 22 [2022-04-07 18:47:14,741 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-07 18:47:14,744 INFO L913 BasicCegarLoop]: 30 mSDtfsCounter, 6 mSDsluCounter, 4 mSDsCounter, 0 mSdLazyCounter, 18 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 34 SdHoareTripleChecker+Invalid, 21 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 18 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 18:47:14,744 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [6 Valid, 34 Invalid, 21 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 18 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 18:47:14,755 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2022-04-07 18:47:14,766 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 21. [2022-04-07 18:47:14,766 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 18:47:14,766 INFO L82 GeneralOperation]: Start isEquivalent. First operand 22 states. Second operand has 21 states, 14 states have (on average 1.4285714285714286) internal successors, (20), 15 states have internal predecessors, (20), 4 states have call successors, (4), 3 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 18:47:14,767 INFO L74 IsIncluded]: Start isIncluded. First operand 22 states. Second operand has 21 states, 14 states have (on average 1.4285714285714286) internal successors, (20), 15 states have internal predecessors, (20), 4 states have call successors, (4), 3 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 18:47:14,767 INFO L87 Difference]: Start difference. First operand 22 states. Second operand has 21 states, 14 states have (on average 1.4285714285714286) internal successors, (20), 15 states have internal predecessors, (20), 4 states have call successors, (4), 3 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 18:47:14,773 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:47:14,774 INFO L93 Difference]: Finished difference Result 22 states and 27 transitions. [2022-04-07 18:47:14,774 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 27 transitions. [2022-04-07 18:47:14,774 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 18:47:14,774 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 18:47:14,774 INFO L74 IsIncluded]: Start isIncluded. First operand has 21 states, 14 states have (on average 1.4285714285714286) internal successors, (20), 15 states have internal predecessors, (20), 4 states have call successors, (4), 3 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 22 states. [2022-04-07 18:47:14,775 INFO L87 Difference]: Start difference. First operand has 21 states, 14 states have (on average 1.4285714285714286) internal successors, (20), 15 states have internal predecessors, (20), 4 states have call successors, (4), 3 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 22 states. [2022-04-07 18:47:14,778 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:47:14,778 INFO L93 Difference]: Finished difference Result 22 states and 27 transitions. [2022-04-07 18:47:14,778 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 27 transitions. [2022-04-07 18:47:14,778 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 18:47:14,779 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 18:47:14,779 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 18:47:14,779 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 18:47:14,779 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 14 states have (on average 1.4285714285714286) internal successors, (20), 15 states have internal predecessors, (20), 4 states have call successors, (4), 3 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 18:47:14,782 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 26 transitions. [2022-04-07 18:47:14,786 INFO L78 Accepts]: Start accepts. Automaton has 21 states and 26 transitions. Word has length 12 [2022-04-07 18:47:14,786 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 18:47:14,786 INFO L478 AbstractCegarLoop]: Abstraction has 21 states and 26 transitions. [2022-04-07 18:47:14,786 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 2.6666666666666665) internal successors, (8), 2 states have internal predecessors, (8), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:47:14,786 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 26 transitions. [2022-04-07 18:47:14,787 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2022-04-07 18:47:14,787 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 18:47:14,787 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 18:47:14,787 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-04-07 18:47:14,787 INFO L403 AbstractCegarLoop]: === Iteration 2 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 18:47:14,788 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 18:47:14,788 INFO L85 PathProgramCache]: Analyzing trace with hash 923003056, now seen corresponding path program 1 times [2022-04-07 18:47:14,788 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 18:47:14,788 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1210221577] [2022-04-07 18:47:14,789 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 18:47:14,789 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 18:47:14,818 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 18:47:14,887 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 18:47:14,892 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 18:47:14,902 INFO L290 TraceCheckUtils]: 0: Hoare triple {136#(and (= ~counter~0 |old(~counter~0)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [87] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0) (= v_~counter~0_5 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{~counter~0=v_~counter~0_5, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[~counter~0, #NULL.offset, #NULL.base] {134#(<= ~counter~0 0)} is VALID [2022-04-07 18:47:14,903 INFO L290 TraceCheckUtils]: 1: Hoare triple {134#(<= ~counter~0 0)} [90] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {134#(<= ~counter~0 0)} is VALID [2022-04-07 18:47:14,905 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {134#(<= ~counter~0 0)} {129#true} [115] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {134#(<= ~counter~0 0)} is VALID [2022-04-07 18:47:14,906 INFO L272 TraceCheckUtils]: 0: Hoare triple {129#true} [85] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {136#(and (= ~counter~0 |old(~counter~0)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 18:47:14,910 INFO L290 TraceCheckUtils]: 1: Hoare triple {136#(and (= ~counter~0 |old(~counter~0)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [87] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0) (= v_~counter~0_5 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{~counter~0=v_~counter~0_5, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[~counter~0, #NULL.offset, #NULL.base] {134#(<= ~counter~0 0)} is VALID [2022-04-07 18:47:14,911 INFO L290 TraceCheckUtils]: 2: Hoare triple {134#(<= ~counter~0 0)} [90] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {134#(<= ~counter~0 0)} is VALID [2022-04-07 18:47:14,912 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {134#(<= ~counter~0 0)} {129#true} [115] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {134#(<= ~counter~0 0)} is VALID [2022-04-07 18:47:14,913 INFO L272 TraceCheckUtils]: 4: Hoare triple {134#(<= ~counter~0 0)} [86] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {134#(<= ~counter~0 0)} is VALID [2022-04-07 18:47:14,913 INFO L290 TraceCheckUtils]: 5: Hoare triple {134#(<= ~counter~0 0)} [89] mainENTRY-->L34-3: Formula: (and (= v_main_~B~0_2 1) (= v_main_~B~0_2 v_main_~b~0_3) (= v_main_~q~0_2 0) (= v_main_~A~0_2 |v_main_#t~nondet1_2|) (= v_main_~A~0_2 v_main_~r~0_2)) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~q~0=v_main_~q~0_2, main_~B~0=v_main_~B~0_2, main_~b~0=v_main_~b~0_3, main_~A~0=v_main_~A~0_2, main_~r~0=v_main_~r~0_2} AuxVars[] AssignedVars[main_~q~0, main_#t~nondet1, main_~B~0, main_~b~0, main_~A~0, main_~r~0] {134#(<= ~counter~0 0)} is VALID [2022-04-07 18:47:14,914 INFO L290 TraceCheckUtils]: 6: Hoare triple {134#(<= ~counter~0 0)} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {135#(<= |main_#t~post2| 0)} is VALID [2022-04-07 18:47:14,914 INFO L290 TraceCheckUtils]: 7: Hoare triple {135#(<= |main_#t~post2| 0)} [95] L34-1-->L43-2: Formula: (not (< |v_main_#t~post2_3| 5)) InVars {main_#t~post2=|v_main_#t~post2_3|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {130#false} is VALID [2022-04-07 18:47:14,914 INFO L290 TraceCheckUtils]: 8: Hoare triple {130#false} [94] L43-2-->L38: Formula: (and (= |v_main_#t~post3_1| v_~counter~0_2) (= (+ |v_main_#t~post3_1| 1) v_~counter~0_1)) InVars {~counter~0=v_~counter~0_2} OutVars{~counter~0=v_~counter~0_1, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post3] {130#false} is VALID [2022-04-07 18:47:14,915 INFO L290 TraceCheckUtils]: 9: Hoare triple {130#false} [98] L38-->L38-2: Formula: (not (< |v_main_#t~post3_3| 5)) InVars {main_#t~post3=|v_main_#t~post3_3|} OutVars{} AuxVars[] AssignedVars[main_#t~post3] {130#false} is VALID [2022-04-07 18:47:14,915 INFO L272 TraceCheckUtils]: 10: Hoare triple {130#false} [97] L38-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_2| (ite (= (mod v_main_~A~0_7 4294967296) (mod (+ v_main_~r~0_12 (* v_main_~q~0_11 v_main_~b~0_15)) 4294967296)) 1 0)) InVars {main_~q~0=v_main_~q~0_11, main_~A~0=v_main_~A~0_7, main_~b~0=v_main_~b~0_15, main_~r~0=v_main_~r~0_12} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_2|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {130#false} is VALID [2022-04-07 18:47:14,915 INFO L290 TraceCheckUtils]: 11: Hoare triple {130#false} [103] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {130#false} is VALID [2022-04-07 18:47:14,916 INFO L290 TraceCheckUtils]: 12: Hoare triple {130#false} [106] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {130#false} is VALID [2022-04-07 18:47:14,916 INFO L290 TraceCheckUtils]: 13: Hoare triple {130#false} [110] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {130#false} is VALID [2022-04-07 18:47:14,916 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 18:47:14,917 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 18:47:14,917 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1210221577] [2022-04-07 18:47:14,917 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1210221577] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 18:47:14,917 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 18:47:14,918 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-07 18:47:14,918 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [772067321] [2022-04-07 18:47:14,918 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 18:47:14,919 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 4 states have (on average 2.5) internal successors, (10), 3 states have internal predecessors, (10), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 14 [2022-04-07 18:47:14,920 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 18:47:14,920 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 5 states, 4 states have (on average 2.5) internal successors, (10), 3 states have internal predecessors, (10), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:47:14,934 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 14 edges. 14 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 18:47:14,935 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-04-07 18:47:14,935 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 18:47:14,935 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-04-07 18:47:14,936 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-04-07 18:47:14,937 INFO L87 Difference]: Start difference. First operand 21 states and 26 transitions. Second operand has 5 states, 4 states have (on average 2.5) internal successors, (10), 3 states have internal predecessors, (10), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:47:15,068 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:47:15,068 INFO L93 Difference]: Finished difference Result 23 states and 28 transitions. [2022-04-07 18:47:15,068 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-04-07 18:47:15,069 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 4 states have (on average 2.5) internal successors, (10), 3 states have internal predecessors, (10), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 14 [2022-04-07 18:47:15,069 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 18:47:15,070 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 4 states have (on average 2.5) internal successors, (10), 3 states have internal predecessors, (10), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:47:15,072 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 29 transitions. [2022-04-07 18:47:15,073 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 4 states have (on average 2.5) internal successors, (10), 3 states have internal predecessors, (10), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:47:15,075 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 29 transitions. [2022-04-07 18:47:15,075 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 6 states and 29 transitions. [2022-04-07 18:47:15,101 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 29 edges. 29 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 18:47:15,103 INFO L225 Difference]: With dead ends: 23 [2022-04-07 18:47:15,103 INFO L226 Difference]: Without dead ends: 23 [2022-04-07 18:47:15,106 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2022-04-07 18:47:15,109 INFO L913 BasicCegarLoop]: 24 mSDtfsCounter, 6 mSDsluCounter, 29 mSDsCounter, 0 mSdLazyCounter, 36 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 53 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 36 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 18:47:15,109 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [6 Valid, 53 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 36 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 18:47:15,111 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states. [2022-04-07 18:47:15,114 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 23. [2022-04-07 18:47:15,114 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 18:47:15,114 INFO L82 GeneralOperation]: Start isEquivalent. First operand 23 states. Second operand has 23 states, 16 states have (on average 1.375) internal successors, (22), 17 states have internal predecessors, (22), 4 states have call successors, (4), 3 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 18:47:15,115 INFO L74 IsIncluded]: Start isIncluded. First operand 23 states. Second operand has 23 states, 16 states have (on average 1.375) internal successors, (22), 17 states have internal predecessors, (22), 4 states have call successors, (4), 3 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 18:47:15,115 INFO L87 Difference]: Start difference. First operand 23 states. Second operand has 23 states, 16 states have (on average 1.375) internal successors, (22), 17 states have internal predecessors, (22), 4 states have call successors, (4), 3 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 18:47:15,117 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:47:15,117 INFO L93 Difference]: Finished difference Result 23 states and 28 transitions. [2022-04-07 18:47:15,117 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 28 transitions. [2022-04-07 18:47:15,118 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 18:47:15,118 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 18:47:15,118 INFO L74 IsIncluded]: Start isIncluded. First operand has 23 states, 16 states have (on average 1.375) internal successors, (22), 17 states have internal predecessors, (22), 4 states have call successors, (4), 3 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 23 states. [2022-04-07 18:47:15,119 INFO L87 Difference]: Start difference. First operand has 23 states, 16 states have (on average 1.375) internal successors, (22), 17 states have internal predecessors, (22), 4 states have call successors, (4), 3 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 23 states. [2022-04-07 18:47:15,121 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:47:15,122 INFO L93 Difference]: Finished difference Result 23 states and 28 transitions. [2022-04-07 18:47:15,122 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 28 transitions. [2022-04-07 18:47:15,122 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 18:47:15,123 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 18:47:15,123 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 18:47:15,123 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 18:47:15,125 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 16 states have (on average 1.375) internal successors, (22), 17 states have internal predecessors, (22), 4 states have call successors, (4), 3 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 18:47:15,127 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 28 transitions. [2022-04-07 18:47:15,127 INFO L78 Accepts]: Start accepts. Automaton has 23 states and 28 transitions. Word has length 14 [2022-04-07 18:47:15,127 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 18:47:15,128 INFO L478 AbstractCegarLoop]: Abstraction has 23 states and 28 transitions. [2022-04-07 18:47:15,128 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 4 states have (on average 2.5) internal successors, (10), 3 states have internal predecessors, (10), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:47:15,128 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 28 transitions. [2022-04-07 18:47:15,129 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2022-04-07 18:47:15,129 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 18:47:15,129 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 18:47:15,129 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-04-07 18:47:15,130 INFO L403 AbstractCegarLoop]: === Iteration 3 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 18:47:15,131 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 18:47:15,131 INFO L85 PathProgramCache]: Analyzing trace with hash 1207414063, now seen corresponding path program 1 times [2022-04-07 18:47:15,132 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 18:47:15,132 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1564016860] [2022-04-07 18:47:15,132 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 18:47:15,132 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 18:47:15,165 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-04-07 18:47:15,166 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1324039510] [2022-04-07 18:47:15,166 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 18:47:15,166 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 18:47:15,166 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 18:47:15,176 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 18:47:15,214 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-04-07 18:47:15,249 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 18:47:15,251 INFO L263 TraceCheckSpWp]: Trace formula consists of 73 conjuncts, 7 conjunts are in the unsatisfiable core [2022-04-07 18:47:15,260 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 18:47:15,263 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 18:47:15,405 INFO L272 TraceCheckUtils]: 0: Hoare triple {233#true} [85] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {233#true} is VALID [2022-04-07 18:47:15,406 INFO L290 TraceCheckUtils]: 1: Hoare triple {233#true} [87] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0) (= v_~counter~0_5 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{~counter~0=v_~counter~0_5, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[~counter~0, #NULL.offset, #NULL.base] {241#(<= ~counter~0 0)} is VALID [2022-04-07 18:47:15,407 INFO L290 TraceCheckUtils]: 2: Hoare triple {241#(<= ~counter~0 0)} [90] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {241#(<= ~counter~0 0)} is VALID [2022-04-07 18:47:15,407 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {241#(<= ~counter~0 0)} {233#true} [115] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {241#(<= ~counter~0 0)} is VALID [2022-04-07 18:47:15,408 INFO L272 TraceCheckUtils]: 4: Hoare triple {241#(<= ~counter~0 0)} [86] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {241#(<= ~counter~0 0)} is VALID [2022-04-07 18:47:15,408 INFO L290 TraceCheckUtils]: 5: Hoare triple {241#(<= ~counter~0 0)} [89] mainENTRY-->L34-3: Formula: (and (= v_main_~B~0_2 1) (= v_main_~B~0_2 v_main_~b~0_3) (= v_main_~q~0_2 0) (= v_main_~A~0_2 |v_main_#t~nondet1_2|) (= v_main_~A~0_2 v_main_~r~0_2)) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~q~0=v_main_~q~0_2, main_~B~0=v_main_~B~0_2, main_~b~0=v_main_~b~0_3, main_~A~0=v_main_~A~0_2, main_~r~0=v_main_~r~0_2} AuxVars[] AssignedVars[main_~q~0, main_#t~nondet1, main_~B~0, main_~b~0, main_~A~0, main_~r~0] {241#(<= ~counter~0 0)} is VALID [2022-04-07 18:47:15,409 INFO L290 TraceCheckUtils]: 6: Hoare triple {241#(<= ~counter~0 0)} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {257#(<= ~counter~0 1)} is VALID [2022-04-07 18:47:15,409 INFO L290 TraceCheckUtils]: 7: Hoare triple {257#(<= ~counter~0 1)} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 5) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {257#(<= ~counter~0 1)} is VALID [2022-04-07 18:47:15,411 INFO L290 TraceCheckUtils]: 8: Hoare triple {257#(<= ~counter~0 1)} [100] L35-->L43-2: Formula: (not (<= (mod v_main_~b~0_11 4294967296) (mod v_main_~r~0_9 4294967296))) InVars {main_~b~0=v_main_~b~0_11, main_~r~0=v_main_~r~0_9} OutVars{main_~b~0=v_main_~b~0_11, main_~r~0=v_main_~r~0_9} AuxVars[] AssignedVars[] {257#(<= ~counter~0 1)} is VALID [2022-04-07 18:47:15,411 INFO L290 TraceCheckUtils]: 9: Hoare triple {257#(<= ~counter~0 1)} [94] L43-2-->L38: Formula: (and (= |v_main_#t~post3_1| v_~counter~0_2) (= (+ |v_main_#t~post3_1| 1) v_~counter~0_1)) InVars {~counter~0=v_~counter~0_2} OutVars{~counter~0=v_~counter~0_1, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post3] {267#(<= |main_#t~post3| 1)} is VALID [2022-04-07 18:47:15,412 INFO L290 TraceCheckUtils]: 10: Hoare triple {267#(<= |main_#t~post3| 1)} [98] L38-->L38-2: Formula: (not (< |v_main_#t~post3_3| 5)) InVars {main_#t~post3=|v_main_#t~post3_3|} OutVars{} AuxVars[] AssignedVars[main_#t~post3] {234#false} is VALID [2022-04-07 18:47:15,412 INFO L272 TraceCheckUtils]: 11: Hoare triple {234#false} [97] L38-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_2| (ite (= (mod v_main_~A~0_7 4294967296) (mod (+ v_main_~r~0_12 (* v_main_~q~0_11 v_main_~b~0_15)) 4294967296)) 1 0)) InVars {main_~q~0=v_main_~q~0_11, main_~A~0=v_main_~A~0_7, main_~b~0=v_main_~b~0_15, main_~r~0=v_main_~r~0_12} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_2|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {234#false} is VALID [2022-04-07 18:47:15,413 INFO L290 TraceCheckUtils]: 12: Hoare triple {234#false} [103] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {234#false} is VALID [2022-04-07 18:47:15,413 INFO L290 TraceCheckUtils]: 13: Hoare triple {234#false} [106] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {234#false} is VALID [2022-04-07 18:47:15,415 INFO L290 TraceCheckUtils]: 14: Hoare triple {234#false} [110] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {234#false} is VALID [2022-04-07 18:47:15,416 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 18:47:15,416 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-07 18:47:15,416 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 18:47:15,416 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1564016860] [2022-04-07 18:47:15,417 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-04-07 18:47:15,417 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1324039510] [2022-04-07 18:47:15,417 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1324039510] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 18:47:15,417 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 18:47:15,417 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-04-07 18:47:15,417 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1682882700] [2022-04-07 18:47:15,417 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 18:47:15,418 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 2.2) internal successors, (11), 4 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-07 18:47:15,418 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 18:47:15,418 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 2.2) internal successors, (11), 4 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:47:15,439 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 15 edges. 15 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 18:47:15,440 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-04-07 18:47:15,440 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 18:47:15,441 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-04-07 18:47:15,441 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2022-04-07 18:47:15,442 INFO L87 Difference]: Start difference. First operand 23 states and 28 transitions. Second operand has 5 states, 5 states have (on average 2.2) internal successors, (11), 4 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:47:15,517 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:47:15,517 INFO L93 Difference]: Finished difference Result 27 states and 33 transitions. [2022-04-07 18:47:15,517 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-04-07 18:47:15,517 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 2.2) internal successors, (11), 4 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-07 18:47:15,517 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 18:47:15,518 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 2.2) internal successors, (11), 4 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:47:15,519 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 34 transitions. [2022-04-07 18:47:15,519 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 2.2) internal successors, (11), 4 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:47:15,520 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 34 transitions. [2022-04-07 18:47:15,520 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 5 states and 34 transitions. [2022-04-07 18:47:15,545 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 34 edges. 34 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 18:47:15,546 INFO L225 Difference]: With dead ends: 27 [2022-04-07 18:47:15,546 INFO L226 Difference]: Without dead ends: 27 [2022-04-07 18:47:15,546 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 11 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2022-04-07 18:47:15,547 INFO L913 BasicCegarLoop]: 23 mSDtfsCounter, 3 mSDsluCounter, 58 mSDsCounter, 0 mSdLazyCounter, 13 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3 SdHoareTripleChecker+Valid, 81 SdHoareTripleChecker+Invalid, 16 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 13 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 18:47:15,547 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [3 Valid, 81 Invalid, 16 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 13 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 18:47:15,547 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states. [2022-04-07 18:47:15,549 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 26. [2022-04-07 18:47:15,549 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 18:47:15,549 INFO L82 GeneralOperation]: Start isEquivalent. First operand 27 states. Second operand has 26 states, 19 states have (on average 1.368421052631579) internal successors, (26), 20 states have internal predecessors, (26), 4 states have call successors, (4), 3 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 18:47:15,549 INFO L74 IsIncluded]: Start isIncluded. First operand 27 states. Second operand has 26 states, 19 states have (on average 1.368421052631579) internal successors, (26), 20 states have internal predecessors, (26), 4 states have call successors, (4), 3 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 18:47:15,549 INFO L87 Difference]: Start difference. First operand 27 states. Second operand has 26 states, 19 states have (on average 1.368421052631579) internal successors, (26), 20 states have internal predecessors, (26), 4 states have call successors, (4), 3 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 18:47:15,551 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:47:15,551 INFO L93 Difference]: Finished difference Result 27 states and 33 transitions. [2022-04-07 18:47:15,551 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 33 transitions. [2022-04-07 18:47:15,551 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 18:47:15,551 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 18:47:15,551 INFO L74 IsIncluded]: Start isIncluded. First operand has 26 states, 19 states have (on average 1.368421052631579) internal successors, (26), 20 states have internal predecessors, (26), 4 states have call successors, (4), 3 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 27 states. [2022-04-07 18:47:15,552 INFO L87 Difference]: Start difference. First operand has 26 states, 19 states have (on average 1.368421052631579) internal successors, (26), 20 states have internal predecessors, (26), 4 states have call successors, (4), 3 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 27 states. [2022-04-07 18:47:15,553 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:47:15,553 INFO L93 Difference]: Finished difference Result 27 states and 33 transitions. [2022-04-07 18:47:15,553 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 33 transitions. [2022-04-07 18:47:15,553 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 18:47:15,553 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 18:47:15,553 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 18:47:15,553 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 18:47:15,554 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 19 states have (on average 1.368421052631579) internal successors, (26), 20 states have internal predecessors, (26), 4 states have call successors, (4), 3 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 18:47:15,554 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 32 transitions. [2022-04-07 18:47:15,555 INFO L78 Accepts]: Start accepts. Automaton has 26 states and 32 transitions. Word has length 15 [2022-04-07 18:47:15,555 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 18:47:15,555 INFO L478 AbstractCegarLoop]: Abstraction has 26 states and 32 transitions. [2022-04-07 18:47:15,555 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 2.2) internal successors, (11), 4 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:47:15,555 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 32 transitions. [2022-04-07 18:47:15,555 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2022-04-07 18:47:15,555 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 18:47:15,556 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 18:47:15,596 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2022-04-07 18:47:15,774 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2,2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 18:47:15,774 INFO L403 AbstractCegarLoop]: === Iteration 4 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 18:47:15,775 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 18:47:15,775 INFO L85 PathProgramCache]: Analyzing trace with hash 1208546121, now seen corresponding path program 1 times [2022-04-07 18:47:15,775 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 18:47:15,775 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [721794180] [2022-04-07 18:47:15,775 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 18:47:15,775 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 18:47:15,788 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-04-07 18:47:15,788 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [899460027] [2022-04-07 18:47:15,788 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 18:47:15,788 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 18:47:15,788 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 18:47:15,798 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 18:47:15,806 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-04-07 18:47:15,847 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 18:47:15,848 INFO L263 TraceCheckSpWp]: Trace formula consists of 73 conjuncts, 14 conjunts are in the unsatisfiable core [2022-04-07 18:47:15,854 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 18:47:15,854 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 18:47:16,106 INFO L272 TraceCheckUtils]: 0: Hoare triple {389#true} [85] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {389#true} is VALID [2022-04-07 18:47:16,106 INFO L290 TraceCheckUtils]: 1: Hoare triple {389#true} [87] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0) (= v_~counter~0_5 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{~counter~0=v_~counter~0_5, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[~counter~0, #NULL.offset, #NULL.base] {389#true} is VALID [2022-04-07 18:47:16,106 INFO L290 TraceCheckUtils]: 2: Hoare triple {389#true} [90] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {389#true} is VALID [2022-04-07 18:47:16,106 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {389#true} {389#true} [115] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {389#true} is VALID [2022-04-07 18:47:16,107 INFO L272 TraceCheckUtils]: 4: Hoare triple {389#true} [86] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {389#true} is VALID [2022-04-07 18:47:16,107 INFO L290 TraceCheckUtils]: 5: Hoare triple {389#true} [89] mainENTRY-->L34-3: Formula: (and (= v_main_~B~0_2 1) (= v_main_~B~0_2 v_main_~b~0_3) (= v_main_~q~0_2 0) (= v_main_~A~0_2 |v_main_#t~nondet1_2|) (= v_main_~A~0_2 v_main_~r~0_2)) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~q~0=v_main_~q~0_2, main_~B~0=v_main_~B~0_2, main_~b~0=v_main_~b~0_3, main_~A~0=v_main_~A~0_2, main_~r~0=v_main_~r~0_2} AuxVars[] AssignedVars[main_~q~0, main_#t~nondet1, main_~B~0, main_~b~0, main_~A~0, main_~r~0] {409#(and (= main_~b~0 1) (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:47:16,108 INFO L290 TraceCheckUtils]: 6: Hoare triple {409#(and (= main_~b~0 1) (= main_~A~0 main_~r~0) (= main_~q~0 0))} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {409#(and (= main_~b~0 1) (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:47:16,108 INFO L290 TraceCheckUtils]: 7: Hoare triple {409#(and (= main_~b~0 1) (= main_~A~0 main_~r~0) (= main_~q~0 0))} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 5) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {409#(and (= main_~b~0 1) (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:47:16,109 INFO L290 TraceCheckUtils]: 8: Hoare triple {409#(and (= main_~b~0 1) (= main_~A~0 main_~r~0) (= main_~q~0 0))} [100] L35-->L43-2: Formula: (not (<= (mod v_main_~b~0_11 4294967296) (mod v_main_~r~0_9 4294967296))) InVars {main_~b~0=v_main_~b~0_11, main_~r~0=v_main_~r~0_9} OutVars{main_~b~0=v_main_~b~0_11, main_~r~0=v_main_~r~0_9} AuxVars[] AssignedVars[] {419#(and (= main_~b~0 1) (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:47:16,109 INFO L290 TraceCheckUtils]: 9: Hoare triple {419#(and (= main_~b~0 1) (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (= main_~A~0 main_~r~0) (= main_~q~0 0))} [94] L43-2-->L38: Formula: (and (= |v_main_#t~post3_1| v_~counter~0_2) (= (+ |v_main_#t~post3_1| 1) v_~counter~0_1)) InVars {~counter~0=v_~counter~0_2} OutVars{~counter~0=v_~counter~0_1, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post3] {419#(and (= main_~b~0 1) (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:47:16,110 INFO L290 TraceCheckUtils]: 10: Hoare triple {419#(and (= main_~b~0 1) (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (= main_~A~0 main_~r~0) (= main_~q~0 0))} [99] L38-->L39: Formula: (< |v_main_#t~post3_5| 5) InVars {main_#t~post3=|v_main_#t~post3_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post3] {419#(and (= main_~b~0 1) (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:47:16,111 INFO L272 TraceCheckUtils]: 11: Hoare triple {419#(and (= main_~b~0 1) (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (= main_~A~0 main_~r~0) (= main_~q~0 0))} [104] L39-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~A~0_6 4294967296) (mod (+ v_main_~r~0_11 (* v_main_~q~0_10 v_main_~b~0_14)) 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~q~0=v_main_~q~0_10, main_~A~0=v_main_~A~0_6, main_~b~0=v_main_~b~0_14, main_~r~0=v_main_~r~0_11} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {429#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 18:47:16,111 INFO L290 TraceCheckUtils]: 12: Hoare triple {429#(<= 1 |__VERIFIER_assert_#in~cond|)} [103] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {433#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 18:47:16,112 INFO L290 TraceCheckUtils]: 13: Hoare triple {433#(<= 1 __VERIFIER_assert_~cond)} [106] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {390#false} is VALID [2022-04-07 18:47:16,112 INFO L290 TraceCheckUtils]: 14: Hoare triple {390#false} [110] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {390#false} is VALID [2022-04-07 18:47:16,112 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 18:47:16,112 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-07 18:47:16,112 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 18:47:16,113 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [721794180] [2022-04-07 18:47:16,113 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-04-07 18:47:16,113 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [899460027] [2022-04-07 18:47:16,113 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [899460027] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 18:47:16,113 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 18:47:16,113 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-04-07 18:47:16,113 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [197873403] [2022-04-07 18:47:16,113 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 18:47:16,113 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 1.8333333333333333) internal successors, (11), 5 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-07 18:47:16,114 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 18:47:16,114 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 6 states, 6 states have (on average 1.8333333333333333) internal successors, (11), 5 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:47:16,126 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 15 edges. 15 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 18:47:16,126 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-04-07 18:47:16,126 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 18:47:16,127 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-04-07 18:47:16,127 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2022-04-07 18:47:16,127 INFO L87 Difference]: Start difference. First operand 26 states and 32 transitions. Second operand has 6 states, 6 states have (on average 1.8333333333333333) internal successors, (11), 5 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:47:16,269 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:47:16,269 INFO L93 Difference]: Finished difference Result 33 states and 40 transitions. [2022-04-07 18:47:16,269 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-04-07 18:47:16,269 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 1.8333333333333333) internal successors, (11), 5 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-07 18:47:16,269 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 18:47:16,269 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 1.8333333333333333) internal successors, (11), 5 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:47:16,271 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 41 transitions. [2022-04-07 18:47:16,271 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 1.8333333333333333) internal successors, (11), 5 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:47:16,272 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 41 transitions. [2022-04-07 18:47:16,272 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 6 states and 41 transitions. [2022-04-07 18:47:16,301 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 41 edges. 41 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 18:47:16,302 INFO L225 Difference]: With dead ends: 33 [2022-04-07 18:47:16,302 INFO L226 Difference]: Without dead ends: 32 [2022-04-07 18:47:16,302 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 10 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2022-04-07 18:47:16,303 INFO L913 BasicCegarLoop]: 21 mSDtfsCounter, 9 mSDsluCounter, 67 mSDsCounter, 0 mSdLazyCounter, 48 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 10 SdHoareTripleChecker+Valid, 88 SdHoareTripleChecker+Invalid, 49 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 48 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 18:47:16,303 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [10 Valid, 88 Invalid, 49 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 48 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 18:47:16,303 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states. [2022-04-07 18:47:16,305 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 32. [2022-04-07 18:47:16,305 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 18:47:16,305 INFO L82 GeneralOperation]: Start isEquivalent. First operand 32 states. Second operand has 32 states, 23 states have (on average 1.3043478260869565) internal successors, (30), 24 states have internal predecessors, (30), 5 states have call successors, (5), 4 states have call predecessors, (5), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 18:47:16,305 INFO L74 IsIncluded]: Start isIncluded. First operand 32 states. Second operand has 32 states, 23 states have (on average 1.3043478260869565) internal successors, (30), 24 states have internal predecessors, (30), 5 states have call successors, (5), 4 states have call predecessors, (5), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 18:47:16,305 INFO L87 Difference]: Start difference. First operand 32 states. Second operand has 32 states, 23 states have (on average 1.3043478260869565) internal successors, (30), 24 states have internal predecessors, (30), 5 states have call successors, (5), 4 states have call predecessors, (5), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 18:47:16,307 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:47:16,307 INFO L93 Difference]: Finished difference Result 32 states and 38 transitions. [2022-04-07 18:47:16,307 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 38 transitions. [2022-04-07 18:47:16,307 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 18:47:16,307 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 18:47:16,307 INFO L74 IsIncluded]: Start isIncluded. First operand has 32 states, 23 states have (on average 1.3043478260869565) internal successors, (30), 24 states have internal predecessors, (30), 5 states have call successors, (5), 4 states have call predecessors, (5), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand 32 states. [2022-04-07 18:47:16,307 INFO L87 Difference]: Start difference. First operand has 32 states, 23 states have (on average 1.3043478260869565) internal successors, (30), 24 states have internal predecessors, (30), 5 states have call successors, (5), 4 states have call predecessors, (5), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand 32 states. [2022-04-07 18:47:16,308 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:47:16,308 INFO L93 Difference]: Finished difference Result 32 states and 38 transitions. [2022-04-07 18:47:16,308 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 38 transitions. [2022-04-07 18:47:16,309 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 18:47:16,309 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 18:47:16,309 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 18:47:16,309 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 18:47:16,309 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 32 states, 23 states have (on average 1.3043478260869565) internal successors, (30), 24 states have internal predecessors, (30), 5 states have call successors, (5), 4 states have call predecessors, (5), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 18:47:16,310 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 38 transitions. [2022-04-07 18:47:16,310 INFO L78 Accepts]: Start accepts. Automaton has 32 states and 38 transitions. Word has length 15 [2022-04-07 18:47:16,310 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 18:47:16,310 INFO L478 AbstractCegarLoop]: Abstraction has 32 states and 38 transitions. [2022-04-07 18:47:16,310 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 1.8333333333333333) internal successors, (11), 5 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:47:16,310 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 38 transitions. [2022-04-07 18:47:16,311 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-04-07 18:47:16,311 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 18:47:16,311 INFO L499 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 18:47:16,345 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Ended with exit code 0 [2022-04-07 18:47:16,511 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable3 [2022-04-07 18:47:16,511 INFO L403 AbstractCegarLoop]: === Iteration 5 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 18:47:16,512 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 18:47:16,512 INFO L85 PathProgramCache]: Analyzing trace with hash 1227316531, now seen corresponding path program 1 times [2022-04-07 18:47:16,512 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 18:47:16,512 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [388271556] [2022-04-07 18:47:16,512 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 18:47:16,512 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 18:47:16,522 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-04-07 18:47:16,522 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [819094094] [2022-04-07 18:47:16,522 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 18:47:16,522 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 18:47:16,522 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 18:47:16,523 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 18:47:16,524 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-04-07 18:47:16,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 18:47:16,553 INFO L263 TraceCheckSpWp]: Trace formula consists of 80 conjuncts, 7 conjunts are in the unsatisfiable core [2022-04-07 18:47:16,558 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 18:47:16,559 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 18:47:16,657 INFO L272 TraceCheckUtils]: 0: Hoare triple {570#true} [85] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {570#true} is VALID [2022-04-07 18:47:16,657 INFO L290 TraceCheckUtils]: 1: Hoare triple {570#true} [87] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0) (= v_~counter~0_5 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{~counter~0=v_~counter~0_5, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[~counter~0, #NULL.offset, #NULL.base] {578#(<= ~counter~0 0)} is VALID [2022-04-07 18:47:16,658 INFO L290 TraceCheckUtils]: 2: Hoare triple {578#(<= ~counter~0 0)} [90] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {578#(<= ~counter~0 0)} is VALID [2022-04-07 18:47:16,658 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {578#(<= ~counter~0 0)} {570#true} [115] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {578#(<= ~counter~0 0)} is VALID [2022-04-07 18:47:16,658 INFO L272 TraceCheckUtils]: 4: Hoare triple {578#(<= ~counter~0 0)} [86] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {578#(<= ~counter~0 0)} is VALID [2022-04-07 18:47:16,659 INFO L290 TraceCheckUtils]: 5: Hoare triple {578#(<= ~counter~0 0)} [89] mainENTRY-->L34-3: Formula: (and (= v_main_~B~0_2 1) (= v_main_~B~0_2 v_main_~b~0_3) (= v_main_~q~0_2 0) (= v_main_~A~0_2 |v_main_#t~nondet1_2|) (= v_main_~A~0_2 v_main_~r~0_2)) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~q~0=v_main_~q~0_2, main_~B~0=v_main_~B~0_2, main_~b~0=v_main_~b~0_3, main_~A~0=v_main_~A~0_2, main_~r~0=v_main_~r~0_2} AuxVars[] AssignedVars[main_~q~0, main_#t~nondet1, main_~B~0, main_~b~0, main_~A~0, main_~r~0] {578#(<= ~counter~0 0)} is VALID [2022-04-07 18:47:16,659 INFO L290 TraceCheckUtils]: 6: Hoare triple {578#(<= ~counter~0 0)} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {594#(<= ~counter~0 1)} is VALID [2022-04-07 18:47:16,660 INFO L290 TraceCheckUtils]: 7: Hoare triple {594#(<= ~counter~0 1)} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 5) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {594#(<= ~counter~0 1)} is VALID [2022-04-07 18:47:16,660 INFO L290 TraceCheckUtils]: 8: Hoare triple {594#(<= ~counter~0 1)} [101] L35-->L34-3: Formula: (and (= (* 2 v_main_~b~0_13) v_main_~b~0_12) (<= (mod v_main_~b~0_13 4294967296) (mod v_main_~r~0_10 4294967296))) InVars {main_~b~0=v_main_~b~0_13, main_~r~0=v_main_~r~0_10} OutVars{main_~b~0=v_main_~b~0_12, main_~r~0=v_main_~r~0_10} AuxVars[] AssignedVars[main_~b~0] {594#(<= ~counter~0 1)} is VALID [2022-04-07 18:47:16,660 INFO L290 TraceCheckUtils]: 9: Hoare triple {594#(<= ~counter~0 1)} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {604#(<= |main_#t~post2| 1)} is VALID [2022-04-07 18:47:16,661 INFO L290 TraceCheckUtils]: 10: Hoare triple {604#(<= |main_#t~post2| 1)} [95] L34-1-->L43-2: Formula: (not (< |v_main_#t~post2_3| 5)) InVars {main_#t~post2=|v_main_#t~post2_3|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {571#false} is VALID [2022-04-07 18:47:16,661 INFO L290 TraceCheckUtils]: 11: Hoare triple {571#false} [94] L43-2-->L38: Formula: (and (= |v_main_#t~post3_1| v_~counter~0_2) (= (+ |v_main_#t~post3_1| 1) v_~counter~0_1)) InVars {~counter~0=v_~counter~0_2} OutVars{~counter~0=v_~counter~0_1, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post3] {571#false} is VALID [2022-04-07 18:47:16,661 INFO L290 TraceCheckUtils]: 12: Hoare triple {571#false} [98] L38-->L38-2: Formula: (not (< |v_main_#t~post3_3| 5)) InVars {main_#t~post3=|v_main_#t~post3_3|} OutVars{} AuxVars[] AssignedVars[main_#t~post3] {571#false} is VALID [2022-04-07 18:47:16,661 INFO L272 TraceCheckUtils]: 13: Hoare triple {571#false} [97] L38-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_2| (ite (= (mod v_main_~A~0_7 4294967296) (mod (+ v_main_~r~0_12 (* v_main_~q~0_11 v_main_~b~0_15)) 4294967296)) 1 0)) InVars {main_~q~0=v_main_~q~0_11, main_~A~0=v_main_~A~0_7, main_~b~0=v_main_~b~0_15, main_~r~0=v_main_~r~0_12} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_2|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {571#false} is VALID [2022-04-07 18:47:16,661 INFO L290 TraceCheckUtils]: 14: Hoare triple {571#false} [103] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {571#false} is VALID [2022-04-07 18:47:16,661 INFO L290 TraceCheckUtils]: 15: Hoare triple {571#false} [106] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {571#false} is VALID [2022-04-07 18:47:16,662 INFO L290 TraceCheckUtils]: 16: Hoare triple {571#false} [110] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {571#false} is VALID [2022-04-07 18:47:16,662 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 18:47:16,662 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 18:47:16,755 INFO L290 TraceCheckUtils]: 16: Hoare triple {571#false} [110] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {571#false} is VALID [2022-04-07 18:47:16,755 INFO L290 TraceCheckUtils]: 15: Hoare triple {571#false} [106] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {571#false} is VALID [2022-04-07 18:47:16,755 INFO L290 TraceCheckUtils]: 14: Hoare triple {571#false} [103] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {571#false} is VALID [2022-04-07 18:47:16,755 INFO L272 TraceCheckUtils]: 13: Hoare triple {571#false} [97] L38-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_2| (ite (= (mod v_main_~A~0_7 4294967296) (mod (+ v_main_~r~0_12 (* v_main_~q~0_11 v_main_~b~0_15)) 4294967296)) 1 0)) InVars {main_~q~0=v_main_~q~0_11, main_~A~0=v_main_~A~0_7, main_~b~0=v_main_~b~0_15, main_~r~0=v_main_~r~0_12} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_2|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {571#false} is VALID [2022-04-07 18:47:16,756 INFO L290 TraceCheckUtils]: 12: Hoare triple {571#false} [98] L38-->L38-2: Formula: (not (< |v_main_#t~post3_3| 5)) InVars {main_#t~post3=|v_main_#t~post3_3|} OutVars{} AuxVars[] AssignedVars[main_#t~post3] {571#false} is VALID [2022-04-07 18:47:16,756 INFO L290 TraceCheckUtils]: 11: Hoare triple {571#false} [94] L43-2-->L38: Formula: (and (= |v_main_#t~post3_1| v_~counter~0_2) (= (+ |v_main_#t~post3_1| 1) v_~counter~0_1)) InVars {~counter~0=v_~counter~0_2} OutVars{~counter~0=v_~counter~0_1, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post3] {571#false} is VALID [2022-04-07 18:47:16,756 INFO L290 TraceCheckUtils]: 10: Hoare triple {644#(< |main_#t~post2| 5)} [95] L34-1-->L43-2: Formula: (not (< |v_main_#t~post2_3| 5)) InVars {main_#t~post2=|v_main_#t~post2_3|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {571#false} is VALID [2022-04-07 18:47:16,756 INFO L290 TraceCheckUtils]: 9: Hoare triple {648#(< ~counter~0 5)} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {644#(< |main_#t~post2| 5)} is VALID [2022-04-07 18:47:16,757 INFO L290 TraceCheckUtils]: 8: Hoare triple {648#(< ~counter~0 5)} [101] L35-->L34-3: Formula: (and (= (* 2 v_main_~b~0_13) v_main_~b~0_12) (<= (mod v_main_~b~0_13 4294967296) (mod v_main_~r~0_10 4294967296))) InVars {main_~b~0=v_main_~b~0_13, main_~r~0=v_main_~r~0_10} OutVars{main_~b~0=v_main_~b~0_12, main_~r~0=v_main_~r~0_10} AuxVars[] AssignedVars[main_~b~0] {648#(< ~counter~0 5)} is VALID [2022-04-07 18:47:16,757 INFO L290 TraceCheckUtils]: 7: Hoare triple {648#(< ~counter~0 5)} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 5) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {648#(< ~counter~0 5)} is VALID [2022-04-07 18:47:16,757 INFO L290 TraceCheckUtils]: 6: Hoare triple {658#(< ~counter~0 4)} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {648#(< ~counter~0 5)} is VALID [2022-04-07 18:47:16,758 INFO L290 TraceCheckUtils]: 5: Hoare triple {658#(< ~counter~0 4)} [89] mainENTRY-->L34-3: Formula: (and (= v_main_~B~0_2 1) (= v_main_~B~0_2 v_main_~b~0_3) (= v_main_~q~0_2 0) (= v_main_~A~0_2 |v_main_#t~nondet1_2|) (= v_main_~A~0_2 v_main_~r~0_2)) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~q~0=v_main_~q~0_2, main_~B~0=v_main_~B~0_2, main_~b~0=v_main_~b~0_3, main_~A~0=v_main_~A~0_2, main_~r~0=v_main_~r~0_2} AuxVars[] AssignedVars[main_~q~0, main_#t~nondet1, main_~B~0, main_~b~0, main_~A~0, main_~r~0] {658#(< ~counter~0 4)} is VALID [2022-04-07 18:47:16,758 INFO L272 TraceCheckUtils]: 4: Hoare triple {658#(< ~counter~0 4)} [86] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {658#(< ~counter~0 4)} is VALID [2022-04-07 18:47:16,759 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {658#(< ~counter~0 4)} {570#true} [115] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {658#(< ~counter~0 4)} is VALID [2022-04-07 18:47:16,759 INFO L290 TraceCheckUtils]: 2: Hoare triple {658#(< ~counter~0 4)} [90] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {658#(< ~counter~0 4)} is VALID [2022-04-07 18:47:16,759 INFO L290 TraceCheckUtils]: 1: Hoare triple {570#true} [87] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0) (= v_~counter~0_5 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{~counter~0=v_~counter~0_5, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[~counter~0, #NULL.offset, #NULL.base] {658#(< ~counter~0 4)} is VALID [2022-04-07 18:47:16,759 INFO L272 TraceCheckUtils]: 0: Hoare triple {570#true} [85] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {570#true} is VALID [2022-04-07 18:47:16,760 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 18:47:16,760 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 18:47:16,760 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [388271556] [2022-04-07 18:47:16,760 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-04-07 18:47:16,760 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [819094094] [2022-04-07 18:47:16,760 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [819094094] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 18:47:16,760 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-04-07 18:47:16,760 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 8 [2022-04-07 18:47:16,760 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1646527241] [2022-04-07 18:47:16,760 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-04-07 18:47:16,761 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 2.625) internal successors, (21), 7 states have internal predecessors, (21), 4 states have call successors, (4), 4 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) Word has length 17 [2022-04-07 18:47:16,761 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 18:47:16,761 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 8 states, 8 states have (on average 2.625) internal successors, (21), 7 states have internal predecessors, (21), 4 states have call successors, (4), 4 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-07 18:47:16,776 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 27 edges. 27 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 18:47:16,776 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-04-07 18:47:16,776 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 18:47:16,777 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-04-07 18:47:16,777 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 [2022-04-07 18:47:16,777 INFO L87 Difference]: Start difference. First operand 32 states and 38 transitions. Second operand has 8 states, 8 states have (on average 2.625) internal successors, (21), 7 states have internal predecessors, (21), 4 states have call successors, (4), 4 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-07 18:47:16,916 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:47:16,917 INFO L93 Difference]: Finished difference Result 54 states and 66 transitions. [2022-04-07 18:47:16,917 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-04-07 18:47:16,917 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 2.625) internal successors, (21), 7 states have internal predecessors, (21), 4 states have call successors, (4), 4 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) Word has length 17 [2022-04-07 18:47:16,917 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 18:47:16,917 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 2.625) internal successors, (21), 7 states have internal predecessors, (21), 4 states have call successors, (4), 4 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-07 18:47:16,919 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 69 transitions. [2022-04-07 18:47:16,919 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 2.625) internal successors, (21), 7 states have internal predecessors, (21), 4 states have call successors, (4), 4 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-07 18:47:16,920 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 69 transitions. [2022-04-07 18:47:16,920 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 10 states and 69 transitions. [2022-04-07 18:47:16,965 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 69 edges. 69 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 18:47:16,965 INFO L225 Difference]: With dead ends: 54 [2022-04-07 18:47:16,965 INFO L226 Difference]: Without dead ends: 54 [2022-04-07 18:47:16,966 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 27 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=40, Invalid=70, Unknown=0, NotChecked=0, Total=110 [2022-04-07 18:47:16,966 INFO L913 BasicCegarLoop]: 25 mSDtfsCounter, 42 mSDsluCounter, 97 mSDsCounter, 0 mSdLazyCounter, 30 mSolverCounterSat, 15 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 42 SdHoareTripleChecker+Valid, 122 SdHoareTripleChecker+Invalid, 45 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 15 IncrementalHoareTripleChecker+Valid, 30 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 18:47:16,966 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [42 Valid, 122 Invalid, 45 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [15 Valid, 30 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 18:47:16,967 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54 states. [2022-04-07 18:47:16,969 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54 to 40. [2022-04-07 18:47:16,969 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 18:47:16,969 INFO L82 GeneralOperation]: Start isEquivalent. First operand 54 states. Second operand has 40 states, 31 states have (on average 1.2903225806451613) internal successors, (40), 32 states have internal predecessors, (40), 5 states have call successors, (5), 4 states have call predecessors, (5), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 18:47:16,969 INFO L74 IsIncluded]: Start isIncluded. First operand 54 states. Second operand has 40 states, 31 states have (on average 1.2903225806451613) internal successors, (40), 32 states have internal predecessors, (40), 5 states have call successors, (5), 4 states have call predecessors, (5), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 18:47:16,969 INFO L87 Difference]: Start difference. First operand 54 states. Second operand has 40 states, 31 states have (on average 1.2903225806451613) internal successors, (40), 32 states have internal predecessors, (40), 5 states have call successors, (5), 4 states have call predecessors, (5), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 18:47:16,971 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:47:16,971 INFO L93 Difference]: Finished difference Result 54 states and 66 transitions. [2022-04-07 18:47:16,971 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 66 transitions. [2022-04-07 18:47:16,971 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 18:47:16,971 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 18:47:16,971 INFO L74 IsIncluded]: Start isIncluded. First operand has 40 states, 31 states have (on average 1.2903225806451613) internal successors, (40), 32 states have internal predecessors, (40), 5 states have call successors, (5), 4 states have call predecessors, (5), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand 54 states. [2022-04-07 18:47:16,972 INFO L87 Difference]: Start difference. First operand has 40 states, 31 states have (on average 1.2903225806451613) internal successors, (40), 32 states have internal predecessors, (40), 5 states have call successors, (5), 4 states have call predecessors, (5), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand 54 states. [2022-04-07 18:47:16,973 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:47:16,973 INFO L93 Difference]: Finished difference Result 54 states and 66 transitions. [2022-04-07 18:47:16,973 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 66 transitions. [2022-04-07 18:47:16,973 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 18:47:16,973 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 18:47:16,973 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 18:47:16,974 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 18:47:16,974 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 40 states, 31 states have (on average 1.2903225806451613) internal successors, (40), 32 states have internal predecessors, (40), 5 states have call successors, (5), 4 states have call predecessors, (5), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 18:47:16,974 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 48 transitions. [2022-04-07 18:47:16,975 INFO L78 Accepts]: Start accepts. Automaton has 40 states and 48 transitions. Word has length 17 [2022-04-07 18:47:16,975 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 18:47:16,975 INFO L478 AbstractCegarLoop]: Abstraction has 40 states and 48 transitions. [2022-04-07 18:47:16,975 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 2.625) internal successors, (21), 7 states have internal predecessors, (21), 4 states have call successors, (4), 4 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-07 18:47:16,975 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 48 transitions. [2022-04-07 18:47:16,975 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-04-07 18:47:16,975 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 18:47:16,975 INFO L499 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 18:47:17,009 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Ended with exit code 0 [2022-04-07 18:47:17,210 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 18:47:17,210 INFO L403 AbstractCegarLoop]: === Iteration 6 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 18:47:17,211 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 18:47:17,211 INFO L85 PathProgramCache]: Analyzing trace with hash 2051197196, now seen corresponding path program 1 times [2022-04-07 18:47:17,211 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 18:47:17,211 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1766830850] [2022-04-07 18:47:17,211 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 18:47:17,211 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 18:47:17,224 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-04-07 18:47:17,224 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [144683610] [2022-04-07 18:47:17,225 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 18:47:17,225 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 18:47:17,225 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 18:47:17,225 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 18:47:17,226 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-04-07 18:47:17,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 18:47:17,260 INFO L263 TraceCheckSpWp]: Trace formula consists of 81 conjuncts, 9 conjunts are in the unsatisfiable core [2022-04-07 18:47:17,267 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 18:47:17,267 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 18:47:17,377 INFO L272 TraceCheckUtils]: 0: Hoare triple {887#true} [85] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {887#true} is VALID [2022-04-07 18:47:17,377 INFO L290 TraceCheckUtils]: 1: Hoare triple {887#true} [87] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0) (= v_~counter~0_5 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{~counter~0=v_~counter~0_5, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[~counter~0, #NULL.offset, #NULL.base] {895#(<= ~counter~0 0)} is VALID [2022-04-07 18:47:17,378 INFO L290 TraceCheckUtils]: 2: Hoare triple {895#(<= ~counter~0 0)} [90] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {895#(<= ~counter~0 0)} is VALID [2022-04-07 18:47:17,378 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {895#(<= ~counter~0 0)} {887#true} [115] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {895#(<= ~counter~0 0)} is VALID [2022-04-07 18:47:17,379 INFO L272 TraceCheckUtils]: 4: Hoare triple {895#(<= ~counter~0 0)} [86] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {895#(<= ~counter~0 0)} is VALID [2022-04-07 18:47:17,379 INFO L290 TraceCheckUtils]: 5: Hoare triple {895#(<= ~counter~0 0)} [89] mainENTRY-->L34-3: Formula: (and (= v_main_~B~0_2 1) (= v_main_~B~0_2 v_main_~b~0_3) (= v_main_~q~0_2 0) (= v_main_~A~0_2 |v_main_#t~nondet1_2|) (= v_main_~A~0_2 v_main_~r~0_2)) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~q~0=v_main_~q~0_2, main_~B~0=v_main_~B~0_2, main_~b~0=v_main_~b~0_3, main_~A~0=v_main_~A~0_2, main_~r~0=v_main_~r~0_2} AuxVars[] AssignedVars[main_~q~0, main_#t~nondet1, main_~B~0, main_~b~0, main_~A~0, main_~r~0] {895#(<= ~counter~0 0)} is VALID [2022-04-07 18:47:17,380 INFO L290 TraceCheckUtils]: 6: Hoare triple {895#(<= ~counter~0 0)} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {911#(<= ~counter~0 1)} is VALID [2022-04-07 18:47:17,381 INFO L290 TraceCheckUtils]: 7: Hoare triple {911#(<= ~counter~0 1)} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 5) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {911#(<= ~counter~0 1)} is VALID [2022-04-07 18:47:17,382 INFO L290 TraceCheckUtils]: 8: Hoare triple {911#(<= ~counter~0 1)} [101] L35-->L34-3: Formula: (and (= (* 2 v_main_~b~0_13) v_main_~b~0_12) (<= (mod v_main_~b~0_13 4294967296) (mod v_main_~r~0_10 4294967296))) InVars {main_~b~0=v_main_~b~0_13, main_~r~0=v_main_~r~0_10} OutVars{main_~b~0=v_main_~b~0_12, main_~r~0=v_main_~r~0_10} AuxVars[] AssignedVars[main_~b~0] {911#(<= ~counter~0 1)} is VALID [2022-04-07 18:47:17,382 INFO L290 TraceCheckUtils]: 9: Hoare triple {911#(<= ~counter~0 1)} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {921#(<= ~counter~0 2)} is VALID [2022-04-07 18:47:17,382 INFO L290 TraceCheckUtils]: 10: Hoare triple {921#(<= ~counter~0 2)} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 5) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {921#(<= ~counter~0 2)} is VALID [2022-04-07 18:47:17,383 INFO L290 TraceCheckUtils]: 11: Hoare triple {921#(<= ~counter~0 2)} [100] L35-->L43-2: Formula: (not (<= (mod v_main_~b~0_11 4294967296) (mod v_main_~r~0_9 4294967296))) InVars {main_~b~0=v_main_~b~0_11, main_~r~0=v_main_~r~0_9} OutVars{main_~b~0=v_main_~b~0_11, main_~r~0=v_main_~r~0_9} AuxVars[] AssignedVars[] {921#(<= ~counter~0 2)} is VALID [2022-04-07 18:47:17,383 INFO L290 TraceCheckUtils]: 12: Hoare triple {921#(<= ~counter~0 2)} [94] L43-2-->L38: Formula: (and (= |v_main_#t~post3_1| v_~counter~0_2) (= (+ |v_main_#t~post3_1| 1) v_~counter~0_1)) InVars {~counter~0=v_~counter~0_2} OutVars{~counter~0=v_~counter~0_1, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post3] {931#(<= |main_#t~post3| 2)} is VALID [2022-04-07 18:47:17,383 INFO L290 TraceCheckUtils]: 13: Hoare triple {931#(<= |main_#t~post3| 2)} [98] L38-->L38-2: Formula: (not (< |v_main_#t~post3_3| 5)) InVars {main_#t~post3=|v_main_#t~post3_3|} OutVars{} AuxVars[] AssignedVars[main_#t~post3] {888#false} is VALID [2022-04-07 18:47:17,384 INFO L272 TraceCheckUtils]: 14: Hoare triple {888#false} [97] L38-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_2| (ite (= (mod v_main_~A~0_7 4294967296) (mod (+ v_main_~r~0_12 (* v_main_~q~0_11 v_main_~b~0_15)) 4294967296)) 1 0)) InVars {main_~q~0=v_main_~q~0_11, main_~A~0=v_main_~A~0_7, main_~b~0=v_main_~b~0_15, main_~r~0=v_main_~r~0_12} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_2|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {888#false} is VALID [2022-04-07 18:47:17,384 INFO L290 TraceCheckUtils]: 15: Hoare triple {888#false} [103] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {888#false} is VALID [2022-04-07 18:47:17,384 INFO L290 TraceCheckUtils]: 16: Hoare triple {888#false} [106] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {888#false} is VALID [2022-04-07 18:47:17,385 INFO L290 TraceCheckUtils]: 17: Hoare triple {888#false} [110] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {888#false} is VALID [2022-04-07 18:47:17,385 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 18:47:17,385 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 18:47:17,504 INFO L290 TraceCheckUtils]: 17: Hoare triple {888#false} [110] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {888#false} is VALID [2022-04-07 18:47:17,505 INFO L290 TraceCheckUtils]: 16: Hoare triple {888#false} [106] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {888#false} is VALID [2022-04-07 18:47:17,505 INFO L290 TraceCheckUtils]: 15: Hoare triple {888#false} [103] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {888#false} is VALID [2022-04-07 18:47:17,506 INFO L272 TraceCheckUtils]: 14: Hoare triple {888#false} [97] L38-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_2| (ite (= (mod v_main_~A~0_7 4294967296) (mod (+ v_main_~r~0_12 (* v_main_~q~0_11 v_main_~b~0_15)) 4294967296)) 1 0)) InVars {main_~q~0=v_main_~q~0_11, main_~A~0=v_main_~A~0_7, main_~b~0=v_main_~b~0_15, main_~r~0=v_main_~r~0_12} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_2|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {888#false} is VALID [2022-04-07 18:47:17,506 INFO L290 TraceCheckUtils]: 13: Hoare triple {959#(< |main_#t~post3| 5)} [98] L38-->L38-2: Formula: (not (< |v_main_#t~post3_3| 5)) InVars {main_#t~post3=|v_main_#t~post3_3|} OutVars{} AuxVars[] AssignedVars[main_#t~post3] {888#false} is VALID [2022-04-07 18:47:17,516 INFO L290 TraceCheckUtils]: 12: Hoare triple {963#(< ~counter~0 5)} [94] L43-2-->L38: Formula: (and (= |v_main_#t~post3_1| v_~counter~0_2) (= (+ |v_main_#t~post3_1| 1) v_~counter~0_1)) InVars {~counter~0=v_~counter~0_2} OutVars{~counter~0=v_~counter~0_1, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post3] {959#(< |main_#t~post3| 5)} is VALID [2022-04-07 18:47:17,517 INFO L290 TraceCheckUtils]: 11: Hoare triple {963#(< ~counter~0 5)} [100] L35-->L43-2: Formula: (not (<= (mod v_main_~b~0_11 4294967296) (mod v_main_~r~0_9 4294967296))) InVars {main_~b~0=v_main_~b~0_11, main_~r~0=v_main_~r~0_9} OutVars{main_~b~0=v_main_~b~0_11, main_~r~0=v_main_~r~0_9} AuxVars[] AssignedVars[] {963#(< ~counter~0 5)} is VALID [2022-04-07 18:47:17,517 INFO L290 TraceCheckUtils]: 10: Hoare triple {963#(< ~counter~0 5)} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 5) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {963#(< ~counter~0 5)} is VALID [2022-04-07 18:47:17,517 INFO L290 TraceCheckUtils]: 9: Hoare triple {973#(< ~counter~0 4)} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {963#(< ~counter~0 5)} is VALID [2022-04-07 18:47:17,518 INFO L290 TraceCheckUtils]: 8: Hoare triple {973#(< ~counter~0 4)} [101] L35-->L34-3: Formula: (and (= (* 2 v_main_~b~0_13) v_main_~b~0_12) (<= (mod v_main_~b~0_13 4294967296) (mod v_main_~r~0_10 4294967296))) InVars {main_~b~0=v_main_~b~0_13, main_~r~0=v_main_~r~0_10} OutVars{main_~b~0=v_main_~b~0_12, main_~r~0=v_main_~r~0_10} AuxVars[] AssignedVars[main_~b~0] {973#(< ~counter~0 4)} is VALID [2022-04-07 18:47:17,518 INFO L290 TraceCheckUtils]: 7: Hoare triple {973#(< ~counter~0 4)} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 5) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {973#(< ~counter~0 4)} is VALID [2022-04-07 18:47:17,518 INFO L290 TraceCheckUtils]: 6: Hoare triple {921#(<= ~counter~0 2)} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {973#(< ~counter~0 4)} is VALID [2022-04-07 18:47:17,519 INFO L290 TraceCheckUtils]: 5: Hoare triple {921#(<= ~counter~0 2)} [89] mainENTRY-->L34-3: Formula: (and (= v_main_~B~0_2 1) (= v_main_~B~0_2 v_main_~b~0_3) (= v_main_~q~0_2 0) (= v_main_~A~0_2 |v_main_#t~nondet1_2|) (= v_main_~A~0_2 v_main_~r~0_2)) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~q~0=v_main_~q~0_2, main_~B~0=v_main_~B~0_2, main_~b~0=v_main_~b~0_3, main_~A~0=v_main_~A~0_2, main_~r~0=v_main_~r~0_2} AuxVars[] AssignedVars[main_~q~0, main_#t~nondet1, main_~B~0, main_~b~0, main_~A~0, main_~r~0] {921#(<= ~counter~0 2)} is VALID [2022-04-07 18:47:17,519 INFO L272 TraceCheckUtils]: 4: Hoare triple {921#(<= ~counter~0 2)} [86] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {921#(<= ~counter~0 2)} is VALID [2022-04-07 18:47:17,519 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {921#(<= ~counter~0 2)} {887#true} [115] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {921#(<= ~counter~0 2)} is VALID [2022-04-07 18:47:17,520 INFO L290 TraceCheckUtils]: 2: Hoare triple {921#(<= ~counter~0 2)} [90] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {921#(<= ~counter~0 2)} is VALID [2022-04-07 18:47:17,520 INFO L290 TraceCheckUtils]: 1: Hoare triple {887#true} [87] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0) (= v_~counter~0_5 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{~counter~0=v_~counter~0_5, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[~counter~0, #NULL.offset, #NULL.base] {921#(<= ~counter~0 2)} is VALID [2022-04-07 18:47:17,520 INFO L272 TraceCheckUtils]: 0: Hoare triple {887#true} [85] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {887#true} is VALID [2022-04-07 18:47:17,520 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 18:47:17,520 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 18:47:17,521 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1766830850] [2022-04-07 18:47:17,521 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-04-07 18:47:17,521 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [144683610] [2022-04-07 18:47:17,521 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [144683610] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 18:47:17,521 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-04-07 18:47:17,521 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 9 [2022-04-07 18:47:17,521 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1862134223] [2022-04-07 18:47:17,521 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-04-07 18:47:17,521 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 2.7777777777777777) internal successors, (25), 8 states have internal predecessors, (25), 4 states have call successors, (4), 4 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) Word has length 18 [2022-04-07 18:47:17,522 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 18:47:17,522 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 9 states, 9 states have (on average 2.7777777777777777) internal successors, (25), 8 states have internal predecessors, (25), 4 states have call successors, (4), 4 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-07 18:47:17,539 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 31 edges. 31 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 18:47:17,539 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2022-04-07 18:47:17,539 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 18:47:17,539 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2022-04-07 18:47:17,539 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2022-04-07 18:47:17,539 INFO L87 Difference]: Start difference. First operand 40 states and 48 transitions. Second operand has 9 states, 9 states have (on average 2.7777777777777777) internal successors, (25), 8 states have internal predecessors, (25), 4 states have call successors, (4), 4 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-07 18:47:17,704 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:47:17,704 INFO L93 Difference]: Finished difference Result 69 states and 83 transitions. [2022-04-07 18:47:17,704 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-04-07 18:47:17,704 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 2.7777777777777777) internal successors, (25), 8 states have internal predecessors, (25), 4 states have call successors, (4), 4 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) Word has length 18 [2022-04-07 18:47:17,704 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 18:47:17,704 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 9 states have (on average 2.7777777777777777) internal successors, (25), 8 states have internal predecessors, (25), 4 states have call successors, (4), 4 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-07 18:47:17,706 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 86 transitions. [2022-04-07 18:47:17,706 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 9 states have (on average 2.7777777777777777) internal successors, (25), 8 states have internal predecessors, (25), 4 states have call successors, (4), 4 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-07 18:47:17,708 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 86 transitions. [2022-04-07 18:47:17,708 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 11 states and 86 transitions. [2022-04-07 18:47:17,763 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 86 edges. 86 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 18:47:17,764 INFO L225 Difference]: With dead ends: 69 [2022-04-07 18:47:17,764 INFO L226 Difference]: Without dead ends: 69 [2022-04-07 18:47:17,764 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 27 SyntacticMatches, 1 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=46, Invalid=86, Unknown=0, NotChecked=0, Total=132 [2022-04-07 18:47:17,764 INFO L913 BasicCegarLoop]: 26 mSDtfsCounter, 58 mSDsluCounter, 111 mSDsCounter, 0 mSdLazyCounter, 36 mSolverCounterSat, 18 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 58 SdHoareTripleChecker+Valid, 137 SdHoareTripleChecker+Invalid, 54 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 18 IncrementalHoareTripleChecker+Valid, 36 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 18:47:17,765 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [58 Valid, 137 Invalid, 54 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [18 Valid, 36 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 18:47:17,765 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69 states. [2022-04-07 18:47:17,767 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69 to 64. [2022-04-07 18:47:17,767 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 18:47:17,768 INFO L82 GeneralOperation]: Start isEquivalent. First operand 69 states. Second operand has 64 states, 49 states have (on average 1.346938775510204) internal successors, (66), 52 states have internal predecessors, (66), 9 states have call successors, (9), 6 states have call predecessors, (9), 5 states have return successors, (5), 5 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-07 18:47:17,768 INFO L74 IsIncluded]: Start isIncluded. First operand 69 states. Second operand has 64 states, 49 states have (on average 1.346938775510204) internal successors, (66), 52 states have internal predecessors, (66), 9 states have call successors, (9), 6 states have call predecessors, (9), 5 states have return successors, (5), 5 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-07 18:47:17,768 INFO L87 Difference]: Start difference. First operand 69 states. Second operand has 64 states, 49 states have (on average 1.346938775510204) internal successors, (66), 52 states have internal predecessors, (66), 9 states have call successors, (9), 6 states have call predecessors, (9), 5 states have return successors, (5), 5 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-07 18:47:17,770 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:47:17,770 INFO L93 Difference]: Finished difference Result 69 states and 83 transitions. [2022-04-07 18:47:17,770 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 83 transitions. [2022-04-07 18:47:17,770 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 18:47:17,771 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 18:47:17,771 INFO L74 IsIncluded]: Start isIncluded. First operand has 64 states, 49 states have (on average 1.346938775510204) internal successors, (66), 52 states have internal predecessors, (66), 9 states have call successors, (9), 6 states have call predecessors, (9), 5 states have return successors, (5), 5 states have call predecessors, (5), 5 states have call successors, (5) Second operand 69 states. [2022-04-07 18:47:17,771 INFO L87 Difference]: Start difference. First operand has 64 states, 49 states have (on average 1.346938775510204) internal successors, (66), 52 states have internal predecessors, (66), 9 states have call successors, (9), 6 states have call predecessors, (9), 5 states have return successors, (5), 5 states have call predecessors, (5), 5 states have call successors, (5) Second operand 69 states. [2022-04-07 18:47:17,772 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:47:17,773 INFO L93 Difference]: Finished difference Result 69 states and 83 transitions. [2022-04-07 18:47:17,773 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 83 transitions. [2022-04-07 18:47:17,773 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 18:47:17,773 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 18:47:17,773 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 18:47:17,773 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 18:47:17,773 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 64 states, 49 states have (on average 1.346938775510204) internal successors, (66), 52 states have internal predecessors, (66), 9 states have call successors, (9), 6 states have call predecessors, (9), 5 states have return successors, (5), 5 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-07 18:47:17,774 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 64 states to 64 states and 80 transitions. [2022-04-07 18:47:17,774 INFO L78 Accepts]: Start accepts. Automaton has 64 states and 80 transitions. Word has length 18 [2022-04-07 18:47:17,774 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 18:47:17,775 INFO L478 AbstractCegarLoop]: Abstraction has 64 states and 80 transitions. [2022-04-07 18:47:17,775 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 2.7777777777777777) internal successors, (25), 8 states have internal predecessors, (25), 4 states have call successors, (4), 4 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-07 18:47:17,775 INFO L276 IsEmpty]: Start isEmpty. Operand 64 states and 80 transitions. [2022-04-07 18:47:17,775 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-04-07 18:47:17,775 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 18:47:17,775 INFO L499 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 18:47:17,807 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2022-04-07 18:47:17,991 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5,5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 18:47:17,991 INFO L403 AbstractCegarLoop]: === Iteration 7 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 18:47:17,991 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 18:47:17,992 INFO L85 PathProgramCache]: Analyzing trace with hash 2052329254, now seen corresponding path program 1 times [2022-04-07 18:47:17,992 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 18:47:17,992 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [735356233] [2022-04-07 18:47:17,992 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 18:47:17,992 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 18:47:18,001 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-04-07 18:47:18,001 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1063789186] [2022-04-07 18:47:18,001 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 18:47:18,001 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 18:47:18,002 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 18:47:18,002 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 18:47:18,003 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-04-07 18:47:18,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 18:47:18,053 INFO L263 TraceCheckSpWp]: Trace formula consists of 81 conjuncts, 14 conjunts are in the unsatisfiable core [2022-04-07 18:47:18,061 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 18:47:18,061 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 18:47:18,251 INFO L272 TraceCheckUtils]: 0: Hoare triple {1280#true} [85] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1280#true} is VALID [2022-04-07 18:47:18,251 INFO L290 TraceCheckUtils]: 1: Hoare triple {1280#true} [87] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0) (= v_~counter~0_5 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{~counter~0=v_~counter~0_5, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[~counter~0, #NULL.offset, #NULL.base] {1280#true} is VALID [2022-04-07 18:47:18,251 INFO L290 TraceCheckUtils]: 2: Hoare triple {1280#true} [90] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1280#true} is VALID [2022-04-07 18:47:18,252 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1280#true} {1280#true} [115] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1280#true} is VALID [2022-04-07 18:47:18,252 INFO L272 TraceCheckUtils]: 4: Hoare triple {1280#true} [86] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1280#true} is VALID [2022-04-07 18:47:18,252 INFO L290 TraceCheckUtils]: 5: Hoare triple {1280#true} [89] mainENTRY-->L34-3: Formula: (and (= v_main_~B~0_2 1) (= v_main_~B~0_2 v_main_~b~0_3) (= v_main_~q~0_2 0) (= v_main_~A~0_2 |v_main_#t~nondet1_2|) (= v_main_~A~0_2 v_main_~r~0_2)) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~q~0=v_main_~q~0_2, main_~B~0=v_main_~B~0_2, main_~b~0=v_main_~b~0_3, main_~A~0=v_main_~A~0_2, main_~r~0=v_main_~r~0_2} AuxVars[] AssignedVars[main_~q~0, main_#t~nondet1, main_~B~0, main_~b~0, main_~A~0, main_~r~0] {1300#(and (= main_~b~0 1) (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:47:18,252 INFO L290 TraceCheckUtils]: 6: Hoare triple {1300#(and (= main_~b~0 1) (= main_~A~0 main_~r~0) (= main_~q~0 0))} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {1300#(and (= main_~b~0 1) (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:47:18,253 INFO L290 TraceCheckUtils]: 7: Hoare triple {1300#(and (= main_~b~0 1) (= main_~A~0 main_~r~0) (= main_~q~0 0))} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 5) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {1300#(and (= main_~b~0 1) (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:47:18,253 INFO L290 TraceCheckUtils]: 8: Hoare triple {1300#(and (= main_~b~0 1) (= main_~A~0 main_~r~0) (= main_~q~0 0))} [101] L35-->L34-3: Formula: (and (= (* 2 v_main_~b~0_13) v_main_~b~0_12) (<= (mod v_main_~b~0_13 4294967296) (mod v_main_~r~0_10 4294967296))) InVars {main_~b~0=v_main_~b~0_13, main_~r~0=v_main_~r~0_10} OutVars{main_~b~0=v_main_~b~0_12, main_~r~0=v_main_~r~0_10} AuxVars[] AssignedVars[main_~b~0] {1310#(and (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} is VALID [2022-04-07 18:47:18,254 INFO L290 TraceCheckUtils]: 9: Hoare triple {1310#(and (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {1310#(and (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} is VALID [2022-04-07 18:47:18,254 INFO L290 TraceCheckUtils]: 10: Hoare triple {1310#(and (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 5) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {1310#(and (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} is VALID [2022-04-07 18:47:18,254 INFO L290 TraceCheckUtils]: 11: Hoare triple {1310#(and (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} [100] L35-->L43-2: Formula: (not (<= (mod v_main_~b~0_11 4294967296) (mod v_main_~r~0_9 4294967296))) InVars {main_~b~0=v_main_~b~0_11, main_~r~0=v_main_~r~0_9} OutVars{main_~b~0=v_main_~b~0_11, main_~r~0=v_main_~r~0_9} AuxVars[] AssignedVars[] {1310#(and (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} is VALID [2022-04-07 18:47:18,255 INFO L290 TraceCheckUtils]: 12: Hoare triple {1310#(and (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} [94] L43-2-->L38: Formula: (and (= |v_main_#t~post3_1| v_~counter~0_2) (= (+ |v_main_#t~post3_1| 1) v_~counter~0_1)) InVars {~counter~0=v_~counter~0_2} OutVars{~counter~0=v_~counter~0_1, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post3] {1310#(and (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} is VALID [2022-04-07 18:47:18,255 INFO L290 TraceCheckUtils]: 13: Hoare triple {1310#(and (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} [99] L38-->L39: Formula: (< |v_main_#t~post3_5| 5) InVars {main_#t~post3=|v_main_#t~post3_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post3] {1310#(and (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} is VALID [2022-04-07 18:47:18,256 INFO L272 TraceCheckUtils]: 14: Hoare triple {1310#(and (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} [104] L39-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~A~0_6 4294967296) (mod (+ v_main_~r~0_11 (* v_main_~q~0_10 v_main_~b~0_14)) 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~q~0=v_main_~q~0_10, main_~A~0=v_main_~A~0_6, main_~b~0=v_main_~b~0_14, main_~r~0=v_main_~r~0_11} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {1329#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 18:47:18,256 INFO L290 TraceCheckUtils]: 15: Hoare triple {1329#(<= 1 |__VERIFIER_assert_#in~cond|)} [103] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1333#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 18:47:18,257 INFO L290 TraceCheckUtils]: 16: Hoare triple {1333#(<= 1 __VERIFIER_assert_~cond)} [106] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1281#false} is VALID [2022-04-07 18:47:18,257 INFO L290 TraceCheckUtils]: 17: Hoare triple {1281#false} [110] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1281#false} is VALID [2022-04-07 18:47:18,257 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 18:47:18,257 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 18:47:18,548 INFO L290 TraceCheckUtils]: 17: Hoare triple {1281#false} [110] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1281#false} is VALID [2022-04-07 18:47:18,548 INFO L290 TraceCheckUtils]: 16: Hoare triple {1333#(<= 1 __VERIFIER_assert_~cond)} [106] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1281#false} is VALID [2022-04-07 18:47:18,549 INFO L290 TraceCheckUtils]: 15: Hoare triple {1329#(<= 1 |__VERIFIER_assert_#in~cond|)} [103] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1333#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 18:47:18,550 INFO L272 TraceCheckUtils]: 14: Hoare triple {1349#(forall ((main_~b~0 Int)) (= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296)))} [104] L39-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~A~0_6 4294967296) (mod (+ v_main_~r~0_11 (* v_main_~q~0_10 v_main_~b~0_14)) 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~q~0=v_main_~q~0_10, main_~A~0=v_main_~A~0_6, main_~b~0=v_main_~b~0_14, main_~r~0=v_main_~r~0_11} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {1329#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 18:47:18,551 INFO L290 TraceCheckUtils]: 13: Hoare triple {1349#(forall ((main_~b~0 Int)) (= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296)))} [99] L38-->L39: Formula: (< |v_main_#t~post3_5| 5) InVars {main_#t~post3=|v_main_#t~post3_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post3] {1349#(forall ((main_~b~0 Int)) (= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296)))} is VALID [2022-04-07 18:47:18,551 INFO L290 TraceCheckUtils]: 12: Hoare triple {1349#(forall ((main_~b~0 Int)) (= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296)))} [94] L43-2-->L38: Formula: (and (= |v_main_#t~post3_1| v_~counter~0_2) (= (+ |v_main_#t~post3_1| 1) v_~counter~0_1)) InVars {~counter~0=v_~counter~0_2} OutVars{~counter~0=v_~counter~0_1, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post3] {1349#(forall ((main_~b~0 Int)) (= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296)))} is VALID [2022-04-07 18:47:18,552 INFO L290 TraceCheckUtils]: 11: Hoare triple {1349#(forall ((main_~b~0 Int)) (= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296)))} [100] L35-->L43-2: Formula: (not (<= (mod v_main_~b~0_11 4294967296) (mod v_main_~r~0_9 4294967296))) InVars {main_~b~0=v_main_~b~0_11, main_~r~0=v_main_~r~0_9} OutVars{main_~b~0=v_main_~b~0_11, main_~r~0=v_main_~r~0_9} AuxVars[] AssignedVars[] {1349#(forall ((main_~b~0 Int)) (= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296)))} is VALID [2022-04-07 18:47:18,552 INFO L290 TraceCheckUtils]: 10: Hoare triple {1349#(forall ((main_~b~0 Int)) (= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296)))} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 5) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {1349#(forall ((main_~b~0 Int)) (= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296)))} is VALID [2022-04-07 18:47:18,552 INFO L290 TraceCheckUtils]: 9: Hoare triple {1349#(forall ((main_~b~0 Int)) (= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296)))} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {1349#(forall ((main_~b~0 Int)) (= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296)))} is VALID [2022-04-07 18:47:18,553 INFO L290 TraceCheckUtils]: 8: Hoare triple {1368#(or (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (forall ((main_~b~0 Int)) (= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296))))} [101] L35-->L34-3: Formula: (and (= (* 2 v_main_~b~0_13) v_main_~b~0_12) (<= (mod v_main_~b~0_13 4294967296) (mod v_main_~r~0_10 4294967296))) InVars {main_~b~0=v_main_~b~0_13, main_~r~0=v_main_~r~0_10} OutVars{main_~b~0=v_main_~b~0_12, main_~r~0=v_main_~r~0_10} AuxVars[] AssignedVars[main_~b~0] {1349#(forall ((main_~b~0 Int)) (= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296)))} is VALID [2022-04-07 18:47:18,553 INFO L290 TraceCheckUtils]: 7: Hoare triple {1368#(or (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (forall ((main_~b~0 Int)) (= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296))))} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 5) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {1368#(or (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (forall ((main_~b~0 Int)) (= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296))))} is VALID [2022-04-07 18:47:18,554 INFO L290 TraceCheckUtils]: 6: Hoare triple {1368#(or (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (forall ((main_~b~0 Int)) (= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296))))} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {1368#(or (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (forall ((main_~b~0 Int)) (= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296))))} is VALID [2022-04-07 18:47:18,554 INFO L290 TraceCheckUtils]: 5: Hoare triple {1280#true} [89] mainENTRY-->L34-3: Formula: (and (= v_main_~B~0_2 1) (= v_main_~B~0_2 v_main_~b~0_3) (= v_main_~q~0_2 0) (= v_main_~A~0_2 |v_main_#t~nondet1_2|) (= v_main_~A~0_2 v_main_~r~0_2)) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~q~0=v_main_~q~0_2, main_~B~0=v_main_~B~0_2, main_~b~0=v_main_~b~0_3, main_~A~0=v_main_~A~0_2, main_~r~0=v_main_~r~0_2} AuxVars[] AssignedVars[main_~q~0, main_#t~nondet1, main_~B~0, main_~b~0, main_~A~0, main_~r~0] {1368#(or (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (forall ((main_~b~0 Int)) (= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296))))} is VALID [2022-04-07 18:47:18,554 INFO L272 TraceCheckUtils]: 4: Hoare triple {1280#true} [86] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1280#true} is VALID [2022-04-07 18:47:18,554 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1280#true} {1280#true} [115] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1280#true} is VALID [2022-04-07 18:47:18,554 INFO L290 TraceCheckUtils]: 2: Hoare triple {1280#true} [90] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1280#true} is VALID [2022-04-07 18:47:18,555 INFO L290 TraceCheckUtils]: 1: Hoare triple {1280#true} [87] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0) (= v_~counter~0_5 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{~counter~0=v_~counter~0_5, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[~counter~0, #NULL.offset, #NULL.base] {1280#true} is VALID [2022-04-07 18:47:18,555 INFO L272 TraceCheckUtils]: 0: Hoare triple {1280#true} [85] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1280#true} is VALID [2022-04-07 18:47:18,555 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 18:47:18,555 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 18:47:18,555 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [735356233] [2022-04-07 18:47:18,555 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-04-07 18:47:18,555 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1063789186] [2022-04-07 18:47:18,555 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1063789186] provided 1 perfect and 1 imperfect interpolant sequences [2022-04-07 18:47:18,555 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-07 18:47:18,555 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [6] total 8 [2022-04-07 18:47:18,555 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [664274070] [2022-04-07 18:47:18,556 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 18:47:18,556 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 2.3333333333333335) internal successors, (14), 5 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-07 18:47:18,556 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 18:47:18,556 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 6 states, 6 states have (on average 2.3333333333333335) internal successors, (14), 5 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:47:20,610 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 18 edges. 17 inductive. 0 not inductive. 1 times theorem prover too weak to decide inductivity. [2022-04-07 18:47:20,610 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-04-07 18:47:20,611 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 18:47:20,611 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-04-07 18:47:20,611 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2022-04-07 18:47:20,611 INFO L87 Difference]: Start difference. First operand 64 states and 80 transitions. Second operand has 6 states, 6 states have (on average 2.3333333333333335) internal successors, (14), 5 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:47:21,339 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:47:21,339 INFO L93 Difference]: Finished difference Result 88 states and 105 transitions. [2022-04-07 18:47:21,339 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-04-07 18:47:21,340 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 2.3333333333333335) internal successors, (14), 5 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-07 18:47:21,340 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 18:47:21,340 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 2.3333333333333335) internal successors, (14), 5 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:47:21,341 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 40 transitions. [2022-04-07 18:47:21,341 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 2.3333333333333335) internal successors, (14), 5 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:47:21,342 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 40 transitions. [2022-04-07 18:47:21,342 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 6 states and 40 transitions. [2022-04-07 18:47:21,843 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 40 edges. 40 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 18:47:21,844 INFO L225 Difference]: With dead ends: 88 [2022-04-07 18:47:21,844 INFO L226 Difference]: Without dead ends: 88 [2022-04-07 18:47:21,845 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 28 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=50, Unknown=0, NotChecked=0, Total=72 [2022-04-07 18:47:21,845 INFO L913 BasicCegarLoop]: 31 mSDtfsCounter, 11 mSDsluCounter, 67 mSDsCounter, 0 mSdLazyCounter, 8 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 11 SdHoareTripleChecker+Valid, 98 SdHoareTripleChecker+Invalid, 25 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 8 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 17 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 18:47:21,845 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [11 Valid, 98 Invalid, 25 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 8 Invalid, 0 Unknown, 17 Unchecked, 0.0s Time] [2022-04-07 18:47:21,846 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 88 states. [2022-04-07 18:47:21,849 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 88 to 87. [2022-04-07 18:47:21,849 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 18:47:21,850 INFO L82 GeneralOperation]: Start isEquivalent. First operand 88 states. Second operand has 87 states, 66 states have (on average 1.2727272727272727) internal successors, (84), 72 states have internal predecessors, (84), 12 states have call successors, (12), 9 states have call predecessors, (12), 8 states have return successors, (8), 5 states have call predecessors, (8), 8 states have call successors, (8) [2022-04-07 18:47:21,850 INFO L74 IsIncluded]: Start isIncluded. First operand 88 states. Second operand has 87 states, 66 states have (on average 1.2727272727272727) internal successors, (84), 72 states have internal predecessors, (84), 12 states have call successors, (12), 9 states have call predecessors, (12), 8 states have return successors, (8), 5 states have call predecessors, (8), 8 states have call successors, (8) [2022-04-07 18:47:21,850 INFO L87 Difference]: Start difference. First operand 88 states. Second operand has 87 states, 66 states have (on average 1.2727272727272727) internal successors, (84), 72 states have internal predecessors, (84), 12 states have call successors, (12), 9 states have call predecessors, (12), 8 states have return successors, (8), 5 states have call predecessors, (8), 8 states have call successors, (8) [2022-04-07 18:47:21,863 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:47:21,863 INFO L93 Difference]: Finished difference Result 88 states and 105 transitions. [2022-04-07 18:47:21,863 INFO L276 IsEmpty]: Start isEmpty. Operand 88 states and 105 transitions. [2022-04-07 18:47:21,863 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 18:47:21,863 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 18:47:21,864 INFO L74 IsIncluded]: Start isIncluded. First operand has 87 states, 66 states have (on average 1.2727272727272727) internal successors, (84), 72 states have internal predecessors, (84), 12 states have call successors, (12), 9 states have call predecessors, (12), 8 states have return successors, (8), 5 states have call predecessors, (8), 8 states have call successors, (8) Second operand 88 states. [2022-04-07 18:47:21,864 INFO L87 Difference]: Start difference. First operand has 87 states, 66 states have (on average 1.2727272727272727) internal successors, (84), 72 states have internal predecessors, (84), 12 states have call successors, (12), 9 states have call predecessors, (12), 8 states have return successors, (8), 5 states have call predecessors, (8), 8 states have call successors, (8) Second operand 88 states. [2022-04-07 18:47:21,869 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:47:21,869 INFO L93 Difference]: Finished difference Result 88 states and 105 transitions. [2022-04-07 18:47:21,869 INFO L276 IsEmpty]: Start isEmpty. Operand 88 states and 105 transitions. [2022-04-07 18:47:21,869 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 18:47:21,870 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 18:47:21,870 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 18:47:21,870 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 18:47:21,870 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 87 states, 66 states have (on average 1.2727272727272727) internal successors, (84), 72 states have internal predecessors, (84), 12 states have call successors, (12), 9 states have call predecessors, (12), 8 states have return successors, (8), 5 states have call predecessors, (8), 8 states have call successors, (8) [2022-04-07 18:47:21,872 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 87 states to 87 states and 104 transitions. [2022-04-07 18:47:21,872 INFO L78 Accepts]: Start accepts. Automaton has 87 states and 104 transitions. Word has length 18 [2022-04-07 18:47:21,872 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 18:47:21,872 INFO L478 AbstractCegarLoop]: Abstraction has 87 states and 104 transitions. [2022-04-07 18:47:21,872 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 2.3333333333333335) internal successors, (14), 5 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:47:21,872 INFO L276 IsEmpty]: Start isEmpty. Operand 87 states and 104 transitions. [2022-04-07 18:47:21,873 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2022-04-07 18:47:21,873 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 18:47:21,873 INFO L499 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 18:47:21,896 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2022-04-07 18:47:22,090 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6,6 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 18:47:22,090 INFO L403 AbstractCegarLoop]: === Iteration 8 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 18:47:22,091 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 18:47:22,091 INFO L85 PathProgramCache]: Analyzing trace with hash 462666167, now seen corresponding path program 1 times [2022-04-07 18:47:22,091 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 18:47:22,091 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1675590662] [2022-04-07 18:47:22,091 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 18:47:22,091 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 18:47:22,103 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-04-07 18:47:22,103 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [515665875] [2022-04-07 18:47:22,103 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 18:47:22,103 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 18:47:22,103 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 18:47:22,120 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 18:47:22,155 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-04-07 18:47:22,192 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 18:47:22,193 INFO L263 TraceCheckSpWp]: Trace formula consists of 97 conjuncts, 5 conjunts are in the unsatisfiable core [2022-04-07 18:47:22,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 18:47:22,201 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 18:47:22,265 INFO L272 TraceCheckUtils]: 0: Hoare triple {1748#true} [85] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1748#true} is VALID [2022-04-07 18:47:22,265 INFO L290 TraceCheckUtils]: 1: Hoare triple {1748#true} [87] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0) (= v_~counter~0_5 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{~counter~0=v_~counter~0_5, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[~counter~0, #NULL.offset, #NULL.base] {1748#true} is VALID [2022-04-07 18:47:22,265 INFO L290 TraceCheckUtils]: 2: Hoare triple {1748#true} [90] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1748#true} is VALID [2022-04-07 18:47:22,265 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1748#true} {1748#true} [115] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1748#true} is VALID [2022-04-07 18:47:22,265 INFO L272 TraceCheckUtils]: 4: Hoare triple {1748#true} [86] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1748#true} is VALID [2022-04-07 18:47:22,266 INFO L290 TraceCheckUtils]: 5: Hoare triple {1748#true} [89] mainENTRY-->L34-3: Formula: (and (= v_main_~B~0_2 1) (= v_main_~B~0_2 v_main_~b~0_3) (= v_main_~q~0_2 0) (= v_main_~A~0_2 |v_main_#t~nondet1_2|) (= v_main_~A~0_2 v_main_~r~0_2)) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~q~0=v_main_~q~0_2, main_~B~0=v_main_~B~0_2, main_~b~0=v_main_~b~0_3, main_~A~0=v_main_~A~0_2, main_~r~0=v_main_~r~0_2} AuxVars[] AssignedVars[main_~q~0, main_#t~nondet1, main_~B~0, main_~b~0, main_~A~0, main_~r~0] {1768#(and (= main_~B~0 main_~b~0) (= main_~B~0 1))} is VALID [2022-04-07 18:47:22,266 INFO L290 TraceCheckUtils]: 6: Hoare triple {1768#(and (= main_~B~0 main_~b~0) (= main_~B~0 1))} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {1768#(and (= main_~B~0 main_~b~0) (= main_~B~0 1))} is VALID [2022-04-07 18:47:22,267 INFO L290 TraceCheckUtils]: 7: Hoare triple {1768#(and (= main_~B~0 main_~b~0) (= main_~B~0 1))} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 5) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {1768#(and (= main_~B~0 main_~b~0) (= main_~B~0 1))} is VALID [2022-04-07 18:47:22,267 INFO L290 TraceCheckUtils]: 8: Hoare triple {1768#(and (= main_~B~0 main_~b~0) (= main_~B~0 1))} [100] L35-->L43-2: Formula: (not (<= (mod v_main_~b~0_11 4294967296) (mod v_main_~r~0_9 4294967296))) InVars {main_~b~0=v_main_~b~0_11, main_~r~0=v_main_~r~0_9} OutVars{main_~b~0=v_main_~b~0_11, main_~r~0=v_main_~r~0_9} AuxVars[] AssignedVars[] {1768#(and (= main_~B~0 main_~b~0) (= main_~B~0 1))} is VALID [2022-04-07 18:47:22,267 INFO L290 TraceCheckUtils]: 9: Hoare triple {1768#(and (= main_~B~0 main_~b~0) (= main_~B~0 1))} [94] L43-2-->L38: Formula: (and (= |v_main_#t~post3_1| v_~counter~0_2) (= (+ |v_main_#t~post3_1| 1) v_~counter~0_1)) InVars {~counter~0=v_~counter~0_2} OutVars{~counter~0=v_~counter~0_1, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post3] {1768#(and (= main_~B~0 main_~b~0) (= main_~B~0 1))} is VALID [2022-04-07 18:47:22,268 INFO L290 TraceCheckUtils]: 10: Hoare triple {1768#(and (= main_~B~0 main_~b~0) (= main_~B~0 1))} [99] L38-->L39: Formula: (< |v_main_#t~post3_5| 5) InVars {main_#t~post3=|v_main_#t~post3_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post3] {1768#(and (= main_~B~0 main_~b~0) (= main_~B~0 1))} is VALID [2022-04-07 18:47:22,268 INFO L272 TraceCheckUtils]: 11: Hoare triple {1768#(and (= main_~B~0 main_~b~0) (= main_~B~0 1))} [104] L39-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~A~0_6 4294967296) (mod (+ v_main_~r~0_11 (* v_main_~q~0_10 v_main_~b~0_14)) 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~q~0=v_main_~q~0_10, main_~A~0=v_main_~A~0_6, main_~b~0=v_main_~b~0_14, main_~r~0=v_main_~r~0_11} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {1748#true} is VALID [2022-04-07 18:47:22,268 INFO L290 TraceCheckUtils]: 12: Hoare triple {1748#true} [103] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1748#true} is VALID [2022-04-07 18:47:22,268 INFO L290 TraceCheckUtils]: 13: Hoare triple {1748#true} [107] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_3 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1748#true} is VALID [2022-04-07 18:47:22,268 INFO L290 TraceCheckUtils]: 14: Hoare triple {1748#true} [112] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1748#true} is VALID [2022-04-07 18:47:22,269 INFO L284 TraceCheckUtils]: 15: Hoare quadruple {1748#true} {1768#(and (= main_~B~0 main_~b~0) (= main_~B~0 1))} [117] __VERIFIER_assertEXIT-->L39-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= (ite (= (mod v_main_~A~0_6 4294967296) (mod (+ v_main_~r~0_11 (* v_main_~q~0_10 v_main_~b~0_14)) 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~q~0=v_main_~q~0_10, main_~A~0=v_main_~A~0_6, main_~b~0=v_main_~b~0_14, main_~r~0=v_main_~r~0_11} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {1768#(and (= main_~B~0 main_~b~0) (= main_~B~0 1))} is VALID [2022-04-07 18:47:22,269 INFO L290 TraceCheckUtils]: 16: Hoare triple {1768#(and (= main_~B~0 main_~b~0) (= main_~B~0 1))} [109] L39-1-->L43: Formula: (let ((.cse0 (mod v_main_~b~0_7 4294967296))) (and (= (* v_main_~q~0_6 2) v_main_~q~0_5) (= v_main_~b~0_6 (div .cse0 2)) (not (= (mod v_main_~B~0_5 4294967296) .cse0)))) InVars {main_~q~0=v_main_~q~0_6, main_~B~0=v_main_~B~0_5, main_~b~0=v_main_~b~0_7} OutVars{main_~q~0=v_main_~q~0_5, main_~B~0=v_main_~B~0_5, main_~b~0=v_main_~b~0_6} AuxVars[] AssignedVars[main_~q~0, main_~b~0] {1749#false} is VALID [2022-04-07 18:47:22,269 INFO L290 TraceCheckUtils]: 17: Hoare triple {1749#false} [113] L43-->L43-2: Formula: (and (<= (mod v_main_~b~0_8 4294967296) (mod v_main_~r~0_6 4294967296)) (= v_main_~q~0_7 (+ v_main_~q~0_8 1)) (= (+ (* (- 1) v_main_~b~0_8) v_main_~r~0_6) v_main_~r~0_5)) InVars {main_~q~0=v_main_~q~0_8, main_~b~0=v_main_~b~0_8, main_~r~0=v_main_~r~0_6} OutVars{main_~q~0=v_main_~q~0_7, main_~b~0=v_main_~b~0_8, main_~r~0=v_main_~r~0_5} AuxVars[] AssignedVars[main_~q~0, main_~r~0] {1749#false} is VALID [2022-04-07 18:47:22,269 INFO L290 TraceCheckUtils]: 18: Hoare triple {1749#false} [94] L43-2-->L38: Formula: (and (= |v_main_#t~post3_1| v_~counter~0_2) (= (+ |v_main_#t~post3_1| 1) v_~counter~0_1)) InVars {~counter~0=v_~counter~0_2} OutVars{~counter~0=v_~counter~0_1, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post3] {1749#false} is VALID [2022-04-07 18:47:22,269 INFO L290 TraceCheckUtils]: 19: Hoare triple {1749#false} [99] L38-->L39: Formula: (< |v_main_#t~post3_5| 5) InVars {main_#t~post3=|v_main_#t~post3_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post3] {1749#false} is VALID [2022-04-07 18:47:22,270 INFO L272 TraceCheckUtils]: 20: Hoare triple {1749#false} [104] L39-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~A~0_6 4294967296) (mod (+ v_main_~r~0_11 (* v_main_~q~0_10 v_main_~b~0_14)) 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~q~0=v_main_~q~0_10, main_~A~0=v_main_~A~0_6, main_~b~0=v_main_~b~0_14, main_~r~0=v_main_~r~0_11} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {1749#false} is VALID [2022-04-07 18:47:22,270 INFO L290 TraceCheckUtils]: 21: Hoare triple {1749#false} [103] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1749#false} is VALID [2022-04-07 18:47:22,270 INFO L290 TraceCheckUtils]: 22: Hoare triple {1749#false} [106] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1749#false} is VALID [2022-04-07 18:47:22,270 INFO L290 TraceCheckUtils]: 23: Hoare triple {1749#false} [110] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1749#false} is VALID [2022-04-07 18:47:22,270 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 18:47:22,270 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-07 18:47:22,270 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 18:47:22,270 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1675590662] [2022-04-07 18:47:22,270 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-04-07 18:47:22,270 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [515665875] [2022-04-07 18:47:22,270 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [515665875] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 18:47:22,270 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 18:47:22,270 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-07 18:47:22,271 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [539259788] [2022-04-07 18:47:22,271 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 18:47:22,271 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 3 states have call successors, (4), 2 states have call predecessors, (4), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Word has length 24 [2022-04-07 18:47:22,271 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 18:47:22,271 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 3 states have call successors, (4), 2 states have call predecessors, (4), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 18:47:22,286 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 24 edges. 24 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 18:47:22,286 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-07 18:47:22,286 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 18:47:22,286 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-07 18:47:22,287 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-07 18:47:22,287 INFO L87 Difference]: Start difference. First operand 87 states and 104 transitions. Second operand has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 3 states have call successors, (4), 2 states have call predecessors, (4), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 18:47:22,323 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:47:22,324 INFO L93 Difference]: Finished difference Result 83 states and 97 transitions. [2022-04-07 18:47:22,324 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-07 18:47:22,324 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 3 states have call successors, (4), 2 states have call predecessors, (4), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Word has length 24 [2022-04-07 18:47:22,324 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 18:47:22,324 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 3 states have call successors, (4), 2 states have call predecessors, (4), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 18:47:22,325 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 35 transitions. [2022-04-07 18:47:22,325 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 3 states have call successors, (4), 2 states have call predecessors, (4), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 18:47:22,325 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 35 transitions. [2022-04-07 18:47:22,326 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 35 transitions. [2022-04-07 18:47:22,348 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 35 edges. 35 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 18:47:22,349 INFO L225 Difference]: With dead ends: 83 [2022-04-07 18:47:22,349 INFO L226 Difference]: Without dead ends: 73 [2022-04-07 18:47:22,349 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-07 18:47:22,350 INFO L913 BasicCegarLoop]: 25 mSDtfsCounter, 0 mSDsluCounter, 17 mSDsCounter, 0 mSdLazyCounter, 10 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 42 SdHoareTripleChecker+Invalid, 10 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 10 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 18:47:22,350 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [0 Valid, 42 Invalid, 10 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 10 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 18:47:22,350 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 73 states. [2022-04-07 18:47:22,353 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 73 to 73. [2022-04-07 18:47:22,353 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 18:47:22,353 INFO L82 GeneralOperation]: Start isEquivalent. First operand 73 states. Second operand has 73 states, 56 states have (on average 1.2678571428571428) internal successors, (71), 60 states have internal predecessors, (71), 10 states have call successors, (10), 8 states have call predecessors, (10), 6 states have return successors, (6), 4 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-07 18:47:22,353 INFO L74 IsIncluded]: Start isIncluded. First operand 73 states. Second operand has 73 states, 56 states have (on average 1.2678571428571428) internal successors, (71), 60 states have internal predecessors, (71), 10 states have call successors, (10), 8 states have call predecessors, (10), 6 states have return successors, (6), 4 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-07 18:47:22,354 INFO L87 Difference]: Start difference. First operand 73 states. Second operand has 73 states, 56 states have (on average 1.2678571428571428) internal successors, (71), 60 states have internal predecessors, (71), 10 states have call successors, (10), 8 states have call predecessors, (10), 6 states have return successors, (6), 4 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-07 18:47:22,355 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:47:22,355 INFO L93 Difference]: Finished difference Result 73 states and 87 transitions. [2022-04-07 18:47:22,355 INFO L276 IsEmpty]: Start isEmpty. Operand 73 states and 87 transitions. [2022-04-07 18:47:22,355 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 18:47:22,355 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 18:47:22,355 INFO L74 IsIncluded]: Start isIncluded. First operand has 73 states, 56 states have (on average 1.2678571428571428) internal successors, (71), 60 states have internal predecessors, (71), 10 states have call successors, (10), 8 states have call predecessors, (10), 6 states have return successors, (6), 4 states have call predecessors, (6), 6 states have call successors, (6) Second operand 73 states. [2022-04-07 18:47:22,356 INFO L87 Difference]: Start difference. First operand has 73 states, 56 states have (on average 1.2678571428571428) internal successors, (71), 60 states have internal predecessors, (71), 10 states have call successors, (10), 8 states have call predecessors, (10), 6 states have return successors, (6), 4 states have call predecessors, (6), 6 states have call successors, (6) Second operand 73 states. [2022-04-07 18:47:22,357 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:47:22,357 INFO L93 Difference]: Finished difference Result 73 states and 87 transitions. [2022-04-07 18:47:22,357 INFO L276 IsEmpty]: Start isEmpty. Operand 73 states and 87 transitions. [2022-04-07 18:47:22,357 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 18:47:22,357 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 18:47:22,357 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 18:47:22,357 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 18:47:22,358 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 73 states, 56 states have (on average 1.2678571428571428) internal successors, (71), 60 states have internal predecessors, (71), 10 states have call successors, (10), 8 states have call predecessors, (10), 6 states have return successors, (6), 4 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-07 18:47:22,359 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 73 states to 73 states and 87 transitions. [2022-04-07 18:47:22,359 INFO L78 Accepts]: Start accepts. Automaton has 73 states and 87 transitions. Word has length 24 [2022-04-07 18:47:22,359 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 18:47:22,359 INFO L478 AbstractCegarLoop]: Abstraction has 73 states and 87 transitions. [2022-04-07 18:47:22,359 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 3 states have call successors, (4), 2 states have call predecessors, (4), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 18:47:22,359 INFO L276 IsEmpty]: Start isEmpty. Operand 73 states and 87 transitions. [2022-04-07 18:47:22,359 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2022-04-07 18:47:22,359 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 18:47:22,360 INFO L499 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 18:47:22,378 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2022-04-07 18:47:22,575 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7,7 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 18:47:22,576 INFO L403 AbstractCegarLoop]: === Iteration 9 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 18:47:22,576 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 18:47:22,576 INFO L85 PathProgramCache]: Analyzing trace with hash 1651364104, now seen corresponding path program 1 times [2022-04-07 18:47:22,576 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 18:47:22,576 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2142697210] [2022-04-07 18:47:22,576 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 18:47:22,576 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 18:47:22,590 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-04-07 18:47:22,591 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [821083965] [2022-04-07 18:47:22,591 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 18:47:22,591 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 18:47:22,591 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 18:47:22,592 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 18:47:22,592 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2022-04-07 18:47:22,623 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 18:47:22,624 INFO L263 TraceCheckSpWp]: Trace formula consists of 92 conjuncts, 11 conjunts are in the unsatisfiable core [2022-04-07 18:47:22,628 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 18:47:22,630 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 18:47:22,769 INFO L272 TraceCheckUtils]: 0: Hoare triple {2124#true} [85] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2124#true} is VALID [2022-04-07 18:47:22,769 INFO L290 TraceCheckUtils]: 1: Hoare triple {2124#true} [87] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0) (= v_~counter~0_5 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{~counter~0=v_~counter~0_5, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[~counter~0, #NULL.offset, #NULL.base] {2124#true} is VALID [2022-04-07 18:47:22,769 INFO L290 TraceCheckUtils]: 2: Hoare triple {2124#true} [90] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2124#true} is VALID [2022-04-07 18:47:22,769 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2124#true} {2124#true} [115] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2124#true} is VALID [2022-04-07 18:47:22,769 INFO L272 TraceCheckUtils]: 4: Hoare triple {2124#true} [86] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2124#true} is VALID [2022-04-07 18:47:22,769 INFO L290 TraceCheckUtils]: 5: Hoare triple {2124#true} [89] mainENTRY-->L34-3: Formula: (and (= v_main_~B~0_2 1) (= v_main_~B~0_2 v_main_~b~0_3) (= v_main_~q~0_2 0) (= v_main_~A~0_2 |v_main_#t~nondet1_2|) (= v_main_~A~0_2 v_main_~r~0_2)) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~q~0=v_main_~q~0_2, main_~B~0=v_main_~B~0_2, main_~b~0=v_main_~b~0_3, main_~A~0=v_main_~A~0_2, main_~r~0=v_main_~r~0_2} AuxVars[] AssignedVars[main_~q~0, main_#t~nondet1, main_~B~0, main_~b~0, main_~A~0, main_~r~0] {2124#true} is VALID [2022-04-07 18:47:22,769 INFO L290 TraceCheckUtils]: 6: Hoare triple {2124#true} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {2124#true} is VALID [2022-04-07 18:47:22,769 INFO L290 TraceCheckUtils]: 7: Hoare triple {2124#true} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 5) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {2124#true} is VALID [2022-04-07 18:47:22,769 INFO L290 TraceCheckUtils]: 8: Hoare triple {2124#true} [101] L35-->L34-3: Formula: (and (= (* 2 v_main_~b~0_13) v_main_~b~0_12) (<= (mod v_main_~b~0_13 4294967296) (mod v_main_~r~0_10 4294967296))) InVars {main_~b~0=v_main_~b~0_13, main_~r~0=v_main_~r~0_10} OutVars{main_~b~0=v_main_~b~0_12, main_~r~0=v_main_~r~0_10} AuxVars[] AssignedVars[main_~b~0] {2124#true} is VALID [2022-04-07 18:47:22,770 INFO L290 TraceCheckUtils]: 9: Hoare triple {2124#true} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {2124#true} is VALID [2022-04-07 18:47:22,770 INFO L290 TraceCheckUtils]: 10: Hoare triple {2124#true} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 5) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {2124#true} is VALID [2022-04-07 18:47:22,770 INFO L290 TraceCheckUtils]: 11: Hoare triple {2124#true} [100] L35-->L43-2: Formula: (not (<= (mod v_main_~b~0_11 4294967296) (mod v_main_~r~0_9 4294967296))) InVars {main_~b~0=v_main_~b~0_11, main_~r~0=v_main_~r~0_9} OutVars{main_~b~0=v_main_~b~0_11, main_~r~0=v_main_~r~0_9} AuxVars[] AssignedVars[] {2124#true} is VALID [2022-04-07 18:47:22,770 INFO L290 TraceCheckUtils]: 12: Hoare triple {2124#true} [94] L43-2-->L38: Formula: (and (= |v_main_#t~post3_1| v_~counter~0_2) (= (+ |v_main_#t~post3_1| 1) v_~counter~0_1)) InVars {~counter~0=v_~counter~0_2} OutVars{~counter~0=v_~counter~0_1, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post3] {2124#true} is VALID [2022-04-07 18:47:22,770 INFO L290 TraceCheckUtils]: 13: Hoare triple {2124#true} [99] L38-->L39: Formula: (< |v_main_#t~post3_5| 5) InVars {main_#t~post3=|v_main_#t~post3_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post3] {2124#true} is VALID [2022-04-07 18:47:22,770 INFO L272 TraceCheckUtils]: 14: Hoare triple {2124#true} [104] L39-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~A~0_6 4294967296) (mod (+ v_main_~r~0_11 (* v_main_~q~0_10 v_main_~b~0_14)) 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~q~0=v_main_~q~0_10, main_~A~0=v_main_~A~0_6, main_~b~0=v_main_~b~0_14, main_~r~0=v_main_~r~0_11} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {2124#true} is VALID [2022-04-07 18:47:22,770 INFO L290 TraceCheckUtils]: 15: Hoare triple {2124#true} [103] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2174#(= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)} is VALID [2022-04-07 18:47:22,771 INFO L290 TraceCheckUtils]: 16: Hoare triple {2174#(= |__VERIFIER_assert_#in~cond| __VERIFIER_assert_~cond)} [107] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_3 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2178#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 18:47:22,771 INFO L290 TraceCheckUtils]: 17: Hoare triple {2178#(not (= |__VERIFIER_assert_#in~cond| 0))} [112] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2178#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 18:47:22,772 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {2178#(not (= |__VERIFIER_assert_#in~cond| 0))} {2124#true} [117] __VERIFIER_assertEXIT-->L39-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= (ite (= (mod v_main_~A~0_6 4294967296) (mod (+ v_main_~r~0_11 (* v_main_~q~0_10 v_main_~b~0_14)) 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~q~0=v_main_~q~0_10, main_~A~0=v_main_~A~0_6, main_~b~0=v_main_~b~0_14, main_~r~0=v_main_~r~0_11} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {2185#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296))} is VALID [2022-04-07 18:47:22,772 INFO L290 TraceCheckUtils]: 19: Hoare triple {2185#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296))} [108] L39-1-->L38-2: Formula: (= (mod v_main_~B~0_1 4294967296) (mod v_main_~b~0_2 4294967296)) InVars {main_~b~0=v_main_~b~0_2, main_~B~0=v_main_~B~0_1} OutVars{main_~b~0=v_main_~b~0_2, main_~B~0=v_main_~B~0_1} AuxVars[] AssignedVars[] {2185#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296))} is VALID [2022-04-07 18:47:22,772 INFO L272 TraceCheckUtils]: 20: Hoare triple {2185#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296))} [97] L38-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_2| (ite (= (mod v_main_~A~0_7 4294967296) (mod (+ v_main_~r~0_12 (* v_main_~q~0_11 v_main_~b~0_15)) 4294967296)) 1 0)) InVars {main_~q~0=v_main_~q~0_11, main_~A~0=v_main_~A~0_7, main_~b~0=v_main_~b~0_15, main_~r~0=v_main_~r~0_12} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_2|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {2192#(= |__VERIFIER_assert_#in~cond| 1)} is VALID [2022-04-07 18:47:22,773 INFO L290 TraceCheckUtils]: 21: Hoare triple {2192#(= |__VERIFIER_assert_#in~cond| 1)} [103] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2196#(= __VERIFIER_assert_~cond 1)} is VALID [2022-04-07 18:47:22,773 INFO L290 TraceCheckUtils]: 22: Hoare triple {2196#(= __VERIFIER_assert_~cond 1)} [106] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2125#false} is VALID [2022-04-07 18:47:22,773 INFO L290 TraceCheckUtils]: 23: Hoare triple {2125#false} [110] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2125#false} is VALID [2022-04-07 18:47:22,773 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-07 18:47:22,773 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 18:47:23,361 INFO L290 TraceCheckUtils]: 23: Hoare triple {2125#false} [110] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2125#false} is VALID [2022-04-07 18:47:23,362 INFO L290 TraceCheckUtils]: 22: Hoare triple {2206#(not (= __VERIFIER_assert_~cond 0))} [106] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2125#false} is VALID [2022-04-07 18:47:23,362 INFO L290 TraceCheckUtils]: 21: Hoare triple {2178#(not (= |__VERIFIER_assert_#in~cond| 0))} [103] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2206#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 18:47:23,363 INFO L272 TraceCheckUtils]: 20: Hoare triple {2185#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296))} [97] L38-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_2| (ite (= (mod v_main_~A~0_7 4294967296) (mod (+ v_main_~r~0_12 (* v_main_~q~0_11 v_main_~b~0_15)) 4294967296)) 1 0)) InVars {main_~q~0=v_main_~q~0_11, main_~A~0=v_main_~A~0_7, main_~b~0=v_main_~b~0_15, main_~r~0=v_main_~r~0_12} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_2|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {2178#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 18:47:23,363 INFO L290 TraceCheckUtils]: 19: Hoare triple {2185#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296))} [108] L39-1-->L38-2: Formula: (= (mod v_main_~B~0_1 4294967296) (mod v_main_~b~0_2 4294967296)) InVars {main_~b~0=v_main_~b~0_2, main_~B~0=v_main_~B~0_1} OutVars{main_~b~0=v_main_~b~0_2, main_~B~0=v_main_~B~0_1} AuxVars[] AssignedVars[] {2185#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296))} is VALID [2022-04-07 18:47:23,364 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {2178#(not (= |__VERIFIER_assert_#in~cond| 0))} {2124#true} [117] __VERIFIER_assertEXIT-->L39-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= (ite (= (mod v_main_~A~0_6 4294967296) (mod (+ v_main_~r~0_11 (* v_main_~q~0_10 v_main_~b~0_14)) 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~q~0=v_main_~q~0_10, main_~A~0=v_main_~A~0_6, main_~b~0=v_main_~b~0_14, main_~r~0=v_main_~r~0_11} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {2185#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296))} is VALID [2022-04-07 18:47:23,364 INFO L290 TraceCheckUtils]: 17: Hoare triple {2178#(not (= |__VERIFIER_assert_#in~cond| 0))} [112] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2178#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 18:47:23,365 INFO L290 TraceCheckUtils]: 16: Hoare triple {2228#(or (not (= |__VERIFIER_assert_#in~cond| 0)) (= __VERIFIER_assert_~cond 0))} [107] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_3 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2178#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 18:47:23,365 INFO L290 TraceCheckUtils]: 15: Hoare triple {2124#true} [103] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2228#(or (not (= |__VERIFIER_assert_#in~cond| 0)) (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 18:47:23,365 INFO L272 TraceCheckUtils]: 14: Hoare triple {2124#true} [104] L39-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~A~0_6 4294967296) (mod (+ v_main_~r~0_11 (* v_main_~q~0_10 v_main_~b~0_14)) 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~q~0=v_main_~q~0_10, main_~A~0=v_main_~A~0_6, main_~b~0=v_main_~b~0_14, main_~r~0=v_main_~r~0_11} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {2124#true} is VALID [2022-04-07 18:47:23,365 INFO L290 TraceCheckUtils]: 13: Hoare triple {2124#true} [99] L38-->L39: Formula: (< |v_main_#t~post3_5| 5) InVars {main_#t~post3=|v_main_#t~post3_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post3] {2124#true} is VALID [2022-04-07 18:47:23,365 INFO L290 TraceCheckUtils]: 12: Hoare triple {2124#true} [94] L43-2-->L38: Formula: (and (= |v_main_#t~post3_1| v_~counter~0_2) (= (+ |v_main_#t~post3_1| 1) v_~counter~0_1)) InVars {~counter~0=v_~counter~0_2} OutVars{~counter~0=v_~counter~0_1, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post3] {2124#true} is VALID [2022-04-07 18:47:23,365 INFO L290 TraceCheckUtils]: 11: Hoare triple {2124#true} [100] L35-->L43-2: Formula: (not (<= (mod v_main_~b~0_11 4294967296) (mod v_main_~r~0_9 4294967296))) InVars {main_~b~0=v_main_~b~0_11, main_~r~0=v_main_~r~0_9} OutVars{main_~b~0=v_main_~b~0_11, main_~r~0=v_main_~r~0_9} AuxVars[] AssignedVars[] {2124#true} is VALID [2022-04-07 18:47:23,365 INFO L290 TraceCheckUtils]: 10: Hoare triple {2124#true} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 5) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {2124#true} is VALID [2022-04-07 18:47:23,366 INFO L290 TraceCheckUtils]: 9: Hoare triple {2124#true} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {2124#true} is VALID [2022-04-07 18:47:23,366 INFO L290 TraceCheckUtils]: 8: Hoare triple {2124#true} [101] L35-->L34-3: Formula: (and (= (* 2 v_main_~b~0_13) v_main_~b~0_12) (<= (mod v_main_~b~0_13 4294967296) (mod v_main_~r~0_10 4294967296))) InVars {main_~b~0=v_main_~b~0_13, main_~r~0=v_main_~r~0_10} OutVars{main_~b~0=v_main_~b~0_12, main_~r~0=v_main_~r~0_10} AuxVars[] AssignedVars[main_~b~0] {2124#true} is VALID [2022-04-07 18:47:23,366 INFO L290 TraceCheckUtils]: 7: Hoare triple {2124#true} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 5) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {2124#true} is VALID [2022-04-07 18:47:23,366 INFO L290 TraceCheckUtils]: 6: Hoare triple {2124#true} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {2124#true} is VALID [2022-04-07 18:47:23,366 INFO L290 TraceCheckUtils]: 5: Hoare triple {2124#true} [89] mainENTRY-->L34-3: Formula: (and (= v_main_~B~0_2 1) (= v_main_~B~0_2 v_main_~b~0_3) (= v_main_~q~0_2 0) (= v_main_~A~0_2 |v_main_#t~nondet1_2|) (= v_main_~A~0_2 v_main_~r~0_2)) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~q~0=v_main_~q~0_2, main_~B~0=v_main_~B~0_2, main_~b~0=v_main_~b~0_3, main_~A~0=v_main_~A~0_2, main_~r~0=v_main_~r~0_2} AuxVars[] AssignedVars[main_~q~0, main_#t~nondet1, main_~B~0, main_~b~0, main_~A~0, main_~r~0] {2124#true} is VALID [2022-04-07 18:47:23,366 INFO L272 TraceCheckUtils]: 4: Hoare triple {2124#true} [86] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2124#true} is VALID [2022-04-07 18:47:23,366 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2124#true} {2124#true} [115] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2124#true} is VALID [2022-04-07 18:47:23,366 INFO L290 TraceCheckUtils]: 2: Hoare triple {2124#true} [90] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2124#true} is VALID [2022-04-07 18:47:23,366 INFO L290 TraceCheckUtils]: 1: Hoare triple {2124#true} [87] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0) (= v_~counter~0_5 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{~counter~0=v_~counter~0_5, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[~counter~0, #NULL.offset, #NULL.base] {2124#true} is VALID [2022-04-07 18:47:23,366 INFO L272 TraceCheckUtils]: 0: Hoare triple {2124#true} [85] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2124#true} is VALID [2022-04-07 18:47:23,367 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-07 18:47:23,367 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 18:47:23,367 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2142697210] [2022-04-07 18:47:23,367 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-04-07 18:47:23,367 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [821083965] [2022-04-07 18:47:23,367 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [821083965] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 18:47:23,367 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-04-07 18:47:23,367 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 6] total 9 [2022-04-07 18:47:23,367 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1939715693] [2022-04-07 18:47:23,367 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-04-07 18:47:23,368 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 2.2222222222222223) internal successors, (20), 8 states have internal predecessors, (20), 2 states have call successors, (5), 3 states have call predecessors, (5), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) Word has length 24 [2022-04-07 18:47:23,368 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 18:47:23,368 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 9 states, 9 states have (on average 2.2222222222222223) internal successors, (20), 8 states have internal predecessors, (20), 2 states have call successors, (5), 3 states have call predecessors, (5), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-07 18:47:23,386 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 27 edges. 27 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 18:47:23,386 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2022-04-07 18:47:23,386 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 18:47:23,386 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2022-04-07 18:47:23,387 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72 [2022-04-07 18:47:23,387 INFO L87 Difference]: Start difference. First operand 73 states and 87 transitions. Second operand has 9 states, 9 states have (on average 2.2222222222222223) internal successors, (20), 8 states have internal predecessors, (20), 2 states have call successors, (5), 3 states have call predecessors, (5), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-07 18:47:26,177 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:47:26,178 INFO L93 Difference]: Finished difference Result 82 states and 93 transitions. [2022-04-07 18:47:26,178 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-04-07 18:47:26,178 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 2.2222222222222223) internal successors, (20), 8 states have internal predecessors, (20), 2 states have call successors, (5), 3 states have call predecessors, (5), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) Word has length 24 [2022-04-07 18:47:26,178 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 18:47:26,178 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 9 states have (on average 2.2222222222222223) internal successors, (20), 8 states have internal predecessors, (20), 2 states have call successors, (5), 3 states have call predecessors, (5), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-07 18:47:26,179 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 34 transitions. [2022-04-07 18:47:26,179 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 9 states have (on average 2.2222222222222223) internal successors, (20), 8 states have internal predecessors, (20), 2 states have call successors, (5), 3 states have call predecessors, (5), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-07 18:47:26,180 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 34 transitions. [2022-04-07 18:47:26,180 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 7 states and 34 transitions. [2022-04-07 18:47:26,206 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 34 edges. 34 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 18:47:26,207 INFO L225 Difference]: With dead ends: 82 [2022-04-07 18:47:26,207 INFO L226 Difference]: Without dead ends: 69 [2022-04-07 18:47:26,207 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 40 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=35, Invalid=75, Unknown=0, NotChecked=0, Total=110 [2022-04-07 18:47:26,208 INFO L913 BasicCegarLoop]: 21 mSDtfsCounter, 12 mSDsluCounter, 98 mSDsCounter, 0 mSdLazyCounter, 57 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 12 SdHoareTripleChecker+Valid, 119 SdHoareTripleChecker+Invalid, 60 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 57 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-04-07 18:47:26,208 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [12 Valid, 119 Invalid, 60 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 57 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-04-07 18:47:26,208 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69 states. [2022-04-07 18:47:26,211 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69 to 69. [2022-04-07 18:47:26,211 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 18:47:26,211 INFO L82 GeneralOperation]: Start isEquivalent. First operand 69 states. Second operand has 69 states, 54 states have (on average 1.2222222222222223) internal successors, (66), 57 states have internal predecessors, (66), 8 states have call successors, (8), 7 states have call predecessors, (8), 6 states have return successors, (6), 4 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-07 18:47:26,211 INFO L74 IsIncluded]: Start isIncluded. First operand 69 states. Second operand has 69 states, 54 states have (on average 1.2222222222222223) internal successors, (66), 57 states have internal predecessors, (66), 8 states have call successors, (8), 7 states have call predecessors, (8), 6 states have return successors, (6), 4 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-07 18:47:26,211 INFO L87 Difference]: Start difference. First operand 69 states. Second operand has 69 states, 54 states have (on average 1.2222222222222223) internal successors, (66), 57 states have internal predecessors, (66), 8 states have call successors, (8), 7 states have call predecessors, (8), 6 states have return successors, (6), 4 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-07 18:47:26,213 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:47:26,213 INFO L93 Difference]: Finished difference Result 69 states and 80 transitions. [2022-04-07 18:47:26,213 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 80 transitions. [2022-04-07 18:47:26,213 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 18:47:26,213 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 18:47:26,213 INFO L74 IsIncluded]: Start isIncluded. First operand has 69 states, 54 states have (on average 1.2222222222222223) internal successors, (66), 57 states have internal predecessors, (66), 8 states have call successors, (8), 7 states have call predecessors, (8), 6 states have return successors, (6), 4 states have call predecessors, (6), 6 states have call successors, (6) Second operand 69 states. [2022-04-07 18:47:26,214 INFO L87 Difference]: Start difference. First operand has 69 states, 54 states have (on average 1.2222222222222223) internal successors, (66), 57 states have internal predecessors, (66), 8 states have call successors, (8), 7 states have call predecessors, (8), 6 states have return successors, (6), 4 states have call predecessors, (6), 6 states have call successors, (6) Second operand 69 states. [2022-04-07 18:47:26,215 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:47:26,215 INFO L93 Difference]: Finished difference Result 69 states and 80 transitions. [2022-04-07 18:47:26,215 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 80 transitions. [2022-04-07 18:47:26,215 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 18:47:26,215 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 18:47:26,215 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 18:47:26,215 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 18:47:26,216 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 69 states, 54 states have (on average 1.2222222222222223) internal successors, (66), 57 states have internal predecessors, (66), 8 states have call successors, (8), 7 states have call predecessors, (8), 6 states have return successors, (6), 4 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-07 18:47:26,217 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69 states to 69 states and 80 transitions. [2022-04-07 18:47:26,217 INFO L78 Accepts]: Start accepts. Automaton has 69 states and 80 transitions. Word has length 24 [2022-04-07 18:47:26,217 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 18:47:26,217 INFO L478 AbstractCegarLoop]: Abstraction has 69 states and 80 transitions. [2022-04-07 18:47:26,217 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 2.2222222222222223) internal successors, (20), 8 states have internal predecessors, (20), 2 states have call successors, (5), 3 states have call predecessors, (5), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-07 18:47:26,217 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 80 transitions. [2022-04-07 18:47:26,217 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2022-04-07 18:47:26,217 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 18:47:26,218 INFO L499 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 18:47:26,236 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2022-04-07 18:47:26,431 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8,8 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 18:47:26,431 INFO L403 AbstractCegarLoop]: === Iteration 10 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 18:47:26,432 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 18:47:26,432 INFO L85 PathProgramCache]: Analyzing trace with hash -268589446, now seen corresponding path program 1 times [2022-04-07 18:47:26,432 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 18:47:26,432 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [119350969] [2022-04-07 18:47:26,432 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 18:47:26,432 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 18:47:26,442 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-04-07 18:47:26,442 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1251009300] [2022-04-07 18:47:26,442 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 18:47:26,442 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 18:47:26,442 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 18:47:26,443 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 18:47:26,444 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2022-04-07 18:47:26,504 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 18:47:26,505 INFO L263 TraceCheckSpWp]: Trace formula consists of 105 conjuncts, 25 conjunts are in the unsatisfiable core [2022-04-07 18:47:26,513 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 18:47:26,514 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 18:47:27,297 INFO L272 TraceCheckUtils]: 0: Hoare triple {2569#true} [85] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2569#true} is VALID [2022-04-07 18:47:27,297 INFO L290 TraceCheckUtils]: 1: Hoare triple {2569#true} [87] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0) (= v_~counter~0_5 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{~counter~0=v_~counter~0_5, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[~counter~0, #NULL.offset, #NULL.base] {2569#true} is VALID [2022-04-07 18:47:27,297 INFO L290 TraceCheckUtils]: 2: Hoare triple {2569#true} [90] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2569#true} is VALID [2022-04-07 18:47:27,297 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2569#true} {2569#true} [115] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2569#true} is VALID [2022-04-07 18:47:27,297 INFO L272 TraceCheckUtils]: 4: Hoare triple {2569#true} [86] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2569#true} is VALID [2022-04-07 18:47:27,303 INFO L290 TraceCheckUtils]: 5: Hoare triple {2569#true} [89] mainENTRY-->L34-3: Formula: (and (= v_main_~B~0_2 1) (= v_main_~B~0_2 v_main_~b~0_3) (= v_main_~q~0_2 0) (= v_main_~A~0_2 |v_main_#t~nondet1_2|) (= v_main_~A~0_2 v_main_~r~0_2)) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~q~0=v_main_~q~0_2, main_~B~0=v_main_~B~0_2, main_~b~0=v_main_~b~0_3, main_~A~0=v_main_~A~0_2, main_~r~0=v_main_~r~0_2} AuxVars[] AssignedVars[main_~q~0, main_#t~nondet1, main_~B~0, main_~b~0, main_~A~0, main_~r~0] {2589#(and (= main_~b~0 1) (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:47:27,304 INFO L290 TraceCheckUtils]: 6: Hoare triple {2589#(and (= main_~b~0 1) (= main_~A~0 main_~r~0) (= main_~q~0 0))} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {2589#(and (= main_~b~0 1) (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:47:27,305 INFO L290 TraceCheckUtils]: 7: Hoare triple {2589#(and (= main_~b~0 1) (= main_~A~0 main_~r~0) (= main_~q~0 0))} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 5) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {2589#(and (= main_~b~0 1) (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:47:27,307 INFO L290 TraceCheckUtils]: 8: Hoare triple {2589#(and (= main_~b~0 1) (= main_~A~0 main_~r~0) (= main_~q~0 0))} [101] L35-->L34-3: Formula: (and (= (* 2 v_main_~b~0_13) v_main_~b~0_12) (<= (mod v_main_~b~0_13 4294967296) (mod v_main_~r~0_10 4294967296))) InVars {main_~b~0=v_main_~b~0_13, main_~r~0=v_main_~r~0_10} OutVars{main_~b~0=v_main_~b~0_12, main_~r~0=v_main_~r~0_10} AuxVars[] AssignedVars[main_~b~0] {2599#(and (= main_~b~0 2) (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} is VALID [2022-04-07 18:47:27,308 INFO L290 TraceCheckUtils]: 9: Hoare triple {2599#(and (= main_~b~0 2) (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {2599#(and (= main_~b~0 2) (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} is VALID [2022-04-07 18:47:27,308 INFO L290 TraceCheckUtils]: 10: Hoare triple {2599#(and (= main_~b~0 2) (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 5) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {2599#(and (= main_~b~0 2) (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} is VALID [2022-04-07 18:47:27,309 INFO L290 TraceCheckUtils]: 11: Hoare triple {2599#(and (= main_~b~0 2) (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} [100] L35-->L43-2: Formula: (not (<= (mod v_main_~b~0_11 4294967296) (mod v_main_~r~0_9 4294967296))) InVars {main_~b~0=v_main_~b~0_11, main_~r~0=v_main_~r~0_9} OutVars{main_~b~0=v_main_~b~0_11, main_~r~0=v_main_~r~0_9} AuxVars[] AssignedVars[] {2609#(and (= main_~b~0 2) (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} is VALID [2022-04-07 18:47:27,309 INFO L290 TraceCheckUtils]: 12: Hoare triple {2609#(and (= main_~b~0 2) (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} [94] L43-2-->L38: Formula: (and (= |v_main_#t~post3_1| v_~counter~0_2) (= (+ |v_main_#t~post3_1| 1) v_~counter~0_1)) InVars {~counter~0=v_~counter~0_2} OutVars{~counter~0=v_~counter~0_1, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post3] {2609#(and (= main_~b~0 2) (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} is VALID [2022-04-07 18:47:27,309 INFO L290 TraceCheckUtils]: 13: Hoare triple {2609#(and (= main_~b~0 2) (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} [99] L38-->L39: Formula: (< |v_main_#t~post3_5| 5) InVars {main_#t~post3=|v_main_#t~post3_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post3] {2609#(and (= main_~b~0 2) (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} is VALID [2022-04-07 18:47:27,310 INFO L272 TraceCheckUtils]: 14: Hoare triple {2609#(and (= main_~b~0 2) (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} [104] L39-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~A~0_6 4294967296) (mod (+ v_main_~r~0_11 (* v_main_~q~0_10 v_main_~b~0_14)) 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~q~0=v_main_~q~0_10, main_~A~0=v_main_~A~0_6, main_~b~0=v_main_~b~0_14, main_~r~0=v_main_~r~0_11} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {2569#true} is VALID [2022-04-07 18:47:27,310 INFO L290 TraceCheckUtils]: 15: Hoare triple {2569#true} [103] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2569#true} is VALID [2022-04-07 18:47:27,310 INFO L290 TraceCheckUtils]: 16: Hoare triple {2569#true} [107] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_3 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2569#true} is VALID [2022-04-07 18:47:27,310 INFO L290 TraceCheckUtils]: 17: Hoare triple {2569#true} [112] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2569#true} is VALID [2022-04-07 18:47:27,310 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {2569#true} {2609#(and (= main_~b~0 2) (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} [117] __VERIFIER_assertEXIT-->L39-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= (ite (= (mod v_main_~A~0_6 4294967296) (mod (+ v_main_~r~0_11 (* v_main_~q~0_10 v_main_~b~0_14)) 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~q~0=v_main_~q~0_10, main_~A~0=v_main_~A~0_6, main_~b~0=v_main_~b~0_14, main_~r~0=v_main_~r~0_11} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {2609#(and (= main_~b~0 2) (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} is VALID [2022-04-07 18:47:27,312 INFO L290 TraceCheckUtils]: 19: Hoare triple {2609#(and (= main_~b~0 2) (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (= main_~A~0 main_~r~0) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} [109] L39-1-->L43: Formula: (let ((.cse0 (mod v_main_~b~0_7 4294967296))) (and (= (* v_main_~q~0_6 2) v_main_~q~0_5) (= v_main_~b~0_6 (div .cse0 2)) (not (= (mod v_main_~B~0_5 4294967296) .cse0)))) InVars {main_~q~0=v_main_~q~0_6, main_~B~0=v_main_~B~0_5, main_~b~0=v_main_~b~0_7} OutVars{main_~q~0=v_main_~q~0_5, main_~B~0=v_main_~B~0_5, main_~b~0=v_main_~b~0_6} AuxVars[] AssignedVars[main_~q~0, main_~b~0] {2634#(and (= main_~b~0 1) (= main_~A~0 main_~r~0) (not (<= 2 (mod main_~r~0 4294967296))) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} is VALID [2022-04-07 18:47:27,313 INFO L290 TraceCheckUtils]: 20: Hoare triple {2634#(and (= main_~b~0 1) (= main_~A~0 main_~r~0) (not (<= 2 (mod main_~r~0 4294967296))) (<= 1 (mod main_~r~0 4294967296)) (= main_~q~0 0))} [113] L43-->L43-2: Formula: (and (<= (mod v_main_~b~0_8 4294967296) (mod v_main_~r~0_6 4294967296)) (= v_main_~q~0_7 (+ v_main_~q~0_8 1)) (= (+ (* (- 1) v_main_~b~0_8) v_main_~r~0_6) v_main_~r~0_5)) InVars {main_~q~0=v_main_~q~0_8, main_~b~0=v_main_~b~0_8, main_~r~0=v_main_~r~0_6} OutVars{main_~q~0=v_main_~q~0_7, main_~b~0=v_main_~b~0_8, main_~r~0=v_main_~r~0_5} AuxVars[] AssignedVars[main_~q~0, main_~r~0] {2638#(and (= (+ main_~A~0 (* (- 1) main_~b~0)) main_~r~0) (= main_~b~0 1) (not (<= 2 (mod main_~A~0 4294967296))) (<= 1 (mod main_~A~0 4294967296)) (= main_~q~0 1))} is VALID [2022-04-07 18:47:27,313 INFO L290 TraceCheckUtils]: 21: Hoare triple {2638#(and (= (+ main_~A~0 (* (- 1) main_~b~0)) main_~r~0) (= main_~b~0 1) (not (<= 2 (mod main_~A~0 4294967296))) (<= 1 (mod main_~A~0 4294967296)) (= main_~q~0 1))} [94] L43-2-->L38: Formula: (and (= |v_main_#t~post3_1| v_~counter~0_2) (= (+ |v_main_#t~post3_1| 1) v_~counter~0_1)) InVars {~counter~0=v_~counter~0_2} OutVars{~counter~0=v_~counter~0_1, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post3] {2638#(and (= (+ main_~A~0 (* (- 1) main_~b~0)) main_~r~0) (= main_~b~0 1) (not (<= 2 (mod main_~A~0 4294967296))) (<= 1 (mod main_~A~0 4294967296)) (= main_~q~0 1))} is VALID [2022-04-07 18:47:27,322 INFO L290 TraceCheckUtils]: 22: Hoare triple {2638#(and (= (+ main_~A~0 (* (- 1) main_~b~0)) main_~r~0) (= main_~b~0 1) (not (<= 2 (mod main_~A~0 4294967296))) (<= 1 (mod main_~A~0 4294967296)) (= main_~q~0 1))} [99] L38-->L39: Formula: (< |v_main_#t~post3_5| 5) InVars {main_#t~post3=|v_main_#t~post3_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post3] {2638#(and (= (+ main_~A~0 (* (- 1) main_~b~0)) main_~r~0) (= main_~b~0 1) (not (<= 2 (mod main_~A~0 4294967296))) (<= 1 (mod main_~A~0 4294967296)) (= main_~q~0 1))} is VALID [2022-04-07 18:47:27,324 INFO L272 TraceCheckUtils]: 23: Hoare triple {2638#(and (= (+ main_~A~0 (* (- 1) main_~b~0)) main_~r~0) (= main_~b~0 1) (not (<= 2 (mod main_~A~0 4294967296))) (<= 1 (mod main_~A~0 4294967296)) (= main_~q~0 1))} [104] L39-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~A~0_6 4294967296) (mod (+ v_main_~r~0_11 (* v_main_~q~0_10 v_main_~b~0_14)) 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~q~0=v_main_~q~0_10, main_~A~0=v_main_~A~0_6, main_~b~0=v_main_~b~0_14, main_~r~0=v_main_~r~0_11} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {2648#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 18:47:27,324 INFO L290 TraceCheckUtils]: 24: Hoare triple {2648#(<= 1 |__VERIFIER_assert_#in~cond|)} [103] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2652#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 18:47:27,325 INFO L290 TraceCheckUtils]: 25: Hoare triple {2652#(<= 1 __VERIFIER_assert_~cond)} [106] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2570#false} is VALID [2022-04-07 18:47:27,325 INFO L290 TraceCheckUtils]: 26: Hoare triple {2570#false} [110] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2570#false} is VALID [2022-04-07 18:47:27,325 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 18:47:27,325 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 18:47:36,148 WARN L855 $PredicateComparison]: unable to prove that (let ((.cse0 (mod c_main_~b~0 4294967296))) (or (= (mod c_main_~A~0 4294967296) (mod (+ (* (div .cse0 2) (* c_main_~q~0 2)) c_main_~r~0) 4294967296)) (<= .cse0 (mod c_main_~r~0 4294967296)))) is different from true [2022-04-07 18:47:51,195 WARN L855 $PredicateComparison]: unable to prove that (let ((.cse1 (mod (* c_main_~b~0 2) 4294967296)) (.cse0 (mod c_main_~r~0 4294967296))) (or (not (<= (mod c_main_~b~0 4294967296) .cse0)) (= (mod c_main_~A~0 4294967296) (mod (+ (* (div .cse1 2) (* c_main_~q~0 2)) c_main_~r~0) 4294967296)) (<= .cse1 .cse0))) is different from true [2022-04-07 18:48:12,377 INFO L290 TraceCheckUtils]: 26: Hoare triple {2570#false} [110] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2570#false} is VALID [2022-04-07 18:48:12,377 INFO L290 TraceCheckUtils]: 25: Hoare triple {2652#(<= 1 __VERIFIER_assert_~cond)} [106] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2570#false} is VALID [2022-04-07 18:48:12,378 INFO L290 TraceCheckUtils]: 24: Hoare triple {2648#(<= 1 |__VERIFIER_assert_#in~cond|)} [103] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2652#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 18:48:12,378 INFO L272 TraceCheckUtils]: 23: Hoare triple {2668#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296))} [104] L39-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~A~0_6 4294967296) (mod (+ v_main_~r~0_11 (* v_main_~q~0_10 v_main_~b~0_14)) 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~q~0=v_main_~q~0_10, main_~A~0=v_main_~A~0_6, main_~b~0=v_main_~b~0_14, main_~r~0=v_main_~r~0_11} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {2648#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 18:48:12,379 INFO L290 TraceCheckUtils]: 22: Hoare triple {2668#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296))} [99] L38-->L39: Formula: (< |v_main_#t~post3_5| 5) InVars {main_#t~post3=|v_main_#t~post3_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post3] {2668#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296))} is VALID [2022-04-07 18:48:12,379 INFO L290 TraceCheckUtils]: 21: Hoare triple {2668#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296))} [94] L43-2-->L38: Formula: (and (= |v_main_#t~post3_1| v_~counter~0_2) (= (+ |v_main_#t~post3_1| 1) v_~counter~0_1)) InVars {~counter~0=v_~counter~0_2} OutVars{~counter~0=v_~counter~0_1, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post3] {2668#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296))} is VALID [2022-04-07 18:48:14,385 WARN L290 TraceCheckUtils]: 20: Hoare triple {2668#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296))} [113] L43-->L43-2: Formula: (and (<= (mod v_main_~b~0_8 4294967296) (mod v_main_~r~0_6 4294967296)) (= v_main_~q~0_7 (+ v_main_~q~0_8 1)) (= (+ (* (- 1) v_main_~b~0_8) v_main_~r~0_6) v_main_~r~0_5)) InVars {main_~q~0=v_main_~q~0_8, main_~b~0=v_main_~b~0_8, main_~r~0=v_main_~r~0_6} OutVars{main_~q~0=v_main_~q~0_7, main_~b~0=v_main_~b~0_8, main_~r~0=v_main_~r~0_5} AuxVars[] AssignedVars[main_~q~0, main_~r~0] {2668#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296))} is UNKNOWN [2022-04-07 18:48:16,388 WARN L290 TraceCheckUtils]: 19: Hoare triple {2681#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* (div (mod main_~b~0 4294967296) 2) (* main_~q~0 2))) 4294967296))} [109] L39-1-->L43: Formula: (let ((.cse0 (mod v_main_~b~0_7 4294967296))) (and (= (* v_main_~q~0_6 2) v_main_~q~0_5) (= v_main_~b~0_6 (div .cse0 2)) (not (= (mod v_main_~B~0_5 4294967296) .cse0)))) InVars {main_~q~0=v_main_~q~0_6, main_~B~0=v_main_~B~0_5, main_~b~0=v_main_~b~0_7} OutVars{main_~q~0=v_main_~q~0_5, main_~B~0=v_main_~B~0_5, main_~b~0=v_main_~b~0_6} AuxVars[] AssignedVars[main_~q~0, main_~b~0] {2668#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* main_~b~0 main_~q~0)) 4294967296))} is UNKNOWN [2022-04-07 18:48:16,389 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {2569#true} {2681#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* (div (mod main_~b~0 4294967296) 2) (* main_~q~0 2))) 4294967296))} [117] __VERIFIER_assertEXIT-->L39-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= (ite (= (mod v_main_~A~0_6 4294967296) (mod (+ v_main_~r~0_11 (* v_main_~q~0_10 v_main_~b~0_14)) 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~q~0=v_main_~q~0_10, main_~A~0=v_main_~A~0_6, main_~b~0=v_main_~b~0_14, main_~r~0=v_main_~r~0_11} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {2681#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* (div (mod main_~b~0 4294967296) 2) (* main_~q~0 2))) 4294967296))} is VALID [2022-04-07 18:48:16,389 INFO L290 TraceCheckUtils]: 17: Hoare triple {2569#true} [112] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2569#true} is VALID [2022-04-07 18:48:16,389 INFO L290 TraceCheckUtils]: 16: Hoare triple {2569#true} [107] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_3 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2569#true} is VALID [2022-04-07 18:48:16,389 INFO L290 TraceCheckUtils]: 15: Hoare triple {2569#true} [103] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2569#true} is VALID [2022-04-07 18:48:16,389 INFO L272 TraceCheckUtils]: 14: Hoare triple {2681#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* (div (mod main_~b~0 4294967296) 2) (* main_~q~0 2))) 4294967296))} [104] L39-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~A~0_6 4294967296) (mod (+ v_main_~r~0_11 (* v_main_~q~0_10 v_main_~b~0_14)) 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~q~0=v_main_~q~0_10, main_~A~0=v_main_~A~0_6, main_~b~0=v_main_~b~0_14, main_~r~0=v_main_~r~0_11} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {2569#true} is VALID [2022-04-07 18:48:16,389 INFO L290 TraceCheckUtils]: 13: Hoare triple {2681#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* (div (mod main_~b~0 4294967296) 2) (* main_~q~0 2))) 4294967296))} [99] L38-->L39: Formula: (< |v_main_#t~post3_5| 5) InVars {main_#t~post3=|v_main_#t~post3_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post3] {2681#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* (div (mod main_~b~0 4294967296) 2) (* main_~q~0 2))) 4294967296))} is VALID [2022-04-07 18:48:16,390 INFO L290 TraceCheckUtils]: 12: Hoare triple {2681#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* (div (mod main_~b~0 4294967296) 2) (* main_~q~0 2))) 4294967296))} [94] L43-2-->L38: Formula: (and (= |v_main_#t~post3_1| v_~counter~0_2) (= (+ |v_main_#t~post3_1| 1) v_~counter~0_1)) InVars {~counter~0=v_~counter~0_2} OutVars{~counter~0=v_~counter~0_1, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post3] {2681#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* (div (mod main_~b~0 4294967296) 2) (* main_~q~0 2))) 4294967296))} is VALID [2022-04-07 18:48:16,390 INFO L290 TraceCheckUtils]: 11: Hoare triple {2706#(or (= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* (div (mod main_~b~0 4294967296) 2) (* main_~q~0 2))) 4294967296)) (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296)))} [100] L35-->L43-2: Formula: (not (<= (mod v_main_~b~0_11 4294967296) (mod v_main_~r~0_9 4294967296))) InVars {main_~b~0=v_main_~b~0_11, main_~r~0=v_main_~r~0_9} OutVars{main_~b~0=v_main_~b~0_11, main_~r~0=v_main_~r~0_9} AuxVars[] AssignedVars[] {2681#(= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* (div (mod main_~b~0 4294967296) 2) (* main_~q~0 2))) 4294967296))} is VALID [2022-04-07 18:48:16,391 INFO L290 TraceCheckUtils]: 10: Hoare triple {2706#(or (= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* (div (mod main_~b~0 4294967296) 2) (* main_~q~0 2))) 4294967296)) (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296)))} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 5) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {2706#(or (= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* (div (mod main_~b~0 4294967296) 2) (* main_~q~0 2))) 4294967296)) (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296)))} is VALID [2022-04-07 18:48:16,391 INFO L290 TraceCheckUtils]: 9: Hoare triple {2706#(or (= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* (div (mod main_~b~0 4294967296) 2) (* main_~q~0 2))) 4294967296)) (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296)))} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {2706#(or (= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* (div (mod main_~b~0 4294967296) 2) (* main_~q~0 2))) 4294967296)) (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296)))} is VALID [2022-04-07 18:48:18,507 WARN L290 TraceCheckUtils]: 8: Hoare triple {2716#(or (= (mod main_~A~0 4294967296) (mod (+ (* (* main_~q~0 2) (div (mod (* main_~b~0 2) 4294967296) 2)) main_~r~0) 4294967296)) (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (<= (mod (* main_~b~0 2) 4294967296) (mod main_~r~0 4294967296)))} [101] L35-->L34-3: Formula: (and (= (* 2 v_main_~b~0_13) v_main_~b~0_12) (<= (mod v_main_~b~0_13 4294967296) (mod v_main_~r~0_10 4294967296))) InVars {main_~b~0=v_main_~b~0_13, main_~r~0=v_main_~r~0_10} OutVars{main_~b~0=v_main_~b~0_12, main_~r~0=v_main_~r~0_10} AuxVars[] AssignedVars[main_~b~0] {2706#(or (= (mod main_~A~0 4294967296) (mod (+ main_~r~0 (* (div (mod main_~b~0 4294967296) 2) (* main_~q~0 2))) 4294967296)) (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296)))} is UNKNOWN [2022-04-07 18:48:18,511 INFO L290 TraceCheckUtils]: 7: Hoare triple {2716#(or (= (mod main_~A~0 4294967296) (mod (+ (* (* main_~q~0 2) (div (mod (* main_~b~0 2) 4294967296) 2)) main_~r~0) 4294967296)) (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (<= (mod (* main_~b~0 2) 4294967296) (mod main_~r~0 4294967296)))} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 5) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {2716#(or (= (mod main_~A~0 4294967296) (mod (+ (* (* main_~q~0 2) (div (mod (* main_~b~0 2) 4294967296) 2)) main_~r~0) 4294967296)) (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (<= (mod (* main_~b~0 2) 4294967296) (mod main_~r~0 4294967296)))} is VALID [2022-04-07 18:48:18,512 INFO L290 TraceCheckUtils]: 6: Hoare triple {2716#(or (= (mod main_~A~0 4294967296) (mod (+ (* (* main_~q~0 2) (div (mod (* main_~b~0 2) 4294967296) 2)) main_~r~0) 4294967296)) (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (<= (mod (* main_~b~0 2) 4294967296) (mod main_~r~0 4294967296)))} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {2716#(or (= (mod main_~A~0 4294967296) (mod (+ (* (* main_~q~0 2) (div (mod (* main_~b~0 2) 4294967296) 2)) main_~r~0) 4294967296)) (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (<= (mod (* main_~b~0 2) 4294967296) (mod main_~r~0 4294967296)))} is VALID [2022-04-07 18:48:18,512 INFO L290 TraceCheckUtils]: 5: Hoare triple {2569#true} [89] mainENTRY-->L34-3: Formula: (and (= v_main_~B~0_2 1) (= v_main_~B~0_2 v_main_~b~0_3) (= v_main_~q~0_2 0) (= v_main_~A~0_2 |v_main_#t~nondet1_2|) (= v_main_~A~0_2 v_main_~r~0_2)) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~q~0=v_main_~q~0_2, main_~B~0=v_main_~B~0_2, main_~b~0=v_main_~b~0_3, main_~A~0=v_main_~A~0_2, main_~r~0=v_main_~r~0_2} AuxVars[] AssignedVars[main_~q~0, main_#t~nondet1, main_~B~0, main_~b~0, main_~A~0, main_~r~0] {2716#(or (= (mod main_~A~0 4294967296) (mod (+ (* (* main_~q~0 2) (div (mod (* main_~b~0 2) 4294967296) 2)) main_~r~0) 4294967296)) (not (<= (mod main_~b~0 4294967296) (mod main_~r~0 4294967296))) (<= (mod (* main_~b~0 2) 4294967296) (mod main_~r~0 4294967296)))} is VALID [2022-04-07 18:48:18,512 INFO L272 TraceCheckUtils]: 4: Hoare triple {2569#true} [86] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2569#true} is VALID [2022-04-07 18:48:18,512 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2569#true} {2569#true} [115] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2569#true} is VALID [2022-04-07 18:48:18,512 INFO L290 TraceCheckUtils]: 2: Hoare triple {2569#true} [90] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2569#true} is VALID [2022-04-07 18:48:18,512 INFO L290 TraceCheckUtils]: 1: Hoare triple {2569#true} [87] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0) (= v_~counter~0_5 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{~counter~0=v_~counter~0_5, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[~counter~0, #NULL.offset, #NULL.base] {2569#true} is VALID [2022-04-07 18:48:18,513 INFO L272 TraceCheckUtils]: 0: Hoare triple {2569#true} [85] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2569#true} is VALID [2022-04-07 18:48:18,513 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 3 not checked. [2022-04-07 18:48:18,513 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 18:48:18,513 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [119350969] [2022-04-07 18:48:18,513 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-04-07 18:48:18,513 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1251009300] [2022-04-07 18:48:18,513 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1251009300] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 18:48:18,513 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-04-07 18:48:18,513 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 8] total 13 [2022-04-07 18:48:18,513 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [87789214] [2022-04-07 18:48:18,513 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-04-07 18:48:18,514 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 2.6153846153846154) internal successors, (34), 12 states have internal predecessors, (34), 5 states have call successors, (6), 2 states have call predecessors, (6), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Word has length 27 [2022-04-07 18:48:18,514 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 18:48:18,514 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 13 states, 13 states have (on average 2.6153846153846154) internal successors, (34), 12 states have internal predecessors, (34), 5 states have call successors, (6), 2 states have call predecessors, (6), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 18:48:24,716 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 43 edges. 40 inductive. 0 not inductive. 3 times theorem prover too weak to decide inductivity. [2022-04-07 18:48:24,716 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 13 states [2022-04-07 18:48:24,717 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 18:48:24,717 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2022-04-07 18:48:24,717 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=82, Unknown=2, NotChecked=38, Total=156 [2022-04-07 18:48:24,717 INFO L87 Difference]: Start difference. First operand 69 states and 80 transitions. Second operand has 13 states, 13 states have (on average 2.6153846153846154) internal successors, (34), 12 states have internal predecessors, (34), 5 states have call successors, (6), 2 states have call predecessors, (6), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 18:48:31,562 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=true, quantifiers [] [2022-04-07 18:48:33,790 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=true, quantifiers [] [2022-04-07 18:48:35,923 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.13s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=true, quantifiers [] [2022-04-07 18:48:38,026 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.10s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=true, quantifiers [] [2022-04-07 18:48:40,127 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.10s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=true, quantifiers [] [2022-04-07 18:48:44,721 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-04-07 18:48:47,129 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=true, quantifiers [] [2022-04-07 18:48:51,495 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:48:51,495 INFO L93 Difference]: Finished difference Result 79 states and 89 transitions. [2022-04-07 18:48:51,496 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-04-07 18:48:51,496 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 2.6153846153846154) internal successors, (34), 12 states have internal predecessors, (34), 5 states have call successors, (6), 2 states have call predecessors, (6), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Word has length 27 [2022-04-07 18:48:51,496 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 18:48:51,496 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13 states, 13 states have (on average 2.6153846153846154) internal successors, (34), 12 states have internal predecessors, (34), 5 states have call successors, (6), 2 states have call predecessors, (6), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 18:48:51,497 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 64 transitions. [2022-04-07 18:48:51,497 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13 states, 13 states have (on average 2.6153846153846154) internal successors, (34), 12 states have internal predecessors, (34), 5 states have call successors, (6), 2 states have call predecessors, (6), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 18:48:51,498 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 64 transitions. [2022-04-07 18:48:51,498 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 11 states and 64 transitions. [2022-04-07 18:48:55,627 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 64 edges. 62 inductive. 0 not inductive. 2 times theorem prover too weak to decide inductivity. [2022-04-07 18:48:55,628 INFO L225 Difference]: With dead ends: 79 [2022-04-07 18:48:55,628 INFO L226 Difference]: Without dead ends: 79 [2022-04-07 18:48:55,628 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 57 GetRequests, 40 SyntacticMatches, 4 SemanticMatches, 13 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 32 ImplicationChecksByTransitivity, 9.3s TimeCoverageRelationStatistics Valid=46, Invalid=116, Unknown=2, NotChecked=46, Total=210 [2022-04-07 18:48:55,628 INFO L913 BasicCegarLoop]: 23 mSDtfsCounter, 24 mSDsluCounter, 106 mSDsCounter, 0 mSdLazyCounter, 86 mSolverCounterSat, 10 mSolverCounterUnsat, 7 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 14.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 26 SdHoareTripleChecker+Valid, 129 SdHoareTripleChecker+Invalid, 187 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Valid, 86 IncrementalHoareTripleChecker+Invalid, 7 IncrementalHoareTripleChecker+Unknown, 84 IncrementalHoareTripleChecker+Unchecked, 15.4s IncrementalHoareTripleChecker+Time [2022-04-07 18:48:55,629 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [26 Valid, 129 Invalid, 187 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [10 Valid, 86 Invalid, 7 Unknown, 84 Unchecked, 15.4s Time] [2022-04-07 18:48:55,629 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 79 states. [2022-04-07 18:48:55,631 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 79 to 71. [2022-04-07 18:48:55,631 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 18:48:55,631 INFO L82 GeneralOperation]: Start isEquivalent. First operand 79 states. Second operand has 71 states, 56 states have (on average 1.1964285714285714) internal successors, (67), 58 states have internal predecessors, (67), 8 states have call successors, (8), 7 states have call predecessors, (8), 6 states have return successors, (6), 5 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-07 18:48:55,631 INFO L74 IsIncluded]: Start isIncluded. First operand 79 states. Second operand has 71 states, 56 states have (on average 1.1964285714285714) internal successors, (67), 58 states have internal predecessors, (67), 8 states have call successors, (8), 7 states have call predecessors, (8), 6 states have return successors, (6), 5 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-07 18:48:55,632 INFO L87 Difference]: Start difference. First operand 79 states. Second operand has 71 states, 56 states have (on average 1.1964285714285714) internal successors, (67), 58 states have internal predecessors, (67), 8 states have call successors, (8), 7 states have call predecessors, (8), 6 states have return successors, (6), 5 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-07 18:48:55,633 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:48:55,633 INFO L93 Difference]: Finished difference Result 79 states and 89 transitions. [2022-04-07 18:48:55,633 INFO L276 IsEmpty]: Start isEmpty. Operand 79 states and 89 transitions. [2022-04-07 18:48:55,633 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 18:48:55,633 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 18:48:55,633 INFO L74 IsIncluded]: Start isIncluded. First operand has 71 states, 56 states have (on average 1.1964285714285714) internal successors, (67), 58 states have internal predecessors, (67), 8 states have call successors, (8), 7 states have call predecessors, (8), 6 states have return successors, (6), 5 states have call predecessors, (6), 6 states have call successors, (6) Second operand 79 states. [2022-04-07 18:48:55,633 INFO L87 Difference]: Start difference. First operand has 71 states, 56 states have (on average 1.1964285714285714) internal successors, (67), 58 states have internal predecessors, (67), 8 states have call successors, (8), 7 states have call predecessors, (8), 6 states have return successors, (6), 5 states have call predecessors, (6), 6 states have call successors, (6) Second operand 79 states. [2022-04-07 18:48:55,634 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:48:55,634 INFO L93 Difference]: Finished difference Result 79 states and 89 transitions. [2022-04-07 18:48:55,634 INFO L276 IsEmpty]: Start isEmpty. Operand 79 states and 89 transitions. [2022-04-07 18:48:55,634 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 18:48:55,635 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 18:48:55,635 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 18:48:55,635 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 18:48:55,635 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 71 states, 56 states have (on average 1.1964285714285714) internal successors, (67), 58 states have internal predecessors, (67), 8 states have call successors, (8), 7 states have call predecessors, (8), 6 states have return successors, (6), 5 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-07 18:48:55,636 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 71 states to 71 states and 81 transitions. [2022-04-07 18:48:55,636 INFO L78 Accepts]: Start accepts. Automaton has 71 states and 81 transitions. Word has length 27 [2022-04-07 18:48:55,636 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 18:48:55,636 INFO L478 AbstractCegarLoop]: Abstraction has 71 states and 81 transitions. [2022-04-07 18:48:55,636 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 13 states, 13 states have (on average 2.6153846153846154) internal successors, (34), 12 states have internal predecessors, (34), 5 states have call successors, (6), 2 states have call predecessors, (6), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 18:48:55,636 INFO L276 IsEmpty]: Start isEmpty. Operand 71 states and 81 transitions. [2022-04-07 18:48:55,636 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2022-04-07 18:48:55,636 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 18:48:55,636 INFO L499 BasicCegarLoop]: trace histogram [5, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 18:48:55,653 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2022-04-07 18:48:55,843 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable9 [2022-04-07 18:48:55,843 INFO L403 AbstractCegarLoop]: === Iteration 11 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 18:48:55,844 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 18:48:55,844 INFO L85 PathProgramCache]: Analyzing trace with hash 331066096, now seen corresponding path program 2 times [2022-04-07 18:48:55,844 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 18:48:55,844 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [215507356] [2022-04-07 18:48:55,844 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 18:48:55,844 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 18:48:55,874 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-04-07 18:48:55,874 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [854003654] [2022-04-07 18:48:55,874 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-07 18:48:55,874 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 18:48:55,874 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 18:48:55,877 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 18:48:55,878 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2022-04-07 18:48:55,909 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2022-04-07 18:48:55,909 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 18:48:55,924 INFO L263 TraceCheckSpWp]: Trace formula consists of 72 conjuncts, 7 conjunts are in the unsatisfiable core [2022-04-07 18:48:55,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 18:48:55,931 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 18:48:56,086 INFO L272 TraceCheckUtils]: 0: Hoare triple {3057#true} [85] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3057#true} is VALID [2022-04-07 18:48:56,087 INFO L290 TraceCheckUtils]: 1: Hoare triple {3057#true} [87] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0) (= v_~counter~0_5 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{~counter~0=v_~counter~0_5, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[~counter~0, #NULL.offset, #NULL.base] {3057#true} is VALID [2022-04-07 18:48:56,087 INFO L290 TraceCheckUtils]: 2: Hoare triple {3057#true} [90] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3057#true} is VALID [2022-04-07 18:48:56,087 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3057#true} {3057#true} [115] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3057#true} is VALID [2022-04-07 18:48:56,087 INFO L272 TraceCheckUtils]: 4: Hoare triple {3057#true} [86] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3057#true} is VALID [2022-04-07 18:48:56,087 INFO L290 TraceCheckUtils]: 5: Hoare triple {3057#true} [89] mainENTRY-->L34-3: Formula: (and (= v_main_~B~0_2 1) (= v_main_~B~0_2 v_main_~b~0_3) (= v_main_~q~0_2 0) (= v_main_~A~0_2 |v_main_#t~nondet1_2|) (= v_main_~A~0_2 v_main_~r~0_2)) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~q~0=v_main_~q~0_2, main_~B~0=v_main_~B~0_2, main_~b~0=v_main_~b~0_3, main_~A~0=v_main_~A~0_2, main_~r~0=v_main_~r~0_2} AuxVars[] AssignedVars[main_~q~0, main_#t~nondet1, main_~B~0, main_~b~0, main_~A~0, main_~r~0] {3077#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:48:56,088 INFO L290 TraceCheckUtils]: 6: Hoare triple {3077#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {3077#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:48:56,089 INFO L290 TraceCheckUtils]: 7: Hoare triple {3077#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 5) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {3077#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:48:56,089 INFO L290 TraceCheckUtils]: 8: Hoare triple {3077#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} [101] L35-->L34-3: Formula: (and (= (* 2 v_main_~b~0_13) v_main_~b~0_12) (<= (mod v_main_~b~0_13 4294967296) (mod v_main_~r~0_10 4294967296))) InVars {main_~b~0=v_main_~b~0_13, main_~r~0=v_main_~r~0_10} OutVars{main_~b~0=v_main_~b~0_12, main_~r~0=v_main_~r~0_10} AuxVars[] AssignedVars[main_~b~0] {3077#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:48:56,089 INFO L290 TraceCheckUtils]: 9: Hoare triple {3077#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {3077#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:48:56,090 INFO L290 TraceCheckUtils]: 10: Hoare triple {3077#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 5) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {3077#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:48:56,090 INFO L290 TraceCheckUtils]: 11: Hoare triple {3077#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} [101] L35-->L34-3: Formula: (and (= (* 2 v_main_~b~0_13) v_main_~b~0_12) (<= (mod v_main_~b~0_13 4294967296) (mod v_main_~r~0_10 4294967296))) InVars {main_~b~0=v_main_~b~0_13, main_~r~0=v_main_~r~0_10} OutVars{main_~b~0=v_main_~b~0_12, main_~r~0=v_main_~r~0_10} AuxVars[] AssignedVars[main_~b~0] {3077#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:48:56,091 INFO L290 TraceCheckUtils]: 12: Hoare triple {3077#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {3077#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:48:56,091 INFO L290 TraceCheckUtils]: 13: Hoare triple {3077#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 5) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {3077#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:48:56,092 INFO L290 TraceCheckUtils]: 14: Hoare triple {3077#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} [101] L35-->L34-3: Formula: (and (= (* 2 v_main_~b~0_13) v_main_~b~0_12) (<= (mod v_main_~b~0_13 4294967296) (mod v_main_~r~0_10 4294967296))) InVars {main_~b~0=v_main_~b~0_13, main_~r~0=v_main_~r~0_10} OutVars{main_~b~0=v_main_~b~0_12, main_~r~0=v_main_~r~0_10} AuxVars[] AssignedVars[main_~b~0] {3077#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:48:56,092 INFO L290 TraceCheckUtils]: 15: Hoare triple {3077#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {3077#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:48:56,093 INFO L290 TraceCheckUtils]: 16: Hoare triple {3077#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} [96] L34-1-->L35: Formula: (< |v_main_#t~post2_5| 5) InVars {main_#t~post2=|v_main_#t~post2_5|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {3077#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:48:56,093 INFO L290 TraceCheckUtils]: 17: Hoare triple {3077#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} [101] L35-->L34-3: Formula: (and (= (* 2 v_main_~b~0_13) v_main_~b~0_12) (<= (mod v_main_~b~0_13 4294967296) (mod v_main_~r~0_10 4294967296))) InVars {main_~b~0=v_main_~b~0_13, main_~r~0=v_main_~r~0_10} OutVars{main_~b~0=v_main_~b~0_12, main_~r~0=v_main_~r~0_10} AuxVars[] AssignedVars[main_~b~0] {3077#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:48:56,093 INFO L290 TraceCheckUtils]: 18: Hoare triple {3077#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} [92] L34-3-->L34-1: Formula: (and (= v_~counter~0_3 (+ |v_main_#t~post2_1| 1)) (= |v_main_#t~post2_1| v_~counter~0_4)) InVars {~counter~0=v_~counter~0_4} OutVars{~counter~0=v_~counter~0_3, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post2] {3077#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:48:56,094 INFO L290 TraceCheckUtils]: 19: Hoare triple {3077#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} [95] L34-1-->L43-2: Formula: (not (< |v_main_#t~post2_3| 5)) InVars {main_#t~post2=|v_main_#t~post2_3|} OutVars{} AuxVars[] AssignedVars[main_#t~post2] {3077#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:48:56,094 INFO L290 TraceCheckUtils]: 20: Hoare triple {3077#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} [94] L43-2-->L38: Formula: (and (= |v_main_#t~post3_1| v_~counter~0_2) (= (+ |v_main_#t~post3_1| 1) v_~counter~0_1)) InVars {~counter~0=v_~counter~0_2} OutVars{~counter~0=v_~counter~0_1, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[~counter~0, main_#t~post3] {3077#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:48:56,094 INFO L290 TraceCheckUtils]: 21: Hoare triple {3077#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} [98] L38-->L38-2: Formula: (not (< |v_main_#t~post3_3| 5)) InVars {main_#t~post3=|v_main_#t~post3_3|} OutVars{} AuxVars[] AssignedVars[main_#t~post3] {3077#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} is VALID [2022-04-07 18:48:56,095 INFO L272 TraceCheckUtils]: 22: Hoare triple {3077#(and (= main_~A~0 main_~r~0) (= main_~q~0 0))} [97] L38-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_2| (ite (= (mod v_main_~A~0_7 4294967296) (mod (+ v_main_~r~0_12 (* v_main_~q~0_11 v_main_~b~0_15)) 4294967296)) 1 0)) InVars {main_~q~0=v_main_~q~0_11, main_~A~0=v_main_~A~0_7, main_~b~0=v_main_~b~0_15, main_~r~0=v_main_~r~0_12} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_2|} AuxVars[] AssignedVars[main_~q~0, __VERIFIER_assert_#in~cond, main_~A~0, main_~b~0, main_~r~0] {3129#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 18:48:56,096 INFO L290 TraceCheckUtils]: 23: Hoare triple {3129#(<= 1 |__VERIFIER_assert_#in~cond|)} [103] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3133#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 18:48:56,096 INFO L290 TraceCheckUtils]: 24: Hoare triple {3133#(<= 1 __VERIFIER_assert_~cond)} [106] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3058#false} is VALID [2022-04-07 18:48:56,096 INFO L290 TraceCheckUtils]: 25: Hoare triple {3058#false} [110] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3058#false} is VALID [2022-04-07 18:48:56,096 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2022-04-07 18:48:56,096 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-07 18:48:56,096 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 18:48:56,096 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [215507356] [2022-04-07 18:48:56,097 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-04-07 18:48:56,097 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [854003654] [2022-04-07 18:48:56,097 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [854003654] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 18:48:56,097 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 18:48:56,097 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-04-07 18:48:56,097 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1652187110] [2022-04-07 18:48:56,097 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 18:48:56,097 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 2.4) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-07 18:48:56,097 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 18:48:56,097 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 2.4) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:48:56,208 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 16 edges. 16 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 18:48:56,208 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-04-07 18:48:56,208 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 18:48:56,209 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-04-07 18:48:56,209 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-04-07 18:48:56,209 INFO L87 Difference]: Start difference. First operand 71 states and 81 transitions. Second operand has 5 states, 5 states have (on average 2.4) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:48:56,619 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:48:56,619 INFO L93 Difference]: Finished difference Result 88 states and 100 transitions. [2022-04-07 18:48:56,619 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-04-07 18:48:56,619 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 2.4) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-07 18:48:56,619 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 18:48:56,619 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 2.4) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:48:56,620 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 38 transitions. [2022-04-07 18:48:56,620 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 2.4) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:48:56,620 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 38 transitions. [2022-04-07 18:48:56,620 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 5 states and 38 transitions. [2022-04-07 18:48:56,694 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 38 edges. 38 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 18:48:56,695 INFO L225 Difference]: With dead ends: 88 [2022-04-07 18:48:56,695 INFO L226 Difference]: Without dead ends: 87 [2022-04-07 18:48:56,695 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2022-04-07 18:48:56,696 INFO L913 BasicCegarLoop]: 18 mSDtfsCounter, 8 mSDsluCounter, 44 mSDsCounter, 0 mSdLazyCounter, 35 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 9 SdHoareTripleChecker+Valid, 62 SdHoareTripleChecker+Invalid, 37 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 35 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-04-07 18:48:56,696 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [9 Valid, 62 Invalid, 37 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 35 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-04-07 18:48:56,696 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 87 states. [2022-04-07 18:48:56,698 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 87 to 77. [2022-04-07 18:48:56,698 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 18:48:56,698 INFO L82 GeneralOperation]: Start isEquivalent. First operand 87 states. Second operand has 77 states, 60 states have (on average 1.1666666666666667) internal successors, (70), 62 states have internal predecessors, (70), 9 states have call successors, (9), 8 states have call predecessors, (9), 7 states have return successors, (7), 6 states have call predecessors, (7), 7 states have call successors, (7) [2022-04-07 18:48:56,699 INFO L74 IsIncluded]: Start isIncluded. First operand 87 states. Second operand has 77 states, 60 states have (on average 1.1666666666666667) internal successors, (70), 62 states have internal predecessors, (70), 9 states have call successors, (9), 8 states have call predecessors, (9), 7 states have return successors, (7), 6 states have call predecessors, (7), 7 states have call successors, (7) [2022-04-07 18:48:56,699 INFO L87 Difference]: Start difference. First operand 87 states. Second operand has 77 states, 60 states have (on average 1.1666666666666667) internal successors, (70), 62 states have internal predecessors, (70), 9 states have call successors, (9), 8 states have call predecessors, (9), 7 states have return successors, (7), 6 states have call predecessors, (7), 7 states have call successors, (7) [2022-04-07 18:48:56,700 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:48:56,700 INFO L93 Difference]: Finished difference Result 87 states and 97 transitions. [2022-04-07 18:48:56,700 INFO L276 IsEmpty]: Start isEmpty. Operand 87 states and 97 transitions. [2022-04-07 18:48:56,700 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 18:48:56,700 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 18:48:56,700 INFO L74 IsIncluded]: Start isIncluded. First operand has 77 states, 60 states have (on average 1.1666666666666667) internal successors, (70), 62 states have internal predecessors, (70), 9 states have call successors, (9), 8 states have call predecessors, (9), 7 states have return successors, (7), 6 states have call predecessors, (7), 7 states have call successors, (7) Second operand 87 states. [2022-04-07 18:48:56,701 INFO L87 Difference]: Start difference. First operand has 77 states, 60 states have (on average 1.1666666666666667) internal successors, (70), 62 states have internal predecessors, (70), 9 states have call successors, (9), 8 states have call predecessors, (9), 7 states have return successors, (7), 6 states have call predecessors, (7), 7 states have call successors, (7) Second operand 87 states. [2022-04-07 18:48:56,701 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 18:48:56,702 INFO L93 Difference]: Finished difference Result 87 states and 97 transitions. [2022-04-07 18:48:56,702 INFO L276 IsEmpty]: Start isEmpty. Operand 87 states and 97 transitions. [2022-04-07 18:48:56,702 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 18:48:56,702 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 18:48:56,702 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 18:48:56,702 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 18:48:56,702 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 77 states, 60 states have (on average 1.1666666666666667) internal successors, (70), 62 states have internal predecessors, (70), 9 states have call successors, (9), 8 states have call predecessors, (9), 7 states have return successors, (7), 6 states have call predecessors, (7), 7 states have call successors, (7) [2022-04-07 18:48:56,708 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77 states to 77 states and 86 transitions. [2022-04-07 18:48:56,708 INFO L78 Accepts]: Start accepts. Automaton has 77 states and 86 transitions. Word has length 26 [2022-04-07 18:48:56,708 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 18:48:56,708 INFO L478 AbstractCegarLoop]: Abstraction has 77 states and 86 transitions. [2022-04-07 18:48:56,708 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 2.4) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 18:48:56,709 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 86 transitions. [2022-04-07 18:48:56,709 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2022-04-07 18:48:56,709 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 18:48:56,709 INFO L499 BasicCegarLoop]: trace histogram [4, 4, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 18:48:56,734 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2022-04-07 18:48:56,923 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10,10 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 18:48:56,923 INFO L403 AbstractCegarLoop]: === Iteration 12 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 18:48:56,924 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 18:48:56,924 INFO L85 PathProgramCache]: Analyzing trace with hash 1848354624, now seen corresponding path program 1 times [2022-04-07 18:48:56,924 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 18:48:56,924 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1447991216] [2022-04-07 18:48:56,924 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 18:48:56,924 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 18:48:56,935 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-04-07 18:48:56,935 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [800561883] [2022-04-07 18:48:56,935 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 18:48:56,935 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 18:48:56,935 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 18:48:56,941 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 18:48:56,943 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process