/usr/bin/java -ea -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --core.log.level.for.class de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN -tc ../../../trunk/examples/toolchains/AutomizerCTransformed.xml -s ../../../trunk/examples/settings/automizer/LoopAccelerationJordanC.epf -i ../../../trunk/examples/svcomp/loops-crafted-1/in-de31.c -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-34549b5 [2022-04-07 17:24:03,732 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-04-07 17:24:03,739 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-04-07 17:24:03,806 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... 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[2022-04-07 17:24:03,818 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-04-07 17:24:03,821 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-04-07 17:24:03,822 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-04-07 17:24:03,824 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-04-07 17:24:03,824 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-04-07 17:24:03,825 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-04-07 17:24:03,826 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-04-07 17:24:03,830 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-04-07 17:24:03,831 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-04-07 17:24:03,832 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-04-07 17:24:03,833 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-04-07 17:24:03,834 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-04-07 17:24:03,834 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-04-07 17:24:03,839 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2022-04-07 17:24:03,844 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-04-07 17:24:03,845 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-04-07 17:24:03,846 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-04-07 17:24:03,846 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/automizer/LoopAccelerationJordanC.epf [2022-04-07 17:24:03,856 INFO L113 SettingsManager]: Loading preferences was successful [2022-04-07 17:24:03,856 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-04-07 17:24:03,857 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-04-07 17:24:03,857 INFO L138 SettingsManager]: * sizeof long=4 [2022-04-07 17:24:03,857 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-04-07 17:24:03,857 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-04-07 17:24:03,858 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-04-07 17:24:03,858 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-04-07 17:24:03,858 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-04-07 17:24:03,858 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-04-07 17:24:03,858 INFO L138 SettingsManager]: * sizeof long double=12 [2022-04-07 17:24:03,858 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-04-07 17:24:03,858 INFO L138 SettingsManager]: * Use constant arrays=true [2022-04-07 17:24:03,859 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-04-07 17:24:03,859 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-04-07 17:24:03,859 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-04-07 17:24:03,859 INFO L138 SettingsManager]: * To the following directory=./dump/ [2022-04-07 17:24:03,859 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-04-07 17:24:03,859 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-07 17:24:03,859 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-04-07 17:24:03,859 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-04-07 17:24:03,860 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-04-07 17:24:03,860 INFO L138 SettingsManager]: * TransformationType=LOOP_ACCELERATION_JORDAN WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.core: Log level for class -> de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN; [2022-04-07 17:24:04,013 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-04-07 17:24:04,025 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-04-07 17:24:04,026 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-04-07 17:24:04,027 INFO L271 PluginConnector]: Initializing CDTParser... [2022-04-07 17:24:04,027 INFO L275 PluginConnector]: CDTParser initialized [2022-04-07 17:24:04,028 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loops-crafted-1/in-de31.c [2022-04-07 17:24:04,073 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/3fee7d3e0/c9e22d1cfebc4b0b8138450b8a2b9b2b/FLAG0ca3b23bf [2022-04-07 17:24:04,374 INFO L306 CDTParser]: Found 1 translation units. [2022-04-07 17:24:04,375 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de31.c [2022-04-07 17:24:04,385 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/3fee7d3e0/c9e22d1cfebc4b0b8138450b8a2b9b2b/FLAG0ca3b23bf [2022-04-07 17:24:04,808 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/3fee7d3e0/c9e22d1cfebc4b0b8138450b8a2b9b2b [2022-04-07 17:24:04,810 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-04-07 17:24:04,811 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2022-04-07 17:24:04,812 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-04-07 17:24:04,812 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-04-07 17:24:04,815 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-04-07 17:24:04,815 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.04 05:24:04" (1/1) ... [2022-04-07 17:24:04,816 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@41f50cb5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:24:04, skipping insertion in model container [2022-04-07 17:24:04,816 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.04 05:24:04" (1/1) ... [2022-04-07 17:24:04,820 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-04-07 17:24:04,829 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-04-07 17:24:04,941 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de31.c[368,381] [2022-04-07 17:24:04,964 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-07 17:24:04,969 INFO L203 MainTranslator]: Completed pre-run [2022-04-07 17:24:04,978 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de31.c[368,381] [2022-04-07 17:24:04,982 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-07 17:24:04,991 INFO L208 MainTranslator]: Completed translation [2022-04-07 17:24:04,992 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:24:04 WrapperNode [2022-04-07 17:24:04,992 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-04-07 17:24:04,993 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-04-07 17:24:04,993 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-04-07 17:24:04,993 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-04-07 17:24:05,000 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:24:04" (1/1) ... [2022-04-07 17:24:05,000 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:24:04" (1/1) ... [2022-04-07 17:24:05,005 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:24:04" (1/1) ... [2022-04-07 17:24:05,005 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:24:04" (1/1) ... [2022-04-07 17:24:05,015 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:24:04" (1/1) ... [2022-04-07 17:24:05,020 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:24:04" (1/1) ... [2022-04-07 17:24:05,024 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:24:04" (1/1) ... [2022-04-07 17:24:05,026 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-04-07 17:24:05,027 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-04-07 17:24:05,027 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-04-07 17:24:05,027 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-04-07 17:24:05,028 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:24:04" (1/1) ... [2022-04-07 17:24:05,033 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-07 17:24:05,041 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:24:05,060 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-04-07 17:24:05,083 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-04-07 17:24:05,092 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2022-04-07 17:24:05,092 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-04-07 17:24:05,093 INFO L138 BoogieDeclarations]: Found implementation of procedure reach_error [2022-04-07 17:24:05,093 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2022-04-07 17:24:05,093 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2022-04-07 17:24:05,093 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2022-04-07 17:24:05,093 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_fail [2022-04-07 17:24:05,093 INFO L130 BoogieDeclarations]: Found specification of procedure reach_error [2022-04-07 17:24:05,093 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-04-07 17:24:05,093 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_uint [2022-04-07 17:24:05,093 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2022-04-07 17:24:05,093 INFO L130 BoogieDeclarations]: Found specification of procedure main [2022-04-07 17:24:05,093 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2022-04-07 17:24:05,094 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-04-07 17:24:05,094 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-04-07 17:24:05,095 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-04-07 17:24:05,095 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-04-07 17:24:05,095 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-04-07 17:24:05,140 INFO L234 CfgBuilder]: Building ICFG [2022-04-07 17:24:05,141 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-04-07 17:24:05,322 INFO L275 CfgBuilder]: Performing block encoding [2022-04-07 17:24:05,327 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-04-07 17:24:05,327 INFO L299 CfgBuilder]: Removed 3 assume(true) statements. [2022-04-07 17:24:05,328 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.04 05:24:05 BoogieIcfgContainer [2022-04-07 17:24:05,328 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-04-07 17:24:05,329 INFO L113 PluginConnector]: ------------------------IcfgTransformer---------------------------- [2022-04-07 17:24:05,329 INFO L271 PluginConnector]: Initializing IcfgTransformer... [2022-04-07 17:24:05,332 INFO L275 PluginConnector]: IcfgTransformer initialized [2022-04-07 17:24:05,334 INFO L185 PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.04 05:24:05" (1/1) ... [2022-04-07 17:24:05,336 INFO L168 ansformationObserver]: Applying ICFG transformation LOOP_ACCELERATION_JORDAN [2022-04-07 17:24:05,824 INFO L89 elerationTransformer]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-07 17:24:05,825 INFO L91 elerationTransformer]: Accelerated Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] to Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0) (= v_main_~y~0_6 v_main_~y~0_5)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_6 v_it_1 1) v_main_~y~0_5)))) (< v_main_~y~0_6 v_main_~y~0_5) (< 0 .cse0) (= v_main_~x~0_3 (+ v_main_~x~0_4 v_main_~y~0_6 (* (- 1) v_main_~y~0_5)))))) InVars {main_~y~0=v_main_~y~0_6, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] [2022-04-07 17:24:08,090 INFO L89 elerationTransformer]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-07 17:24:08,091 INFO L91 elerationTransformer]: Accelerated Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_~z~0=v_main_~z~0_7, main_#t~post8=|v_main_#t~post8_1|, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] to Formula: (let ((.cse0 (mod v_main_~z~0_8 4294967296))) (or (and (<= .cse0 0) (= v_main_~z~0_8 v_main_~z~0_7) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (= v_main_~x~0_5 v_main_~x~0_6) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)) (and (= v_main_~z~0_7 (+ v_main_~x~0_6 v_main_~z~0_8 (* (- 1) v_main_~x~0_5))) (< 0 .cse0) (forall ((v_it_2 Int)) (or (< 0 (mod (+ v_main_~z~0_8 (* v_it_2 4294967295)) 4294967296)) (not (<= 1 v_it_2)) (not (<= (+ v_main_~x~0_6 v_it_2 1) v_main_~x~0_5)))) (< v_main_~x~0_6 v_main_~x~0_5)))) InVars {main_~x~0=v_main_~x~0_6, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_8, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] [2022-04-07 17:24:08,397 INFO L89 elerationTransformer]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-07 17:24:08,397 INFO L91 elerationTransformer]: Accelerated Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~z~0=v_main_~z~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post10=|v_main_#t~post10_1|, main_~z~0=v_main_~z~0_2, main_~y~0=v_main_~y~0_3, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] to Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (= (+ (* (- 1) v_main_~y~0_3) v_main_~y~0_4 v_main_~z~0_3) v_main_~z~0_2) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] [2022-04-07 17:24:08,400 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 07.04 05:24:08 BasicIcfg [2022-04-07 17:24:08,401 INFO L132 PluginConnector]: ------------------------ END IcfgTransformer---------------------------- [2022-04-07 17:24:08,402 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-04-07 17:24:08,402 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-04-07 17:24:08,404 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-04-07 17:24:08,404 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.04 05:24:04" (1/4) ... [2022-04-07 17:24:08,405 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2bb4f416 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.04 05:24:08, skipping insertion in model container [2022-04-07 17:24:08,405 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:24:04" (2/4) ... [2022-04-07 17:24:08,405 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2bb4f416 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.04 05:24:08, skipping insertion in model container [2022-04-07 17:24:08,405 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.04 05:24:05" (3/4) ... [2022-04-07 17:24:08,405 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2bb4f416 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.04 05:24:08, skipping insertion in model container [2022-04-07 17:24:08,405 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 07.04 05:24:08" (4/4) ... [2022-04-07 17:24:08,406 INFO L111 eAbstractionObserver]: Analyzing ICFG in-de31.cJordan [2022-04-07 17:24:08,409 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:ForwardPredicates Determinization: PREDICATE_ABSTRACTION [2022-04-07 17:24:08,410 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-04-07 17:24:08,434 INFO L339 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-04-07 17:24:08,439 INFO L340 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=ForwardPredicates, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=false, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=All, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP [2022-04-07 17:24:08,439 INFO L341 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-04-07 17:24:08,449 INFO L276 IsEmpty]: Start isEmpty. Operand has 22 states, 14 states have (on average 1.5714285714285714) internal successors, (22), 15 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 17:24:08,453 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2022-04-07 17:24:08,454 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:24:08,454 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:24:08,455 INFO L403 AbstractCegarLoop]: === Iteration 1 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:24:08,462 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:24:08,462 INFO L85 PathProgramCache]: Analyzing trace with hash -1909530012, now seen corresponding path program 1 times [2022-04-07 17:24:08,469 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:24:08,470 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [398452524] [2022-04-07 17:24:08,470 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:24:08,470 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:24:08,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:24:08,574 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:24:08,581 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:24:08,597 INFO L290 TraceCheckUtils]: 0: Hoare triple {30#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {25#true} is VALID [2022-04-07 17:24:08,597 INFO L290 TraceCheckUtils]: 1: Hoare triple {25#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25#true} is VALID [2022-04-07 17:24:08,598 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {25#true} {25#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25#true} is VALID [2022-04-07 17:24:08,599 INFO L272 TraceCheckUtils]: 0: Hoare triple {25#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:24:08,599 INFO L290 TraceCheckUtils]: 1: Hoare triple {30#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {25#true} is VALID [2022-04-07 17:24:08,600 INFO L290 TraceCheckUtils]: 2: Hoare triple {25#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25#true} is VALID [2022-04-07 17:24:08,600 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {25#true} {25#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25#true} is VALID [2022-04-07 17:24:08,600 INFO L272 TraceCheckUtils]: 4: Hoare triple {25#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25#true} is VALID [2022-04-07 17:24:08,600 INFO L290 TraceCheckUtils]: 5: Hoare triple {25#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {25#true} is VALID [2022-04-07 17:24:08,601 INFO L290 TraceCheckUtils]: 6: Hoare triple {25#true} [70] L16-2-->L16-3: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {26#false} is VALID [2022-04-07 17:24:08,601 INFO L290 TraceCheckUtils]: 7: Hoare triple {26#false} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {26#false} is VALID [2022-04-07 17:24:08,601 INFO L290 TraceCheckUtils]: 8: Hoare triple {26#false} [74] L23-2-->L29-1: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {26#false} is VALID [2022-04-07 17:24:08,601 INFO L290 TraceCheckUtils]: 9: Hoare triple {26#false} [77] L29-1-->L29-2: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {26#false} is VALID [2022-04-07 17:24:08,602 INFO L272 TraceCheckUtils]: 10: Hoare triple {26#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {26#false} is VALID [2022-04-07 17:24:08,602 INFO L290 TraceCheckUtils]: 11: Hoare triple {26#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {26#false} is VALID [2022-04-07 17:24:08,602 INFO L290 TraceCheckUtils]: 12: Hoare triple {26#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {26#false} is VALID [2022-04-07 17:24:08,602 INFO L290 TraceCheckUtils]: 13: Hoare triple {26#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26#false} is VALID [2022-04-07 17:24:08,603 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:24:08,603 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:24:08,603 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [398452524] [2022-04-07 17:24:08,604 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [398452524] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 17:24:08,604 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 17:24:08,604 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-07 17:24:08,605 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [774176166] [2022-04-07 17:24:08,605 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 17:24:08,609 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 14 [2022-04-07 17:24:08,610 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:24:08,612 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:24:08,626 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 14 edges. 14 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:24:08,627 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-07 17:24:08,627 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:24:08,647 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-07 17:24:08,647 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-07 17:24:08,649 INFO L87 Difference]: Start difference. First operand has 22 states, 14 states have (on average 1.5714285714285714) internal successors, (22), 15 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:24:08,702 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:24:08,702 INFO L93 Difference]: Finished difference Result 22 states and 24 transitions. [2022-04-07 17:24:08,703 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-07 17:24:08,703 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 14 [2022-04-07 17:24:08,704 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:24:08,705 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:24:08,712 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 28 transitions. [2022-04-07 17:24:08,713 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:24:08,717 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 28 transitions. [2022-04-07 17:24:08,717 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 28 transitions. [2022-04-07 17:24:08,746 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 28 edges. 28 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:24:08,752 INFO L225 Difference]: With dead ends: 22 [2022-04-07 17:24:08,752 INFO L226 Difference]: Without dead ends: 15 [2022-04-07 17:24:08,753 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-07 17:24:08,757 INFO L913 BasicCegarLoop]: 23 mSDtfsCounter, 15 mSDsluCounter, 3 mSDsCounter, 0 mSdLazyCounter, 3 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 16 SdHoareTripleChecker+Valid, 26 SdHoareTripleChecker+Invalid, 5 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 3 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 17:24:08,758 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [16 Valid, 26 Invalid, 5 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 3 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 17:24:08,770 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15 states. [2022-04-07 17:24:08,778 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15 to 15. [2022-04-07 17:24:08,778 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:24:08,779 INFO L82 GeneralOperation]: Start isEquivalent. First operand 15 states. Second operand has 15 states, 10 states have (on average 1.3) internal successors, (13), 10 states have internal predecessors, (13), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:24:08,780 INFO L74 IsIncluded]: Start isIncluded. First operand 15 states. Second operand has 15 states, 10 states have (on average 1.3) internal successors, (13), 10 states have internal predecessors, (13), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:24:08,780 INFO L87 Difference]: Start difference. First operand 15 states. Second operand has 15 states, 10 states have (on average 1.3) internal successors, (13), 10 states have internal predecessors, (13), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:24:08,785 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:24:08,786 INFO L93 Difference]: Finished difference Result 15 states and 17 transitions. [2022-04-07 17:24:08,786 INFO L276 IsEmpty]: Start isEmpty. Operand 15 states and 17 transitions. [2022-04-07 17:24:08,786 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:24:08,786 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:24:08,786 INFO L74 IsIncluded]: Start isIncluded. First operand has 15 states, 10 states have (on average 1.3) internal successors, (13), 10 states have internal predecessors, (13), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 15 states. [2022-04-07 17:24:08,787 INFO L87 Difference]: Start difference. First operand has 15 states, 10 states have (on average 1.3) internal successors, (13), 10 states have internal predecessors, (13), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 15 states. [2022-04-07 17:24:08,789 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:24:08,789 INFO L93 Difference]: Finished difference Result 15 states and 17 transitions. [2022-04-07 17:24:08,789 INFO L276 IsEmpty]: Start isEmpty. Operand 15 states and 17 transitions. [2022-04-07 17:24:08,790 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:24:08,790 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:24:08,790 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:24:08,790 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:24:08,791 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 10 states have (on average 1.3) internal successors, (13), 10 states have internal predecessors, (13), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:24:08,793 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 17 transitions. [2022-04-07 17:24:08,794 INFO L78 Accepts]: Start accepts. Automaton has 15 states and 17 transitions. Word has length 14 [2022-04-07 17:24:08,796 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:24:08,796 INFO L478 AbstractCegarLoop]: Abstraction has 15 states and 17 transitions. [2022-04-07 17:24:08,800 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:24:08,800 INFO L276 IsEmpty]: Start isEmpty. Operand 15 states and 17 transitions. [2022-04-07 17:24:08,801 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2022-04-07 17:24:08,801 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:24:08,801 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:24:08,801 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-04-07 17:24:08,801 INFO L403 AbstractCegarLoop]: === Iteration 2 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:24:08,803 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:24:08,803 INFO L85 PathProgramCache]: Analyzing trace with hash -137167005, now seen corresponding path program 1 times [2022-04-07 17:24:08,803 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:24:08,803 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [880581660] [2022-04-07 17:24:08,804 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:24:08,804 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:24:08,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:24:08,962 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:24:08,963 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:24:08,967 INFO L290 TraceCheckUtils]: 0: Hoare triple {110#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {100#true} is VALID [2022-04-07 17:24:08,968 INFO L290 TraceCheckUtils]: 1: Hoare triple {100#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {100#true} is VALID [2022-04-07 17:24:08,968 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {100#true} {100#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {100#true} is VALID [2022-04-07 17:24:08,969 INFO L272 TraceCheckUtils]: 0: Hoare triple {100#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {110#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:24:08,969 INFO L290 TraceCheckUtils]: 1: Hoare triple {110#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {100#true} is VALID [2022-04-07 17:24:08,969 INFO L290 TraceCheckUtils]: 2: Hoare triple {100#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {100#true} is VALID [2022-04-07 17:24:08,969 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {100#true} {100#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {100#true} is VALID [2022-04-07 17:24:08,969 INFO L272 TraceCheckUtils]: 4: Hoare triple {100#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {100#true} is VALID [2022-04-07 17:24:08,970 INFO L290 TraceCheckUtils]: 5: Hoare triple {100#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {105#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 17:24:08,971 INFO L290 TraceCheckUtils]: 6: Hoare triple {105#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {106#(and (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} is VALID [2022-04-07 17:24:08,971 INFO L290 TraceCheckUtils]: 7: Hoare triple {106#(and (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {107#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:24:08,972 INFO L290 TraceCheckUtils]: 8: Hoare triple {107#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {107#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:24:08,972 INFO L290 TraceCheckUtils]: 9: Hoare triple {107#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {107#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:24:08,973 INFO L272 TraceCheckUtils]: 10: Hoare triple {107#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {108#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:24:08,974 INFO L290 TraceCheckUtils]: 11: Hoare triple {108#(not (= |__VERIFIER_assert_#in~cond| 0))} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {109#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:24:08,974 INFO L290 TraceCheckUtils]: 12: Hoare triple {109#(not (= __VERIFIER_assert_~cond 0))} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {101#false} is VALID [2022-04-07 17:24:08,974 INFO L290 TraceCheckUtils]: 13: Hoare triple {101#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {101#false} is VALID [2022-04-07 17:24:08,975 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:24:08,975 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:24:08,975 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [880581660] [2022-04-07 17:24:08,975 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [880581660] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 17:24:08,975 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 17:24:08,975 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2022-04-07 17:24:08,975 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [716619463] [2022-04-07 17:24:08,975 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 17:24:08,976 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 1.25) internal successors, (10), 6 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 14 [2022-04-07 17:24:08,976 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:24:08,977 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 8 states, 8 states have (on average 1.25) internal successors, (10), 6 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:24:08,988 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 14 edges. 14 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:24:08,988 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-04-07 17:24:08,988 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:24:08,989 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-04-07 17:24:08,989 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2022-04-07 17:24:08,989 INFO L87 Difference]: Start difference. First operand 15 states and 17 transitions. Second operand has 8 states, 8 states have (on average 1.25) internal successors, (10), 6 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:24:09,171 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:24:09,171 INFO L93 Difference]: Finished difference Result 24 states and 30 transitions. [2022-04-07 17:24:09,172 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-04-07 17:24:09,172 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 1.25) internal successors, (10), 6 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 14 [2022-04-07 17:24:09,172 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:24:09,172 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 1.25) internal successors, (10), 6 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:24:09,173 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 31 transitions. [2022-04-07 17:24:09,173 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 1.25) internal successors, (10), 6 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:24:09,174 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 31 transitions. [2022-04-07 17:24:09,175 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 8 states and 31 transitions. [2022-04-07 17:24:09,200 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 31 edges. 31 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:24:09,201 INFO L225 Difference]: With dead ends: 24 [2022-04-07 17:24:09,201 INFO L226 Difference]: Without dead ends: 21 [2022-04-07 17:24:09,202 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=41, Invalid=115, Unknown=0, NotChecked=0, Total=156 [2022-04-07 17:24:09,202 INFO L913 BasicCegarLoop]: 9 mSDtfsCounter, 18 mSDsluCounter, 31 mSDsCounter, 0 mSdLazyCounter, 52 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 18 SdHoareTripleChecker+Valid, 40 SdHoareTripleChecker+Invalid, 61 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 52 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 3 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 17:24:09,203 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [18 Valid, 40 Invalid, 61 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 52 Invalid, 0 Unknown, 3 Unchecked, 0.0s Time] [2022-04-07 17:24:09,203 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21 states. [2022-04-07 17:24:09,204 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21 to 19. [2022-04-07 17:24:09,205 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:24:09,205 INFO L82 GeneralOperation]: Start isEquivalent. First operand 21 states. Second operand has 19 states, 14 states have (on average 1.3571428571428572) internal successors, (19), 14 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:24:09,205 INFO L74 IsIncluded]: Start isIncluded. First operand 21 states. Second operand has 19 states, 14 states have (on average 1.3571428571428572) internal successors, (19), 14 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:24:09,205 INFO L87 Difference]: Start difference. First operand 21 states. Second operand has 19 states, 14 states have (on average 1.3571428571428572) internal successors, (19), 14 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:24:09,206 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:24:09,206 INFO L93 Difference]: Finished difference Result 21 states and 27 transitions. [2022-04-07 17:24:09,206 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 27 transitions. [2022-04-07 17:24:09,207 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:24:09,207 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:24:09,207 INFO L74 IsIncluded]: Start isIncluded. First operand has 19 states, 14 states have (on average 1.3571428571428572) internal successors, (19), 14 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 21 states. [2022-04-07 17:24:09,207 INFO L87 Difference]: Start difference. First operand has 19 states, 14 states have (on average 1.3571428571428572) internal successors, (19), 14 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 21 states. [2022-04-07 17:24:09,208 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:24:09,208 INFO L93 Difference]: Finished difference Result 21 states and 27 transitions. [2022-04-07 17:24:09,208 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 27 transitions. [2022-04-07 17:24:09,208 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:24:09,208 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:24:09,208 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:24:09,208 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:24:09,209 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 14 states have (on average 1.3571428571428572) internal successors, (19), 14 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:24:09,209 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 23 transitions. [2022-04-07 17:24:09,209 INFO L78 Accepts]: Start accepts. Automaton has 19 states and 23 transitions. Word has length 14 [2022-04-07 17:24:09,210 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:24:09,210 INFO L478 AbstractCegarLoop]: Abstraction has 19 states and 23 transitions. [2022-04-07 17:24:09,210 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 1.25) internal successors, (10), 6 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:24:09,210 INFO L276 IsEmpty]: Start isEmpty. Operand 19 states and 23 transitions. [2022-04-07 17:24:09,210 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2022-04-07 17:24:09,210 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:24:09,210 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:24:09,211 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-04-07 17:24:09,211 INFO L403 AbstractCegarLoop]: === Iteration 3 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:24:09,211 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:24:09,211 INFO L85 PathProgramCache]: Analyzing trace with hash 69510770, now seen corresponding path program 1 times [2022-04-07 17:24:09,211 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:24:09,211 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1861735249] [2022-04-07 17:24:09,211 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:24:09,211 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:24:09,221 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.0))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-07 17:24:09,235 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:24:09,248 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.2))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-07 17:24:09,343 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:24:09,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:24:09,353 INFO L290 TraceCheckUtils]: 0: Hoare triple {219#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {208#true} is VALID [2022-04-07 17:24:09,353 INFO L290 TraceCheckUtils]: 1: Hoare triple {208#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {208#true} is VALID [2022-04-07 17:24:09,353 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {208#true} {208#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {208#true} is VALID [2022-04-07 17:24:09,354 INFO L272 TraceCheckUtils]: 0: Hoare triple {208#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {219#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:24:09,354 INFO L290 TraceCheckUtils]: 1: Hoare triple {219#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {208#true} is VALID [2022-04-07 17:24:09,354 INFO L290 TraceCheckUtils]: 2: Hoare triple {208#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {208#true} is VALID [2022-04-07 17:24:09,354 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {208#true} {208#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {208#true} is VALID [2022-04-07 17:24:09,354 INFO L272 TraceCheckUtils]: 4: Hoare triple {208#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {208#true} is VALID [2022-04-07 17:24:09,355 INFO L290 TraceCheckUtils]: 5: Hoare triple {208#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {213#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 17:24:09,355 INFO L290 TraceCheckUtils]: 6: Hoare triple {213#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {214#(and (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} is VALID [2022-04-07 17:24:09,356 INFO L290 TraceCheckUtils]: 7: Hoare triple {214#(and (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {215#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} is VALID [2022-04-07 17:24:09,356 INFO L290 TraceCheckUtils]: 8: Hoare triple {215#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {215#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} is VALID [2022-04-07 17:24:09,358 INFO L290 TraceCheckUtils]: 9: Hoare triple {215#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} [79] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (= (+ (* (- 1) v_main_~y~0_3) v_main_~y~0_4 v_main_~z~0_3) v_main_~z~0_2) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {216#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))) (<= 0 main_~z~0))} is VALID [2022-04-07 17:24:09,358 INFO L290 TraceCheckUtils]: 10: Hoare triple {216#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))) (<= 0 main_~z~0))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {216#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))) (<= 0 main_~z~0))} is VALID [2022-04-07 17:24:09,359 INFO L272 TraceCheckUtils]: 11: Hoare triple {216#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))) (<= 0 main_~z~0))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {217#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:24:09,362 INFO L290 TraceCheckUtils]: 12: Hoare triple {217#(not (= |__VERIFIER_assert_#in~cond| 0))} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {218#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:24:09,364 INFO L290 TraceCheckUtils]: 13: Hoare triple {218#(not (= __VERIFIER_assert_~cond 0))} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {209#false} is VALID [2022-04-07 17:24:09,364 INFO L290 TraceCheckUtils]: 14: Hoare triple {209#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {209#false} is VALID [2022-04-07 17:24:09,365 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:24:09,365 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:24:09,365 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1861735249] [2022-04-07 17:24:09,365 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1861735249] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:24:09,365 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [739154074] [2022-04-07 17:24:09,365 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:24:09,365 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:24:09,365 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:24:09,367 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:24:09,367 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-04-07 17:24:09,398 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:24:09,400 INFO L263 TraceCheckSpWp]: Trace formula consists of 60 conjuncts, 12 conjunts are in the unsatisfiable core [2022-04-07 17:24:09,416 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:24:09,420 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:24:09,715 INFO L272 TraceCheckUtils]: 0: Hoare triple {208#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {208#true} is VALID [2022-04-07 17:24:09,716 INFO L290 TraceCheckUtils]: 1: Hoare triple {208#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {208#true} is VALID [2022-04-07 17:24:09,716 INFO L290 TraceCheckUtils]: 2: Hoare triple {208#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {208#true} is VALID [2022-04-07 17:24:09,716 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {208#true} {208#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {208#true} is VALID [2022-04-07 17:24:09,716 INFO L272 TraceCheckUtils]: 4: Hoare triple {208#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {208#true} is VALID [2022-04-07 17:24:09,718 INFO L290 TraceCheckUtils]: 5: Hoare triple {208#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {213#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 17:24:09,719 INFO L290 TraceCheckUtils]: 6: Hoare triple {213#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {214#(and (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} is VALID [2022-04-07 17:24:09,719 INFO L290 TraceCheckUtils]: 7: Hoare triple {214#(and (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {215#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} is VALID [2022-04-07 17:24:09,720 INFO L290 TraceCheckUtils]: 8: Hoare triple {215#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {215#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} is VALID [2022-04-07 17:24:09,721 INFO L290 TraceCheckUtils]: 9: Hoare triple {215#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} [79] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (= (+ (* (- 1) v_main_~y~0_3) v_main_~y~0_4 v_main_~z~0_3) v_main_~z~0_2) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {250#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-07 17:24:09,721 INFO L290 TraceCheckUtils]: 10: Hoare triple {250#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {250#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-07 17:24:09,722 INFO L272 TraceCheckUtils]: 11: Hoare triple {250#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {257#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:24:09,723 INFO L290 TraceCheckUtils]: 12: Hoare triple {257#(<= 1 |__VERIFIER_assert_#in~cond|)} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {261#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:24:09,723 INFO L290 TraceCheckUtils]: 13: Hoare triple {261#(<= 1 __VERIFIER_assert_~cond)} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {209#false} is VALID [2022-04-07 17:24:09,723 INFO L290 TraceCheckUtils]: 14: Hoare triple {209#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {209#false} is VALID [2022-04-07 17:24:09,724 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:24:09,724 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 17:24:14,910 INFO L290 TraceCheckUtils]: 14: Hoare triple {209#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {209#false} is VALID [2022-04-07 17:24:14,911 INFO L290 TraceCheckUtils]: 13: Hoare triple {261#(<= 1 __VERIFIER_assert_~cond)} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {209#false} is VALID [2022-04-07 17:24:14,911 INFO L290 TraceCheckUtils]: 12: Hoare triple {257#(<= 1 |__VERIFIER_assert_#in~cond|)} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {261#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:24:14,912 INFO L272 TraceCheckUtils]: 11: Hoare triple {277#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {257#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:24:14,912 INFO L290 TraceCheckUtils]: 10: Hoare triple {277#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {277#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} is VALID [2022-04-07 17:24:16,922 WARN L290 TraceCheckUtils]: 9: Hoare triple {284#(forall ((aux_mod_v_main_~z~0_17_31 Int)) (or (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_17_31) (> 0 aux_mod_v_main_~z~0_17_31) (and (or (forall ((aux_div_v_main_~z~0_17_31 Int)) (not (= main_~z~0 (+ aux_mod_v_main_~z~0_17_31 (* 4294967296 aux_div_v_main_~z~0_17_31))))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_17_31 Int)) (or (not (< main_~z~0 (+ aux_mod_v_main_~z~0_17_31 (* 4294967296 aux_div_v_main_~z~0_17_31)))) (exists ((v_it_3 Int)) (and (<= 1 v_it_3) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296))) (<= (+ v_it_3 main_~z~0 1) (+ aux_mod_v_main_~z~0_17_31 (* 4294967296 aux_div_v_main_~z~0_17_31))))))))) (>= aux_mod_v_main_~z~0_17_31 4294967296)))} [79] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (= (+ (* (- 1) v_main_~y~0_3) v_main_~y~0_4 v_main_~z~0_3) v_main_~z~0_2) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {277#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} is UNKNOWN [2022-04-07 17:24:18,984 WARN L290 TraceCheckUtils]: 8: Hoare triple {288#(or (forall ((aux_mod_v_main_~z~0_17_31 Int)) (or (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_17_31) (> 0 aux_mod_v_main_~z~0_17_31) (and (or (forall ((aux_div_v_main_~z~0_17_31 Int)) (not (= main_~z~0 (+ aux_mod_v_main_~z~0_17_31 (* 4294967296 aux_div_v_main_~z~0_17_31))))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_17_31 Int)) (or (not (< main_~z~0 (+ aux_mod_v_main_~z~0_17_31 (* 4294967296 aux_div_v_main_~z~0_17_31)))) (exists ((v_it_3 Int)) (and (<= 1 v_it_3) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296))) (<= (+ v_it_3 main_~z~0 1) (+ aux_mod_v_main_~z~0_17_31 (* 4294967296 aux_div_v_main_~z~0_17_31))))))))) (>= aux_mod_v_main_~z~0_17_31 4294967296))) (< 0 (mod main_~z~0 4294967296)))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {284#(forall ((aux_mod_v_main_~z~0_17_31 Int)) (or (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_17_31) (> 0 aux_mod_v_main_~z~0_17_31) (and (or (forall ((aux_div_v_main_~z~0_17_31 Int)) (not (= main_~z~0 (+ aux_mod_v_main_~z~0_17_31 (* 4294967296 aux_div_v_main_~z~0_17_31))))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_17_31 Int)) (or (not (< main_~z~0 (+ aux_mod_v_main_~z~0_17_31 (* 4294967296 aux_div_v_main_~z~0_17_31)))) (exists ((v_it_3 Int)) (and (<= 1 v_it_3) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296))) (<= (+ v_it_3 main_~z~0 1) (+ aux_mod_v_main_~z~0_17_31 (* 4294967296 aux_div_v_main_~z~0_17_31))))))))) (>= aux_mod_v_main_~z~0_17_31 4294967296)))} is UNKNOWN [2022-04-07 17:24:18,991 INFO L290 TraceCheckUtils]: 7: Hoare triple {292#(or (<= (div (+ (- 1) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 (* (- 1) (mod main_~n~0 4294967296))) 4294967296) 1)) (< 0 (mod main_~y~0 4294967296)))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {288#(or (forall ((aux_mod_v_main_~z~0_17_31 Int)) (or (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_17_31) (> 0 aux_mod_v_main_~z~0_17_31) (and (or (forall ((aux_div_v_main_~z~0_17_31 Int)) (not (= main_~z~0 (+ aux_mod_v_main_~z~0_17_31 (* 4294967296 aux_div_v_main_~z~0_17_31))))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_17_31 Int)) (or (not (< main_~z~0 (+ aux_mod_v_main_~z~0_17_31 (* 4294967296 aux_div_v_main_~z~0_17_31)))) (exists ((v_it_3 Int)) (and (<= 1 v_it_3) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296))) (<= (+ v_it_3 main_~z~0 1) (+ aux_mod_v_main_~z~0_17_31 (* 4294967296 aux_div_v_main_~z~0_17_31))))))))) (>= aux_mod_v_main_~z~0_17_31 4294967296))) (< 0 (mod main_~z~0 4294967296)))} is VALID [2022-04-07 17:24:18,996 INFO L290 TraceCheckUtils]: 6: Hoare triple {296#(or (< 0 (mod main_~x~0 4294967296)) (<= (div (+ (- 1) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 (* (- 1) (mod main_~n~0 4294967296))) 4294967296) 1)) (< 0 (mod main_~y~0 4294967296)))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {292#(or (<= (div (+ (- 1) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 (* (- 1) (mod main_~n~0 4294967296))) 4294967296) 1)) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-07 17:24:18,996 INFO L290 TraceCheckUtils]: 5: Hoare triple {208#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {296#(or (< 0 (mod main_~x~0 4294967296)) (<= (div (+ (- 1) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 (* (- 1) (mod main_~n~0 4294967296))) 4294967296) 1)) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-07 17:24:18,996 INFO L272 TraceCheckUtils]: 4: Hoare triple {208#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {208#true} is VALID [2022-04-07 17:24:18,997 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {208#true} {208#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {208#true} is VALID [2022-04-07 17:24:18,997 INFO L290 TraceCheckUtils]: 2: Hoare triple {208#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {208#true} is VALID [2022-04-07 17:24:18,997 INFO L290 TraceCheckUtils]: 1: Hoare triple {208#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {208#true} is VALID [2022-04-07 17:24:18,997 INFO L272 TraceCheckUtils]: 0: Hoare triple {208#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {208#true} is VALID [2022-04-07 17:24:18,997 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:24:18,998 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [739154074] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 17:24:18,998 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 17:24:18,998 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 8, 9] total 17 [2022-04-07 17:24:18,998 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1979870531] [2022-04-07 17:24:18,998 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 17:24:18,998 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 17 states have (on average 1.2941176470588236) internal successors, (22), 14 states have internal predecessors, (22), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-07 17:24:18,999 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:24:18,999 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 17 states, 17 states have (on average 1.2941176470588236) internal successors, (22), 14 states have internal predecessors, (22), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:24:23,059 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 29 edges. 27 inductive. 0 not inductive. 2 times theorem prover too weak to decide inductivity. [2022-04-07 17:24:23,059 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 17 states [2022-04-07 17:24:23,059 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:24:23,060 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2022-04-07 17:24:23,060 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=52, Invalid=217, Unknown=3, NotChecked=0, Total=272 [2022-04-07 17:24:23,060 INFO L87 Difference]: Start difference. First operand 19 states and 23 transitions. Second operand has 17 states, 17 states have (on average 1.2941176470588236) internal successors, (22), 14 states have internal predecessors, (22), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:24:23,359 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:24:23,359 INFO L93 Difference]: Finished difference Result 25 states and 31 transitions. [2022-04-07 17:24:23,359 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-04-07 17:24:23,360 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 17 states have (on average 1.2941176470588236) internal successors, (22), 14 states have internal predecessors, (22), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-07 17:24:23,360 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:24:23,360 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 17 states have (on average 1.2941176470588236) internal successors, (22), 14 states have internal predecessors, (22), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:24:23,361 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 32 transitions. [2022-04-07 17:24:23,361 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 17 states have (on average 1.2941176470588236) internal successors, (22), 14 states have internal predecessors, (22), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:24:23,362 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 32 transitions. [2022-04-07 17:24:23,362 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 10 states and 32 transitions. [2022-04-07 17:24:23,393 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 32 edges. 32 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:24:23,394 INFO L225 Difference]: With dead ends: 25 [2022-04-07 17:24:23,394 INFO L226 Difference]: Without dead ends: 22 [2022-04-07 17:24:23,394 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 46 GetRequests, 21 SyntacticMatches, 4 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 80 ImplicationChecksByTransitivity, 3.8s TimeCoverageRelationStatistics Valid=103, Invalid=400, Unknown=3, NotChecked=0, Total=506 [2022-04-07 17:24:23,395 INFO L913 BasicCegarLoop]: 11 mSDtfsCounter, 23 mSDsluCounter, 43 mSDsCounter, 0 mSdLazyCounter, 59 mSolverCounterSat, 9 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 23 SdHoareTripleChecker+Valid, 54 SdHoareTripleChecker+Invalid, 85 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 9 IncrementalHoareTripleChecker+Valid, 59 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 17 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 17:24:23,395 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [23 Valid, 54 Invalid, 85 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [9 Valid, 59 Invalid, 0 Unknown, 17 Unchecked, 0.1s Time] [2022-04-07 17:24:23,396 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2022-04-07 17:24:23,397 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 20. [2022-04-07 17:24:23,397 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:24:23,397 INFO L82 GeneralOperation]: Start isEquivalent. First operand 22 states. Second operand has 20 states, 15 states have (on average 1.3333333333333333) internal successors, (20), 15 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:24:23,398 INFO L74 IsIncluded]: Start isIncluded. First operand 22 states. Second operand has 20 states, 15 states have (on average 1.3333333333333333) internal successors, (20), 15 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:24:23,398 INFO L87 Difference]: Start difference. First operand 22 states. Second operand has 20 states, 15 states have (on average 1.3333333333333333) internal successors, (20), 15 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:24:23,399 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:24:23,399 INFO L93 Difference]: Finished difference Result 22 states and 28 transitions. [2022-04-07 17:24:23,399 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 28 transitions. [2022-04-07 17:24:23,400 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:24:23,400 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:24:23,400 INFO L74 IsIncluded]: Start isIncluded. First operand has 20 states, 15 states have (on average 1.3333333333333333) internal successors, (20), 15 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 22 states. [2022-04-07 17:24:23,400 INFO L87 Difference]: Start difference. First operand has 20 states, 15 states have (on average 1.3333333333333333) internal successors, (20), 15 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 22 states. [2022-04-07 17:24:23,401 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:24:23,401 INFO L93 Difference]: Finished difference Result 22 states and 28 transitions. [2022-04-07 17:24:23,401 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 28 transitions. [2022-04-07 17:24:23,401 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:24:23,401 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:24:23,401 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:24:23,401 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:24:23,402 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 15 states have (on average 1.3333333333333333) internal successors, (20), 15 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:24:23,402 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 24 transitions. [2022-04-07 17:24:23,402 INFO L78 Accepts]: Start accepts. Automaton has 20 states and 24 transitions. Word has length 15 [2022-04-07 17:24:23,402 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:24:23,402 INFO L478 AbstractCegarLoop]: Abstraction has 20 states and 24 transitions. [2022-04-07 17:24:23,403 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 17 states, 17 states have (on average 1.2941176470588236) internal successors, (22), 14 states have internal predecessors, (22), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:24:23,403 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 24 transitions. [2022-04-07 17:24:23,403 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2022-04-07 17:24:23,403 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:24:23,403 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:24:23,421 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2022-04-07 17:24:23,609 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2,2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:24:23,610 INFO L403 AbstractCegarLoop]: === Iteration 4 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:24:23,610 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:24:23,611 INFO L85 PathProgramCache]: Analyzing trace with hash 842497847, now seen corresponding path program 1 times [2022-04-07 17:24:23,611 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:24:23,611 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [113931946] [2022-04-07 17:24:23,611 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:24:23,611 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:24:23,619 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.0))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-07 17:24:23,629 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:24:23,642 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.1))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-07 17:24:23,756 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:24:23,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:24:23,766 INFO L290 TraceCheckUtils]: 0: Hoare triple {430#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {419#true} is VALID [2022-04-07 17:24:23,766 INFO L290 TraceCheckUtils]: 1: Hoare triple {419#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {419#true} is VALID [2022-04-07 17:24:23,767 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {419#true} {419#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {419#true} is VALID [2022-04-07 17:24:23,767 INFO L272 TraceCheckUtils]: 0: Hoare triple {419#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {430#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:24:23,767 INFO L290 TraceCheckUtils]: 1: Hoare triple {430#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {419#true} is VALID [2022-04-07 17:24:23,767 INFO L290 TraceCheckUtils]: 2: Hoare triple {419#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {419#true} is VALID [2022-04-07 17:24:23,768 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {419#true} {419#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {419#true} is VALID [2022-04-07 17:24:23,768 INFO L272 TraceCheckUtils]: 4: Hoare triple {419#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {419#true} is VALID [2022-04-07 17:24:23,768 INFO L290 TraceCheckUtils]: 5: Hoare triple {419#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {424#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 17:24:23,769 INFO L290 TraceCheckUtils]: 6: Hoare triple {424#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {425#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:24:23,769 INFO L290 TraceCheckUtils]: 7: Hoare triple {425#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {426#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 17:24:23,770 INFO L290 TraceCheckUtils]: 8: Hoare triple {426#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [76] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_8 4294967296))) (or (and (<= .cse0 0) (= v_main_~z~0_8 v_main_~z~0_7) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (= v_main_~x~0_5 v_main_~x~0_6) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)) (and (= v_main_~z~0_7 (+ v_main_~x~0_6 v_main_~z~0_8 (* (- 1) v_main_~x~0_5))) (< 0 .cse0) (forall ((v_it_2 Int)) (or (< 0 (mod (+ v_main_~z~0_8 (* v_it_2 4294967295)) 4294967296)) (not (<= 1 v_it_2)) (not (<= (+ v_main_~x~0_6 v_it_2 1) v_main_~x~0_5)))) (< v_main_~x~0_6 v_main_~x~0_5)))) InVars {main_~x~0=v_main_~x~0_6, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_8, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {427#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:24:23,771 INFO L290 TraceCheckUtils]: 9: Hoare triple {427#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {427#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:24:23,771 INFO L290 TraceCheckUtils]: 10: Hoare triple {427#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {427#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:24:23,772 INFO L272 TraceCheckUtils]: 11: Hoare triple {427#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {428#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:24:23,773 INFO L290 TraceCheckUtils]: 12: Hoare triple {428#(not (= |__VERIFIER_assert_#in~cond| 0))} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {429#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:24:23,773 INFO L290 TraceCheckUtils]: 13: Hoare triple {429#(not (= __VERIFIER_assert_~cond 0))} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {420#false} is VALID [2022-04-07 17:24:23,773 INFO L290 TraceCheckUtils]: 14: Hoare triple {420#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {420#false} is VALID [2022-04-07 17:24:23,773 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:24:23,773 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:24:23,773 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [113931946] [2022-04-07 17:24:23,774 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [113931946] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:24:23,774 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [381806143] [2022-04-07 17:24:23,774 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:24:23,774 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:24:23,774 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:24:23,775 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:24:23,776 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-04-07 17:24:23,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:24:23,804 INFO L263 TraceCheckSpWp]: Trace formula consists of 60 conjuncts, 7 conjunts are in the unsatisfiable core [2022-04-07 17:24:23,812 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:24:23,813 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:24:24,286 INFO L272 TraceCheckUtils]: 0: Hoare triple {419#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {419#true} is VALID [2022-04-07 17:24:24,287 INFO L290 TraceCheckUtils]: 1: Hoare triple {419#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {419#true} is VALID [2022-04-07 17:24:24,287 INFO L290 TraceCheckUtils]: 2: Hoare triple {419#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {419#true} is VALID [2022-04-07 17:24:24,287 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {419#true} {419#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {419#true} is VALID [2022-04-07 17:24:24,287 INFO L272 TraceCheckUtils]: 4: Hoare triple {419#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {419#true} is VALID [2022-04-07 17:24:24,288 INFO L290 TraceCheckUtils]: 5: Hoare triple {419#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {449#(= main_~n~0 main_~x~0)} is VALID [2022-04-07 17:24:24,288 INFO L290 TraceCheckUtils]: 6: Hoare triple {449#(= main_~n~0 main_~x~0)} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {453#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:24:24,288 INFO L290 TraceCheckUtils]: 7: Hoare triple {453#(not (< 0 (mod main_~n~0 4294967296)))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {453#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:24:24,289 INFO L290 TraceCheckUtils]: 8: Hoare triple {453#(not (< 0 (mod main_~n~0 4294967296)))} [76] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_8 4294967296))) (or (and (<= .cse0 0) (= v_main_~z~0_8 v_main_~z~0_7) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (= v_main_~x~0_5 v_main_~x~0_6) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)) (and (= v_main_~z~0_7 (+ v_main_~x~0_6 v_main_~z~0_8 (* (- 1) v_main_~x~0_5))) (< 0 .cse0) (forall ((v_it_2 Int)) (or (< 0 (mod (+ v_main_~z~0_8 (* v_it_2 4294967295)) 4294967296)) (not (<= 1 v_it_2)) (not (<= (+ v_main_~x~0_6 v_it_2 1) v_main_~x~0_5)))) (< v_main_~x~0_6 v_main_~x~0_5)))) InVars {main_~x~0=v_main_~x~0_6, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_8, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {453#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:24:24,289 INFO L290 TraceCheckUtils]: 9: Hoare triple {453#(not (< 0 (mod main_~n~0 4294967296)))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {463#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:24:24,290 INFO L290 TraceCheckUtils]: 10: Hoare triple {463#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {463#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:24:24,290 INFO L272 TraceCheckUtils]: 11: Hoare triple {463#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {470#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:24:24,291 INFO L290 TraceCheckUtils]: 12: Hoare triple {470#(<= 1 |__VERIFIER_assert_#in~cond|)} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {474#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:24:24,291 INFO L290 TraceCheckUtils]: 13: Hoare triple {474#(<= 1 __VERIFIER_assert_~cond)} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {420#false} is VALID [2022-04-07 17:24:24,291 INFO L290 TraceCheckUtils]: 14: Hoare triple {420#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {420#false} is VALID [2022-04-07 17:24:24,292 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 17:24:24,292 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-07 17:24:24,292 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [381806143] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 17:24:24,292 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-07 17:24:24,292 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [9] total 14 [2022-04-07 17:24:24,292 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1782181377] [2022-04-07 17:24:24,292 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 17:24:24,293 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 1.5714285714285714) internal successors, (11), 6 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-07 17:24:24,293 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:24:24,293 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 7 states, 7 states have (on average 1.5714285714285714) internal successors, (11), 6 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:24:24,303 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 15 edges. 15 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:24:24,303 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-04-07 17:24:24,303 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:24:24,304 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-04-07 17:24:24,304 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=144, Unknown=0, NotChecked=0, Total=182 [2022-04-07 17:24:24,304 INFO L87 Difference]: Start difference. First operand 20 states and 24 transitions. Second operand has 7 states, 7 states have (on average 1.5714285714285714) internal successors, (11), 6 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:24:24,384 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:24:24,384 INFO L93 Difference]: Finished difference Result 25 states and 30 transitions. [2022-04-07 17:24:24,384 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-04-07 17:24:24,384 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 1.5714285714285714) internal successors, (11), 6 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-07 17:24:24,384 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:24:24,385 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 1.5714285714285714) internal successors, (11), 6 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:24:24,385 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 30 transitions. [2022-04-07 17:24:24,385 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 1.5714285714285714) internal successors, (11), 6 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:24:24,386 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 30 transitions. [2022-04-07 17:24:24,386 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 9 states and 30 transitions. [2022-04-07 17:24:24,408 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 30 edges. 30 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:24:24,409 INFO L225 Difference]: With dead ends: 25 [2022-04-07 17:24:24,409 INFO L226 Difference]: Without dead ends: 22 [2022-04-07 17:24:24,409 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 38 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=57, Invalid=215, Unknown=0, NotChecked=0, Total=272 [2022-04-07 17:24:24,410 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 7 mSDsluCounter, 50 mSDsCounter, 0 mSdLazyCounter, 21 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 7 SdHoareTripleChecker+Valid, 62 SdHoareTripleChecker+Invalid, 24 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 21 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 3 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 17:24:24,410 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [7 Valid, 62 Invalid, 24 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 21 Invalid, 0 Unknown, 3 Unchecked, 0.0s Time] [2022-04-07 17:24:24,410 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2022-04-07 17:24:24,426 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 21. [2022-04-07 17:24:24,427 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:24:24,427 INFO L82 GeneralOperation]: Start isEquivalent. First operand 22 states. Second operand has 21 states, 16 states have (on average 1.375) internal successors, (22), 16 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:24:24,427 INFO L74 IsIncluded]: Start isIncluded. First operand 22 states. Second operand has 21 states, 16 states have (on average 1.375) internal successors, (22), 16 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:24:24,427 INFO L87 Difference]: Start difference. First operand 22 states. Second operand has 21 states, 16 states have (on average 1.375) internal successors, (22), 16 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:24:24,429 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:24:24,429 INFO L93 Difference]: Finished difference Result 22 states and 27 transitions. [2022-04-07 17:24:24,429 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 27 transitions. [2022-04-07 17:24:24,430 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:24:24,430 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:24:24,431 INFO L74 IsIncluded]: Start isIncluded. First operand has 21 states, 16 states have (on average 1.375) internal successors, (22), 16 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 22 states. [2022-04-07 17:24:24,432 INFO L87 Difference]: Start difference. First operand has 21 states, 16 states have (on average 1.375) internal successors, (22), 16 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 22 states. [2022-04-07 17:24:24,438 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:24:24,438 INFO L93 Difference]: Finished difference Result 22 states and 27 transitions. [2022-04-07 17:24:24,438 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 27 transitions. [2022-04-07 17:24:24,438 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:24:24,439 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:24:24,439 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:24:24,439 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:24:24,439 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 16 states have (on average 1.375) internal successors, (22), 16 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:24:24,441 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 26 transitions. [2022-04-07 17:24:24,441 INFO L78 Accepts]: Start accepts. Automaton has 21 states and 26 transitions. Word has length 15 [2022-04-07 17:24:24,441 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:24:24,441 INFO L478 AbstractCegarLoop]: Abstraction has 21 states and 26 transitions. [2022-04-07 17:24:24,441 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 1.5714285714285714) internal successors, (11), 6 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:24:24,441 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 26 transitions. [2022-04-07 17:24:24,442 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2022-04-07 17:24:24,442 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:24:24,442 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:24:24,464 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2022-04-07 17:24:24,655 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable3 [2022-04-07 17:24:24,656 INFO L403 AbstractCegarLoop]: === Iteration 5 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:24:24,656 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:24:24,656 INFO L85 PathProgramCache]: Analyzing trace with hash 1476846263, now seen corresponding path program 1 times [2022-04-07 17:24:24,656 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:24:24,656 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [657768010] [2022-04-07 17:24:24,656 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:24:24,656 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:24:24,663 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_1.0))) (+ main_~x~0_5 .cse0 (* (- 4294967296) (div (+ main_~x~0_5 .cse0) 4294967296)))) 0)) [2022-04-07 17:24:24,680 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:24:24,687 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_1.1))) (+ main_~x~0_5 .cse0 (* (- 4294967296) (div (+ main_~x~0_5 .cse0) 4294967296)))) 0)) [2022-04-07 17:24:24,865 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:24:24,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:24:24,870 INFO L290 TraceCheckUtils]: 0: Hoare triple {589#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {576#true} is VALID [2022-04-07 17:24:24,871 INFO L290 TraceCheckUtils]: 1: Hoare triple {576#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {576#true} is VALID [2022-04-07 17:24:24,871 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {576#true} {576#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {576#true} is VALID [2022-04-07 17:24:24,873 INFO L272 TraceCheckUtils]: 0: Hoare triple {576#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {589#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:24:24,873 INFO L290 TraceCheckUtils]: 1: Hoare triple {589#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {576#true} is VALID [2022-04-07 17:24:24,873 INFO L290 TraceCheckUtils]: 2: Hoare triple {576#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {576#true} is VALID [2022-04-07 17:24:24,873 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {576#true} {576#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {576#true} is VALID [2022-04-07 17:24:24,873 INFO L272 TraceCheckUtils]: 4: Hoare triple {576#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {576#true} is VALID [2022-04-07 17:24:24,874 INFO L290 TraceCheckUtils]: 5: Hoare triple {576#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {581#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 17:24:24,879 INFO L290 TraceCheckUtils]: 6: Hoare triple {581#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [72] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0) (= v_main_~y~0_6 v_main_~y~0_5)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_6 v_it_1 1) v_main_~y~0_5)))) (< v_main_~y~0_6 v_main_~y~0_5) (< 0 .cse0) (= v_main_~x~0_3 (+ v_main_~x~0_4 v_main_~y~0_6 (* (- 1) v_main_~y~0_5)))))) InVars {main_~y~0=v_main_~y~0_6, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {582#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-07 17:24:24,880 INFO L290 TraceCheckUtils]: 7: Hoare triple {582#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {583#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-07 17:24:24,890 INFO L290 TraceCheckUtils]: 8: Hoare triple {583#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {584#(or (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-07 17:24:24,891 INFO L290 TraceCheckUtils]: 9: Hoare triple {584#(or (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {585#(or (and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-07 17:24:24,892 INFO L290 TraceCheckUtils]: 10: Hoare triple {585#(or (and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {586#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:24:24,893 INFO L272 TraceCheckUtils]: 11: Hoare triple {586#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {587#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:24:24,893 INFO L290 TraceCheckUtils]: 12: Hoare triple {587#(not (= |__VERIFIER_assert_#in~cond| 0))} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {588#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:24:24,893 INFO L290 TraceCheckUtils]: 13: Hoare triple {588#(not (= __VERIFIER_assert_~cond 0))} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {577#false} is VALID [2022-04-07 17:24:24,894 INFO L290 TraceCheckUtils]: 14: Hoare triple {577#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {577#false} is VALID [2022-04-07 17:24:24,894 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:24:24,894 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:24:24,894 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [657768010] [2022-04-07 17:24:24,894 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [657768010] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:24:24,894 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1249794711] [2022-04-07 17:24:24,894 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:24:24,894 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:24:24,894 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:24:24,895 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:24:24,895 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-04-07 17:24:24,933 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:24:24,934 INFO L263 TraceCheckSpWp]: Trace formula consists of 60 conjuncts, 12 conjunts are in the unsatisfiable core [2022-04-07 17:24:24,963 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:24:24,963 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:24:26,802 INFO L272 TraceCheckUtils]: 0: Hoare triple {576#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {576#true} is VALID [2022-04-07 17:24:26,802 INFO L290 TraceCheckUtils]: 1: Hoare triple {576#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {576#true} is VALID [2022-04-07 17:24:26,802 INFO L290 TraceCheckUtils]: 2: Hoare triple {576#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {576#true} is VALID [2022-04-07 17:24:26,802 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {576#true} {576#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {576#true} is VALID [2022-04-07 17:24:26,803 INFO L272 TraceCheckUtils]: 4: Hoare triple {576#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {576#true} is VALID [2022-04-07 17:24:26,803 INFO L290 TraceCheckUtils]: 5: Hoare triple {576#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {581#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 17:24:26,807 INFO L290 TraceCheckUtils]: 6: Hoare triple {581#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [72] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0) (= v_main_~y~0_6 v_main_~y~0_5)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_6 v_it_1 1) v_main_~y~0_5)))) (< v_main_~y~0_6 v_main_~y~0_5) (< 0 .cse0) (= v_main_~x~0_3 (+ v_main_~x~0_4 v_main_~y~0_6 (* (- 1) v_main_~y~0_5)))))) InVars {main_~y~0=v_main_~y~0_6, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {611#(or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)))} is VALID [2022-04-07 17:24:26,810 INFO L290 TraceCheckUtils]: 7: Hoare triple {611#(or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {615#(or (and (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)) (and (<= (div (+ main_~y~0 (* (- 1) main_~n~0)) (- 4294967296)) (div (+ main_~n~0 (* (- 1) main_~y~0)) 4294967296)) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)))} is VALID [2022-04-07 17:24:26,811 INFO L290 TraceCheckUtils]: 8: Hoare triple {615#(or (and (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)) (and (<= (div (+ main_~y~0 (* (- 1) main_~n~0)) (- 4294967296)) (div (+ main_~n~0 (* (- 1) main_~y~0)) 4294967296)) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {619#(or (and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0)) (and (< 0 main_~z~0) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~z~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (<= (div (+ main_~z~0 (* (- 1) main_~n~0)) (- 4294967296)) (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296))))} is VALID [2022-04-07 17:24:26,814 INFO L290 TraceCheckUtils]: 9: Hoare triple {619#(or (and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0)) (and (< 0 main_~z~0) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~z~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (<= (div (+ main_~z~0 (* (- 1) main_~n~0)) (- 4294967296)) (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296))))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {623#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-07 17:24:26,814 INFO L290 TraceCheckUtils]: 10: Hoare triple {623#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {623#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-07 17:24:26,815 INFO L272 TraceCheckUtils]: 11: Hoare triple {623#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {630#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:24:26,815 INFO L290 TraceCheckUtils]: 12: Hoare triple {630#(<= 1 |__VERIFIER_assert_#in~cond|)} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {634#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:24:26,816 INFO L290 TraceCheckUtils]: 13: Hoare triple {634#(<= 1 __VERIFIER_assert_~cond)} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {577#false} is VALID [2022-04-07 17:24:26,816 INFO L290 TraceCheckUtils]: 14: Hoare triple {577#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {577#false} is VALID [2022-04-07 17:24:26,816 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:24:26,816 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 17:24:31,058 INFO L290 TraceCheckUtils]: 14: Hoare triple {577#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {577#false} is VALID [2022-04-07 17:24:31,058 INFO L290 TraceCheckUtils]: 13: Hoare triple {634#(<= 1 __VERIFIER_assert_~cond)} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {577#false} is VALID [2022-04-07 17:24:31,059 INFO L290 TraceCheckUtils]: 12: Hoare triple {630#(<= 1 |__VERIFIER_assert_#in~cond|)} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {634#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:24:31,060 INFO L272 TraceCheckUtils]: 11: Hoare triple {586#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {630#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:24:31,060 INFO L290 TraceCheckUtils]: 10: Hoare triple {586#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {586#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:24:31,061 INFO L290 TraceCheckUtils]: 9: Hoare triple {656#(or (< 0 (mod main_~z~0 4294967296)) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {586#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:24:31,062 INFO L290 TraceCheckUtils]: 8: Hoare triple {583#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {656#(or (< 0 (mod main_~z~0 4294967296)) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:24:31,063 INFO L290 TraceCheckUtils]: 7: Hoare triple {582#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {583#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-07 17:24:31,081 INFO L290 TraceCheckUtils]: 6: Hoare triple {666#(or (forall ((aux_mod_v_main_~y~0_18_31 Int)) (or (>= aux_mod_v_main_~y~0_18_31 4294967296) (> 0 aux_mod_v_main_~y~0_18_31) (and (or (forall ((aux_div_v_main_~x~0_15_31 Int) (aux_div_v_main_~y~0_18_31 Int)) (or (<= (+ (* aux_div_v_main_~y~0_18_31 4294967296) (* aux_div_v_main_~x~0_15_31 4294967296) 1) (+ main_~y~0 main_~x~0)) (< (+ main_~y~0 main_~x~0) (+ (* aux_div_v_main_~y~0_18_31 4294967296) aux_mod_v_main_~y~0_18_31 (* aux_div_v_main_~x~0_15_31 4294967296))) (not (< main_~y~0 (+ (* aux_div_v_main_~y~0_18_31 4294967296) aux_mod_v_main_~y~0_18_31))) (exists ((v_it_1 Int)) (and (not (< 0 (mod (+ main_~x~0 (* v_it_1 4294967295)) 4294967296))) (<= (+ v_it_1 main_~y~0 1) (+ (* aux_div_v_main_~y~0_18_31 4294967296) aux_mod_v_main_~y~0_18_31)) (<= 1 v_it_1))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (forall ((aux_div_v_main_~y~0_18_31 Int)) (not (= (+ (* aux_div_v_main_~y~0_18_31 4294967296) aux_mod_v_main_~y~0_18_31) main_~y~0))) (forall ((aux_div_v_main_~x~0_15_31 Int)) (or (< main_~x~0 (* aux_div_v_main_~x~0_15_31 4294967296)) (<= (+ (* aux_div_v_main_~x~0_15_31 4294967296) 1) (+ main_~x~0 aux_mod_v_main_~y~0_18_31)))) (< 0 (mod main_~x~0 4294967296)))))) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [72] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0) (= v_main_~y~0_6 v_main_~y~0_5)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_6 v_it_1 1) v_main_~y~0_5)))) (< v_main_~y~0_6 v_main_~y~0_5) (< 0 .cse0) (= v_main_~x~0_3 (+ v_main_~x~0_4 v_main_~y~0_6 (* (- 1) v_main_~y~0_5)))))) InVars {main_~y~0=v_main_~y~0_6, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {582#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-07 17:24:31,084 INFO L290 TraceCheckUtils]: 5: Hoare triple {576#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {666#(or (forall ((aux_mod_v_main_~y~0_18_31 Int)) (or (>= aux_mod_v_main_~y~0_18_31 4294967296) (> 0 aux_mod_v_main_~y~0_18_31) (and (or (forall ((aux_div_v_main_~x~0_15_31 Int) (aux_div_v_main_~y~0_18_31 Int)) (or (<= (+ (* aux_div_v_main_~y~0_18_31 4294967296) (* aux_div_v_main_~x~0_15_31 4294967296) 1) (+ main_~y~0 main_~x~0)) (< (+ main_~y~0 main_~x~0) (+ (* aux_div_v_main_~y~0_18_31 4294967296) aux_mod_v_main_~y~0_18_31 (* aux_div_v_main_~x~0_15_31 4294967296))) (not (< main_~y~0 (+ (* aux_div_v_main_~y~0_18_31 4294967296) aux_mod_v_main_~y~0_18_31))) (exists ((v_it_1 Int)) (and (not (< 0 (mod (+ main_~x~0 (* v_it_1 4294967295)) 4294967296))) (<= (+ v_it_1 main_~y~0 1) (+ (* aux_div_v_main_~y~0_18_31 4294967296) aux_mod_v_main_~y~0_18_31)) (<= 1 v_it_1))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (forall ((aux_div_v_main_~y~0_18_31 Int)) (not (= (+ (* aux_div_v_main_~y~0_18_31 4294967296) aux_mod_v_main_~y~0_18_31) main_~y~0))) (forall ((aux_div_v_main_~x~0_15_31 Int)) (or (< main_~x~0 (* aux_div_v_main_~x~0_15_31 4294967296)) (<= (+ (* aux_div_v_main_~x~0_15_31 4294967296) 1) (+ main_~x~0 aux_mod_v_main_~y~0_18_31)))) (< 0 (mod main_~x~0 4294967296)))))) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-07 17:24:31,084 INFO L272 TraceCheckUtils]: 4: Hoare triple {576#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {576#true} is VALID [2022-04-07 17:24:31,084 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {576#true} {576#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {576#true} is VALID [2022-04-07 17:24:31,084 INFO L290 TraceCheckUtils]: 2: Hoare triple {576#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {576#true} is VALID [2022-04-07 17:24:31,084 INFO L290 TraceCheckUtils]: 1: Hoare triple {576#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {576#true} is VALID [2022-04-07 17:24:31,094 INFO L272 TraceCheckUtils]: 0: Hoare triple {576#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {576#true} is VALID [2022-04-07 17:24:31,094 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:24:31,094 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1249794711] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 17:24:31,094 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 17:24:31,095 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 9, 9] total 19 [2022-04-07 17:24:31,095 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1601736510] [2022-04-07 17:24:31,095 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 17:24:31,095 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 1.263157894736842) internal successors, (24), 16 states have internal predecessors, (24), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-07 17:24:31,095 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:24:31,096 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 19 states, 19 states have (on average 1.263157894736842) internal successors, (24), 16 states have internal predecessors, (24), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:24:33,230 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 31 edges. 30 inductive. 0 not inductive. 1 times theorem prover too weak to decide inductivity. [2022-04-07 17:24:33,231 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2022-04-07 17:24:33,231 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:24:33,231 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2022-04-07 17:24:33,231 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=65, Invalid=276, Unknown=1, NotChecked=0, Total=342 [2022-04-07 17:24:33,232 INFO L87 Difference]: Start difference. First operand 21 states and 26 transitions. Second operand has 19 states, 19 states have (on average 1.263157894736842) internal successors, (24), 16 states have internal predecessors, (24), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:24:41,745 WARN L232 SmtUtils]: Spent 6.10s on a formula simplification that was a NOOP. DAG size: 52 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 17:24:42,222 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:24:42,222 INFO L93 Difference]: Finished difference Result 36 states and 48 transitions. [2022-04-07 17:24:42,222 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2022-04-07 17:24:42,222 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 1.263157894736842) internal successors, (24), 16 states have internal predecessors, (24), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-07 17:24:42,222 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:24:42,223 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.263157894736842) internal successors, (24), 16 states have internal predecessors, (24), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:24:42,224 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 45 transitions. [2022-04-07 17:24:42,224 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.263157894736842) internal successors, (24), 16 states have internal predecessors, (24), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:24:42,225 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 45 transitions. [2022-04-07 17:24:42,225 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 16 states and 45 transitions. [2022-04-07 17:24:42,359 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 45 edges. 45 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:24:42,360 INFO L225 Difference]: With dead ends: 36 [2022-04-07 17:24:42,360 INFO L226 Difference]: Without dead ends: 32 [2022-04-07 17:24:42,360 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 20 SyntacticMatches, 5 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 197 ImplicationChecksByTransitivity, 12.1s TimeCoverageRelationStatistics Valid=172, Invalid=638, Unknown=2, NotChecked=0, Total=812 [2022-04-07 17:24:42,361 INFO L913 BasicCegarLoop]: 9 mSDtfsCounter, 47 mSDsluCounter, 42 mSDsCounter, 0 mSdLazyCounter, 77 mSolverCounterSat, 11 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 47 SdHoareTripleChecker+Valid, 51 SdHoareTripleChecker+Invalid, 122 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 11 IncrementalHoareTripleChecker+Valid, 77 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 34 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 17:24:42,361 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [47 Valid, 51 Invalid, 122 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [11 Valid, 77 Invalid, 0 Unknown, 34 Unchecked, 0.1s Time] [2022-04-07 17:24:42,361 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states. [2022-04-07 17:24:42,362 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 25. [2022-04-07 17:24:42,363 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:24:42,363 INFO L82 GeneralOperation]: Start isEquivalent. First operand 32 states. Second operand has 25 states, 20 states have (on average 1.45) internal successors, (29), 20 states have internal predecessors, (29), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:24:42,363 INFO L74 IsIncluded]: Start isIncluded. First operand 32 states. Second operand has 25 states, 20 states have (on average 1.45) internal successors, (29), 20 states have internal predecessors, (29), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:24:42,363 INFO L87 Difference]: Start difference. First operand 32 states. Second operand has 25 states, 20 states have (on average 1.45) internal successors, (29), 20 states have internal predecessors, (29), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:24:42,364 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:24:42,364 INFO L93 Difference]: Finished difference Result 32 states and 43 transitions. [2022-04-07 17:24:42,364 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 43 transitions. [2022-04-07 17:24:42,364 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:24:42,364 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:24:42,364 INFO L74 IsIncluded]: Start isIncluded. First operand has 25 states, 20 states have (on average 1.45) internal successors, (29), 20 states have internal predecessors, (29), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 32 states. [2022-04-07 17:24:42,365 INFO L87 Difference]: Start difference. First operand has 25 states, 20 states have (on average 1.45) internal successors, (29), 20 states have internal predecessors, (29), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 32 states. [2022-04-07 17:24:42,365 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:24:42,365 INFO L93 Difference]: Finished difference Result 32 states and 43 transitions. [2022-04-07 17:24:42,365 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 43 transitions. [2022-04-07 17:24:42,366 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:24:42,366 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:24:42,366 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:24:42,366 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:24:42,366 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 20 states have (on average 1.45) internal successors, (29), 20 states have internal predecessors, (29), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:24:42,366 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 33 transitions. [2022-04-07 17:24:42,367 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 33 transitions. Word has length 15 [2022-04-07 17:24:42,367 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:24:42,367 INFO L478 AbstractCegarLoop]: Abstraction has 25 states and 33 transitions. [2022-04-07 17:24:42,367 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 19 states, 19 states have (on average 1.263157894736842) internal successors, (24), 16 states have internal predecessors, (24), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:24:42,367 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 33 transitions. [2022-04-07 17:24:42,367 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-04-07 17:24:42,368 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:24:42,368 INFO L499 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:24:42,386 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Ended with exit code 0 [2022-04-07 17:24:42,582 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:24:42,583 INFO L403 AbstractCegarLoop]: === Iteration 6 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:24:42,583 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:24:42,583 INFO L85 PathProgramCache]: Analyzing trace with hash -2113412797, now seen corresponding path program 2 times [2022-04-07 17:24:42,583 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:24:42,583 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [422205528] [2022-04-07 17:24:42,583 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:24:42,583 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:24:42,597 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.0))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-07 17:24:42,598 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.1))) (+ main_~y~0_9 .cse0 (* (- 4294967296) (div (+ main_~y~0_9 .cse0) 4294967296)))) 0)) [2022-04-07 17:24:42,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:24:42,623 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.3))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-07 17:24:42,626 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.4))) (+ main_~y~0_9 .cse0 (* (- 4294967296) (div (+ main_~y~0_9 .cse0) 4294967296)))) 0)) [2022-04-07 17:24:42,735 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:24:42,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:24:42,741 INFO L290 TraceCheckUtils]: 0: Hoare triple {844#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {833#true} is VALID [2022-04-07 17:24:42,741 INFO L290 TraceCheckUtils]: 1: Hoare triple {833#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {833#true} is VALID [2022-04-07 17:24:42,741 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {833#true} {833#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {833#true} is VALID [2022-04-07 17:24:42,742 INFO L272 TraceCheckUtils]: 0: Hoare triple {833#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {844#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:24:42,742 INFO L290 TraceCheckUtils]: 1: Hoare triple {844#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {833#true} is VALID [2022-04-07 17:24:42,742 INFO L290 TraceCheckUtils]: 2: Hoare triple {833#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {833#true} is VALID [2022-04-07 17:24:42,742 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {833#true} {833#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {833#true} is VALID [2022-04-07 17:24:42,742 INFO L272 TraceCheckUtils]: 4: Hoare triple {833#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {833#true} is VALID [2022-04-07 17:24:42,743 INFO L290 TraceCheckUtils]: 5: Hoare triple {833#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {838#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 17:24:42,744 INFO L290 TraceCheckUtils]: 6: Hoare triple {838#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {839#(and (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} is VALID [2022-04-07 17:24:42,744 INFO L290 TraceCheckUtils]: 7: Hoare triple {839#(and (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {840#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} is VALID [2022-04-07 17:24:42,744 INFO L290 TraceCheckUtils]: 8: Hoare triple {840#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {840#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} is VALID [2022-04-07 17:24:42,745 INFO L290 TraceCheckUtils]: 9: Hoare triple {840#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} [79] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (= (+ (* (- 1) v_main_~y~0_3) v_main_~y~0_4 v_main_~z~0_3) v_main_~z~0_2) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {840#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} is VALID [2022-04-07 17:24:42,746 INFO L290 TraceCheckUtils]: 10: Hoare triple {840#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} [79] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (= (+ (* (- 1) v_main_~y~0_3) v_main_~y~0_4 v_main_~z~0_3) v_main_~z~0_2) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {841#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))) (<= 0 main_~z~0))} is VALID [2022-04-07 17:24:42,747 INFO L290 TraceCheckUtils]: 11: Hoare triple {841#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))) (<= 0 main_~z~0))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {841#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))) (<= 0 main_~z~0))} is VALID [2022-04-07 17:24:42,748 INFO L272 TraceCheckUtils]: 12: Hoare triple {841#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))) (<= 0 main_~z~0))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {842#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:24:42,748 INFO L290 TraceCheckUtils]: 13: Hoare triple {842#(not (= |__VERIFIER_assert_#in~cond| 0))} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {843#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:24:42,748 INFO L290 TraceCheckUtils]: 14: Hoare triple {843#(not (= __VERIFIER_assert_~cond 0))} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {834#false} is VALID [2022-04-07 17:24:42,748 INFO L290 TraceCheckUtils]: 15: Hoare triple {834#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {834#false} is VALID [2022-04-07 17:24:42,749 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 17:24:42,749 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:24:42,749 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [422205528] [2022-04-07 17:24:42,749 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [422205528] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:24:42,749 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2003026634] [2022-04-07 17:24:42,749 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-07 17:24:42,749 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:24:42,749 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:24:42,750 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:24:42,751 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-04-07 17:24:42,779 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-07 17:24:42,779 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 17:24:42,780 INFO L263 TraceCheckSpWp]: Trace formula consists of 61 conjuncts, 13 conjunts are in the unsatisfiable core [2022-04-07 17:24:42,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:24:42,793 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:24:43,054 INFO L272 TraceCheckUtils]: 0: Hoare triple {833#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {833#true} is VALID [2022-04-07 17:24:43,055 INFO L290 TraceCheckUtils]: 1: Hoare triple {833#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {833#true} is VALID [2022-04-07 17:24:43,055 INFO L290 TraceCheckUtils]: 2: Hoare triple {833#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {833#true} is VALID [2022-04-07 17:24:43,055 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {833#true} {833#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {833#true} is VALID [2022-04-07 17:24:43,055 INFO L272 TraceCheckUtils]: 4: Hoare triple {833#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {833#true} is VALID [2022-04-07 17:24:43,059 INFO L290 TraceCheckUtils]: 5: Hoare triple {833#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {838#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 17:24:43,060 INFO L290 TraceCheckUtils]: 6: Hoare triple {838#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {839#(and (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} is VALID [2022-04-07 17:24:43,060 INFO L290 TraceCheckUtils]: 7: Hoare triple {839#(and (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {840#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} is VALID [2022-04-07 17:24:43,061 INFO L290 TraceCheckUtils]: 8: Hoare triple {840#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {840#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} is VALID [2022-04-07 17:24:43,062 INFO L290 TraceCheckUtils]: 9: Hoare triple {840#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} [79] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (= (+ (* (- 1) v_main_~y~0_3) v_main_~y~0_4 v_main_~z~0_3) v_main_~z~0_2) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {840#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} is VALID [2022-04-07 17:24:43,062 INFO L290 TraceCheckUtils]: 10: Hoare triple {840#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} [79] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (= (+ (* (- 1) v_main_~y~0_3) v_main_~y~0_4 v_main_~z~0_3) v_main_~z~0_2) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {878#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-07 17:24:43,063 INFO L290 TraceCheckUtils]: 11: Hoare triple {878#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {878#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-07 17:24:43,063 INFO L272 TraceCheckUtils]: 12: Hoare triple {878#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {885#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:24:43,064 INFO L290 TraceCheckUtils]: 13: Hoare triple {885#(<= 1 |__VERIFIER_assert_#in~cond|)} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {889#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:24:43,064 INFO L290 TraceCheckUtils]: 14: Hoare triple {889#(<= 1 __VERIFIER_assert_~cond)} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {834#false} is VALID [2022-04-07 17:24:43,064 INFO L290 TraceCheckUtils]: 15: Hoare triple {834#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {834#false} is VALID [2022-04-07 17:24:43,064 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 17:24:43,064 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 17:25:30,526 WARN L232 SmtUtils]: Spent 6.07s on a formula simplification that was a NOOP. DAG size: 68 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 17:25:37,928 INFO L290 TraceCheckUtils]: 15: Hoare triple {834#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {834#false} is VALID [2022-04-07 17:25:37,929 INFO L290 TraceCheckUtils]: 14: Hoare triple {889#(<= 1 __VERIFIER_assert_~cond)} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {834#false} is VALID [2022-04-07 17:25:37,929 INFO L290 TraceCheckUtils]: 13: Hoare triple {885#(<= 1 |__VERIFIER_assert_#in~cond|)} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {889#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:25:37,930 INFO L272 TraceCheckUtils]: 12: Hoare triple {905#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {885#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:25:37,930 INFO L290 TraceCheckUtils]: 11: Hoare triple {905#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {905#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} is VALID [2022-04-07 17:25:39,962 WARN L290 TraceCheckUtils]: 10: Hoare triple {912#(forall ((aux_mod_v_main_~z~0_24_31 Int)) (or (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_24_31) (and (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_24_31 Int)) (or (exists ((v_it_3 Int)) (and (<= (+ v_it_3 main_~z~0 1) (+ (* 4294967296 aux_div_v_main_~z~0_24_31) aux_mod_v_main_~z~0_24_31)) (<= 1 v_it_3) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296))))) (not (< main_~z~0 (+ (* 4294967296 aux_div_v_main_~z~0_24_31) aux_mod_v_main_~z~0_24_31)))))) (or (forall ((aux_div_v_main_~z~0_24_31 Int)) (not (= main_~z~0 (+ (* 4294967296 aux_div_v_main_~z~0_24_31) aux_mod_v_main_~z~0_24_31)))) (< 0 (mod main_~y~0 4294967296)))) (>= aux_mod_v_main_~z~0_24_31 4294967296) (> 0 aux_mod_v_main_~z~0_24_31)))} [79] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (= (+ (* (- 1) v_main_~y~0_3) v_main_~y~0_4 v_main_~z~0_3) v_main_~z~0_2) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {905#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} is UNKNOWN [2022-04-07 17:25:41,979 WARN L290 TraceCheckUtils]: 9: Hoare triple {916#(forall ((aux_mod_v_main_~z~0_24_31 Int)) (or (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_24_31) (>= aux_mod_v_main_~z~0_24_31 4294967296) (> 0 aux_mod_v_main_~z~0_24_31) (and (or (forall ((aux_div_v_main_~z~0_24_31 Int)) (not (= main_~z~0 (+ (* 4294967296 aux_div_v_main_~z~0_24_31) aux_mod_v_main_~z~0_24_31)))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((v_main_~z~0_25 Int)) (or (exists ((v_it_3 Int)) (and (<= 1 v_it_3) (<= (+ v_it_3 main_~z~0 1) v_main_~z~0_25) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296))))) (not (< main_~z~0 v_main_~z~0_25)) (and (or (forall ((aux_div_v_main_~z~0_24_31 Int)) (or (not (< v_main_~z~0_25 (+ (* 4294967296 aux_div_v_main_~z~0_24_31) aux_mod_v_main_~z~0_24_31))) (exists ((v_it_3 Int)) (and (<= 1 v_it_3) (<= (+ v_main_~z~0_25 v_it_3 1) (+ (* 4294967296 aux_div_v_main_~z~0_24_31) aux_mod_v_main_~z~0_24_31)) (not (< 0 (mod (+ main_~z~0 main_~y~0 (* v_it_3 4294967295) (* v_main_~z~0_25 4294967295)) 4294967296))))))) (not (< 0 (mod (+ main_~z~0 main_~y~0 (* v_main_~z~0_25 4294967295)) 4294967296)))) (or (forall ((aux_div_v_main_~z~0_24_31 Int)) (not (= v_main_~z~0_25 (+ (* 4294967296 aux_div_v_main_~z~0_24_31) aux_mod_v_main_~z~0_24_31)))) (< 0 (mod (+ main_~z~0 main_~y~0 (* v_main_~z~0_25 4294967295)) 4294967296))))))))))} [79] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (= (+ (* (- 1) v_main_~y~0_3) v_main_~y~0_4 v_main_~z~0_3) v_main_~z~0_2) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {912#(forall ((aux_mod_v_main_~z~0_24_31 Int)) (or (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_24_31) (and (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_24_31 Int)) (or (exists ((v_it_3 Int)) (and (<= (+ v_it_3 main_~z~0 1) (+ (* 4294967296 aux_div_v_main_~z~0_24_31) aux_mod_v_main_~z~0_24_31)) (<= 1 v_it_3) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296))))) (not (< main_~z~0 (+ (* 4294967296 aux_div_v_main_~z~0_24_31) aux_mod_v_main_~z~0_24_31)))))) (or (forall ((aux_div_v_main_~z~0_24_31 Int)) (not (= main_~z~0 (+ (* 4294967296 aux_div_v_main_~z~0_24_31) aux_mod_v_main_~z~0_24_31)))) (< 0 (mod main_~y~0 4294967296)))) (>= aux_mod_v_main_~z~0_24_31 4294967296) (> 0 aux_mod_v_main_~z~0_24_31)))} is UNKNOWN [2022-04-07 17:25:43,996 WARN L290 TraceCheckUtils]: 8: Hoare triple {920#(or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_mod_v_main_~z~0_24_31 Int)) (or (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_24_31) (>= aux_mod_v_main_~z~0_24_31 4294967296) (> 0 aux_mod_v_main_~z~0_24_31) (and (or (forall ((aux_div_v_main_~z~0_24_31 Int)) (not (= main_~z~0 (+ (* 4294967296 aux_div_v_main_~z~0_24_31) aux_mod_v_main_~z~0_24_31)))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((v_main_~z~0_25 Int)) (or (exists ((v_it_3 Int)) (and (<= 1 v_it_3) (<= (+ v_it_3 main_~z~0 1) v_main_~z~0_25) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296))))) (not (< main_~z~0 v_main_~z~0_25)) (and (or (forall ((aux_div_v_main_~z~0_24_31 Int)) (or (not (< v_main_~z~0_25 (+ (* 4294967296 aux_div_v_main_~z~0_24_31) aux_mod_v_main_~z~0_24_31))) (exists ((v_it_3 Int)) (and (<= 1 v_it_3) (<= (+ v_main_~z~0_25 v_it_3 1) (+ (* 4294967296 aux_div_v_main_~z~0_24_31) aux_mod_v_main_~z~0_24_31)) (not (< 0 (mod (+ main_~z~0 main_~y~0 (* v_it_3 4294967295) (* v_main_~z~0_25 4294967295)) 4294967296))))))) (not (< 0 (mod (+ main_~z~0 main_~y~0 (* v_main_~z~0_25 4294967295)) 4294967296)))) (or (forall ((aux_div_v_main_~z~0_24_31 Int)) (not (= v_main_~z~0_25 (+ (* 4294967296 aux_div_v_main_~z~0_24_31) aux_mod_v_main_~z~0_24_31)))) (< 0 (mod (+ main_~z~0 main_~y~0 (* v_main_~z~0_25 4294967295)) 4294967296)))))))))))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {916#(forall ((aux_mod_v_main_~z~0_24_31 Int)) (or (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_24_31) (>= aux_mod_v_main_~z~0_24_31 4294967296) (> 0 aux_mod_v_main_~z~0_24_31) (and (or (forall ((aux_div_v_main_~z~0_24_31 Int)) (not (= main_~z~0 (+ (* 4294967296 aux_div_v_main_~z~0_24_31) aux_mod_v_main_~z~0_24_31)))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((v_main_~z~0_25 Int)) (or (exists ((v_it_3 Int)) (and (<= 1 v_it_3) (<= (+ v_it_3 main_~z~0 1) v_main_~z~0_25) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296))))) (not (< main_~z~0 v_main_~z~0_25)) (and (or (forall ((aux_div_v_main_~z~0_24_31 Int)) (or (not (< v_main_~z~0_25 (+ (* 4294967296 aux_div_v_main_~z~0_24_31) aux_mod_v_main_~z~0_24_31))) (exists ((v_it_3 Int)) (and (<= 1 v_it_3) (<= (+ v_main_~z~0_25 v_it_3 1) (+ (* 4294967296 aux_div_v_main_~z~0_24_31) aux_mod_v_main_~z~0_24_31)) (not (< 0 (mod (+ main_~z~0 main_~y~0 (* v_it_3 4294967295) (* v_main_~z~0_25 4294967295)) 4294967296))))))) (not (< 0 (mod (+ main_~z~0 main_~y~0 (* v_main_~z~0_25 4294967295)) 4294967296)))) (or (forall ((aux_div_v_main_~z~0_24_31 Int)) (not (= v_main_~z~0_25 (+ (* 4294967296 aux_div_v_main_~z~0_24_31) aux_mod_v_main_~z~0_24_31)))) (< 0 (mod (+ main_~z~0 main_~y~0 (* v_main_~z~0_25 4294967295)) 4294967296))))))))))} is UNKNOWN [2022-04-07 17:25:44,006 INFO L290 TraceCheckUtils]: 7: Hoare triple {924#(or (<= (div (+ (- 1) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 (* (- 1) (mod main_~n~0 4294967296))) 4294967296) 1)) (< 0 (mod main_~y~0 4294967296)))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {920#(or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_mod_v_main_~z~0_24_31 Int)) (or (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_24_31) (>= aux_mod_v_main_~z~0_24_31 4294967296) (> 0 aux_mod_v_main_~z~0_24_31) (and (or (forall ((aux_div_v_main_~z~0_24_31 Int)) (not (= main_~z~0 (+ (* 4294967296 aux_div_v_main_~z~0_24_31) aux_mod_v_main_~z~0_24_31)))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((v_main_~z~0_25 Int)) (or (exists ((v_it_3 Int)) (and (<= 1 v_it_3) (<= (+ v_it_3 main_~z~0 1) v_main_~z~0_25) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296))))) (not (< main_~z~0 v_main_~z~0_25)) (and (or (forall ((aux_div_v_main_~z~0_24_31 Int)) (or (not (< v_main_~z~0_25 (+ (* 4294967296 aux_div_v_main_~z~0_24_31) aux_mod_v_main_~z~0_24_31))) (exists ((v_it_3 Int)) (and (<= 1 v_it_3) (<= (+ v_main_~z~0_25 v_it_3 1) (+ (* 4294967296 aux_div_v_main_~z~0_24_31) aux_mod_v_main_~z~0_24_31)) (not (< 0 (mod (+ main_~z~0 main_~y~0 (* v_it_3 4294967295) (* v_main_~z~0_25 4294967295)) 4294967296))))))) (not (< 0 (mod (+ main_~z~0 main_~y~0 (* v_main_~z~0_25 4294967295)) 4294967296)))) (or (forall ((aux_div_v_main_~z~0_24_31 Int)) (not (= v_main_~z~0_25 (+ (* 4294967296 aux_div_v_main_~z~0_24_31) aux_mod_v_main_~z~0_24_31)))) (< 0 (mod (+ main_~z~0 main_~y~0 (* v_main_~z~0_25 4294967295)) 4294967296)))))))))))} is VALID [2022-04-07 17:25:44,006 INFO L290 TraceCheckUtils]: 6: Hoare triple {928#(or (< 0 (mod main_~x~0 4294967296)) (<= (div (+ (- 1) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 (* (- 1) (mod main_~n~0 4294967296))) 4294967296) 1)) (< 0 (mod main_~y~0 4294967296)))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {924#(or (<= (div (+ (- 1) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 (* (- 1) (mod main_~n~0 4294967296))) 4294967296) 1)) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-07 17:25:44,007 INFO L290 TraceCheckUtils]: 5: Hoare triple {833#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {928#(or (< 0 (mod main_~x~0 4294967296)) (<= (div (+ (- 1) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 (* (- 1) (mod main_~n~0 4294967296))) 4294967296) 1)) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-07 17:25:44,007 INFO L272 TraceCheckUtils]: 4: Hoare triple {833#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {833#true} is VALID [2022-04-07 17:25:44,007 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {833#true} {833#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {833#true} is VALID [2022-04-07 17:25:44,007 INFO L290 TraceCheckUtils]: 2: Hoare triple {833#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {833#true} is VALID [2022-04-07 17:25:44,008 INFO L290 TraceCheckUtils]: 1: Hoare triple {833#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {833#true} is VALID [2022-04-07 17:25:44,008 INFO L272 TraceCheckUtils]: 0: Hoare triple {833#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {833#true} is VALID [2022-04-07 17:25:44,008 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 2 refuted. 1 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:25:44,008 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2003026634] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 17:25:44,008 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 17:25:44,008 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 8, 10] total 18 [2022-04-07 17:25:44,008 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [303967116] [2022-04-07 17:25:44,008 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 17:25:44,009 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 1.3333333333333333) internal successors, (24), 15 states have internal predecessors, (24), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-07 17:25:44,009 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:25:44,009 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 18 states, 18 states have (on average 1.3333333333333333) internal successors, (24), 15 states have internal predecessors, (24), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:25:50,101 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 31 edges. 28 inductive. 0 not inductive. 3 times theorem prover too weak to decide inductivity. [2022-04-07 17:25:50,101 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 18 states [2022-04-07 17:25:50,101 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:25:50,101 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2022-04-07 17:25:50,102 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=230, Unknown=21, NotChecked=0, Total=306 [2022-04-07 17:25:50,102 INFO L87 Difference]: Start difference. First operand 25 states and 33 transitions. Second operand has 18 states, 18 states have (on average 1.3333333333333333) internal successors, (24), 15 states have internal predecessors, (24), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:25:58,602 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:25:58,602 INFO L93 Difference]: Finished difference Result 32 states and 42 transitions. [2022-04-07 17:25:58,603 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-04-07 17:25:58,603 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 1.3333333333333333) internal successors, (24), 15 states have internal predecessors, (24), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-07 17:25:58,603 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:25:58,603 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 18 states have (on average 1.3333333333333333) internal successors, (24), 15 states have internal predecessors, (24), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:25:58,604 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 32 transitions. [2022-04-07 17:25:58,604 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 18 states have (on average 1.3333333333333333) internal successors, (24), 15 states have internal predecessors, (24), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:25:58,605 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 32 transitions. [2022-04-07 17:25:58,605 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 10 states and 32 transitions. [2022-04-07 17:25:58,632 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 32 edges. 32 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:25:58,632 INFO L225 Difference]: With dead ends: 32 [2022-04-07 17:25:58,632 INFO L226 Difference]: Without dead ends: 26 [2022-04-07 17:25:58,633 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 22 SyntacticMatches, 5 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 82 ImplicationChecksByTransitivity, 54.8s TimeCoverageRelationStatistics Valid=112, Invalid=416, Unknown=24, NotChecked=0, Total=552 [2022-04-07 17:25:58,633 INFO L913 BasicCegarLoop]: 10 mSDtfsCounter, 23 mSDsluCounter, 68 mSDsCounter, 0 mSdLazyCounter, 84 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 23 SdHoareTripleChecker+Valid, 78 SdHoareTripleChecker+Invalid, 131 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 84 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 39 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 17:25:58,634 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [23 Valid, 78 Invalid, 131 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 84 Invalid, 0 Unknown, 39 Unchecked, 0.1s Time] [2022-04-07 17:25:58,634 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26 states. [2022-04-07 17:25:58,635 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26 to 24. [2022-04-07 17:25:58,635 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:25:58,635 INFO L82 GeneralOperation]: Start isEquivalent. First operand 26 states. Second operand has 24 states, 19 states have (on average 1.4210526315789473) internal successors, (27), 19 states have internal predecessors, (27), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:25:58,635 INFO L74 IsIncluded]: Start isIncluded. First operand 26 states. Second operand has 24 states, 19 states have (on average 1.4210526315789473) internal successors, (27), 19 states have internal predecessors, (27), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:25:58,636 INFO L87 Difference]: Start difference. First operand 26 states. Second operand has 24 states, 19 states have (on average 1.4210526315789473) internal successors, (27), 19 states have internal predecessors, (27), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:25:58,636 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:25:58,636 INFO L93 Difference]: Finished difference Result 26 states and 35 transitions. [2022-04-07 17:25:58,636 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 35 transitions. [2022-04-07 17:25:58,637 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:25:58,637 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:25:58,637 INFO L74 IsIncluded]: Start isIncluded. First operand has 24 states, 19 states have (on average 1.4210526315789473) internal successors, (27), 19 states have internal predecessors, (27), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 26 states. [2022-04-07 17:25:58,637 INFO L87 Difference]: Start difference. First operand has 24 states, 19 states have (on average 1.4210526315789473) internal successors, (27), 19 states have internal predecessors, (27), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 26 states. [2022-04-07 17:25:58,638 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:25:58,638 INFO L93 Difference]: Finished difference Result 26 states and 35 transitions. [2022-04-07 17:25:58,638 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 35 transitions. [2022-04-07 17:25:58,638 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:25:58,638 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:25:58,638 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:25:58,638 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:25:58,638 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 19 states have (on average 1.4210526315789473) internal successors, (27), 19 states have internal predecessors, (27), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:25:58,639 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 31 transitions. [2022-04-07 17:25:58,639 INFO L78 Accepts]: Start accepts. Automaton has 24 states and 31 transitions. Word has length 16 [2022-04-07 17:25:58,639 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:25:58,639 INFO L478 AbstractCegarLoop]: Abstraction has 24 states and 31 transitions. [2022-04-07 17:25:58,639 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 18 states, 18 states have (on average 1.3333333333333333) internal successors, (24), 15 states have internal predecessors, (24), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:25:58,639 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 31 transitions. [2022-04-07 17:25:58,639 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-04-07 17:25:58,639 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:25:58,640 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:25:58,655 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Ended with exit code 0 [2022-04-07 17:25:58,847 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5,5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:25:58,847 INFO L403 AbstractCegarLoop]: === Iteration 7 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:25:58,848 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:25:58,848 INFO L85 PathProgramCache]: Analyzing trace with hash 374350110, now seen corresponding path program 1 times [2022-04-07 17:25:58,848 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:25:58,848 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1169055754] [2022-04-07 17:25:58,848 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:25:58,848 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:25:58,857 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.0))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-07 17:25:58,858 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.1))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-07 17:25:58,883 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:25:58,907 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.3))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-07 17:25:58,914 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.4))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-07 17:25:59,028 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:25:59,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:25:59,032 INFO L290 TraceCheckUtils]: 0: Hoare triple {1082#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1070#true} is VALID [2022-04-07 17:25:59,033 INFO L290 TraceCheckUtils]: 1: Hoare triple {1070#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1070#true} is VALID [2022-04-07 17:25:59,033 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1070#true} {1070#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1070#true} is VALID [2022-04-07 17:25:59,033 INFO L272 TraceCheckUtils]: 0: Hoare triple {1070#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1082#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:25:59,033 INFO L290 TraceCheckUtils]: 1: Hoare triple {1082#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1070#true} is VALID [2022-04-07 17:25:59,033 INFO L290 TraceCheckUtils]: 2: Hoare triple {1070#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1070#true} is VALID [2022-04-07 17:25:59,033 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1070#true} {1070#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1070#true} is VALID [2022-04-07 17:25:59,033 INFO L272 TraceCheckUtils]: 4: Hoare triple {1070#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1070#true} is VALID [2022-04-07 17:25:59,034 INFO L290 TraceCheckUtils]: 5: Hoare triple {1070#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1075#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 17:25:59,034 INFO L290 TraceCheckUtils]: 6: Hoare triple {1075#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1076#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 17:25:59,035 INFO L290 TraceCheckUtils]: 7: Hoare triple {1076#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {1077#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 17:25:59,036 INFO L290 TraceCheckUtils]: 8: Hoare triple {1077#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [76] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_8 4294967296))) (or (and (<= .cse0 0) (= v_main_~z~0_8 v_main_~z~0_7) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (= v_main_~x~0_5 v_main_~x~0_6) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)) (and (= v_main_~z~0_7 (+ v_main_~x~0_6 v_main_~z~0_8 (* (- 1) v_main_~x~0_5))) (< 0 .cse0) (forall ((v_it_2 Int)) (or (< 0 (mod (+ v_main_~z~0_8 (* v_it_2 4294967295)) 4294967296)) (not (<= 1 v_it_2)) (not (<= (+ v_main_~x~0_6 v_it_2 1) v_main_~x~0_5)))) (< v_main_~x~0_6 v_main_~x~0_5)))) InVars {main_~x~0=v_main_~x~0_6, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_8, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1078#(and (= main_~z~0 0) (<= (* (div (+ main_~n~0 4294967295) 4294967296) 4294967296) main_~n~0) (= main_~y~0 0))} is VALID [2022-04-07 17:25:59,036 INFO L290 TraceCheckUtils]: 9: Hoare triple {1078#(and (= main_~z~0 0) (<= (* (div (+ main_~n~0 4294967295) 4294967296) 4294967296) main_~n~0) (= main_~y~0 0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1078#(and (= main_~z~0 0) (<= (* (div (+ main_~n~0 4294967295) 4294967296) 4294967296) main_~n~0) (= main_~y~0 0))} is VALID [2022-04-07 17:25:59,038 INFO L290 TraceCheckUtils]: 10: Hoare triple {1078#(and (= main_~z~0 0) (<= (* (div (+ main_~n~0 4294967295) 4294967296) 4294967296) main_~n~0) (= main_~y~0 0))} [79] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (= (+ (* (- 1) v_main_~y~0_3) v_main_~y~0_4 v_main_~z~0_3) v_main_~z~0_2) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1079#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))) (<= 0 main_~z~0))} is VALID [2022-04-07 17:25:59,038 INFO L290 TraceCheckUtils]: 11: Hoare triple {1079#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))) (<= 0 main_~z~0))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1079#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))) (<= 0 main_~z~0))} is VALID [2022-04-07 17:25:59,039 INFO L272 TraceCheckUtils]: 12: Hoare triple {1079#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))) (<= 0 main_~z~0))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {1080#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:25:59,040 INFO L290 TraceCheckUtils]: 13: Hoare triple {1080#(not (= |__VERIFIER_assert_#in~cond| 0))} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1081#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:25:59,040 INFO L290 TraceCheckUtils]: 14: Hoare triple {1081#(not (= __VERIFIER_assert_~cond 0))} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1071#false} is VALID [2022-04-07 17:25:59,040 INFO L290 TraceCheckUtils]: 15: Hoare triple {1071#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1071#false} is VALID [2022-04-07 17:25:59,040 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:25:59,040 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:25:59,040 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1169055754] [2022-04-07 17:25:59,041 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1169055754] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:25:59,041 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [961979124] [2022-04-07 17:25:59,041 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:25:59,041 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:25:59,041 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:25:59,042 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:25:59,042 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process