/usr/bin/java -ea -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --core.log.level.for.class de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN -tc ../../../trunk/examples/toolchains/AutomizerCTransformed.xml -s ../../../trunk/examples/settings/automizer/LoopAccelerationJordanC.epf -i ../../../trunk/examples/svcomp/loops-crafted-1/in-de42.c -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-34549b5 [2022-04-07 17:26:19,809 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-04-07 17:26:19,810 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-04-07 17:26:19,861 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... 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[2022-04-07 17:26:19,908 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-04-07 17:26:19,908 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-04-07 17:26:19,910 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-04-07 17:26:19,911 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/automizer/LoopAccelerationJordanC.epf [2022-04-07 17:26:19,921 INFO L113 SettingsManager]: Loading preferences was successful [2022-04-07 17:26:19,921 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-04-07 17:26:19,922 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-04-07 17:26:19,922 INFO L138 SettingsManager]: * sizeof long=4 [2022-04-07 17:26:19,922 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-04-07 17:26:19,923 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-04-07 17:26:19,923 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-04-07 17:26:19,923 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-04-07 17:26:19,923 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-04-07 17:26:19,924 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-04-07 17:26:19,924 INFO L138 SettingsManager]: * sizeof long double=12 [2022-04-07 17:26:19,924 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-04-07 17:26:19,924 INFO L138 SettingsManager]: * Use constant arrays=true [2022-04-07 17:26:19,924 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-04-07 17:26:19,924 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-04-07 17:26:19,924 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-04-07 17:26:19,924 INFO L138 SettingsManager]: * To the following directory=./dump/ [2022-04-07 17:26:19,924 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-04-07 17:26:19,924 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-07 17:26:19,925 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-04-07 17:26:19,925 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-04-07 17:26:19,927 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-04-07 17:26:19,927 INFO L138 SettingsManager]: * TransformationType=LOOP_ACCELERATION_JORDAN WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.core: Log level for class -> de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN; [2022-04-07 17:26:20,119 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-04-07 17:26:20,135 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-04-07 17:26:20,137 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-04-07 17:26:20,138 INFO L271 PluginConnector]: Initializing CDTParser... [2022-04-07 17:26:20,138 INFO L275 PluginConnector]: CDTParser initialized [2022-04-07 17:26:20,139 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loops-crafted-1/in-de42.c [2022-04-07 17:26:20,177 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/485bf5e70/ed70691aced143e6bda687d5e60a65ab/FLAGdfd1bc8db [2022-04-07 17:26:20,530 INFO L306 CDTParser]: Found 1 translation units. [2022-04-07 17:26:20,530 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de42.c [2022-04-07 17:26:20,534 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/485bf5e70/ed70691aced143e6bda687d5e60a65ab/FLAGdfd1bc8db [2022-04-07 17:26:20,543 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/485bf5e70/ed70691aced143e6bda687d5e60a65ab [2022-04-07 17:26:20,544 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-04-07 17:26:20,545 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2022-04-07 17:26:20,546 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-04-07 17:26:20,547 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-04-07 17:26:20,549 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-04-07 17:26:20,550 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.04 05:26:20" (1/1) ... [2022-04-07 17:26:20,550 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@16c9545 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:26:20, skipping insertion in model container [2022-04-07 17:26:20,551 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.04 05:26:20" (1/1) ... [2022-04-07 17:26:20,555 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-04-07 17:26:20,563 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-04-07 17:26:20,684 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de42.c[368,381] [2022-04-07 17:26:20,706 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-07 17:26:20,713 INFO L203 MainTranslator]: Completed pre-run [2022-04-07 17:26:20,722 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de42.c[368,381] [2022-04-07 17:26:20,733 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-07 17:26:20,743 INFO L208 MainTranslator]: Completed translation [2022-04-07 17:26:20,744 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:26:20 WrapperNode [2022-04-07 17:26:20,744 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-04-07 17:26:20,745 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-04-07 17:26:20,745 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-04-07 17:26:20,745 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-04-07 17:26:20,752 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:26:20" (1/1) ... [2022-04-07 17:26:20,752 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:26:20" (1/1) ... [2022-04-07 17:26:20,757 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:26:20" (1/1) ... [2022-04-07 17:26:20,758 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:26:20" (1/1) ... [2022-04-07 17:26:20,770 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:26:20" (1/1) ... [2022-04-07 17:26:20,776 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:26:20" (1/1) ... [2022-04-07 17:26:20,780 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:26:20" (1/1) ... [2022-04-07 17:26:20,784 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-04-07 17:26:20,785 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-04-07 17:26:20,785 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-04-07 17:26:20,785 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-04-07 17:26:20,786 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:26:20" (1/1) ... [2022-04-07 17:26:20,791 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-07 17:26:20,797 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:26:20,832 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-04-07 17:26:20,896 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-04-07 17:26:20,909 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2022-04-07 17:26:20,909 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-04-07 17:26:20,909 INFO L138 BoogieDeclarations]: Found implementation of procedure reach_error [2022-04-07 17:26:20,909 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2022-04-07 17:26:20,910 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2022-04-07 17:26:20,910 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2022-04-07 17:26:20,910 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_fail [2022-04-07 17:26:20,910 INFO L130 BoogieDeclarations]: Found specification of procedure reach_error [2022-04-07 17:26:20,910 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-04-07 17:26:20,910 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_uint [2022-04-07 17:26:20,910 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2022-04-07 17:26:20,910 INFO L130 BoogieDeclarations]: Found specification of procedure main [2022-04-07 17:26:20,911 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2022-04-07 17:26:20,911 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-04-07 17:26:20,911 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-04-07 17:26:20,912 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-04-07 17:26:20,912 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-04-07 17:26:20,912 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-04-07 17:26:20,954 INFO L234 CfgBuilder]: Building ICFG [2022-04-07 17:26:20,955 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-04-07 17:26:21,105 INFO L275 CfgBuilder]: Performing block encoding [2022-04-07 17:26:21,110 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-04-07 17:26:21,110 INFO L299 CfgBuilder]: Removed 4 assume(true) statements. [2022-04-07 17:26:21,111 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.04 05:26:21 BoogieIcfgContainer [2022-04-07 17:26:21,111 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-04-07 17:26:21,112 INFO L113 PluginConnector]: ------------------------IcfgTransformer---------------------------- [2022-04-07 17:26:21,112 INFO L271 PluginConnector]: Initializing IcfgTransformer... [2022-04-07 17:26:21,113 INFO L275 PluginConnector]: IcfgTransformer initialized [2022-04-07 17:26:21,115 INFO L185 PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.04 05:26:21" (1/1) ... [2022-04-07 17:26:21,116 INFO L168 ansformationObserver]: Applying ICFG transformation LOOP_ACCELERATION_JORDAN [2022-04-07 17:26:21,585 INFO L89 elerationTransformer]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-07 17:26:21,585 INFO L91 elerationTransformer]: Accelerated Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] to Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0) (= v_main_~y~0_6 v_main_~y~0_5)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_6 v_it_1 1) v_main_~y~0_5)))) (< v_main_~y~0_6 v_main_~y~0_5) (< 0 .cse0) (= v_main_~x~0_3 (+ v_main_~x~0_4 v_main_~y~0_6 (* (- 1) v_main_~y~0_5)))))) InVars {main_~y~0=v_main_~y~0_6, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] [2022-04-07 17:26:21,867 INFO L89 elerationTransformer]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-07 17:26:21,867 INFO L91 elerationTransformer]: Accelerated Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_~z~0=v_main_~z~0_9, main_#t~post8=|v_main_#t~post8_1|, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] to Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~x~0_9 v_main_~x~0_8) (<= .cse0 0) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)) (and (= v_main_~z~0_9 (+ (* (- 1) v_main_~x~0_8) v_main_~z~0_10 v_main_~x~0_9)) (< v_main_~x~0_9 v_main_~x~0_8) (< 0 .cse0) (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (not (<= (+ v_main_~x~0_9 v_it_2 1) v_main_~x~0_8)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_2 4294967295)) 4294967296))))))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_10, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] [2022-04-07 17:26:24,171 INFO L89 elerationTransformer]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-07 17:26:24,171 INFO L91 elerationTransformer]: Accelerated Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~z~0=v_main_~z~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post10=|v_main_#t~post10_1|, main_~z~0=v_main_~z~0_2, main_~y~0=v_main_~y~0_3, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] to Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (= (+ (* (- 1) v_main_~y~0_3) v_main_~y~0_4 v_main_~z~0_3) v_main_~z~0_2) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] [2022-04-07 17:26:24,423 INFO L89 elerationTransformer]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-07 17:26:24,423 INFO L91 elerationTransformer]: Accelerated Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_4, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] to Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~z~0_5 v_main_~z~0_4) (= v_main_~x~0_7 v_main_~x~0_6)) (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (< v_main_~x~0_6 v_main_~x~0_7) (= v_main_~z~0_4 (+ (* (- 1) v_main_~x~0_6) v_main_~x~0_7 v_main_~z~0_5))))) InVars {main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] [2022-04-07 17:26:24,426 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 07.04 05:26:24 BasicIcfg [2022-04-07 17:26:24,427 INFO L132 PluginConnector]: ------------------------ END IcfgTransformer---------------------------- [2022-04-07 17:26:24,428 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-04-07 17:26:24,428 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-04-07 17:26:24,430 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-04-07 17:26:24,430 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.04 05:26:20" (1/4) ... [2022-04-07 17:26:24,430 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3cc403c4 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.04 05:26:24, skipping insertion in model container [2022-04-07 17:26:24,431 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:26:20" (2/4) ... [2022-04-07 17:26:24,431 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3cc403c4 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.04 05:26:24, skipping insertion in model container [2022-04-07 17:26:24,431 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.04 05:26:21" (3/4) ... [2022-04-07 17:26:24,431 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3cc403c4 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.04 05:26:24, skipping insertion in model container [2022-04-07 17:26:24,431 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 07.04 05:26:24" (4/4) ... [2022-04-07 17:26:24,432 INFO L111 eAbstractionObserver]: Analyzing ICFG in-de42.cJordan [2022-04-07 17:26:24,436 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:ForwardPredicates Determinization: PREDICATE_ABSTRACTION [2022-04-07 17:26:24,436 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-04-07 17:26:24,483 INFO L339 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-04-07 17:26:24,487 INFO L340 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=ForwardPredicates, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=false, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=All, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP [2022-04-07 17:26:24,488 INFO L341 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-04-07 17:26:24,500 INFO L276 IsEmpty]: Start isEmpty. Operand has 23 states, 15 states have (on average 1.6666666666666667) internal successors, (25), 16 states have internal predecessors, (25), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 17:26:24,504 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2022-04-07 17:26:24,504 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:26:24,505 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:26:24,505 INFO L403 AbstractCegarLoop]: === Iteration 1 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:26:24,508 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:26:24,509 INFO L85 PathProgramCache]: Analyzing trace with hash -2015447748, now seen corresponding path program 1 times [2022-04-07 17:26:24,523 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:26:24,524 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [571034360] [2022-04-07 17:26:24,524 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:26:24,524 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:26:24,581 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:26:24,604 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:26:24,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:26:24,615 INFO L290 TraceCheckUtils]: 0: Hoare triple {31#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {26#true} is VALID [2022-04-07 17:26:24,616 INFO L290 TraceCheckUtils]: 1: Hoare triple {26#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26#true} is VALID [2022-04-07 17:26:24,616 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {26#true} {26#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26#true} is VALID [2022-04-07 17:26:24,617 INFO L272 TraceCheckUtils]: 0: Hoare triple {26#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:26:24,618 INFO L290 TraceCheckUtils]: 1: Hoare triple {31#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {26#true} is VALID [2022-04-07 17:26:24,618 INFO L290 TraceCheckUtils]: 2: Hoare triple {26#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26#true} is VALID [2022-04-07 17:26:24,618 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {26#true} {26#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26#true} is VALID [2022-04-07 17:26:24,618 INFO L272 TraceCheckUtils]: 4: Hoare triple {26#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26#true} is VALID [2022-04-07 17:26:24,619 INFO L290 TraceCheckUtils]: 5: Hoare triple {26#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {26#true} is VALID [2022-04-07 17:26:24,619 INFO L290 TraceCheckUtils]: 6: Hoare triple {26#true} [81] L16-2-->L16-3: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {27#false} is VALID [2022-04-07 17:26:24,619 INFO L290 TraceCheckUtils]: 7: Hoare triple {27#false} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {27#false} is VALID [2022-04-07 17:26:24,619 INFO L290 TraceCheckUtils]: 8: Hoare triple {27#false} [85] L23-2-->L29-1: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {27#false} is VALID [2022-04-07 17:26:24,620 INFO L290 TraceCheckUtils]: 9: Hoare triple {27#false} [88] L29-1-->L35-1: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {27#false} is VALID [2022-04-07 17:26:24,620 INFO L290 TraceCheckUtils]: 10: Hoare triple {27#false} [91] L35-1-->L35-2: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {27#false} is VALID [2022-04-07 17:26:24,620 INFO L272 TraceCheckUtils]: 11: Hoare triple {27#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {27#false} is VALID [2022-04-07 17:26:24,620 INFO L290 TraceCheckUtils]: 12: Hoare triple {27#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {27#false} is VALID [2022-04-07 17:26:24,620 INFO L290 TraceCheckUtils]: 13: Hoare triple {27#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {27#false} is VALID [2022-04-07 17:26:24,621 INFO L290 TraceCheckUtils]: 14: Hoare triple {27#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {27#false} is VALID [2022-04-07 17:26:24,621 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:26:24,621 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:26:24,621 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [571034360] [2022-04-07 17:26:24,622 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [571034360] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 17:26:24,622 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 17:26:24,622 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-07 17:26:24,623 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [715285046] [2022-04-07 17:26:24,624 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 17:26:24,627 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-07 17:26:24,628 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:26:24,631 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:26:24,643 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 15 edges. 15 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:26:24,643 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-07 17:26:24,643 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:26:24,656 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-07 17:26:24,657 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-07 17:26:24,658 INFO L87 Difference]: Start difference. First operand has 23 states, 15 states have (on average 1.6666666666666667) internal successors, (25), 16 states have internal predecessors, (25), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:26:24,702 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:26:24,703 INFO L93 Difference]: Finished difference Result 23 states and 26 transitions. [2022-04-07 17:26:24,703 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-07 17:26:24,703 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-07 17:26:24,703 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:26:24,704 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:26:24,709 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 31 transitions. [2022-04-07 17:26:24,710 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:26:24,711 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 31 transitions. [2022-04-07 17:26:24,712 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 31 transitions. [2022-04-07 17:26:24,737 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 31 edges. 31 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:26:24,742 INFO L225 Difference]: With dead ends: 23 [2022-04-07 17:26:24,742 INFO L226 Difference]: Without dead ends: 16 [2022-04-07 17:26:24,744 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-07 17:26:24,746 INFO L913 BasicCegarLoop]: 25 mSDtfsCounter, 17 mSDsluCounter, 3 mSDsCounter, 0 mSdLazyCounter, 3 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 18 SdHoareTripleChecker+Valid, 28 SdHoareTripleChecker+Invalid, 5 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 3 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 17:26:24,747 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [18 Valid, 28 Invalid, 5 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 3 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 17:26:24,757 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16 states. [2022-04-07 17:26:24,763 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16 to 16. [2022-04-07 17:26:24,764 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:26:24,764 INFO L82 GeneralOperation]: Start isEquivalent. First operand 16 states. Second operand has 16 states, 11 states have (on average 1.3636363636363635) internal successors, (15), 11 states have internal predecessors, (15), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:26:24,765 INFO L74 IsIncluded]: Start isIncluded. First operand 16 states. Second operand has 16 states, 11 states have (on average 1.3636363636363635) internal successors, (15), 11 states have internal predecessors, (15), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:26:24,765 INFO L87 Difference]: Start difference. First operand 16 states. Second operand has 16 states, 11 states have (on average 1.3636363636363635) internal successors, (15), 11 states have internal predecessors, (15), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:26:24,766 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:26:24,767 INFO L93 Difference]: Finished difference Result 16 states and 19 transitions. [2022-04-07 17:26:24,767 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states and 19 transitions. [2022-04-07 17:26:24,767 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:26:24,767 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:26:24,767 INFO L74 IsIncluded]: Start isIncluded. First operand has 16 states, 11 states have (on average 1.3636363636363635) internal successors, (15), 11 states have internal predecessors, (15), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 16 states. [2022-04-07 17:26:24,768 INFO L87 Difference]: Start difference. First operand has 16 states, 11 states have (on average 1.3636363636363635) internal successors, (15), 11 states have internal predecessors, (15), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 16 states. [2022-04-07 17:26:24,769 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:26:24,769 INFO L93 Difference]: Finished difference Result 16 states and 19 transitions. [2022-04-07 17:26:24,769 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states and 19 transitions. [2022-04-07 17:26:24,770 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:26:24,770 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:26:24,770 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:26:24,770 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:26:24,770 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 11 states have (on average 1.3636363636363635) internal successors, (15), 11 states have internal predecessors, (15), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:26:24,771 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 19 transitions. [2022-04-07 17:26:24,772 INFO L78 Accepts]: Start accepts. Automaton has 16 states and 19 transitions. Word has length 15 [2022-04-07 17:26:24,772 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:26:24,772 INFO L478 AbstractCegarLoop]: Abstraction has 16 states and 19 transitions. [2022-04-07 17:26:24,773 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:26:24,773 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states and 19 transitions. [2022-04-07 17:26:24,773 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2022-04-07 17:26:24,773 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:26:24,773 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:26:24,773 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-04-07 17:26:24,774 INFO L403 AbstractCegarLoop]: === Iteration 2 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:26:24,774 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:26:24,774 INFO L85 PathProgramCache]: Analyzing trace with hash 1389121438, now seen corresponding path program 1 times [2022-04-07 17:26:24,774 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:26:24,774 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1046050604] [2022-04-07 17:26:24,775 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:26:24,775 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:26:24,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:26:25,079 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:26:25,081 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:26:25,085 INFO L290 TraceCheckUtils]: 0: Hoare triple {117#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {105#true} is VALID [2022-04-07 17:26:25,086 INFO L290 TraceCheckUtils]: 1: Hoare triple {105#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {105#true} is VALID [2022-04-07 17:26:25,086 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {105#true} {105#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {105#true} is VALID [2022-04-07 17:26:25,087 INFO L272 TraceCheckUtils]: 0: Hoare triple {105#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {117#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:26:25,087 INFO L290 TraceCheckUtils]: 1: Hoare triple {117#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {105#true} is VALID [2022-04-07 17:26:25,087 INFO L290 TraceCheckUtils]: 2: Hoare triple {105#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {105#true} is VALID [2022-04-07 17:26:25,087 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {105#true} {105#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {105#true} is VALID [2022-04-07 17:26:25,087 INFO L272 TraceCheckUtils]: 4: Hoare triple {105#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {105#true} is VALID [2022-04-07 17:26:25,088 INFO L290 TraceCheckUtils]: 5: Hoare triple {105#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {110#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-07 17:26:25,089 INFO L290 TraceCheckUtils]: 6: Hoare triple {110#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {111#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 17:26:25,090 INFO L290 TraceCheckUtils]: 7: Hoare triple {111#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {112#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)))} is VALID [2022-04-07 17:26:25,091 INFO L290 TraceCheckUtils]: 8: Hoare triple {112#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {113#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:26:25,091 INFO L290 TraceCheckUtils]: 9: Hoare triple {113#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {113#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:26:25,092 INFO L290 TraceCheckUtils]: 10: Hoare triple {113#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {114#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:26:25,094 INFO L272 TraceCheckUtils]: 11: Hoare triple {114#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {115#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:26:25,094 INFO L290 TraceCheckUtils]: 12: Hoare triple {115#(not (= |__VERIFIER_assert_#in~cond| 0))} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {116#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:26:25,095 INFO L290 TraceCheckUtils]: 13: Hoare triple {116#(not (= __VERIFIER_assert_~cond 0))} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {106#false} is VALID [2022-04-07 17:26:25,095 INFO L290 TraceCheckUtils]: 14: Hoare triple {106#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {106#false} is VALID [2022-04-07 17:26:25,095 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:26:25,095 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:26:25,096 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1046050604] [2022-04-07 17:26:25,096 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1046050604] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 17:26:25,096 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 17:26:25,096 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2022-04-07 17:26:25,096 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1772811121] [2022-04-07 17:26:25,096 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 17:26:25,097 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 8 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-07 17:26:25,097 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:26:25,097 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 10 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 8 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:26:25,112 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 15 edges. 15 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:26:25,112 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2022-04-07 17:26:25,112 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:26:25,112 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2022-04-07 17:26:25,113 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2022-04-07 17:26:25,113 INFO L87 Difference]: Start difference. First operand 16 states and 19 transitions. Second operand has 10 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 8 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:26:25,411 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:26:25,411 INFO L93 Difference]: Finished difference Result 27 states and 36 transitions. [2022-04-07 17:26:25,411 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-04-07 17:26:25,411 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 8 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-07 17:26:25,412 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:26:25,412 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 8 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:26:25,413 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 37 transitions. [2022-04-07 17:26:25,413 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 8 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:26:25,414 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 37 transitions. [2022-04-07 17:26:25,415 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 8 states and 37 transitions. [2022-04-07 17:26:25,451 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 37 edges. 37 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:26:25,452 INFO L225 Difference]: With dead ends: 27 [2022-04-07 17:26:25,452 INFO L226 Difference]: Without dead ends: 24 [2022-04-07 17:26:25,452 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 33 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=54, Invalid=156, Unknown=0, NotChecked=0, Total=210 [2022-04-07 17:26:25,453 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 18 mSDsluCounter, 45 mSDsCounter, 0 mSdLazyCounter, 80 mSolverCounterSat, 9 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 18 SdHoareTripleChecker+Valid, 57 SdHoareTripleChecker+Invalid, 93 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 9 IncrementalHoareTripleChecker+Valid, 80 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 4 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 17:26:25,453 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [18 Valid, 57 Invalid, 93 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [9 Valid, 80 Invalid, 0 Unknown, 4 Unchecked, 0.1s Time] [2022-04-07 17:26:25,454 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24 states. [2022-04-07 17:26:25,455 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24 to 21. [2022-04-07 17:26:25,455 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:26:25,456 INFO L82 GeneralOperation]: Start isEquivalent. First operand 24 states. Second operand has 21 states, 16 states have (on average 1.4375) internal successors, (23), 16 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:26:25,456 INFO L74 IsIncluded]: Start isIncluded. First operand 24 states. Second operand has 21 states, 16 states have (on average 1.4375) internal successors, (23), 16 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:26:25,456 INFO L87 Difference]: Start difference. First operand 24 states. Second operand has 21 states, 16 states have (on average 1.4375) internal successors, (23), 16 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:26:25,457 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:26:25,457 INFO L93 Difference]: Finished difference Result 24 states and 33 transitions. [2022-04-07 17:26:25,457 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 33 transitions. [2022-04-07 17:26:25,458 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:26:25,458 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:26:25,458 INFO L74 IsIncluded]: Start isIncluded. First operand has 21 states, 16 states have (on average 1.4375) internal successors, (23), 16 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 24 states. [2022-04-07 17:26:25,458 INFO L87 Difference]: Start difference. First operand has 21 states, 16 states have (on average 1.4375) internal successors, (23), 16 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 24 states. [2022-04-07 17:26:25,459 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:26:25,459 INFO L93 Difference]: Finished difference Result 24 states and 33 transitions. [2022-04-07 17:26:25,459 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 33 transitions. [2022-04-07 17:26:25,460 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:26:25,460 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:26:25,460 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:26:25,460 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:26:25,460 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 16 states have (on average 1.4375) internal successors, (23), 16 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:26:25,461 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 27 transitions. [2022-04-07 17:26:25,461 INFO L78 Accepts]: Start accepts. Automaton has 21 states and 27 transitions. Word has length 15 [2022-04-07 17:26:25,461 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:26:25,461 INFO L478 AbstractCegarLoop]: Abstraction has 21 states and 27 transitions. [2022-04-07 17:26:25,461 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 8 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:26:25,461 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 27 transitions. [2022-04-07 17:26:25,462 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-04-07 17:26:25,462 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:26:25,462 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:26:25,462 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-04-07 17:26:25,462 INFO L403 AbstractCegarLoop]: === Iteration 3 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:26:25,462 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:26:25,463 INFO L85 PathProgramCache]: Analyzing trace with hash 139812261, now seen corresponding path program 1 times [2022-04-07 17:26:25,463 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:26:25,463 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [439956251] [2022-04-07 17:26:25,463 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:26:25,463 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:26:25,475 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.0))) (+ .cse0 main_~x~0_5 (* (- 4294967296) (div (+ .cse0 main_~x~0_5) 4294967296)))) 0)) [2022-04-07 17:26:25,482 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:26:25,496 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.1))) (+ .cse0 main_~x~0_5 (* (- 4294967296) (div (+ .cse0 main_~x~0_5) 4294967296)))) 0)) [2022-04-07 17:26:25,594 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:26:25,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:26:25,600 INFO L290 TraceCheckUtils]: 0: Hoare triple {237#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {226#true} is VALID [2022-04-07 17:26:25,601 INFO L290 TraceCheckUtils]: 1: Hoare triple {226#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {226#true} is VALID [2022-04-07 17:26:25,601 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {226#true} {226#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {226#true} is VALID [2022-04-07 17:26:25,601 INFO L272 TraceCheckUtils]: 0: Hoare triple {226#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {237#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:26:25,602 INFO L290 TraceCheckUtils]: 1: Hoare triple {237#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {226#true} is VALID [2022-04-07 17:26:25,602 INFO L290 TraceCheckUtils]: 2: Hoare triple {226#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {226#true} is VALID [2022-04-07 17:26:25,602 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {226#true} {226#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {226#true} is VALID [2022-04-07 17:26:25,602 INFO L272 TraceCheckUtils]: 4: Hoare triple {226#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {226#true} is VALID [2022-04-07 17:26:25,603 INFO L290 TraceCheckUtils]: 5: Hoare triple {226#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {231#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 17:26:25,603 INFO L290 TraceCheckUtils]: 6: Hoare triple {231#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {232#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:26:25,604 INFO L290 TraceCheckUtils]: 7: Hoare triple {232#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {233#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 17:26:25,604 INFO L290 TraceCheckUtils]: 8: Hoare triple {233#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {233#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 17:26:25,605 INFO L290 TraceCheckUtils]: 9: Hoare triple {233#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {233#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 17:26:25,608 INFO L290 TraceCheckUtils]: 10: Hoare triple {233#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [93] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~z~0_5 v_main_~z~0_4) (= v_main_~x~0_7 v_main_~x~0_6)) (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (< v_main_~x~0_6 v_main_~x~0_7) (= v_main_~z~0_4 (+ (* (- 1) v_main_~x~0_6) v_main_~x~0_7 v_main_~z~0_5))))) InVars {main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {234#(and (= main_~z~0 0) (<= (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0)))} is VALID [2022-04-07 17:26:25,609 INFO L290 TraceCheckUtils]: 11: Hoare triple {234#(and (= main_~z~0 0) (<= (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0)))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {234#(and (= main_~z~0 0) (<= (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0)))} is VALID [2022-04-07 17:26:25,610 INFO L272 TraceCheckUtils]: 12: Hoare triple {234#(and (= main_~z~0 0) (<= (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0)))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {235#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:26:25,611 INFO L290 TraceCheckUtils]: 13: Hoare triple {235#(not (= |__VERIFIER_assert_#in~cond| 0))} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {236#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:26:25,611 INFO L290 TraceCheckUtils]: 14: Hoare triple {236#(not (= __VERIFIER_assert_~cond 0))} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {227#false} is VALID [2022-04-07 17:26:25,611 INFO L290 TraceCheckUtils]: 15: Hoare triple {227#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {227#false} is VALID [2022-04-07 17:26:25,612 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:26:25,612 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:26:25,612 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [439956251] [2022-04-07 17:26:25,612 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [439956251] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:26:25,612 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [91432550] [2022-04-07 17:26:25,612 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:26:25,612 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:26:25,613 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:26:25,614 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:26:25,658 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-04-07 17:26:25,663 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:26:25,665 INFO L263 TraceCheckSpWp]: Trace formula consists of 61 conjuncts, 9 conjunts are in the unsatisfiable core [2022-04-07 17:26:25,714 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:26:25,717 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:26:26,352 INFO L272 TraceCheckUtils]: 0: Hoare triple {226#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {226#true} is VALID [2022-04-07 17:26:26,352 INFO L290 TraceCheckUtils]: 1: Hoare triple {226#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {226#true} is VALID [2022-04-07 17:26:26,352 INFO L290 TraceCheckUtils]: 2: Hoare triple {226#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {226#true} is VALID [2022-04-07 17:26:26,353 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {226#true} {226#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {226#true} is VALID [2022-04-07 17:26:26,353 INFO L272 TraceCheckUtils]: 4: Hoare triple {226#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {226#true} is VALID [2022-04-07 17:26:26,353 INFO L290 TraceCheckUtils]: 5: Hoare triple {226#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {256#(= main_~n~0 main_~x~0)} is VALID [2022-04-07 17:26:26,354 INFO L290 TraceCheckUtils]: 6: Hoare triple {256#(= main_~n~0 main_~x~0)} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {260#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-07 17:26:26,354 INFO L290 TraceCheckUtils]: 7: Hoare triple {260#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {260#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-07 17:26:26,354 INFO L290 TraceCheckUtils]: 8: Hoare triple {260#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {267#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-07 17:26:26,355 INFO L290 TraceCheckUtils]: 9: Hoare triple {267#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {267#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-07 17:26:26,356 INFO L290 TraceCheckUtils]: 10: Hoare triple {267#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} [93] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~z~0_5 v_main_~z~0_4) (= v_main_~x~0_7 v_main_~x~0_6)) (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (< v_main_~x~0_6 v_main_~x~0_7) (= v_main_~z~0_4 (+ (* (- 1) v_main_~x~0_6) v_main_~x~0_7 v_main_~z~0_5))))) InVars {main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {267#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-07 17:26:26,356 INFO L290 TraceCheckUtils]: 11: Hoare triple {267#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {277#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:26:26,358 INFO L272 TraceCheckUtils]: 12: Hoare triple {277#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {281#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:26:26,359 INFO L290 TraceCheckUtils]: 13: Hoare triple {281#(<= 1 |__VERIFIER_assert_#in~cond|)} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {285#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:26:26,359 INFO L290 TraceCheckUtils]: 14: Hoare triple {285#(<= 1 __VERIFIER_assert_~cond)} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {227#false} is VALID [2022-04-07 17:26:26,360 INFO L290 TraceCheckUtils]: 15: Hoare triple {227#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {227#false} is VALID [2022-04-07 17:26:26,360 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 17:26:26,360 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-07 17:26:26,362 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [91432550] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 17:26:26,362 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-07 17:26:26,363 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [9] total 15 [2022-04-07 17:26:26,363 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1318935787] [2022-04-07 17:26:26,363 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 17:26:26,364 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 7 states have (on average 1.7142857142857142) internal successors, (12), 7 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-07 17:26:26,364 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:26:26,364 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 8 states, 7 states have (on average 1.7142857142857142) internal successors, (12), 7 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:26:26,388 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 16 edges. 16 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:26:26,389 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-04-07 17:26:26,389 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:26:26,389 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-04-07 17:26:26,390 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=42, Invalid=168, Unknown=0, NotChecked=0, Total=210 [2022-04-07 17:26:26,390 INFO L87 Difference]: Start difference. First operand 21 states and 27 transitions. Second operand has 8 states, 7 states have (on average 1.7142857142857142) internal successors, (12), 7 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:26:26,534 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:26:26,535 INFO L93 Difference]: Finished difference Result 25 states and 31 transitions. [2022-04-07 17:26:26,535 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-04-07 17:26:26,535 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 7 states have (on average 1.7142857142857142) internal successors, (12), 7 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-07 17:26:26,535 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:26:26,535 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 7 states have (on average 1.7142857142857142) internal successors, (12), 7 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:26:26,536 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 31 transitions. [2022-04-07 17:26:26,536 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 7 states have (on average 1.7142857142857142) internal successors, (12), 7 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:26:26,537 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 31 transitions. [2022-04-07 17:26:26,537 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 7 states and 31 transitions. [2022-04-07 17:26:26,584 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 31 edges. 31 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:26:26,585 INFO L225 Difference]: With dead ends: 25 [2022-04-07 17:26:26,585 INFO L226 Difference]: Without dead ends: 20 [2022-04-07 17:26:26,585 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 11 SyntacticMatches, 1 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 43 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=48, Invalid=192, Unknown=0, NotChecked=0, Total=240 [2022-04-07 17:26:26,586 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 8 mSDsluCounter, 50 mSDsCounter, 0 mSdLazyCounter, 27 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 8 SdHoareTripleChecker+Valid, 62 SdHoareTripleChecker+Invalid, 32 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 27 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 4 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 17:26:26,586 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [8 Valid, 62 Invalid, 32 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 27 Invalid, 0 Unknown, 4 Unchecked, 0.1s Time] [2022-04-07 17:26:26,586 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20 states. [2022-04-07 17:26:26,587 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20 to 20. [2022-04-07 17:26:26,587 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:26:26,588 INFO L82 GeneralOperation]: Start isEquivalent. First operand 20 states. Second operand has 20 states, 15 states have (on average 1.4) internal successors, (21), 15 states have internal predecessors, (21), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:26:26,588 INFO L74 IsIncluded]: Start isIncluded. First operand 20 states. Second operand has 20 states, 15 states have (on average 1.4) internal successors, (21), 15 states have internal predecessors, (21), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:26:26,588 INFO L87 Difference]: Start difference. First operand 20 states. Second operand has 20 states, 15 states have (on average 1.4) internal successors, (21), 15 states have internal predecessors, (21), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:26:26,589 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:26:26,589 INFO L93 Difference]: Finished difference Result 20 states and 25 transitions. [2022-04-07 17:26:26,589 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 25 transitions. [2022-04-07 17:26:26,589 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:26:26,589 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:26:26,589 INFO L74 IsIncluded]: Start isIncluded. First operand has 20 states, 15 states have (on average 1.4) internal successors, (21), 15 states have internal predecessors, (21), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 20 states. [2022-04-07 17:26:26,589 INFO L87 Difference]: Start difference. First operand has 20 states, 15 states have (on average 1.4) internal successors, (21), 15 states have internal predecessors, (21), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 20 states. [2022-04-07 17:26:26,590 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:26:26,590 INFO L93 Difference]: Finished difference Result 20 states and 25 transitions. [2022-04-07 17:26:26,590 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 25 transitions. [2022-04-07 17:26:26,591 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:26:26,591 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:26:26,591 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:26:26,591 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:26:26,591 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 15 states have (on average 1.4) internal successors, (21), 15 states have internal predecessors, (21), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:26:26,592 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 25 transitions. [2022-04-07 17:26:26,592 INFO L78 Accepts]: Start accepts. Automaton has 20 states and 25 transitions. Word has length 16 [2022-04-07 17:26:26,592 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:26:26,592 INFO L478 AbstractCegarLoop]: Abstraction has 20 states and 25 transitions. [2022-04-07 17:26:26,592 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 7 states have (on average 1.7142857142857142) internal successors, (12), 7 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:26:26,592 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 25 transitions. [2022-04-07 17:26:26,592 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-04-07 17:26:26,592 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:26:26,593 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:26:26,639 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2022-04-07 17:26:26,793 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2,2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:26:26,794 INFO L403 AbstractCegarLoop]: === Iteration 4 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:26:26,794 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:26:26,794 INFO L85 PathProgramCache]: Analyzing trace with hash 912799338, now seen corresponding path program 1 times [2022-04-07 17:26:26,794 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:26:26,794 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2048221511] [2022-04-07 17:26:26,794 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:26:26,795 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:26:26,803 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.0))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-07 17:26:26,813 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:26:26,824 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.1))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-07 17:26:26,981 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:26:26,982 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:26:26,986 INFO L290 TraceCheckUtils]: 0: Hoare triple {390#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {378#true} is VALID [2022-04-07 17:26:26,987 INFO L290 TraceCheckUtils]: 1: Hoare triple {378#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {378#true} is VALID [2022-04-07 17:26:26,987 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {378#true} {378#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {378#true} is VALID [2022-04-07 17:26:26,987 INFO L272 TraceCheckUtils]: 0: Hoare triple {378#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {390#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:26:26,987 INFO L290 TraceCheckUtils]: 1: Hoare triple {390#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {378#true} is VALID [2022-04-07 17:26:26,988 INFO L290 TraceCheckUtils]: 2: Hoare triple {378#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {378#true} is VALID [2022-04-07 17:26:26,988 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {378#true} {378#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {378#true} is VALID [2022-04-07 17:26:26,988 INFO L272 TraceCheckUtils]: 4: Hoare triple {378#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {378#true} is VALID [2022-04-07 17:26:26,988 INFO L290 TraceCheckUtils]: 5: Hoare triple {378#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {383#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 17:26:26,989 INFO L290 TraceCheckUtils]: 6: Hoare triple {383#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {384#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:26:26,990 INFO L290 TraceCheckUtils]: 7: Hoare triple {384#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {385#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:26:26,991 INFO L290 TraceCheckUtils]: 8: Hoare triple {385#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {385#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:26:27,008 INFO L290 TraceCheckUtils]: 9: Hoare triple {385#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [90] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (= (+ (* (- 1) v_main_~y~0_3) v_main_~y~0_4 v_main_~z~0_3) v_main_~z~0_2) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {386#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= 0 main_~z~0) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:26:27,009 INFO L290 TraceCheckUtils]: 10: Hoare triple {386#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= 0 main_~z~0) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {386#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= 0 main_~z~0) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:26:27,010 INFO L290 TraceCheckUtils]: 11: Hoare triple {386#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= 0 main_~z~0) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {387#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= 0 main_~z~0) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:26:27,011 INFO L272 TraceCheckUtils]: 12: Hoare triple {387#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= 0 main_~z~0) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {388#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:26:27,014 INFO L290 TraceCheckUtils]: 13: Hoare triple {388#(not (= |__VERIFIER_assert_#in~cond| 0))} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {389#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:26:27,014 INFO L290 TraceCheckUtils]: 14: Hoare triple {389#(not (= __VERIFIER_assert_~cond 0))} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {379#false} is VALID [2022-04-07 17:26:27,015 INFO L290 TraceCheckUtils]: 15: Hoare triple {379#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {379#false} is VALID [2022-04-07 17:26:27,015 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:26:27,015 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:26:27,015 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2048221511] [2022-04-07 17:26:27,015 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2048221511] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:26:27,015 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1668869296] [2022-04-07 17:26:27,016 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:26:27,016 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:26:27,016 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:26:27,017 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:26:27,018 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-04-07 17:26:27,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:26:27,048 INFO L263 TraceCheckSpWp]: Trace formula consists of 61 conjuncts, 12 conjunts are in the unsatisfiable core [2022-04-07 17:26:27,058 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:26:27,059 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:26:27,360 INFO L272 TraceCheckUtils]: 0: Hoare triple {378#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {378#true} is VALID [2022-04-07 17:26:27,360 INFO L290 TraceCheckUtils]: 1: Hoare triple {378#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {378#true} is VALID [2022-04-07 17:26:27,360 INFO L290 TraceCheckUtils]: 2: Hoare triple {378#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {378#true} is VALID [2022-04-07 17:26:27,360 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {378#true} {378#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {378#true} is VALID [2022-04-07 17:26:27,360 INFO L272 TraceCheckUtils]: 4: Hoare triple {378#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {378#true} is VALID [2022-04-07 17:26:27,362 INFO L290 TraceCheckUtils]: 5: Hoare triple {378#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {383#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 17:26:27,362 INFO L290 TraceCheckUtils]: 6: Hoare triple {383#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {412#(and (not (< 0 (mod main_~n~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:26:27,363 INFO L290 TraceCheckUtils]: 7: Hoare triple {412#(and (not (< 0 (mod main_~n~0 4294967296))) (= main_~y~0 0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {416#(and (= main_~z~0 main_~y~0) (not (< 0 (mod main_~n~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:26:27,363 INFO L290 TraceCheckUtils]: 8: Hoare triple {416#(and (= main_~z~0 main_~y~0) (not (< 0 (mod main_~n~0 4294967296))) (= main_~y~0 0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {416#(and (= main_~z~0 main_~y~0) (not (< 0 (mod main_~n~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:26:27,364 INFO L290 TraceCheckUtils]: 9: Hoare triple {416#(and (= main_~z~0 main_~y~0) (not (< 0 (mod main_~n~0 4294967296))) (= main_~y~0 0))} [90] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (= (+ (* (- 1) v_main_~y~0_3) v_main_~y~0_4 v_main_~z~0_3) v_main_~z~0_2) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {423#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-07 17:26:27,365 INFO L290 TraceCheckUtils]: 10: Hoare triple {423#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {423#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-07 17:26:27,365 INFO L290 TraceCheckUtils]: 11: Hoare triple {423#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {423#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-07 17:26:27,378 INFO L272 TraceCheckUtils]: 12: Hoare triple {423#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {433#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:26:27,380 INFO L290 TraceCheckUtils]: 13: Hoare triple {433#(<= 1 |__VERIFIER_assert_#in~cond|)} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {437#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:26:27,381 INFO L290 TraceCheckUtils]: 14: Hoare triple {437#(<= 1 __VERIFIER_assert_~cond)} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {379#false} is VALID [2022-04-07 17:26:27,381 INFO L290 TraceCheckUtils]: 15: Hoare triple {379#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {379#false} is VALID [2022-04-07 17:26:27,381 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:26:27,381 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 17:26:37,410 INFO L290 TraceCheckUtils]: 15: Hoare triple {379#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {379#false} is VALID [2022-04-07 17:26:37,410 INFO L290 TraceCheckUtils]: 14: Hoare triple {437#(<= 1 __VERIFIER_assert_~cond)} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {379#false} is VALID [2022-04-07 17:26:37,411 INFO L290 TraceCheckUtils]: 13: Hoare triple {433#(<= 1 |__VERIFIER_assert_#in~cond|)} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {437#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:26:37,411 INFO L272 TraceCheckUtils]: 12: Hoare triple {453#(= (mod main_~z~0 4294967296) (mod (* main_~n~0 2) 4294967296))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {433#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:26:37,412 INFO L290 TraceCheckUtils]: 11: Hoare triple {453#(= (mod main_~z~0 4294967296) (mod (* main_~n~0 2) 4294967296))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {453#(= (mod main_~z~0 4294967296) (mod (* main_~n~0 2) 4294967296))} is VALID [2022-04-07 17:26:37,412 INFO L290 TraceCheckUtils]: 10: Hoare triple {453#(= (mod main_~z~0 4294967296) (mod (* main_~n~0 2) 4294967296))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {453#(= (mod main_~z~0 4294967296) (mod (* main_~n~0 2) 4294967296))} is VALID [2022-04-07 17:26:39,433 WARN L290 TraceCheckUtils]: 9: Hoare triple {463#(forall ((aux_mod_v_main_~z~0_23_31 Int)) (or (and (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_23_31 Int)) (or (exists ((v_it_3 Int)) (and (<= (+ v_it_3 main_~z~0 1) (+ aux_mod_v_main_~z~0_23_31 (* 4294967296 aux_div_v_main_~z~0_23_31))) (<= 1 v_it_3) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296))))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_23_31 (* 4294967296 aux_div_v_main_~z~0_23_31))))))) (or (forall ((aux_div_v_main_~z~0_23_31 Int)) (not (= (+ aux_mod_v_main_~z~0_23_31 (* 4294967296 aux_div_v_main_~z~0_23_31)) main_~z~0))) (< 0 (mod main_~y~0 4294967296)))) (> 0 aux_mod_v_main_~z~0_23_31) (>= aux_mod_v_main_~z~0_23_31 4294967296) (= aux_mod_v_main_~z~0_23_31 (mod (* main_~n~0 2) 4294967296))))} [90] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (= (+ (* (- 1) v_main_~y~0_3) v_main_~y~0_4 v_main_~z~0_3) v_main_~z~0_2) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {453#(= (mod main_~z~0 4294967296) (mod (* main_~n~0 2) 4294967296))} is UNKNOWN [2022-04-07 17:26:41,443 WARN L290 TraceCheckUtils]: 8: Hoare triple {467#(or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_mod_v_main_~z~0_23_31 Int)) (or (and (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_23_31 Int)) (or (exists ((v_it_3 Int)) (and (<= (+ v_it_3 main_~z~0 1) (+ aux_mod_v_main_~z~0_23_31 (* 4294967296 aux_div_v_main_~z~0_23_31))) (<= 1 v_it_3) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296))))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_23_31 (* 4294967296 aux_div_v_main_~z~0_23_31))))))) (or (forall ((aux_div_v_main_~z~0_23_31 Int)) (not (= (+ aux_mod_v_main_~z~0_23_31 (* 4294967296 aux_div_v_main_~z~0_23_31)) main_~z~0))) (< 0 (mod main_~y~0 4294967296)))) (> 0 aux_mod_v_main_~z~0_23_31) (>= aux_mod_v_main_~z~0_23_31 4294967296) (= aux_mod_v_main_~z~0_23_31 (mod (* main_~n~0 2) 4294967296)))))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {463#(forall ((aux_mod_v_main_~z~0_23_31 Int)) (or (and (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_23_31 Int)) (or (exists ((v_it_3 Int)) (and (<= (+ v_it_3 main_~z~0 1) (+ aux_mod_v_main_~z~0_23_31 (* 4294967296 aux_div_v_main_~z~0_23_31))) (<= 1 v_it_3) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296))))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_23_31 (* 4294967296 aux_div_v_main_~z~0_23_31))))))) (or (forall ((aux_div_v_main_~z~0_23_31 Int)) (not (= (+ aux_mod_v_main_~z~0_23_31 (* 4294967296 aux_div_v_main_~z~0_23_31)) main_~z~0))) (< 0 (mod main_~y~0 4294967296)))) (> 0 aux_mod_v_main_~z~0_23_31) (>= aux_mod_v_main_~z~0_23_31 4294967296) (= aux_mod_v_main_~z~0_23_31 (mod (* main_~n~0 2) 4294967296))))} is UNKNOWN [2022-04-07 17:26:41,448 INFO L290 TraceCheckUtils]: 7: Hoare triple {471#(or (<= (div (+ (- 1) (* (- 1) main_~y~0)) (- 4294967296)) (div (+ (- 1) (mod (* main_~n~0 2) 4294967296) (* (- 1) main_~y~0)) (- 4294967296))) (< 0 (mod main_~y~0 4294967296)))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {467#(or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_mod_v_main_~z~0_23_31 Int)) (or (and (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_23_31 Int)) (or (exists ((v_it_3 Int)) (and (<= (+ v_it_3 main_~z~0 1) (+ aux_mod_v_main_~z~0_23_31 (* 4294967296 aux_div_v_main_~z~0_23_31))) (<= 1 v_it_3) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296))))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_23_31 (* 4294967296 aux_div_v_main_~z~0_23_31))))))) (or (forall ((aux_div_v_main_~z~0_23_31 Int)) (not (= (+ aux_mod_v_main_~z~0_23_31 (* 4294967296 aux_div_v_main_~z~0_23_31)) main_~z~0))) (< 0 (mod main_~y~0 4294967296)))) (> 0 aux_mod_v_main_~z~0_23_31) (>= aux_mod_v_main_~z~0_23_31 4294967296) (= aux_mod_v_main_~z~0_23_31 (mod (* main_~n~0 2) 4294967296)))))} is VALID [2022-04-07 17:26:41,450 INFO L290 TraceCheckUtils]: 6: Hoare triple {475#(or (<= (div (+ (- 1) (* (- 1) main_~y~0)) (- 4294967296)) (div (+ (- 1) (mod (* main_~n~0 2) 4294967296) (* (- 1) main_~y~0)) (- 4294967296))) (< 0 (mod main_~x~0 4294967296)) (< 0 (mod main_~y~0 4294967296)))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {471#(or (<= (div (+ (- 1) (* (- 1) main_~y~0)) (- 4294967296)) (div (+ (- 1) (mod (* main_~n~0 2) 4294967296) (* (- 1) main_~y~0)) (- 4294967296))) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-07 17:26:41,453 INFO L290 TraceCheckUtils]: 5: Hoare triple {378#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {475#(or (<= (div (+ (- 1) (* (- 1) main_~y~0)) (- 4294967296)) (div (+ (- 1) (mod (* main_~n~0 2) 4294967296) (* (- 1) main_~y~0)) (- 4294967296))) (< 0 (mod main_~x~0 4294967296)) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-07 17:26:41,453 INFO L272 TraceCheckUtils]: 4: Hoare triple {378#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {378#true} is VALID [2022-04-07 17:26:41,453 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {378#true} {378#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {378#true} is VALID [2022-04-07 17:26:41,453 INFO L290 TraceCheckUtils]: 2: Hoare triple {378#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {378#true} is VALID [2022-04-07 17:26:41,454 INFO L290 TraceCheckUtils]: 1: Hoare triple {378#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {378#true} is VALID [2022-04-07 17:26:41,454 INFO L272 TraceCheckUtils]: 0: Hoare triple {378#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {378#true} is VALID [2022-04-07 17:26:41,454 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:26:41,454 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1668869296] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 17:26:41,454 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 17:26:41,454 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 8, 9] total 20 [2022-04-07 17:26:41,454 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1910540724] [2022-04-07 17:26:41,455 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 17:26:41,455 INFO L78 Accepts]: Start accepts. Automaton has has 20 states, 19 states have (on average 1.4736842105263157) internal successors, (28), 17 states have internal predecessors, (28), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-07 17:26:41,455 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:26:41,455 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 20 states, 19 states have (on average 1.4736842105263157) internal successors, (28), 17 states have internal predecessors, (28), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:26:45,557 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 35 edges. 33 inductive. 0 not inductive. 2 times theorem prover too weak to decide inductivity. [2022-04-07 17:26:45,557 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 20 states [2022-04-07 17:26:45,557 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:26:45,557 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2022-04-07 17:26:45,558 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=299, Unknown=3, NotChecked=0, Total=380 [2022-04-07 17:26:45,558 INFO L87 Difference]: Start difference. First operand 20 states and 25 transitions. Second operand has 20 states, 19 states have (on average 1.4736842105263157) internal successors, (28), 17 states have internal predecessors, (28), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:26:48,508 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:26:48,508 INFO L93 Difference]: Finished difference Result 28 states and 37 transitions. [2022-04-07 17:26:48,508 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-04-07 17:26:48,508 INFO L78 Accepts]: Start accepts. Automaton has has 20 states, 19 states have (on average 1.4736842105263157) internal successors, (28), 17 states have internal predecessors, (28), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-07 17:26:48,508 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:26:48,509 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 19 states have (on average 1.4736842105263157) internal successors, (28), 17 states have internal predecessors, (28), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:26:48,511 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 38 transitions. [2022-04-07 17:26:48,512 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 19 states have (on average 1.4736842105263157) internal successors, (28), 17 states have internal predecessors, (28), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:26:48,516 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 38 transitions. [2022-04-07 17:26:48,516 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 10 states and 38 transitions. [2022-04-07 17:26:48,550 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 38 edges. 38 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:26:48,553 INFO L225 Difference]: With dead ends: 28 [2022-04-07 17:26:48,553 INFO L226 Difference]: Without dead ends: 25 [2022-04-07 17:26:48,553 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 50 GetRequests, 22 SyntacticMatches, 3 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 161 ImplicationChecksByTransitivity, 10.9s TimeCoverageRelationStatistics Valid=145, Invalid=553, Unknown=4, NotChecked=0, Total=702 [2022-04-07 17:26:48,556 INFO L913 BasicCegarLoop]: 11 mSDtfsCounter, 29 mSDsluCounter, 60 mSDsCounter, 0 mSdLazyCounter, 90 mSolverCounterSat, 11 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 29 SdHoareTripleChecker+Valid, 71 SdHoareTripleChecker+Invalid, 130 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 11 IncrementalHoareTripleChecker+Valid, 90 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 29 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-07 17:26:48,557 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [29 Valid, 71 Invalid, 130 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [11 Valid, 90 Invalid, 0 Unknown, 29 Unchecked, 0.2s Time] [2022-04-07 17:26:48,559 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2022-04-07 17:26:48,565 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 22. [2022-04-07 17:26:48,565 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:26:48,567 INFO L82 GeneralOperation]: Start isEquivalent. First operand 25 states. Second operand has 22 states, 17 states have (on average 1.411764705882353) internal successors, (24), 17 states have internal predecessors, (24), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:26:48,567 INFO L74 IsIncluded]: Start isIncluded. First operand 25 states. Second operand has 22 states, 17 states have (on average 1.411764705882353) internal successors, (24), 17 states have internal predecessors, (24), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:26:48,567 INFO L87 Difference]: Start difference. First operand 25 states. Second operand has 22 states, 17 states have (on average 1.411764705882353) internal successors, (24), 17 states have internal predecessors, (24), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:26:48,568 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:26:48,568 INFO L93 Difference]: Finished difference Result 25 states and 34 transitions. [2022-04-07 17:26:48,568 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 34 transitions. [2022-04-07 17:26:48,569 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:26:48,569 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:26:48,572 INFO L74 IsIncluded]: Start isIncluded. First operand has 22 states, 17 states have (on average 1.411764705882353) internal successors, (24), 17 states have internal predecessors, (24), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 25 states. [2022-04-07 17:26:48,574 INFO L87 Difference]: Start difference. First operand has 22 states, 17 states have (on average 1.411764705882353) internal successors, (24), 17 states have internal predecessors, (24), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 25 states. [2022-04-07 17:26:48,575 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:26:48,575 INFO L93 Difference]: Finished difference Result 25 states and 34 transitions. [2022-04-07 17:26:48,575 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 34 transitions. [2022-04-07 17:26:48,575 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:26:48,575 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:26:48,575 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:26:48,575 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:26:48,576 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 17 states have (on average 1.411764705882353) internal successors, (24), 17 states have internal predecessors, (24), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:26:48,576 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 28 transitions. [2022-04-07 17:26:48,576 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 28 transitions. Word has length 16 [2022-04-07 17:26:48,576 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:26:48,577 INFO L478 AbstractCegarLoop]: Abstraction has 22 states and 28 transitions. [2022-04-07 17:26:48,577 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 20 states, 19 states have (on average 1.4736842105263157) internal successors, (28), 17 states have internal predecessors, (28), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:26:48,577 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 28 transitions. [2022-04-07 17:26:48,577 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-04-07 17:26:48,577 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:26:48,577 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:26:48,594 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2022-04-07 17:26:48,794 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable3 [2022-04-07 17:26:48,794 INFO L403 AbstractCegarLoop]: === Iteration 5 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:26:48,794 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:26:48,794 INFO L85 PathProgramCache]: Analyzing trace with hash -894405051, now seen corresponding path program 1 times [2022-04-07 17:26:48,794 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:26:48,795 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [942635925] [2022-04-07 17:26:48,795 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:26:48,795 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:26:48,803 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.0))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-07 17:26:48,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:26:48,828 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.1))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-07 17:26:48,991 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:26:48,993 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:26:49,014 INFO L290 TraceCheckUtils]: 0: Hoare triple {623#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {611#true} is VALID [2022-04-07 17:26:49,015 INFO L290 TraceCheckUtils]: 1: Hoare triple {611#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {611#true} is VALID [2022-04-07 17:26:49,015 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {611#true} {611#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {611#true} is VALID [2022-04-07 17:26:49,015 INFO L272 TraceCheckUtils]: 0: Hoare triple {611#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {623#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:26:49,016 INFO L290 TraceCheckUtils]: 1: Hoare triple {623#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {611#true} is VALID [2022-04-07 17:26:49,016 INFO L290 TraceCheckUtils]: 2: Hoare triple {611#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {611#true} is VALID [2022-04-07 17:26:49,016 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {611#true} {611#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {611#true} is VALID [2022-04-07 17:26:49,016 INFO L272 TraceCheckUtils]: 4: Hoare triple {611#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {611#true} is VALID [2022-04-07 17:26:49,016 INFO L290 TraceCheckUtils]: 5: Hoare triple {611#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {616#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 17:26:49,017 INFO L290 TraceCheckUtils]: 6: Hoare triple {616#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {617#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:26:49,017 INFO L290 TraceCheckUtils]: 7: Hoare triple {617#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {618#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 17:26:49,026 INFO L290 TraceCheckUtils]: 8: Hoare triple {618#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [87] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~x~0_9 v_main_~x~0_8) (<= .cse0 0) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)) (and (= v_main_~z~0_9 (+ (* (- 1) v_main_~x~0_8) v_main_~z~0_10 v_main_~x~0_9)) (< v_main_~x~0_9 v_main_~x~0_8) (< 0 .cse0) (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (not (<= (+ v_main_~x~0_9 v_it_2 1) v_main_~x~0_8)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_2 4294967295)) 4294967296))))))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_10, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {619#(or (and (= main_~z~0 0) (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1))) (not (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)))))} is VALID [2022-04-07 17:26:49,027 INFO L290 TraceCheckUtils]: 9: Hoare triple {619#(or (and (= main_~z~0 0) (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1))) (not (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)))))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {620#(and (= main_~z~0 0) (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)))} is VALID [2022-04-07 17:26:49,028 INFO L290 TraceCheckUtils]: 10: Hoare triple {620#(and (= main_~z~0 0) (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {620#(and (= main_~z~0 0) (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)))} is VALID [2022-04-07 17:26:49,028 INFO L290 TraceCheckUtils]: 11: Hoare triple {620#(and (= main_~z~0 0) (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {620#(and (= main_~z~0 0) (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)))} is VALID [2022-04-07 17:26:49,029 INFO L272 TraceCheckUtils]: 12: Hoare triple {620#(and (= main_~z~0 0) (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {621#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:26:49,030 INFO L290 TraceCheckUtils]: 13: Hoare triple {621#(not (= |__VERIFIER_assert_#in~cond| 0))} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {622#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:26:49,030 INFO L290 TraceCheckUtils]: 14: Hoare triple {622#(not (= __VERIFIER_assert_~cond 0))} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {612#false} is VALID [2022-04-07 17:26:49,030 INFO L290 TraceCheckUtils]: 15: Hoare triple {612#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {612#false} is VALID [2022-04-07 17:26:49,030 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:26:49,030 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:26:49,030 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [942635925] [2022-04-07 17:26:49,031 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [942635925] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:26:49,031 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1586214442] [2022-04-07 17:26:49,031 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:26:49,031 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:26:49,031 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:26:49,032 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:26:49,032 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-04-07 17:26:49,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:26:49,066 INFO L263 TraceCheckSpWp]: Trace formula consists of 61 conjuncts, 9 conjunts are in the unsatisfiable core [2022-04-07 17:26:49,071 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:26:49,072 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:26:49,714 INFO L272 TraceCheckUtils]: 0: Hoare triple {611#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {611#true} is VALID [2022-04-07 17:26:49,715 INFO L290 TraceCheckUtils]: 1: Hoare triple {611#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {611#true} is VALID [2022-04-07 17:26:49,715 INFO L290 TraceCheckUtils]: 2: Hoare triple {611#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {611#true} is VALID [2022-04-07 17:26:49,715 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {611#true} {611#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {611#true} is VALID [2022-04-07 17:26:49,715 INFO L272 TraceCheckUtils]: 4: Hoare triple {611#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {611#true} is VALID [2022-04-07 17:26:49,715 INFO L290 TraceCheckUtils]: 5: Hoare triple {611#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {642#(= main_~n~0 main_~x~0)} is VALID [2022-04-07 17:26:49,716 INFO L290 TraceCheckUtils]: 6: Hoare triple {642#(= main_~n~0 main_~x~0)} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {646#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:26:49,716 INFO L290 TraceCheckUtils]: 7: Hoare triple {646#(not (< 0 (mod main_~n~0 4294967296)))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {646#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:26:49,716 INFO L290 TraceCheckUtils]: 8: Hoare triple {646#(not (< 0 (mod main_~n~0 4294967296)))} [87] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~x~0_9 v_main_~x~0_8) (<= .cse0 0) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)) (and (= v_main_~z~0_9 (+ (* (- 1) v_main_~x~0_8) v_main_~z~0_10 v_main_~x~0_9)) (< v_main_~x~0_9 v_main_~x~0_8) (< 0 .cse0) (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (not (<= (+ v_main_~x~0_9 v_it_2 1) v_main_~x~0_8)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_2 4294967295)) 4294967296))))))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_10, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {646#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:26:49,717 INFO L290 TraceCheckUtils]: 9: Hoare triple {646#(not (< 0 (mod main_~n~0 4294967296)))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {656#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:26:49,717 INFO L290 TraceCheckUtils]: 10: Hoare triple {656#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {656#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:26:49,718 INFO L290 TraceCheckUtils]: 11: Hoare triple {656#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {656#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:26:49,719 INFO L272 TraceCheckUtils]: 12: Hoare triple {656#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {666#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:26:49,719 INFO L290 TraceCheckUtils]: 13: Hoare triple {666#(<= 1 |__VERIFIER_assert_#in~cond|)} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {670#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:26:49,720 INFO L290 TraceCheckUtils]: 14: Hoare triple {670#(<= 1 __VERIFIER_assert_~cond)} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {612#false} is VALID [2022-04-07 17:26:49,720 INFO L290 TraceCheckUtils]: 15: Hoare triple {612#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {612#false} is VALID [2022-04-07 17:26:49,720 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 17:26:49,720 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-07 17:26:49,720 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1586214442] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 17:26:49,720 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-07 17:26:49,720 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [10] total 15 [2022-04-07 17:26:49,721 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [919160157] [2022-04-07 17:26:49,721 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 17:26:49,721 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 1.7142857142857142) internal successors, (12), 6 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-07 17:26:49,721 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:26:49,721 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 7 states, 7 states have (on average 1.7142857142857142) internal successors, (12), 6 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:26:49,734 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 16 edges. 16 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:26:49,735 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-04-07 17:26:49,735 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:26:49,735 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-04-07 17:26:49,735 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=170, Unknown=0, NotChecked=0, Total=210 [2022-04-07 17:26:49,735 INFO L87 Difference]: Start difference. First operand 22 states and 28 transitions. Second operand has 7 states, 7 states have (on average 1.7142857142857142) internal successors, (12), 6 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:26:49,876 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:26:49,877 INFO L93 Difference]: Finished difference Result 28 states and 36 transitions. [2022-04-07 17:26:49,877 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-04-07 17:26:49,877 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 1.7142857142857142) internal successors, (12), 6 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-07 17:26:49,877 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:26:49,877 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 1.7142857142857142) internal successors, (12), 6 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:26:49,878 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 34 transitions. [2022-04-07 17:26:49,878 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 1.7142857142857142) internal successors, (12), 6 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:26:49,879 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 34 transitions. [2022-04-07 17:26:49,879 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 9 states and 34 transitions. [2022-04-07 17:26:49,910 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 34 edges. 34 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:26:49,911 INFO L225 Difference]: With dead ends: 28 [2022-04-07 17:26:49,911 INFO L226 Difference]: Without dead ends: 25 [2022-04-07 17:26:49,911 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 55 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=59, Invalid=247, Unknown=0, NotChecked=0, Total=306 [2022-04-07 17:26:49,912 INFO L913 BasicCegarLoop]: 15 mSDtfsCounter, 8 mSDsluCounter, 59 mSDsCounter, 0 mSdLazyCounter, 22 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 8 SdHoareTripleChecker+Valid, 74 SdHoareTripleChecker+Invalid, 28 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 22 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 6 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 17:26:49,912 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [8 Valid, 74 Invalid, 28 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 22 Invalid, 0 Unknown, 6 Unchecked, 0.0s Time] [2022-04-07 17:26:49,912 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2022-04-07 17:26:49,914 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 23. [2022-04-07 17:26:49,914 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:26:49,914 INFO L82 GeneralOperation]: Start isEquivalent. First operand 25 states. Second operand has 23 states, 18 states have (on average 1.4444444444444444) internal successors, (26), 18 states have internal predecessors, (26), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:26:49,914 INFO L74 IsIncluded]: Start isIncluded. First operand 25 states. Second operand has 23 states, 18 states have (on average 1.4444444444444444) internal successors, (26), 18 states have internal predecessors, (26), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:26:49,914 INFO L87 Difference]: Start difference. First operand 25 states. Second operand has 23 states, 18 states have (on average 1.4444444444444444) internal successors, (26), 18 states have internal predecessors, (26), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:26:49,915 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:26:49,915 INFO L93 Difference]: Finished difference Result 25 states and 33 transitions. [2022-04-07 17:26:49,915 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 33 transitions. [2022-04-07 17:26:49,915 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:26:49,916 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:26:49,916 INFO L74 IsIncluded]: Start isIncluded. First operand has 23 states, 18 states have (on average 1.4444444444444444) internal successors, (26), 18 states have internal predecessors, (26), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 25 states. [2022-04-07 17:26:49,916 INFO L87 Difference]: Start difference. First operand has 23 states, 18 states have (on average 1.4444444444444444) internal successors, (26), 18 states have internal predecessors, (26), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 25 states. [2022-04-07 17:26:49,917 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:26:49,917 INFO L93 Difference]: Finished difference Result 25 states and 33 transitions. [2022-04-07 17:26:49,917 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 33 transitions. [2022-04-07 17:26:49,917 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:26:49,917 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:26:49,917 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:26:49,917 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:26:49,917 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 18 states have (on average 1.4444444444444444) internal successors, (26), 18 states have internal predecessors, (26), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:26:49,918 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 30 transitions. [2022-04-07 17:26:49,918 INFO L78 Accepts]: Start accepts. Automaton has 23 states and 30 transitions. Word has length 16 [2022-04-07 17:26:49,918 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:26:49,918 INFO L478 AbstractCegarLoop]: Abstraction has 23 states and 30 transitions. [2022-04-07 17:26:49,918 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 1.7142857142857142) internal successors, (12), 6 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:26:49,918 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 30 transitions. [2022-04-07 17:26:49,919 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-04-07 17:26:49,919 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:26:49,919 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:26:49,935 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-04-07 17:26:50,136 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:26:50,136 INFO L403 AbstractCegarLoop]: === Iteration 6 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:26:50,136 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:26:50,136 INFO L85 PathProgramCache]: Analyzing trace with hash 1590526661, now seen corresponding path program 1 times [2022-04-07 17:26:50,137 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:26:50,137 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2079393591] [2022-04-07 17:26:50,137 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:26:50,137 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:26:50,144 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_1.0))) (+ main_~x~0_5 .cse0 (* (- 4294967296) (div (+ main_~x~0_5 .cse0) 4294967296)))) 0)) [2022-04-07 17:26:50,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:26:50,159 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_1.1))) (+ main_~x~0_5 .cse0 (* (- 4294967296) (div (+ main_~x~0_5 .cse0) 4294967296)))) 0)) [2022-04-07 17:26:50,329 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:26:50,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:26:50,341 INFO L290 TraceCheckUtils]: 0: Hoare triple {796#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {783#true} is VALID [2022-04-07 17:26:50,341 INFO L290 TraceCheckUtils]: 1: Hoare triple {783#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {783#true} is VALID [2022-04-07 17:26:50,341 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {783#true} {783#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {783#true} is VALID [2022-04-07 17:26:50,342 INFO L272 TraceCheckUtils]: 0: Hoare triple {783#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {796#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:26:50,342 INFO L290 TraceCheckUtils]: 1: Hoare triple {796#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {783#true} is VALID [2022-04-07 17:26:50,342 INFO L290 TraceCheckUtils]: 2: Hoare triple {783#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {783#true} is VALID [2022-04-07 17:26:50,342 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {783#true} {783#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {783#true} is VALID [2022-04-07 17:26:50,342 INFO L272 TraceCheckUtils]: 4: Hoare triple {783#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {783#true} is VALID [2022-04-07 17:26:50,343 INFO L290 TraceCheckUtils]: 5: Hoare triple {783#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {788#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 17:26:50,363 INFO L290 TraceCheckUtils]: 6: Hoare triple {788#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [83] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0) (= v_main_~y~0_6 v_main_~y~0_5)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_6 v_it_1 1) v_main_~y~0_5)))) (< v_main_~y~0_6 v_main_~y~0_5) (< 0 .cse0) (= v_main_~x~0_3 (+ v_main_~x~0_4 v_main_~y~0_6 (* (- 1) v_main_~y~0_5)))))) InVars {main_~y~0=v_main_~y~0_6, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {789#(or (<= main_~n~0 (* (div (* main_~n~0 2) 4294967296) 2147483648)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)))} is VALID [2022-04-07 17:26:50,364 INFO L290 TraceCheckUtils]: 7: Hoare triple {789#(or (<= main_~n~0 (* (div (* main_~n~0 2) 4294967296) 2147483648)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {790#(or (<= main_~n~0 (* (div (* main_~n~0 2) 4294967296) 2147483648)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-07 17:26:50,365 INFO L290 TraceCheckUtils]: 8: Hoare triple {790#(or (<= main_~n~0 (* (div (* main_~n~0 2) 4294967296) 2147483648)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {791#(or (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-07 17:26:50,365 INFO L290 TraceCheckUtils]: 9: Hoare triple {791#(or (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {792#(or (and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)))) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-07 17:26:50,366 INFO L290 TraceCheckUtils]: 10: Hoare triple {792#(or (and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)))) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {793#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:26:50,367 INFO L290 TraceCheckUtils]: 11: Hoare triple {793#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {793#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:26:50,369 INFO L272 TraceCheckUtils]: 12: Hoare triple {793#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {794#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:26:50,370 INFO L290 TraceCheckUtils]: 13: Hoare triple {794#(not (= |__VERIFIER_assert_#in~cond| 0))} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {795#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:26:50,370 INFO L290 TraceCheckUtils]: 14: Hoare triple {795#(not (= __VERIFIER_assert_~cond 0))} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {784#false} is VALID [2022-04-07 17:26:50,370 INFO L290 TraceCheckUtils]: 15: Hoare triple {784#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {784#false} is VALID [2022-04-07 17:26:50,371 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:26:50,371 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:26:50,371 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2079393591] [2022-04-07 17:26:50,371 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2079393591] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:26:50,371 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2057146782] [2022-04-07 17:26:50,371 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:26:50,371 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:26:50,371 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:26:50,374 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:26:50,375 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-04-07 17:26:50,452 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:26:50,452 INFO L263 TraceCheckSpWp]: Trace formula consists of 61 conjuncts, 12 conjunts are in the unsatisfiable core [2022-04-07 17:26:50,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:26:50,488 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:26:53,317 INFO L272 TraceCheckUtils]: 0: Hoare triple {783#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {783#true} is VALID [2022-04-07 17:26:53,317 INFO L290 TraceCheckUtils]: 1: Hoare triple {783#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {783#true} is VALID [2022-04-07 17:26:53,317 INFO L290 TraceCheckUtils]: 2: Hoare triple {783#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {783#true} is VALID [2022-04-07 17:26:53,317 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {783#true} {783#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {783#true} is VALID [2022-04-07 17:26:53,318 INFO L272 TraceCheckUtils]: 4: Hoare triple {783#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {783#true} is VALID [2022-04-07 17:26:53,318 INFO L290 TraceCheckUtils]: 5: Hoare triple {783#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {788#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 17:26:53,373 INFO L290 TraceCheckUtils]: 6: Hoare triple {788#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [83] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0) (= v_main_~y~0_6 v_main_~y~0_5)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_6 v_it_1 1) v_main_~y~0_5)))) (< v_main_~y~0_6 v_main_~y~0_5) (< 0 .cse0) (= v_main_~x~0_3 (+ v_main_~x~0_4 v_main_~y~0_6 (* (- 1) v_main_~y~0_5)))))) InVars {main_~y~0=v_main_~y~0_6, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {818#(or (and (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)))} is VALID [2022-04-07 17:26:53,374 INFO L290 TraceCheckUtils]: 7: Hoare triple {818#(or (and (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {818#(or (and (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)))} is VALID [2022-04-07 17:26:53,375 INFO L290 TraceCheckUtils]: 8: Hoare triple {818#(or (and (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {825#(and (= main_~z~0 main_~y~0) (or (and (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0))))} is VALID [2022-04-07 17:26:53,379 INFO L290 TraceCheckUtils]: 9: Hoare triple {825#(and (= main_~z~0 main_~y~0) (or (and (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0))))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {829#(and (= main_~z~0 main_~y~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0))} is VALID [2022-04-07 17:26:53,379 INFO L290 TraceCheckUtils]: 10: Hoare triple {829#(and (= main_~z~0 main_~y~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {833#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-07 17:26:53,380 INFO L290 TraceCheckUtils]: 11: Hoare triple {833#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {833#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-07 17:26:53,393 INFO L272 TraceCheckUtils]: 12: Hoare triple {833#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {840#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:26:53,394 INFO L290 TraceCheckUtils]: 13: Hoare triple {840#(<= 1 |__VERIFIER_assert_#in~cond|)} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {844#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:26:53,394 INFO L290 TraceCheckUtils]: 14: Hoare triple {844#(<= 1 __VERIFIER_assert_~cond)} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {784#false} is VALID [2022-04-07 17:26:53,394 INFO L290 TraceCheckUtils]: 15: Hoare triple {784#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {784#false} is VALID [2022-04-07 17:26:53,394 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:26:53,394 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 17:26:56,406 INFO L290 TraceCheckUtils]: 15: Hoare triple {784#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {784#false} is VALID [2022-04-07 17:26:56,406 INFO L290 TraceCheckUtils]: 14: Hoare triple {844#(<= 1 __VERIFIER_assert_~cond)} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {784#false} is VALID [2022-04-07 17:26:56,407 INFO L290 TraceCheckUtils]: 13: Hoare triple {840#(<= 1 |__VERIFIER_assert_#in~cond|)} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {844#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:26:56,408 INFO L272 TraceCheckUtils]: 12: Hoare triple {793#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {840#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:26:56,409 INFO L290 TraceCheckUtils]: 11: Hoare triple {793#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {793#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:26:56,409 INFO L290 TraceCheckUtils]: 10: Hoare triple {792#(or (and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)))) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {793#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:26:56,410 INFO L290 TraceCheckUtils]: 9: Hoare triple {869#(or (< 0 (mod main_~z~0 4294967296)) (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {792#(or (and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)))) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-07 17:26:56,411 INFO L290 TraceCheckUtils]: 8: Hoare triple {790#(or (<= main_~n~0 (* (div (* main_~n~0 2) 4294967296) 2147483648)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {869#(or (< 0 (mod main_~z~0 4294967296)) (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-07 17:26:56,412 INFO L290 TraceCheckUtils]: 7: Hoare triple {790#(or (<= main_~n~0 (* (div (* main_~n~0 2) 4294967296) 2147483648)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {790#(or (<= main_~n~0 (* (div (* main_~n~0 2) 4294967296) 2147483648)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-07 17:26:58,447 WARN L290 TraceCheckUtils]: 6: Hoare triple {879#(or (<= main_~n~0 (* (div (* main_~n~0 2) 4294967296) 2147483648)) (forall ((aux_mod_v_main_~y~0_18_31 Int)) (or (and (or (forall ((aux_div_v_main_~y~0_18_31 Int)) (or (not (< main_~y~0 (+ (* aux_div_v_main_~y~0_18_31 4294967296) aux_mod_v_main_~y~0_18_31))) (exists ((v_it_1 Int)) (and (not (< 0 (mod (+ main_~x~0 (* v_it_1 4294967295)) 4294967296))) (<= (+ v_it_1 main_~y~0 1) (+ (* aux_div_v_main_~y~0_18_31 4294967296) aux_mod_v_main_~y~0_18_31)) (<= 1 v_it_1))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (forall ((aux_div_v_main_~y~0_18_31 Int)) (not (= (+ (* aux_div_v_main_~y~0_18_31 4294967296) aux_mod_v_main_~y~0_18_31) main_~y~0))) (< 0 (mod main_~x~0 4294967296)))) (<= 1 aux_mod_v_main_~y~0_18_31) (< aux_mod_v_main_~y~0_18_31 0))))} [83] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0) (= v_main_~y~0_6 v_main_~y~0_5)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_6 v_it_1 1) v_main_~y~0_5)))) (< v_main_~y~0_6 v_main_~y~0_5) (< 0 .cse0) (= v_main_~x~0_3 (+ v_main_~x~0_4 v_main_~y~0_6 (* (- 1) v_main_~y~0_5)))))) InVars {main_~y~0=v_main_~y~0_6, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {790#(or (<= main_~n~0 (* (div (* main_~n~0 2) 4294967296) 2147483648)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is UNKNOWN [2022-04-07 17:26:58,454 INFO L290 TraceCheckUtils]: 5: Hoare triple {783#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {879#(or (<= main_~n~0 (* (div (* main_~n~0 2) 4294967296) 2147483648)) (forall ((aux_mod_v_main_~y~0_18_31 Int)) (or (and (or (forall ((aux_div_v_main_~y~0_18_31 Int)) (or (not (< main_~y~0 (+ (* aux_div_v_main_~y~0_18_31 4294967296) aux_mod_v_main_~y~0_18_31))) (exists ((v_it_1 Int)) (and (not (< 0 (mod (+ main_~x~0 (* v_it_1 4294967295)) 4294967296))) (<= (+ v_it_1 main_~y~0 1) (+ (* aux_div_v_main_~y~0_18_31 4294967296) aux_mod_v_main_~y~0_18_31)) (<= 1 v_it_1))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (forall ((aux_div_v_main_~y~0_18_31 Int)) (not (= (+ (* aux_div_v_main_~y~0_18_31 4294967296) aux_mod_v_main_~y~0_18_31) main_~y~0))) (< 0 (mod main_~x~0 4294967296)))) (<= 1 aux_mod_v_main_~y~0_18_31) (< aux_mod_v_main_~y~0_18_31 0))))} is VALID [2022-04-07 17:26:58,454 INFO L272 TraceCheckUtils]: 4: Hoare triple {783#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {783#true} is VALID [2022-04-07 17:26:58,454 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {783#true} {783#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {783#true} is VALID [2022-04-07 17:26:58,454 INFO L290 TraceCheckUtils]: 2: Hoare triple {783#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {783#true} is VALID [2022-04-07 17:26:58,455 INFO L290 TraceCheckUtils]: 1: Hoare triple {783#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {783#true} is VALID [2022-04-07 17:26:58,455 INFO L272 TraceCheckUtils]: 0: Hoare triple {783#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {783#true} is VALID [2022-04-07 17:26:58,455 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:26:58,455 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2057146782] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 17:26:58,455 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 17:26:58,455 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 9, 9] total 19 [2022-04-07 17:26:58,455 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [904712341] [2022-04-07 17:26:58,455 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 17:26:58,456 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 1.368421052631579) internal successors, (26), 16 states have internal predecessors, (26), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-07 17:26:58,456 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:26:58,456 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 19 states, 19 states have (on average 1.368421052631579) internal successors, (26), 16 states have internal predecessors, (26), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:27:00,356 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 33 edges. 33 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:27:00,357 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2022-04-07 17:27:00,357 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:27:00,357 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2022-04-07 17:27:00,357 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=76, Invalid=266, Unknown=0, NotChecked=0, Total=342 [2022-04-07 17:27:00,357 INFO L87 Difference]: Start difference. First operand 23 states and 30 transitions. Second operand has 19 states, 19 states have (on average 1.368421052631579) internal successors, (26), 16 states have internal predecessors, (26), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:27:00,791 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:27:00,792 INFO L93 Difference]: Finished difference Result 33 states and 45 transitions. [2022-04-07 17:27:00,792 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-04-07 17:27:00,792 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 1.368421052631579) internal successors, (26), 16 states have internal predecessors, (26), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-07 17:27:00,792 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:27:00,792 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.368421052631579) internal successors, (26), 16 states have internal predecessors, (26), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:27:00,793 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 39 transitions. [2022-04-07 17:27:00,793 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.368421052631579) internal successors, (26), 16 states have internal predecessors, (26), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:27:00,794 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 39 transitions. [2022-04-07 17:27:00,794 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 11 states and 39 transitions. [2022-04-07 17:27:00,841 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 39 edges. 39 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:27:00,841 INFO L225 Difference]: With dead ends: 33 [2022-04-07 17:27:00,841 INFO L226 Difference]: Without dead ends: 30 [2022-04-07 17:27:00,842 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 50 GetRequests, 22 SyntacticMatches, 5 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 178 ImplicationChecksByTransitivity, 4.7s TimeCoverageRelationStatistics Valid=130, Invalid=470, Unknown=0, NotChecked=0, Total=600 [2022-04-07 17:27:00,842 INFO L913 BasicCegarLoop]: 14 mSDtfsCounter, 30 mSDsluCounter, 49 mSDsCounter, 0 mSdLazyCounter, 71 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 30 SdHoareTripleChecker+Valid, 63 SdHoareTripleChecker+Invalid, 109 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 71 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 30 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 17:27:00,842 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [30 Valid, 63 Invalid, 109 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 71 Invalid, 0 Unknown, 30 Unchecked, 0.1s Time] [2022-04-07 17:27:00,843 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states. [2022-04-07 17:27:00,844 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 26. [2022-04-07 17:27:00,844 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:27:00,844 INFO L82 GeneralOperation]: Start isEquivalent. First operand 30 states. Second operand has 26 states, 21 states have (on average 1.4761904761904763) internal successors, (31), 21 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:27:00,844 INFO L74 IsIncluded]: Start isIncluded. First operand 30 states. Second operand has 26 states, 21 states have (on average 1.4761904761904763) internal successors, (31), 21 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:27:00,844 INFO L87 Difference]: Start difference. First operand 30 states. Second operand has 26 states, 21 states have (on average 1.4761904761904763) internal successors, (31), 21 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:27:00,845 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:27:00,845 INFO L93 Difference]: Finished difference Result 30 states and 42 transitions. [2022-04-07 17:27:00,845 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 42 transitions. [2022-04-07 17:27:00,846 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:27:00,846 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:27:00,846 INFO L74 IsIncluded]: Start isIncluded. First operand has 26 states, 21 states have (on average 1.4761904761904763) internal successors, (31), 21 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 30 states. [2022-04-07 17:27:00,846 INFO L87 Difference]: Start difference. First operand has 26 states, 21 states have (on average 1.4761904761904763) internal successors, (31), 21 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 30 states. [2022-04-07 17:27:00,847 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:27:00,847 INFO L93 Difference]: Finished difference Result 30 states and 42 transitions. [2022-04-07 17:27:00,847 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 42 transitions. [2022-04-07 17:27:00,847 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:27:00,847 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:27:00,847 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:27:00,847 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:27:00,847 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 21 states have (on average 1.4761904761904763) internal successors, (31), 21 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:27:00,848 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 35 transitions. [2022-04-07 17:27:00,848 INFO L78 Accepts]: Start accepts. Automaton has 26 states and 35 transitions. Word has length 16 [2022-04-07 17:27:00,848 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:27:00,848 INFO L478 AbstractCegarLoop]: Abstraction has 26 states and 35 transitions. [2022-04-07 17:27:00,849 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 19 states, 19 states have (on average 1.368421052631579) internal successors, (26), 16 states have internal predecessors, (26), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:27:00,849 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 35 transitions. [2022-04-07 17:27:00,849 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-04-07 17:27:00,849 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:27:00,849 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:27:00,853 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2022-04-07 17:27:01,049 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5,5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:27:01,050 INFO L403 AbstractCegarLoop]: === Iteration 7 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:27:01,050 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:27:01,050 INFO L85 PathProgramCache]: Analyzing trace with hash -1741270951, now seen corresponding path program 1 times [2022-04-07 17:27:01,050 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:27:01,050 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [429242251] [2022-04-07 17:27:01,050 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:27:01,051 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:27:01,061 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.0))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-07 17:27:01,063 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.1))) (+ .cse0 main_~x~0_5 (* (- 4294967296) (div (+ .cse0 main_~x~0_5) 4294967296)))) 0)) [2022-04-07 17:27:01,069 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:27:01,086 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.2))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-07 17:27:01,089 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.3))) (+ .cse0 main_~x~0_5 (* (- 4294967296) (div (+ .cse0 main_~x~0_5) 4294967296)))) 0)) [2022-04-07 17:27:01,241 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:27:01,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:27:01,250 INFO L290 TraceCheckUtils]: 0: Hoare triple {1044#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1032#true} is VALID [2022-04-07 17:27:01,251 INFO L290 TraceCheckUtils]: 1: Hoare triple {1032#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1032#true} is VALID [2022-04-07 17:27:01,251 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1032#true} {1032#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1032#true} is VALID [2022-04-07 17:27:01,251 INFO L272 TraceCheckUtils]: 0: Hoare triple {1032#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1044#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:27:01,251 INFO L290 TraceCheckUtils]: 1: Hoare triple {1044#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1032#true} is VALID [2022-04-07 17:27:01,252 INFO L290 TraceCheckUtils]: 2: Hoare triple {1032#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1032#true} is VALID [2022-04-07 17:27:01,252 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1032#true} {1032#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1032#true} is VALID [2022-04-07 17:27:01,252 INFO L272 TraceCheckUtils]: 4: Hoare triple {1032#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1032#true} is VALID [2022-04-07 17:27:01,252 INFO L290 TraceCheckUtils]: 5: Hoare triple {1032#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1037#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 17:27:01,253 INFO L290 TraceCheckUtils]: 6: Hoare triple {1037#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1038#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:27:01,253 INFO L290 TraceCheckUtils]: 7: Hoare triple {1038#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {1039#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:27:01,254 INFO L290 TraceCheckUtils]: 8: Hoare triple {1039#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {1039#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:27:01,254 INFO L290 TraceCheckUtils]: 9: Hoare triple {1039#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [90] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (= (+ (* (- 1) v_main_~y~0_3) v_main_~y~0_4 v_main_~z~0_3) v_main_~z~0_2) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1040#(and (= main_~n~0 main_~x~0) (<= (+ main_~z~0 (* 8589934592 (div main_~x~0 4294967296))) (* main_~x~0 2)) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (<= 0 main_~z~0))} is VALID [2022-04-07 17:27:01,255 INFO L290 TraceCheckUtils]: 10: Hoare triple {1040#(and (= main_~n~0 main_~x~0) (<= (+ main_~z~0 (* 8589934592 (div main_~x~0 4294967296))) (* main_~x~0 2)) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (<= 0 main_~z~0))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1040#(and (= main_~n~0 main_~x~0) (<= (+ main_~z~0 (* 8589934592 (div main_~x~0 4294967296))) (* main_~x~0 2)) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (<= 0 main_~z~0))} is VALID [2022-04-07 17:27:01,258 INFO L290 TraceCheckUtils]: 11: Hoare triple {1040#(and (= main_~n~0 main_~x~0) (<= (+ main_~z~0 (* 8589934592 (div main_~x~0 4294967296))) (* main_~x~0 2)) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (<= 0 main_~z~0))} [93] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~z~0_5 v_main_~z~0_4) (= v_main_~x~0_7 v_main_~x~0_6)) (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (< v_main_~x~0_6 v_main_~x~0_7) (= v_main_~z~0_4 (+ (* (- 1) v_main_~x~0_6) v_main_~x~0_7 v_main_~z~0_5))))) InVars {main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {1041#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= 0 main_~z~0) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:27:01,258 INFO L290 TraceCheckUtils]: 12: Hoare triple {1041#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= 0 main_~z~0) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1041#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= 0 main_~z~0) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:27:01,260 INFO L272 TraceCheckUtils]: 13: Hoare triple {1041#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= 0 main_~z~0) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {1042#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:27:01,261 INFO L290 TraceCheckUtils]: 14: Hoare triple {1042#(not (= |__VERIFIER_assert_#in~cond| 0))} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1043#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:27:01,261 INFO L290 TraceCheckUtils]: 15: Hoare triple {1043#(not (= __VERIFIER_assert_~cond 0))} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1033#false} is VALID [2022-04-07 17:27:01,263 INFO L290 TraceCheckUtils]: 16: Hoare triple {1033#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1033#false} is VALID [2022-04-07 17:27:01,263 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:27:01,263 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:27:01,263 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [429242251] [2022-04-07 17:27:01,263 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [429242251] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:27:01,263 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [510463116] [2022-04-07 17:27:01,263 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:27:01,263 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:27:01,263 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:27:01,265 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:27:01,265 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-04-07 17:27:01,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:27:01,308 INFO L263 TraceCheckSpWp]: Trace formula consists of 62 conjuncts, 14 conjunts are in the unsatisfiable core [2022-04-07 17:27:01,325 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:27:01,325 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:27:02,171 INFO L272 TraceCheckUtils]: 0: Hoare triple {1032#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1032#true} is VALID [2022-04-07 17:27:02,172 INFO L290 TraceCheckUtils]: 1: Hoare triple {1032#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1032#true} is VALID [2022-04-07 17:27:02,172 INFO L290 TraceCheckUtils]: 2: Hoare triple {1032#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1032#true} is VALID [2022-04-07 17:27:02,172 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1032#true} {1032#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1032#true} is VALID [2022-04-07 17:27:02,172 INFO L272 TraceCheckUtils]: 4: Hoare triple {1032#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1032#true} is VALID [2022-04-07 17:27:02,173 INFO L290 TraceCheckUtils]: 5: Hoare triple {1032#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1037#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 17:27:02,173 INFO L290 TraceCheckUtils]: 6: Hoare triple {1037#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1038#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:27:02,174 INFO L290 TraceCheckUtils]: 7: Hoare triple {1038#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {1039#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:27:02,174 INFO L290 TraceCheckUtils]: 8: Hoare triple {1039#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {1039#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:27:02,175 INFO L290 TraceCheckUtils]: 9: Hoare triple {1039#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [90] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (= (+ (* (- 1) v_main_~y~0_3) v_main_~y~0_4 v_main_~z~0_3) v_main_~z~0_2) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1040#(and (= main_~n~0 main_~x~0) (<= (+ main_~z~0 (* 8589934592 (div main_~x~0 4294967296))) (* main_~x~0 2)) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (<= 0 main_~z~0))} is VALID [2022-04-07 17:27:02,175 INFO L290 TraceCheckUtils]: 10: Hoare triple {1040#(and (= main_~n~0 main_~x~0) (<= (+ main_~z~0 (* 8589934592 (div main_~x~0 4294967296))) (* main_~x~0 2)) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (<= 0 main_~z~0))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1040#(and (= main_~n~0 main_~x~0) (<= (+ main_~z~0 (* 8589934592 (div main_~x~0 4294967296))) (* main_~x~0 2)) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (<= 0 main_~z~0))} is VALID [2022-04-07 17:27:02,177 INFO L290 TraceCheckUtils]: 11: Hoare triple {1040#(and (= main_~n~0 main_~x~0) (<= (+ main_~z~0 (* 8589934592 (div main_~x~0 4294967296))) (* main_~x~0 2)) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (<= 0 main_~z~0))} [93] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~z~0_5 v_main_~z~0_4) (= v_main_~x~0_7 v_main_~x~0_6)) (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (< v_main_~x~0_6 v_main_~x~0_7) (= v_main_~z~0_4 (+ (* (- 1) v_main_~x~0_6) v_main_~x~0_7 v_main_~z~0_5))))) InVars {main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {1040#(and (= main_~n~0 main_~x~0) (<= (+ main_~z~0 (* 8589934592 (div main_~x~0 4294967296))) (* main_~x~0 2)) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (<= 0 main_~z~0))} is VALID [2022-04-07 17:27:02,177 INFO L290 TraceCheckUtils]: 12: Hoare triple {1040#(and (= main_~n~0 main_~x~0) (<= (+ main_~z~0 (* 8589934592 (div main_~x~0 4294967296))) (* main_~x~0 2)) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (<= 0 main_~z~0))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1084#(and (<= (mod main_~n~0 4294967296) 0) (<= (+ (* (div main_~n~0 4294967296) 8589934592) main_~z~0) (* main_~n~0 2)) (<= 0 main_~z~0))} is VALID [2022-04-07 17:27:02,185 INFO L272 TraceCheckUtils]: 13: Hoare triple {1084#(and (<= (mod main_~n~0 4294967296) 0) (<= (+ (* (div main_~n~0 4294967296) 8589934592) main_~z~0) (* main_~n~0 2)) (<= 0 main_~z~0))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {1088#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:27:02,185 INFO L290 TraceCheckUtils]: 14: Hoare triple {1088#(<= 1 |__VERIFIER_assert_#in~cond|)} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1092#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:27:02,191 INFO L290 TraceCheckUtils]: 15: Hoare triple {1092#(<= 1 __VERIFIER_assert_~cond)} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1033#false} is VALID [2022-04-07 17:27:02,191 INFO L290 TraceCheckUtils]: 16: Hoare triple {1033#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1033#false} is VALID [2022-04-07 17:27:02,191 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 17:27:02,191 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 17:27:13,930 WARN L833 $PredicateComparison]: unable to prove that (forall ((aux_mod_v_main_~z~0_30_31 Int) (v_main_~z~0_31 Int)) (or (let ((.cse0 (< 0 (mod c_main_~x~0 4294967296)))) (and (or (forall ((aux_div_v_main_~z~0_30_31 Int)) (not (= v_main_~z~0_31 (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31)))) .cse0) (or (forall ((aux_div_v_main_~x~0_25_31 Int) (aux_div_v_main_~z~0_30_31 Int)) (let ((.cse1 (* 4294967296 aux_div_v_main_~z~0_30_31))) (let ((.cse3 (+ v_main_~z~0_31 c_main_~x~0)) (.cse2 (+ .cse1 aux_mod_v_main_~z~0_30_31 (* aux_div_v_main_~x~0_25_31 4294967296)))) (or (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) c_main_~x~0) 4294967296))) (<= (+ v_main_~z~0_31 v_it_4 1) (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31)) (<= 1 v_it_4))) (not (< v_main_~z~0_31 (+ .cse1 aux_mod_v_main_~z~0_30_31))) (< .cse2 .cse3) (< .cse3 .cse2))))) (not .cse0)))) (= aux_mod_v_main_~z~0_30_31 (mod (* 2 c_main_~n~0) 4294967296)) (>= aux_mod_v_main_~z~0_30_31 4294967296) (> 0 aux_mod_v_main_~z~0_30_31) (let ((.cse4 (< 0 (mod c_main_~y~0 4294967296)))) (and (or .cse4 (not (= v_main_~z~0_31 c_main_~z~0))) (or (exists ((v_it_3 Int)) (and (not (< 0 (mod (+ (* v_it_3 4294967295) c_main_~y~0) 4294967296))) (<= 1 v_it_3) (<= (+ v_it_3 c_main_~z~0 1) v_main_~z~0_31))) (not .cse4) (not (< c_main_~z~0 v_main_~z~0_31))))))) is different from false [2022-04-07 17:27:19,886 WARN L855 $PredicateComparison]: unable to prove that (or (< 0 (mod c_main_~z~0 4294967296)) (forall ((aux_mod_v_main_~z~0_30_31 Int) (v_main_~z~0_31 Int)) (or (let ((.cse0 (< 0 (mod c_main_~x~0 4294967296)))) (and (or (forall ((aux_div_v_main_~z~0_30_31 Int)) (not (= v_main_~z~0_31 (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31)))) .cse0) (or (forall ((aux_div_v_main_~x~0_25_31 Int) (aux_div_v_main_~z~0_30_31 Int)) (let ((.cse1 (* 4294967296 aux_div_v_main_~z~0_30_31))) (let ((.cse3 (+ v_main_~z~0_31 c_main_~x~0)) (.cse2 (+ .cse1 aux_mod_v_main_~z~0_30_31 (* aux_div_v_main_~x~0_25_31 4294967296)))) (or (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) c_main_~x~0) 4294967296))) (<= (+ v_main_~z~0_31 v_it_4 1) (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31)) (<= 1 v_it_4))) (not (< v_main_~z~0_31 (+ .cse1 aux_mod_v_main_~z~0_30_31))) (< .cse2 .cse3) (< .cse3 .cse2))))) (not .cse0)))) (= aux_mod_v_main_~z~0_30_31 (mod (* 2 c_main_~n~0) 4294967296)) (>= aux_mod_v_main_~z~0_30_31 4294967296) (> 0 aux_mod_v_main_~z~0_30_31) (let ((.cse4 (< 0 (mod c_main_~y~0 4294967296)))) (and (or .cse4 (not (= v_main_~z~0_31 c_main_~z~0))) (or (exists ((v_it_3 Int)) (and (not (< 0 (mod (+ (* v_it_3 4294967295) c_main_~y~0) 4294967296))) (<= 1 v_it_3) (<= (+ v_it_3 c_main_~z~0 1) v_main_~z~0_31))) (not .cse4) (not (< c_main_~z~0 v_main_~z~0_31)))))))) is different from true [2022-04-07 17:27:26,501 INFO L290 TraceCheckUtils]: 16: Hoare triple {1033#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1033#false} is VALID [2022-04-07 17:27:26,501 INFO L290 TraceCheckUtils]: 15: Hoare triple {1092#(<= 1 __VERIFIER_assert_~cond)} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1033#false} is VALID [2022-04-07 17:27:26,502 INFO L290 TraceCheckUtils]: 14: Hoare triple {1088#(<= 1 |__VERIFIER_assert_#in~cond|)} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1092#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:27:26,502 INFO L272 TraceCheckUtils]: 13: Hoare triple {1108#(= (mod main_~z~0 4294967296) (mod (* main_~n~0 2) 4294967296))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {1088#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:27:26,503 INFO L290 TraceCheckUtils]: 12: Hoare triple {1112#(or (= (mod main_~z~0 4294967296) (mod (* main_~n~0 2) 4294967296)) (< 0 (mod main_~x~0 4294967296)))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1108#(= (mod main_~z~0 4294967296) (mod (* main_~n~0 2) 4294967296))} is VALID [2022-04-07 17:27:28,507 WARN L290 TraceCheckUtils]: 11: Hoare triple {1116#(forall ((aux_mod_v_main_~z~0_30_31 Int)) (or (>= aux_mod_v_main_~z~0_30_31 4294967296) (and (or (forall ((aux_div_v_main_~x~0_25_31 Int) (aux_div_v_main_~z~0_30_31 Int)) (or (< (+ main_~z~0 main_~x~0) (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31 (* aux_div_v_main_~x~0_25_31 4294967296))) (< (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31 (* aux_div_v_main_~x~0_25_31 4294967296)) (+ main_~z~0 main_~x~0)) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= (+ v_it_4 main_~z~0 1) (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31)) (<= 1 v_it_4))) (not (< main_~z~0 (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (forall ((aux_div_v_main_~z~0_30_31 Int)) (not (= (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31) main_~z~0))) (< 0 (mod main_~x~0 4294967296)))) (> 0 aux_mod_v_main_~z~0_30_31) (= aux_mod_v_main_~z~0_30_31 (mod (* main_~n~0 2) 4294967296))))} [93] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~z~0_5 v_main_~z~0_4) (= v_main_~x~0_7 v_main_~x~0_6)) (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (< v_main_~x~0_6 v_main_~x~0_7) (= v_main_~z~0_4 (+ (* (- 1) v_main_~x~0_6) v_main_~x~0_7 v_main_~z~0_5))))) InVars {main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {1112#(or (= (mod main_~z~0 4294967296) (mod (* main_~n~0 2) 4294967296)) (< 0 (mod main_~x~0 4294967296)))} is UNKNOWN [2022-04-07 17:27:28,509 INFO L290 TraceCheckUtils]: 10: Hoare triple {1116#(forall ((aux_mod_v_main_~z~0_30_31 Int)) (or (>= aux_mod_v_main_~z~0_30_31 4294967296) (and (or (forall ((aux_div_v_main_~x~0_25_31 Int) (aux_div_v_main_~z~0_30_31 Int)) (or (< (+ main_~z~0 main_~x~0) (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31 (* aux_div_v_main_~x~0_25_31 4294967296))) (< (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31 (* aux_div_v_main_~x~0_25_31 4294967296)) (+ main_~z~0 main_~x~0)) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= (+ v_it_4 main_~z~0 1) (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31)) (<= 1 v_it_4))) (not (< main_~z~0 (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (forall ((aux_div_v_main_~z~0_30_31 Int)) (not (= (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31) main_~z~0))) (< 0 (mod main_~x~0 4294967296)))) (> 0 aux_mod_v_main_~z~0_30_31) (= aux_mod_v_main_~z~0_30_31 (mod (* main_~n~0 2) 4294967296))))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1116#(forall ((aux_mod_v_main_~z~0_30_31 Int)) (or (>= aux_mod_v_main_~z~0_30_31 4294967296) (and (or (forall ((aux_div_v_main_~x~0_25_31 Int) (aux_div_v_main_~z~0_30_31 Int)) (or (< (+ main_~z~0 main_~x~0) (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31 (* aux_div_v_main_~x~0_25_31 4294967296))) (< (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31 (* aux_div_v_main_~x~0_25_31 4294967296)) (+ main_~z~0 main_~x~0)) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= (+ v_it_4 main_~z~0 1) (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31)) (<= 1 v_it_4))) (not (< main_~z~0 (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (forall ((aux_div_v_main_~z~0_30_31 Int)) (not (= (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31) main_~z~0))) (< 0 (mod main_~x~0 4294967296)))) (> 0 aux_mod_v_main_~z~0_30_31) (= aux_mod_v_main_~z~0_30_31 (mod (* main_~n~0 2) 4294967296))))} is VALID [2022-04-07 17:27:30,539 WARN L290 TraceCheckUtils]: 9: Hoare triple {1123#(forall ((aux_mod_v_main_~z~0_30_31 Int) (v_main_~z~0_31 Int)) (or (and (or (forall ((aux_div_v_main_~x~0_25_31 Int) (aux_div_v_main_~z~0_30_31 Int)) (or (not (< v_main_~z~0_31 (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31))) (< (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31 (* aux_div_v_main_~x~0_25_31 4294967296)) (+ v_main_~z~0_31 main_~x~0)) (< (+ v_main_~z~0_31 main_~x~0) (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31 (* aux_div_v_main_~x~0_25_31 4294967296))) (exists ((v_it_4 Int)) (and (<= (+ v_main_~z~0_31 v_it_4 1) (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31)) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (forall ((aux_div_v_main_~z~0_30_31 Int)) (not (= v_main_~z~0_31 (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31)))) (< 0 (mod main_~x~0 4294967296)))) (and (or (not (= v_main_~z~0_31 main_~z~0)) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (exists ((v_it_3 Int)) (and (<= (+ v_it_3 main_~z~0 1) v_main_~z~0_31) (<= 1 v_it_3) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296))))) (not (< main_~z~0 v_main_~z~0_31)))) (>= aux_mod_v_main_~z~0_30_31 4294967296) (> 0 aux_mod_v_main_~z~0_30_31) (= aux_mod_v_main_~z~0_30_31 (mod (* main_~n~0 2) 4294967296))))} [90] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (= (+ (* (- 1) v_main_~y~0_3) v_main_~y~0_4 v_main_~z~0_3) v_main_~z~0_2) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1116#(forall ((aux_mod_v_main_~z~0_30_31 Int)) (or (>= aux_mod_v_main_~z~0_30_31 4294967296) (and (or (forall ((aux_div_v_main_~x~0_25_31 Int) (aux_div_v_main_~z~0_30_31 Int)) (or (< (+ main_~z~0 main_~x~0) (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31 (* aux_div_v_main_~x~0_25_31 4294967296))) (< (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31 (* aux_div_v_main_~x~0_25_31 4294967296)) (+ main_~z~0 main_~x~0)) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= (+ v_it_4 main_~z~0 1) (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31)) (<= 1 v_it_4))) (not (< main_~z~0 (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (forall ((aux_div_v_main_~z~0_30_31 Int)) (not (= (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31) main_~z~0))) (< 0 (mod main_~x~0 4294967296)))) (> 0 aux_mod_v_main_~z~0_30_31) (= aux_mod_v_main_~z~0_30_31 (mod (* main_~n~0 2) 4294967296))))} is UNKNOWN [2022-04-07 17:27:32,551 WARN L290 TraceCheckUtils]: 8: Hoare triple {1127#(or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_mod_v_main_~z~0_30_31 Int) (v_main_~z~0_31 Int)) (or (and (or (forall ((aux_div_v_main_~x~0_25_31 Int) (aux_div_v_main_~z~0_30_31 Int)) (or (not (< v_main_~z~0_31 (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31))) (< (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31 (* aux_div_v_main_~x~0_25_31 4294967296)) (+ v_main_~z~0_31 main_~x~0)) (< (+ v_main_~z~0_31 main_~x~0) (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31 (* aux_div_v_main_~x~0_25_31 4294967296))) (exists ((v_it_4 Int)) (and (<= (+ v_main_~z~0_31 v_it_4 1) (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31)) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (forall ((aux_div_v_main_~z~0_30_31 Int)) (not (= v_main_~z~0_31 (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31)))) (< 0 (mod main_~x~0 4294967296)))) (and (or (not (= v_main_~z~0_31 main_~z~0)) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (exists ((v_it_3 Int)) (and (<= (+ v_it_3 main_~z~0 1) v_main_~z~0_31) (<= 1 v_it_3) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296))))) (not (< main_~z~0 v_main_~z~0_31)))) (>= aux_mod_v_main_~z~0_30_31 4294967296) (> 0 aux_mod_v_main_~z~0_30_31) (= aux_mod_v_main_~z~0_30_31 (mod (* main_~n~0 2) 4294967296)))))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {1123#(forall ((aux_mod_v_main_~z~0_30_31 Int) (v_main_~z~0_31 Int)) (or (and (or (forall ((aux_div_v_main_~x~0_25_31 Int) (aux_div_v_main_~z~0_30_31 Int)) (or (not (< v_main_~z~0_31 (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31))) (< (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31 (* aux_div_v_main_~x~0_25_31 4294967296)) (+ v_main_~z~0_31 main_~x~0)) (< (+ v_main_~z~0_31 main_~x~0) (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31 (* aux_div_v_main_~x~0_25_31 4294967296))) (exists ((v_it_4 Int)) (and (<= (+ v_main_~z~0_31 v_it_4 1) (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31)) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (forall ((aux_div_v_main_~z~0_30_31 Int)) (not (= v_main_~z~0_31 (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31)))) (< 0 (mod main_~x~0 4294967296)))) (and (or (not (= v_main_~z~0_31 main_~z~0)) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (exists ((v_it_3 Int)) (and (<= (+ v_it_3 main_~z~0 1) v_main_~z~0_31) (<= 1 v_it_3) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296))))) (not (< main_~z~0 v_main_~z~0_31)))) (>= aux_mod_v_main_~z~0_30_31 4294967296) (> 0 aux_mod_v_main_~z~0_30_31) (= aux_mod_v_main_~z~0_30_31 (mod (* main_~n~0 2) 4294967296))))} is UNKNOWN [2022-04-07 17:27:34,571 WARN L290 TraceCheckUtils]: 7: Hoare triple {1131#(or (forall ((aux_mod_v_main_~z~0_30_31 Int)) (or (>= aux_mod_v_main_~z~0_30_31 4294967296) (and (or (not (< 0 (mod main_~x~0 4294967296))) (forall ((aux_div_v_main_~x~0_25_31 Int) (aux_div_v_main_~z~0_30_31 Int)) (or (< (+ main_~y~0 main_~x~0) (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31 (* aux_div_v_main_~x~0_25_31 4294967296))) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4) (<= (+ v_it_4 main_~y~0 1) (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31)))) (not (< main_~y~0 (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31))) (< (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31 (* aux_div_v_main_~x~0_25_31 4294967296)) (+ main_~y~0 main_~x~0))))) (or (forall ((aux_div_v_main_~z~0_30_31 Int)) (not (= (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31) main_~y~0))) (< 0 (mod main_~x~0 4294967296)))) (> 0 aux_mod_v_main_~z~0_30_31) (= aux_mod_v_main_~z~0_30_31 (mod (* main_~n~0 2) 4294967296)))) (< 0 (mod main_~y~0 4294967296)))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {1127#(or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_mod_v_main_~z~0_30_31 Int) (v_main_~z~0_31 Int)) (or (and (or (forall ((aux_div_v_main_~x~0_25_31 Int) (aux_div_v_main_~z~0_30_31 Int)) (or (not (< v_main_~z~0_31 (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31))) (< (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31 (* aux_div_v_main_~x~0_25_31 4294967296)) (+ v_main_~z~0_31 main_~x~0)) (< (+ v_main_~z~0_31 main_~x~0) (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31 (* aux_div_v_main_~x~0_25_31 4294967296))) (exists ((v_it_4 Int)) (and (<= (+ v_main_~z~0_31 v_it_4 1) (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31)) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (forall ((aux_div_v_main_~z~0_30_31 Int)) (not (= v_main_~z~0_31 (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31)))) (< 0 (mod main_~x~0 4294967296)))) (and (or (not (= v_main_~z~0_31 main_~z~0)) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (exists ((v_it_3 Int)) (and (<= (+ v_it_3 main_~z~0 1) v_main_~z~0_31) (<= 1 v_it_3) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296))))) (not (< main_~z~0 v_main_~z~0_31)))) (>= aux_mod_v_main_~z~0_30_31 4294967296) (> 0 aux_mod_v_main_~z~0_30_31) (= aux_mod_v_main_~z~0_30_31 (mod (* main_~n~0 2) 4294967296)))))} is UNKNOWN [2022-04-07 17:27:34,577 INFO L290 TraceCheckUtils]: 6: Hoare triple {1135#(or (<= (div (+ (- 1) (* (- 1) main_~y~0)) (- 4294967296)) (div (+ (- 1) (mod (* main_~n~0 2) 4294967296) (* (- 1) main_~y~0)) (- 4294967296))) (< 0 (mod main_~x~0 4294967296)) (< 0 (mod main_~y~0 4294967296)))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1131#(or (forall ((aux_mod_v_main_~z~0_30_31 Int)) (or (>= aux_mod_v_main_~z~0_30_31 4294967296) (and (or (not (< 0 (mod main_~x~0 4294967296))) (forall ((aux_div_v_main_~x~0_25_31 Int) (aux_div_v_main_~z~0_30_31 Int)) (or (< (+ main_~y~0 main_~x~0) (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31 (* aux_div_v_main_~x~0_25_31 4294967296))) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4) (<= (+ v_it_4 main_~y~0 1) (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31)))) (not (< main_~y~0 (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31))) (< (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31 (* aux_div_v_main_~x~0_25_31 4294967296)) (+ main_~y~0 main_~x~0))))) (or (forall ((aux_div_v_main_~z~0_30_31 Int)) (not (= (+ (* 4294967296 aux_div_v_main_~z~0_30_31) aux_mod_v_main_~z~0_30_31) main_~y~0))) (< 0 (mod main_~x~0 4294967296)))) (> 0 aux_mod_v_main_~z~0_30_31) (= aux_mod_v_main_~z~0_30_31 (mod (* main_~n~0 2) 4294967296)))) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-07 17:27:34,578 INFO L290 TraceCheckUtils]: 5: Hoare triple {1032#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1135#(or (<= (div (+ (- 1) (* (- 1) main_~y~0)) (- 4294967296)) (div (+ (- 1) (mod (* main_~n~0 2) 4294967296) (* (- 1) main_~y~0)) (- 4294967296))) (< 0 (mod main_~x~0 4294967296)) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-07 17:27:34,578 INFO L272 TraceCheckUtils]: 4: Hoare triple {1032#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1032#true} is VALID [2022-04-07 17:27:34,578 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1032#true} {1032#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1032#true} is VALID [2022-04-07 17:27:34,578 INFO L290 TraceCheckUtils]: 2: Hoare triple {1032#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1032#true} is VALID [2022-04-07 17:27:34,578 INFO L290 TraceCheckUtils]: 1: Hoare triple {1032#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1032#true} is VALID [2022-04-07 17:27:34,579 INFO L272 TraceCheckUtils]: 0: Hoare triple {1032#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1032#true} is VALID [2022-04-07 17:27:34,579 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 1 not checked. [2022-04-07 17:27:34,579 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [510463116] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 17:27:34,579 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 17:27:34,579 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9, 11] total 20 [2022-04-07 17:27:34,579 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1040976828] [2022-04-07 17:27:34,579 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 17:27:34,580 INFO L78 Accepts]: Start accepts. Automaton has has 20 states, 18 states have (on average 1.4444444444444444) internal successors, (26), 17 states have internal predecessors, (26), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-07 17:27:34,580 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:27:34,580 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 20 states, 18 states have (on average 1.4444444444444444) internal successors, (26), 17 states have internal predecessors, (26), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:27:44,776 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 33 edges. 28 inductive. 0 not inductive. 5 times theorem prover too weak to decide inductivity. [2022-04-07 17:27:44,776 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 20 states [2022-04-07 17:27:44,776 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:27:44,777 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2022-04-07 17:27:44,777 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=69, Invalid=240, Unknown=5, NotChecked=66, Total=380 [2022-04-07 17:27:44,777 INFO L87 Difference]: Start difference. First operand 26 states and 35 transitions. Second operand has 20 states, 18 states have (on average 1.4444444444444444) internal successors, (26), 17 states have internal predecessors, (26), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:27:48,139 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:27:48,139 INFO L93 Difference]: Finished difference Result 34 states and 46 transitions. [2022-04-07 17:27:48,140 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-04-07 17:27:48,140 INFO L78 Accepts]: Start accepts. Automaton has has 20 states, 18 states have (on average 1.4444444444444444) internal successors, (26), 17 states have internal predecessors, (26), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-07 17:27:48,140 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:27:48,140 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 18 states have (on average 1.4444444444444444) internal successors, (26), 17 states have internal predecessors, (26), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:27:48,141 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 37 transitions. [2022-04-07 17:27:48,141 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 18 states have (on average 1.4444444444444444) internal successors, (26), 17 states have internal predecessors, (26), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:27:48,142 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 37 transitions. [2022-04-07 17:27:48,142 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 11 states and 37 transitions. [2022-04-07 17:27:48,253 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 37 edges. 37 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:27:48,254 INFO L225 Difference]: With dead ends: 34 [2022-04-07 17:27:48,254 INFO L226 Difference]: Without dead ends: 29 [2022-04-07 17:27:48,254 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 20 SyntacticMatches, 7 SemanticMatches, 24 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 123 ImplicationChecksByTransitivity, 15.8s TimeCoverageRelationStatistics Valid=123, Invalid=432, Unknown=5, NotChecked=90, Total=650 [2022-04-07 17:27:48,255 INFO L913 BasicCegarLoop]: 11 mSDtfsCounter, 22 mSDsluCounter, 53 mSDsCounter, 0 mSdLazyCounter, 70 mSolverCounterSat, 12 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 22 SdHoareTripleChecker+Valid, 64 SdHoareTripleChecker+Invalid, 128 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 12 IncrementalHoareTripleChecker+Valid, 70 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 46 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 17:27:48,255 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [22 Valid, 64 Invalid, 128 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [12 Valid, 70 Invalid, 0 Unknown, 46 Unchecked, 0.1s Time] [2022-04-07 17:27:48,255 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states. [2022-04-07 17:27:48,256 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 27. [2022-04-07 17:27:48,256 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:27:48,256 INFO L82 GeneralOperation]: Start isEquivalent. First operand 29 states. Second operand has 27 states, 22 states have (on average 1.4545454545454546) internal successors, (32), 22 states have internal predecessors, (32), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:27:48,256 INFO L74 IsIncluded]: Start isIncluded. First operand 29 states. Second operand has 27 states, 22 states have (on average 1.4545454545454546) internal successors, (32), 22 states have internal predecessors, (32), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:27:48,257 INFO L87 Difference]: Start difference. First operand 29 states. Second operand has 27 states, 22 states have (on average 1.4545454545454546) internal successors, (32), 22 states have internal predecessors, (32), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:27:48,257 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:27:48,257 INFO L93 Difference]: Finished difference Result 29 states and 40 transitions. [2022-04-07 17:27:48,257 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 40 transitions. [2022-04-07 17:27:48,258 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:27:48,258 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:27:48,258 INFO L74 IsIncluded]: Start isIncluded. First operand has 27 states, 22 states have (on average 1.4545454545454546) internal successors, (32), 22 states have internal predecessors, (32), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 29 states. [2022-04-07 17:27:48,258 INFO L87 Difference]: Start difference. First operand has 27 states, 22 states have (on average 1.4545454545454546) internal successors, (32), 22 states have internal predecessors, (32), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 29 states. [2022-04-07 17:27:48,259 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:27:48,259 INFO L93 Difference]: Finished difference Result 29 states and 40 transitions. [2022-04-07 17:27:48,259 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 40 transitions. [2022-04-07 17:27:48,259 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:27:48,259 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:27:48,259 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:27:48,259 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:27:48,259 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27 states, 22 states have (on average 1.4545454545454546) internal successors, (32), 22 states have internal predecessors, (32), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:27:48,260 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 36 transitions. [2022-04-07 17:27:48,260 INFO L78 Accepts]: Start accepts. Automaton has 27 states and 36 transitions. Word has length 17 [2022-04-07 17:27:48,260 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:27:48,260 INFO L478 AbstractCegarLoop]: Abstraction has 27 states and 36 transitions. [2022-04-07 17:27:48,260 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 20 states, 18 states have (on average 1.4444444444444444) internal successors, (26), 17 states have internal predecessors, (26), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:27:48,260 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 36 transitions. [2022-04-07 17:27:48,261 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-04-07 17:27:48,261 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:27:48,262 INFO L499 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:27:48,279 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2022-04-07 17:27:48,462 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6,6 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:27:48,462 INFO L403 AbstractCegarLoop]: === Iteration 8 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:27:48,463 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:27:48,463 INFO L85 PathProgramCache]: Analyzing trace with hash -968283874, now seen corresponding path program 2 times [2022-04-07 17:27:48,463 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:27:48,463 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [241211729] [2022-04-07 17:27:48,463 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:27:48,463 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:27:48,471 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.0))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-07 17:27:48,471 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.1))) (+ main_~y~0_9 .cse0 (* (- 4294967296) (div (+ main_~y~0_9 .cse0) 4294967296)))) 0)) [2022-04-07 17:27:48,478 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:27:48,507 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.2))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-07 17:27:48,510 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.3))) (+ main_~y~0_9 .cse0 (* (- 4294967296) (div (+ main_~y~0_9 .cse0) 4294967296)))) 0)) [2022-04-07 17:27:48,754 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:27:48,755 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:27:48,758 INFO L290 TraceCheckUtils]: 0: Hoare triple {1300#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1288#true} is VALID [2022-04-07 17:27:48,758 INFO L290 TraceCheckUtils]: 1: Hoare triple {1288#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1288#true} is VALID [2022-04-07 17:27:48,758 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1288#true} {1288#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1288#true} is VALID [2022-04-07 17:27:48,759 INFO L272 TraceCheckUtils]: 0: Hoare triple {1288#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1300#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:27:48,759 INFO L290 TraceCheckUtils]: 1: Hoare triple {1300#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1288#true} is VALID [2022-04-07 17:27:48,759 INFO L290 TraceCheckUtils]: 2: Hoare triple {1288#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1288#true} is VALID [2022-04-07 17:27:48,759 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1288#true} {1288#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1288#true} is VALID [2022-04-07 17:27:48,759 INFO L272 TraceCheckUtils]: 4: Hoare triple {1288#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1288#true} is VALID [2022-04-07 17:27:48,760 INFO L290 TraceCheckUtils]: 5: Hoare triple {1288#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1293#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 17:27:48,760 INFO L290 TraceCheckUtils]: 6: Hoare triple {1293#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1294#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:27:48,761 INFO L290 TraceCheckUtils]: 7: Hoare triple {1294#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {1295#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:27:48,761 INFO L290 TraceCheckUtils]: 8: Hoare triple {1295#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {1295#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:27:48,762 INFO L290 TraceCheckUtils]: 9: Hoare triple {1295#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [90] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (= (+ (* (- 1) v_main_~y~0_3) v_main_~y~0_4 v_main_~z~0_3) v_main_~z~0_2) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1295#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:27:48,782 INFO L290 TraceCheckUtils]: 10: Hoare triple {1295#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [90] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (= (+ (* (- 1) v_main_~y~0_3) v_main_~y~0_4 v_main_~z~0_3) v_main_~z~0_2) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1296#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= 0 main_~z~0) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:27:48,783 INFO L290 TraceCheckUtils]: 11: Hoare triple {1296#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= 0 main_~z~0) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1296#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= 0 main_~z~0) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:27:48,784 INFO L290 TraceCheckUtils]: 12: Hoare triple {1296#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= 0 main_~z~0) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1297#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= 0 main_~z~0) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:27:48,786 INFO L272 TraceCheckUtils]: 13: Hoare triple {1297#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= 0 main_~z~0) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {1298#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:27:48,786 INFO L290 TraceCheckUtils]: 14: Hoare triple {1298#(not (= |__VERIFIER_assert_#in~cond| 0))} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1299#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:27:48,787 INFO L290 TraceCheckUtils]: 15: Hoare triple {1299#(not (= __VERIFIER_assert_~cond 0))} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1289#false} is VALID [2022-04-07 17:27:48,787 INFO L290 TraceCheckUtils]: 16: Hoare triple {1289#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1289#false} is VALID [2022-04-07 17:27:48,787 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 17:27:48,787 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:27:48,787 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [241211729] [2022-04-07 17:27:48,787 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [241211729] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:27:48,787 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1589960162] [2022-04-07 17:27:48,787 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-07 17:27:48,787 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:27:48,787 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:27:48,788 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:27:48,789 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-04-07 17:27:48,821 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-07 17:27:48,822 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 17:27:48,822 INFO L263 TraceCheckSpWp]: Trace formula consists of 62 conjuncts, 13 conjunts are in the unsatisfiable core [2022-04-07 17:27:48,833 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:27:48,834 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:27:49,173 INFO L272 TraceCheckUtils]: 0: Hoare triple {1288#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1288#true} is VALID [2022-04-07 17:27:49,173 INFO L290 TraceCheckUtils]: 1: Hoare triple {1288#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1288#true} is VALID [2022-04-07 17:27:49,173 INFO L290 TraceCheckUtils]: 2: Hoare triple {1288#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1288#true} is VALID [2022-04-07 17:27:49,173 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1288#true} {1288#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1288#true} is VALID [2022-04-07 17:27:49,173 INFO L272 TraceCheckUtils]: 4: Hoare triple {1288#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1288#true} is VALID [2022-04-07 17:27:49,174 INFO L290 TraceCheckUtils]: 5: Hoare triple {1288#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1293#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 17:27:49,174 INFO L290 TraceCheckUtils]: 6: Hoare triple {1293#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1322#(and (not (< 0 (mod main_~n~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:27:49,175 INFO L290 TraceCheckUtils]: 7: Hoare triple {1322#(and (not (< 0 (mod main_~n~0 4294967296))) (= main_~y~0 0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {1326#(and (= main_~z~0 main_~y~0) (not (< 0 (mod main_~n~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:27:49,175 INFO L290 TraceCheckUtils]: 8: Hoare triple {1326#(and (= main_~z~0 main_~y~0) (not (< 0 (mod main_~n~0 4294967296))) (= main_~y~0 0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {1326#(and (= main_~z~0 main_~y~0) (not (< 0 (mod main_~n~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:27:49,176 INFO L290 TraceCheckUtils]: 9: Hoare triple {1326#(and (= main_~z~0 main_~y~0) (not (< 0 (mod main_~n~0 4294967296))) (= main_~y~0 0))} [90] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (= (+ (* (- 1) v_main_~y~0_3) v_main_~y~0_4 v_main_~z~0_3) v_main_~z~0_2) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1326#(and (= main_~z~0 main_~y~0) (not (< 0 (mod main_~n~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:27:49,176 INFO L290 TraceCheckUtils]: 10: Hoare triple {1326#(and (= main_~z~0 main_~y~0) (not (< 0 (mod main_~n~0 4294967296))) (= main_~y~0 0))} [90] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (= (+ (* (- 1) v_main_~y~0_3) v_main_~y~0_4 v_main_~z~0_3) v_main_~z~0_2) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1336#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-07 17:27:49,177 INFO L290 TraceCheckUtils]: 11: Hoare triple {1336#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1336#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-07 17:27:49,177 INFO L290 TraceCheckUtils]: 12: Hoare triple {1336#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1336#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-07 17:27:49,178 INFO L272 TraceCheckUtils]: 13: Hoare triple {1336#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {1346#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:27:49,178 INFO L290 TraceCheckUtils]: 14: Hoare triple {1346#(<= 1 |__VERIFIER_assert_#in~cond|)} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1350#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:27:49,179 INFO L290 TraceCheckUtils]: 15: Hoare triple {1350#(<= 1 __VERIFIER_assert_~cond)} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1289#false} is VALID [2022-04-07 17:27:49,179 INFO L290 TraceCheckUtils]: 16: Hoare triple {1289#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1289#false} is VALID [2022-04-07 17:27:49,179 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 17:27:49,179 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 17:28:45,460 INFO L290 TraceCheckUtils]: 16: Hoare triple {1289#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1289#false} is VALID [2022-04-07 17:28:45,460 INFO L290 TraceCheckUtils]: 15: Hoare triple {1350#(<= 1 __VERIFIER_assert_~cond)} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1289#false} is VALID [2022-04-07 17:28:45,460 INFO L290 TraceCheckUtils]: 14: Hoare triple {1346#(<= 1 |__VERIFIER_assert_#in~cond|)} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1350#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:28:45,461 INFO L272 TraceCheckUtils]: 13: Hoare triple {1366#(= (mod main_~z~0 4294967296) (mod (* main_~n~0 2) 4294967296))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {1346#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:28:45,461 INFO L290 TraceCheckUtils]: 12: Hoare triple {1366#(= (mod main_~z~0 4294967296) (mod (* main_~n~0 2) 4294967296))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1366#(= (mod main_~z~0 4294967296) (mod (* main_~n~0 2) 4294967296))} is VALID [2022-04-07 17:28:45,462 INFO L290 TraceCheckUtils]: 11: Hoare triple {1366#(= (mod main_~z~0 4294967296) (mod (* main_~n~0 2) 4294967296))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1366#(= (mod main_~z~0 4294967296) (mod (* main_~n~0 2) 4294967296))} is VALID [2022-04-07 17:28:47,492 WARN L290 TraceCheckUtils]: 10: Hoare triple {1376#(forall ((aux_mod_v_main_~z~0_36_31 Int)) (or (>= aux_mod_v_main_~z~0_36_31 4294967296) (= aux_mod_v_main_~z~0_36_31 (mod (* main_~n~0 2) 4294967296)) (and (or (forall ((aux_div_v_main_~z~0_36_31 Int)) (not (= (+ (* 4294967296 aux_div_v_main_~z~0_36_31) aux_mod_v_main_~z~0_36_31) main_~z~0))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_36_31 Int)) (or (exists ((v_it_3 Int)) (and (<= 1 v_it_3) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296))) (<= (+ v_it_3 main_~z~0 1) (+ (* 4294967296 aux_div_v_main_~z~0_36_31) aux_mod_v_main_~z~0_36_31)))) (not (< main_~z~0 (+ (* 4294967296 aux_div_v_main_~z~0_36_31) aux_mod_v_main_~z~0_36_31))))))) (> 0 aux_mod_v_main_~z~0_36_31)))} [90] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (= (+ (* (- 1) v_main_~y~0_3) v_main_~y~0_4 v_main_~z~0_3) v_main_~z~0_2) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1366#(= (mod main_~z~0 4294967296) (mod (* main_~n~0 2) 4294967296))} is UNKNOWN [2022-04-07 17:28:49,506 WARN L290 TraceCheckUtils]: 9: Hoare triple {1380#(forall ((aux_mod_v_main_~z~0_36_31 Int)) (or (>= aux_mod_v_main_~z~0_36_31 4294967296) (= aux_mod_v_main_~z~0_36_31 (mod (* main_~n~0 2) 4294967296)) (and (or (forall ((aux_div_v_main_~z~0_36_31 Int)) (not (= (+ (* 4294967296 aux_div_v_main_~z~0_36_31) aux_mod_v_main_~z~0_36_31) main_~z~0))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((v_main_~z~0_37 Int)) (or (and (or (not (< 0 (mod (+ main_~z~0 main_~y~0 (* v_main_~z~0_37 4294967295)) 4294967296))) (forall ((aux_div_v_main_~z~0_36_31 Int)) (or (not (< v_main_~z~0_37 (+ (* 4294967296 aux_div_v_main_~z~0_36_31) aux_mod_v_main_~z~0_36_31))) (exists ((v_it_3 Int)) (and (<= 1 v_it_3) (<= (+ v_main_~z~0_37 v_it_3 1) (+ (* 4294967296 aux_div_v_main_~z~0_36_31) aux_mod_v_main_~z~0_36_31)) (not (< 0 (mod (+ main_~z~0 main_~y~0 (* v_it_3 4294967295) (* v_main_~z~0_37 4294967295)) 4294967296)))))))) (or (forall ((aux_div_v_main_~z~0_36_31 Int)) (not (= (+ (* 4294967296 aux_div_v_main_~z~0_36_31) aux_mod_v_main_~z~0_36_31) v_main_~z~0_37))) (< 0 (mod (+ main_~z~0 main_~y~0 (* v_main_~z~0_37 4294967295)) 4294967296)))) (exists ((v_it_3 Int)) (and (<= 1 v_it_3) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296))) (<= (+ v_it_3 main_~z~0 1) v_main_~z~0_37))) (not (< main_~z~0 v_main_~z~0_37)))))) (> 0 aux_mod_v_main_~z~0_36_31)))} [90] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (= (+ (* (- 1) v_main_~y~0_3) v_main_~y~0_4 v_main_~z~0_3) v_main_~z~0_2) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1376#(forall ((aux_mod_v_main_~z~0_36_31 Int)) (or (>= aux_mod_v_main_~z~0_36_31 4294967296) (= aux_mod_v_main_~z~0_36_31 (mod (* main_~n~0 2) 4294967296)) (and (or (forall ((aux_div_v_main_~z~0_36_31 Int)) (not (= (+ (* 4294967296 aux_div_v_main_~z~0_36_31) aux_mod_v_main_~z~0_36_31) main_~z~0))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_36_31 Int)) (or (exists ((v_it_3 Int)) (and (<= 1 v_it_3) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296))) (<= (+ v_it_3 main_~z~0 1) (+ (* 4294967296 aux_div_v_main_~z~0_36_31) aux_mod_v_main_~z~0_36_31)))) (not (< main_~z~0 (+ (* 4294967296 aux_div_v_main_~z~0_36_31) aux_mod_v_main_~z~0_36_31))))))) (> 0 aux_mod_v_main_~z~0_36_31)))} is UNKNOWN [2022-04-07 17:28:51,518 WARN L290 TraceCheckUtils]: 8: Hoare triple {1384#(or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_mod_v_main_~z~0_36_31 Int)) (or (>= aux_mod_v_main_~z~0_36_31 4294967296) (= aux_mod_v_main_~z~0_36_31 (mod (* main_~n~0 2) 4294967296)) (and (or (forall ((aux_div_v_main_~z~0_36_31 Int)) (not (= (+ (* 4294967296 aux_div_v_main_~z~0_36_31) aux_mod_v_main_~z~0_36_31) main_~z~0))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((v_main_~z~0_37 Int)) (or (and (or (not (< 0 (mod (+ main_~z~0 main_~y~0 (* v_main_~z~0_37 4294967295)) 4294967296))) (forall ((aux_div_v_main_~z~0_36_31 Int)) (or (not (< v_main_~z~0_37 (+ (* 4294967296 aux_div_v_main_~z~0_36_31) aux_mod_v_main_~z~0_36_31))) (exists ((v_it_3 Int)) (and (<= 1 v_it_3) (<= (+ v_main_~z~0_37 v_it_3 1) (+ (* 4294967296 aux_div_v_main_~z~0_36_31) aux_mod_v_main_~z~0_36_31)) (not (< 0 (mod (+ main_~z~0 main_~y~0 (* v_it_3 4294967295) (* v_main_~z~0_37 4294967295)) 4294967296)))))))) (or (forall ((aux_div_v_main_~z~0_36_31 Int)) (not (= (+ (* 4294967296 aux_div_v_main_~z~0_36_31) aux_mod_v_main_~z~0_36_31) v_main_~z~0_37))) (< 0 (mod (+ main_~z~0 main_~y~0 (* v_main_~z~0_37 4294967295)) 4294967296)))) (exists ((v_it_3 Int)) (and (<= 1 v_it_3) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296))) (<= (+ v_it_3 main_~z~0 1) v_main_~z~0_37))) (not (< main_~z~0 v_main_~z~0_37)))))) (> 0 aux_mod_v_main_~z~0_36_31))))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {1380#(forall ((aux_mod_v_main_~z~0_36_31 Int)) (or (>= aux_mod_v_main_~z~0_36_31 4294967296) (= aux_mod_v_main_~z~0_36_31 (mod (* main_~n~0 2) 4294967296)) (and (or (forall ((aux_div_v_main_~z~0_36_31 Int)) (not (= (+ (* 4294967296 aux_div_v_main_~z~0_36_31) aux_mod_v_main_~z~0_36_31) main_~z~0))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((v_main_~z~0_37 Int)) (or (and (or (not (< 0 (mod (+ main_~z~0 main_~y~0 (* v_main_~z~0_37 4294967295)) 4294967296))) (forall ((aux_div_v_main_~z~0_36_31 Int)) (or (not (< v_main_~z~0_37 (+ (* 4294967296 aux_div_v_main_~z~0_36_31) aux_mod_v_main_~z~0_36_31))) (exists ((v_it_3 Int)) (and (<= 1 v_it_3) (<= (+ v_main_~z~0_37 v_it_3 1) (+ (* 4294967296 aux_div_v_main_~z~0_36_31) aux_mod_v_main_~z~0_36_31)) (not (< 0 (mod (+ main_~z~0 main_~y~0 (* v_it_3 4294967295) (* v_main_~z~0_37 4294967295)) 4294967296)))))))) (or (forall ((aux_div_v_main_~z~0_36_31 Int)) (not (= (+ (* 4294967296 aux_div_v_main_~z~0_36_31) aux_mod_v_main_~z~0_36_31) v_main_~z~0_37))) (< 0 (mod (+ main_~z~0 main_~y~0 (* v_main_~z~0_37 4294967295)) 4294967296)))) (exists ((v_it_3 Int)) (and (<= 1 v_it_3) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296))) (<= (+ v_it_3 main_~z~0 1) v_main_~z~0_37))) (not (< main_~z~0 v_main_~z~0_37)))))) (> 0 aux_mod_v_main_~z~0_36_31)))} is UNKNOWN [2022-04-07 17:28:51,526 INFO L290 TraceCheckUtils]: 7: Hoare triple {1388#(or (<= (div (+ (- 1) (* (- 1) main_~y~0)) (- 4294967296)) (div (+ (- 1) (mod (* main_~n~0 2) 4294967296) (* (- 1) main_~y~0)) (- 4294967296))) (< 0 (mod main_~y~0 4294967296)))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {1384#(or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_mod_v_main_~z~0_36_31 Int)) (or (>= aux_mod_v_main_~z~0_36_31 4294967296) (= aux_mod_v_main_~z~0_36_31 (mod (* main_~n~0 2) 4294967296)) (and (or (forall ((aux_div_v_main_~z~0_36_31 Int)) (not (= (+ (* 4294967296 aux_div_v_main_~z~0_36_31) aux_mod_v_main_~z~0_36_31) main_~z~0))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((v_main_~z~0_37 Int)) (or (and (or (not (< 0 (mod (+ main_~z~0 main_~y~0 (* v_main_~z~0_37 4294967295)) 4294967296))) (forall ((aux_div_v_main_~z~0_36_31 Int)) (or (not (< v_main_~z~0_37 (+ (* 4294967296 aux_div_v_main_~z~0_36_31) aux_mod_v_main_~z~0_36_31))) (exists ((v_it_3 Int)) (and (<= 1 v_it_3) (<= (+ v_main_~z~0_37 v_it_3 1) (+ (* 4294967296 aux_div_v_main_~z~0_36_31) aux_mod_v_main_~z~0_36_31)) (not (< 0 (mod (+ main_~z~0 main_~y~0 (* v_it_3 4294967295) (* v_main_~z~0_37 4294967295)) 4294967296)))))))) (or (forall ((aux_div_v_main_~z~0_36_31 Int)) (not (= (+ (* 4294967296 aux_div_v_main_~z~0_36_31) aux_mod_v_main_~z~0_36_31) v_main_~z~0_37))) (< 0 (mod (+ main_~z~0 main_~y~0 (* v_main_~z~0_37 4294967295)) 4294967296)))) (exists ((v_it_3 Int)) (and (<= 1 v_it_3) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296))) (<= (+ v_it_3 main_~z~0 1) v_main_~z~0_37))) (not (< main_~z~0 v_main_~z~0_37)))))) (> 0 aux_mod_v_main_~z~0_36_31))))} is VALID [2022-04-07 17:28:51,526 INFO L290 TraceCheckUtils]: 6: Hoare triple {1392#(or (<= (div (+ (- 1) (* (- 1) main_~y~0)) (- 4294967296)) (div (+ (- 1) (mod (* main_~n~0 2) 4294967296) (* (- 1) main_~y~0)) (- 4294967296))) (< 0 (mod main_~x~0 4294967296)) (< 0 (mod main_~y~0 4294967296)))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1388#(or (<= (div (+ (- 1) (* (- 1) main_~y~0)) (- 4294967296)) (div (+ (- 1) (mod (* main_~n~0 2) 4294967296) (* (- 1) main_~y~0)) (- 4294967296))) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-07 17:28:51,528 INFO L290 TraceCheckUtils]: 5: Hoare triple {1288#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1392#(or (<= (div (+ (- 1) (* (- 1) main_~y~0)) (- 4294967296)) (div (+ (- 1) (mod (* main_~n~0 2) 4294967296) (* (- 1) main_~y~0)) (- 4294967296))) (< 0 (mod main_~x~0 4294967296)) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-07 17:28:51,528 INFO L272 TraceCheckUtils]: 4: Hoare triple {1288#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1288#true} is VALID [2022-04-07 17:28:51,528 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1288#true} {1288#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1288#true} is VALID [2022-04-07 17:28:51,528 INFO L290 TraceCheckUtils]: 2: Hoare triple {1288#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1288#true} is VALID [2022-04-07 17:28:51,528 INFO L290 TraceCheckUtils]: 1: Hoare triple {1288#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1288#true} is VALID [2022-04-07 17:28:51,528 INFO L272 TraceCheckUtils]: 0: Hoare triple {1288#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1288#true} is VALID [2022-04-07 17:28:51,528 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 2 refuted. 1 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:28:51,529 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1589960162] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 17:28:51,529 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 17:28:51,529 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 8, 10] total 21 [2022-04-07 17:28:51,529 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [492828018] [2022-04-07 17:28:51,529 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 17:28:51,529 INFO L78 Accepts]: Start accepts. Automaton has has 21 states, 20 states have (on average 1.55) internal successors, (31), 18 states have internal predecessors, (31), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-07 17:28:51,530 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:28:51,530 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 21 states, 20 states have (on average 1.55) internal successors, (31), 18 states have internal predecessors, (31), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:28:57,649 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 38 edges. 35 inductive. 0 not inductive. 3 times theorem prover too weak to decide inductivity. [2022-04-07 17:28:57,649 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 21 states [2022-04-07 17:28:57,649 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:28:57,650 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2022-04-07 17:28:57,650 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=82, Invalid=317, Unknown=21, NotChecked=0, Total=420 [2022-04-07 17:28:57,650 INFO L87 Difference]: Start difference. First operand 27 states and 36 transitions. Second operand has 21 states, 20 states have (on average 1.55) internal successors, (31), 18 states have internal predecessors, (31), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:29:05,669 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:29:05,669 INFO L93 Difference]: Finished difference Result 34 states and 46 transitions. [2022-04-07 17:29:05,669 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-04-07 17:29:05,670 INFO L78 Accepts]: Start accepts. Automaton has has 21 states, 20 states have (on average 1.55) internal successors, (31), 18 states have internal predecessors, (31), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-07 17:29:05,670 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:29:05,670 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 20 states have (on average 1.55) internal successors, (31), 18 states have internal predecessors, (31), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:29:05,671 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 36 transitions. [2022-04-07 17:29:05,671 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 20 states have (on average 1.55) internal successors, (31), 18 states have internal predecessors, (31), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:29:05,671 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 36 transitions. [2022-04-07 17:29:05,672 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 9 states and 36 transitions. [2022-04-07 17:29:05,705 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 36 edges. 36 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:29:05,706 INFO L225 Difference]: With dead ends: 34 [2022-04-07 17:29:05,706 INFO L226 Difference]: Without dead ends: 31 [2022-04-07 17:29:05,706 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 22 SyntacticMatches, 5 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 147 ImplicationChecksByTransitivity, 53.5s TimeCoverageRelationStatistics Valid=129, Invalid=498, Unknown=23, NotChecked=0, Total=650 [2022-04-07 17:29:05,706 INFO L913 BasicCegarLoop]: 11 mSDtfsCounter, 26 mSDsluCounter, 43 mSDsCounter, 0 mSdLazyCounter, 72 mSolverCounterSat, 10 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 26 SdHoareTripleChecker+Valid, 54 SdHoareTripleChecker+Invalid, 119 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Valid, 72 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 37 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 17:29:05,706 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [26 Valid, 54 Invalid, 119 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [10 Valid, 72 Invalid, 0 Unknown, 37 Unchecked, 0.1s Time] [2022-04-07 17:29:05,707 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31 states. [2022-04-07 17:29:05,708 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31 to 28. [2022-04-07 17:29:05,708 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:29:05,708 INFO L82 GeneralOperation]: Start isEquivalent. First operand 31 states. Second operand has 28 states, 23 states have (on average 1.4782608695652173) internal successors, (34), 23 states have internal predecessors, (34), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:29:05,708 INFO L74 IsIncluded]: Start isIncluded. First operand 31 states. Second operand has 28 states, 23 states have (on average 1.4782608695652173) internal successors, (34), 23 states have internal predecessors, (34), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:29:05,708 INFO L87 Difference]: Start difference. First operand 31 states. Second operand has 28 states, 23 states have (on average 1.4782608695652173) internal successors, (34), 23 states have internal predecessors, (34), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:29:05,709 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:29:05,709 INFO L93 Difference]: Finished difference Result 31 states and 43 transitions. [2022-04-07 17:29:05,709 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 43 transitions. [2022-04-07 17:29:05,710 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:29:05,710 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:29:05,710 INFO L74 IsIncluded]: Start isIncluded. First operand has 28 states, 23 states have (on average 1.4782608695652173) internal successors, (34), 23 states have internal predecessors, (34), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 31 states. [2022-04-07 17:29:05,710 INFO L87 Difference]: Start difference. First operand has 28 states, 23 states have (on average 1.4782608695652173) internal successors, (34), 23 states have internal predecessors, (34), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 31 states. [2022-04-07 17:29:05,711 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:29:05,711 INFO L93 Difference]: Finished difference Result 31 states and 43 transitions. [2022-04-07 17:29:05,711 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 43 transitions. [2022-04-07 17:29:05,711 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:29:05,711 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:29:05,711 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:29:05,711 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:29:05,711 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 23 states have (on average 1.4782608695652173) internal successors, (34), 23 states have internal predecessors, (34), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:29:05,712 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 38 transitions. [2022-04-07 17:29:05,712 INFO L78 Accepts]: Start accepts. Automaton has 28 states and 38 transitions. Word has length 17 [2022-04-07 17:29:05,712 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:29:05,712 INFO L478 AbstractCegarLoop]: Abstraction has 28 states and 38 transitions. [2022-04-07 17:29:05,712 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 21 states, 20 states have (on average 1.55) internal successors, (31), 18 states have internal predecessors, (31), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:29:05,712 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 38 transitions. [2022-04-07 17:29:05,713 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-04-07 17:29:05,713 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:29:05,713 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:29:05,731 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2022-04-07 17:29:05,913 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7,7 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:29:05,913 INFO L403 AbstractCegarLoop]: === Iteration 9 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:29:05,914 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:29:05,914 INFO L85 PathProgramCache]: Analyzing trace with hash -1930032162, now seen corresponding path program 1 times [2022-04-07 17:29:05,914 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:29:05,914 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1255962033] [2022-04-07 17:29:05,914 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:29:05,914 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:29:05,922 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.0))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-07 17:29:05,923 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.1))) (+ .cse0 main_~x~0_8 (* (- 4294967296) (div (+ .cse0 main_~x~0_8) 4294967296)))) 0)) [2022-04-07 17:29:05,938 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:29:05,948 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.3))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-07 17:29:05,963 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.4))) (+ .cse0 main_~x~0_8 (* (- 4294967296) (div (+ .cse0 main_~x~0_8) 4294967296)))) 0)) [2022-04-07 17:29:06,094 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:29:06,095 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:29:06,102 INFO L290 TraceCheckUtils]: 0: Hoare triple {1559#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1548#true} is VALID [2022-04-07 17:29:06,102 INFO L290 TraceCheckUtils]: 1: Hoare triple {1548#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1548#true} is VALID [2022-04-07 17:29:06,103 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1548#true} {1548#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1548#true} is VALID [2022-04-07 17:29:06,103 INFO L272 TraceCheckUtils]: 0: Hoare triple {1548#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1559#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:29:06,103 INFO L290 TraceCheckUtils]: 1: Hoare triple {1559#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1548#true} is VALID [2022-04-07 17:29:06,103 INFO L290 TraceCheckUtils]: 2: Hoare triple {1548#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1548#true} is VALID [2022-04-07 17:29:06,103 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1548#true} {1548#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1548#true} is VALID [2022-04-07 17:29:06,103 INFO L272 TraceCheckUtils]: 4: Hoare triple {1548#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1548#true} is VALID [2022-04-07 17:29:06,104 INFO L290 TraceCheckUtils]: 5: Hoare triple {1548#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1553#(and (= main_~n~0 main_~x~0) (= main_~y~0 0))} is VALID [2022-04-07 17:29:06,105 INFO L290 TraceCheckUtils]: 6: Hoare triple {1553#(and (= main_~n~0 main_~x~0) (= main_~y~0 0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1554#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:29:06,105 INFO L290 TraceCheckUtils]: 7: Hoare triple {1554#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {1555#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 17:29:06,106 INFO L290 TraceCheckUtils]: 8: Hoare triple {1555#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [87] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~x~0_9 v_main_~x~0_8) (<= .cse0 0) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)) (and (= v_main_~z~0_9 (+ (* (- 1) v_main_~x~0_8) v_main_~z~0_10 v_main_~x~0_9)) (< v_main_~x~0_9 v_main_~x~0_8) (< 0 .cse0) (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (not (<= (+ v_main_~x~0_9 v_it_2 1) v_main_~x~0_8)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_2 4294967295)) 4294967296))))))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_10, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1555#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 17:29:06,107 INFO L290 TraceCheckUtils]: 9: Hoare triple {1555#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {1555#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 17:29:06,107 INFO L290 TraceCheckUtils]: 10: Hoare triple {1555#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1555#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 17:29:06,125 INFO L290 TraceCheckUtils]: 11: Hoare triple {1555#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [93] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~z~0_5 v_main_~z~0_4) (= v_main_~x~0_7 v_main_~x~0_6)) (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (< v_main_~x~0_6 v_main_~x~0_7) (= v_main_~z~0_4 (+ (* (- 1) v_main_~x~0_6) v_main_~x~0_7 v_main_~z~0_5))))) InVars {main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {1556#(and (= main_~z~0 0) (<= (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0)))} is VALID [2022-04-07 17:29:06,126 INFO L290 TraceCheckUtils]: 12: Hoare triple {1556#(and (= main_~z~0 0) (<= (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0)))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1556#(and (= main_~z~0 0) (<= (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0)))} is VALID [2022-04-07 17:29:06,129 INFO L272 TraceCheckUtils]: 13: Hoare triple {1556#(and (= main_~z~0 0) (<= (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0)))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {1557#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:29:06,129 INFO L290 TraceCheckUtils]: 14: Hoare triple {1557#(not (= |__VERIFIER_assert_#in~cond| 0))} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1558#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:29:06,130 INFO L290 TraceCheckUtils]: 15: Hoare triple {1558#(not (= __VERIFIER_assert_~cond 0))} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1549#false} is VALID [2022-04-07 17:29:06,130 INFO L290 TraceCheckUtils]: 16: Hoare triple {1549#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1549#false} is VALID [2022-04-07 17:29:06,130 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 17:29:06,130 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:29:06,140 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1255962033] [2022-04-07 17:29:06,140 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1255962033] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:29:06,140 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [262528248] [2022-04-07 17:29:06,140 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:29:06,140 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:29:06,140 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:29:06,141 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:29:06,142 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2022-04-07 17:29:06,176 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:29:06,177 INFO L263 TraceCheckSpWp]: Trace formula consists of 62 conjuncts, 15 conjunts are in the unsatisfiable core [2022-04-07 17:29:06,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:29:06,187 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:29:06,618 INFO L272 TraceCheckUtils]: 0: Hoare triple {1548#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1548#true} is VALID [2022-04-07 17:29:06,618 INFO L290 TraceCheckUtils]: 1: Hoare triple {1548#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1548#true} is VALID [2022-04-07 17:29:06,618 INFO L290 TraceCheckUtils]: 2: Hoare triple {1548#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1548#true} is VALID [2022-04-07 17:29:06,618 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1548#true} {1548#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1548#true} is VALID [2022-04-07 17:29:06,618 INFO L272 TraceCheckUtils]: 4: Hoare triple {1548#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1548#true} is VALID [2022-04-07 17:29:06,619 INFO L290 TraceCheckUtils]: 5: Hoare triple {1548#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1553#(and (= main_~n~0 main_~x~0) (= main_~y~0 0))} is VALID [2022-04-07 17:29:06,619 INFO L290 TraceCheckUtils]: 6: Hoare triple {1553#(and (= main_~n~0 main_~x~0) (= main_~y~0 0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1554#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:29:06,620 INFO L290 TraceCheckUtils]: 7: Hoare triple {1554#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {1584#(and (= main_~n~0 main_~x~0) (= main_~z~0 main_~y~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:29:06,621 INFO L290 TraceCheckUtils]: 8: Hoare triple {1584#(and (= main_~n~0 main_~x~0) (= main_~z~0 main_~y~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [87] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~x~0_9 v_main_~x~0_8) (<= .cse0 0) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)) (and (= v_main_~z~0_9 (+ (* (- 1) v_main_~x~0_8) v_main_~z~0_10 v_main_~x~0_9)) (< v_main_~x~0_9 v_main_~x~0_8) (< 0 .cse0) (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (not (<= (+ v_main_~x~0_9 v_it_2 1) v_main_~x~0_8)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_2 4294967295)) 4294967296))))))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_10, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1584#(and (= main_~n~0 main_~x~0) (= main_~z~0 main_~y~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:29:06,621 INFO L290 TraceCheckUtils]: 9: Hoare triple {1584#(and (= main_~n~0 main_~x~0) (= main_~z~0 main_~y~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {1584#(and (= main_~n~0 main_~x~0) (= main_~z~0 main_~y~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:29:06,622 INFO L290 TraceCheckUtils]: 10: Hoare triple {1584#(and (= main_~n~0 main_~x~0) (= main_~z~0 main_~y~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1555#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 17:29:06,623 INFO L290 TraceCheckUtils]: 11: Hoare triple {1555#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [93] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~z~0_5 v_main_~z~0_4) (= v_main_~x~0_7 v_main_~x~0_6)) (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (< v_main_~x~0_6 v_main_~x~0_7) (= v_main_~z~0_4 (+ (* (- 1) v_main_~x~0_6) v_main_~x~0_7 v_main_~z~0_5))))) InVars {main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {1597#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-07 17:29:06,623 INFO L290 TraceCheckUtils]: 12: Hoare triple {1597#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1597#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-07 17:29:06,626 INFO L272 TraceCheckUtils]: 13: Hoare triple {1597#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {1604#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:29:06,626 INFO L290 TraceCheckUtils]: 14: Hoare triple {1604#(<= 1 |__VERIFIER_assert_#in~cond|)} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1608#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:29:06,627 INFO L290 TraceCheckUtils]: 15: Hoare triple {1608#(<= 1 __VERIFIER_assert_~cond)} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1549#false} is VALID [2022-04-07 17:29:06,627 INFO L290 TraceCheckUtils]: 16: Hoare triple {1549#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1549#false} is VALID [2022-04-07 17:29:06,627 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 17:29:06,627 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 17:29:32,120 WARN L232 SmtUtils]: Spent 6.06s on a formula simplification that was a NOOP. DAG size: 92 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 17:29:41,679 INFO L290 TraceCheckUtils]: 16: Hoare triple {1549#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1549#false} is VALID [2022-04-07 17:29:41,680 INFO L290 TraceCheckUtils]: 15: Hoare triple {1608#(<= 1 __VERIFIER_assert_~cond)} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1549#false} is VALID [2022-04-07 17:29:41,680 INFO L290 TraceCheckUtils]: 14: Hoare triple {1604#(<= 1 |__VERIFIER_assert_#in~cond|)} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1608#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:29:41,681 INFO L272 TraceCheckUtils]: 13: Hoare triple {1624#(= (mod main_~z~0 4294967296) (mod (* main_~n~0 2) 4294967296))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {1604#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:29:41,681 INFO L290 TraceCheckUtils]: 12: Hoare triple {1624#(= (mod main_~z~0 4294967296) (mod (* main_~n~0 2) 4294967296))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1624#(= (mod main_~z~0 4294967296) (mod (* main_~n~0 2) 4294967296))} is VALID [2022-04-07 17:29:43,715 WARN L290 TraceCheckUtils]: 11: Hoare triple {1631#(forall ((aux_mod_v_main_~z~0_42_31 Int)) (or (= aux_mod_v_main_~z~0_42_31 (mod (* main_~n~0 2) 4294967296)) (>= aux_mod_v_main_~z~0_42_31 4294967296) (> 0 aux_mod_v_main_~z~0_42_31) (and (or (forall ((aux_div_v_main_~z~0_42_31 Int)) (or (not (< main_~z~0 (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31)))) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= (+ v_it_4 main_~z~0 1) (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31))) (<= 1 v_it_4))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (forall ((aux_div_v_main_~z~0_42_31 Int)) (not (= (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31)) main_~z~0))) (< 0 (mod main_~x~0 4294967296))))))} [93] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~z~0_5 v_main_~z~0_4) (= v_main_~x~0_7 v_main_~x~0_6)) (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (< v_main_~x~0_6 v_main_~x~0_7) (= v_main_~z~0_4 (+ (* (- 1) v_main_~x~0_6) v_main_~x~0_7 v_main_~z~0_5))))) InVars {main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {1624#(= (mod main_~z~0 4294967296) (mod (* main_~n~0 2) 4294967296))} is UNKNOWN [2022-04-07 17:29:43,717 INFO L290 TraceCheckUtils]: 10: Hoare triple {1635#(or (forall ((aux_mod_v_main_~z~0_42_31 Int)) (or (= aux_mod_v_main_~z~0_42_31 (mod (* main_~n~0 2) 4294967296)) (>= aux_mod_v_main_~z~0_42_31 4294967296) (> 0 aux_mod_v_main_~z~0_42_31) (and (or (forall ((aux_div_v_main_~z~0_42_31 Int)) (or (not (< main_~z~0 (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31)))) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= (+ v_it_4 main_~z~0 1) (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31))) (<= 1 v_it_4))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (forall ((aux_div_v_main_~z~0_42_31 Int)) (not (= (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31)) main_~z~0))) (< 0 (mod main_~x~0 4294967296)))))) (< 0 (mod main_~y~0 4294967296)))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1631#(forall ((aux_mod_v_main_~z~0_42_31 Int)) (or (= aux_mod_v_main_~z~0_42_31 (mod (* main_~n~0 2) 4294967296)) (>= aux_mod_v_main_~z~0_42_31 4294967296) (> 0 aux_mod_v_main_~z~0_42_31) (and (or (forall ((aux_div_v_main_~z~0_42_31 Int)) (or (not (< main_~z~0 (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31)))) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= (+ v_it_4 main_~z~0 1) (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31))) (<= 1 v_it_4))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (forall ((aux_div_v_main_~z~0_42_31 Int)) (not (= (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31)) main_~z~0))) (< 0 (mod main_~x~0 4294967296))))))} is VALID [2022-04-07 17:29:43,717 INFO L290 TraceCheckUtils]: 9: Hoare triple {1635#(or (forall ((aux_mod_v_main_~z~0_42_31 Int)) (or (= aux_mod_v_main_~z~0_42_31 (mod (* main_~n~0 2) 4294967296)) (>= aux_mod_v_main_~z~0_42_31 4294967296) (> 0 aux_mod_v_main_~z~0_42_31) (and (or (forall ((aux_div_v_main_~z~0_42_31 Int)) (or (not (< main_~z~0 (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31)))) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= (+ v_it_4 main_~z~0 1) (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31))) (<= 1 v_it_4))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (forall ((aux_div_v_main_~z~0_42_31 Int)) (not (= (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31)) main_~z~0))) (< 0 (mod main_~x~0 4294967296)))))) (< 0 (mod main_~y~0 4294967296)))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {1635#(or (forall ((aux_mod_v_main_~z~0_42_31 Int)) (or (= aux_mod_v_main_~z~0_42_31 (mod (* main_~n~0 2) 4294967296)) (>= aux_mod_v_main_~z~0_42_31 4294967296) (> 0 aux_mod_v_main_~z~0_42_31) (and (or (forall ((aux_div_v_main_~z~0_42_31 Int)) (or (not (< main_~z~0 (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31)))) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= (+ v_it_4 main_~z~0 1) (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31))) (<= 1 v_it_4))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (forall ((aux_div_v_main_~z~0_42_31 Int)) (not (= (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31)) main_~z~0))) (< 0 (mod main_~x~0 4294967296)))))) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-07 17:29:45,735 WARN L290 TraceCheckUtils]: 8: Hoare triple {1642#(or (forall ((aux_mod_v_main_~z~0_42_31 Int)) (or (= aux_mod_v_main_~z~0_42_31 (mod (* main_~n~0 2) 4294967296)) (>= aux_mod_v_main_~z~0_42_31 4294967296) (and (or (not (< 0 (mod main_~z~0 4294967296))) (forall ((v_main_~z~0_43 Int)) (or (not (< v_main_~z~0_43 main_~z~0)) (exists ((v_it_2 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_2 4294967295)) 4294967296))) (<= 1 v_it_2) (<= (+ v_main_~z~0_43 v_it_2 1) main_~z~0))) (and (or (not (< 0 (mod (+ main_~z~0 main_~x~0 (* v_main_~z~0_43 4294967295)) 4294967296))) (forall ((aux_div_v_main_~z~0_42_31 Int)) (or (not (< v_main_~z~0_43 (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31)))) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) main_~z~0 main_~x~0 (* v_main_~z~0_43 4294967295)) 4294967296))) (<= (+ v_main_~z~0_43 v_it_4 1) (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31))) (<= 1 v_it_4)))))) (or (forall ((aux_div_v_main_~z~0_42_31 Int)) (not (= v_main_~z~0_43 (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31))))) (< 0 (mod (+ main_~z~0 main_~x~0 (* v_main_~z~0_43 4294967295)) 4294967296))))))) (or (< 0 (mod main_~z~0 4294967296)) (and (or (forall ((aux_div_v_main_~z~0_42_31 Int)) (or (not (< main_~z~0 (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31)))) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= (+ v_it_4 main_~z~0 1) (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31))) (<= 1 v_it_4))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (forall ((aux_div_v_main_~z~0_42_31 Int)) (not (= (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31)) main_~z~0))) (< 0 (mod main_~x~0 4294967296)))))) (> 0 aux_mod_v_main_~z~0_42_31))) (< 0 (mod main_~y~0 4294967296)))} [87] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~x~0_9 v_main_~x~0_8) (<= .cse0 0) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)) (and (= v_main_~z~0_9 (+ (* (- 1) v_main_~x~0_8) v_main_~z~0_10 v_main_~x~0_9)) (< v_main_~x~0_9 v_main_~x~0_8) (< 0 .cse0) (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (not (<= (+ v_main_~x~0_9 v_it_2 1) v_main_~x~0_8)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_2 4294967295)) 4294967296))))))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_10, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1635#(or (forall ((aux_mod_v_main_~z~0_42_31 Int)) (or (= aux_mod_v_main_~z~0_42_31 (mod (* main_~n~0 2) 4294967296)) (>= aux_mod_v_main_~z~0_42_31 4294967296) (> 0 aux_mod_v_main_~z~0_42_31) (and (or (forall ((aux_div_v_main_~z~0_42_31 Int)) (or (not (< main_~z~0 (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31)))) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= (+ v_it_4 main_~z~0 1) (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31))) (<= 1 v_it_4))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (forall ((aux_div_v_main_~z~0_42_31 Int)) (not (= (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31)) main_~z~0))) (< 0 (mod main_~x~0 4294967296)))))) (< 0 (mod main_~y~0 4294967296)))} is UNKNOWN [2022-04-07 17:29:47,750 WARN L290 TraceCheckUtils]: 7: Hoare triple {1646#(or (forall ((aux_mod_v_main_~z~0_42_31 Int)) (or (= aux_mod_v_main_~z~0_42_31 (mod (* main_~n~0 2) 4294967296)) (>= aux_mod_v_main_~z~0_42_31 4294967296) (> 0 aux_mod_v_main_~z~0_42_31) (and (or (forall ((aux_div_v_main_~z~0_42_31 Int)) (or (not (< main_~y~0 (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31)))) (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31))) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (< 0 (mod main_~x~0 4294967296)) (forall ((aux_div_v_main_~z~0_42_31 Int)) (not (= (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31)) main_~y~0))))))) (< 0 (mod main_~y~0 4294967296)))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {1642#(or (forall ((aux_mod_v_main_~z~0_42_31 Int)) (or (= aux_mod_v_main_~z~0_42_31 (mod (* main_~n~0 2) 4294967296)) (>= aux_mod_v_main_~z~0_42_31 4294967296) (and (or (not (< 0 (mod main_~z~0 4294967296))) (forall ((v_main_~z~0_43 Int)) (or (not (< v_main_~z~0_43 main_~z~0)) (exists ((v_it_2 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_2 4294967295)) 4294967296))) (<= 1 v_it_2) (<= (+ v_main_~z~0_43 v_it_2 1) main_~z~0))) (and (or (not (< 0 (mod (+ main_~z~0 main_~x~0 (* v_main_~z~0_43 4294967295)) 4294967296))) (forall ((aux_div_v_main_~z~0_42_31 Int)) (or (not (< v_main_~z~0_43 (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31)))) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) main_~z~0 main_~x~0 (* v_main_~z~0_43 4294967295)) 4294967296))) (<= (+ v_main_~z~0_43 v_it_4 1) (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31))) (<= 1 v_it_4)))))) (or (forall ((aux_div_v_main_~z~0_42_31 Int)) (not (= v_main_~z~0_43 (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31))))) (< 0 (mod (+ main_~z~0 main_~x~0 (* v_main_~z~0_43 4294967295)) 4294967296))))))) (or (< 0 (mod main_~z~0 4294967296)) (and (or (forall ((aux_div_v_main_~z~0_42_31 Int)) (or (not (< main_~z~0 (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31)))) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= (+ v_it_4 main_~z~0 1) (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31))) (<= 1 v_it_4))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (forall ((aux_div_v_main_~z~0_42_31 Int)) (not (= (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31)) main_~z~0))) (< 0 (mod main_~x~0 4294967296)))))) (> 0 aux_mod_v_main_~z~0_42_31))) (< 0 (mod main_~y~0 4294967296)))} is UNKNOWN [2022-04-07 17:29:47,755 INFO L290 TraceCheckUtils]: 6: Hoare triple {1650#(or (<= (div (+ (- 1) (* (- 1) main_~y~0)) (- 4294967296)) (div (+ (- 1) (mod (* main_~n~0 2) 4294967296) (* (- 1) main_~y~0)) (- 4294967296))) (< 0 (mod main_~x~0 4294967296)) (< 0 (mod main_~y~0 4294967296)))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1646#(or (forall ((aux_mod_v_main_~z~0_42_31 Int)) (or (= aux_mod_v_main_~z~0_42_31 (mod (* main_~n~0 2) 4294967296)) (>= aux_mod_v_main_~z~0_42_31 4294967296) (> 0 aux_mod_v_main_~z~0_42_31) (and (or (forall ((aux_div_v_main_~z~0_42_31 Int)) (or (not (< main_~y~0 (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31)))) (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31))) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (< 0 (mod main_~x~0 4294967296)) (forall ((aux_div_v_main_~z~0_42_31 Int)) (not (= (+ aux_mod_v_main_~z~0_42_31 (* 4294967296 aux_div_v_main_~z~0_42_31)) main_~y~0))))))) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-07 17:29:47,757 INFO L290 TraceCheckUtils]: 5: Hoare triple {1548#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1650#(or (<= (div (+ (- 1) (* (- 1) main_~y~0)) (- 4294967296)) (div (+ (- 1) (mod (* main_~n~0 2) 4294967296) (* (- 1) main_~y~0)) (- 4294967296))) (< 0 (mod main_~x~0 4294967296)) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-07 17:29:47,758 INFO L272 TraceCheckUtils]: 4: Hoare triple {1548#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1548#true} is VALID [2022-04-07 17:29:47,758 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1548#true} {1548#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1548#true} is VALID [2022-04-07 17:29:47,758 INFO L290 TraceCheckUtils]: 2: Hoare triple {1548#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1548#true} is VALID [2022-04-07 17:29:47,758 INFO L290 TraceCheckUtils]: 1: Hoare triple {1548#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1548#true} is VALID [2022-04-07 17:29:47,758 INFO L272 TraceCheckUtils]: 0: Hoare triple {1548#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1548#true} is VALID [2022-04-07 17:29:47,758 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 1 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:29:47,758 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [262528248] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 17:29:47,758 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 17:29:47,758 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 10] total 19 [2022-04-07 17:29:47,759 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1767826947] [2022-04-07 17:29:47,759 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 17:29:47,759 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 1.5789473684210527) internal successors, (30), 16 states have internal predecessors, (30), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-07 17:29:47,759 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:29:47,760 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 19 states, 19 states have (on average 1.5789473684210527) internal successors, (30), 16 states have internal predecessors, (30), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:29:56,351 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 37 edges. 33 inductive. 0 not inductive. 4 times theorem prover too weak to decide inductivity. [2022-04-07 17:29:56,351 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2022-04-07 17:29:56,351 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:29:56,351 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2022-04-07 17:29:56,352 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=67, Invalid=264, Unknown=11, NotChecked=0, Total=342 [2022-04-07 17:29:56,352 INFO L87 Difference]: Start difference. First operand 28 states and 38 transitions. Second operand has 19 states, 19 states have (on average 1.5789473684210527) internal successors, (30), 16 states have internal predecessors, (30), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:30:03,470 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:30:03,470 INFO L93 Difference]: Finished difference Result 37 states and 51 transitions. [2022-04-07 17:30:03,470 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-04-07 17:30:03,470 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 1.5789473684210527) internal successors, (30), 16 states have internal predecessors, (30), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-07 17:30:03,471 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:30:03,471 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.5789473684210527) internal successors, (30), 16 states have internal predecessors, (30), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:30:03,472 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 40 transitions. [2022-04-07 17:30:03,472 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.5789473684210527) internal successors, (30), 16 states have internal predecessors, (30), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:30:03,473 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 40 transitions. [2022-04-07 17:30:03,473 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 11 states and 40 transitions. [2022-04-07 17:30:03,518 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 40 edges. 40 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:30:03,519 INFO L225 Difference]: With dead ends: 37 [2022-04-07 17:30:03,519 INFO L226 Difference]: Without dead ends: 34 [2022-04-07 17:30:03,519 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 24 SyntacticMatches, 4 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 110 ImplicationChecksByTransitivity, 34.0s TimeCoverageRelationStatistics Valid=118, Invalid=469, Unknown=13, NotChecked=0, Total=600 [2022-04-07 17:30:03,519 INFO L913 BasicCegarLoop]: 11 mSDtfsCounter, 37 mSDsluCounter, 50 mSDsCounter, 0 mSdLazyCounter, 76 mSolverCounterSat, 11 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 37 SdHoareTripleChecker+Valid, 61 SdHoareTripleChecker+Invalid, 117 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 11 IncrementalHoareTripleChecker+Valid, 76 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 30 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 17:30:03,519 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [37 Valid, 61 Invalid, 117 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [11 Valid, 76 Invalid, 0 Unknown, 30 Unchecked, 0.1s Time] [2022-04-07 17:30:03,520 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2022-04-07 17:30:03,521 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 30. [2022-04-07 17:30:03,521 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:30:03,521 INFO L82 GeneralOperation]: Start isEquivalent. First operand 34 states. Second operand has 30 states, 25 states have (on average 1.48) internal successors, (37), 25 states have internal predecessors, (37), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:30:03,521 INFO L74 IsIncluded]: Start isIncluded. First operand 34 states. Second operand has 30 states, 25 states have (on average 1.48) internal successors, (37), 25 states have internal predecessors, (37), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:30:03,521 INFO L87 Difference]: Start difference. First operand 34 states. Second operand has 30 states, 25 states have (on average 1.48) internal successors, (37), 25 states have internal predecessors, (37), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:30:03,522 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:30:03,522 INFO L93 Difference]: Finished difference Result 34 states and 48 transitions. [2022-04-07 17:30:03,522 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 48 transitions. [2022-04-07 17:30:03,522 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:30:03,523 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:30:03,523 INFO L74 IsIncluded]: Start isIncluded. First operand has 30 states, 25 states have (on average 1.48) internal successors, (37), 25 states have internal predecessors, (37), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 34 states. [2022-04-07 17:30:03,523 INFO L87 Difference]: Start difference. First operand has 30 states, 25 states have (on average 1.48) internal successors, (37), 25 states have internal predecessors, (37), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 34 states. [2022-04-07 17:30:03,524 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:30:03,524 INFO L93 Difference]: Finished difference Result 34 states and 48 transitions. [2022-04-07 17:30:03,524 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 48 transitions. [2022-04-07 17:30:03,524 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:30:03,524 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:30:03,524 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:30:03,524 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:30:03,524 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 30 states, 25 states have (on average 1.48) internal successors, (37), 25 states have internal predecessors, (37), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:30:03,525 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 41 transitions. [2022-04-07 17:30:03,525 INFO L78 Accepts]: Start accepts. Automaton has 30 states and 41 transitions. Word has length 17 [2022-04-07 17:30:03,525 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:30:03,525 INFO L478 AbstractCegarLoop]: Abstraction has 30 states and 41 transitions. [2022-04-07 17:30:03,525 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 19 states, 19 states have (on average 1.5789473684210527) internal successors, (30), 16 states have internal predecessors, (30), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:30:03,525 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 41 transitions. [2022-04-07 17:30:03,525 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-04-07 17:30:03,525 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:30:03,526 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:30:03,558 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Ended with exit code 0 [2022-04-07 17:30:03,726 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8,8 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:30:03,726 INFO L403 AbstractCegarLoop]: === Iteration 10 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:30:03,726 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:30:03,726 INFO L85 PathProgramCache]: Analyzing trace with hash -1157045085, now seen corresponding path program 1 times [2022-04-07 17:30:03,727 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:30:03,727 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2114274876] [2022-04-07 17:30:03,727 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:30:03,727 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:30:03,738 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.0))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-07 17:30:03,738 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.1))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-07 17:30:03,744 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:30:03,761 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.3))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-07 17:30:03,764 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.4))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-07 17:30:03,965 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:30:03,966 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:30:03,973 INFO L290 TraceCheckUtils]: 0: Hoare triple {1831#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1819#true} is VALID [2022-04-07 17:30:03,973 INFO L290 TraceCheckUtils]: 1: Hoare triple {1819#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1819#true} is VALID [2022-04-07 17:30:03,973 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1819#true} {1819#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1819#true} is VALID [2022-04-07 17:30:03,973 INFO L272 TraceCheckUtils]: 0: Hoare triple {1819#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1831#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:30:03,974 INFO L290 TraceCheckUtils]: 1: Hoare triple {1831#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1819#true} is VALID [2022-04-07 17:30:03,974 INFO L290 TraceCheckUtils]: 2: Hoare triple {1819#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1819#true} is VALID [2022-04-07 17:30:03,974 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1819#true} {1819#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1819#true} is VALID [2022-04-07 17:30:03,974 INFO L272 TraceCheckUtils]: 4: Hoare triple {1819#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1819#true} is VALID [2022-04-07 17:30:03,974 INFO L290 TraceCheckUtils]: 5: Hoare triple {1819#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1824#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 17:30:03,975 INFO L290 TraceCheckUtils]: 6: Hoare triple {1824#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1825#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:30:03,975 INFO L290 TraceCheckUtils]: 7: Hoare triple {1825#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {1826#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:30:03,989 INFO L290 TraceCheckUtils]: 8: Hoare triple {1826#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [87] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~x~0_9 v_main_~x~0_8) (<= .cse0 0) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)) (and (= v_main_~z~0_9 (+ (* (- 1) v_main_~x~0_8) v_main_~z~0_10 v_main_~x~0_9)) (< v_main_~x~0_9 v_main_~x~0_8) (< 0 .cse0) (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (not (<= (+ v_main_~x~0_9 v_it_2 1) v_main_~x~0_8)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_2 4294967295)) 4294967296))))))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_10, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1827#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 2147483648) 2147483648)) (= main_~y~0 0))} is VALID [2022-04-07 17:30:03,990 INFO L290 TraceCheckUtils]: 9: Hoare triple {1827#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 2147483648) 2147483648)) (= main_~y~0 0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {1827#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 2147483648) 2147483648)) (= main_~y~0 0))} is VALID [2022-04-07 17:30:03,991 INFO L290 TraceCheckUtils]: 10: Hoare triple {1827#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 2147483648) 2147483648)) (= main_~y~0 0))} [90] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (= (+ (* (- 1) v_main_~y~0_3) v_main_~y~0_4 v_main_~z~0_3) v_main_~z~0_2) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1828#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= 0 main_~z~0) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:30:03,991 INFO L290 TraceCheckUtils]: 11: Hoare triple {1828#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= 0 main_~z~0) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1828#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= 0 main_~z~0) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:30:03,992 INFO L290 TraceCheckUtils]: 12: Hoare triple {1828#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= 0 main_~z~0) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1828#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= 0 main_~z~0) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:30:03,993 INFO L272 TraceCheckUtils]: 13: Hoare triple {1828#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= 0 main_~z~0) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {1829#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:30:03,994 INFO L290 TraceCheckUtils]: 14: Hoare triple {1829#(not (= |__VERIFIER_assert_#in~cond| 0))} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1830#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:30:03,994 INFO L290 TraceCheckUtils]: 15: Hoare triple {1830#(not (= __VERIFIER_assert_~cond 0))} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1820#false} is VALID [2022-04-07 17:30:03,994 INFO L290 TraceCheckUtils]: 16: Hoare triple {1820#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1820#false} is VALID [2022-04-07 17:30:03,994 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:30:03,995 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:30:03,995 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2114274876] [2022-04-07 17:30:03,995 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2114274876] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:30:03,995 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1980031271] [2022-04-07 17:30:03,995 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:30:03,995 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:30:03,995 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:30:03,996 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:30:03,997 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process