/usr/bin/java -ea -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --core.log.level.for.class de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN -tc ../../../trunk/examples/toolchains/AutomizerCTransformed.xml -s ../../../trunk/examples/settings/automizer/LoopAccelerationJordanC.epf -i ../../../trunk/examples/svcomp/loops-crafted-1/in-de51.c -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-34549b5 [2022-04-07 17:28:21,877 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-04-07 17:28:21,878 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-04-07 17:28:21,902 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-04-07 17:28:21,902 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-04-07 17:28:21,903 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-04-07 17:28:21,904 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-04-07 17:28:21,906 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-04-07 17:28:21,907 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-04-07 17:28:21,908 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-04-07 17:28:21,909 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-04-07 17:28:21,910 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-04-07 17:28:21,910 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-04-07 17:28:21,911 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-04-07 17:28:21,912 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-04-07 17:28:21,913 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-04-07 17:28:21,913 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-04-07 17:28:21,914 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-04-07 17:28:21,915 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-04-07 17:28:21,917 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-04-07 17:28:21,918 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-04-07 17:28:21,919 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-04-07 17:28:21,920 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-04-07 17:28:21,920 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-04-07 17:28:21,921 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-04-07 17:28:21,923 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-04-07 17:28:21,924 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-04-07 17:28:21,924 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-04-07 17:28:21,925 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-04-07 17:28:21,925 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-04-07 17:28:21,926 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-04-07 17:28:21,926 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-04-07 17:28:21,927 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-04-07 17:28:21,927 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-04-07 17:28:21,928 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-04-07 17:28:21,929 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-04-07 17:28:21,929 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-04-07 17:28:21,929 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-04-07 17:28:21,930 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-04-07 17:28:21,930 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-04-07 17:28:21,931 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-04-07 17:28:21,938 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-04-07 17:28:21,939 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/automizer/LoopAccelerationJordanC.epf [2022-04-07 17:28:21,952 INFO L113 SettingsManager]: Loading preferences was successful [2022-04-07 17:28:21,952 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-04-07 17:28:21,953 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-04-07 17:28:21,953 INFO L138 SettingsManager]: * sizeof long=4 [2022-04-07 17:28:21,953 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-04-07 17:28:21,953 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-04-07 17:28:21,954 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-04-07 17:28:21,954 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-04-07 17:28:21,954 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-04-07 17:28:21,954 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-04-07 17:28:21,954 INFO L138 SettingsManager]: * sizeof long double=12 [2022-04-07 17:28:21,954 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-04-07 17:28:21,954 INFO L138 SettingsManager]: * Use constant arrays=true [2022-04-07 17:28:21,954 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-04-07 17:28:21,955 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-04-07 17:28:21,955 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-04-07 17:28:21,955 INFO L138 SettingsManager]: * To the following directory=./dump/ [2022-04-07 17:28:21,955 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-04-07 17:28:21,955 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-07 17:28:21,955 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-04-07 17:28:21,955 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-04-07 17:28:21,956 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-04-07 17:28:21,956 INFO L138 SettingsManager]: * TransformationType=LOOP_ACCELERATION_JORDAN WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.core: Log level for class -> de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN; [2022-04-07 17:28:22,150 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-04-07 17:28:22,179 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-04-07 17:28:22,181 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-04-07 17:28:22,181 INFO L271 PluginConnector]: Initializing CDTParser... [2022-04-07 17:28:22,182 INFO L275 PluginConnector]: CDTParser initialized [2022-04-07 17:28:22,183 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loops-crafted-1/in-de51.c [2022-04-07 17:28:22,236 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/394a1d7a5/7abe9cb76a0c4a5c8198ad10042a10e4/FLAG1fa56cd61 [2022-04-07 17:28:22,592 INFO L306 CDTParser]: Found 1 translation units. [2022-04-07 17:28:22,593 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de51.c [2022-04-07 17:28:22,598 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/394a1d7a5/7abe9cb76a0c4a5c8198ad10042a10e4/FLAG1fa56cd61 [2022-04-07 17:28:23,005 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/394a1d7a5/7abe9cb76a0c4a5c8198ad10042a10e4 [2022-04-07 17:28:23,007 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-04-07 17:28:23,009 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2022-04-07 17:28:23,010 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-04-07 17:28:23,010 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-04-07 17:28:23,012 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-04-07 17:28:23,013 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.04 05:28:23" (1/1) ... [2022-04-07 17:28:23,014 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2dcfbd5e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:28:23, skipping insertion in model container [2022-04-07 17:28:23,014 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.04 05:28:23" (1/1) ... [2022-04-07 17:28:23,020 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-04-07 17:28:23,029 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-04-07 17:28:23,146 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de51.c[368,381] [2022-04-07 17:28:23,172 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-07 17:28:23,179 INFO L203 MainTranslator]: Completed pre-run [2022-04-07 17:28:23,215 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de51.c[368,381] [2022-04-07 17:28:23,239 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-07 17:28:23,253 INFO L208 MainTranslator]: Completed translation [2022-04-07 17:28:23,253 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:28:23 WrapperNode [2022-04-07 17:28:23,253 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-04-07 17:28:23,254 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-04-07 17:28:23,254 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-04-07 17:28:23,254 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-04-07 17:28:23,264 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:28:23" (1/1) ... [2022-04-07 17:28:23,264 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:28:23" (1/1) ... [2022-04-07 17:28:23,270 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:28:23" (1/1) ... [2022-04-07 17:28:23,271 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:28:23" (1/1) ... [2022-04-07 17:28:23,283 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:28:23" (1/1) ... [2022-04-07 17:28:23,288 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:28:23" (1/1) ... [2022-04-07 17:28:23,289 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:28:23" (1/1) ... [2022-04-07 17:28:23,290 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-04-07 17:28:23,291 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-04-07 17:28:23,291 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-04-07 17:28:23,291 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-04-07 17:28:23,297 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:28:23" (1/1) ... [2022-04-07 17:28:23,303 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-07 17:28:23,311 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:28:23,319 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-04-07 17:28:23,321 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-04-07 17:28:23,350 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2022-04-07 17:28:23,350 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-04-07 17:28:23,350 INFO L138 BoogieDeclarations]: Found implementation of procedure reach_error [2022-04-07 17:28:23,351 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2022-04-07 17:28:23,351 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2022-04-07 17:28:23,351 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2022-04-07 17:28:23,351 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_fail [2022-04-07 17:28:23,351 INFO L130 BoogieDeclarations]: Found specification of procedure reach_error [2022-04-07 17:28:23,352 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-04-07 17:28:23,352 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_uint [2022-04-07 17:28:23,352 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2022-04-07 17:28:23,353 INFO L130 BoogieDeclarations]: Found specification of procedure main [2022-04-07 17:28:23,353 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2022-04-07 17:28:23,353 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-04-07 17:28:23,354 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-04-07 17:28:23,356 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-04-07 17:28:23,356 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-04-07 17:28:23,356 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-04-07 17:28:23,410 INFO L234 CfgBuilder]: Building ICFG [2022-04-07 17:28:23,412 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-04-07 17:28:23,612 INFO L275 CfgBuilder]: Performing block encoding [2022-04-07 17:28:23,617 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-04-07 17:28:23,617 INFO L299 CfgBuilder]: Removed 5 assume(true) statements. [2022-04-07 17:28:23,619 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.04 05:28:23 BoogieIcfgContainer [2022-04-07 17:28:23,619 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-04-07 17:28:23,620 INFO L113 PluginConnector]: ------------------------IcfgTransformer---------------------------- [2022-04-07 17:28:23,620 INFO L271 PluginConnector]: Initializing IcfgTransformer... [2022-04-07 17:28:23,636 INFO L275 PluginConnector]: IcfgTransformer initialized [2022-04-07 17:28:23,638 INFO L185 PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.04 05:28:23" (1/1) ... [2022-04-07 17:28:23,640 INFO L168 ansformationObserver]: Applying ICFG transformation LOOP_ACCELERATION_JORDAN [2022-04-07 17:28:24,189 INFO L89 elerationTransformer]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-07 17:28:24,189 INFO L91 elerationTransformer]: Accelerated Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] to Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0) (= v_main_~y~0_6 v_main_~y~0_5)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_6 v_it_1 1) v_main_~y~0_5)))) (< v_main_~y~0_6 v_main_~y~0_5) (< 0 .cse0) (= v_main_~x~0_3 (+ v_main_~x~0_4 v_main_~y~0_6 (* (- 1) v_main_~y~0_5)))))) InVars {main_~y~0=v_main_~y~0_6, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] [2022-04-07 17:28:24,508 INFO L89 elerationTransformer]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-07 17:28:24,508 INFO L91 elerationTransformer]: Accelerated Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_~z~0=v_main_~z~0_7, main_#t~post8=|v_main_#t~post8_1|, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] to Formula: (let ((.cse0 (mod v_main_~z~0_8 4294967296))) (or (and (= v_main_~x~0_9 v_main_~x~0_8) (<= .cse0 0) (= v_main_~z~0_8 v_main_~z~0_7) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)) (and (forall ((v_it_2 Int)) (or (< 0 (mod (+ v_main_~z~0_8 (* v_it_2 4294967295)) 4294967296)) (not (<= (+ v_main_~z~0_7 v_it_2 1) v_main_~z~0_8)) (not (<= 1 v_it_2)))) (= (+ v_main_~x~0_9 v_main_~z~0_8 (* (- 1) v_main_~z~0_7)) v_main_~x~0_8) (< 0 .cse0) (< v_main_~z~0_7 v_main_~z~0_8)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_8, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] [2022-04-07 17:28:24,794 INFO L89 elerationTransformer]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-07 17:28:24,795 INFO L91 elerationTransformer]: Accelerated Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~z~0=v_main_~z~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post10=|v_main_#t~post10_1|, main_~z~0=v_main_~z~0_2, main_~y~0=v_main_~y~0_3, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] to Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (= (+ (* (- 1) v_main_~y~0_3) v_main_~y~0_4 v_main_~z~0_3) v_main_~z~0_2) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] [2022-04-07 17:28:25,053 INFO L89 elerationTransformer]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-07 17:28:25,053 INFO L91 elerationTransformer]: Accelerated Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_7, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] to Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (< v_main_~x~0_6 v_main_~x~0_7) (= (+ (* (- 1) v_main_~x~0_6) v_main_~x~0_7 v_main_~y~0_8) v_main_~y~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_8 v_main_~y~0_7) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_8, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] [2022-04-07 17:28:25,361 INFO L89 elerationTransformer]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-07 17:28:25,361 INFO L91 elerationTransformer]: Accelerated Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] to Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~x~0_11 v_main_~x~0_10) (<= .cse0 0) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)) (and (= v_main_~x~0_10 (+ v_main_~x~0_11 v_main_~z~0_10 (* (- 1) v_main_~z~0_9))) (< 0 .cse0) (forall ((v_it_5 Int)) (or (not (<= (+ v_main_~z~0_9 v_it_5 1) v_main_~z~0_10)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)))) (< v_main_~z~0_9 v_main_~z~0_10)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] [2022-04-07 17:28:25,365 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 07.04 05:28:25 BasicIcfg [2022-04-07 17:28:25,365 INFO L132 PluginConnector]: ------------------------ END IcfgTransformer---------------------------- [2022-04-07 17:28:25,366 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-04-07 17:28:25,366 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-04-07 17:28:25,369 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-04-07 17:28:25,369 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.04 05:28:23" (1/4) ... [2022-04-07 17:28:25,369 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@70604a5a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.04 05:28:25, skipping insertion in model container [2022-04-07 17:28:25,370 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:28:23" (2/4) ... [2022-04-07 17:28:25,370 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@70604a5a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.04 05:28:25, skipping insertion in model container [2022-04-07 17:28:25,370 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.04 05:28:23" (3/4) ... [2022-04-07 17:28:25,370 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@70604a5a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.04 05:28:25, skipping insertion in model container [2022-04-07 17:28:25,370 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 07.04 05:28:25" (4/4) ... [2022-04-07 17:28:25,371 INFO L111 eAbstractionObserver]: Analyzing ICFG in-de51.cJordan [2022-04-07 17:28:25,374 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:ForwardPredicates Determinization: PREDICATE_ABSTRACTION [2022-04-07 17:28:25,374 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-04-07 17:28:25,400 INFO L339 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-04-07 17:28:25,405 INFO L340 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=ForwardPredicates, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=false, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=All, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP [2022-04-07 17:28:25,405 INFO L341 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-04-07 17:28:25,417 INFO L276 IsEmpty]: Start isEmpty. Operand has 24 states, 16 states have (on average 1.75) internal successors, (28), 17 states have internal predecessors, (28), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 17:28:25,422 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-04-07 17:28:25,422 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:28:25,422 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:28:25,423 INFO L403 AbstractCegarLoop]: === Iteration 1 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:28:25,426 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:28:25,426 INFO L85 PathProgramCache]: Analyzing trace with hash 702671213, now seen corresponding path program 1 times [2022-04-07 17:28:25,434 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:28:25,434 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [758426184] [2022-04-07 17:28:25,434 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:28:25,435 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:28:25,502 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:28:25,528 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:28:25,531 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:28:25,541 INFO L290 TraceCheckUtils]: 0: Hoare triple {32#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {27#true} is VALID [2022-04-07 17:28:25,541 INFO L290 TraceCheckUtils]: 1: Hoare triple {27#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {27#true} is VALID [2022-04-07 17:28:25,542 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {27#true} {27#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {27#true} is VALID [2022-04-07 17:28:25,543 INFO L272 TraceCheckUtils]: 0: Hoare triple {27#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:28:25,543 INFO L290 TraceCheckUtils]: 1: Hoare triple {32#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {27#true} is VALID [2022-04-07 17:28:25,544 INFO L290 TraceCheckUtils]: 2: Hoare triple {27#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {27#true} is VALID [2022-04-07 17:28:25,544 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {27#true} {27#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {27#true} is VALID [2022-04-07 17:28:25,544 INFO L272 TraceCheckUtils]: 4: Hoare triple {27#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {27#true} is VALID [2022-04-07 17:28:25,544 INFO L290 TraceCheckUtils]: 5: Hoare triple {27#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {27#true} is VALID [2022-04-07 17:28:25,545 INFO L290 TraceCheckUtils]: 6: Hoare triple {27#true} [92] L16-2-->L16-3: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {28#false} is VALID [2022-04-07 17:28:25,545 INFO L290 TraceCheckUtils]: 7: Hoare triple {28#false} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {28#false} is VALID [2022-04-07 17:28:25,545 INFO L290 TraceCheckUtils]: 8: Hoare triple {28#false} [96] L23-2-->L29-1: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {28#false} is VALID [2022-04-07 17:28:25,546 INFO L290 TraceCheckUtils]: 9: Hoare triple {28#false} [99] L29-1-->L35-1: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {28#false} is VALID [2022-04-07 17:28:25,546 INFO L290 TraceCheckUtils]: 10: Hoare triple {28#false} [102] L35-1-->L41-1: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {28#false} is VALID [2022-04-07 17:28:25,546 INFO L290 TraceCheckUtils]: 11: Hoare triple {28#false} [105] L41-1-->L41-2: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {28#false} is VALID [2022-04-07 17:28:25,546 INFO L272 TraceCheckUtils]: 12: Hoare triple {28#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {28#false} is VALID [2022-04-07 17:28:25,546 INFO L290 TraceCheckUtils]: 13: Hoare triple {28#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {28#false} is VALID [2022-04-07 17:28:25,547 INFO L290 TraceCheckUtils]: 14: Hoare triple {28#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {28#false} is VALID [2022-04-07 17:28:25,547 INFO L290 TraceCheckUtils]: 15: Hoare triple {28#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28#false} is VALID [2022-04-07 17:28:25,547 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:28:25,548 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:28:25,548 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [758426184] [2022-04-07 17:28:25,548 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [758426184] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 17:28:25,549 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 17:28:25,549 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-07 17:28:25,550 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [922974803] [2022-04-07 17:28:25,550 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 17:28:25,554 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 4.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-07 17:28:25,556 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:28:25,558 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 4.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:28:25,581 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 16 edges. 16 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:28:25,581 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-07 17:28:25,582 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:28:25,598 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-07 17:28:25,598 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-07 17:28:25,600 INFO L87 Difference]: Start difference. First operand has 24 states, 16 states have (on average 1.75) internal successors, (28), 17 states have internal predecessors, (28), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 3 states, 3 states have (on average 4.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:28:25,660 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:28:25,660 INFO L93 Difference]: Finished difference Result 24 states and 28 transitions. [2022-04-07 17:28:25,661 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-07 17:28:25,661 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 4.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-07 17:28:25,661 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:28:25,662 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 4.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:28:25,669 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 34 transitions. [2022-04-07 17:28:25,669 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 4.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:28:25,671 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 34 transitions. [2022-04-07 17:28:25,671 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 34 transitions. [2022-04-07 17:28:25,713 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 34 edges. 34 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:28:25,719 INFO L225 Difference]: With dead ends: 24 [2022-04-07 17:28:25,720 INFO L226 Difference]: Without dead ends: 17 [2022-04-07 17:28:25,721 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-07 17:28:25,724 INFO L913 BasicCegarLoop]: 27 mSDtfsCounter, 19 mSDsluCounter, 3 mSDsCounter, 0 mSdLazyCounter, 3 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 20 SdHoareTripleChecker+Valid, 30 SdHoareTripleChecker+Invalid, 5 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 3 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 17:28:25,724 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [20 Valid, 30 Invalid, 5 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 3 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 17:28:25,737 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17 states. [2022-04-07 17:28:25,745 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17 to 17. [2022-04-07 17:28:25,745 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:28:25,746 INFO L82 GeneralOperation]: Start isEquivalent. First operand 17 states. Second operand has 17 states, 12 states have (on average 1.4166666666666667) internal successors, (17), 12 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:28:25,746 INFO L74 IsIncluded]: Start isIncluded. First operand 17 states. Second operand has 17 states, 12 states have (on average 1.4166666666666667) internal successors, (17), 12 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:28:25,747 INFO L87 Difference]: Start difference. First operand 17 states. Second operand has 17 states, 12 states have (on average 1.4166666666666667) internal successors, (17), 12 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:28:25,749 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:28:25,749 INFO L93 Difference]: Finished difference Result 17 states and 21 transitions. [2022-04-07 17:28:25,749 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 21 transitions. [2022-04-07 17:28:25,749 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:28:25,750 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:28:25,750 INFO L74 IsIncluded]: Start isIncluded. First operand has 17 states, 12 states have (on average 1.4166666666666667) internal successors, (17), 12 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 17 states. [2022-04-07 17:28:25,750 INFO L87 Difference]: Start difference. First operand has 17 states, 12 states have (on average 1.4166666666666667) internal successors, (17), 12 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 17 states. [2022-04-07 17:28:25,752 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:28:25,752 INFO L93 Difference]: Finished difference Result 17 states and 21 transitions. [2022-04-07 17:28:25,753 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 21 transitions. [2022-04-07 17:28:25,753 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:28:25,753 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:28:25,753 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:28:25,753 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:28:25,754 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 12 states have (on average 1.4166666666666667) internal successors, (17), 12 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:28:25,755 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 21 transitions. [2022-04-07 17:28:25,756 INFO L78 Accepts]: Start accepts. Automaton has 17 states and 21 transitions. Word has length 16 [2022-04-07 17:28:25,756 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:28:25,756 INFO L478 AbstractCegarLoop]: Abstraction has 17 states and 21 transitions. [2022-04-07 17:28:25,756 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 4.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:28:25,757 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 21 transitions. [2022-04-07 17:28:25,757 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-04-07 17:28:25,757 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:28:25,757 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:28:25,757 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-04-07 17:28:25,758 INFO L403 AbstractCegarLoop]: === Iteration 2 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:28:25,758 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:28:25,758 INFO L85 PathProgramCache]: Analyzing trace with hash -1128942900, now seen corresponding path program 1 times [2022-04-07 17:28:25,759 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:28:25,759 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [439171526] [2022-04-07 17:28:25,759 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:28:25,759 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:28:25,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:28:25,921 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:28:25,924 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:28:25,930 INFO L290 TraceCheckUtils]: 0: Hoare triple {118#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {110#true} is VALID [2022-04-07 17:28:25,930 INFO L290 TraceCheckUtils]: 1: Hoare triple {110#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {110#true} is VALID [2022-04-07 17:28:25,930 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {110#true} {110#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {110#true} is VALID [2022-04-07 17:28:25,931 INFO L272 TraceCheckUtils]: 0: Hoare triple {110#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {118#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:28:25,931 INFO L290 TraceCheckUtils]: 1: Hoare triple {118#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {110#true} is VALID [2022-04-07 17:28:25,931 INFO L290 TraceCheckUtils]: 2: Hoare triple {110#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {110#true} is VALID [2022-04-07 17:28:25,932 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {110#true} {110#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {110#true} is VALID [2022-04-07 17:28:25,932 INFO L272 TraceCheckUtils]: 4: Hoare triple {110#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {110#true} is VALID [2022-04-07 17:28:25,933 INFO L290 TraceCheckUtils]: 5: Hoare triple {110#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {115#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-07 17:28:25,933 INFO L290 TraceCheckUtils]: 6: Hoare triple {115#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {115#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-07 17:28:25,934 INFO L290 TraceCheckUtils]: 7: Hoare triple {115#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {115#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-07 17:28:25,934 INFO L290 TraceCheckUtils]: 8: Hoare triple {115#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {115#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-07 17:28:25,936 INFO L290 TraceCheckUtils]: 9: Hoare triple {115#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {115#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-07 17:28:25,937 INFO L290 TraceCheckUtils]: 10: Hoare triple {115#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {115#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-07 17:28:25,937 INFO L290 TraceCheckUtils]: 11: Hoare triple {115#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {115#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-07 17:28:25,938 INFO L272 TraceCheckUtils]: 12: Hoare triple {115#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {116#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:28:25,939 INFO L290 TraceCheckUtils]: 13: Hoare triple {116#(not (= |__VERIFIER_assert_#in~cond| 0))} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {117#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:28:25,939 INFO L290 TraceCheckUtils]: 14: Hoare triple {117#(not (= __VERIFIER_assert_~cond 0))} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {111#false} is VALID [2022-04-07 17:28:25,940 INFO L290 TraceCheckUtils]: 15: Hoare triple {111#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {111#false} is VALID [2022-04-07 17:28:25,940 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:28:25,940 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:28:25,940 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [439171526] [2022-04-07 17:28:25,940 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [439171526] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 17:28:25,940 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 17:28:25,941 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-04-07 17:28:25,941 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [334466179] [2022-04-07 17:28:25,941 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 17:28:25,942 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 2.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-07 17:28:25,942 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:28:25,942 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 6 states, 6 states have (on average 2.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:28:25,959 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 16 edges. 16 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:28:25,959 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-04-07 17:28:25,959 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:28:25,960 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-04-07 17:28:25,960 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2022-04-07 17:28:25,960 INFO L87 Difference]: Start difference. First operand 17 states and 21 transitions. Second operand has 6 states, 6 states have (on average 2.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:28:26,093 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:28:26,093 INFO L93 Difference]: Finished difference Result 29 states and 40 transitions. [2022-04-07 17:28:26,093 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-04-07 17:28:26,093 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 2.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-07 17:28:26,094 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:28:26,094 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 2.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:28:26,096 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 41 transitions. [2022-04-07 17:28:26,096 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 2.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:28:26,097 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 41 transitions. [2022-04-07 17:28:26,097 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 6 states and 41 transitions. [2022-04-07 17:28:26,143 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 41 edges. 41 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:28:26,144 INFO L225 Difference]: With dead ends: 29 [2022-04-07 17:28:26,145 INFO L226 Difference]: Without dead ends: 26 [2022-04-07 17:28:26,145 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=49, Unknown=0, NotChecked=0, Total=72 [2022-04-07 17:28:26,146 INFO L913 BasicCegarLoop]: 14 mSDtfsCounter, 17 mSDsluCounter, 19 mSDsCounter, 0 mSdLazyCounter, 37 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 17 SdHoareTripleChecker+Valid, 33 SdHoareTripleChecker+Invalid, 51 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 37 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 7 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 17:28:26,146 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [17 Valid, 33 Invalid, 51 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 37 Invalid, 0 Unknown, 7 Unchecked, 0.0s Time] [2022-04-07 17:28:26,147 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26 states. [2022-04-07 17:28:26,149 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26 to 23. [2022-04-07 17:28:26,149 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:28:26,149 INFO L82 GeneralOperation]: Start isEquivalent. First operand 26 states. Second operand has 23 states, 18 states have (on average 1.5) internal successors, (27), 18 states have internal predecessors, (27), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:28:26,150 INFO L74 IsIncluded]: Start isIncluded. First operand 26 states. Second operand has 23 states, 18 states have (on average 1.5) internal successors, (27), 18 states have internal predecessors, (27), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:28:26,150 INFO L87 Difference]: Start difference. First operand 26 states. Second operand has 23 states, 18 states have (on average 1.5) internal successors, (27), 18 states have internal predecessors, (27), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:28:26,152 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:28:26,152 INFO L93 Difference]: Finished difference Result 26 states and 37 transitions. [2022-04-07 17:28:26,152 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 37 transitions. [2022-04-07 17:28:26,152 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:28:26,152 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:28:26,153 INFO L74 IsIncluded]: Start isIncluded. First operand has 23 states, 18 states have (on average 1.5) internal successors, (27), 18 states have internal predecessors, (27), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 26 states. [2022-04-07 17:28:26,153 INFO L87 Difference]: Start difference. First operand has 23 states, 18 states have (on average 1.5) internal successors, (27), 18 states have internal predecessors, (27), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 26 states. [2022-04-07 17:28:26,154 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:28:26,155 INFO L93 Difference]: Finished difference Result 26 states and 37 transitions. [2022-04-07 17:28:26,155 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 37 transitions. [2022-04-07 17:28:26,155 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:28:26,155 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:28:26,155 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:28:26,155 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:28:26,156 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 18 states have (on average 1.5) internal successors, (27), 18 states have internal predecessors, (27), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:28:26,157 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 31 transitions. [2022-04-07 17:28:26,157 INFO L78 Accepts]: Start accepts. Automaton has 23 states and 31 transitions. Word has length 16 [2022-04-07 17:28:26,157 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:28:26,157 INFO L478 AbstractCegarLoop]: Abstraction has 23 states and 31 transitions. [2022-04-07 17:28:26,157 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 2.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:28:26,157 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 31 transitions. [2022-04-07 17:28:26,158 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-04-07 17:28:26,158 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:28:26,158 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:28:26,158 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-04-07 17:28:26,158 INFO L403 AbstractCegarLoop]: === Iteration 3 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:28:26,159 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:28:26,159 INFO L85 PathProgramCache]: Analyzing trace with hash -610770875, now seen corresponding path program 1 times [2022-04-07 17:28:26,159 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:28:26,159 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1467007222] [2022-04-07 17:28:26,159 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:28:26,159 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:28:26,181 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.0))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-07 17:28:26,191 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:28:26,232 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.1))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-07 17:28:26,282 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:28:26,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:28:26,293 INFO L290 TraceCheckUtils]: 0: Hoare triple {240#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {231#true} is VALID [2022-04-07 17:28:26,293 INFO L290 TraceCheckUtils]: 1: Hoare triple {231#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {231#true} is VALID [2022-04-07 17:28:26,293 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {231#true} {231#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {231#true} is VALID [2022-04-07 17:28:26,294 INFO L272 TraceCheckUtils]: 0: Hoare triple {231#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {240#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:28:26,294 INFO L290 TraceCheckUtils]: 1: Hoare triple {240#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {231#true} is VALID [2022-04-07 17:28:26,294 INFO L290 TraceCheckUtils]: 2: Hoare triple {231#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {231#true} is VALID [2022-04-07 17:28:26,295 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {231#true} {231#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {231#true} is VALID [2022-04-07 17:28:26,295 INFO L272 TraceCheckUtils]: 4: Hoare triple {231#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {231#true} is VALID [2022-04-07 17:28:26,295 INFO L290 TraceCheckUtils]: 5: Hoare triple {231#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {236#(= main_~n~0 main_~x~0)} is VALID [2022-04-07 17:28:26,296 INFO L290 TraceCheckUtils]: 6: Hoare triple {236#(= main_~n~0 main_~x~0)} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {236#(= main_~n~0 main_~x~0)} is VALID [2022-04-07 17:28:26,296 INFO L290 TraceCheckUtils]: 7: Hoare triple {236#(= main_~n~0 main_~x~0)} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {236#(= main_~n~0 main_~x~0)} is VALID [2022-04-07 17:28:26,297 INFO L290 TraceCheckUtils]: 8: Hoare triple {236#(= main_~n~0 main_~x~0)} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {237#(and (= main_~n~0 main_~x~0) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} is VALID [2022-04-07 17:28:26,298 INFO L290 TraceCheckUtils]: 9: Hoare triple {237#(and (= main_~n~0 main_~x~0) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {237#(and (= main_~n~0 main_~x~0) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} is VALID [2022-04-07 17:28:26,298 INFO L290 TraceCheckUtils]: 10: Hoare triple {237#(and (= main_~n~0 main_~x~0) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {237#(and (= main_~n~0 main_~x~0) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} is VALID [2022-04-07 17:28:26,299 INFO L290 TraceCheckUtils]: 11: Hoare triple {237#(and (= main_~n~0 main_~x~0) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} [107] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~x~0_11 v_main_~x~0_10) (<= .cse0 0) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)) (and (= v_main_~x~0_10 (+ v_main_~x~0_11 v_main_~z~0_10 (* (- 1) v_main_~z~0_9))) (< 0 .cse0) (forall ((v_it_5 Int)) (or (not (<= (+ v_main_~z~0_9 v_it_5 1) v_main_~z~0_10)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)))) (< v_main_~z~0_9 v_main_~z~0_10)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {236#(= main_~n~0 main_~x~0)} is VALID [2022-04-07 17:28:26,300 INFO L290 TraceCheckUtils]: 12: Hoare triple {236#(= main_~n~0 main_~x~0)} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {236#(= main_~n~0 main_~x~0)} is VALID [2022-04-07 17:28:26,301 INFO L272 TraceCheckUtils]: 13: Hoare triple {236#(= main_~n~0 main_~x~0)} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {238#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:28:26,301 INFO L290 TraceCheckUtils]: 14: Hoare triple {238#(not (= |__VERIFIER_assert_#in~cond| 0))} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {239#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:28:26,302 INFO L290 TraceCheckUtils]: 15: Hoare triple {239#(not (= __VERIFIER_assert_~cond 0))} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {232#false} is VALID [2022-04-07 17:28:26,302 INFO L290 TraceCheckUtils]: 16: Hoare triple {232#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {232#false} is VALID [2022-04-07 17:28:26,302 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:28:26,303 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:28:26,303 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1467007222] [2022-04-07 17:28:26,303 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1467007222] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:28:26,303 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [275608751] [2022-04-07 17:28:26,303 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:28:26,303 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:28:26,304 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:28:26,307 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:28:26,309 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-04-07 17:28:26,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:28:26,346 INFO L263 TraceCheckSpWp]: Trace formula consists of 62 conjuncts, 8 conjunts are in the unsatisfiable core [2022-04-07 17:28:26,372 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:28:26,375 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:28:26,772 INFO L272 TraceCheckUtils]: 0: Hoare triple {231#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {231#true} is VALID [2022-04-07 17:28:26,772 INFO L290 TraceCheckUtils]: 1: Hoare triple {231#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {231#true} is VALID [2022-04-07 17:28:26,772 INFO L290 TraceCheckUtils]: 2: Hoare triple {231#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {231#true} is VALID [2022-04-07 17:28:26,773 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {231#true} {231#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {231#true} is VALID [2022-04-07 17:28:26,773 INFO L272 TraceCheckUtils]: 4: Hoare triple {231#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {231#true} is VALID [2022-04-07 17:28:26,774 INFO L290 TraceCheckUtils]: 5: Hoare triple {231#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {236#(= main_~n~0 main_~x~0)} is VALID [2022-04-07 17:28:26,774 INFO L290 TraceCheckUtils]: 6: Hoare triple {236#(= main_~n~0 main_~x~0)} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {262#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-07 17:28:26,775 INFO L290 TraceCheckUtils]: 7: Hoare triple {262#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {262#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-07 17:28:26,775 INFO L290 TraceCheckUtils]: 8: Hoare triple {262#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {269#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-07 17:28:26,776 INFO L290 TraceCheckUtils]: 9: Hoare triple {269#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {269#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-07 17:28:26,777 INFO L290 TraceCheckUtils]: 10: Hoare triple {269#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {269#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-07 17:28:26,778 INFO L290 TraceCheckUtils]: 11: Hoare triple {269#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} [107] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~x~0_11 v_main_~x~0_10) (<= .cse0 0) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)) (and (= v_main_~x~0_10 (+ v_main_~x~0_11 v_main_~z~0_10 (* (- 1) v_main_~z~0_9))) (< 0 .cse0) (forall ((v_it_5 Int)) (or (not (<= (+ v_main_~z~0_9 v_it_5 1) v_main_~z~0_10)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)))) (< v_main_~z~0_9 v_main_~z~0_10)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {262#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-07 17:28:26,778 INFO L290 TraceCheckUtils]: 12: Hoare triple {262#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {262#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-07 17:28:26,780 INFO L272 TraceCheckUtils]: 13: Hoare triple {262#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {285#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:28:26,780 INFO L290 TraceCheckUtils]: 14: Hoare triple {285#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {289#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:28:26,780 INFO L290 TraceCheckUtils]: 15: Hoare triple {289#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {232#false} is VALID [2022-04-07 17:28:26,781 INFO L290 TraceCheckUtils]: 16: Hoare triple {232#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {232#false} is VALID [2022-04-07 17:28:26,781 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:28:26,781 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 17:28:31,212 INFO L290 TraceCheckUtils]: 16: Hoare triple {232#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {232#false} is VALID [2022-04-07 17:28:31,213 INFO L290 TraceCheckUtils]: 15: Hoare triple {289#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {232#false} is VALID [2022-04-07 17:28:31,214 INFO L290 TraceCheckUtils]: 14: Hoare triple {285#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {289#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:28:31,215 INFO L272 TraceCheckUtils]: 13: Hoare triple {305#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {285#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:28:31,215 INFO L290 TraceCheckUtils]: 12: Hoare triple {305#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {305#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is VALID [2022-04-07 17:28:33,225 WARN L290 TraceCheckUtils]: 11: Hoare triple {312#(forall ((aux_mod_v_main_~x~0_27_31 Int)) (or (> 0 aux_mod_v_main_~x~0_27_31) (>= aux_mod_v_main_~x~0_27_31 4294967296) (and (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~x~0_27_31 Int)) (not (= (+ aux_mod_v_main_~x~0_27_31 (* aux_div_v_main_~x~0_27_31 4294967296)) main_~x~0)))) (or (forall ((aux_div_v_main_~x~0_27_31 Int)) (or (not (< main_~x~0 (+ aux_mod_v_main_~x~0_27_31 (* aux_div_v_main_~x~0_27_31 4294967296)))) (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ v_it_5 main_~x~0 1) (+ aux_mod_v_main_~x~0_27_31 (* aux_div_v_main_~x~0_27_31 4294967296))))))) (not (< 0 (mod main_~z~0 4294967296))))) (= aux_mod_v_main_~x~0_27_31 (mod main_~n~0 4294967296))))} [107] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~x~0_11 v_main_~x~0_10) (<= .cse0 0) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)) (and (= v_main_~x~0_10 (+ v_main_~x~0_11 v_main_~z~0_10 (* (- 1) v_main_~z~0_9))) (< 0 .cse0) (forall ((v_it_5 Int)) (or (not (<= (+ v_main_~z~0_9 v_it_5 1) v_main_~z~0_10)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)))) (< v_main_~z~0_9 v_main_~z~0_10)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {305#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is UNKNOWN [2022-04-07 17:28:33,226 INFO L290 TraceCheckUtils]: 10: Hoare triple {312#(forall ((aux_mod_v_main_~x~0_27_31 Int)) (or (> 0 aux_mod_v_main_~x~0_27_31) (>= aux_mod_v_main_~x~0_27_31 4294967296) (and (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~x~0_27_31 Int)) (not (= (+ aux_mod_v_main_~x~0_27_31 (* aux_div_v_main_~x~0_27_31 4294967296)) main_~x~0)))) (or (forall ((aux_div_v_main_~x~0_27_31 Int)) (or (not (< main_~x~0 (+ aux_mod_v_main_~x~0_27_31 (* aux_div_v_main_~x~0_27_31 4294967296)))) (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ v_it_5 main_~x~0 1) (+ aux_mod_v_main_~x~0_27_31 (* aux_div_v_main_~x~0_27_31 4294967296))))))) (not (< 0 (mod main_~z~0 4294967296))))) (= aux_mod_v_main_~x~0_27_31 (mod main_~n~0 4294967296))))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {312#(forall ((aux_mod_v_main_~x~0_27_31 Int)) (or (> 0 aux_mod_v_main_~x~0_27_31) (>= aux_mod_v_main_~x~0_27_31 4294967296) (and (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~x~0_27_31 Int)) (not (= (+ aux_mod_v_main_~x~0_27_31 (* aux_div_v_main_~x~0_27_31 4294967296)) main_~x~0)))) (or (forall ((aux_div_v_main_~x~0_27_31 Int)) (or (not (< main_~x~0 (+ aux_mod_v_main_~x~0_27_31 (* aux_div_v_main_~x~0_27_31 4294967296)))) (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ v_it_5 main_~x~0 1) (+ aux_mod_v_main_~x~0_27_31 (* aux_div_v_main_~x~0_27_31 4294967296))))))) (not (< 0 (mod main_~z~0 4294967296))))) (= aux_mod_v_main_~x~0_27_31 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:28:33,227 INFO L290 TraceCheckUtils]: 9: Hoare triple {312#(forall ((aux_mod_v_main_~x~0_27_31 Int)) (or (> 0 aux_mod_v_main_~x~0_27_31) (>= aux_mod_v_main_~x~0_27_31 4294967296) (and (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~x~0_27_31 Int)) (not (= (+ aux_mod_v_main_~x~0_27_31 (* aux_div_v_main_~x~0_27_31 4294967296)) main_~x~0)))) (or (forall ((aux_div_v_main_~x~0_27_31 Int)) (or (not (< main_~x~0 (+ aux_mod_v_main_~x~0_27_31 (* aux_div_v_main_~x~0_27_31 4294967296)))) (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ v_it_5 main_~x~0 1) (+ aux_mod_v_main_~x~0_27_31 (* aux_div_v_main_~x~0_27_31 4294967296))))))) (not (< 0 (mod main_~z~0 4294967296))))) (= aux_mod_v_main_~x~0_27_31 (mod main_~n~0 4294967296))))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {312#(forall ((aux_mod_v_main_~x~0_27_31 Int)) (or (> 0 aux_mod_v_main_~x~0_27_31) (>= aux_mod_v_main_~x~0_27_31 4294967296) (and (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~x~0_27_31 Int)) (not (= (+ aux_mod_v_main_~x~0_27_31 (* aux_div_v_main_~x~0_27_31 4294967296)) main_~x~0)))) (or (forall ((aux_div_v_main_~x~0_27_31 Int)) (or (not (< main_~x~0 (+ aux_mod_v_main_~x~0_27_31 (* aux_div_v_main_~x~0_27_31 4294967296)))) (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ v_it_5 main_~x~0 1) (+ aux_mod_v_main_~x~0_27_31 (* aux_div_v_main_~x~0_27_31 4294967296))))))) (not (< 0 (mod main_~z~0 4294967296))))) (= aux_mod_v_main_~x~0_27_31 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:28:33,229 INFO L290 TraceCheckUtils]: 8: Hoare triple {305#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {312#(forall ((aux_mod_v_main_~x~0_27_31 Int)) (or (> 0 aux_mod_v_main_~x~0_27_31) (>= aux_mod_v_main_~x~0_27_31 4294967296) (and (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~x~0_27_31 Int)) (not (= (+ aux_mod_v_main_~x~0_27_31 (* aux_div_v_main_~x~0_27_31 4294967296)) main_~x~0)))) (or (forall ((aux_div_v_main_~x~0_27_31 Int)) (or (not (< main_~x~0 (+ aux_mod_v_main_~x~0_27_31 (* aux_div_v_main_~x~0_27_31 4294967296)))) (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ v_it_5 main_~x~0 1) (+ aux_mod_v_main_~x~0_27_31 (* aux_div_v_main_~x~0_27_31 4294967296))))))) (not (< 0 (mod main_~z~0 4294967296))))) (= aux_mod_v_main_~x~0_27_31 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:28:33,229 INFO L290 TraceCheckUtils]: 7: Hoare triple {305#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {305#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is VALID [2022-04-07 17:28:33,230 INFO L290 TraceCheckUtils]: 6: Hoare triple {328#(or (= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296)) (< 0 (mod main_~x~0 4294967296)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {305#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is VALID [2022-04-07 17:28:33,231 INFO L290 TraceCheckUtils]: 5: Hoare triple {231#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {328#(or (= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296)) (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-07 17:28:33,231 INFO L272 TraceCheckUtils]: 4: Hoare triple {231#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {231#true} is VALID [2022-04-07 17:28:33,231 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {231#true} {231#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {231#true} is VALID [2022-04-07 17:28:33,231 INFO L290 TraceCheckUtils]: 2: Hoare triple {231#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {231#true} is VALID [2022-04-07 17:28:33,231 INFO L290 TraceCheckUtils]: 1: Hoare triple {231#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {231#true} is VALID [2022-04-07 17:28:33,232 INFO L272 TraceCheckUtils]: 0: Hoare triple {231#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {231#true} is VALID [2022-04-07 17:28:33,232 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:28:33,232 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [275608751] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 17:28:33,233 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 17:28:33,233 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 14 [2022-04-07 17:28:33,233 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [125881346] [2022-04-07 17:28:33,233 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 17:28:33,234 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 2.2142857142857144) internal successors, (31), 11 states have internal predecessors, (31), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-07 17:28:33,234 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:28:33,234 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 14 states, 14 states have (on average 2.2142857142857144) internal successors, (31), 11 states have internal predecessors, (31), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:28:39,321 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 38 edges. 35 inductive. 0 not inductive. 3 times theorem prover too weak to decide inductivity. [2022-04-07 17:28:39,321 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2022-04-07 17:28:39,322 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:28:39,322 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-04-07 17:28:39,322 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=138, Unknown=1, NotChecked=0, Total=182 [2022-04-07 17:28:39,323 INFO L87 Difference]: Start difference. First operand 23 states and 31 transitions. Second operand has 14 states, 14 states have (on average 2.2142857142857144) internal successors, (31), 11 states have internal predecessors, (31), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:28:39,565 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:28:39,565 INFO L93 Difference]: Finished difference Result 34 states and 48 transitions. [2022-04-07 17:28:39,565 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-04-07 17:28:39,566 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 2.2142857142857144) internal successors, (31), 11 states have internal predecessors, (31), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-07 17:28:39,566 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:28:39,566 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 14 states have (on average 2.2142857142857144) internal successors, (31), 11 states have internal predecessors, (31), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:28:39,568 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 44 transitions. [2022-04-07 17:28:39,568 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 14 states have (on average 2.2142857142857144) internal successors, (31), 11 states have internal predecessors, (31), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:28:39,569 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 44 transitions. [2022-04-07 17:28:39,570 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 9 states and 44 transitions. [2022-04-07 17:28:39,625 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 44 edges. 44 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:28:39,627 INFO L225 Difference]: With dead ends: 34 [2022-04-07 17:28:39,627 INFO L226 Difference]: Without dead ends: 31 [2022-04-07 17:28:39,627 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 47 GetRequests, 26 SyntacticMatches, 4 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 69 ImplicationChecksByTransitivity, 2.4s TimeCoverageRelationStatistics Valid=82, Invalid=259, Unknown=1, NotChecked=0, Total=342 [2022-04-07 17:28:39,628 INFO L913 BasicCegarLoop]: 14 mSDtfsCounter, 19 mSDsluCounter, 47 mSDsCounter, 0 mSdLazyCounter, 75 mSolverCounterSat, 11 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 19 SdHoareTripleChecker+Valid, 61 SdHoareTripleChecker+Invalid, 106 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 11 IncrementalHoareTripleChecker+Valid, 75 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 20 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 17:28:39,628 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [19 Valid, 61 Invalid, 106 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [11 Valid, 75 Invalid, 0 Unknown, 20 Unchecked, 0.1s Time] [2022-04-07 17:28:39,629 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31 states. [2022-04-07 17:28:39,632 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31 to 26. [2022-04-07 17:28:39,632 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:28:39,632 INFO L82 GeneralOperation]: Start isEquivalent. First operand 31 states. Second operand has 26 states, 21 states have (on average 1.5238095238095237) internal successors, (32), 21 states have internal predecessors, (32), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:28:39,632 INFO L74 IsIncluded]: Start isIncluded. First operand 31 states. Second operand has 26 states, 21 states have (on average 1.5238095238095237) internal successors, (32), 21 states have internal predecessors, (32), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:28:39,632 INFO L87 Difference]: Start difference. First operand 31 states. Second operand has 26 states, 21 states have (on average 1.5238095238095237) internal successors, (32), 21 states have internal predecessors, (32), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:28:39,634 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:28:39,634 INFO L93 Difference]: Finished difference Result 31 states and 45 transitions. [2022-04-07 17:28:39,635 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 45 transitions. [2022-04-07 17:28:39,635 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:28:39,635 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:28:39,635 INFO L74 IsIncluded]: Start isIncluded. First operand has 26 states, 21 states have (on average 1.5238095238095237) internal successors, (32), 21 states have internal predecessors, (32), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 31 states. [2022-04-07 17:28:39,635 INFO L87 Difference]: Start difference. First operand has 26 states, 21 states have (on average 1.5238095238095237) internal successors, (32), 21 states have internal predecessors, (32), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 31 states. [2022-04-07 17:28:39,637 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:28:39,637 INFO L93 Difference]: Finished difference Result 31 states and 45 transitions. [2022-04-07 17:28:39,637 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 45 transitions. [2022-04-07 17:28:39,638 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:28:39,638 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:28:39,638 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:28:39,638 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:28:39,638 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 21 states have (on average 1.5238095238095237) internal successors, (32), 21 states have internal predecessors, (32), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:28:39,639 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 36 transitions. [2022-04-07 17:28:39,639 INFO L78 Accepts]: Start accepts. Automaton has 26 states and 36 transitions. Word has length 17 [2022-04-07 17:28:39,640 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:28:39,640 INFO L478 AbstractCegarLoop]: Abstraction has 26 states and 36 transitions. [2022-04-07 17:28:39,640 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 14 states have (on average 2.2142857142857144) internal successors, (31), 11 states have internal predecessors, (31), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:28:39,640 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 36 transitions. [2022-04-07 17:28:39,641 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-04-07 17:28:39,641 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:28:39,641 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:28:39,658 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2022-04-07 17:28:39,843 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2,2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:28:39,844 INFO L403 AbstractCegarLoop]: === Iteration 4 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:28:39,844 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:28:39,844 INFO L85 PathProgramCache]: Analyzing trace with hash 162216202, now seen corresponding path program 1 times [2022-04-07 17:28:39,845 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:28:39,845 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [452003938] [2022-04-07 17:28:39,845 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:28:39,845 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:28:39,857 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.0))) (+ .cse0 main_~x~0_5 (* (- 4294967296) (div (+ .cse0 main_~x~0_5) 4294967296)))) 0)) [2022-04-07 17:28:39,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:28:39,877 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.1))) (+ .cse0 main_~x~0_5 (* (- 4294967296) (div (+ .cse0 main_~x~0_5) 4294967296)))) 0)) [2022-04-07 17:28:39,999 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:28:40,001 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:28:40,006 INFO L290 TraceCheckUtils]: 0: Hoare triple {492#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {481#true} is VALID [2022-04-07 17:28:40,007 INFO L290 TraceCheckUtils]: 1: Hoare triple {481#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {481#true} is VALID [2022-04-07 17:28:40,007 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {481#true} {481#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {481#true} is VALID [2022-04-07 17:28:40,008 INFO L272 TraceCheckUtils]: 0: Hoare triple {481#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {492#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:28:40,008 INFO L290 TraceCheckUtils]: 1: Hoare triple {492#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {481#true} is VALID [2022-04-07 17:28:40,008 INFO L290 TraceCheckUtils]: 2: Hoare triple {481#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {481#true} is VALID [2022-04-07 17:28:40,008 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {481#true} {481#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {481#true} is VALID [2022-04-07 17:28:40,008 INFO L272 TraceCheckUtils]: 4: Hoare triple {481#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {481#true} is VALID [2022-04-07 17:28:40,009 INFO L290 TraceCheckUtils]: 5: Hoare triple {481#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {486#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-07 17:28:40,010 INFO L290 TraceCheckUtils]: 6: Hoare triple {486#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {487#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} is VALID [2022-04-07 17:28:40,010 INFO L290 TraceCheckUtils]: 7: Hoare triple {487#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {487#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} is VALID [2022-04-07 17:28:40,011 INFO L290 TraceCheckUtils]: 8: Hoare triple {487#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {487#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} is VALID [2022-04-07 17:28:40,012 INFO L290 TraceCheckUtils]: 9: Hoare triple {487#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {487#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} is VALID [2022-04-07 17:28:40,014 INFO L290 TraceCheckUtils]: 10: Hoare triple {487#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} [104] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (< v_main_~x~0_6 v_main_~x~0_7) (= (+ (* (- 1) v_main_~x~0_6) v_main_~x~0_7 v_main_~y~0_8) v_main_~y~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_8 v_main_~y~0_7) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_8, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {488#(and (<= (div main_~x~0 4294967296) (div main_~n~0 4294967296)) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:28:40,015 INFO L290 TraceCheckUtils]: 11: Hoare triple {488#(and (<= (div main_~x~0 4294967296) (div main_~n~0 4294967296)) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {489#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= (* 4294967296 (div main_~x~0 4294967296)) main_~n~0) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:28:40,015 INFO L290 TraceCheckUtils]: 12: Hoare triple {489#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= (* 4294967296 (div main_~x~0 4294967296)) main_~n~0) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {489#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= (* 4294967296 (div main_~x~0 4294967296)) main_~n~0) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:28:40,017 INFO L272 TraceCheckUtils]: 13: Hoare triple {489#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= (* 4294967296 (div main_~x~0 4294967296)) main_~n~0) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {490#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:28:40,017 INFO L290 TraceCheckUtils]: 14: Hoare triple {490#(not (= |__VERIFIER_assert_#in~cond| 0))} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {491#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:28:40,017 INFO L290 TraceCheckUtils]: 15: Hoare triple {491#(not (= __VERIFIER_assert_~cond 0))} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {482#false} is VALID [2022-04-07 17:28:40,018 INFO L290 TraceCheckUtils]: 16: Hoare triple {482#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {482#false} is VALID [2022-04-07 17:28:40,018 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:28:40,018 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:28:40,018 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [452003938] [2022-04-07 17:28:40,018 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [452003938] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:28:40,019 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2057438392] [2022-04-07 17:28:40,019 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:28:40,019 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:28:40,019 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:28:40,020 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:28:40,025 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-04-07 17:28:40,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:28:40,060 INFO L263 TraceCheckSpWp]: Trace formula consists of 62 conjuncts, 8 conjunts are in the unsatisfiable core [2022-04-07 17:28:40,069 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:28:40,070 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:28:40,404 INFO L272 TraceCheckUtils]: 0: Hoare triple {481#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {481#true} is VALID [2022-04-07 17:28:40,405 INFO L290 TraceCheckUtils]: 1: Hoare triple {481#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {481#true} is VALID [2022-04-07 17:28:40,405 INFO L290 TraceCheckUtils]: 2: Hoare triple {481#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {481#true} is VALID [2022-04-07 17:28:40,405 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {481#true} {481#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {481#true} is VALID [2022-04-07 17:28:40,405 INFO L272 TraceCheckUtils]: 4: Hoare triple {481#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {481#true} is VALID [2022-04-07 17:28:40,406 INFO L290 TraceCheckUtils]: 5: Hoare triple {481#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {486#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-07 17:28:40,407 INFO L290 TraceCheckUtils]: 6: Hoare triple {486#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {487#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} is VALID [2022-04-07 17:28:40,408 INFO L290 TraceCheckUtils]: 7: Hoare triple {487#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {487#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} is VALID [2022-04-07 17:28:40,408 INFO L290 TraceCheckUtils]: 8: Hoare triple {487#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {487#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} is VALID [2022-04-07 17:28:40,410 INFO L290 TraceCheckUtils]: 9: Hoare triple {487#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {487#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} is VALID [2022-04-07 17:28:40,412 INFO L290 TraceCheckUtils]: 10: Hoare triple {487#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} [104] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (< v_main_~x~0_6 v_main_~x~0_7) (= (+ (* (- 1) v_main_~x~0_6) v_main_~x~0_7 v_main_~y~0_8) v_main_~y~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_8 v_main_~y~0_7) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_8, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {487#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} is VALID [2022-04-07 17:28:40,424 INFO L290 TraceCheckUtils]: 11: Hoare triple {487#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {487#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} is VALID [2022-04-07 17:28:40,424 INFO L290 TraceCheckUtils]: 12: Hoare triple {487#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {487#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} is VALID [2022-04-07 17:28:40,426 INFO L272 TraceCheckUtils]: 13: Hoare triple {487#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {535#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:28:40,426 INFO L290 TraceCheckUtils]: 14: Hoare triple {535#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {539#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:28:40,427 INFO L290 TraceCheckUtils]: 15: Hoare triple {539#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {482#false} is VALID [2022-04-07 17:28:40,427 INFO L290 TraceCheckUtils]: 16: Hoare triple {482#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {482#false} is VALID [2022-04-07 17:28:40,427 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 17:28:40,427 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-07 17:28:40,427 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2057438392] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 17:28:40,427 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-07 17:28:40,428 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [9] total 11 [2022-04-07 17:28:40,428 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [910874728] [2022-04-07 17:28:40,428 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 17:28:40,428 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 2.1666666666666665) internal successors, (13), 5 states have internal predecessors, (13), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-07 17:28:40,429 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:28:40,429 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 6 states, 6 states have (on average 2.1666666666666665) internal successors, (13), 5 states have internal predecessors, (13), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:28:40,445 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 17 edges. 17 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:28:40,445 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-04-07 17:28:40,445 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:28:40,446 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-04-07 17:28:40,446 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2022-04-07 17:28:40,446 INFO L87 Difference]: Start difference. First operand 26 states and 36 transitions. Second operand has 6 states, 6 states have (on average 2.1666666666666665) internal successors, (13), 5 states have internal predecessors, (13), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:28:40,520 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:28:40,521 INFO L93 Difference]: Finished difference Result 32 states and 43 transitions. [2022-04-07 17:28:40,521 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-04-07 17:28:40,521 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 2.1666666666666665) internal successors, (13), 5 states have internal predecessors, (13), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-07 17:28:40,521 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:28:40,521 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 2.1666666666666665) internal successors, (13), 5 states have internal predecessors, (13), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:28:40,522 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 35 transitions. [2022-04-07 17:28:40,522 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 2.1666666666666665) internal successors, (13), 5 states have internal predecessors, (13), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:28:40,524 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 35 transitions. [2022-04-07 17:28:40,524 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 6 states and 35 transitions. [2022-04-07 17:28:40,563 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 35 edges. 35 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:28:40,564 INFO L225 Difference]: With dead ends: 32 [2022-04-07 17:28:40,564 INFO L226 Difference]: Without dead ends: 29 [2022-04-07 17:28:40,564 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 13 SyntacticMatches, 4 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 42 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=33, Invalid=99, Unknown=0, NotChecked=0, Total=132 [2022-04-07 17:28:40,565 INFO L913 BasicCegarLoop]: 14 mSDtfsCounter, 9 mSDsluCounter, 37 mSDsCounter, 0 mSdLazyCounter, 17 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 9 SdHoareTripleChecker+Valid, 51 SdHoareTripleChecker+Invalid, 21 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 17 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 4 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 17:28:40,565 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [9 Valid, 51 Invalid, 21 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 17 Invalid, 0 Unknown, 4 Unchecked, 0.0s Time] [2022-04-07 17:28:40,566 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states. [2022-04-07 17:28:40,568 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 26. [2022-04-07 17:28:40,568 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:28:40,568 INFO L82 GeneralOperation]: Start isEquivalent. First operand 29 states. Second operand has 26 states, 21 states have (on average 1.5238095238095237) internal successors, (32), 21 states have internal predecessors, (32), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:28:40,568 INFO L74 IsIncluded]: Start isIncluded. First operand 29 states. Second operand has 26 states, 21 states have (on average 1.5238095238095237) internal successors, (32), 21 states have internal predecessors, (32), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:28:40,568 INFO L87 Difference]: Start difference. First operand 29 states. Second operand has 26 states, 21 states have (on average 1.5238095238095237) internal successors, (32), 21 states have internal predecessors, (32), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:28:40,570 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:28:40,570 INFO L93 Difference]: Finished difference Result 29 states and 40 transitions. [2022-04-07 17:28:40,570 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 40 transitions. [2022-04-07 17:28:40,570 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:28:40,571 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:28:40,571 INFO L74 IsIncluded]: Start isIncluded. First operand has 26 states, 21 states have (on average 1.5238095238095237) internal successors, (32), 21 states have internal predecessors, (32), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 29 states. [2022-04-07 17:28:40,571 INFO L87 Difference]: Start difference. First operand has 26 states, 21 states have (on average 1.5238095238095237) internal successors, (32), 21 states have internal predecessors, (32), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 29 states. [2022-04-07 17:28:40,572 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:28:40,572 INFO L93 Difference]: Finished difference Result 29 states and 40 transitions. [2022-04-07 17:28:40,573 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 40 transitions. [2022-04-07 17:28:40,573 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:28:40,573 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:28:40,573 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:28:40,573 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:28:40,573 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 21 states have (on average 1.5238095238095237) internal successors, (32), 21 states have internal predecessors, (32), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:28:40,574 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 36 transitions. [2022-04-07 17:28:40,574 INFO L78 Accepts]: Start accepts. Automaton has 26 states and 36 transitions. Word has length 17 [2022-04-07 17:28:40,575 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:28:40,575 INFO L478 AbstractCegarLoop]: Abstraction has 26 states and 36 transitions. [2022-04-07 17:28:40,575 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 2.1666666666666665) internal successors, (13), 5 states have internal predecessors, (13), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:28:40,575 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 36 transitions. [2022-04-07 17:28:40,575 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-04-07 17:28:40,576 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:28:40,576 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:28:40,602 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2022-04-07 17:28:40,791 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable3 [2022-04-07 17:28:40,792 INFO L403 AbstractCegarLoop]: === Iteration 5 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:28:40,792 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:28:40,792 INFO L85 PathProgramCache]: Analyzing trace with hash -1833749398, now seen corresponding path program 1 times [2022-04-07 17:28:40,792 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:28:40,792 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1089773233] [2022-04-07 17:28:40,792 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:28:40,792 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:28:40,802 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.0))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-07 17:28:40,816 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:28:40,825 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.1))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-07 17:28:40,924 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:28:40,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:28:40,933 INFO L290 TraceCheckUtils]: 0: Hoare triple {674#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {663#true} is VALID [2022-04-07 17:28:40,933 INFO L290 TraceCheckUtils]: 1: Hoare triple {663#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {663#true} is VALID [2022-04-07 17:28:40,933 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {663#true} {663#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {663#true} is VALID [2022-04-07 17:28:40,934 INFO L272 TraceCheckUtils]: 0: Hoare triple {663#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {674#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:28:40,934 INFO L290 TraceCheckUtils]: 1: Hoare triple {674#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {663#true} is VALID [2022-04-07 17:28:40,934 INFO L290 TraceCheckUtils]: 2: Hoare triple {663#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {663#true} is VALID [2022-04-07 17:28:40,934 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {663#true} {663#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {663#true} is VALID [2022-04-07 17:28:40,935 INFO L272 TraceCheckUtils]: 4: Hoare triple {663#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {663#true} is VALID [2022-04-07 17:28:40,935 INFO L290 TraceCheckUtils]: 5: Hoare triple {663#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {668#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-07 17:28:40,936 INFO L290 TraceCheckUtils]: 6: Hoare triple {668#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {669#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 17:28:40,936 INFO L290 TraceCheckUtils]: 7: Hoare triple {669#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {669#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 17:28:40,938 INFO L290 TraceCheckUtils]: 8: Hoare triple {669#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [98] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_8 4294967296))) (or (and (= v_main_~x~0_9 v_main_~x~0_8) (<= .cse0 0) (= v_main_~z~0_8 v_main_~z~0_7) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)) (and (forall ((v_it_2 Int)) (or (< 0 (mod (+ v_main_~z~0_8 (* v_it_2 4294967295)) 4294967296)) (not (<= (+ v_main_~z~0_7 v_it_2 1) v_main_~z~0_8)) (not (<= 1 v_it_2)))) (= (+ v_main_~x~0_9 v_main_~z~0_8 (* (- 1) v_main_~z~0_7)) v_main_~x~0_8) (< 0 .cse0) (< v_main_~z~0_7 v_main_~z~0_8)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_8, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {670#(< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))} is VALID [2022-04-07 17:28:40,938 INFO L290 TraceCheckUtils]: 9: Hoare triple {670#(< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {670#(< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))} is VALID [2022-04-07 17:28:40,939 INFO L290 TraceCheckUtils]: 10: Hoare triple {670#(< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {670#(< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))} is VALID [2022-04-07 17:28:40,940 INFO L290 TraceCheckUtils]: 11: Hoare triple {670#(< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {671#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:28:40,940 INFO L290 TraceCheckUtils]: 12: Hoare triple {671#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {671#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:28:40,942 INFO L272 TraceCheckUtils]: 13: Hoare triple {671#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {672#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:28:40,942 INFO L290 TraceCheckUtils]: 14: Hoare triple {672#(not (= |__VERIFIER_assert_#in~cond| 0))} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {673#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:28:40,942 INFO L290 TraceCheckUtils]: 15: Hoare triple {673#(not (= __VERIFIER_assert_~cond 0))} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {664#false} is VALID [2022-04-07 17:28:40,943 INFO L290 TraceCheckUtils]: 16: Hoare triple {664#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {664#false} is VALID [2022-04-07 17:28:40,943 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:28:40,943 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:28:40,943 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1089773233] [2022-04-07 17:28:40,943 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1089773233] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:28:40,943 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1007227580] [2022-04-07 17:28:40,944 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:28:40,944 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:28:40,944 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:28:40,945 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:28:40,946 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-04-07 17:28:40,978 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:28:40,978 INFO L263 TraceCheckSpWp]: Trace formula consists of 62 conjuncts, 7 conjunts are in the unsatisfiable core [2022-04-07 17:28:40,985 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:28:40,985 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:28:41,556 INFO L272 TraceCheckUtils]: 0: Hoare triple {663#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {663#true} is VALID [2022-04-07 17:28:41,557 INFO L290 TraceCheckUtils]: 1: Hoare triple {663#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {663#true} is VALID [2022-04-07 17:28:41,557 INFO L290 TraceCheckUtils]: 2: Hoare triple {663#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {663#true} is VALID [2022-04-07 17:28:41,557 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {663#true} {663#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {663#true} is VALID [2022-04-07 17:28:41,557 INFO L272 TraceCheckUtils]: 4: Hoare triple {663#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {663#true} is VALID [2022-04-07 17:28:41,558 INFO L290 TraceCheckUtils]: 5: Hoare triple {663#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {668#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-07 17:28:41,559 INFO L290 TraceCheckUtils]: 6: Hoare triple {668#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {696#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:28:41,559 INFO L290 TraceCheckUtils]: 7: Hoare triple {696#(not (< 0 (mod main_~n~0 4294967296)))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {696#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:28:41,559 INFO L290 TraceCheckUtils]: 8: Hoare triple {696#(not (< 0 (mod main_~n~0 4294967296)))} [98] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_8 4294967296))) (or (and (= v_main_~x~0_9 v_main_~x~0_8) (<= .cse0 0) (= v_main_~z~0_8 v_main_~z~0_7) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)) (and (forall ((v_it_2 Int)) (or (< 0 (mod (+ v_main_~z~0_8 (* v_it_2 4294967295)) 4294967296)) (not (<= (+ v_main_~z~0_7 v_it_2 1) v_main_~z~0_8)) (not (<= 1 v_it_2)))) (= (+ v_main_~x~0_9 v_main_~z~0_8 (* (- 1) v_main_~z~0_7)) v_main_~x~0_8) (< 0 .cse0) (< v_main_~z~0_7 v_main_~z~0_8)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_8, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {696#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:28:41,560 INFO L290 TraceCheckUtils]: 9: Hoare triple {696#(not (< 0 (mod main_~n~0 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {696#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:28:41,560 INFO L290 TraceCheckUtils]: 10: Hoare triple {696#(not (< 0 (mod main_~n~0 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {696#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:28:41,561 INFO L290 TraceCheckUtils]: 11: Hoare triple {696#(not (< 0 (mod main_~n~0 4294967296)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {712#(and (not (< 0 (mod main_~x~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:28:41,561 INFO L290 TraceCheckUtils]: 12: Hoare triple {712#(and (not (< 0 (mod main_~x~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {712#(and (not (< 0 (mod main_~x~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:28:41,562 INFO L272 TraceCheckUtils]: 13: Hoare triple {712#(and (not (< 0 (mod main_~x~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {719#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:28:41,563 INFO L290 TraceCheckUtils]: 14: Hoare triple {719#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {723#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:28:41,563 INFO L290 TraceCheckUtils]: 15: Hoare triple {723#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {664#false} is VALID [2022-04-07 17:28:41,563 INFO L290 TraceCheckUtils]: 16: Hoare triple {664#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {664#false} is VALID [2022-04-07 17:28:41,564 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 17:28:41,564 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-07 17:28:41,564 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1007227580] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 17:28:41,564 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-07 17:28:41,564 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [9] total 13 [2022-04-07 17:28:41,564 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [315020082] [2022-04-07 17:28:41,564 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 17:28:41,565 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 1.8571428571428572) internal successors, (13), 6 states have internal predecessors, (13), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-07 17:28:41,565 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:28:41,565 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 7 states, 7 states have (on average 1.8571428571428572) internal successors, (13), 6 states have internal predecessors, (13), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:28:41,582 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 17 edges. 17 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:28:41,582 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-04-07 17:28:41,582 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:28:41,582 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-04-07 17:28:41,583 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=119, Unknown=0, NotChecked=0, Total=156 [2022-04-07 17:28:41,583 INFO L87 Difference]: Start difference. First operand 26 states and 36 transitions. Second operand has 7 states, 7 states have (on average 1.8571428571428572) internal successors, (13), 6 states have internal predecessors, (13), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:28:41,710 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:28:41,711 INFO L93 Difference]: Finished difference Result 35 states and 49 transitions. [2022-04-07 17:28:41,711 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-04-07 17:28:41,711 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 1.8571428571428572) internal successors, (13), 6 states have internal predecessors, (13), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-07 17:28:41,711 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:28:41,711 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 1.8571428571428572) internal successors, (13), 6 states have internal predecessors, (13), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:28:41,713 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 42 transitions. [2022-04-07 17:28:41,713 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 1.8571428571428572) internal successors, (13), 6 states have internal predecessors, (13), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:28:41,714 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 42 transitions. [2022-04-07 17:28:41,714 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 8 states and 42 transitions. [2022-04-07 17:28:41,753 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 42 edges. 42 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:28:41,753 INFO L225 Difference]: With dead ends: 35 [2022-04-07 17:28:41,754 INFO L226 Difference]: Without dead ends: 32 [2022-04-07 17:28:41,754 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 14 SyntacticMatches, 2 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 46 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=43, Invalid=139, Unknown=0, NotChecked=0, Total=182 [2022-04-07 17:28:41,755 INFO L913 BasicCegarLoop]: 14 mSDtfsCounter, 15 mSDsluCounter, 63 mSDsCounter, 0 mSdLazyCounter, 25 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 15 SdHoareTripleChecker+Valid, 77 SdHoareTripleChecker+Invalid, 30 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 25 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 4 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 17:28:41,755 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [15 Valid, 77 Invalid, 30 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 25 Invalid, 0 Unknown, 4 Unchecked, 0.0s Time] [2022-04-07 17:28:41,755 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states. [2022-04-07 17:28:41,757 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 29. [2022-04-07 17:28:41,757 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:28:41,757 INFO L82 GeneralOperation]: Start isEquivalent. First operand 32 states. Second operand has 29 states, 24 states have (on average 1.5833333333333333) internal successors, (38), 24 states have internal predecessors, (38), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:28:41,758 INFO L74 IsIncluded]: Start isIncluded. First operand 32 states. Second operand has 29 states, 24 states have (on average 1.5833333333333333) internal successors, (38), 24 states have internal predecessors, (38), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:28:41,758 INFO L87 Difference]: Start difference. First operand 32 states. Second operand has 29 states, 24 states have (on average 1.5833333333333333) internal successors, (38), 24 states have internal predecessors, (38), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:28:41,759 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:28:41,759 INFO L93 Difference]: Finished difference Result 32 states and 46 transitions. [2022-04-07 17:28:41,759 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 46 transitions. [2022-04-07 17:28:41,760 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:28:41,760 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:28:41,760 INFO L74 IsIncluded]: Start isIncluded. First operand has 29 states, 24 states have (on average 1.5833333333333333) internal successors, (38), 24 states have internal predecessors, (38), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 32 states. [2022-04-07 17:28:41,760 INFO L87 Difference]: Start difference. First operand has 29 states, 24 states have (on average 1.5833333333333333) internal successors, (38), 24 states have internal predecessors, (38), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 32 states. [2022-04-07 17:28:41,761 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:28:41,761 INFO L93 Difference]: Finished difference Result 32 states and 46 transitions. [2022-04-07 17:28:41,762 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 46 transitions. [2022-04-07 17:28:41,762 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:28:41,762 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:28:41,762 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:28:41,762 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:28:41,762 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 24 states have (on average 1.5833333333333333) internal successors, (38), 24 states have internal predecessors, (38), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:28:41,763 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 42 transitions. [2022-04-07 17:28:41,763 INFO L78 Accepts]: Start accepts. Automaton has 29 states and 42 transitions. Word has length 17 [2022-04-07 17:28:41,764 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:28:41,764 INFO L478 AbstractCegarLoop]: Abstraction has 29 states and 42 transitions. [2022-04-07 17:28:41,764 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 1.8571428571428572) internal successors, (13), 6 states have internal predecessors, (13), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:28:41,764 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 42 transitions. [2022-04-07 17:28:41,764 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-04-07 17:28:41,764 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:28:41,764 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:28:41,787 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-04-07 17:28:41,979 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:28:41,980 INFO L403 AbstractCegarLoop]: === Iteration 6 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:28:41,980 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:28:41,980 INFO L85 PathProgramCache]: Analyzing trace with hash -2110277654, now seen corresponding path program 1 times [2022-04-07 17:28:41,980 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:28:41,980 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2093686334] [2022-04-07 17:28:41,980 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:28:41,980 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:28:41,990 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_1.0))) (+ main_~x~0_5 .cse0 (* (- 4294967296) (div (+ main_~x~0_5 .cse0) 4294967296)))) 0)) [2022-04-07 17:28:42,002 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:28:42,011 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_1.1))) (+ main_~x~0_5 .cse0 (* (- 4294967296) (div (+ main_~x~0_5 .cse0) 4294967296)))) 0)) [2022-04-07 17:28:42,152 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:28:42,154 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:28:42,161 INFO L290 TraceCheckUtils]: 0: Hoare triple {871#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {860#true} is VALID [2022-04-07 17:28:42,161 INFO L290 TraceCheckUtils]: 1: Hoare triple {860#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {860#true} is VALID [2022-04-07 17:28:42,161 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {860#true} {860#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {860#true} is VALID [2022-04-07 17:28:42,162 INFO L272 TraceCheckUtils]: 0: Hoare triple {860#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {871#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:28:42,162 INFO L290 TraceCheckUtils]: 1: Hoare triple {871#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {860#true} is VALID [2022-04-07 17:28:42,162 INFO L290 TraceCheckUtils]: 2: Hoare triple {860#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {860#true} is VALID [2022-04-07 17:28:42,162 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {860#true} {860#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {860#true} is VALID [2022-04-07 17:28:42,162 INFO L272 TraceCheckUtils]: 4: Hoare triple {860#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {860#true} is VALID [2022-04-07 17:28:42,163 INFO L290 TraceCheckUtils]: 5: Hoare triple {860#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {865#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 17:28:42,220 INFO L290 TraceCheckUtils]: 6: Hoare triple {865#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [94] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0) (= v_main_~y~0_6 v_main_~y~0_5)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_6 v_it_1 1) v_main_~y~0_5)))) (< v_main_~y~0_6 v_main_~y~0_5) (< 0 .cse0) (= v_main_~x~0_3 (+ v_main_~x~0_4 v_main_~y~0_6 (* (- 1) v_main_~y~0_5)))))) InVars {main_~y~0=v_main_~y~0_6, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {866#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:28:42,221 INFO L290 TraceCheckUtils]: 7: Hoare triple {866#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {867#(or (and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-07 17:28:42,222 INFO L290 TraceCheckUtils]: 8: Hoare triple {867#(or (and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {867#(or (and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-07 17:28:42,223 INFO L290 TraceCheckUtils]: 9: Hoare triple {867#(or (and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {867#(or (and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-07 17:28:42,224 INFO L290 TraceCheckUtils]: 10: Hoare triple {867#(or (and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {868#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:28:42,224 INFO L290 TraceCheckUtils]: 11: Hoare triple {868#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {868#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:28:42,225 INFO L290 TraceCheckUtils]: 12: Hoare triple {868#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {868#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:28:42,226 INFO L272 TraceCheckUtils]: 13: Hoare triple {868#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {869#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:28:42,227 INFO L290 TraceCheckUtils]: 14: Hoare triple {869#(not (= |__VERIFIER_assert_#in~cond| 0))} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {870#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:28:42,228 INFO L290 TraceCheckUtils]: 15: Hoare triple {870#(not (= __VERIFIER_assert_~cond 0))} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {861#false} is VALID [2022-04-07 17:28:42,228 INFO L290 TraceCheckUtils]: 16: Hoare triple {861#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {861#false} is VALID [2022-04-07 17:28:42,228 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:28:42,228 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:28:42,228 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2093686334] [2022-04-07 17:28:42,228 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2093686334] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:28:42,228 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1051276463] [2022-04-07 17:28:42,229 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:28:42,229 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:28:42,229 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:28:42,230 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:28:42,262 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-04-07 17:28:42,296 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:28:42,297 INFO L263 TraceCheckSpWp]: Trace formula consists of 62 conjuncts, 12 conjunts are in the unsatisfiable core [2022-04-07 17:28:42,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:28:42,313 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:28:43,272 INFO L272 TraceCheckUtils]: 0: Hoare triple {860#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {860#true} is VALID [2022-04-07 17:28:43,272 INFO L290 TraceCheckUtils]: 1: Hoare triple {860#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {860#true} is VALID [2022-04-07 17:28:43,273 INFO L290 TraceCheckUtils]: 2: Hoare triple {860#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {860#true} is VALID [2022-04-07 17:28:43,273 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {860#true} {860#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {860#true} is VALID [2022-04-07 17:28:43,273 INFO L272 TraceCheckUtils]: 4: Hoare triple {860#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {860#true} is VALID [2022-04-07 17:28:43,273 INFO L290 TraceCheckUtils]: 5: Hoare triple {860#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {865#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 17:28:43,278 INFO L290 TraceCheckUtils]: 6: Hoare triple {865#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [94] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0) (= v_main_~y~0_6 v_main_~y~0_5)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_6 v_it_1 1) v_main_~y~0_5)))) (< v_main_~y~0_6 v_main_~y~0_5) (< 0 .cse0) (= v_main_~x~0_3 (+ v_main_~x~0_4 v_main_~y~0_6 (* (- 1) v_main_~y~0_5)))))) InVars {main_~y~0=v_main_~y~0_6, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {893#(or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)))} is VALID [2022-04-07 17:28:43,279 INFO L290 TraceCheckUtils]: 7: Hoare triple {893#(or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {897#(and (not (< 0 (mod main_~x~0 4294967296))) (or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (= main_~y~0 0))))} is VALID [2022-04-07 17:28:43,281 INFO L290 TraceCheckUtils]: 8: Hoare triple {897#(and (not (< 0 (mod main_~x~0 4294967296))) (or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (= main_~y~0 0))))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {901#(and (or (and (= main_~z~0 0) (= main_~n~0 main_~x~0)) (and (< 0 main_~z~0) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~z~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (= (+ main_~n~0 (* (- 1) main_~z~0)) main_~x~0))) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-07 17:28:43,284 INFO L290 TraceCheckUtils]: 9: Hoare triple {901#(and (or (and (= main_~z~0 0) (= main_~n~0 main_~x~0)) (and (< 0 main_~z~0) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~z~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (= (+ main_~n~0 (* (- 1) main_~z~0)) main_~x~0))) (not (< 0 (mod main_~x~0 4294967296))))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {905#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-07 17:28:43,284 INFO L290 TraceCheckUtils]: 10: Hoare triple {905#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {905#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-07 17:28:43,285 INFO L290 TraceCheckUtils]: 11: Hoare triple {905#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {905#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-07 17:28:43,285 INFO L290 TraceCheckUtils]: 12: Hoare triple {905#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {905#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-07 17:28:43,286 INFO L272 TraceCheckUtils]: 13: Hoare triple {905#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {918#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:28:43,287 INFO L290 TraceCheckUtils]: 14: Hoare triple {918#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {922#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:28:43,291 INFO L290 TraceCheckUtils]: 15: Hoare triple {922#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {861#false} is VALID [2022-04-07 17:28:43,291 INFO L290 TraceCheckUtils]: 16: Hoare triple {861#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {861#false} is VALID [2022-04-07 17:28:43,292 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:28:43,292 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 17:28:47,145 INFO L290 TraceCheckUtils]: 16: Hoare triple {861#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {861#false} is VALID [2022-04-07 17:28:47,146 INFO L290 TraceCheckUtils]: 15: Hoare triple {922#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {861#false} is VALID [2022-04-07 17:28:47,146 INFO L290 TraceCheckUtils]: 14: Hoare triple {918#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {922#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:28:47,148 INFO L272 TraceCheckUtils]: 13: Hoare triple {868#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {918#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:28:47,148 INFO L290 TraceCheckUtils]: 12: Hoare triple {868#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {868#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:28:47,149 INFO L290 TraceCheckUtils]: 11: Hoare triple {868#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {868#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:28:47,150 INFO L290 TraceCheckUtils]: 10: Hoare triple {868#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {868#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:28:47,150 INFO L290 TraceCheckUtils]: 9: Hoare triple {950#(or (and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))) (< 0 (mod main_~z~0 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {868#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:28:47,151 INFO L290 TraceCheckUtils]: 8: Hoare triple {867#(or (and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {950#(or (and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))) (< 0 (mod main_~z~0 4294967296)))} is VALID [2022-04-07 17:28:47,152 INFO L290 TraceCheckUtils]: 7: Hoare triple {866#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {867#(or (and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-07 17:28:48,755 INFO L290 TraceCheckUtils]: 6: Hoare triple {960#(forall ((aux_div_aux_mod_v_main_~x~0_31_31_87 Int) (aux_div_v_main_~x~0_31_31 Int) (aux_mod_aux_mod_v_main_~x~0_31_31_87 Int)) (or (>= aux_mod_aux_mod_v_main_~x~0_31_31_87 4294967296) (and (or (exists ((v_it_1 Int)) (and (<= (+ v_it_1 aux_mod_aux_mod_v_main_~x~0_31_31_87 (* aux_div_aux_mod_v_main_~x~0_31_31_87 4294967296) 1) main_~x~0) (not (< 0 (mod (+ main_~x~0 (* v_it_1 4294967295)) 4294967296))) (<= 1 v_it_1))) (forall ((aux_div_v_main_~y~0_22_31 Int)) (or (<= (+ (* aux_div_v_main_~y~0_22_31 4294967296) (* aux_div_aux_mod_v_main_~x~0_31_31_87 4294967296) 1) (+ main_~y~0 main_~x~0)) (< (+ main_~y~0 main_~x~0) (+ aux_mod_aux_mod_v_main_~x~0_31_31_87 (* aux_div_v_main_~y~0_22_31 4294967296) (* aux_div_aux_mod_v_main_~x~0_31_31_87 4294967296))))) (not (< 0 (mod main_~x~0 4294967296))) (not (< (+ aux_mod_aux_mod_v_main_~x~0_31_31_87 (* aux_div_aux_mod_v_main_~x~0_31_31_87 4294967296)) main_~x~0))) (or (forall ((aux_div_v_main_~y~0_22_31 Int)) (or (< main_~y~0 (* aux_div_v_main_~y~0_22_31 4294967296)) (<= (+ (* aux_div_v_main_~y~0_22_31 4294967296) 1) (+ main_~y~0 aux_mod_aux_mod_v_main_~x~0_31_31_87)))) (not (= main_~x~0 (+ aux_mod_aux_mod_v_main_~x~0_31_31_87 (* aux_div_aux_mod_v_main_~x~0_31_31_87 4294967296)))))) (< (+ aux_mod_aux_mod_v_main_~x~0_31_31_87 (* aux_div_aux_mod_v_main_~x~0_31_31_87 4294967296)) (* aux_div_v_main_~x~0_31_31 4294967296)) (< (+ main_~n~0 (* aux_div_v_main_~x~0_31_31 4294967296)) (+ aux_mod_aux_mod_v_main_~x~0_31_31_87 (* (div main_~n~0 4294967296) 4294967296) (* aux_div_aux_mod_v_main_~x~0_31_31_87 4294967296) 1)) (> 0 aux_mod_aux_mod_v_main_~x~0_31_31_87)))} [94] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0) (= v_main_~y~0_6 v_main_~y~0_5)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_6 v_it_1 1) v_main_~y~0_5)))) (< v_main_~y~0_6 v_main_~y~0_5) (< 0 .cse0) (= v_main_~x~0_3 (+ v_main_~x~0_4 v_main_~y~0_6 (* (- 1) v_main_~y~0_5)))))) InVars {main_~y~0=v_main_~y~0_6, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {866#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:28:48,760 INFO L290 TraceCheckUtils]: 5: Hoare triple {860#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {960#(forall ((aux_div_aux_mod_v_main_~x~0_31_31_87 Int) (aux_div_v_main_~x~0_31_31 Int) (aux_mod_aux_mod_v_main_~x~0_31_31_87 Int)) (or (>= aux_mod_aux_mod_v_main_~x~0_31_31_87 4294967296) (and (or (exists ((v_it_1 Int)) (and (<= (+ v_it_1 aux_mod_aux_mod_v_main_~x~0_31_31_87 (* aux_div_aux_mod_v_main_~x~0_31_31_87 4294967296) 1) main_~x~0) (not (< 0 (mod (+ main_~x~0 (* v_it_1 4294967295)) 4294967296))) (<= 1 v_it_1))) (forall ((aux_div_v_main_~y~0_22_31 Int)) (or (<= (+ (* aux_div_v_main_~y~0_22_31 4294967296) (* aux_div_aux_mod_v_main_~x~0_31_31_87 4294967296) 1) (+ main_~y~0 main_~x~0)) (< (+ main_~y~0 main_~x~0) (+ aux_mod_aux_mod_v_main_~x~0_31_31_87 (* aux_div_v_main_~y~0_22_31 4294967296) (* aux_div_aux_mod_v_main_~x~0_31_31_87 4294967296))))) (not (< 0 (mod main_~x~0 4294967296))) (not (< (+ aux_mod_aux_mod_v_main_~x~0_31_31_87 (* aux_div_aux_mod_v_main_~x~0_31_31_87 4294967296)) main_~x~0))) (or (forall ((aux_div_v_main_~y~0_22_31 Int)) (or (< main_~y~0 (* aux_div_v_main_~y~0_22_31 4294967296)) (<= (+ (* aux_div_v_main_~y~0_22_31 4294967296) 1) (+ main_~y~0 aux_mod_aux_mod_v_main_~x~0_31_31_87)))) (not (= main_~x~0 (+ aux_mod_aux_mod_v_main_~x~0_31_31_87 (* aux_div_aux_mod_v_main_~x~0_31_31_87 4294967296)))))) (< (+ aux_mod_aux_mod_v_main_~x~0_31_31_87 (* aux_div_aux_mod_v_main_~x~0_31_31_87 4294967296)) (* aux_div_v_main_~x~0_31_31 4294967296)) (< (+ main_~n~0 (* aux_div_v_main_~x~0_31_31 4294967296)) (+ aux_mod_aux_mod_v_main_~x~0_31_31_87 (* (div main_~n~0 4294967296) 4294967296) (* aux_div_aux_mod_v_main_~x~0_31_31_87 4294967296) 1)) (> 0 aux_mod_aux_mod_v_main_~x~0_31_31_87)))} is VALID [2022-04-07 17:28:48,761 INFO L272 TraceCheckUtils]: 4: Hoare triple {860#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {860#true} is VALID [2022-04-07 17:28:48,761 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {860#true} {860#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {860#true} is VALID [2022-04-07 17:28:48,761 INFO L290 TraceCheckUtils]: 2: Hoare triple {860#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {860#true} is VALID [2022-04-07 17:28:48,761 INFO L290 TraceCheckUtils]: 1: Hoare triple {860#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {860#true} is VALID [2022-04-07 17:28:48,761 INFO L272 TraceCheckUtils]: 0: Hoare triple {860#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {860#true} is VALID [2022-04-07 17:28:48,761 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:28:48,762 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1051276463] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 17:28:48,762 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 17:28:48,762 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9] total 17 [2022-04-07 17:28:48,762 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [905164230] [2022-04-07 17:28:48,762 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 17:28:48,763 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 17 states have (on average 1.6470588235294117) internal successors, (28), 14 states have internal predecessors, (28), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-07 17:28:48,763 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:28:48,763 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 17 states, 17 states have (on average 1.6470588235294117) internal successors, (28), 14 states have internal predecessors, (28), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:28:50,944 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 35 edges. 34 inductive. 0 not inductive. 1 times theorem prover too weak to decide inductivity. [2022-04-07 17:28:50,945 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 17 states [2022-04-07 17:28:50,945 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:28:50,945 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2022-04-07 17:28:50,946 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=56, Invalid=216, Unknown=0, NotChecked=0, Total=272 [2022-04-07 17:28:50,946 INFO L87 Difference]: Start difference. First operand 29 states and 42 transitions. Second operand has 17 states, 17 states have (on average 1.6470588235294117) internal successors, (28), 14 states have internal predecessors, (28), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:28:51,986 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:28:51,986 INFO L93 Difference]: Finished difference Result 52 states and 80 transitions. [2022-04-07 17:28:51,986 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-04-07 17:28:51,987 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 17 states have (on average 1.6470588235294117) internal successors, (28), 14 states have internal predecessors, (28), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-07 17:28:51,987 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:28:51,987 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 17 states have (on average 1.6470588235294117) internal successors, (28), 14 states have internal predecessors, (28), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:28:51,989 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 60 transitions. [2022-04-07 17:28:51,989 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 17 states have (on average 1.6470588235294117) internal successors, (28), 14 states have internal predecessors, (28), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:28:51,990 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 60 transitions. [2022-04-07 17:28:51,990 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 15 states and 60 transitions. [2022-04-07 17:28:52,146 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 60 edges. 60 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:28:52,147 INFO L225 Difference]: With dead ends: 52 [2022-04-07 17:28:52,147 INFO L226 Difference]: Without dead ends: 48 [2022-04-07 17:28:52,148 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 53 GetRequests, 24 SyntacticMatches, 6 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 149 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=139, Invalid=461, Unknown=0, NotChecked=0, Total=600 [2022-04-07 17:28:52,149 INFO L913 BasicCegarLoop]: 9 mSDtfsCounter, 39 mSDsluCounter, 72 mSDsCounter, 0 mSdLazyCounter, 93 mSolverCounterSat, 11 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 39 SdHoareTripleChecker+Valid, 81 SdHoareTripleChecker+Invalid, 159 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 11 IncrementalHoareTripleChecker+Valid, 93 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 55 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 17:28:52,149 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [39 Valid, 81 Invalid, 159 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [11 Valid, 93 Invalid, 0 Unknown, 55 Unchecked, 0.1s Time] [2022-04-07 17:28:52,149 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states. [2022-04-07 17:28:52,151 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 34. [2022-04-07 17:28:52,152 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:28:52,152 INFO L82 GeneralOperation]: Start isEquivalent. First operand 48 states. Second operand has 34 states, 29 states have (on average 1.6206896551724137) internal successors, (47), 29 states have internal predecessors, (47), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:28:52,152 INFO L74 IsIncluded]: Start isIncluded. First operand 48 states. Second operand has 34 states, 29 states have (on average 1.6206896551724137) internal successors, (47), 29 states have internal predecessors, (47), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:28:52,152 INFO L87 Difference]: Start difference. First operand 48 states. Second operand has 34 states, 29 states have (on average 1.6206896551724137) internal successors, (47), 29 states have internal predecessors, (47), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:28:52,154 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:28:52,154 INFO L93 Difference]: Finished difference Result 48 states and 75 transitions. [2022-04-07 17:28:52,154 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 75 transitions. [2022-04-07 17:28:52,155 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:28:52,155 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:28:52,155 INFO L74 IsIncluded]: Start isIncluded. First operand has 34 states, 29 states have (on average 1.6206896551724137) internal successors, (47), 29 states have internal predecessors, (47), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 48 states. [2022-04-07 17:28:52,155 INFO L87 Difference]: Start difference. First operand has 34 states, 29 states have (on average 1.6206896551724137) internal successors, (47), 29 states have internal predecessors, (47), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 48 states. [2022-04-07 17:28:52,157 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:28:52,157 INFO L93 Difference]: Finished difference Result 48 states and 75 transitions. [2022-04-07 17:28:52,157 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 75 transitions. [2022-04-07 17:28:52,158 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:28:52,158 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:28:52,158 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:28:52,158 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:28:52,158 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 29 states have (on average 1.6206896551724137) internal successors, (47), 29 states have internal predecessors, (47), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:28:52,159 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 51 transitions. [2022-04-07 17:28:52,159 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 51 transitions. Word has length 17 [2022-04-07 17:28:52,159 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:28:52,160 INFO L478 AbstractCegarLoop]: Abstraction has 34 states and 51 transitions. [2022-04-07 17:28:52,160 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 17 states, 17 states have (on average 1.6470588235294117) internal successors, (28), 14 states have internal predecessors, (28), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:28:52,160 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 51 transitions. [2022-04-07 17:28:52,160 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-04-07 17:28:52,160 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:28:52,160 INFO L499 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:28:52,187 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2022-04-07 17:28:52,375 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5,5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:28:52,375 INFO L403 AbstractCegarLoop]: === Iteration 7 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:28:52,376 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:28:52,376 INFO L85 PathProgramCache]: Analyzing trace with hash -1727307284, now seen corresponding path program 2 times [2022-04-07 17:28:52,376 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:28:52,376 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [811946809] [2022-04-07 17:28:52,376 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:28:52,376 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:28:52,391 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.0))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-07 17:28:52,399 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.1))) (+ main_~z~0_11 .cse0 (* (- 4294967296) (div (+ main_~z~0_11 .cse0) 4294967296)))) 0)) [2022-04-07 17:28:52,407 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:28:52,431 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.2))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-07 17:28:52,433 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.3))) (+ main_~z~0_11 .cse0 (* (- 4294967296) (div (+ main_~z~0_11 .cse0) 4294967296)))) 0)) [2022-04-07 17:28:52,506 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:28:52,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:28:52,511 INFO L290 TraceCheckUtils]: 0: Hoare triple {1191#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1181#true} is VALID [2022-04-07 17:28:52,512 INFO L290 TraceCheckUtils]: 1: Hoare triple {1181#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1181#true} is VALID [2022-04-07 17:28:52,512 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1181#true} {1181#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1181#true} is VALID [2022-04-07 17:28:52,512 INFO L272 TraceCheckUtils]: 0: Hoare triple {1181#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1191#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:28:52,513 INFO L290 TraceCheckUtils]: 1: Hoare triple {1191#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1181#true} is VALID [2022-04-07 17:28:52,513 INFO L290 TraceCheckUtils]: 2: Hoare triple {1181#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1181#true} is VALID [2022-04-07 17:28:52,513 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1181#true} {1181#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1181#true} is VALID [2022-04-07 17:28:52,513 INFO L272 TraceCheckUtils]: 4: Hoare triple {1181#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1181#true} is VALID [2022-04-07 17:28:52,513 INFO L290 TraceCheckUtils]: 5: Hoare triple {1181#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1186#(and (= main_~n~0 main_~x~0) (= main_~y~0 0))} is VALID [2022-04-07 17:28:52,514 INFO L290 TraceCheckUtils]: 6: Hoare triple {1186#(and (= main_~n~0 main_~x~0) (= main_~y~0 0))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1186#(and (= main_~n~0 main_~x~0) (= main_~y~0 0))} is VALID [2022-04-07 17:28:52,514 INFO L290 TraceCheckUtils]: 7: Hoare triple {1186#(and (= main_~n~0 main_~x~0) (= main_~y~0 0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1187#(and (= main_~z~0 0) (= main_~n~0 main_~x~0))} is VALID [2022-04-07 17:28:52,515 INFO L290 TraceCheckUtils]: 8: Hoare triple {1187#(and (= main_~z~0 0) (= main_~n~0 main_~x~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1187#(and (= main_~z~0 0) (= main_~n~0 main_~x~0))} is VALID [2022-04-07 17:28:52,515 INFO L290 TraceCheckUtils]: 9: Hoare triple {1187#(and (= main_~z~0 0) (= main_~n~0 main_~x~0))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1187#(and (= main_~z~0 0) (= main_~n~0 main_~x~0))} is VALID [2022-04-07 17:28:52,515 INFO L290 TraceCheckUtils]: 10: Hoare triple {1187#(and (= main_~z~0 0) (= main_~n~0 main_~x~0))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1187#(and (= main_~z~0 0) (= main_~n~0 main_~x~0))} is VALID [2022-04-07 17:28:52,516 INFO L290 TraceCheckUtils]: 11: Hoare triple {1187#(and (= main_~z~0 0) (= main_~n~0 main_~x~0))} [107] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~x~0_11 v_main_~x~0_10) (<= .cse0 0) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)) (and (= v_main_~x~0_10 (+ v_main_~x~0_11 v_main_~z~0_10 (* (- 1) v_main_~z~0_9))) (< 0 .cse0) (forall ((v_it_5 Int)) (or (not (<= (+ v_main_~z~0_9 v_it_5 1) v_main_~z~0_10)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)))) (< v_main_~z~0_9 v_main_~z~0_10)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {1187#(and (= main_~z~0 0) (= main_~n~0 main_~x~0))} is VALID [2022-04-07 17:28:52,517 INFO L290 TraceCheckUtils]: 12: Hoare triple {1187#(and (= main_~z~0 0) (= main_~n~0 main_~x~0))} [107] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~x~0_11 v_main_~x~0_10) (<= .cse0 0) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)) (and (= v_main_~x~0_10 (+ v_main_~x~0_11 v_main_~z~0_10 (* (- 1) v_main_~z~0_9))) (< 0 .cse0) (forall ((v_it_5 Int)) (or (not (<= (+ v_main_~z~0_9 v_it_5 1) v_main_~z~0_10)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)))) (< v_main_~z~0_9 v_main_~z~0_10)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {1188#(= main_~n~0 main_~x~0)} is VALID [2022-04-07 17:28:52,517 INFO L290 TraceCheckUtils]: 13: Hoare triple {1188#(= main_~n~0 main_~x~0)} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1188#(= main_~n~0 main_~x~0)} is VALID [2022-04-07 17:28:52,518 INFO L272 TraceCheckUtils]: 14: Hoare triple {1188#(= main_~n~0 main_~x~0)} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {1189#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:28:52,518 INFO L290 TraceCheckUtils]: 15: Hoare triple {1189#(not (= |__VERIFIER_assert_#in~cond| 0))} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1190#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:28:52,518 INFO L290 TraceCheckUtils]: 16: Hoare triple {1190#(not (= __VERIFIER_assert_~cond 0))} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1182#false} is VALID [2022-04-07 17:28:52,518 INFO L290 TraceCheckUtils]: 17: Hoare triple {1182#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1182#false} is VALID [2022-04-07 17:28:52,519 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 17:28:52,519 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:28:52,519 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [811946809] [2022-04-07 17:28:52,519 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [811946809] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:28:52,519 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [998558539] [2022-04-07 17:28:52,519 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-07 17:28:52,519 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:28:52,519 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:28:52,520 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:28:52,521 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-04-07 17:28:52,560 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-07 17:28:52,560 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 17:28:52,561 INFO L263 TraceCheckSpWp]: Trace formula consists of 63 conjuncts, 9 conjunts are in the unsatisfiable core [2022-04-07 17:28:52,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:28:52,572 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:28:52,964 INFO L272 TraceCheckUtils]: 0: Hoare triple {1181#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1181#true} is VALID [2022-04-07 17:28:52,964 INFO L290 TraceCheckUtils]: 1: Hoare triple {1181#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1181#true} is VALID [2022-04-07 17:28:52,964 INFO L290 TraceCheckUtils]: 2: Hoare triple {1181#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1181#true} is VALID [2022-04-07 17:28:52,964 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1181#true} {1181#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1181#true} is VALID [2022-04-07 17:28:52,964 INFO L272 TraceCheckUtils]: 4: Hoare triple {1181#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1181#true} is VALID [2022-04-07 17:28:52,965 INFO L290 TraceCheckUtils]: 5: Hoare triple {1181#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1188#(= main_~n~0 main_~x~0)} is VALID [2022-04-07 17:28:52,965 INFO L290 TraceCheckUtils]: 6: Hoare triple {1188#(= main_~n~0 main_~x~0)} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1213#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-07 17:28:52,966 INFO L290 TraceCheckUtils]: 7: Hoare triple {1213#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1213#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-07 17:28:52,966 INFO L290 TraceCheckUtils]: 8: Hoare triple {1213#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1220#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-07 17:28:52,967 INFO L290 TraceCheckUtils]: 9: Hoare triple {1220#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1220#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-07 17:28:52,968 INFO L290 TraceCheckUtils]: 10: Hoare triple {1220#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1220#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-07 17:28:52,969 INFO L290 TraceCheckUtils]: 11: Hoare triple {1220#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} [107] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~x~0_11 v_main_~x~0_10) (<= .cse0 0) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)) (and (= v_main_~x~0_10 (+ v_main_~x~0_11 v_main_~z~0_10 (* (- 1) v_main_~z~0_9))) (< 0 .cse0) (forall ((v_it_5 Int)) (or (not (<= (+ v_main_~z~0_9 v_it_5 1) v_main_~z~0_10)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)))) (< v_main_~z~0_9 v_main_~z~0_10)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {1220#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-07 17:28:52,970 INFO L290 TraceCheckUtils]: 12: Hoare triple {1220#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} [107] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~x~0_11 v_main_~x~0_10) (<= .cse0 0) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)) (and (= v_main_~x~0_10 (+ v_main_~x~0_11 v_main_~z~0_10 (* (- 1) v_main_~z~0_9))) (< 0 .cse0) (forall ((v_it_5 Int)) (or (not (<= (+ v_main_~z~0_9 v_it_5 1) v_main_~z~0_10)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)))) (< v_main_~z~0_9 v_main_~z~0_10)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {1213#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-07 17:28:52,970 INFO L290 TraceCheckUtils]: 13: Hoare triple {1213#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1213#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-07 17:28:52,971 INFO L272 TraceCheckUtils]: 14: Hoare triple {1213#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {1239#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:28:52,972 INFO L290 TraceCheckUtils]: 15: Hoare triple {1239#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1243#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:28:52,972 INFO L290 TraceCheckUtils]: 16: Hoare triple {1243#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1182#false} is VALID [2022-04-07 17:28:52,972 INFO L290 TraceCheckUtils]: 17: Hoare triple {1182#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1182#false} is VALID [2022-04-07 17:28:52,973 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 17:28:52,973 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 17:29:01,111 WARN L833 $PredicateComparison]: unable to prove that (forall ((aux_mod_v_main_~x~0_35_31 Int)) (or (= aux_mod_v_main_~x~0_35_31 (mod c_main_~n~0 4294967296)) (let ((.cse1 (< 0 (mod c_main_~z~0 4294967296)))) (and (or (forall ((v_main_~x~0_36 Int)) (or (not (< c_main_~x~0 v_main_~x~0_36)) (let ((.cse0 (< 0 (mod (+ (* v_main_~x~0_36 4294967295) c_main_~x~0 c_main_~z~0) 4294967296)))) (and (or (forall ((aux_div_v_main_~x~0_35_31 Int)) (not (= v_main_~x~0_36 (+ aux_mod_v_main_~x~0_35_31 (* aux_div_v_main_~x~0_35_31 4294967296))))) .cse0) (or (forall ((aux_div_v_main_~x~0_35_31 Int)) (or (not (< v_main_~x~0_36 (+ aux_mod_v_main_~x~0_35_31 (* aux_div_v_main_~x~0_35_31 4294967296)))) (exists ((v_it_5 Int)) (and (<= 1 v_it_5) (<= (+ v_main_~x~0_36 v_it_5 1) (+ aux_mod_v_main_~x~0_35_31 (* aux_div_v_main_~x~0_35_31 4294967296))) (not (< 0 (mod (+ (* v_main_~x~0_36 4294967295) (* v_it_5 4294967295) c_main_~x~0 c_main_~z~0) 4294967296))))))) (not .cse0)))) (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ (* v_it_5 4294967295) c_main_~z~0) 4294967296))) (<= (+ v_it_5 c_main_~x~0 1) v_main_~x~0_36) (<= 1 v_it_5))))) (not .cse1)) (or (forall ((aux_div_v_main_~x~0_35_31 Int)) (not (= (+ aux_mod_v_main_~x~0_35_31 (* aux_div_v_main_~x~0_35_31 4294967296)) c_main_~x~0))) .cse1))) (>= aux_mod_v_main_~x~0_35_31 4294967296) (> 0 aux_mod_v_main_~x~0_35_31))) is different from false [2022-04-07 17:29:08,218 INFO L290 TraceCheckUtils]: 17: Hoare triple {1182#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1182#false} is VALID [2022-04-07 17:29:08,219 INFO L290 TraceCheckUtils]: 16: Hoare triple {1243#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1182#false} is VALID [2022-04-07 17:29:08,219 INFO L290 TraceCheckUtils]: 15: Hoare triple {1239#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1243#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:29:08,220 INFO L272 TraceCheckUtils]: 14: Hoare triple {1259#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {1239#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:29:08,220 INFO L290 TraceCheckUtils]: 13: Hoare triple {1259#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1259#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is VALID [2022-04-07 17:29:10,248 WARN L290 TraceCheckUtils]: 12: Hoare triple {1266#(forall ((aux_mod_v_main_~x~0_35_31 Int)) (or (and (or (forall ((aux_div_v_main_~x~0_35_31 Int)) (or (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ v_it_5 main_~x~0 1) (+ aux_mod_v_main_~x~0_35_31 (* aux_div_v_main_~x~0_35_31 4294967296))))) (not (< main_~x~0 (+ aux_mod_v_main_~x~0_35_31 (* aux_div_v_main_~x~0_35_31 4294967296)))))) (not (< 0 (mod main_~z~0 4294967296)))) (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~x~0_35_31 Int)) (not (= (+ aux_mod_v_main_~x~0_35_31 (* aux_div_v_main_~x~0_35_31 4294967296)) main_~x~0))))) (= aux_mod_v_main_~x~0_35_31 (mod main_~n~0 4294967296)) (>= aux_mod_v_main_~x~0_35_31 4294967296) (> 0 aux_mod_v_main_~x~0_35_31)))} [107] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~x~0_11 v_main_~x~0_10) (<= .cse0 0) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)) (and (= v_main_~x~0_10 (+ v_main_~x~0_11 v_main_~z~0_10 (* (- 1) v_main_~z~0_9))) (< 0 .cse0) (forall ((v_it_5 Int)) (or (not (<= (+ v_main_~z~0_9 v_it_5 1) v_main_~z~0_10)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)))) (< v_main_~z~0_9 v_main_~z~0_10)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {1259#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is UNKNOWN [2022-04-07 17:29:12,265 WARN L290 TraceCheckUtils]: 11: Hoare triple {1270#(forall ((aux_mod_v_main_~x~0_35_31 Int)) (or (= aux_mod_v_main_~x~0_35_31 (mod main_~n~0 4294967296)) (>= aux_mod_v_main_~x~0_35_31 4294967296) (and (or (not (< 0 (mod main_~z~0 4294967296))) (forall ((v_main_~x~0_36 Int)) (or (not (< main_~x~0 v_main_~x~0_36)) (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ v_it_5 main_~x~0 1) v_main_~x~0_36))) (and (or (forall ((aux_div_v_main_~x~0_35_31 Int)) (or (not (< v_main_~x~0_36 (+ aux_mod_v_main_~x~0_35_31 (* aux_div_v_main_~x~0_35_31 4294967296)))) (exists ((v_it_5 Int)) (and (<= 1 v_it_5) (<= (+ v_main_~x~0_36 v_it_5 1) (+ aux_mod_v_main_~x~0_35_31 (* aux_div_v_main_~x~0_35_31 4294967296))) (not (< 0 (mod (+ (* v_main_~x~0_36 4294967295) main_~z~0 main_~x~0 (* v_it_5 4294967295)) 4294967296))))))) (not (< 0 (mod (+ (* v_main_~x~0_36 4294967295) main_~z~0 main_~x~0) 4294967296)))) (or (forall ((aux_div_v_main_~x~0_35_31 Int)) (not (= v_main_~x~0_36 (+ aux_mod_v_main_~x~0_35_31 (* aux_div_v_main_~x~0_35_31 4294967296))))) (< 0 (mod (+ (* v_main_~x~0_36 4294967295) main_~z~0 main_~x~0) 4294967296))))))) (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~x~0_35_31 Int)) (not (= (+ aux_mod_v_main_~x~0_35_31 (* aux_div_v_main_~x~0_35_31 4294967296)) main_~x~0))))) (> 0 aux_mod_v_main_~x~0_35_31)))} [107] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~x~0_11 v_main_~x~0_10) (<= .cse0 0) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)) (and (= v_main_~x~0_10 (+ v_main_~x~0_11 v_main_~z~0_10 (* (- 1) v_main_~z~0_9))) (< 0 .cse0) (forall ((v_it_5 Int)) (or (not (<= (+ v_main_~z~0_9 v_it_5 1) v_main_~z~0_10)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)))) (< v_main_~z~0_9 v_main_~z~0_10)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {1266#(forall ((aux_mod_v_main_~x~0_35_31 Int)) (or (and (or (forall ((aux_div_v_main_~x~0_35_31 Int)) (or (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ v_it_5 main_~x~0 1) (+ aux_mod_v_main_~x~0_35_31 (* aux_div_v_main_~x~0_35_31 4294967296))))) (not (< main_~x~0 (+ aux_mod_v_main_~x~0_35_31 (* aux_div_v_main_~x~0_35_31 4294967296)))))) (not (< 0 (mod main_~z~0 4294967296)))) (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~x~0_35_31 Int)) (not (= (+ aux_mod_v_main_~x~0_35_31 (* aux_div_v_main_~x~0_35_31 4294967296)) main_~x~0))))) (= aux_mod_v_main_~x~0_35_31 (mod main_~n~0 4294967296)) (>= aux_mod_v_main_~x~0_35_31 4294967296) (> 0 aux_mod_v_main_~x~0_35_31)))} is UNKNOWN [2022-04-07 17:29:14,283 WARN L290 TraceCheckUtils]: 10: Hoare triple {1270#(forall ((aux_mod_v_main_~x~0_35_31 Int)) (or (= aux_mod_v_main_~x~0_35_31 (mod main_~n~0 4294967296)) (>= aux_mod_v_main_~x~0_35_31 4294967296) (and (or (not (< 0 (mod main_~z~0 4294967296))) (forall ((v_main_~x~0_36 Int)) (or (not (< main_~x~0 v_main_~x~0_36)) (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ v_it_5 main_~x~0 1) v_main_~x~0_36))) (and (or (forall ((aux_div_v_main_~x~0_35_31 Int)) (or (not (< v_main_~x~0_36 (+ aux_mod_v_main_~x~0_35_31 (* aux_div_v_main_~x~0_35_31 4294967296)))) (exists ((v_it_5 Int)) (and (<= 1 v_it_5) (<= (+ v_main_~x~0_36 v_it_5 1) (+ aux_mod_v_main_~x~0_35_31 (* aux_div_v_main_~x~0_35_31 4294967296))) (not (< 0 (mod (+ (* v_main_~x~0_36 4294967295) main_~z~0 main_~x~0 (* v_it_5 4294967295)) 4294967296))))))) (not (< 0 (mod (+ (* v_main_~x~0_36 4294967295) main_~z~0 main_~x~0) 4294967296)))) (or (forall ((aux_div_v_main_~x~0_35_31 Int)) (not (= v_main_~x~0_36 (+ aux_mod_v_main_~x~0_35_31 (* aux_div_v_main_~x~0_35_31 4294967296))))) (< 0 (mod (+ (* v_main_~x~0_36 4294967295) main_~z~0 main_~x~0) 4294967296))))))) (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~x~0_35_31 Int)) (not (= (+ aux_mod_v_main_~x~0_35_31 (* aux_div_v_main_~x~0_35_31 4294967296)) main_~x~0))))) (> 0 aux_mod_v_main_~x~0_35_31)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1270#(forall ((aux_mod_v_main_~x~0_35_31 Int)) (or (= aux_mod_v_main_~x~0_35_31 (mod main_~n~0 4294967296)) (>= aux_mod_v_main_~x~0_35_31 4294967296) (and (or (not (< 0 (mod main_~z~0 4294967296))) (forall ((v_main_~x~0_36 Int)) (or (not (< main_~x~0 v_main_~x~0_36)) (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ v_it_5 main_~x~0 1) v_main_~x~0_36))) (and (or (forall ((aux_div_v_main_~x~0_35_31 Int)) (or (not (< v_main_~x~0_36 (+ aux_mod_v_main_~x~0_35_31 (* aux_div_v_main_~x~0_35_31 4294967296)))) (exists ((v_it_5 Int)) (and (<= 1 v_it_5) (<= (+ v_main_~x~0_36 v_it_5 1) (+ aux_mod_v_main_~x~0_35_31 (* aux_div_v_main_~x~0_35_31 4294967296))) (not (< 0 (mod (+ (* v_main_~x~0_36 4294967295) main_~z~0 main_~x~0 (* v_it_5 4294967295)) 4294967296))))))) (not (< 0 (mod (+ (* v_main_~x~0_36 4294967295) main_~z~0 main_~x~0) 4294967296)))) (or (forall ((aux_div_v_main_~x~0_35_31 Int)) (not (= v_main_~x~0_36 (+ aux_mod_v_main_~x~0_35_31 (* aux_div_v_main_~x~0_35_31 4294967296))))) (< 0 (mod (+ (* v_main_~x~0_36 4294967295) main_~z~0 main_~x~0) 4294967296))))))) (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~x~0_35_31 Int)) (not (= (+ aux_mod_v_main_~x~0_35_31 (* aux_div_v_main_~x~0_35_31 4294967296)) main_~x~0))))) (> 0 aux_mod_v_main_~x~0_35_31)))} is UNKNOWN [2022-04-07 17:29:16,301 WARN L290 TraceCheckUtils]: 9: Hoare triple {1270#(forall ((aux_mod_v_main_~x~0_35_31 Int)) (or (= aux_mod_v_main_~x~0_35_31 (mod main_~n~0 4294967296)) (>= aux_mod_v_main_~x~0_35_31 4294967296) (and (or (not (< 0 (mod main_~z~0 4294967296))) (forall ((v_main_~x~0_36 Int)) (or (not (< main_~x~0 v_main_~x~0_36)) (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ v_it_5 main_~x~0 1) v_main_~x~0_36))) (and (or (forall ((aux_div_v_main_~x~0_35_31 Int)) (or (not (< v_main_~x~0_36 (+ aux_mod_v_main_~x~0_35_31 (* aux_div_v_main_~x~0_35_31 4294967296)))) (exists ((v_it_5 Int)) (and (<= 1 v_it_5) (<= (+ v_main_~x~0_36 v_it_5 1) (+ aux_mod_v_main_~x~0_35_31 (* aux_div_v_main_~x~0_35_31 4294967296))) (not (< 0 (mod (+ (* v_main_~x~0_36 4294967295) main_~z~0 main_~x~0 (* v_it_5 4294967295)) 4294967296))))))) (not (< 0 (mod (+ (* v_main_~x~0_36 4294967295) main_~z~0 main_~x~0) 4294967296)))) (or (forall ((aux_div_v_main_~x~0_35_31 Int)) (not (= v_main_~x~0_36 (+ aux_mod_v_main_~x~0_35_31 (* aux_div_v_main_~x~0_35_31 4294967296))))) (< 0 (mod (+ (* v_main_~x~0_36 4294967295) main_~z~0 main_~x~0) 4294967296))))))) (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~x~0_35_31 Int)) (not (= (+ aux_mod_v_main_~x~0_35_31 (* aux_div_v_main_~x~0_35_31 4294967296)) main_~x~0))))) (> 0 aux_mod_v_main_~x~0_35_31)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1270#(forall ((aux_mod_v_main_~x~0_35_31 Int)) (or (= aux_mod_v_main_~x~0_35_31 (mod main_~n~0 4294967296)) (>= aux_mod_v_main_~x~0_35_31 4294967296) (and (or (not (< 0 (mod main_~z~0 4294967296))) (forall ((v_main_~x~0_36 Int)) (or (not (< main_~x~0 v_main_~x~0_36)) (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ v_it_5 main_~x~0 1) v_main_~x~0_36))) (and (or (forall ((aux_div_v_main_~x~0_35_31 Int)) (or (not (< v_main_~x~0_36 (+ aux_mod_v_main_~x~0_35_31 (* aux_div_v_main_~x~0_35_31 4294967296)))) (exists ((v_it_5 Int)) (and (<= 1 v_it_5) (<= (+ v_main_~x~0_36 v_it_5 1) (+ aux_mod_v_main_~x~0_35_31 (* aux_div_v_main_~x~0_35_31 4294967296))) (not (< 0 (mod (+ (* v_main_~x~0_36 4294967295) main_~z~0 main_~x~0 (* v_it_5 4294967295)) 4294967296))))))) (not (< 0 (mod (+ (* v_main_~x~0_36 4294967295) main_~z~0 main_~x~0) 4294967296)))) (or (forall ((aux_div_v_main_~x~0_35_31 Int)) (not (= v_main_~x~0_36 (+ aux_mod_v_main_~x~0_35_31 (* aux_div_v_main_~x~0_35_31 4294967296))))) (< 0 (mod (+ (* v_main_~x~0_36 4294967295) main_~z~0 main_~x~0) 4294967296))))))) (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~x~0_35_31 Int)) (not (= (+ aux_mod_v_main_~x~0_35_31 (* aux_div_v_main_~x~0_35_31 4294967296)) main_~x~0))))) (> 0 aux_mod_v_main_~x~0_35_31)))} is UNKNOWN [2022-04-07 17:29:16,311 INFO L290 TraceCheckUtils]: 8: Hoare triple {1259#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1270#(forall ((aux_mod_v_main_~x~0_35_31 Int)) (or (= aux_mod_v_main_~x~0_35_31 (mod main_~n~0 4294967296)) (>= aux_mod_v_main_~x~0_35_31 4294967296) (and (or (not (< 0 (mod main_~z~0 4294967296))) (forall ((v_main_~x~0_36 Int)) (or (not (< main_~x~0 v_main_~x~0_36)) (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ v_it_5 main_~x~0 1) v_main_~x~0_36))) (and (or (forall ((aux_div_v_main_~x~0_35_31 Int)) (or (not (< v_main_~x~0_36 (+ aux_mod_v_main_~x~0_35_31 (* aux_div_v_main_~x~0_35_31 4294967296)))) (exists ((v_it_5 Int)) (and (<= 1 v_it_5) (<= (+ v_main_~x~0_36 v_it_5 1) (+ aux_mod_v_main_~x~0_35_31 (* aux_div_v_main_~x~0_35_31 4294967296))) (not (< 0 (mod (+ (* v_main_~x~0_36 4294967295) main_~z~0 main_~x~0 (* v_it_5 4294967295)) 4294967296))))))) (not (< 0 (mod (+ (* v_main_~x~0_36 4294967295) main_~z~0 main_~x~0) 4294967296)))) (or (forall ((aux_div_v_main_~x~0_35_31 Int)) (not (= v_main_~x~0_36 (+ aux_mod_v_main_~x~0_35_31 (* aux_div_v_main_~x~0_35_31 4294967296))))) (< 0 (mod (+ (* v_main_~x~0_36 4294967295) main_~z~0 main_~x~0) 4294967296))))))) (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~x~0_35_31 Int)) (not (= (+ aux_mod_v_main_~x~0_35_31 (* aux_div_v_main_~x~0_35_31 4294967296)) main_~x~0))))) (> 0 aux_mod_v_main_~x~0_35_31)))} is VALID [2022-04-07 17:29:16,312 INFO L290 TraceCheckUtils]: 7: Hoare triple {1259#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1259#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is VALID [2022-04-07 17:29:16,312 INFO L290 TraceCheckUtils]: 6: Hoare triple {1286#(or (= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296)) (< 0 (mod main_~x~0 4294967296)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1259#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is VALID [2022-04-07 17:29:16,313 INFO L290 TraceCheckUtils]: 5: Hoare triple {1181#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1286#(or (= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296)) (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-07 17:29:16,313 INFO L272 TraceCheckUtils]: 4: Hoare triple {1181#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1181#true} is VALID [2022-04-07 17:29:16,313 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1181#true} {1181#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1181#true} is VALID [2022-04-07 17:29:16,313 INFO L290 TraceCheckUtils]: 2: Hoare triple {1181#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1181#true} is VALID [2022-04-07 17:29:16,313 INFO L290 TraceCheckUtils]: 1: Hoare triple {1181#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1181#true} is VALID [2022-04-07 17:29:16,314 INFO L272 TraceCheckUtils]: 0: Hoare triple {1181#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1181#true} is VALID [2022-04-07 17:29:16,314 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 2 not checked. [2022-04-07 17:29:16,314 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [998558539] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 17:29:16,314 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 17:29:16,314 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7, 8] total 16 [2022-04-07 17:29:16,314 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [465442688] [2022-04-07 17:29:16,315 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 17:29:16,315 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 2.1875) internal successors, (35), 13 states have internal predecessors, (35), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-07 17:29:16,315 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:29:16,316 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 16 states, 16 states have (on average 2.1875) internal successors, (35), 13 states have internal predecessors, (35), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:29:23,332 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 42 edges. 39 inductive. 0 not inductive. 3 times theorem prover too weak to decide inductivity. [2022-04-07 17:29:23,333 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2022-04-07 17:29:23,333 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:29:23,333 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2022-04-07 17:29:23,333 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=162, Unknown=3, NotChecked=26, Total=240 [2022-04-07 17:29:23,333 INFO L87 Difference]: Start difference. First operand 34 states and 51 transitions. Second operand has 16 states, 16 states have (on average 2.1875) internal successors, (35), 13 states have internal predecessors, (35), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:29:23,675 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:29:23,675 INFO L93 Difference]: Finished difference Result 45 states and 68 transitions. [2022-04-07 17:29:23,675 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-04-07 17:29:23,675 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 2.1875) internal successors, (35), 13 states have internal predecessors, (35), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-07 17:29:23,676 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:29:23,676 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 2.1875) internal successors, (35), 13 states have internal predecessors, (35), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:29:23,677 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 44 transitions. [2022-04-07 17:29:23,678 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 2.1875) internal successors, (35), 13 states have internal predecessors, (35), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:29:23,679 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 44 transitions. [2022-04-07 17:29:23,679 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 10 states and 44 transitions. [2022-04-07 17:29:23,736 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 44 edges. 44 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:29:23,737 INFO L225 Difference]: With dead ends: 45 [2022-04-07 17:29:23,737 INFO L226 Difference]: Without dead ends: 39 [2022-04-07 17:29:23,738 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 55 GetRequests, 29 SyntacticMatches, 5 SemanticMatches, 21 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 77 ImplicationChecksByTransitivity, 6.6s TimeCoverageRelationStatistics Valid=113, Invalid=350, Unknown=3, NotChecked=40, Total=506 [2022-04-07 17:29:23,738 INFO L913 BasicCegarLoop]: 10 mSDtfsCounter, 37 mSDsluCounter, 44 mSDsCounter, 0 mSdLazyCounter, 70 mSolverCounterSat, 11 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 37 SdHoareTripleChecker+Valid, 54 SdHoareTripleChecker+Invalid, 116 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 11 IncrementalHoareTripleChecker+Valid, 70 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 35 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 17:29:23,739 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [37 Valid, 54 Invalid, 116 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [11 Valid, 70 Invalid, 0 Unknown, 35 Unchecked, 0.1s Time] [2022-04-07 17:29:23,739 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39 states. [2022-04-07 17:29:23,741 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39 to 33. [2022-04-07 17:29:23,741 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:29:23,741 INFO L82 GeneralOperation]: Start isEquivalent. First operand 39 states. Second operand has 33 states, 28 states have (on average 1.6071428571428572) internal successors, (45), 28 states have internal predecessors, (45), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:29:23,741 INFO L74 IsIncluded]: Start isIncluded. First operand 39 states. Second operand has 33 states, 28 states have (on average 1.6071428571428572) internal successors, (45), 28 states have internal predecessors, (45), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:29:23,741 INFO L87 Difference]: Start difference. First operand 39 states. Second operand has 33 states, 28 states have (on average 1.6071428571428572) internal successors, (45), 28 states have internal predecessors, (45), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:29:23,743 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:29:23,744 INFO L93 Difference]: Finished difference Result 39 states and 61 transitions. [2022-04-07 17:29:23,744 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 61 transitions. [2022-04-07 17:29:23,745 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:29:23,745 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:29:23,745 INFO L74 IsIncluded]: Start isIncluded. First operand has 33 states, 28 states have (on average 1.6071428571428572) internal successors, (45), 28 states have internal predecessors, (45), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 39 states. [2022-04-07 17:29:23,745 INFO L87 Difference]: Start difference. First operand has 33 states, 28 states have (on average 1.6071428571428572) internal successors, (45), 28 states have internal predecessors, (45), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 39 states. [2022-04-07 17:29:23,747 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:29:23,747 INFO L93 Difference]: Finished difference Result 39 states and 61 transitions. [2022-04-07 17:29:23,747 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 61 transitions. [2022-04-07 17:29:23,747 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:29:23,747 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:29:23,747 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:29:23,747 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:29:23,748 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 33 states, 28 states have (on average 1.6071428571428572) internal successors, (45), 28 states have internal predecessors, (45), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:29:23,749 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 49 transitions. [2022-04-07 17:29:23,749 INFO L78 Accepts]: Start accepts. Automaton has 33 states and 49 transitions. Word has length 18 [2022-04-07 17:29:23,749 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:29:23,749 INFO L478 AbstractCegarLoop]: Abstraction has 33 states and 49 transitions. [2022-04-07 17:29:23,749 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 2.1875) internal successors, (35), 13 states have internal predecessors, (35), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:29:23,749 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 49 transitions. [2022-04-07 17:29:23,750 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-04-07 17:29:23,750 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:29:23,750 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:29:23,775 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2022-04-07 17:29:23,963 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6,6 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:29:23,964 INFO L403 AbstractCegarLoop]: === Iteration 8 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:29:23,964 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:29:23,964 INFO L85 PathProgramCache]: Analyzing trace with hash 760455623, now seen corresponding path program 1 times [2022-04-07 17:29:23,964 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:29:23,964 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1408424312] [2022-04-07 17:29:23,964 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:29:23,964 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:29:23,974 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.0))) (+ .cse0 main_~x~0_5 (* (- 4294967296) (div (+ .cse0 main_~x~0_5) 4294967296)))) 0)) [2022-04-07 17:29:23,976 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.1))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-07 17:29:23,990 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:29:23,999 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.2))) (+ .cse0 main_~x~0_5 (* (- 4294967296) (div (+ .cse0 main_~x~0_5) 4294967296)))) 0)) [2022-04-07 17:29:24,001 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.3))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-07 17:29:24,154 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:29:24,156 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:29:24,160 INFO L290 TraceCheckUtils]: 0: Hoare triple {1491#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1479#true} is VALID [2022-04-07 17:29:24,160 INFO L290 TraceCheckUtils]: 1: Hoare triple {1479#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1479#true} is VALID [2022-04-07 17:29:24,160 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1479#true} {1479#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1479#true} is VALID [2022-04-07 17:29:24,162 INFO L272 TraceCheckUtils]: 0: Hoare triple {1479#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1491#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:29:24,162 INFO L290 TraceCheckUtils]: 1: Hoare triple {1491#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1479#true} is VALID [2022-04-07 17:29:24,162 INFO L290 TraceCheckUtils]: 2: Hoare triple {1479#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1479#true} is VALID [2022-04-07 17:29:24,163 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1479#true} {1479#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1479#true} is VALID [2022-04-07 17:29:24,163 INFO L272 TraceCheckUtils]: 4: Hoare triple {1479#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1479#true} is VALID [2022-04-07 17:29:24,163 INFO L290 TraceCheckUtils]: 5: Hoare triple {1479#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1484#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-07 17:29:24,164 INFO L290 TraceCheckUtils]: 6: Hoare triple {1484#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1485#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} is VALID [2022-04-07 17:29:24,165 INFO L290 TraceCheckUtils]: 7: Hoare triple {1485#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1485#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} is VALID [2022-04-07 17:29:24,165 INFO L290 TraceCheckUtils]: 8: Hoare triple {1485#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1486#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} is VALID [2022-04-07 17:29:24,166 INFO L290 TraceCheckUtils]: 9: Hoare triple {1486#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1486#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} is VALID [2022-04-07 17:29:24,168 INFO L290 TraceCheckUtils]: 10: Hoare triple {1486#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (< v_main_~x~0_6 v_main_~x~0_7) (= (+ (* (- 1) v_main_~x~0_6) v_main_~x~0_7 v_main_~y~0_8) v_main_~y~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_8 v_main_~y~0_7) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_8, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {1487#(and (<= main_~x~0 main_~n~0) (<= main_~n~0 main_~x~0) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} is VALID [2022-04-07 17:29:24,168 INFO L290 TraceCheckUtils]: 11: Hoare triple {1487#(and (<= main_~x~0 main_~n~0) (<= main_~n~0 main_~x~0) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1487#(and (<= main_~x~0 main_~n~0) (<= main_~n~0 main_~x~0) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} is VALID [2022-04-07 17:29:24,169 INFO L290 TraceCheckUtils]: 12: Hoare triple {1487#(and (<= main_~x~0 main_~n~0) (<= main_~n~0 main_~x~0) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} [107] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~x~0_11 v_main_~x~0_10) (<= .cse0 0) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)) (and (= v_main_~x~0_10 (+ v_main_~x~0_11 v_main_~z~0_10 (* (- 1) v_main_~z~0_9))) (< 0 .cse0) (forall ((v_it_5 Int)) (or (not (<= (+ v_main_~z~0_9 v_it_5 1) v_main_~z~0_10)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)))) (< v_main_~z~0_9 v_main_~z~0_10)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {1488#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~x~0 main_~n~0) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:29:24,170 INFO L290 TraceCheckUtils]: 13: Hoare triple {1488#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~x~0 main_~n~0) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1488#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~x~0 main_~n~0) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:29:24,171 INFO L272 TraceCheckUtils]: 14: Hoare triple {1488#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~x~0 main_~n~0) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {1489#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:29:24,171 INFO L290 TraceCheckUtils]: 15: Hoare triple {1489#(not (= |__VERIFIER_assert_#in~cond| 0))} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1490#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:29:24,172 INFO L290 TraceCheckUtils]: 16: Hoare triple {1490#(not (= __VERIFIER_assert_~cond 0))} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1480#false} is VALID [2022-04-07 17:29:24,172 INFO L290 TraceCheckUtils]: 17: Hoare triple {1480#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1480#false} is VALID [2022-04-07 17:29:24,172 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:29:24,172 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:29:24,172 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1408424312] [2022-04-07 17:29:24,172 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1408424312] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:29:24,172 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1011772224] [2022-04-07 17:29:24,172 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:29:24,172 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:29:24,173 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:29:24,175 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:29:24,200 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-04-07 17:29:24,221 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:29:24,222 INFO L263 TraceCheckSpWp]: Trace formula consists of 63 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-07 17:29:24,237 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:29:24,238 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:29:24,807 INFO L272 TraceCheckUtils]: 0: Hoare triple {1479#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1479#true} is VALID [2022-04-07 17:29:24,807 INFO L290 TraceCheckUtils]: 1: Hoare triple {1479#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1479#true} is VALID [2022-04-07 17:29:24,808 INFO L290 TraceCheckUtils]: 2: Hoare triple {1479#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1479#true} is VALID [2022-04-07 17:29:24,808 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1479#true} {1479#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1479#true} is VALID [2022-04-07 17:29:24,808 INFO L272 TraceCheckUtils]: 4: Hoare triple {1479#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1479#true} is VALID [2022-04-07 17:29:24,808 INFO L290 TraceCheckUtils]: 5: Hoare triple {1479#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1484#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-07 17:29:24,811 INFO L290 TraceCheckUtils]: 6: Hoare triple {1484#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1485#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} is VALID [2022-04-07 17:29:24,812 INFO L290 TraceCheckUtils]: 7: Hoare triple {1485#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1485#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} is VALID [2022-04-07 17:29:24,813 INFO L290 TraceCheckUtils]: 8: Hoare triple {1485#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1486#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} is VALID [2022-04-07 17:29:24,813 INFO L290 TraceCheckUtils]: 9: Hoare triple {1486#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1486#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} is VALID [2022-04-07 17:29:24,815 INFO L290 TraceCheckUtils]: 10: Hoare triple {1486#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (< v_main_~x~0_6 v_main_~x~0_7) (= (+ (* (- 1) v_main_~x~0_6) v_main_~x~0_7 v_main_~y~0_8) v_main_~y~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_8 v_main_~y~0_7) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_8, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {1486#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} is VALID [2022-04-07 17:29:24,815 INFO L290 TraceCheckUtils]: 11: Hoare triple {1486#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1486#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} is VALID [2022-04-07 17:29:24,816 INFO L290 TraceCheckUtils]: 12: Hoare triple {1486#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} [107] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~x~0_11 v_main_~x~0_10) (<= .cse0 0) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)) (and (= v_main_~x~0_10 (+ v_main_~x~0_11 v_main_~z~0_10 (* (- 1) v_main_~z~0_9))) (< 0 .cse0) (forall ((v_it_5 Int)) (or (not (<= (+ v_main_~z~0_9 v_it_5 1) v_main_~z~0_10)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)))) (< v_main_~z~0_9 v_main_~z~0_10)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {1485#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} is VALID [2022-04-07 17:29:24,817 INFO L290 TraceCheckUtils]: 13: Hoare triple {1485#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1485#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} is VALID [2022-04-07 17:29:24,818 INFO L272 TraceCheckUtils]: 14: Hoare triple {1485#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {1537#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:29:24,819 INFO L290 TraceCheckUtils]: 15: Hoare triple {1537#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1541#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:29:24,819 INFO L290 TraceCheckUtils]: 16: Hoare triple {1541#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1480#false} is VALID [2022-04-07 17:29:24,819 INFO L290 TraceCheckUtils]: 17: Hoare triple {1480#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1480#false} is VALID [2022-04-07 17:29:24,819 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 17:29:24,819 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 17:30:05,362 INFO L290 TraceCheckUtils]: 17: Hoare triple {1480#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1480#false} is VALID [2022-04-07 17:30:05,364 INFO L290 TraceCheckUtils]: 16: Hoare triple {1541#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1480#false} is VALID [2022-04-07 17:30:05,364 INFO L290 TraceCheckUtils]: 15: Hoare triple {1537#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1541#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:30:05,365 INFO L272 TraceCheckUtils]: 14: Hoare triple {1557#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {1537#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:30:05,365 INFO L290 TraceCheckUtils]: 13: Hoare triple {1557#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1557#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is VALID [2022-04-07 17:30:07,378 WARN L290 TraceCheckUtils]: 12: Hoare triple {1564#(forall ((aux_mod_v_main_~x~0_40_31 Int)) (or (= aux_mod_v_main_~x~0_40_31 (mod main_~n~0 4294967296)) (and (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~x~0_40_31 Int)) (not (= (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296)) main_~x~0)))) (or (forall ((aux_div_v_main_~x~0_40_31 Int)) (or (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ v_it_5 main_~x~0 1) (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296))))) (not (< main_~x~0 (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296)))))) (not (< 0 (mod main_~z~0 4294967296))))) (> 0 aux_mod_v_main_~x~0_40_31) (>= aux_mod_v_main_~x~0_40_31 4294967296)))} [107] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~x~0_11 v_main_~x~0_10) (<= .cse0 0) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)) (and (= v_main_~x~0_10 (+ v_main_~x~0_11 v_main_~z~0_10 (* (- 1) v_main_~z~0_9))) (< 0 .cse0) (forall ((v_it_5 Int)) (or (not (<= (+ v_main_~z~0_9 v_it_5 1) v_main_~z~0_10)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)))) (< v_main_~z~0_9 v_main_~z~0_10)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {1557#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is UNKNOWN [2022-04-07 17:30:07,380 INFO L290 TraceCheckUtils]: 11: Hoare triple {1568#(or (forall ((aux_mod_v_main_~x~0_40_31 Int)) (or (= aux_mod_v_main_~x~0_40_31 (mod main_~n~0 4294967296)) (and (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~x~0_40_31 Int)) (not (= (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296)) main_~x~0)))) (or (forall ((aux_div_v_main_~x~0_40_31 Int)) (or (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ v_it_5 main_~x~0 1) (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296))))) (not (< main_~x~0 (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296)))))) (not (< 0 (mod main_~z~0 4294967296))))) (> 0 aux_mod_v_main_~x~0_40_31) (>= aux_mod_v_main_~x~0_40_31 4294967296))) (< 0 (mod main_~x~0 4294967296)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1564#(forall ((aux_mod_v_main_~x~0_40_31 Int)) (or (= aux_mod_v_main_~x~0_40_31 (mod main_~n~0 4294967296)) (and (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~x~0_40_31 Int)) (not (= (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296)) main_~x~0)))) (or (forall ((aux_div_v_main_~x~0_40_31 Int)) (or (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ v_it_5 main_~x~0 1) (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296))))) (not (< main_~x~0 (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296)))))) (not (< 0 (mod main_~z~0 4294967296))))) (> 0 aux_mod_v_main_~x~0_40_31) (>= aux_mod_v_main_~x~0_40_31 4294967296)))} is VALID [2022-04-07 17:30:09,388 WARN L290 TraceCheckUtils]: 10: Hoare triple {1572#(forall ((aux_div_v_main_~x~0_41_31 Int) (aux_mod_v_main_~x~0_41_31 Int) (aux_mod_v_main_~x~0_40_31 Int)) (or (= aux_mod_v_main_~x~0_40_31 (mod main_~n~0 4294967296)) (< aux_mod_v_main_~x~0_41_31 0) (<= 4294967296 aux_mod_v_main_~x~0_40_31) (< aux_mod_v_main_~x~0_40_31 0) (< 0 aux_mod_v_main_~x~0_41_31) (and (or (forall ((aux_div_v_main_~x~0_40_31 Int)) (or (not (< (+ aux_mod_v_main_~x~0_41_31 (* aux_div_v_main_~x~0_41_31 4294967296)) (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296)))) (exists ((v_it_5 Int)) (and (<= (+ aux_mod_v_main_~x~0_41_31 (* aux_div_v_main_~x~0_41_31 4294967296) v_it_5 1) (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296))) (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5))))) (not (< 0 (mod main_~z~0 4294967296)))) (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~x~0_40_31 Int)) (not (= (+ aux_mod_v_main_~x~0_41_31 (* aux_div_v_main_~x~0_41_31 4294967296)) (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296))))))) (and (not (= (+ aux_mod_v_main_~x~0_41_31 (* aux_div_v_main_~x~0_41_31 4294967296)) main_~x~0)) (or (not (< (+ aux_mod_v_main_~x~0_41_31 (* aux_div_v_main_~x~0_41_31 4294967296)) main_~x~0)) (not (< 0 (mod main_~x~0 4294967296))) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4) (<= (+ aux_mod_v_main_~x~0_41_31 (* aux_div_v_main_~x~0_41_31 4294967296) v_it_4 1) main_~x~0)))))))} [104] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (< v_main_~x~0_6 v_main_~x~0_7) (= (+ (* (- 1) v_main_~x~0_6) v_main_~x~0_7 v_main_~y~0_8) v_main_~y~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_8 v_main_~y~0_7) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_8, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {1568#(or (forall ((aux_mod_v_main_~x~0_40_31 Int)) (or (= aux_mod_v_main_~x~0_40_31 (mod main_~n~0 4294967296)) (and (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~x~0_40_31 Int)) (not (= (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296)) main_~x~0)))) (or (forall ((aux_div_v_main_~x~0_40_31 Int)) (or (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ v_it_5 main_~x~0 1) (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296))))) (not (< main_~x~0 (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296)))))) (not (< 0 (mod main_~z~0 4294967296))))) (> 0 aux_mod_v_main_~x~0_40_31) (>= aux_mod_v_main_~x~0_40_31 4294967296))) (< 0 (mod main_~x~0 4294967296)))} is UNKNOWN [2022-04-07 17:30:11,400 WARN L290 TraceCheckUtils]: 9: Hoare triple {1572#(forall ((aux_div_v_main_~x~0_41_31 Int) (aux_mod_v_main_~x~0_41_31 Int) (aux_mod_v_main_~x~0_40_31 Int)) (or (= aux_mod_v_main_~x~0_40_31 (mod main_~n~0 4294967296)) (< aux_mod_v_main_~x~0_41_31 0) (<= 4294967296 aux_mod_v_main_~x~0_40_31) (< aux_mod_v_main_~x~0_40_31 0) (< 0 aux_mod_v_main_~x~0_41_31) (and (or (forall ((aux_div_v_main_~x~0_40_31 Int)) (or (not (< (+ aux_mod_v_main_~x~0_41_31 (* aux_div_v_main_~x~0_41_31 4294967296)) (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296)))) (exists ((v_it_5 Int)) (and (<= (+ aux_mod_v_main_~x~0_41_31 (* aux_div_v_main_~x~0_41_31 4294967296) v_it_5 1) (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296))) (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5))))) (not (< 0 (mod main_~z~0 4294967296)))) (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~x~0_40_31 Int)) (not (= (+ aux_mod_v_main_~x~0_41_31 (* aux_div_v_main_~x~0_41_31 4294967296)) (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296))))))) (and (not (= (+ aux_mod_v_main_~x~0_41_31 (* aux_div_v_main_~x~0_41_31 4294967296)) main_~x~0)) (or (not (< (+ aux_mod_v_main_~x~0_41_31 (* aux_div_v_main_~x~0_41_31 4294967296)) main_~x~0)) (not (< 0 (mod main_~x~0 4294967296))) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4) (<= (+ aux_mod_v_main_~x~0_41_31 (* aux_div_v_main_~x~0_41_31 4294967296) v_it_4 1) main_~x~0)))))))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1572#(forall ((aux_div_v_main_~x~0_41_31 Int) (aux_mod_v_main_~x~0_41_31 Int) (aux_mod_v_main_~x~0_40_31 Int)) (or (= aux_mod_v_main_~x~0_40_31 (mod main_~n~0 4294967296)) (< aux_mod_v_main_~x~0_41_31 0) (<= 4294967296 aux_mod_v_main_~x~0_40_31) (< aux_mod_v_main_~x~0_40_31 0) (< 0 aux_mod_v_main_~x~0_41_31) (and (or (forall ((aux_div_v_main_~x~0_40_31 Int)) (or (not (< (+ aux_mod_v_main_~x~0_41_31 (* aux_div_v_main_~x~0_41_31 4294967296)) (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296)))) (exists ((v_it_5 Int)) (and (<= (+ aux_mod_v_main_~x~0_41_31 (* aux_div_v_main_~x~0_41_31 4294967296) v_it_5 1) (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296))) (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5))))) (not (< 0 (mod main_~z~0 4294967296)))) (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~x~0_40_31 Int)) (not (= (+ aux_mod_v_main_~x~0_41_31 (* aux_div_v_main_~x~0_41_31 4294967296)) (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296))))))) (and (not (= (+ aux_mod_v_main_~x~0_41_31 (* aux_div_v_main_~x~0_41_31 4294967296)) main_~x~0)) (or (not (< (+ aux_mod_v_main_~x~0_41_31 (* aux_div_v_main_~x~0_41_31 4294967296)) main_~x~0)) (not (< 0 (mod main_~x~0 4294967296))) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4) (<= (+ aux_mod_v_main_~x~0_41_31 (* aux_div_v_main_~x~0_41_31 4294967296) v_it_4 1) main_~x~0)))))))} is UNKNOWN [2022-04-07 17:30:13,448 WARN L290 TraceCheckUtils]: 8: Hoare triple {1579#(forall ((aux_div_v_main_~x~0_41_31 Int) (aux_div_v_main_~x~0_40_31 Int) (aux_mod_v_main_~x~0_40_31 Int)) (or (< (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296)) (* aux_div_v_main_~x~0_41_31 4294967296)) (= aux_mod_v_main_~x~0_40_31 (mod main_~n~0 4294967296)) (<= 4294967296 aux_mod_v_main_~x~0_40_31) (< aux_mod_v_main_~x~0_40_31 0) (and (not (= (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296)) main_~x~0)) (or (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296) v_it_4 1) main_~x~0) (<= 1 v_it_4))) (not (< 0 (mod main_~x~0 4294967296))) (not (< (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296)) main_~x~0)))) (< (* aux_div_v_main_~x~0_41_31 4294967296) (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296)))))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1572#(forall ((aux_div_v_main_~x~0_41_31 Int) (aux_mod_v_main_~x~0_41_31 Int) (aux_mod_v_main_~x~0_40_31 Int)) (or (= aux_mod_v_main_~x~0_40_31 (mod main_~n~0 4294967296)) (< aux_mod_v_main_~x~0_41_31 0) (<= 4294967296 aux_mod_v_main_~x~0_40_31) (< aux_mod_v_main_~x~0_40_31 0) (< 0 aux_mod_v_main_~x~0_41_31) (and (or (forall ((aux_div_v_main_~x~0_40_31 Int)) (or (not (< (+ aux_mod_v_main_~x~0_41_31 (* aux_div_v_main_~x~0_41_31 4294967296)) (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296)))) (exists ((v_it_5 Int)) (and (<= (+ aux_mod_v_main_~x~0_41_31 (* aux_div_v_main_~x~0_41_31 4294967296) v_it_5 1) (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296))) (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5))))) (not (< 0 (mod main_~z~0 4294967296)))) (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~x~0_40_31 Int)) (not (= (+ aux_mod_v_main_~x~0_41_31 (* aux_div_v_main_~x~0_41_31 4294967296)) (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296))))))) (and (not (= (+ aux_mod_v_main_~x~0_41_31 (* aux_div_v_main_~x~0_41_31 4294967296)) main_~x~0)) (or (not (< (+ aux_mod_v_main_~x~0_41_31 (* aux_div_v_main_~x~0_41_31 4294967296)) main_~x~0)) (not (< 0 (mod main_~x~0 4294967296))) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4) (<= (+ aux_mod_v_main_~x~0_41_31 (* aux_div_v_main_~x~0_41_31 4294967296) v_it_4 1) main_~x~0)))))))} is UNKNOWN [2022-04-07 17:30:13,860 INFO L290 TraceCheckUtils]: 7: Hoare triple {1579#(forall ((aux_div_v_main_~x~0_41_31 Int) (aux_div_v_main_~x~0_40_31 Int) (aux_mod_v_main_~x~0_40_31 Int)) (or (< (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296)) (* aux_div_v_main_~x~0_41_31 4294967296)) (= aux_mod_v_main_~x~0_40_31 (mod main_~n~0 4294967296)) (<= 4294967296 aux_mod_v_main_~x~0_40_31) (< aux_mod_v_main_~x~0_40_31 0) (and (not (= (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296)) main_~x~0)) (or (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296) v_it_4 1) main_~x~0) (<= 1 v_it_4))) (not (< 0 (mod main_~x~0 4294967296))) (not (< (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296)) main_~x~0)))) (< (* aux_div_v_main_~x~0_41_31 4294967296) (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296)))))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1579#(forall ((aux_div_v_main_~x~0_41_31 Int) (aux_div_v_main_~x~0_40_31 Int) (aux_mod_v_main_~x~0_40_31 Int)) (or (< (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296)) (* aux_div_v_main_~x~0_41_31 4294967296)) (= aux_mod_v_main_~x~0_40_31 (mod main_~n~0 4294967296)) (<= 4294967296 aux_mod_v_main_~x~0_40_31) (< aux_mod_v_main_~x~0_40_31 0) (and (not (= (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296)) main_~x~0)) (or (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296) v_it_4 1) main_~x~0) (<= 1 v_it_4))) (not (< 0 (mod main_~x~0 4294967296))) (not (< (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296)) main_~x~0)))) (< (* aux_div_v_main_~x~0_41_31 4294967296) (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296)))))} is VALID [2022-04-07 17:30:13,862 INFO L290 TraceCheckUtils]: 6: Hoare triple {1586#(or (<= (div (+ (- 1) (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (* (- 1) (mod main_~n~0 4294967296))) 4294967296) 1)) (< (div (+ (- 1) (* (- 1) main_~x~0)) (- 4294967296)) (+ 2 (div (+ (- 1) main_~x~0) 4294967296))))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1579#(forall ((aux_div_v_main_~x~0_41_31 Int) (aux_div_v_main_~x~0_40_31 Int) (aux_mod_v_main_~x~0_40_31 Int)) (or (< (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296)) (* aux_div_v_main_~x~0_41_31 4294967296)) (= aux_mod_v_main_~x~0_40_31 (mod main_~n~0 4294967296)) (<= 4294967296 aux_mod_v_main_~x~0_40_31) (< aux_mod_v_main_~x~0_40_31 0) (and (not (= (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296)) main_~x~0)) (or (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296) v_it_4 1) main_~x~0) (<= 1 v_it_4))) (not (< 0 (mod main_~x~0 4294967296))) (not (< (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296)) main_~x~0)))) (< (* aux_div_v_main_~x~0_41_31 4294967296) (+ aux_mod_v_main_~x~0_40_31 (* aux_div_v_main_~x~0_40_31 4294967296)))))} is VALID [2022-04-07 17:30:13,863 INFO L290 TraceCheckUtils]: 5: Hoare triple {1479#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1586#(or (<= (div (+ (- 1) (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (* (- 1) (mod main_~n~0 4294967296))) 4294967296) 1)) (< (div (+ (- 1) (* (- 1) main_~x~0)) (- 4294967296)) (+ 2 (div (+ (- 1) main_~x~0) 4294967296))))} is VALID [2022-04-07 17:30:13,863 INFO L272 TraceCheckUtils]: 4: Hoare triple {1479#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1479#true} is VALID [2022-04-07 17:30:13,863 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1479#true} {1479#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1479#true} is VALID [2022-04-07 17:30:13,864 INFO L290 TraceCheckUtils]: 2: Hoare triple {1479#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1479#true} is VALID [2022-04-07 17:30:13,864 INFO L290 TraceCheckUtils]: 1: Hoare triple {1479#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1479#true} is VALID [2022-04-07 17:30:13,864 INFO L272 TraceCheckUtils]: 0: Hoare triple {1479#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1479#true} is VALID [2022-04-07 17:30:13,864 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:30:13,864 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1011772224] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 17:30:13,864 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 17:30:13,865 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 7, 10] total 18 [2022-04-07 17:30:13,865 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [235492910] [2022-04-07 17:30:13,865 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 17:30:13,865 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 1.6666666666666667) internal successors, (30), 15 states have internal predecessors, (30), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-07 17:30:13,866 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:30:13,866 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 18 states, 18 states have (on average 1.6666666666666667) internal successors, (30), 15 states have internal predecessors, (30), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:30:24,032 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 37 edges. 32 inductive. 0 not inductive. 5 times theorem prover too weak to decide inductivity. [2022-04-07 17:30:24,033 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 18 states [2022-04-07 17:30:24,033 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:30:24,033 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2022-04-07 17:30:24,033 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=64, Invalid=236, Unknown=6, NotChecked=0, Total=306 [2022-04-07 17:30:24,034 INFO L87 Difference]: Start difference. First operand 33 states and 49 transitions. Second operand has 18 states, 18 states have (on average 1.6666666666666667) internal successors, (30), 15 states have internal predecessors, (30), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:30:28,533 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:30:28,533 INFO L93 Difference]: Finished difference Result 45 states and 68 transitions. [2022-04-07 17:30:28,533 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-04-07 17:30:28,534 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 1.6666666666666667) internal successors, (30), 15 states have internal predecessors, (30), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-07 17:30:28,534 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:30:28,534 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 18 states have (on average 1.6666666666666667) internal successors, (30), 15 states have internal predecessors, (30), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:30:28,535 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 45 transitions. [2022-04-07 17:30:28,535 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 18 states have (on average 1.6666666666666667) internal successors, (30), 15 states have internal predecessors, (30), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:30:28,536 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 45 transitions. [2022-04-07 17:30:28,536 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 10 states and 45 transitions. [2022-04-07 17:30:28,586 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 45 edges. 45 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:30:28,587 INFO L225 Difference]: With dead ends: 45 [2022-04-07 17:30:28,587 INFO L226 Difference]: Without dead ends: 42 [2022-04-07 17:30:28,588 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 24 SyntacticMatches, 7 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 128 ImplicationChecksByTransitivity, 18.5s TimeCoverageRelationStatistics Valid=110, Invalid=389, Unknown=7, NotChecked=0, Total=506 [2022-04-07 17:30:28,588 INFO L913 BasicCegarLoop]: 15 mSDtfsCounter, 26 mSDsluCounter, 62 mSDsCounter, 0 mSdLazyCounter, 74 mSolverCounterSat, 12 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 26 SdHoareTripleChecker+Valid, 77 SdHoareTripleChecker+Invalid, 140 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 12 IncrementalHoareTripleChecker+Valid, 74 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 54 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 17:30:28,588 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [26 Valid, 77 Invalid, 140 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [12 Valid, 74 Invalid, 0 Unknown, 54 Unchecked, 0.1s Time] [2022-04-07 17:30:28,589 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42 states. [2022-04-07 17:30:28,590 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42 to 35. [2022-04-07 17:30:28,591 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:30:28,591 INFO L82 GeneralOperation]: Start isEquivalent. First operand 42 states. Second operand has 35 states, 30 states have (on average 1.6) internal successors, (48), 30 states have internal predecessors, (48), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:30:28,591 INFO L74 IsIncluded]: Start isIncluded. First operand 42 states. Second operand has 35 states, 30 states have (on average 1.6) internal successors, (48), 30 states have internal predecessors, (48), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:30:28,591 INFO L87 Difference]: Start difference. First operand 42 states. Second operand has 35 states, 30 states have (on average 1.6) internal successors, (48), 30 states have internal predecessors, (48), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:30:28,593 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:30:28,593 INFO L93 Difference]: Finished difference Result 42 states and 65 transitions. [2022-04-07 17:30:28,593 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 65 transitions. [2022-04-07 17:30:28,593 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:30:28,593 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:30:28,593 INFO L74 IsIncluded]: Start isIncluded. First operand has 35 states, 30 states have (on average 1.6) internal successors, (48), 30 states have internal predecessors, (48), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 42 states. [2022-04-07 17:30:28,593 INFO L87 Difference]: Start difference. First operand has 35 states, 30 states have (on average 1.6) internal successors, (48), 30 states have internal predecessors, (48), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 42 states. [2022-04-07 17:30:28,595 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:30:28,595 INFO L93 Difference]: Finished difference Result 42 states and 65 transitions. [2022-04-07 17:30:28,595 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 65 transitions. [2022-04-07 17:30:28,595 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:30:28,595 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:30:28,595 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:30:28,595 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:30:28,595 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 35 states, 30 states have (on average 1.6) internal successors, (48), 30 states have internal predecessors, (48), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:30:28,596 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35 states to 35 states and 52 transitions. [2022-04-07 17:30:28,596 INFO L78 Accepts]: Start accepts. Automaton has 35 states and 52 transitions. Word has length 18 [2022-04-07 17:30:28,597 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:30:28,597 INFO L478 AbstractCegarLoop]: Abstraction has 35 states and 52 transitions. [2022-04-07 17:30:28,597 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 18 states, 18 states have (on average 1.6666666666666667) internal successors, (30), 15 states have internal predecessors, (30), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:30:28,597 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 52 transitions. [2022-04-07 17:30:28,597 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-04-07 17:30:28,597 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:30:28,597 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:30:28,614 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2022-04-07 17:30:28,803 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7,7 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:30:28,803 INFO L403 AbstractCegarLoop]: === Iteration 9 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:30:28,804 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:30:28,804 INFO L85 PathProgramCache]: Analyzing trace with hash 571694412, now seen corresponding path program 1 times [2022-04-07 17:30:28,804 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:30:28,804 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [245132424] [2022-04-07 17:30:28,804 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:30:28,804 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:30:28,816 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.0))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-07 17:30:28,817 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.1))) (+ main_~z~0_9 .cse0 (* (- 4294967296) (div (+ main_~z~0_9 .cse0) 4294967296)))) 0)) [2022-04-07 17:30:28,830 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:30:28,840 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.2))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-07 17:30:28,851 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.3))) (+ main_~z~0_9 .cse0 (* (- 4294967296) (div (+ main_~z~0_9 .cse0) 4294967296)))) 0)) [2022-04-07 17:30:28,997 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:30:28,998 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:30:29,001 INFO L290 TraceCheckUtils]: 0: Hoare triple {1793#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1782#true} is VALID [2022-04-07 17:30:29,001 INFO L290 TraceCheckUtils]: 1: Hoare triple {1782#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1782#true} is VALID [2022-04-07 17:30:29,002 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1782#true} {1782#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1782#true} is VALID [2022-04-07 17:30:29,002 INFO L272 TraceCheckUtils]: 0: Hoare triple {1782#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1793#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:30:29,002 INFO L290 TraceCheckUtils]: 1: Hoare triple {1793#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1782#true} is VALID [2022-04-07 17:30:29,003 INFO L290 TraceCheckUtils]: 2: Hoare triple {1782#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1782#true} is VALID [2022-04-07 17:30:29,003 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1782#true} {1782#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1782#true} is VALID [2022-04-07 17:30:29,003 INFO L272 TraceCheckUtils]: 4: Hoare triple {1782#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1782#true} is VALID [2022-04-07 17:30:29,003 INFO L290 TraceCheckUtils]: 5: Hoare triple {1782#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1787#(and (= main_~n~0 main_~x~0) (= main_~y~0 0))} is VALID [2022-04-07 17:30:29,004 INFO L290 TraceCheckUtils]: 6: Hoare triple {1787#(and (= main_~n~0 main_~x~0) (= main_~y~0 0))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1787#(and (= main_~n~0 main_~x~0) (= main_~y~0 0))} is VALID [2022-04-07 17:30:29,004 INFO L290 TraceCheckUtils]: 7: Hoare triple {1787#(and (= main_~n~0 main_~x~0) (= main_~y~0 0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1788#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (= main_~y~0 0))} is VALID [2022-04-07 17:30:29,005 INFO L290 TraceCheckUtils]: 8: Hoare triple {1788#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (= main_~y~0 0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1788#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (= main_~y~0 0))} is VALID [2022-04-07 17:30:29,006 INFO L290 TraceCheckUtils]: 9: Hoare triple {1788#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (= main_~y~0 0))} [101] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (= (+ (* (- 1) v_main_~y~0_3) v_main_~y~0_4 v_main_~z~0_3) v_main_~z~0_2) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1789#(and (<= main_~z~0 0) (= main_~n~0 main_~x~0) (<= 0 main_~z~0))} is VALID [2022-04-07 17:30:29,006 INFO L290 TraceCheckUtils]: 10: Hoare triple {1789#(and (<= main_~z~0 0) (= main_~n~0 main_~x~0) (<= 0 main_~z~0))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1789#(and (<= main_~z~0 0) (= main_~n~0 main_~x~0) (<= 0 main_~z~0))} is VALID [2022-04-07 17:30:29,007 INFO L290 TraceCheckUtils]: 11: Hoare triple {1789#(and (<= main_~z~0 0) (= main_~n~0 main_~x~0) (<= 0 main_~z~0))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1789#(and (<= main_~z~0 0) (= main_~n~0 main_~x~0) (<= 0 main_~z~0))} is VALID [2022-04-07 17:30:29,009 INFO L290 TraceCheckUtils]: 12: Hoare triple {1789#(and (<= main_~z~0 0) (= main_~n~0 main_~x~0) (<= 0 main_~z~0))} [107] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~x~0_11 v_main_~x~0_10) (<= .cse0 0) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)) (and (= v_main_~x~0_10 (+ v_main_~x~0_11 v_main_~z~0_10 (* (- 1) v_main_~z~0_9))) (< 0 .cse0) (forall ((v_it_5 Int)) (or (not (<= (+ v_main_~z~0_9 v_it_5 1) v_main_~z~0_10)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)))) (< v_main_~z~0_9 v_main_~z~0_10)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {1790#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~x~0 main_~n~0) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:30:29,009 INFO L290 TraceCheckUtils]: 13: Hoare triple {1790#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~x~0 main_~n~0) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1790#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~x~0 main_~n~0) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:30:29,010 INFO L272 TraceCheckUtils]: 14: Hoare triple {1790#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~x~0 main_~n~0) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {1791#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:30:29,011 INFO L290 TraceCheckUtils]: 15: Hoare triple {1791#(not (= |__VERIFIER_assert_#in~cond| 0))} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1792#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:30:29,011 INFO L290 TraceCheckUtils]: 16: Hoare triple {1792#(not (= __VERIFIER_assert_~cond 0))} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1783#false} is VALID [2022-04-07 17:30:29,011 INFO L290 TraceCheckUtils]: 17: Hoare triple {1783#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1783#false} is VALID [2022-04-07 17:30:29,011 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:30:29,011 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:30:29,011 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [245132424] [2022-04-07 17:30:29,011 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [245132424] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:30:29,012 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [740216849] [2022-04-07 17:30:29,012 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:30:29,012 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:30:29,012 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:30:29,019 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:30:29,022 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2022-04-07 17:30:29,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:30:29,049 INFO L263 TraceCheckSpWp]: Trace formula consists of 63 conjuncts, 12 conjunts are in the unsatisfiable core [2022-04-07 17:30:29,061 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:30:29,061 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:30:29,341 INFO L272 TraceCheckUtils]: 0: Hoare triple {1782#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1782#true} is VALID [2022-04-07 17:30:29,341 INFO L290 TraceCheckUtils]: 1: Hoare triple {1782#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1782#true} is VALID [2022-04-07 17:30:29,341 INFO L290 TraceCheckUtils]: 2: Hoare triple {1782#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1782#true} is VALID [2022-04-07 17:30:29,342 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1782#true} {1782#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1782#true} is VALID [2022-04-07 17:30:29,342 INFO L272 TraceCheckUtils]: 4: Hoare triple {1782#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1782#true} is VALID [2022-04-07 17:30:29,342 INFO L290 TraceCheckUtils]: 5: Hoare triple {1782#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1787#(and (= main_~n~0 main_~x~0) (= main_~y~0 0))} is VALID [2022-04-07 17:30:29,342 INFO L290 TraceCheckUtils]: 6: Hoare triple {1787#(and (= main_~n~0 main_~x~0) (= main_~y~0 0))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1787#(and (= main_~n~0 main_~x~0) (= main_~y~0 0))} is VALID [2022-04-07 17:30:29,343 INFO L290 TraceCheckUtils]: 7: Hoare triple {1787#(and (= main_~n~0 main_~x~0) (= main_~y~0 0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1788#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (= main_~y~0 0))} is VALID [2022-04-07 17:30:29,343 INFO L290 TraceCheckUtils]: 8: Hoare triple {1788#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (= main_~y~0 0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1788#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (= main_~y~0 0))} is VALID [2022-04-07 17:30:29,344 INFO L290 TraceCheckUtils]: 9: Hoare triple {1788#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (= main_~y~0 0))} [101] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (= (+ (* (- 1) v_main_~y~0_3) v_main_~y~0_4 v_main_~z~0_3) v_main_~z~0_2) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1789#(and (<= main_~z~0 0) (= main_~n~0 main_~x~0) (<= 0 main_~z~0))} is VALID [2022-04-07 17:30:29,344 INFO L290 TraceCheckUtils]: 10: Hoare triple {1789#(and (<= main_~z~0 0) (= main_~n~0 main_~x~0) (<= 0 main_~z~0))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1789#(and (<= main_~z~0 0) (= main_~n~0 main_~x~0) (<= 0 main_~z~0))} is VALID [2022-04-07 17:30:29,345 INFO L290 TraceCheckUtils]: 11: Hoare triple {1789#(and (<= main_~z~0 0) (= main_~n~0 main_~x~0) (<= 0 main_~z~0))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1789#(and (<= main_~z~0 0) (= main_~n~0 main_~x~0) (<= 0 main_~z~0))} is VALID [2022-04-07 17:30:29,346 INFO L290 TraceCheckUtils]: 12: Hoare triple {1789#(and (<= main_~z~0 0) (= main_~n~0 main_~x~0) (<= 0 main_~z~0))} [107] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~x~0_11 v_main_~x~0_10) (<= .cse0 0) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)) (and (= v_main_~x~0_10 (+ v_main_~x~0_11 v_main_~z~0_10 (* (- 1) v_main_~z~0_9))) (< 0 .cse0) (forall ((v_it_5 Int)) (or (not (<= (+ v_main_~z~0_9 v_it_5 1) v_main_~z~0_10)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)))) (< v_main_~z~0_9 v_main_~z~0_10)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {1833#(= main_~n~0 main_~x~0)} is VALID [2022-04-07 17:30:29,346 INFO L290 TraceCheckUtils]: 13: Hoare triple {1833#(= main_~n~0 main_~x~0)} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1833#(= main_~n~0 main_~x~0)} is VALID [2022-04-07 17:30:29,347 INFO L272 TraceCheckUtils]: 14: Hoare triple {1833#(= main_~n~0 main_~x~0)} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {1840#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:30:29,348 INFO L290 TraceCheckUtils]: 15: Hoare triple {1840#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1844#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:30:29,348 INFO L290 TraceCheckUtils]: 16: Hoare triple {1844#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1783#false} is VALID [2022-04-07 17:30:29,348 INFO L290 TraceCheckUtils]: 17: Hoare triple {1783#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1783#false} is VALID [2022-04-07 17:30:29,348 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:30:29,348 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 17:31:11,450 WARN L855 $PredicateComparison]: unable to prove that (or (< 0 (mod c_main_~z~0 4294967296)) (forall ((aux_mod_v_main_~x~0_44_31 Int)) (or (>= aux_mod_v_main_~x~0_44_31 4294967296) (> 0 aux_mod_v_main_~x~0_44_31) (= aux_mod_v_main_~x~0_44_31 (mod c_main_~n~0 4294967296)) (and (forall ((aux_mod_v_main_~z~0_39_31 Int) (aux_div_v_main_~x~0_44_31 Int)) (or (exists ((v_it_5 Int)) (and (<= (+ v_it_5 c_main_~x~0 1) (+ aux_mod_v_main_~x~0_44_31 (* aux_div_v_main_~x~0_44_31 4294967296))) (<= 1 v_it_5) (not (< 0 (mod (+ aux_mod_v_main_~z~0_39_31 (* v_it_5 4294967295)) 4294967296))))) (not (< 0 (mod c_main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_39_31 Int)) (or (exists ((v_it_3 Int)) (and (<= (+ v_it_3 c_main_~z~0 1) (+ (* 4294967296 aux_div_v_main_~z~0_39_31) aux_mod_v_main_~z~0_39_31)) (not (< 0 (mod (+ (* v_it_3 4294967295) c_main_~y~0) 4294967296))) (<= 1 v_it_3))) (not (< c_main_~z~0 (+ (* 4294967296 aux_div_v_main_~z~0_39_31) aux_mod_v_main_~z~0_39_31))))) (<= aux_mod_v_main_~z~0_39_31 0) (<= 4294967296 aux_mod_v_main_~z~0_39_31) (<= (+ aux_mod_v_main_~x~0_44_31 (* aux_div_v_main_~x~0_44_31 4294967296)) c_main_~x~0))) (or (forall ((aux_div_v_main_~x~0_44_31 Int)) (not (= (+ aux_mod_v_main_~x~0_44_31 (* aux_div_v_main_~x~0_44_31 4294967296)) c_main_~x~0))) (forall ((aux_mod_v_main_~z~0_39_31 Int)) (or (< aux_mod_v_main_~z~0_39_31 0) (< 0 aux_mod_v_main_~z~0_39_31) (let ((.cse0 (< 0 (mod c_main_~y~0 4294967296)))) (and (or (not .cse0) (forall ((aux_div_v_main_~z~0_39_31 Int)) (or (exists ((v_it_3 Int)) (and (<= (+ v_it_3 c_main_~z~0 1) (+ (* 4294967296 aux_div_v_main_~z~0_39_31) aux_mod_v_main_~z~0_39_31)) (not (< 0 (mod (+ (* v_it_3 4294967295) c_main_~y~0) 4294967296))) (<= 1 v_it_3))) (not (< c_main_~z~0 (+ (* 4294967296 aux_div_v_main_~z~0_39_31) aux_mod_v_main_~z~0_39_31)))))) (or .cse0 (forall ((aux_div_v_main_~z~0_39_31 Int)) (not (= (+ (* 4294967296 aux_div_v_main_~z~0_39_31) aux_mod_v_main_~z~0_39_31) c_main_~z~0))))))))))))) is different from true [2022-04-07 17:31:16,175 INFO L290 TraceCheckUtils]: 17: Hoare triple {1783#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1783#false} is VALID [2022-04-07 17:31:16,176 INFO L290 TraceCheckUtils]: 16: Hoare triple {1844#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1783#false} is VALID [2022-04-07 17:31:16,176 INFO L290 TraceCheckUtils]: 15: Hoare triple {1840#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1844#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:31:16,177 INFO L272 TraceCheckUtils]: 14: Hoare triple {1860#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {1840#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:31:16,177 INFO L290 TraceCheckUtils]: 13: Hoare triple {1860#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1860#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is VALID [2022-04-07 17:31:18,215 WARN L290 TraceCheckUtils]: 12: Hoare triple {1867#(forall ((aux_mod_v_main_~x~0_44_31 Int)) (or (>= aux_mod_v_main_~x~0_44_31 4294967296) (and (or (forall ((aux_div_v_main_~x~0_44_31 Int)) (or (exists ((v_it_5 Int)) (and (<= (+ v_it_5 main_~x~0 1) (+ aux_mod_v_main_~x~0_44_31 (* aux_div_v_main_~x~0_44_31 4294967296))) (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5))) (not (< main_~x~0 (+ aux_mod_v_main_~x~0_44_31 (* aux_div_v_main_~x~0_44_31 4294967296)))))) (not (< 0 (mod main_~z~0 4294967296)))) (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~x~0_44_31 Int)) (not (= main_~x~0 (+ aux_mod_v_main_~x~0_44_31 (* aux_div_v_main_~x~0_44_31 4294967296))))))) (> 0 aux_mod_v_main_~x~0_44_31) (= aux_mod_v_main_~x~0_44_31 (mod main_~n~0 4294967296))))} [107] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~x~0_11 v_main_~x~0_10) (<= .cse0 0) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)) (and (= v_main_~x~0_10 (+ v_main_~x~0_11 v_main_~z~0_10 (* (- 1) v_main_~z~0_9))) (< 0 .cse0) (forall ((v_it_5 Int)) (or (not (<= (+ v_main_~z~0_9 v_it_5 1) v_main_~z~0_10)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)))) (< v_main_~z~0_9 v_main_~z~0_10)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {1860#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is UNKNOWN [2022-04-07 17:31:20,226 WARN L290 TraceCheckUtils]: 11: Hoare triple {1867#(forall ((aux_mod_v_main_~x~0_44_31 Int)) (or (>= aux_mod_v_main_~x~0_44_31 4294967296) (and (or (forall ((aux_div_v_main_~x~0_44_31 Int)) (or (exists ((v_it_5 Int)) (and (<= (+ v_it_5 main_~x~0 1) (+ aux_mod_v_main_~x~0_44_31 (* aux_div_v_main_~x~0_44_31 4294967296))) (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5))) (not (< main_~x~0 (+ aux_mod_v_main_~x~0_44_31 (* aux_div_v_main_~x~0_44_31 4294967296)))))) (not (< 0 (mod main_~z~0 4294967296)))) (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~x~0_44_31 Int)) (not (= main_~x~0 (+ aux_mod_v_main_~x~0_44_31 (* aux_div_v_main_~x~0_44_31 4294967296))))))) (> 0 aux_mod_v_main_~x~0_44_31) (= aux_mod_v_main_~x~0_44_31 (mod main_~n~0 4294967296))))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1867#(forall ((aux_mod_v_main_~x~0_44_31 Int)) (or (>= aux_mod_v_main_~x~0_44_31 4294967296) (and (or (forall ((aux_div_v_main_~x~0_44_31 Int)) (or (exists ((v_it_5 Int)) (and (<= (+ v_it_5 main_~x~0 1) (+ aux_mod_v_main_~x~0_44_31 (* aux_div_v_main_~x~0_44_31 4294967296))) (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5))) (not (< main_~x~0 (+ aux_mod_v_main_~x~0_44_31 (* aux_div_v_main_~x~0_44_31 4294967296)))))) (not (< 0 (mod main_~z~0 4294967296)))) (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~x~0_44_31 Int)) (not (= main_~x~0 (+ aux_mod_v_main_~x~0_44_31 (* aux_div_v_main_~x~0_44_31 4294967296))))))) (> 0 aux_mod_v_main_~x~0_44_31) (= aux_mod_v_main_~x~0_44_31 (mod main_~n~0 4294967296))))} is UNKNOWN [2022-04-07 17:31:22,246 WARN L290 TraceCheckUtils]: 10: Hoare triple {1867#(forall ((aux_mod_v_main_~x~0_44_31 Int)) (or (>= aux_mod_v_main_~x~0_44_31 4294967296) (and (or (forall ((aux_div_v_main_~x~0_44_31 Int)) (or (exists ((v_it_5 Int)) (and (<= (+ v_it_5 main_~x~0 1) (+ aux_mod_v_main_~x~0_44_31 (* aux_div_v_main_~x~0_44_31 4294967296))) (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5))) (not (< main_~x~0 (+ aux_mod_v_main_~x~0_44_31 (* aux_div_v_main_~x~0_44_31 4294967296)))))) (not (< 0 (mod main_~z~0 4294967296)))) (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~x~0_44_31 Int)) (not (= main_~x~0 (+ aux_mod_v_main_~x~0_44_31 (* aux_div_v_main_~x~0_44_31 4294967296))))))) (> 0 aux_mod_v_main_~x~0_44_31) (= aux_mod_v_main_~x~0_44_31 (mod main_~n~0 4294967296))))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1867#(forall ((aux_mod_v_main_~x~0_44_31 Int)) (or (>= aux_mod_v_main_~x~0_44_31 4294967296) (and (or (forall ((aux_div_v_main_~x~0_44_31 Int)) (or (exists ((v_it_5 Int)) (and (<= (+ v_it_5 main_~x~0 1) (+ aux_mod_v_main_~x~0_44_31 (* aux_div_v_main_~x~0_44_31 4294967296))) (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5))) (not (< main_~x~0 (+ aux_mod_v_main_~x~0_44_31 (* aux_div_v_main_~x~0_44_31 4294967296)))))) (not (< 0 (mod main_~z~0 4294967296)))) (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~x~0_44_31 Int)) (not (= main_~x~0 (+ aux_mod_v_main_~x~0_44_31 (* aux_div_v_main_~x~0_44_31 4294967296))))))) (> 0 aux_mod_v_main_~x~0_44_31) (= aux_mod_v_main_~x~0_44_31 (mod main_~n~0 4294967296))))} is UNKNOWN [2022-04-07 17:31:24,257 WARN L290 TraceCheckUtils]: 9: Hoare triple {1877#(forall ((aux_mod_v_main_~x~0_44_31 Int)) (or (>= aux_mod_v_main_~x~0_44_31 4294967296) (> 0 aux_mod_v_main_~x~0_44_31) (and (forall ((aux_mod_v_main_~z~0_39_31 Int) (aux_div_v_main_~x~0_44_31 Int)) (or (and (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_39_31 Int)) (or (not (< main_~z~0 (+ (* 4294967296 aux_div_v_main_~z~0_39_31) aux_mod_v_main_~z~0_39_31))) (exists ((v_it_3 Int)) (and (<= (+ v_it_3 main_~z~0 1) (+ (* 4294967296 aux_div_v_main_~z~0_39_31) aux_mod_v_main_~z~0_39_31)) (<= 1 v_it_3) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296)))))))) (or (forall ((aux_div_v_main_~z~0_39_31 Int)) (not (= (+ (* 4294967296 aux_div_v_main_~z~0_39_31) aux_mod_v_main_~z~0_39_31) main_~z~0))) (< 0 (mod main_~y~0 4294967296)))) (exists ((v_it_5 Int)) (and (<= (+ v_it_5 main_~x~0 1) (+ aux_mod_v_main_~x~0_44_31 (* aux_div_v_main_~x~0_44_31 4294967296))) (<= 1 v_it_5) (not (< 0 (mod (+ aux_mod_v_main_~z~0_39_31 (* v_it_5 4294967295)) 4294967296))))) (<= (+ aux_mod_v_main_~x~0_44_31 (* aux_div_v_main_~x~0_44_31 4294967296)) main_~x~0) (<= aux_mod_v_main_~z~0_39_31 0) (<= 4294967296 aux_mod_v_main_~z~0_39_31))) (or (forall ((aux_div_v_main_~x~0_44_31 Int)) (not (= main_~x~0 (+ aux_mod_v_main_~x~0_44_31 (* aux_div_v_main_~x~0_44_31 4294967296))))) (forall ((aux_mod_v_main_~z~0_39_31 Int)) (or (and (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_39_31 Int)) (or (not (< main_~z~0 (+ (* 4294967296 aux_div_v_main_~z~0_39_31) aux_mod_v_main_~z~0_39_31))) (exists ((v_it_3 Int)) (and (<= (+ v_it_3 main_~z~0 1) (+ (* 4294967296 aux_div_v_main_~z~0_39_31) aux_mod_v_main_~z~0_39_31)) (<= 1 v_it_3) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296)))))))) (or (forall ((aux_div_v_main_~z~0_39_31 Int)) (not (= (+ (* 4294967296 aux_div_v_main_~z~0_39_31) aux_mod_v_main_~z~0_39_31) main_~z~0))) (< 0 (mod main_~y~0 4294967296)))) (< aux_mod_v_main_~z~0_39_31 0) (< 0 aux_mod_v_main_~z~0_39_31))))) (= aux_mod_v_main_~x~0_44_31 (mod main_~n~0 4294967296))))} [101] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (= (+ (* (- 1) v_main_~y~0_3) v_main_~y~0_4 v_main_~z~0_3) v_main_~z~0_2) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1867#(forall ((aux_mod_v_main_~x~0_44_31 Int)) (or (>= aux_mod_v_main_~x~0_44_31 4294967296) (and (or (forall ((aux_div_v_main_~x~0_44_31 Int)) (or (exists ((v_it_5 Int)) (and (<= (+ v_it_5 main_~x~0 1) (+ aux_mod_v_main_~x~0_44_31 (* aux_div_v_main_~x~0_44_31 4294967296))) (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5))) (not (< main_~x~0 (+ aux_mod_v_main_~x~0_44_31 (* aux_div_v_main_~x~0_44_31 4294967296)))))) (not (< 0 (mod main_~z~0 4294967296)))) (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~x~0_44_31 Int)) (not (= main_~x~0 (+ aux_mod_v_main_~x~0_44_31 (* aux_div_v_main_~x~0_44_31 4294967296))))))) (> 0 aux_mod_v_main_~x~0_44_31) (= aux_mod_v_main_~x~0_44_31 (mod main_~n~0 4294967296))))} is UNKNOWN [2022-04-07 17:31:26,266 WARN L290 TraceCheckUtils]: 8: Hoare triple {1881#(or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_mod_v_main_~x~0_44_31 Int)) (or (>= aux_mod_v_main_~x~0_44_31 4294967296) (> 0 aux_mod_v_main_~x~0_44_31) (and (forall ((aux_mod_v_main_~z~0_39_31 Int) (aux_div_v_main_~x~0_44_31 Int)) (or (not (< 0 (mod main_~y~0 4294967296))) (exists ((v_it_5 Int)) (and (<= (+ v_it_5 main_~x~0 1) (+ aux_mod_v_main_~x~0_44_31 (* aux_div_v_main_~x~0_44_31 4294967296))) (<= 1 v_it_5) (not (< 0 (mod (+ aux_mod_v_main_~z~0_39_31 (* v_it_5 4294967295)) 4294967296))))) (forall ((aux_div_v_main_~z~0_39_31 Int)) (or (not (< main_~z~0 (+ (* 4294967296 aux_div_v_main_~z~0_39_31) aux_mod_v_main_~z~0_39_31))) (exists ((v_it_3 Int)) (and (<= (+ v_it_3 main_~z~0 1) (+ (* 4294967296 aux_div_v_main_~z~0_39_31) aux_mod_v_main_~z~0_39_31)) (<= 1 v_it_3) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296))))))) (<= (+ aux_mod_v_main_~x~0_44_31 (* aux_div_v_main_~x~0_44_31 4294967296)) main_~x~0) (<= aux_mod_v_main_~z~0_39_31 0) (<= 4294967296 aux_mod_v_main_~z~0_39_31))) (or (forall ((aux_div_v_main_~x~0_44_31 Int)) (not (= main_~x~0 (+ aux_mod_v_main_~x~0_44_31 (* aux_div_v_main_~x~0_44_31 4294967296))))) (forall ((aux_mod_v_main_~z~0_39_31 Int)) (or (and (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_39_31 Int)) (or (not (< main_~z~0 (+ (* 4294967296 aux_div_v_main_~z~0_39_31) aux_mod_v_main_~z~0_39_31))) (exists ((v_it_3 Int)) (and (<= (+ v_it_3 main_~z~0 1) (+ (* 4294967296 aux_div_v_main_~z~0_39_31) aux_mod_v_main_~z~0_39_31)) (<= 1 v_it_3) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296)))))))) (or (forall ((aux_div_v_main_~z~0_39_31 Int)) (not (= (+ (* 4294967296 aux_div_v_main_~z~0_39_31) aux_mod_v_main_~z~0_39_31) main_~z~0))) (< 0 (mod main_~y~0 4294967296)))) (< aux_mod_v_main_~z~0_39_31 0) (< 0 aux_mod_v_main_~z~0_39_31))))) (= aux_mod_v_main_~x~0_44_31 (mod main_~n~0 4294967296)))))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1877#(forall ((aux_mod_v_main_~x~0_44_31 Int)) (or (>= aux_mod_v_main_~x~0_44_31 4294967296) (> 0 aux_mod_v_main_~x~0_44_31) (and (forall ((aux_mod_v_main_~z~0_39_31 Int) (aux_div_v_main_~x~0_44_31 Int)) (or (and (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_39_31 Int)) (or (not (< main_~z~0 (+ (* 4294967296 aux_div_v_main_~z~0_39_31) aux_mod_v_main_~z~0_39_31))) (exists ((v_it_3 Int)) (and (<= (+ v_it_3 main_~z~0 1) (+ (* 4294967296 aux_div_v_main_~z~0_39_31) aux_mod_v_main_~z~0_39_31)) (<= 1 v_it_3) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296)))))))) (or (forall ((aux_div_v_main_~z~0_39_31 Int)) (not (= (+ (* 4294967296 aux_div_v_main_~z~0_39_31) aux_mod_v_main_~z~0_39_31) main_~z~0))) (< 0 (mod main_~y~0 4294967296)))) (exists ((v_it_5 Int)) (and (<= (+ v_it_5 main_~x~0 1) (+ aux_mod_v_main_~x~0_44_31 (* aux_div_v_main_~x~0_44_31 4294967296))) (<= 1 v_it_5) (not (< 0 (mod (+ aux_mod_v_main_~z~0_39_31 (* v_it_5 4294967295)) 4294967296))))) (<= (+ aux_mod_v_main_~x~0_44_31 (* aux_div_v_main_~x~0_44_31 4294967296)) main_~x~0) (<= aux_mod_v_main_~z~0_39_31 0) (<= 4294967296 aux_mod_v_main_~z~0_39_31))) (or (forall ((aux_div_v_main_~x~0_44_31 Int)) (not (= main_~x~0 (+ aux_mod_v_main_~x~0_44_31 (* aux_div_v_main_~x~0_44_31 4294967296))))) (forall ((aux_mod_v_main_~z~0_39_31 Int)) (or (and (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_39_31 Int)) (or (not (< main_~z~0 (+ (* 4294967296 aux_div_v_main_~z~0_39_31) aux_mod_v_main_~z~0_39_31))) (exists ((v_it_3 Int)) (and (<= (+ v_it_3 main_~z~0 1) (+ (* 4294967296 aux_div_v_main_~z~0_39_31) aux_mod_v_main_~z~0_39_31)) (<= 1 v_it_3) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296)))))))) (or (forall ((aux_div_v_main_~z~0_39_31 Int)) (not (= (+ (* 4294967296 aux_div_v_main_~z~0_39_31) aux_mod_v_main_~z~0_39_31) main_~z~0))) (< 0 (mod main_~y~0 4294967296)))) (< aux_mod_v_main_~z~0_39_31 0) (< 0 aux_mod_v_main_~z~0_39_31))))) (= aux_mod_v_main_~x~0_44_31 (mod main_~n~0 4294967296))))} is UNKNOWN [2022-04-07 17:31:26,271 INFO L290 TraceCheckUtils]: 7: Hoare triple {1885#(or (and (<= (div (+ (- 1) (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (* (- 1) (mod main_~n~0 4294967296))) 4294967296) 1)) (<= (div (+ (- 1) main_~x~0 (* (- 1) (mod main_~n~0 4294967296))) 4294967296) (div (+ main_~x~0 (- 4294967296)) 4294967296))) (< 0 (mod main_~y~0 4294967296)))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1881#(or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_mod_v_main_~x~0_44_31 Int)) (or (>= aux_mod_v_main_~x~0_44_31 4294967296) (> 0 aux_mod_v_main_~x~0_44_31) (and (forall ((aux_mod_v_main_~z~0_39_31 Int) (aux_div_v_main_~x~0_44_31 Int)) (or (not (< 0 (mod main_~y~0 4294967296))) (exists ((v_it_5 Int)) (and (<= (+ v_it_5 main_~x~0 1) (+ aux_mod_v_main_~x~0_44_31 (* aux_div_v_main_~x~0_44_31 4294967296))) (<= 1 v_it_5) (not (< 0 (mod (+ aux_mod_v_main_~z~0_39_31 (* v_it_5 4294967295)) 4294967296))))) (forall ((aux_div_v_main_~z~0_39_31 Int)) (or (not (< main_~z~0 (+ (* 4294967296 aux_div_v_main_~z~0_39_31) aux_mod_v_main_~z~0_39_31))) (exists ((v_it_3 Int)) (and (<= (+ v_it_3 main_~z~0 1) (+ (* 4294967296 aux_div_v_main_~z~0_39_31) aux_mod_v_main_~z~0_39_31)) (<= 1 v_it_3) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296))))))) (<= (+ aux_mod_v_main_~x~0_44_31 (* aux_div_v_main_~x~0_44_31 4294967296)) main_~x~0) (<= aux_mod_v_main_~z~0_39_31 0) (<= 4294967296 aux_mod_v_main_~z~0_39_31))) (or (forall ((aux_div_v_main_~x~0_44_31 Int)) (not (= main_~x~0 (+ aux_mod_v_main_~x~0_44_31 (* aux_div_v_main_~x~0_44_31 4294967296))))) (forall ((aux_mod_v_main_~z~0_39_31 Int)) (or (and (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_39_31 Int)) (or (not (< main_~z~0 (+ (* 4294967296 aux_div_v_main_~z~0_39_31) aux_mod_v_main_~z~0_39_31))) (exists ((v_it_3 Int)) (and (<= (+ v_it_3 main_~z~0 1) (+ (* 4294967296 aux_div_v_main_~z~0_39_31) aux_mod_v_main_~z~0_39_31)) (<= 1 v_it_3) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296)))))))) (or (forall ((aux_div_v_main_~z~0_39_31 Int)) (not (= (+ (* 4294967296 aux_div_v_main_~z~0_39_31) aux_mod_v_main_~z~0_39_31) main_~z~0))) (< 0 (mod main_~y~0 4294967296)))) (< aux_mod_v_main_~z~0_39_31 0) (< 0 aux_mod_v_main_~z~0_39_31))))) (= aux_mod_v_main_~x~0_44_31 (mod main_~n~0 4294967296)))))} is VALID [2022-04-07 17:31:26,273 INFO L290 TraceCheckUtils]: 6: Hoare triple {1885#(or (and (<= (div (+ (- 1) (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (* (- 1) (mod main_~n~0 4294967296))) 4294967296) 1)) (<= (div (+ (- 1) main_~x~0 (* (- 1) (mod main_~n~0 4294967296))) 4294967296) (div (+ main_~x~0 (- 4294967296)) 4294967296))) (< 0 (mod main_~y~0 4294967296)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1885#(or (and (<= (div (+ (- 1) (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (* (- 1) (mod main_~n~0 4294967296))) 4294967296) 1)) (<= (div (+ (- 1) main_~x~0 (* (- 1) (mod main_~n~0 4294967296))) 4294967296) (div (+ main_~x~0 (- 4294967296)) 4294967296))) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-07 17:31:26,277 INFO L290 TraceCheckUtils]: 5: Hoare triple {1782#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1885#(or (and (<= (div (+ (- 1) (* (- 1) main_~x~0)) (- 4294967296)) (+ (div (+ main_~x~0 (* (- 1) (mod main_~n~0 4294967296))) 4294967296) 1)) (<= (div (+ (- 1) main_~x~0 (* (- 1) (mod main_~n~0 4294967296))) 4294967296) (div (+ main_~x~0 (- 4294967296)) 4294967296))) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-07 17:31:26,277 INFO L272 TraceCheckUtils]: 4: Hoare triple {1782#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1782#true} is VALID [2022-04-07 17:31:26,277 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1782#true} {1782#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1782#true} is VALID [2022-04-07 17:31:26,277 INFO L290 TraceCheckUtils]: 2: Hoare triple {1782#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1782#true} is VALID [2022-04-07 17:31:26,277 INFO L290 TraceCheckUtils]: 1: Hoare triple {1782#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1782#true} is VALID [2022-04-07 17:31:26,277 INFO L272 TraceCheckUtils]: 0: Hoare triple {1782#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1782#true} is VALID [2022-04-07 17:31:26,278 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 1 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:31:26,278 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [740216849] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 17:31:26,278 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 17:31:26,278 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 8, 9] total 17 [2022-04-07 17:31:26,278 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1774435093] [2022-04-07 17:31:26,278 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 17:31:26,279 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 17 states have (on average 1.6470588235294117) internal successors, (28), 14 states have internal predecessors, (28), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-07 17:31:26,279 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:31:26,279 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 17 states, 17 states have (on average 1.6470588235294117) internal successors, (28), 14 states have internal predecessors, (28), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:31:36,435 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 35 edges. 30 inductive. 0 not inductive. 5 times theorem prover too weak to decide inductivity. [2022-04-07 17:31:36,435 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 17 states [2022-04-07 17:31:36,435 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:31:36,435 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2022-04-07 17:31:36,435 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=56, Invalid=174, Unknown=14, NotChecked=28, Total=272 [2022-04-07 17:31:36,436 INFO L87 Difference]: Start difference. First operand 35 states and 52 transitions. Second operand has 17 states, 17 states have (on average 1.6470588235294117) internal successors, (28), 14 states have internal predecessors, (28), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:31:47,239 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:31:47,239 INFO L93 Difference]: Finished difference Result 47 states and 71 transitions. [2022-04-07 17:31:47,239 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-04-07 17:31:47,239 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 17 states have (on average 1.6470588235294117) internal successors, (28), 14 states have internal predecessors, (28), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-07 17:31:47,240 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:31:47,240 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 17 states have (on average 1.6470588235294117) internal successors, (28), 14 states have internal predecessors, (28), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:31:47,241 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 45 transitions. [2022-04-07 17:31:47,241 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 17 states have (on average 1.6470588235294117) internal successors, (28), 14 states have internal predecessors, (28), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:31:47,242 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 45 transitions. [2022-04-07 17:31:47,243 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 10 states and 45 transitions. [2022-04-07 17:31:47,287 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 45 edges. 45 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:31:47,288 INFO L225 Difference]: With dead ends: 47 [2022-04-07 17:31:47,288 INFO L226 Difference]: Without dead ends: 44 [2022-04-07 17:31:47,288 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 53 GetRequests, 29 SyntacticMatches, 3 SemanticMatches, 21 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 89 ImplicationChecksByTransitivity, 44.1s TimeCoverageRelationStatistics Valid=110, Invalid=337, Unknown=19, NotChecked=40, Total=506 [2022-04-07 17:31:47,289 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 29 mSDsluCounter, 54 mSDsCounter, 0 mSdLazyCounter, 87 mSolverCounterSat, 11 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 29 SdHoareTripleChecker+Valid, 66 SdHoareTripleChecker+Invalid, 154 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 11 IncrementalHoareTripleChecker+Valid, 87 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 56 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 17:31:47,289 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [29 Valid, 66 Invalid, 154 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [11 Valid, 87 Invalid, 0 Unknown, 56 Unchecked, 0.1s Time] [2022-04-07 17:31:47,290 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states. [2022-04-07 17:31:47,301 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 37. [2022-04-07 17:31:47,301 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:31:47,301 INFO L82 GeneralOperation]: Start isEquivalent. First operand 44 states. Second operand has 37 states, 32 states have (on average 1.625) internal successors, (52), 32 states have internal predecessors, (52), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:31:47,301 INFO L74 IsIncluded]: Start isIncluded. First operand 44 states. Second operand has 37 states, 32 states have (on average 1.625) internal successors, (52), 32 states have internal predecessors, (52), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:31:47,302 INFO L87 Difference]: Start difference. First operand 44 states. Second operand has 37 states, 32 states have (on average 1.625) internal successors, (52), 32 states have internal predecessors, (52), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:31:47,303 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:31:47,303 INFO L93 Difference]: Finished difference Result 44 states and 68 transitions. [2022-04-07 17:31:47,303 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 68 transitions. [2022-04-07 17:31:47,304 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:31:47,304 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:31:47,304 INFO L74 IsIncluded]: Start isIncluded. First operand has 37 states, 32 states have (on average 1.625) internal successors, (52), 32 states have internal predecessors, (52), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 44 states. [2022-04-07 17:31:47,304 INFO L87 Difference]: Start difference. First operand has 37 states, 32 states have (on average 1.625) internal successors, (52), 32 states have internal predecessors, (52), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 44 states. [2022-04-07 17:31:47,312 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:31:47,312 INFO L93 Difference]: Finished difference Result 44 states and 68 transitions. [2022-04-07 17:31:47,312 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 68 transitions. [2022-04-07 17:31:47,312 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:31:47,312 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:31:47,312 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:31:47,313 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:31:47,313 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 37 states, 32 states have (on average 1.625) internal successors, (52), 32 states have internal predecessors, (52), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:31:47,314 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 56 transitions. [2022-04-07 17:31:47,315 INFO L78 Accepts]: Start accepts. Automaton has 37 states and 56 transitions. Word has length 18 [2022-04-07 17:31:47,315 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:31:47,315 INFO L478 AbstractCegarLoop]: Abstraction has 37 states and 56 transitions. [2022-04-07 17:31:47,315 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 17 states, 17 states have (on average 1.6470588235294117) internal successors, (28), 14 states have internal predecessors, (28), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:31:47,315 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 56 transitions. [2022-04-07 17:31:47,316 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-04-07 17:31:47,316 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:31:47,316 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:31:47,334 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Ended with exit code 0 [2022-04-07 17:31:47,527 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8,8 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:31:47,528 INFO L403 AbstractCegarLoop]: === Iteration 10 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:31:47,528 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:31:47,528 INFO L85 PathProgramCache]: Analyzing trace with hash -984935833, now seen corresponding path program 1 times [2022-04-07 17:31:47,528 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:31:47,528 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1755225789] [2022-04-07 17:31:47,528 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:31:47,528 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:31:47,542 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.0))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-07 17:31:47,547 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.1))) (+ main_~z~0_8 .cse0 (* (- 4294967296) (div (+ main_~z~0_8 .cse0) 4294967296)))) 0)) [2022-04-07 17:31:47,564 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:31:47,573 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.2))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-07 17:31:47,578 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.3))) (+ main_~z~0_8 .cse0 (* (- 4294967296) (div (+ main_~z~0_8 .cse0) 4294967296)))) 0)) [2022-04-07 17:31:47,745 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:31:47,746 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:31:47,749 INFO L290 TraceCheckUtils]: 0: Hoare triple {2108#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2095#true} is VALID [2022-04-07 17:31:47,749 INFO L290 TraceCheckUtils]: 1: Hoare triple {2095#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2095#true} is VALID [2022-04-07 17:31:47,750 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2095#true} {2095#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2095#true} is VALID [2022-04-07 17:31:47,750 INFO L272 TraceCheckUtils]: 0: Hoare triple {2095#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2108#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:31:47,750 INFO L290 TraceCheckUtils]: 1: Hoare triple {2108#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2095#true} is VALID [2022-04-07 17:31:47,750 INFO L290 TraceCheckUtils]: 2: Hoare triple {2095#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2095#true} is VALID [2022-04-07 17:31:47,751 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2095#true} {2095#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2095#true} is VALID [2022-04-07 17:31:47,751 INFO L272 TraceCheckUtils]: 4: Hoare triple {2095#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2095#true} is VALID [2022-04-07 17:31:47,751 INFO L290 TraceCheckUtils]: 5: Hoare triple {2095#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2100#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-07 17:31:47,752 INFO L290 TraceCheckUtils]: 6: Hoare triple {2100#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2101#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 17:31:47,752 INFO L290 TraceCheckUtils]: 7: Hoare triple {2101#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {2101#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 17:31:47,753 INFO L290 TraceCheckUtils]: 8: Hoare triple {2101#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [98] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_8 4294967296))) (or (and (= v_main_~x~0_9 v_main_~x~0_8) (<= .cse0 0) (= v_main_~z~0_8 v_main_~z~0_7) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)) (and (forall ((v_it_2 Int)) (or (< 0 (mod (+ v_main_~z~0_8 (* v_it_2 4294967295)) 4294967296)) (not (<= (+ v_main_~z~0_7 v_it_2 1) v_main_~z~0_8)) (not (<= 1 v_it_2)))) (= (+ v_main_~x~0_9 v_main_~z~0_8 (* (- 1) v_main_~z~0_7)) v_main_~x~0_8) (< 0 .cse0) (< v_main_~z~0_7 v_main_~z~0_8)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_8, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2102#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} is VALID [2022-04-07 17:31:47,754 INFO L290 TraceCheckUtils]: 9: Hoare triple {2102#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {2103#(and (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} is VALID [2022-04-07 17:31:47,755 INFO L290 TraceCheckUtils]: 10: Hoare triple {2103#(and (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2103#(and (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} is VALID [2022-04-07 17:31:47,756 INFO L290 TraceCheckUtils]: 11: Hoare triple {2103#(and (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2104#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} is VALID [2022-04-07 17:31:47,758 INFO L290 TraceCheckUtils]: 12: Hoare triple {2104#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} [107] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~x~0_11 v_main_~x~0_10) (<= .cse0 0) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)) (and (= v_main_~x~0_10 (+ v_main_~x~0_11 v_main_~z~0_10 (* (- 1) v_main_~z~0_9))) (< 0 .cse0) (forall ((v_it_5 Int)) (or (not (<= (+ v_main_~z~0_9 v_it_5 1) v_main_~z~0_10)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)))) (< v_main_~z~0_9 v_main_~z~0_10)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {2105#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:31:47,759 INFO L290 TraceCheckUtils]: 13: Hoare triple {2105#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {2105#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:31:47,760 INFO L272 TraceCheckUtils]: 14: Hoare triple {2105#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {2106#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:31:47,760 INFO L290 TraceCheckUtils]: 15: Hoare triple {2106#(not (= |__VERIFIER_assert_#in~cond| 0))} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2107#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:31:47,761 INFO L290 TraceCheckUtils]: 16: Hoare triple {2107#(not (= __VERIFIER_assert_~cond 0))} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2096#false} is VALID [2022-04-07 17:31:47,761 INFO L290 TraceCheckUtils]: 17: Hoare triple {2096#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2096#false} is VALID [2022-04-07 17:31:47,761 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:31:47,761 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:31:47,761 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1755225789] [2022-04-07 17:31:47,761 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1755225789] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:31:47,762 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2100412660] [2022-04-07 17:31:47,762 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:31:47,762 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:31:47,762 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:31:47,764 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:31:47,791 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2022-04-07 17:31:47,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:31:47,810 INFO L263 TraceCheckSpWp]: Trace formula consists of 63 conjuncts, 9 conjunts are in the unsatisfiable core [2022-04-07 17:31:47,818 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:31:47,819 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:31:49,338 INFO L272 TraceCheckUtils]: 0: Hoare triple {2095#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2095#true} is VALID [2022-04-07 17:31:49,338 INFO L290 TraceCheckUtils]: 1: Hoare triple {2095#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2095#true} is VALID [2022-04-07 17:31:49,339 INFO L290 TraceCheckUtils]: 2: Hoare triple {2095#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2095#true} is VALID [2022-04-07 17:31:49,339 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2095#true} {2095#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2095#true} is VALID [2022-04-07 17:31:49,339 INFO L272 TraceCheckUtils]: 4: Hoare triple {2095#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2095#true} is VALID [2022-04-07 17:31:49,339 INFO L290 TraceCheckUtils]: 5: Hoare triple {2095#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2100#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-07 17:31:49,340 INFO L290 TraceCheckUtils]: 6: Hoare triple {2100#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2102#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} is VALID [2022-04-07 17:31:49,340 INFO L290 TraceCheckUtils]: 7: Hoare triple {2102#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {2102#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} is VALID [2022-04-07 17:31:49,340 INFO L290 TraceCheckUtils]: 8: Hoare triple {2102#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} [98] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_8 4294967296))) (or (and (= v_main_~x~0_9 v_main_~x~0_8) (<= .cse0 0) (= v_main_~z~0_8 v_main_~z~0_7) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)) (and (forall ((v_it_2 Int)) (or (< 0 (mod (+ v_main_~z~0_8 (* v_it_2 4294967295)) 4294967296)) (not (<= (+ v_main_~z~0_7 v_it_2 1) v_main_~z~0_8)) (not (<= 1 v_it_2)))) (= (+ v_main_~x~0_9 v_main_~z~0_8 (* (- 1) v_main_~z~0_7)) v_main_~x~0_8) (< 0 .cse0) (< v_main_~z~0_7 v_main_~z~0_8)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_8, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2102#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} is VALID [2022-04-07 17:31:49,341 INFO L290 TraceCheckUtils]: 9: Hoare triple {2102#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {2103#(and (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} is VALID [2022-04-07 17:31:49,341 INFO L290 TraceCheckUtils]: 10: Hoare triple {2103#(and (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2103#(and (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} is VALID [2022-04-07 17:31:49,342 INFO L290 TraceCheckUtils]: 11: Hoare triple {2103#(and (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2104#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} is VALID [2022-04-07 17:31:49,344 INFO L290 TraceCheckUtils]: 12: Hoare triple {2104#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} [107] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~x~0_11 v_main_~x~0_10) (<= .cse0 0) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)) (and (= v_main_~x~0_10 (+ v_main_~x~0_11 v_main_~z~0_10 (* (- 1) v_main_~z~0_9))) (< 0 .cse0) (forall ((v_it_5 Int)) (or (not (<= (+ v_main_~z~0_9 v_it_5 1) v_main_~z~0_10)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)))) (< v_main_~z~0_9 v_main_~z~0_10)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {2148#(and (<= (div (- main_~x~0) (- 4294967296)) (div main_~x~0 4294967296)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-07 17:31:49,344 INFO L290 TraceCheckUtils]: 13: Hoare triple {2148#(and (<= (div (- main_~x~0) (- 4294967296)) (div main_~x~0 4294967296)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {2148#(and (<= (div (- main_~x~0) (- 4294967296)) (div main_~x~0 4294967296)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-07 17:31:49,345 INFO L272 TraceCheckUtils]: 14: Hoare triple {2148#(and (<= (div (- main_~x~0) (- 4294967296)) (div main_~x~0 4294967296)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {2155#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:31:49,346 INFO L290 TraceCheckUtils]: 15: Hoare triple {2155#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2159#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:31:49,346 INFO L290 TraceCheckUtils]: 16: Hoare triple {2159#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2096#false} is VALID [2022-04-07 17:31:49,346 INFO L290 TraceCheckUtils]: 17: Hoare triple {2096#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2096#false} is VALID [2022-04-07 17:31:49,346 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 17:31:49,346 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 17:31:57,598 WARN L232 SmtUtils]: Spent 5.10s on a formula simplification that was a NOOP. DAG size: 51 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 17:32:09,417 INFO L290 TraceCheckUtils]: 17: Hoare triple {2096#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2096#false} is VALID [2022-04-07 17:32:09,417 INFO L290 TraceCheckUtils]: 16: Hoare triple {2159#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2096#false} is VALID [2022-04-07 17:32:09,417 INFO L290 TraceCheckUtils]: 15: Hoare triple {2155#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2159#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:32:09,418 INFO L272 TraceCheckUtils]: 14: Hoare triple {2105#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {2155#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:32:09,419 INFO L290 TraceCheckUtils]: 13: Hoare triple {2105#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {2105#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:32:11,431 WARN L290 TraceCheckUtils]: 12: Hoare triple {2181#(and (or (and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))) (< 0 (mod main_~z~0 4294967296))) (or (and (forall ((aux_mod_v_main_~x~0_47_31 Int) (aux_div_v_main_~x~0_47_31 Int)) (or (<= (+ aux_mod_v_main_~x~0_47_31 (* (div main_~n~0 4294967296) 4294967296)) main_~n~0) (not (< main_~x~0 (+ aux_mod_v_main_~x~0_47_31 (* aux_div_v_main_~x~0_47_31 4294967296)))) (>= aux_mod_v_main_~x~0_47_31 4294967296) (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ v_it_5 main_~x~0 1) (+ aux_mod_v_main_~x~0_47_31 (* aux_div_v_main_~x~0_47_31 4294967296))))))) (forall ((aux_mod_v_main_~x~0_47_31 Int) (aux_div_v_main_~x~0_47_31 Int)) (or (> 0 aux_mod_v_main_~x~0_47_31) (not (< main_~x~0 (+ aux_mod_v_main_~x~0_47_31 (* aux_div_v_main_~x~0_47_31 4294967296)))) (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ v_it_5 main_~x~0 1) (+ aux_mod_v_main_~x~0_47_31 (* aux_div_v_main_~x~0_47_31 4294967296))))) (< main_~n~0 (+ aux_mod_v_main_~x~0_47_31 (* (div main_~n~0 4294967296) 4294967296) 1))))) (not (< 0 (mod main_~z~0 4294967296)))))} [107] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~x~0_11 v_main_~x~0_10) (<= .cse0 0) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)) (and (= v_main_~x~0_10 (+ v_main_~x~0_11 v_main_~z~0_10 (* (- 1) v_main_~z~0_9))) (< 0 .cse0) (forall ((v_it_5 Int)) (or (not (<= (+ v_main_~z~0_9 v_it_5 1) v_main_~z~0_10)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)))) (< v_main_~z~0_9 v_main_~z~0_10)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {2105#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is UNKNOWN [2022-04-07 17:32:13,441 WARN L290 TraceCheckUtils]: 11: Hoare triple {2185#(forall ((aux_mod_main_~x~0_26 Int)) (or (< aux_mod_main_~x~0_26 0) (and (or (forall ((aux_div_main_~x~0_26 Int)) (< (+ main_~n~0 (* (div (+ aux_mod_main_~x~0_26 (* 4294967296 aux_div_main_~x~0_26)) 4294967296) 4294967296)) (+ aux_mod_main_~x~0_26 (* 4294967296 aux_div_main_~x~0_26) (* (div main_~n~0 4294967296) 4294967296) 1))) (< 0 (mod main_~z~0 4294967296))) (or (and (forall ((aux_mod_v_main_~x~0_47_31 Int) (aux_div_v_main_~x~0_47_31 Int) (aux_div_main_~x~0_26 Int)) (or (not (< (+ aux_mod_main_~x~0_26 (* 4294967296 aux_div_main_~x~0_26)) (+ aux_mod_v_main_~x~0_47_31 (* aux_div_v_main_~x~0_47_31 4294967296)))) (< aux_mod_v_main_~x~0_47_31 0) (< main_~n~0 (+ aux_mod_v_main_~x~0_47_31 (* (div main_~n~0 4294967296) 4294967296) 1)) (exists ((v_it_5 Int)) (and (<= (+ aux_mod_main_~x~0_26 v_it_5 (* 4294967296 aux_div_main_~x~0_26) 1) (+ aux_mod_v_main_~x~0_47_31 (* aux_div_v_main_~x~0_47_31 4294967296))) (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5))))) (forall ((aux_mod_v_main_~x~0_47_31 Int) (aux_div_v_main_~x~0_47_31 Int) (aux_div_main_~x~0_26 Int)) (or (<= (+ aux_mod_v_main_~x~0_47_31 (* (div main_~n~0 4294967296) 4294967296)) main_~n~0) (not (< (+ aux_mod_main_~x~0_26 (* 4294967296 aux_div_main_~x~0_26)) (+ aux_mod_v_main_~x~0_47_31 (* aux_div_v_main_~x~0_47_31 4294967296)))) (<= 4294967296 aux_mod_v_main_~x~0_47_31) (exists ((v_it_5 Int)) (and (<= (+ aux_mod_main_~x~0_26 v_it_5 (* 4294967296 aux_div_main_~x~0_26) 1) (+ aux_mod_v_main_~x~0_47_31 (* aux_div_v_main_~x~0_47_31 4294967296))) (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5)))))) (not (< 0 (mod main_~z~0 4294967296))))) (< 0 aux_mod_main_~x~0_26)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2181#(and (or (and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))) (< 0 (mod main_~z~0 4294967296))) (or (and (forall ((aux_mod_v_main_~x~0_47_31 Int) (aux_div_v_main_~x~0_47_31 Int)) (or (<= (+ aux_mod_v_main_~x~0_47_31 (* (div main_~n~0 4294967296) 4294967296)) main_~n~0) (not (< main_~x~0 (+ aux_mod_v_main_~x~0_47_31 (* aux_div_v_main_~x~0_47_31 4294967296)))) (>= aux_mod_v_main_~x~0_47_31 4294967296) (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ v_it_5 main_~x~0 1) (+ aux_mod_v_main_~x~0_47_31 (* aux_div_v_main_~x~0_47_31 4294967296))))))) (forall ((aux_mod_v_main_~x~0_47_31 Int) (aux_div_v_main_~x~0_47_31 Int)) (or (> 0 aux_mod_v_main_~x~0_47_31) (not (< main_~x~0 (+ aux_mod_v_main_~x~0_47_31 (* aux_div_v_main_~x~0_47_31 4294967296)))) (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ v_it_5 main_~x~0 1) (+ aux_mod_v_main_~x~0_47_31 (* aux_div_v_main_~x~0_47_31 4294967296))))) (< main_~n~0 (+ aux_mod_v_main_~x~0_47_31 (* (div main_~n~0 4294967296) 4294967296) 1))))) (not (< 0 (mod main_~z~0 4294967296)))))} is UNKNOWN [2022-04-07 17:32:15,886 WARN L290 TraceCheckUtils]: 10: Hoare triple {2185#(forall ((aux_mod_main_~x~0_26 Int)) (or (< aux_mod_main_~x~0_26 0) (and (or (forall ((aux_div_main_~x~0_26 Int)) (< (+ main_~n~0 (* (div (+ aux_mod_main_~x~0_26 (* 4294967296 aux_div_main_~x~0_26)) 4294967296) 4294967296)) (+ aux_mod_main_~x~0_26 (* 4294967296 aux_div_main_~x~0_26) (* (div main_~n~0 4294967296) 4294967296) 1))) (< 0 (mod main_~z~0 4294967296))) (or (and (forall ((aux_mod_v_main_~x~0_47_31 Int) (aux_div_v_main_~x~0_47_31 Int) (aux_div_main_~x~0_26 Int)) (or (not (< (+ aux_mod_main_~x~0_26 (* 4294967296 aux_div_main_~x~0_26)) (+ aux_mod_v_main_~x~0_47_31 (* aux_div_v_main_~x~0_47_31 4294967296)))) (< aux_mod_v_main_~x~0_47_31 0) (< main_~n~0 (+ aux_mod_v_main_~x~0_47_31 (* (div main_~n~0 4294967296) 4294967296) 1)) (exists ((v_it_5 Int)) (and (<= (+ aux_mod_main_~x~0_26 v_it_5 (* 4294967296 aux_div_main_~x~0_26) 1) (+ aux_mod_v_main_~x~0_47_31 (* aux_div_v_main_~x~0_47_31 4294967296))) (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5))))) (forall ((aux_mod_v_main_~x~0_47_31 Int) (aux_div_v_main_~x~0_47_31 Int) (aux_div_main_~x~0_26 Int)) (or (<= (+ aux_mod_v_main_~x~0_47_31 (* (div main_~n~0 4294967296) 4294967296)) main_~n~0) (not (< (+ aux_mod_main_~x~0_26 (* 4294967296 aux_div_main_~x~0_26)) (+ aux_mod_v_main_~x~0_47_31 (* aux_div_v_main_~x~0_47_31 4294967296)))) (<= 4294967296 aux_mod_v_main_~x~0_47_31) (exists ((v_it_5 Int)) (and (<= (+ aux_mod_main_~x~0_26 v_it_5 (* 4294967296 aux_div_main_~x~0_26) 1) (+ aux_mod_v_main_~x~0_47_31 (* aux_div_v_main_~x~0_47_31 4294967296))) (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5)))))) (not (< 0 (mod main_~z~0 4294967296))))) (< 0 aux_mod_main_~x~0_26)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2185#(forall ((aux_mod_main_~x~0_26 Int)) (or (< aux_mod_main_~x~0_26 0) (and (or (forall ((aux_div_main_~x~0_26 Int)) (< (+ main_~n~0 (* (div (+ aux_mod_main_~x~0_26 (* 4294967296 aux_div_main_~x~0_26)) 4294967296) 4294967296)) (+ aux_mod_main_~x~0_26 (* 4294967296 aux_div_main_~x~0_26) (* (div main_~n~0 4294967296) 4294967296) 1))) (< 0 (mod main_~z~0 4294967296))) (or (and (forall ((aux_mod_v_main_~x~0_47_31 Int) (aux_div_v_main_~x~0_47_31 Int) (aux_div_main_~x~0_26 Int)) (or (not (< (+ aux_mod_main_~x~0_26 (* 4294967296 aux_div_main_~x~0_26)) (+ aux_mod_v_main_~x~0_47_31 (* aux_div_v_main_~x~0_47_31 4294967296)))) (< aux_mod_v_main_~x~0_47_31 0) (< main_~n~0 (+ aux_mod_v_main_~x~0_47_31 (* (div main_~n~0 4294967296) 4294967296) 1)) (exists ((v_it_5 Int)) (and (<= (+ aux_mod_main_~x~0_26 v_it_5 (* 4294967296 aux_div_main_~x~0_26) 1) (+ aux_mod_v_main_~x~0_47_31 (* aux_div_v_main_~x~0_47_31 4294967296))) (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5))))) (forall ((aux_mod_v_main_~x~0_47_31 Int) (aux_div_v_main_~x~0_47_31 Int) (aux_div_main_~x~0_26 Int)) (or (<= (+ aux_mod_v_main_~x~0_47_31 (* (div main_~n~0 4294967296) 4294967296)) main_~n~0) (not (< (+ aux_mod_main_~x~0_26 (* 4294967296 aux_div_main_~x~0_26)) (+ aux_mod_v_main_~x~0_47_31 (* aux_div_v_main_~x~0_47_31 4294967296)))) (<= 4294967296 aux_mod_v_main_~x~0_47_31) (exists ((v_it_5 Int)) (and (<= (+ aux_mod_main_~x~0_26 v_it_5 (* 4294967296 aux_div_main_~x~0_26) 1) (+ aux_mod_v_main_~x~0_47_31 (* aux_div_v_main_~x~0_47_31 4294967296))) (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5)))))) (not (< 0 (mod main_~z~0 4294967296))))) (< 0 aux_mod_main_~x~0_26)))} is UNKNOWN [2022-04-07 17:32:15,891 INFO L290 TraceCheckUtils]: 9: Hoare triple {2102#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {2185#(forall ((aux_mod_main_~x~0_26 Int)) (or (< aux_mod_main_~x~0_26 0) (and (or (forall ((aux_div_main_~x~0_26 Int)) (< (+ main_~n~0 (* (div (+ aux_mod_main_~x~0_26 (* 4294967296 aux_div_main_~x~0_26)) 4294967296) 4294967296)) (+ aux_mod_main_~x~0_26 (* 4294967296 aux_div_main_~x~0_26) (* (div main_~n~0 4294967296) 4294967296) 1))) (< 0 (mod main_~z~0 4294967296))) (or (and (forall ((aux_mod_v_main_~x~0_47_31 Int) (aux_div_v_main_~x~0_47_31 Int) (aux_div_main_~x~0_26 Int)) (or (not (< (+ aux_mod_main_~x~0_26 (* 4294967296 aux_div_main_~x~0_26)) (+ aux_mod_v_main_~x~0_47_31 (* aux_div_v_main_~x~0_47_31 4294967296)))) (< aux_mod_v_main_~x~0_47_31 0) (< main_~n~0 (+ aux_mod_v_main_~x~0_47_31 (* (div main_~n~0 4294967296) 4294967296) 1)) (exists ((v_it_5 Int)) (and (<= (+ aux_mod_main_~x~0_26 v_it_5 (* 4294967296 aux_div_main_~x~0_26) 1) (+ aux_mod_v_main_~x~0_47_31 (* aux_div_v_main_~x~0_47_31 4294967296))) (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5))))) (forall ((aux_mod_v_main_~x~0_47_31 Int) (aux_div_v_main_~x~0_47_31 Int) (aux_div_main_~x~0_26 Int)) (or (<= (+ aux_mod_v_main_~x~0_47_31 (* (div main_~n~0 4294967296) 4294967296)) main_~n~0) (not (< (+ aux_mod_main_~x~0_26 (* 4294967296 aux_div_main_~x~0_26)) (+ aux_mod_v_main_~x~0_47_31 (* aux_div_v_main_~x~0_47_31 4294967296)))) (<= 4294967296 aux_mod_v_main_~x~0_47_31) (exists ((v_it_5 Int)) (and (<= (+ aux_mod_main_~x~0_26 v_it_5 (* 4294967296 aux_div_main_~x~0_26) 1) (+ aux_mod_v_main_~x~0_47_31 (* aux_div_v_main_~x~0_47_31 4294967296))) (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5)))))) (not (< 0 (mod main_~z~0 4294967296))))) (< 0 aux_mod_main_~x~0_26)))} is VALID [2022-04-07 17:32:15,891 INFO L290 TraceCheckUtils]: 8: Hoare triple {2102#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} [98] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_8 4294967296))) (or (and (= v_main_~x~0_9 v_main_~x~0_8) (<= .cse0 0) (= v_main_~z~0_8 v_main_~z~0_7) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)) (and (forall ((v_it_2 Int)) (or (< 0 (mod (+ v_main_~z~0_8 (* v_it_2 4294967295)) 4294967296)) (not (<= (+ v_main_~z~0_7 v_it_2 1) v_main_~z~0_8)) (not (<= 1 v_it_2)))) (= (+ v_main_~x~0_9 v_main_~z~0_8 (* (- 1) v_main_~z~0_7)) v_main_~x~0_8) (< 0 .cse0) (< v_main_~z~0_7 v_main_~z~0_8)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_8, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2102#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} is VALID [2022-04-07 17:32:15,892 INFO L290 TraceCheckUtils]: 7: Hoare triple {2102#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {2102#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} is VALID [2022-04-07 17:32:15,892 INFO L290 TraceCheckUtils]: 6: Hoare triple {2201#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (< 0 (mod main_~x~0 4294967296)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2102#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} is VALID [2022-04-07 17:32:15,893 INFO L290 TraceCheckUtils]: 5: Hoare triple {2095#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2201#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-07 17:32:15,893 INFO L272 TraceCheckUtils]: 4: Hoare triple {2095#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2095#true} is VALID [2022-04-07 17:32:15,893 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2095#true} {2095#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2095#true} is VALID [2022-04-07 17:32:15,893 INFO L290 TraceCheckUtils]: 2: Hoare triple {2095#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2095#true} is VALID [2022-04-07 17:32:15,893 INFO L290 TraceCheckUtils]: 1: Hoare triple {2095#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2095#true} is VALID [2022-04-07 17:32:15,893 INFO L272 TraceCheckUtils]: 0: Hoare triple {2095#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2095#true} is VALID [2022-04-07 17:32:15,893 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 17:32:15,893 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2100412660] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 17:32:15,893 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 17:32:15,894 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 9, 9] total 17 [2022-04-07 17:32:15,894 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1587394252] [2022-04-07 17:32:15,894 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 17:32:15,894 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 17 states have (on average 1.6470588235294117) internal successors, (28), 14 states have internal predecessors, (28), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-07 17:32:15,894 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:32:15,895 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 17 states, 17 states have (on average 1.6470588235294117) internal successors, (28), 14 states have internal predecessors, (28), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:32:20,392 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 35 edges. 33 inductive. 0 not inductive. 2 times theorem prover too weak to decide inductivity. [2022-04-07 17:32:20,392 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 17 states [2022-04-07 17:32:20,392 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:32:20,392 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2022-04-07 17:32:20,393 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=213, Unknown=4, NotChecked=0, Total=272 [2022-04-07 17:32:20,393 INFO L87 Difference]: Start difference. First operand 37 states and 56 transitions. Second operand has 17 states, 17 states have (on average 1.6470588235294117) internal successors, (28), 14 states have internal predecessors, (28), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:32:20,871 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:32:20,871 INFO L93 Difference]: Finished difference Result 48 states and 73 transitions. [2022-04-07 17:32:20,871 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-04-07 17:32:20,871 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 17 states have (on average 1.6470588235294117) internal successors, (28), 14 states have internal predecessors, (28), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-07 17:32:20,872 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:32:20,872 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 17 states have (on average 1.6470588235294117) internal successors, (28), 14 states have internal predecessors, (28), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:32:20,873 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 47 transitions. [2022-04-07 17:32:20,873 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 17 states have (on average 1.6470588235294117) internal successors, (28), 14 states have internal predecessors, (28), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:32:20,874 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 47 transitions. [2022-04-07 17:32:20,874 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 12 states and 47 transitions. [2022-04-07 17:32:20,932 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 47 edges. 47 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:32:20,933 INFO L225 Difference]: With dead ends: 48 [2022-04-07 17:32:20,933 INFO L226 Difference]: Without dead ends: 45 [2022-04-07 17:32:20,934 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 57 GetRequests, 27 SyntacticMatches, 7 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 156 ImplicationChecksByTransitivity, 13.7s TimeCoverageRelationStatistics Valid=130, Invalid=466, Unknown=4, NotChecked=0, Total=600 [2022-04-07 17:32:20,934 INFO L913 BasicCegarLoop]: 17 mSDtfsCounter, 44 mSDsluCounter, 41 mSDsCounter, 0 mSdLazyCounter, 58 mSolverCounterSat, 15 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 44 SdHoareTripleChecker+Valid, 58 SdHoareTripleChecker+Invalid, 116 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 15 IncrementalHoareTripleChecker+Valid, 58 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 43 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 17:32:20,934 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [44 Valid, 58 Invalid, 116 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [15 Valid, 58 Invalid, 0 Unknown, 43 Unchecked, 0.1s Time] [2022-04-07 17:32:20,935 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45 states. [2022-04-07 17:32:20,936 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45 to 39. [2022-04-07 17:32:20,936 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:32:20,937 INFO L82 GeneralOperation]: Start isEquivalent. First operand 45 states. Second operand has 39 states, 34 states have (on average 1.6470588235294117) internal successors, (56), 34 states have internal predecessors, (56), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:32:20,937 INFO L74 IsIncluded]: Start isIncluded. First operand 45 states. Second operand has 39 states, 34 states have (on average 1.6470588235294117) internal successors, (56), 34 states have internal predecessors, (56), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:32:20,937 INFO L87 Difference]: Start difference. First operand 45 states. Second operand has 39 states, 34 states have (on average 1.6470588235294117) internal successors, (56), 34 states have internal predecessors, (56), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:32:20,938 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:32:20,939 INFO L93 Difference]: Finished difference Result 45 states and 70 transitions. [2022-04-07 17:32:20,939 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 70 transitions. [2022-04-07 17:32:20,939 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:32:20,943 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:32:20,944 INFO L74 IsIncluded]: Start isIncluded. First operand has 39 states, 34 states have (on average 1.6470588235294117) internal successors, (56), 34 states have internal predecessors, (56), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 45 states. [2022-04-07 17:32:20,944 INFO L87 Difference]: Start difference. First operand has 39 states, 34 states have (on average 1.6470588235294117) internal successors, (56), 34 states have internal predecessors, (56), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 45 states. [2022-04-07 17:32:20,945 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:32:20,945 INFO L93 Difference]: Finished difference Result 45 states and 70 transitions. [2022-04-07 17:32:20,953 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 70 transitions. [2022-04-07 17:32:20,953 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:32:20,953 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:32:20,953 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:32:20,953 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:32:20,954 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 39 states, 34 states have (on average 1.6470588235294117) internal successors, (56), 34 states have internal predecessors, (56), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:32:20,955 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 60 transitions. [2022-04-07 17:32:20,955 INFO L78 Accepts]: Start accepts. Automaton has 39 states and 60 transitions. Word has length 18 [2022-04-07 17:32:20,955 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:32:20,956 INFO L478 AbstractCegarLoop]: Abstraction has 39 states and 60 transitions. [2022-04-07 17:32:20,956 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 17 states, 17 states have (on average 1.6470588235294117) internal successors, (28), 14 states have internal predecessors, (28), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:32:20,956 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 60 transitions. [2022-04-07 17:32:20,956 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-04-07 17:32:20,956 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:32:20,956 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:32:20,975 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2022-04-07 17:32:21,163 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable9 [2022-04-07 17:32:21,164 INFO L403 AbstractCegarLoop]: === Iteration 11 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:32:21,164 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:32:21,164 INFO L85 PathProgramCache]: Analyzing trace with hash -211948756, now seen corresponding path program 1 times [2022-04-07 17:32:21,164 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:32:21,164 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [664927617] [2022-04-07 17:32:21,164 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:32:21,164 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:32:21,172 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.0))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-07 17:32:21,173 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.1))) (+ .cse0 main_~x~0_8 (* (- 4294967296) (div (+ .cse0 main_~x~0_8) 4294967296)))) 0)) [2022-04-07 17:32:21,179 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:32:21,185 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.2))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-07 17:32:21,187 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.3))) (+ .cse0 main_~x~0_8 (* (- 4294967296) (div (+ .cse0 main_~x~0_8) 4294967296)))) 0)) [2022-04-07 17:32:21,294 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:32:21,296 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:32:21,302 INFO L290 TraceCheckUtils]: 0: Hoare triple {2429#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2417#true} is VALID [2022-04-07 17:32:21,303 INFO L290 TraceCheckUtils]: 1: Hoare triple {2417#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2417#true} is VALID [2022-04-07 17:32:21,303 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2417#true} {2417#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2417#true} is VALID [2022-04-07 17:32:21,303 INFO L272 TraceCheckUtils]: 0: Hoare triple {2417#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2429#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:32:21,303 INFO L290 TraceCheckUtils]: 1: Hoare triple {2429#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2417#true} is VALID [2022-04-07 17:32:21,303 INFO L290 TraceCheckUtils]: 2: Hoare triple {2417#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2417#true} is VALID [2022-04-07 17:32:21,303 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2417#true} {2417#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2417#true} is VALID [2022-04-07 17:32:21,303 INFO L272 TraceCheckUtils]: 4: Hoare triple {2417#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2417#true} is VALID [2022-04-07 17:32:21,304 INFO L290 TraceCheckUtils]: 5: Hoare triple {2417#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2422#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-07 17:32:21,304 INFO L290 TraceCheckUtils]: 6: Hoare triple {2422#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2423#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 17:32:21,305 INFO L290 TraceCheckUtils]: 7: Hoare triple {2423#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {2423#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 17:32:21,306 INFO L290 TraceCheckUtils]: 8: Hoare triple {2423#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [98] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_8 4294967296))) (or (and (= v_main_~x~0_9 v_main_~x~0_8) (<= .cse0 0) (= v_main_~z~0_8 v_main_~z~0_7) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)) (and (forall ((v_it_2 Int)) (or (< 0 (mod (+ v_main_~z~0_8 (* v_it_2 4294967295)) 4294967296)) (not (<= (+ v_main_~z~0_7 v_it_2 1) v_main_~z~0_8)) (not (<= 1 v_it_2)))) (= (+ v_main_~x~0_9 v_main_~z~0_8 (* (- 1) v_main_~z~0_7)) v_main_~x~0_8) (< 0 .cse0) (< v_main_~z~0_7 v_main_~z~0_8)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_8, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2424#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} is VALID [2022-04-07 17:32:21,306 INFO L290 TraceCheckUtils]: 9: Hoare triple {2424#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {2424#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} is VALID [2022-04-07 17:32:21,306 INFO L290 TraceCheckUtils]: 10: Hoare triple {2424#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2424#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} is VALID [2022-04-07 17:32:21,307 INFO L290 TraceCheckUtils]: 11: Hoare triple {2424#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} [104] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (< v_main_~x~0_6 v_main_~x~0_7) (= (+ (* (- 1) v_main_~x~0_6) v_main_~x~0_7 v_main_~y~0_8) v_main_~y~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_8 v_main_~y~0_7) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_8, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {2425#(< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))} is VALID [2022-04-07 17:32:21,308 INFO L290 TraceCheckUtils]: 12: Hoare triple {2425#(< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2426#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:32:21,308 INFO L290 TraceCheckUtils]: 13: Hoare triple {2426#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {2426#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:32:21,309 INFO L272 TraceCheckUtils]: 14: Hoare triple {2426#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {2427#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:32:21,310 INFO L290 TraceCheckUtils]: 15: Hoare triple {2427#(not (= |__VERIFIER_assert_#in~cond| 0))} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2428#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:32:21,310 INFO L290 TraceCheckUtils]: 16: Hoare triple {2428#(not (= __VERIFIER_assert_~cond 0))} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2418#false} is VALID [2022-04-07 17:32:21,311 INFO L290 TraceCheckUtils]: 17: Hoare triple {2418#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2418#false} is VALID [2022-04-07 17:32:21,311 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:32:21,311 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:32:21,311 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [664927617] [2022-04-07 17:32:21,311 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [664927617] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:32:21,311 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1839125049] [2022-04-07 17:32:21,311 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:32:21,311 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:32:21,311 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:32:21,315 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:32:21,317 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2022-04-07 17:32:21,347 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:32:21,348 INFO L263 TraceCheckSpWp]: Trace formula consists of 63 conjuncts, 7 conjunts are in the unsatisfiable core [2022-04-07 17:32:21,354 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:32:21,355 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:32:21,864 INFO L272 TraceCheckUtils]: 0: Hoare triple {2417#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2417#true} is VALID [2022-04-07 17:32:21,864 INFO L290 TraceCheckUtils]: 1: Hoare triple {2417#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2417#true} is VALID [2022-04-07 17:32:21,864 INFO L290 TraceCheckUtils]: 2: Hoare triple {2417#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2417#true} is VALID [2022-04-07 17:32:21,864 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2417#true} {2417#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2417#true} is VALID [2022-04-07 17:32:21,865 INFO L272 TraceCheckUtils]: 4: Hoare triple {2417#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2417#true} is VALID [2022-04-07 17:32:21,866 INFO L290 TraceCheckUtils]: 5: Hoare triple {2417#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2422#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-07 17:32:21,866 INFO L290 TraceCheckUtils]: 6: Hoare triple {2422#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2424#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} is VALID [2022-04-07 17:32:21,867 INFO L290 TraceCheckUtils]: 7: Hoare triple {2424#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {2424#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} is VALID [2022-04-07 17:32:21,867 INFO L290 TraceCheckUtils]: 8: Hoare triple {2424#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} [98] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_8 4294967296))) (or (and (= v_main_~x~0_9 v_main_~x~0_8) (<= .cse0 0) (= v_main_~z~0_8 v_main_~z~0_7) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)) (and (forall ((v_it_2 Int)) (or (< 0 (mod (+ v_main_~z~0_8 (* v_it_2 4294967295)) 4294967296)) (not (<= (+ v_main_~z~0_7 v_it_2 1) v_main_~z~0_8)) (not (<= 1 v_it_2)))) (= (+ v_main_~x~0_9 v_main_~z~0_8 (* (- 1) v_main_~z~0_7)) v_main_~x~0_8) (< 0 .cse0) (< v_main_~z~0_7 v_main_~z~0_8)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_8, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2424#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} is VALID [2022-04-07 17:32:21,867 INFO L290 TraceCheckUtils]: 9: Hoare triple {2424#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {2424#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} is VALID [2022-04-07 17:32:21,868 INFO L290 TraceCheckUtils]: 10: Hoare triple {2424#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2424#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} is VALID [2022-04-07 17:32:21,868 INFO L290 TraceCheckUtils]: 11: Hoare triple {2424#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} [104] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (< v_main_~x~0_6 v_main_~x~0_7) (= (+ (* (- 1) v_main_~x~0_6) v_main_~x~0_7 v_main_~y~0_8) v_main_~y~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_8 v_main_~y~0_7) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_8, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {2424#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} is VALID [2022-04-07 17:32:21,868 INFO L290 TraceCheckUtils]: 12: Hoare triple {2424#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2469#(and (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-07 17:32:21,869 INFO L290 TraceCheckUtils]: 13: Hoare triple {2469#(and (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (not (< 0 (mod main_~x~0 4294967296))))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {2469#(and (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-07 17:32:21,870 INFO L272 TraceCheckUtils]: 14: Hoare triple {2469#(and (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (not (< 0 (mod main_~x~0 4294967296))))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {2476#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:32:21,870 INFO L290 TraceCheckUtils]: 15: Hoare triple {2476#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2480#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:32:21,870 INFO L290 TraceCheckUtils]: 16: Hoare triple {2480#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2418#false} is VALID [2022-04-07 17:32:21,870 INFO L290 TraceCheckUtils]: 17: Hoare triple {2418#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2418#false} is VALID [2022-04-07 17:32:21,870 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-07 17:32:21,871 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-07 17:32:21,871 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1839125049] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 17:32:21,871 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-07 17:32:21,871 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [10] total 13 [2022-04-07 17:32:21,871 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1977872496] [2022-04-07 17:32:21,871 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 17:32:21,871 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-07 17:32:21,872 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:32:21,872 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:32:21,887 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 18 edges. 18 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:32:21,887 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-04-07 17:32:21,887 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:32:21,887 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-04-07 17:32:21,887 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=119, Unknown=0, NotChecked=0, Total=156 [2022-04-07 17:32:21,887 INFO L87 Difference]: Start difference. First operand 39 states and 60 transitions. Second operand has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:32:21,993 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:32:21,993 INFO L93 Difference]: Finished difference Result 49 states and 73 transitions. [2022-04-07 17:32:21,993 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-04-07 17:32:21,993 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-07 17:32:21,994 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:32:21,994 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:32:21,994 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 42 transitions. [2022-04-07 17:32:21,995 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:32:21,995 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 42 transitions. [2022-04-07 17:32:21,996 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 8 states and 42 transitions. [2022-04-07 17:32:22,054 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 42 edges. 42 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:32:22,055 INFO L225 Difference]: With dead ends: 49 [2022-04-07 17:32:22,055 INFO L226 Difference]: Without dead ends: 46 [2022-04-07 17:32:22,055 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 15 SyntacticMatches, 3 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 50 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=43, Invalid=139, Unknown=0, NotChecked=0, Total=182 [2022-04-07 17:32:22,056 INFO L913 BasicCegarLoop]: 15 mSDtfsCounter, 15 mSDsluCounter, 56 mSDsCounter, 0 mSdLazyCounter, 19 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 15 SdHoareTripleChecker+Valid, 71 SdHoareTripleChecker+Invalid, 24 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 19 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 4 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 17:32:22,056 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [15 Valid, 71 Invalid, 24 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 19 Invalid, 0 Unknown, 4 Unchecked, 0.0s Time] [2022-04-07 17:32:22,057 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states. [2022-04-07 17:32:22,063 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 36. [2022-04-07 17:32:22,063 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:32:22,063 INFO L82 GeneralOperation]: Start isEquivalent. First operand 46 states. Second operand has 36 states, 31 states have (on average 1.6129032258064515) internal successors, (50), 31 states have internal predecessors, (50), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:32:22,063 INFO L74 IsIncluded]: Start isIncluded. First operand 46 states. Second operand has 36 states, 31 states have (on average 1.6129032258064515) internal successors, (50), 31 states have internal predecessors, (50), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:32:22,063 INFO L87 Difference]: Start difference. First operand 46 states. Second operand has 36 states, 31 states have (on average 1.6129032258064515) internal successors, (50), 31 states have internal predecessors, (50), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:32:22,064 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:32:22,064 INFO L93 Difference]: Finished difference Result 46 states and 70 transitions. [2022-04-07 17:32:22,064 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 70 transitions. [2022-04-07 17:32:22,064 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:32:22,064 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:32:22,065 INFO L74 IsIncluded]: Start isIncluded. First operand has 36 states, 31 states have (on average 1.6129032258064515) internal successors, (50), 31 states have internal predecessors, (50), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 46 states. [2022-04-07 17:32:22,065 INFO L87 Difference]: Start difference. First operand has 36 states, 31 states have (on average 1.6129032258064515) internal successors, (50), 31 states have internal predecessors, (50), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 46 states. [2022-04-07 17:32:22,066 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:32:22,066 INFO L93 Difference]: Finished difference Result 46 states and 70 transitions. [2022-04-07 17:32:22,066 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 70 transitions. [2022-04-07 17:32:22,067 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:32:22,067 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:32:22,067 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:32:22,067 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:32:22,071 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 36 states, 31 states have (on average 1.6129032258064515) internal successors, (50), 31 states have internal predecessors, (50), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:32:22,072 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 54 transitions. [2022-04-07 17:32:22,072 INFO L78 Accepts]: Start accepts. Automaton has 36 states and 54 transitions. Word has length 18 [2022-04-07 17:32:22,072 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:32:22,072 INFO L478 AbstractCegarLoop]: Abstraction has 36 states and 54 transitions. [2022-04-07 17:32:22,072 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:32:22,072 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 54 transitions. [2022-04-07 17:32:22,073 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-04-07 17:32:22,073 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:32:22,073 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:32:22,089 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2022-04-07 17:32:22,275 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10,10 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:32:22,275 INFO L403 AbstractCegarLoop]: === Iteration 12 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:32:22,276 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:32:22,276 INFO L85 PathProgramCache]: Analyzing trace with hash -967377177, now seen corresponding path program 1 times [2022-04-07 17:32:22,276 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:32:22,276 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [265208505] [2022-04-07 17:32:22,276 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:32:22,276 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:32:22,284 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_1.0))) (+ main_~x~0_5 .cse0 (* (- 4294967296) (div (+ main_~x~0_5 .cse0) 4294967296)))) 0)) [2022-04-07 17:32:22,285 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.1))) (+ main_~z~0_8 .cse0 (* (- 4294967296) (div (+ main_~z~0_8 .cse0) 4294967296)))) 0)) [2022-04-07 17:32:22,293 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:32:22,306 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_1.3))) (+ main_~x~0_5 .cse0 (* (- 4294967296) (div (+ main_~x~0_5 .cse0) 4294967296)))) 0)) [2022-04-07 17:32:22,315 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.4))) (+ main_~z~0_8 .cse0 (* (- 4294967296) (div (+ main_~z~0_8 .cse0) 4294967296)))) 0)) [2022-04-07 17:32:22,563 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:32:22,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:32:22,570 INFO L290 TraceCheckUtils]: 0: Hoare triple {2679#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2666#true} is VALID [2022-04-07 17:32:22,571 INFO L290 TraceCheckUtils]: 1: Hoare triple {2666#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2666#true} is VALID [2022-04-07 17:32:22,571 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2666#true} {2666#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2666#true} is VALID [2022-04-07 17:32:22,571 INFO L272 TraceCheckUtils]: 0: Hoare triple {2666#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2679#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:32:22,571 INFO L290 TraceCheckUtils]: 1: Hoare triple {2679#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2666#true} is VALID [2022-04-07 17:32:22,572 INFO L290 TraceCheckUtils]: 2: Hoare triple {2666#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2666#true} is VALID [2022-04-07 17:32:22,572 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2666#true} {2666#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2666#true} is VALID [2022-04-07 17:32:22,572 INFO L272 TraceCheckUtils]: 4: Hoare triple {2666#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2666#true} is VALID [2022-04-07 17:32:22,572 INFO L290 TraceCheckUtils]: 5: Hoare triple {2666#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2671#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 17:32:22,580 INFO L290 TraceCheckUtils]: 6: Hoare triple {2671#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [94] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0) (= v_main_~y~0_6 v_main_~y~0_5)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_6 v_it_1 1) v_main_~y~0_5)))) (< v_main_~y~0_6 v_main_~y~0_5) (< 0 .cse0) (= v_main_~x~0_3 (+ v_main_~x~0_4 v_main_~y~0_6 (* (- 1) v_main_~y~0_5)))))) InVars {main_~y~0=v_main_~y~0_6, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2672#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-07 17:32:22,582 INFO L290 TraceCheckUtils]: 7: Hoare triple {2672#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2673#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0) (and (<= (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ (* (div (+ main_~n~0 (* (- 1) main_~x~0) (* 4294967296 (div main_~x~0 4294967296))) 4294967296) 4294967296) main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:32:22,582 INFO L290 TraceCheckUtils]: 8: Hoare triple {2673#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0) (and (<= (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ (* (div (+ main_~n~0 (* (- 1) main_~x~0) (* 4294967296 (div main_~x~0 4294967296))) 4294967296) 4294967296) main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {2673#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0) (and (<= (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ (* (div (+ main_~n~0 (* (- 1) main_~x~0) (* 4294967296 (div main_~x~0 4294967296))) 4294967296) 4294967296) main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:32:22,583 INFO L290 TraceCheckUtils]: 9: Hoare triple {2673#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0) (and (<= (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ (* (div (+ main_~n~0 (* (- 1) main_~x~0) (* 4294967296 (div main_~x~0 4294967296))) 4294967296) 4294967296) main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {2674#(and (or (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0) (and (<= (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ (* (div (+ main_~n~0 (* (- 1) main_~x~0) (* 4294967296 (div main_~x~0 4294967296))) 4294967296) 4294967296) main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} is VALID [2022-04-07 17:32:22,584 INFO L290 TraceCheckUtils]: 10: Hoare triple {2674#(and (or (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0) (and (<= (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ (* (div (+ main_~n~0 (* (- 1) main_~x~0) (* 4294967296 (div main_~x~0 4294967296))) 4294967296) 4294967296) main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2675#(and (<= (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ (* (div (+ main_~n~0 (* (- 1) main_~x~0) (* 4294967296 (div main_~x~0 4294967296))) 4294967296) 4294967296) main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} is VALID [2022-04-07 17:32:22,585 INFO L290 TraceCheckUtils]: 11: Hoare triple {2675#(and (<= (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ (* (div (+ main_~n~0 (* (- 1) main_~x~0) (* 4294967296 (div main_~x~0 4294967296))) 4294967296) 4294967296) main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2675#(and (<= (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ (* (div (+ main_~n~0 (* (- 1) main_~x~0) (* 4294967296 (div main_~x~0 4294967296))) 4294967296) 4294967296) main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} is VALID [2022-04-07 17:32:22,587 INFO L290 TraceCheckUtils]: 12: Hoare triple {2675#(and (<= (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ (* (div (+ main_~n~0 (* (- 1) main_~x~0) (* 4294967296 (div main_~x~0 4294967296))) 4294967296) 4294967296) main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} [107] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~x~0_11 v_main_~x~0_10) (<= .cse0 0) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)) (and (= v_main_~x~0_10 (+ v_main_~x~0_11 v_main_~z~0_10 (* (- 1) v_main_~z~0_9))) (< 0 .cse0) (forall ((v_it_5 Int)) (or (not (<= (+ v_main_~z~0_9 v_it_5 1) v_main_~z~0_10)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)))) (< v_main_~z~0_9 v_main_~z~0_10)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {2676#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:32:22,588 INFO L290 TraceCheckUtils]: 13: Hoare triple {2676#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {2676#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:32:22,588 INFO L272 TraceCheckUtils]: 14: Hoare triple {2676#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {2677#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:32:22,589 INFO L290 TraceCheckUtils]: 15: Hoare triple {2677#(not (= |__VERIFIER_assert_#in~cond| 0))} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2678#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:32:22,589 INFO L290 TraceCheckUtils]: 16: Hoare triple {2678#(not (= __VERIFIER_assert_~cond 0))} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2667#false} is VALID [2022-04-07 17:32:22,589 INFO L290 TraceCheckUtils]: 17: Hoare triple {2667#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2667#false} is VALID [2022-04-07 17:32:22,589 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:32:22,590 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:32:22,590 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [265208505] [2022-04-07 17:32:22,590 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [265208505] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:32:22,590 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [670131533] [2022-04-07 17:32:22,590 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:32:22,590 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:32:22,590 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:32:22,591 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:32:22,591 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2022-04-07 17:32:22,626 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:32:22,627 INFO L263 TraceCheckSpWp]: Trace formula consists of 63 conjuncts, 14 conjunts are in the unsatisfiable core [2022-04-07 17:32:22,641 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:32:22,641 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:32:23,786 INFO L272 TraceCheckUtils]: 0: Hoare triple {2666#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2666#true} is VALID [2022-04-07 17:32:23,786 INFO L290 TraceCheckUtils]: 1: Hoare triple {2666#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2666#true} is VALID [2022-04-07 17:32:23,786 INFO L290 TraceCheckUtils]: 2: Hoare triple {2666#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2666#true} is VALID [2022-04-07 17:32:23,786 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2666#true} {2666#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2666#true} is VALID [2022-04-07 17:32:23,786 INFO L272 TraceCheckUtils]: 4: Hoare triple {2666#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2666#true} is VALID [2022-04-07 17:32:23,788 INFO L290 TraceCheckUtils]: 5: Hoare triple {2666#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2671#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 17:32:23,794 INFO L290 TraceCheckUtils]: 6: Hoare triple {2671#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [94] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0) (= v_main_~y~0_6 v_main_~y~0_5)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_6 v_it_1 1) v_main_~y~0_5)))) (< v_main_~y~0_6 v_main_~y~0_5) (< 0 .cse0) (= v_main_~x~0_3 (+ v_main_~x~0_4 v_main_~y~0_6 (* (- 1) v_main_~y~0_5)))))) InVars {main_~y~0=v_main_~y~0_6, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2701#(or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)))} is VALID [2022-04-07 17:32:23,796 INFO L290 TraceCheckUtils]: 7: Hoare triple {2701#(or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2705#(and (not (< 0 (mod main_~x~0 4294967296))) (or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (= main_~y~0 0))))} is VALID [2022-04-07 17:32:23,798 INFO L290 TraceCheckUtils]: 8: Hoare triple {2705#(and (not (< 0 (mod main_~x~0 4294967296))) (or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (= main_~y~0 0))))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {2709#(and (or (and (= main_~z~0 0) (= main_~n~0 main_~x~0)) (and (< 0 main_~z~0) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~z~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (= (+ main_~n~0 (* (- 1) main_~z~0)) main_~x~0))) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-07 17:32:23,801 INFO L290 TraceCheckUtils]: 9: Hoare triple {2709#(and (or (and (= main_~z~0 0) (= main_~n~0 main_~x~0)) (and (< 0 main_~z~0) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~z~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (= (+ main_~n~0 (* (- 1) main_~z~0)) main_~x~0))) (not (< 0 (mod main_~x~0 4294967296))))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {2713#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= (mod main_~x~0 4294967296) 0))} is VALID [2022-04-07 17:32:23,802 INFO L290 TraceCheckUtils]: 10: Hoare triple {2713#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= (mod main_~x~0 4294967296) 0))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2713#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= (mod main_~x~0 4294967296) 0))} is VALID [2022-04-07 17:32:23,802 INFO L290 TraceCheckUtils]: 11: Hoare triple {2713#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= (mod main_~x~0 4294967296) 0))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2713#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= (mod main_~x~0 4294967296) 0))} is VALID [2022-04-07 17:32:23,803 INFO L290 TraceCheckUtils]: 12: Hoare triple {2713#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= (mod main_~x~0 4294967296) 0))} [107] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~x~0_11 v_main_~x~0_10) (<= .cse0 0) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)) (and (= v_main_~x~0_10 (+ v_main_~x~0_11 v_main_~z~0_10 (* (- 1) v_main_~z~0_9))) (< 0 .cse0) (forall ((v_it_5 Int)) (or (not (<= (+ v_main_~z~0_9 v_it_5 1) v_main_~z~0_10)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)))) (< v_main_~z~0_9 v_main_~z~0_10)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {2713#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= (mod main_~x~0 4294967296) 0))} is VALID [2022-04-07 17:32:23,804 INFO L290 TraceCheckUtils]: 13: Hoare triple {2713#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= (mod main_~x~0 4294967296) 0))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {2726#(and (= main_~n~0 main_~x~0) (<= (mod main_~x~0 4294967296) 0))} is VALID [2022-04-07 17:32:23,804 INFO L272 TraceCheckUtils]: 14: Hoare triple {2726#(and (= main_~n~0 main_~x~0) (<= (mod main_~x~0 4294967296) 0))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {2730#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:32:23,805 INFO L290 TraceCheckUtils]: 15: Hoare triple {2730#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2734#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:32:23,805 INFO L290 TraceCheckUtils]: 16: Hoare triple {2734#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2667#false} is VALID [2022-04-07 17:32:23,805 INFO L290 TraceCheckUtils]: 17: Hoare triple {2667#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2667#false} is VALID [2022-04-07 17:32:23,805 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 17:32:23,805 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 17:32:43,234 INFO L290 TraceCheckUtils]: 17: Hoare triple {2667#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2667#false} is VALID [2022-04-07 17:32:43,235 INFO L290 TraceCheckUtils]: 16: Hoare triple {2734#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2667#false} is VALID [2022-04-07 17:32:43,235 INFO L290 TraceCheckUtils]: 15: Hoare triple {2730#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2734#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:32:43,236 INFO L272 TraceCheckUtils]: 14: Hoare triple {2676#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {2730#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:32:43,237 INFO L290 TraceCheckUtils]: 13: Hoare triple {2753#(or (and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))) (< 0 (mod main_~z~0 4294967296)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {2676#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:32:45,241 WARN L290 TraceCheckUtils]: 12: Hoare triple {2757#(forall ((aux_mod_v_main_~z~0_48_31 Int)) (or (< 0 aux_mod_v_main_~z~0_48_31) (< aux_mod_v_main_~z~0_48_31 0) (and (or (not (< 0 (mod main_~z~0 4294967296))) (forall ((aux_div_v_main_~x~0_52_31 Int) (aux_div_v_main_~z~0_48_31 Int)) (or (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ aux_mod_v_main_~z~0_48_31 v_it_5 (* 4294967296 aux_div_v_main_~z~0_48_31) 1) main_~z~0))) (not (< (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31)) main_~z~0)) (< (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31) main_~n~0 (* aux_div_v_main_~x~0_52_31 4294967296)) (+ main_~z~0 main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (< (+ main_~z~0 main_~x~0) (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31) (* aux_div_v_main_~x~0_52_31 4294967296)))))) (or (<= (+ (div main_~n~0 4294967296) (div (+ main_~n~0 (* (- 1) main_~x~0)) (- 4294967296))) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1)) (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~z~0_48_31 Int)) (not (= main_~z~0 (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31)))))) (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~z~0_48_31 Int)) (not (= main_~z~0 (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31))))) (< (div (+ (- 1) (* (- 1) main_~x~0)) (- 4294967296)) (+ (div main_~n~0 4294967296) 2 (div (+ main_~x~0 (* (- 1) main_~n~0)) 4294967296)))) (or (forall ((aux_div_v_main_~x~0_52_31 Int) (aux_div_v_main_~z~0_48_31 Int)) (or (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ aux_mod_v_main_~z~0_48_31 v_it_5 (* 4294967296 aux_div_v_main_~z~0_48_31) 1) main_~z~0))) (not (< (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31)) main_~z~0)) (<= (+ main_~z~0 main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31) main_~n~0 (* aux_div_v_main_~x~0_52_31 4294967296))) (<= (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31) (* aux_div_v_main_~x~0_52_31 4294967296) 4294967296) (+ main_~z~0 main_~x~0)))) (not (< 0 (mod main_~z~0 4294967296)))))))} [107] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~x~0_11 v_main_~x~0_10) (<= .cse0 0) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)) (and (= v_main_~x~0_10 (+ v_main_~x~0_11 v_main_~z~0_10 (* (- 1) v_main_~z~0_9))) (< 0 .cse0) (forall ((v_it_5 Int)) (or (not (<= (+ v_main_~z~0_9 v_it_5 1) v_main_~z~0_10)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)))) (< v_main_~z~0_9 v_main_~z~0_10)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {2753#(or (and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))) (< 0 (mod main_~z~0 4294967296)))} is UNKNOWN [2022-04-07 17:32:47,423 WARN L290 TraceCheckUtils]: 11: Hoare triple {2757#(forall ((aux_mod_v_main_~z~0_48_31 Int)) (or (< 0 aux_mod_v_main_~z~0_48_31) (< aux_mod_v_main_~z~0_48_31 0) (and (or (not (< 0 (mod main_~z~0 4294967296))) (forall ((aux_div_v_main_~x~0_52_31 Int) (aux_div_v_main_~z~0_48_31 Int)) (or (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ aux_mod_v_main_~z~0_48_31 v_it_5 (* 4294967296 aux_div_v_main_~z~0_48_31) 1) main_~z~0))) (not (< (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31)) main_~z~0)) (< (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31) main_~n~0 (* aux_div_v_main_~x~0_52_31 4294967296)) (+ main_~z~0 main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (< (+ main_~z~0 main_~x~0) (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31) (* aux_div_v_main_~x~0_52_31 4294967296)))))) (or (<= (+ (div main_~n~0 4294967296) (div (+ main_~n~0 (* (- 1) main_~x~0)) (- 4294967296))) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1)) (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~z~0_48_31 Int)) (not (= main_~z~0 (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31)))))) (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~z~0_48_31 Int)) (not (= main_~z~0 (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31))))) (< (div (+ (- 1) (* (- 1) main_~x~0)) (- 4294967296)) (+ (div main_~n~0 4294967296) 2 (div (+ main_~x~0 (* (- 1) main_~n~0)) 4294967296)))) (or (forall ((aux_div_v_main_~x~0_52_31 Int) (aux_div_v_main_~z~0_48_31 Int)) (or (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ aux_mod_v_main_~z~0_48_31 v_it_5 (* 4294967296 aux_div_v_main_~z~0_48_31) 1) main_~z~0))) (not (< (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31)) main_~z~0)) (<= (+ main_~z~0 main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31) main_~n~0 (* aux_div_v_main_~x~0_52_31 4294967296))) (<= (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31) (* aux_div_v_main_~x~0_52_31 4294967296) 4294967296) (+ main_~z~0 main_~x~0)))) (not (< 0 (mod main_~z~0 4294967296)))))))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2757#(forall ((aux_mod_v_main_~z~0_48_31 Int)) (or (< 0 aux_mod_v_main_~z~0_48_31) (< aux_mod_v_main_~z~0_48_31 0) (and (or (not (< 0 (mod main_~z~0 4294967296))) (forall ((aux_div_v_main_~x~0_52_31 Int) (aux_div_v_main_~z~0_48_31 Int)) (or (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ aux_mod_v_main_~z~0_48_31 v_it_5 (* 4294967296 aux_div_v_main_~z~0_48_31) 1) main_~z~0))) (not (< (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31)) main_~z~0)) (< (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31) main_~n~0 (* aux_div_v_main_~x~0_52_31 4294967296)) (+ main_~z~0 main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (< (+ main_~z~0 main_~x~0) (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31) (* aux_div_v_main_~x~0_52_31 4294967296)))))) (or (<= (+ (div main_~n~0 4294967296) (div (+ main_~n~0 (* (- 1) main_~x~0)) (- 4294967296))) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1)) (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~z~0_48_31 Int)) (not (= main_~z~0 (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31)))))) (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~z~0_48_31 Int)) (not (= main_~z~0 (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31))))) (< (div (+ (- 1) (* (- 1) main_~x~0)) (- 4294967296)) (+ (div main_~n~0 4294967296) 2 (div (+ main_~x~0 (* (- 1) main_~n~0)) 4294967296)))) (or (forall ((aux_div_v_main_~x~0_52_31 Int) (aux_div_v_main_~z~0_48_31 Int)) (or (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ aux_mod_v_main_~z~0_48_31 v_it_5 (* 4294967296 aux_div_v_main_~z~0_48_31) 1) main_~z~0))) (not (< (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31)) main_~z~0)) (<= (+ main_~z~0 main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31) main_~n~0 (* aux_div_v_main_~x~0_52_31 4294967296))) (<= (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31) (* aux_div_v_main_~x~0_52_31 4294967296) 4294967296) (+ main_~z~0 main_~x~0)))) (not (< 0 (mod main_~z~0 4294967296)))))))} is UNKNOWN [2022-04-07 17:32:49,432 WARN L290 TraceCheckUtils]: 10: Hoare triple {2757#(forall ((aux_mod_v_main_~z~0_48_31 Int)) (or (< 0 aux_mod_v_main_~z~0_48_31) (< aux_mod_v_main_~z~0_48_31 0) (and (or (not (< 0 (mod main_~z~0 4294967296))) (forall ((aux_div_v_main_~x~0_52_31 Int) (aux_div_v_main_~z~0_48_31 Int)) (or (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ aux_mod_v_main_~z~0_48_31 v_it_5 (* 4294967296 aux_div_v_main_~z~0_48_31) 1) main_~z~0))) (not (< (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31)) main_~z~0)) (< (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31) main_~n~0 (* aux_div_v_main_~x~0_52_31 4294967296)) (+ main_~z~0 main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (< (+ main_~z~0 main_~x~0) (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31) (* aux_div_v_main_~x~0_52_31 4294967296)))))) (or (<= (+ (div main_~n~0 4294967296) (div (+ main_~n~0 (* (- 1) main_~x~0)) (- 4294967296))) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1)) (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~z~0_48_31 Int)) (not (= main_~z~0 (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31)))))) (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~z~0_48_31 Int)) (not (= main_~z~0 (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31))))) (< (div (+ (- 1) (* (- 1) main_~x~0)) (- 4294967296)) (+ (div main_~n~0 4294967296) 2 (div (+ main_~x~0 (* (- 1) main_~n~0)) 4294967296)))) (or (forall ((aux_div_v_main_~x~0_52_31 Int) (aux_div_v_main_~z~0_48_31 Int)) (or (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ aux_mod_v_main_~z~0_48_31 v_it_5 (* 4294967296 aux_div_v_main_~z~0_48_31) 1) main_~z~0))) (not (< (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31)) main_~z~0)) (<= (+ main_~z~0 main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31) main_~n~0 (* aux_div_v_main_~x~0_52_31 4294967296))) (<= (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31) (* aux_div_v_main_~x~0_52_31 4294967296) 4294967296) (+ main_~z~0 main_~x~0)))) (not (< 0 (mod main_~z~0 4294967296)))))))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2757#(forall ((aux_mod_v_main_~z~0_48_31 Int)) (or (< 0 aux_mod_v_main_~z~0_48_31) (< aux_mod_v_main_~z~0_48_31 0) (and (or (not (< 0 (mod main_~z~0 4294967296))) (forall ((aux_div_v_main_~x~0_52_31 Int) (aux_div_v_main_~z~0_48_31 Int)) (or (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ aux_mod_v_main_~z~0_48_31 v_it_5 (* 4294967296 aux_div_v_main_~z~0_48_31) 1) main_~z~0))) (not (< (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31)) main_~z~0)) (< (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31) main_~n~0 (* aux_div_v_main_~x~0_52_31 4294967296)) (+ main_~z~0 main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (< (+ main_~z~0 main_~x~0) (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31) (* aux_div_v_main_~x~0_52_31 4294967296)))))) (or (<= (+ (div main_~n~0 4294967296) (div (+ main_~n~0 (* (- 1) main_~x~0)) (- 4294967296))) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1)) (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~z~0_48_31 Int)) (not (= main_~z~0 (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31)))))) (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~z~0_48_31 Int)) (not (= main_~z~0 (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31))))) (< (div (+ (- 1) (* (- 1) main_~x~0)) (- 4294967296)) (+ (div main_~n~0 4294967296) 2 (div (+ main_~x~0 (* (- 1) main_~n~0)) 4294967296)))) (or (forall ((aux_div_v_main_~x~0_52_31 Int) (aux_div_v_main_~z~0_48_31 Int)) (or (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ aux_mod_v_main_~z~0_48_31 v_it_5 (* 4294967296 aux_div_v_main_~z~0_48_31) 1) main_~z~0))) (not (< (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31)) main_~z~0)) (<= (+ main_~z~0 main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31) main_~n~0 (* aux_div_v_main_~x~0_52_31 4294967296))) (<= (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31) (* aux_div_v_main_~x~0_52_31 4294967296) 4294967296) (+ main_~z~0 main_~x~0)))) (not (< 0 (mod main_~z~0 4294967296)))))))} is UNKNOWN [2022-04-07 17:32:49,440 INFO L290 TraceCheckUtils]: 9: Hoare triple {2753#(or (and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))) (< 0 (mod main_~z~0 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {2757#(forall ((aux_mod_v_main_~z~0_48_31 Int)) (or (< 0 aux_mod_v_main_~z~0_48_31) (< aux_mod_v_main_~z~0_48_31 0) (and (or (not (< 0 (mod main_~z~0 4294967296))) (forall ((aux_div_v_main_~x~0_52_31 Int) (aux_div_v_main_~z~0_48_31 Int)) (or (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ aux_mod_v_main_~z~0_48_31 v_it_5 (* 4294967296 aux_div_v_main_~z~0_48_31) 1) main_~z~0))) (not (< (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31)) main_~z~0)) (< (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31) main_~n~0 (* aux_div_v_main_~x~0_52_31 4294967296)) (+ main_~z~0 main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (< (+ main_~z~0 main_~x~0) (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31) (* aux_div_v_main_~x~0_52_31 4294967296)))))) (or (<= (+ (div main_~n~0 4294967296) (div (+ main_~n~0 (* (- 1) main_~x~0)) (- 4294967296))) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1)) (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~z~0_48_31 Int)) (not (= main_~z~0 (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31)))))) (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~z~0_48_31 Int)) (not (= main_~z~0 (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31))))) (< (div (+ (- 1) (* (- 1) main_~x~0)) (- 4294967296)) (+ (div main_~n~0 4294967296) 2 (div (+ main_~x~0 (* (- 1) main_~n~0)) 4294967296)))) (or (forall ((aux_div_v_main_~x~0_52_31 Int) (aux_div_v_main_~z~0_48_31 Int)) (or (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ aux_mod_v_main_~z~0_48_31 v_it_5 (* 4294967296 aux_div_v_main_~z~0_48_31) 1) main_~z~0))) (not (< (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31)) main_~z~0)) (<= (+ main_~z~0 main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31) main_~n~0 (* aux_div_v_main_~x~0_52_31 4294967296))) (<= (+ aux_mod_v_main_~z~0_48_31 (* 4294967296 aux_div_v_main_~z~0_48_31) (* aux_div_v_main_~x~0_52_31 4294967296) 4294967296) (+ main_~z~0 main_~x~0)))) (not (< 0 (mod main_~z~0 4294967296)))))))} is VALID [2022-04-07 17:32:49,441 INFO L290 TraceCheckUtils]: 8: Hoare triple {2770#(or (and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))) (< 0 (mod main_~y~0 4294967296)))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {2753#(or (and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))) (< 0 (mod main_~z~0 4294967296)))} is VALID [2022-04-07 17:32:49,442 INFO L290 TraceCheckUtils]: 7: Hoare triple {2672#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2770#(or (and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-07 17:32:49,496 INFO L290 TraceCheckUtils]: 6: Hoare triple {2777#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (forall ((aux_mod_v_main_~y~0_33_31 Int)) (or (and (or (forall ((aux_div_v_main_~y~0_33_31 Int)) (not (= (+ aux_mod_v_main_~y~0_33_31 (* aux_div_v_main_~y~0_33_31 4294967296)) main_~y~0))) (< 0 (mod main_~x~0 4294967296)) (forall ((aux_div_v_main_~x~0_53_31 Int)) (or (<= (+ (* aux_div_v_main_~x~0_53_31 4294967296) 1) (+ main_~x~0 aux_mod_v_main_~y~0_33_31)) (< main_~x~0 (* aux_div_v_main_~x~0_53_31 4294967296))))) (or (forall ((aux_div_v_main_~x~0_53_31 Int) (aux_div_v_main_~y~0_33_31 Int)) (or (exists ((v_it_1 Int)) (and (<= (+ v_it_1 main_~y~0 1) (+ aux_mod_v_main_~y~0_33_31 (* aux_div_v_main_~y~0_33_31 4294967296))) (not (< 0 (mod (+ main_~x~0 (* v_it_1 4294967295)) 4294967296))) (<= 1 v_it_1))) (<= (+ (* aux_div_v_main_~y~0_33_31 4294967296) (* aux_div_v_main_~x~0_53_31 4294967296) 1) (+ main_~y~0 main_~x~0)) (< (+ main_~y~0 main_~x~0) (+ aux_mod_v_main_~y~0_33_31 (* aux_div_v_main_~y~0_33_31 4294967296) (* aux_div_v_main_~x~0_53_31 4294967296))) (not (< main_~y~0 (+ aux_mod_v_main_~y~0_33_31 (* aux_div_v_main_~y~0_33_31 4294967296)))))) (not (< 0 (mod main_~x~0 4294967296))))) (>= aux_mod_v_main_~y~0_33_31 4294967296) (> 0 aux_mod_v_main_~y~0_33_31))))} [94] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0) (= v_main_~y~0_6 v_main_~y~0_5)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_6 v_it_1 1) v_main_~y~0_5)))) (< v_main_~y~0_6 v_main_~y~0_5) (< 0 .cse0) (= v_main_~x~0_3 (+ v_main_~x~0_4 v_main_~y~0_6 (* (- 1) v_main_~y~0_5)))))) InVars {main_~y~0=v_main_~y~0_6, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2672#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-07 17:32:49,502 INFO L290 TraceCheckUtils]: 5: Hoare triple {2666#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2777#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (forall ((aux_mod_v_main_~y~0_33_31 Int)) (or (and (or (forall ((aux_div_v_main_~y~0_33_31 Int)) (not (= (+ aux_mod_v_main_~y~0_33_31 (* aux_div_v_main_~y~0_33_31 4294967296)) main_~y~0))) (< 0 (mod main_~x~0 4294967296)) (forall ((aux_div_v_main_~x~0_53_31 Int)) (or (<= (+ (* aux_div_v_main_~x~0_53_31 4294967296) 1) (+ main_~x~0 aux_mod_v_main_~y~0_33_31)) (< main_~x~0 (* aux_div_v_main_~x~0_53_31 4294967296))))) (or (forall ((aux_div_v_main_~x~0_53_31 Int) (aux_div_v_main_~y~0_33_31 Int)) (or (exists ((v_it_1 Int)) (and (<= (+ v_it_1 main_~y~0 1) (+ aux_mod_v_main_~y~0_33_31 (* aux_div_v_main_~y~0_33_31 4294967296))) (not (< 0 (mod (+ main_~x~0 (* v_it_1 4294967295)) 4294967296))) (<= 1 v_it_1))) (<= (+ (* aux_div_v_main_~y~0_33_31 4294967296) (* aux_div_v_main_~x~0_53_31 4294967296) 1) (+ main_~y~0 main_~x~0)) (< (+ main_~y~0 main_~x~0) (+ aux_mod_v_main_~y~0_33_31 (* aux_div_v_main_~y~0_33_31 4294967296) (* aux_div_v_main_~x~0_53_31 4294967296))) (not (< main_~y~0 (+ aux_mod_v_main_~y~0_33_31 (* aux_div_v_main_~y~0_33_31 4294967296)))))) (not (< 0 (mod main_~x~0 4294967296))))) (>= aux_mod_v_main_~y~0_33_31 4294967296) (> 0 aux_mod_v_main_~y~0_33_31))))} is VALID [2022-04-07 17:32:49,503 INFO L272 TraceCheckUtils]: 4: Hoare triple {2666#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2666#true} is VALID [2022-04-07 17:32:49,503 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2666#true} {2666#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2666#true} is VALID [2022-04-07 17:32:49,503 INFO L290 TraceCheckUtils]: 2: Hoare triple {2666#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2666#true} is VALID [2022-04-07 17:32:49,503 INFO L290 TraceCheckUtils]: 1: Hoare triple {2666#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2666#true} is VALID [2022-04-07 17:32:49,503 INFO L272 TraceCheckUtils]: 0: Hoare triple {2666#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2666#true} is VALID [2022-04-07 17:32:49,503 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:32:49,503 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [670131533] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 17:32:49,503 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 17:32:49,504 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 10, 10] total 22 [2022-04-07 17:32:49,504 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1089830389] [2022-04-07 17:32:49,504 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 17:32:49,504 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 21 states have (on average 1.619047619047619) internal successors, (34), 19 states have internal predecessors, (34), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-07 17:32:49,505 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:32:49,505 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 22 states, 21 states have (on average 1.619047619047619) internal successors, (34), 19 states have internal predecessors, (34), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:32:54,671 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 41 edges. 39 inductive. 0 not inductive. 2 times theorem prover too weak to decide inductivity. [2022-04-07 17:32:54,672 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 22 states [2022-04-07 17:32:54,672 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:32:54,672 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2022-04-07 17:32:54,672 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=94, Invalid=364, Unknown=4, NotChecked=0, Total=462 [2022-04-07 17:32:54,672 INFO L87 Difference]: Start difference. First operand 36 states and 54 transitions. Second operand has 22 states, 21 states have (on average 1.619047619047619) internal successors, (34), 19 states have internal predecessors, (34), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:32:58,436 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:32:58,437 INFO L93 Difference]: Finished difference Result 51 states and 76 transitions. [2022-04-07 17:32:58,437 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2022-04-07 17:32:58,437 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 21 states have (on average 1.619047619047619) internal successors, (34), 19 states have internal predecessors, (34), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-07 17:32:58,437 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:32:58,437 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 21 states have (on average 1.619047619047619) internal successors, (34), 19 states have internal predecessors, (34), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:32:58,438 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 54 transitions. [2022-04-07 17:32:58,439 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 21 states have (on average 1.619047619047619) internal successors, (34), 19 states have internal predecessors, (34), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:32:58,440 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 54 transitions. [2022-04-07 17:32:58,440 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 18 states and 54 transitions. [2022-04-07 17:33:00,622 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 54 edges. 53 inductive. 0 not inductive. 1 times theorem prover too weak to decide inductivity. [2022-04-07 17:33:00,623 INFO L225 Difference]: With dead ends: 51 [2022-04-07 17:33:00,623 INFO L226 Difference]: Without dead ends: 45 [2022-04-07 17:33:00,624 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 61 GetRequests, 25 SyntacticMatches, 6 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 276 ImplicationChecksByTransitivity, 16.6s TimeCoverageRelationStatistics Valid=197, Invalid=790, Unknown=5, NotChecked=0, Total=992 [2022-04-07 17:33:00,624 INFO L913 BasicCegarLoop]: 11 mSDtfsCounter, 25 mSDsluCounter, 75 mSDsCounter, 0 mSdLazyCounter, 86 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 25 SdHoareTripleChecker+Valid, 86 SdHoareTripleChecker+Invalid, 164 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 86 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 70 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 17:33:00,624 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [25 Valid, 86 Invalid, 164 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 86 Invalid, 0 Unknown, 70 Unchecked, 0.1s Time] [2022-04-07 17:33:00,625 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45 states. [2022-04-07 17:33:00,626 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45 to 40. [2022-04-07 17:33:00,626 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:33:00,627 INFO L82 GeneralOperation]: Start isEquivalent. First operand 45 states. Second operand has 40 states, 35 states have (on average 1.6) internal successors, (56), 35 states have internal predecessors, (56), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:00,627 INFO L74 IsIncluded]: Start isIncluded. First operand 45 states. Second operand has 40 states, 35 states have (on average 1.6) internal successors, (56), 35 states have internal predecessors, (56), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:00,627 INFO L87 Difference]: Start difference. First operand 45 states. Second operand has 40 states, 35 states have (on average 1.6) internal successors, (56), 35 states have internal predecessors, (56), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:00,628 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:33:00,628 INFO L93 Difference]: Finished difference Result 45 states and 68 transitions. [2022-04-07 17:33:00,628 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 68 transitions. [2022-04-07 17:33:00,628 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:33:00,628 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:33:00,629 INFO L74 IsIncluded]: Start isIncluded. First operand has 40 states, 35 states have (on average 1.6) internal successors, (56), 35 states have internal predecessors, (56), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 45 states. [2022-04-07 17:33:00,629 INFO L87 Difference]: Start difference. First operand has 40 states, 35 states have (on average 1.6) internal successors, (56), 35 states have internal predecessors, (56), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 45 states. [2022-04-07 17:33:00,630 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:33:00,630 INFO L93 Difference]: Finished difference Result 45 states and 68 transitions. [2022-04-07 17:33:00,630 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 68 transitions. [2022-04-07 17:33:00,630 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:33:00,630 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:33:00,630 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:33:00,630 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:33:00,631 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 40 states, 35 states have (on average 1.6) internal successors, (56), 35 states have internal predecessors, (56), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:00,631 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 60 transitions. [2022-04-07 17:33:00,631 INFO L78 Accepts]: Start accepts. Automaton has 40 states and 60 transitions. Word has length 18 [2022-04-07 17:33:00,631 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:33:00,631 INFO L478 AbstractCegarLoop]: Abstraction has 40 states and 60 transitions. [2022-04-07 17:33:00,632 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 22 states, 21 states have (on average 1.619047619047619) internal successors, (34), 19 states have internal predecessors, (34), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:00,632 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 60 transitions. [2022-04-07 17:33:00,632 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-04-07 17:33:00,632 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:33:00,632 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:33:00,650 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Ended with exit code 0 [2022-04-07 17:33:00,843 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable11 [2022-04-07 17:33:00,843 INFO L403 AbstractCegarLoop]: === Iteration 13 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:33:00,844 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:33:00,844 INFO L85 PathProgramCache]: Analyzing trace with hash -194390100, now seen corresponding path program 1 times [2022-04-07 17:33:00,844 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:33:00,844 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2093908324] [2022-04-07 17:33:00,844 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:33:00,844 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:33:00,855 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_1.0))) (+ main_~x~0_5 .cse0 (* (- 4294967296) (div (+ main_~x~0_5 .cse0) 4294967296)))) 0)) [2022-04-07 17:33:00,856 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.1))) (+ .cse0 main_~x~0_6 (* (- 4294967296) (div (+ .cse0 main_~x~0_6) 4294967296)))) 0)) [2022-04-07 17:33:00,862 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:33:00,868 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_1.2))) (+ main_~x~0_5 .cse0 (* (- 4294967296) (div (+ main_~x~0_5 .cse0) 4294967296)))) 0)) [2022-04-07 17:33:00,874 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.3))) (+ .cse0 main_~x~0_6 (* (- 4294967296) (div (+ .cse0 main_~x~0_6) 4294967296)))) 0)) [2022-04-07 17:33:01,058 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:33:01,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:33:01,065 INFO L290 TraceCheckUtils]: 0: Hoare triple {3016#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3003#true} is VALID [2022-04-07 17:33:01,065 INFO L290 TraceCheckUtils]: 1: Hoare triple {3003#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3003#true} is VALID [2022-04-07 17:33:01,065 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {3003#true} {3003#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3003#true} is VALID [2022-04-07 17:33:01,065 INFO L272 TraceCheckUtils]: 0: Hoare triple {3003#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3016#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:33:01,066 INFO L290 TraceCheckUtils]: 1: Hoare triple {3016#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3003#true} is VALID [2022-04-07 17:33:01,066 INFO L290 TraceCheckUtils]: 2: Hoare triple {3003#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3003#true} is VALID [2022-04-07 17:33:01,066 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3003#true} {3003#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3003#true} is VALID [2022-04-07 17:33:01,066 INFO L272 TraceCheckUtils]: 4: Hoare triple {3003#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3003#true} is VALID [2022-04-07 17:33:01,066 INFO L290 TraceCheckUtils]: 5: Hoare triple {3003#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3008#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 17:33:01,074 INFO L290 TraceCheckUtils]: 6: Hoare triple {3008#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [94] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0) (= v_main_~y~0_6 v_main_~y~0_5)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_6 v_it_1 1) v_main_~y~0_5)))) (< v_main_~y~0_6 v_main_~y~0_5) (< 0 .cse0) (= v_main_~x~0_3 (+ v_main_~x~0_4 v_main_~y~0_6 (* (- 1) v_main_~y~0_5)))))) InVars {main_~y~0=v_main_~y~0_6, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3009#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-07 17:33:01,075 INFO L290 TraceCheckUtils]: 7: Hoare triple {3009#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3010#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-07 17:33:01,076 INFO L290 TraceCheckUtils]: 8: Hoare triple {3010#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {3010#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-07 17:33:01,076 INFO L290 TraceCheckUtils]: 9: Hoare triple {3010#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {3010#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-07 17:33:01,077 INFO L290 TraceCheckUtils]: 10: Hoare triple {3010#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3011#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} is VALID [2022-04-07 17:33:01,078 INFO L290 TraceCheckUtils]: 11: Hoare triple {3011#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} [104] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (< v_main_~x~0_6 v_main_~x~0_7) (= (+ (* (- 1) v_main_~x~0_6) v_main_~x~0_7 v_main_~y~0_8) v_main_~y~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_8 v_main_~y~0_7) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_8, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {3012#(< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))} is VALID [2022-04-07 17:33:01,079 INFO L290 TraceCheckUtils]: 12: Hoare triple {3012#(< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3013#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:33:01,079 INFO L290 TraceCheckUtils]: 13: Hoare triple {3013#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {3013#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:33:01,080 INFO L272 TraceCheckUtils]: 14: Hoare triple {3013#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {3014#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:33:01,081 INFO L290 TraceCheckUtils]: 15: Hoare triple {3014#(not (= |__VERIFIER_assert_#in~cond| 0))} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3015#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:33:01,081 INFO L290 TraceCheckUtils]: 16: Hoare triple {3015#(not (= __VERIFIER_assert_~cond 0))} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3004#false} is VALID [2022-04-07 17:33:01,081 INFO L290 TraceCheckUtils]: 17: Hoare triple {3004#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3004#false} is VALID [2022-04-07 17:33:01,081 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:33:01,081 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:33:01,081 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2093908324] [2022-04-07 17:33:01,082 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2093908324] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:33:01,082 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [728317145] [2022-04-07 17:33:01,082 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:33:01,082 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:33:01,082 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:33:01,083 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:33:01,083 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2022-04-07 17:33:01,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:33:01,130 INFO L263 TraceCheckSpWp]: Trace formula consists of 63 conjuncts, 12 conjunts are in the unsatisfiable core [2022-04-07 17:33:01,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:33:01,162 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:33:02,233 INFO L272 TraceCheckUtils]: 0: Hoare triple {3003#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3003#true} is VALID [2022-04-07 17:33:02,234 INFO L290 TraceCheckUtils]: 1: Hoare triple {3003#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3003#true} is VALID [2022-04-07 17:33:02,234 INFO L290 TraceCheckUtils]: 2: Hoare triple {3003#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3003#true} is VALID [2022-04-07 17:33:02,234 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3003#true} {3003#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3003#true} is VALID [2022-04-07 17:33:02,234 INFO L272 TraceCheckUtils]: 4: Hoare triple {3003#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3003#true} is VALID [2022-04-07 17:33:02,234 INFO L290 TraceCheckUtils]: 5: Hoare triple {3003#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3008#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 17:33:02,327 INFO L290 TraceCheckUtils]: 6: Hoare triple {3008#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [94] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0) (= v_main_~y~0_6 v_main_~y~0_5)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_6 v_it_1 1) v_main_~y~0_5)))) (< v_main_~y~0_6 v_main_~y~0_5) (< 0 .cse0) (= v_main_~x~0_3 (+ v_main_~x~0_4 v_main_~y~0_6 (* (- 1) v_main_~y~0_5)))))) InVars {main_~y~0=v_main_~y~0_6, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3038#(or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)))} is VALID [2022-04-07 17:33:02,329 INFO L290 TraceCheckUtils]: 7: Hoare triple {3038#(or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3042#(and (not (< 0 (mod main_~x~0 4294967296))) (or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (= main_~y~0 0))))} is VALID [2022-04-07 17:33:02,331 INFO L290 TraceCheckUtils]: 8: Hoare triple {3042#(and (not (< 0 (mod main_~x~0 4294967296))) (or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (= main_~y~0 0))))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {3042#(and (not (< 0 (mod main_~x~0 4294967296))) (or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (= main_~y~0 0))))} is VALID [2022-04-07 17:33:02,333 INFO L290 TraceCheckUtils]: 9: Hoare triple {3042#(and (not (< 0 (mod main_~x~0 4294967296))) (or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (= main_~y~0 0))))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {3042#(and (not (< 0 (mod main_~x~0 4294967296))) (or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (= main_~y~0 0))))} is VALID [2022-04-07 17:33:02,350 INFO L290 TraceCheckUtils]: 10: Hoare triple {3042#(and (not (< 0 (mod main_~x~0 4294967296))) (or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (= main_~y~0 0))))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3052#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:33:02,351 INFO L290 TraceCheckUtils]: 11: Hoare triple {3052#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))) (= main_~y~0 0))} [104] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (< v_main_~x~0_6 v_main_~x~0_7) (= (+ (* (- 1) v_main_~x~0_6) v_main_~x~0_7 v_main_~y~0_8) v_main_~y~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_8 v_main_~y~0_7) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_8, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {3056#(and (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-07 17:33:02,352 INFO L290 TraceCheckUtils]: 12: Hoare triple {3056#(and (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3056#(and (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-07 17:33:02,352 INFO L290 TraceCheckUtils]: 13: Hoare triple {3056#(and (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {3056#(and (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-07 17:33:02,353 INFO L272 TraceCheckUtils]: 14: Hoare triple {3056#(and (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {3066#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:33:02,354 INFO L290 TraceCheckUtils]: 15: Hoare triple {3066#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3070#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:33:02,354 INFO L290 TraceCheckUtils]: 16: Hoare triple {3070#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3004#false} is VALID [2022-04-07 17:33:02,354 INFO L290 TraceCheckUtils]: 17: Hoare triple {3004#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3004#false} is VALID [2022-04-07 17:33:02,355 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:33:02,355 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 17:33:09,339 INFO L290 TraceCheckUtils]: 17: Hoare triple {3004#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3004#false} is VALID [2022-04-07 17:33:09,340 INFO L290 TraceCheckUtils]: 16: Hoare triple {3070#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3004#false} is VALID [2022-04-07 17:33:09,340 INFO L290 TraceCheckUtils]: 15: Hoare triple {3066#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3070#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:33:09,341 INFO L272 TraceCheckUtils]: 14: Hoare triple {3013#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {3066#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:33:09,342 INFO L290 TraceCheckUtils]: 13: Hoare triple {3013#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {3013#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:33:09,343 INFO L290 TraceCheckUtils]: 12: Hoare triple {3092#(or (< 0 (mod main_~x~0 4294967296)) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3013#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:33:09,344 INFO L290 TraceCheckUtils]: 11: Hoare triple {3011#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} [104] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (< v_main_~x~0_6 v_main_~x~0_7) (= (+ (* (- 1) v_main_~x~0_6) v_main_~x~0_7 v_main_~y~0_8) v_main_~y~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_8 v_main_~y~0_7) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_8, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {3092#(or (< 0 (mod main_~x~0 4294967296)) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:33:09,345 INFO L290 TraceCheckUtils]: 10: Hoare triple {3010#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3011#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} is VALID [2022-04-07 17:33:09,345 INFO L290 TraceCheckUtils]: 9: Hoare triple {3010#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {3010#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-07 17:33:09,346 INFO L290 TraceCheckUtils]: 8: Hoare triple {3010#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {3010#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-07 17:33:09,347 INFO L290 TraceCheckUtils]: 7: Hoare triple {3009#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3010#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-07 17:33:11,390 WARN L290 TraceCheckUtils]: 6: Hoare triple {3111#(or (forall ((aux_mod_v_main_~y~0_38_31 Int)) (or (and (or (forall ((aux_div_v_main_~x~0_58_31 Int)) (or (< main_~x~0 (* aux_div_v_main_~x~0_58_31 4294967296)) (<= (+ (* aux_div_v_main_~x~0_58_31 4294967296) 1) (+ main_~x~0 aux_mod_v_main_~y~0_38_31)))) (forall ((aux_div_v_main_~y~0_38_31 Int)) (not (= main_~y~0 (+ (* aux_div_v_main_~y~0_38_31 4294967296) aux_mod_v_main_~y~0_38_31)))) (< 0 (mod main_~x~0 4294967296))) (or (not (< 0 (mod main_~x~0 4294967296))) (forall ((aux_div_v_main_~x~0_58_31 Int) (aux_div_v_main_~y~0_38_31 Int)) (or (not (< main_~y~0 (+ (* aux_div_v_main_~y~0_38_31 4294967296) aux_mod_v_main_~y~0_38_31))) (<= (+ (* aux_div_v_main_~x~0_58_31 4294967296) (* aux_div_v_main_~y~0_38_31 4294967296) 1) (+ main_~y~0 main_~x~0)) (< (+ main_~y~0 main_~x~0) (+ (* aux_div_v_main_~x~0_58_31 4294967296) (* aux_div_v_main_~y~0_38_31 4294967296) aux_mod_v_main_~y~0_38_31)) (exists ((v_it_1 Int)) (and (not (< 0 (mod (+ main_~x~0 (* v_it_1 4294967295)) 4294967296))) (<= 1 v_it_1) (<= (+ v_it_1 main_~y~0 1) (+ (* aux_div_v_main_~y~0_38_31 4294967296) aux_mod_v_main_~y~0_38_31)))))))) (>= aux_mod_v_main_~y~0_38_31 4294967296) (> 0 aux_mod_v_main_~y~0_38_31))) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [94] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0) (= v_main_~y~0_6 v_main_~y~0_5)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_6 v_it_1 1) v_main_~y~0_5)))) (< v_main_~y~0_6 v_main_~y~0_5) (< 0 .cse0) (= v_main_~x~0_3 (+ v_main_~x~0_4 v_main_~y~0_6 (* (- 1) v_main_~y~0_5)))))) InVars {main_~y~0=v_main_~y~0_6, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3009#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is UNKNOWN [2022-04-07 17:33:11,407 INFO L290 TraceCheckUtils]: 5: Hoare triple {3003#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3111#(or (forall ((aux_mod_v_main_~y~0_38_31 Int)) (or (and (or (forall ((aux_div_v_main_~x~0_58_31 Int)) (or (< main_~x~0 (* aux_div_v_main_~x~0_58_31 4294967296)) (<= (+ (* aux_div_v_main_~x~0_58_31 4294967296) 1) (+ main_~x~0 aux_mod_v_main_~y~0_38_31)))) (forall ((aux_div_v_main_~y~0_38_31 Int)) (not (= main_~y~0 (+ (* aux_div_v_main_~y~0_38_31 4294967296) aux_mod_v_main_~y~0_38_31)))) (< 0 (mod main_~x~0 4294967296))) (or (not (< 0 (mod main_~x~0 4294967296))) (forall ((aux_div_v_main_~x~0_58_31 Int) (aux_div_v_main_~y~0_38_31 Int)) (or (not (< main_~y~0 (+ (* aux_div_v_main_~y~0_38_31 4294967296) aux_mod_v_main_~y~0_38_31))) (<= (+ (* aux_div_v_main_~x~0_58_31 4294967296) (* aux_div_v_main_~y~0_38_31 4294967296) 1) (+ main_~y~0 main_~x~0)) (< (+ main_~y~0 main_~x~0) (+ (* aux_div_v_main_~x~0_58_31 4294967296) (* aux_div_v_main_~y~0_38_31 4294967296) aux_mod_v_main_~y~0_38_31)) (exists ((v_it_1 Int)) (and (not (< 0 (mod (+ main_~x~0 (* v_it_1 4294967295)) 4294967296))) (<= 1 v_it_1) (<= (+ v_it_1 main_~y~0 1) (+ (* aux_div_v_main_~y~0_38_31 4294967296) aux_mod_v_main_~y~0_38_31)))))))) (>= aux_mod_v_main_~y~0_38_31 4294967296) (> 0 aux_mod_v_main_~y~0_38_31))) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-07 17:33:11,407 INFO L272 TraceCheckUtils]: 4: Hoare triple {3003#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3003#true} is VALID [2022-04-07 17:33:11,407 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3003#true} {3003#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3003#true} is VALID [2022-04-07 17:33:11,407 INFO L290 TraceCheckUtils]: 2: Hoare triple {3003#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3003#true} is VALID [2022-04-07 17:33:11,407 INFO L290 TraceCheckUtils]: 1: Hoare triple {3003#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3003#true} is VALID [2022-04-07 17:33:11,407 INFO L272 TraceCheckUtils]: 0: Hoare triple {3003#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3003#true} is VALID [2022-04-07 17:33:11,407 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:33:11,408 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [728317145] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 17:33:11,408 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 17:33:11,408 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 9, 10] total 19 [2022-04-07 17:33:11,408 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [425432124] [2022-04-07 17:33:11,408 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 17:33:11,408 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 1.5263157894736843) internal successors, (29), 16 states have internal predecessors, (29), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-07 17:33:11,409 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:33:11,409 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 19 states, 19 states have (on average 1.5263157894736843) internal successors, (29), 16 states have internal predecessors, (29), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:12,266 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 36 edges. 36 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:33:12,267 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2022-04-07 17:33:12,267 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:33:12,267 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2022-04-07 17:33:12,267 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=80, Invalid=262, Unknown=0, NotChecked=0, Total=342 [2022-04-07 17:33:12,267 INFO L87 Difference]: Start difference. First operand 40 states and 60 transitions. Second operand has 19 states, 19 states have (on average 1.5263157894736843) internal successors, (29), 16 states have internal predecessors, (29), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:12,878 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:33:12,878 INFO L93 Difference]: Finished difference Result 59 states and 90 transitions. [2022-04-07 17:33:12,878 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2022-04-07 17:33:12,878 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 1.5263157894736843) internal successors, (29), 16 states have internal predecessors, (29), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-07 17:33:12,878 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:33:12,878 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.5263157894736843) internal successors, (29), 16 states have internal predecessors, (29), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:12,879 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 65 transitions. [2022-04-07 17:33:12,880 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.5263157894736843) internal successors, (29), 16 states have internal predecessors, (29), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:12,881 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 65 transitions. [2022-04-07 17:33:12,881 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 17 states and 65 transitions. [2022-04-07 17:33:15,057 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 65 edges. 64 inductive. 0 not inductive. 1 times theorem prover too weak to decide inductivity. [2022-04-07 17:33:15,058 INFO L225 Difference]: With dead ends: 59 [2022-04-07 17:33:15,058 INFO L226 Difference]: Without dead ends: 55 [2022-04-07 17:33:15,058 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 59 GetRequests, 26 SyntacticMatches, 7 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 236 ImplicationChecksByTransitivity, 3.6s TimeCoverageRelationStatistics Valid=173, Invalid=583, Unknown=0, NotChecked=0, Total=756 [2022-04-07 17:33:15,059 INFO L913 BasicCegarLoop]: 13 mSDtfsCounter, 50 mSDsluCounter, 39 mSDsCounter, 0 mSdLazyCounter, 74 mSolverCounterSat, 17 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 50 SdHoareTripleChecker+Valid, 52 SdHoareTripleChecker+Invalid, 125 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 17 IncrementalHoareTripleChecker+Valid, 74 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 34 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 17:33:15,059 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [50 Valid, 52 Invalid, 125 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [17 Valid, 74 Invalid, 0 Unknown, 34 Unchecked, 0.1s Time] [2022-04-07 17:33:15,059 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55 states. [2022-04-07 17:33:15,061 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55 to 42. [2022-04-07 17:33:15,061 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:33:15,061 INFO L82 GeneralOperation]: Start isEquivalent. First operand 55 states. Second operand has 42 states, 37 states have (on average 1.6216216216216217) internal successors, (60), 37 states have internal predecessors, (60), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:15,061 INFO L74 IsIncluded]: Start isIncluded. First operand 55 states. Second operand has 42 states, 37 states have (on average 1.6216216216216217) internal successors, (60), 37 states have internal predecessors, (60), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:15,061 INFO L87 Difference]: Start difference. First operand 55 states. Second operand has 42 states, 37 states have (on average 1.6216216216216217) internal successors, (60), 37 states have internal predecessors, (60), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:15,062 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:33:15,063 INFO L93 Difference]: Finished difference Result 55 states and 85 transitions. [2022-04-07 17:33:15,063 INFO L276 IsEmpty]: Start isEmpty. Operand 55 states and 85 transitions. [2022-04-07 17:33:15,063 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:33:15,063 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:33:15,063 INFO L74 IsIncluded]: Start isIncluded. First operand has 42 states, 37 states have (on average 1.6216216216216217) internal successors, (60), 37 states have internal predecessors, (60), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 55 states. [2022-04-07 17:33:15,063 INFO L87 Difference]: Start difference. First operand has 42 states, 37 states have (on average 1.6216216216216217) internal successors, (60), 37 states have internal predecessors, (60), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 55 states. [2022-04-07 17:33:15,064 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:33:15,065 INFO L93 Difference]: Finished difference Result 55 states and 85 transitions. [2022-04-07 17:33:15,065 INFO L276 IsEmpty]: Start isEmpty. Operand 55 states and 85 transitions. [2022-04-07 17:33:15,065 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:33:15,065 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:33:15,065 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:33:15,065 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:33:15,065 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 42 states, 37 states have (on average 1.6216216216216217) internal successors, (60), 37 states have internal predecessors, (60), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:15,066 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 64 transitions. [2022-04-07 17:33:15,066 INFO L78 Accepts]: Start accepts. Automaton has 42 states and 64 transitions. Word has length 18 [2022-04-07 17:33:15,066 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:33:15,066 INFO L478 AbstractCegarLoop]: Abstraction has 42 states and 64 transitions. [2022-04-07 17:33:15,066 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 19 states, 19 states have (on average 1.5263157894736843) internal successors, (29), 16 states have internal predecessors, (29), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:15,067 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 64 transitions. [2022-04-07 17:33:15,067 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-04-07 17:33:15,067 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:33:15,067 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:33:15,087 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Forceful destruction successful, exit code 0 [2022-04-07 17:33:15,283 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable12 [2022-04-07 17:33:15,284 INFO L403 AbstractCegarLoop]: === Iteration 14 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:33:15,284 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:33:15,284 INFO L85 PathProgramCache]: Analyzing trace with hash -2001594489, now seen corresponding path program 1 times [2022-04-07 17:33:15,284 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:33:15,284 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [805182308] [2022-04-07 17:33:15,284 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:33:15,284 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:33:15,292 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_1.0))) (+ main_~x~0_5 .cse0 (* (- 4294967296) (div (+ main_~x~0_5 .cse0) 4294967296)))) 0)) [2022-04-07 17:33:15,293 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.1))) (+ main_~y~0_6 .cse0 (* (- 4294967296) (div (+ main_~y~0_6 .cse0) 4294967296)))) 0)) [2022-04-07 17:33:15,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:33:15,318 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_1.2))) (+ main_~x~0_5 .cse0 (* (- 4294967296) (div (+ main_~x~0_5 .cse0) 4294967296)))) 0)) [2022-04-07 17:33:15,333 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.3))) (+ main_~y~0_6 .cse0 (* (- 4294967296) (div (+ main_~y~0_6 .cse0) 4294967296)))) 0)) [2022-04-07 17:33:15,627 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:33:15,629 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:33:15,640 INFO L290 TraceCheckUtils]: 0: Hoare triple {3376#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3364#true} is VALID [2022-04-07 17:33:15,640 INFO L290 TraceCheckUtils]: 1: Hoare triple {3364#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3364#true} is VALID [2022-04-07 17:33:15,640 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {3364#true} {3364#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3364#true} is VALID [2022-04-07 17:33:15,641 INFO L272 TraceCheckUtils]: 0: Hoare triple {3364#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3376#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:33:15,641 INFO L290 TraceCheckUtils]: 1: Hoare triple {3376#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3364#true} is VALID [2022-04-07 17:33:15,641 INFO L290 TraceCheckUtils]: 2: Hoare triple {3364#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3364#true} is VALID [2022-04-07 17:33:15,641 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3364#true} {3364#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3364#true} is VALID [2022-04-07 17:33:15,641 INFO L272 TraceCheckUtils]: 4: Hoare triple {3364#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3364#true} is VALID [2022-04-07 17:33:15,642 INFO L290 TraceCheckUtils]: 5: Hoare triple {3364#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3369#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 17:33:15,669 INFO L290 TraceCheckUtils]: 6: Hoare triple {3369#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [94] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0) (= v_main_~y~0_6 v_main_~y~0_5)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_6 v_it_1 1) v_main_~y~0_5)))) (< v_main_~y~0_6 v_main_~y~0_5) (< 0 .cse0) (= v_main_~x~0_3 (+ v_main_~x~0_4 v_main_~y~0_6 (* (- 1) v_main_~y~0_5)))))) InVars {main_~y~0=v_main_~y~0_6, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3370#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:33:15,670 INFO L290 TraceCheckUtils]: 7: Hoare triple {3370#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3371#(or (and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))) (< (* (div main_~y~0 4294967296) 4294967296) main_~y~0))} is VALID [2022-04-07 17:33:15,671 INFO L290 TraceCheckUtils]: 8: Hoare triple {3371#(or (and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))) (< (* (div main_~y~0 4294967296) 4294967296) main_~y~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {3372#(or (and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))) (and (< (* (div main_~y~0 4294967296) 4294967296) main_~y~0) (= (+ main_~y~0 (* (- 1) main_~z~0)) 0)))} is VALID [2022-04-07 17:33:15,672 INFO L290 TraceCheckUtils]: 9: Hoare triple {3372#(or (and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))) (and (< (* (div main_~y~0 4294967296) 4294967296) main_~y~0) (= (+ main_~y~0 (* (- 1) main_~z~0)) 0)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {3373#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:33:15,673 INFO L290 TraceCheckUtils]: 10: Hoare triple {3373#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [101] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (= (+ (* (- 1) v_main_~y~0_3) v_main_~y~0_4 v_main_~z~0_3) v_main_~z~0_2) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3373#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:33:15,673 INFO L290 TraceCheckUtils]: 11: Hoare triple {3373#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3373#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:33:15,674 INFO L290 TraceCheckUtils]: 12: Hoare triple {3373#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3373#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:33:15,674 INFO L290 TraceCheckUtils]: 13: Hoare triple {3373#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {3373#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:33:15,675 INFO L272 TraceCheckUtils]: 14: Hoare triple {3373#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {3374#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:33:15,676 INFO L290 TraceCheckUtils]: 15: Hoare triple {3374#(not (= |__VERIFIER_assert_#in~cond| 0))} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3375#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:33:15,676 INFO L290 TraceCheckUtils]: 16: Hoare triple {3375#(not (= __VERIFIER_assert_~cond 0))} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3365#false} is VALID [2022-04-07 17:33:15,676 INFO L290 TraceCheckUtils]: 17: Hoare triple {3365#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3365#false} is VALID [2022-04-07 17:33:15,676 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 17:33:15,676 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:33:15,676 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [805182308] [2022-04-07 17:33:15,676 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [805182308] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:33:15,677 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [383363097] [2022-04-07 17:33:15,677 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:33:15,677 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:33:15,677 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:33:15,678 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:33:15,678 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2022-04-07 17:33:15,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:33:15,713 INFO L263 TraceCheckSpWp]: Trace formula consists of 63 conjuncts, 12 conjunts are in the unsatisfiable core [2022-04-07 17:33:15,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:33:15,738 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:33:18,952 INFO L272 TraceCheckUtils]: 0: Hoare triple {3364#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3364#true} is VALID [2022-04-07 17:33:18,952 INFO L290 TraceCheckUtils]: 1: Hoare triple {3364#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3364#true} is VALID [2022-04-07 17:33:18,953 INFO L290 TraceCheckUtils]: 2: Hoare triple {3364#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3364#true} is VALID [2022-04-07 17:33:18,953 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3364#true} {3364#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3364#true} is VALID [2022-04-07 17:33:18,953 INFO L272 TraceCheckUtils]: 4: Hoare triple {3364#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3364#true} is VALID [2022-04-07 17:33:18,953 INFO L290 TraceCheckUtils]: 5: Hoare triple {3364#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3369#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 17:33:18,964 INFO L290 TraceCheckUtils]: 6: Hoare triple {3369#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [94] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0) (= v_main_~y~0_6 v_main_~y~0_5)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_6 v_it_1 1) v_main_~y~0_5)))) (< v_main_~y~0_6 v_main_~y~0_5) (< 0 .cse0) (= v_main_~x~0_3 (+ v_main_~x~0_4 v_main_~y~0_6 (* (- 1) v_main_~y~0_5)))))) InVars {main_~y~0=v_main_~y~0_6, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3398#(or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)))} is VALID [2022-04-07 17:33:18,965 INFO L290 TraceCheckUtils]: 7: Hoare triple {3398#(or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3402#(and (not (< 0 (mod main_~x~0 4294967296))) (or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (= main_~y~0 0))))} is VALID [2022-04-07 17:33:18,967 INFO L290 TraceCheckUtils]: 8: Hoare triple {3402#(and (not (< 0 (mod main_~x~0 4294967296))) (or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (= main_~y~0 0))))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {3406#(and (or (and (= main_~z~0 0) (= main_~n~0 main_~x~0)) (and (< 0 main_~z~0) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~z~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (= (+ main_~n~0 (* (- 1) main_~z~0)) main_~x~0))) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-07 17:33:18,973 INFO L290 TraceCheckUtils]: 9: Hoare triple {3406#(and (or (and (= main_~z~0 0) (= main_~n~0 main_~x~0)) (and (< 0 main_~z~0) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~z~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (= (+ main_~n~0 (* (- 1) main_~z~0)) main_~x~0))) (not (< 0 (mod main_~x~0 4294967296))))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {3410#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-07 17:33:18,974 INFO L290 TraceCheckUtils]: 10: Hoare triple {3410#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [101] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (= (+ (* (- 1) v_main_~y~0_3) v_main_~y~0_4 v_main_~z~0_3) v_main_~z~0_2) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3410#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-07 17:33:18,974 INFO L290 TraceCheckUtils]: 11: Hoare triple {3410#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3410#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-07 17:33:18,975 INFO L290 TraceCheckUtils]: 12: Hoare triple {3410#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3410#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-07 17:33:18,975 INFO L290 TraceCheckUtils]: 13: Hoare triple {3410#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {3410#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-07 17:33:18,975 INFO L272 TraceCheckUtils]: 14: Hoare triple {3410#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {3426#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:33:18,976 INFO L290 TraceCheckUtils]: 15: Hoare triple {3426#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3430#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:33:18,976 INFO L290 TraceCheckUtils]: 16: Hoare triple {3430#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3365#false} is VALID [2022-04-07 17:33:18,976 INFO L290 TraceCheckUtils]: 17: Hoare triple {3365#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3365#false} is VALID [2022-04-07 17:33:18,976 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 17:33:18,977 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 17:33:24,851 INFO L290 TraceCheckUtils]: 17: Hoare triple {3365#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3365#false} is VALID [2022-04-07 17:33:24,851 INFO L290 TraceCheckUtils]: 16: Hoare triple {3430#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3365#false} is VALID [2022-04-07 17:33:24,851 INFO L290 TraceCheckUtils]: 15: Hoare triple {3426#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3430#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:33:24,853 INFO L272 TraceCheckUtils]: 14: Hoare triple {3373#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {3426#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:33:24,854 INFO L290 TraceCheckUtils]: 13: Hoare triple {3373#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {3373#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:33:24,854 INFO L290 TraceCheckUtils]: 12: Hoare triple {3373#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3373#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:33:24,855 INFO L290 TraceCheckUtils]: 11: Hoare triple {3373#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3373#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:33:24,856 INFO L290 TraceCheckUtils]: 10: Hoare triple {3373#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [101] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (= (+ (* (- 1) v_main_~y~0_3) v_main_~y~0_4 v_main_~z~0_3) v_main_~z~0_2) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3373#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:33:24,856 INFO L290 TraceCheckUtils]: 9: Hoare triple {3461#(or (and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))) (< 0 (mod main_~z~0 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {3373#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:33:24,857 INFO L290 TraceCheckUtils]: 8: Hoare triple {3371#(or (and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))) (< (* (div main_~y~0 4294967296) 4294967296) main_~y~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {3461#(or (and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))) (< 0 (mod main_~z~0 4294967296)))} is VALID [2022-04-07 17:33:24,858 INFO L290 TraceCheckUtils]: 7: Hoare triple {3370#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3371#(or (and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))) (< (* (div main_~y~0 4294967296) 4294967296) main_~y~0))} is VALID [2022-04-07 17:33:26,864 WARN L290 TraceCheckUtils]: 6: Hoare triple {3471#(forall ((aux_mod_aux_mod_v_main_~x~0_61_31_87 Int) (aux_div_v_main_~x~0_61_31 Int) (aux_div_aux_mod_v_main_~x~0_61_31_87 Int)) (or (>= aux_mod_aux_mod_v_main_~x~0_61_31_87 4294967296) (> 0 aux_mod_aux_mod_v_main_~x~0_61_31_87) (and (or (forall ((aux_div_v_main_~y~0_42_31 Int)) (or (<= (+ (* aux_div_v_main_~y~0_42_31 4294967296) 1) (+ main_~y~0 aux_mod_aux_mod_v_main_~x~0_61_31_87)) (< main_~y~0 (* aux_div_v_main_~y~0_42_31 4294967296)))) (not (= main_~x~0 (+ (* aux_div_aux_mod_v_main_~x~0_61_31_87 4294967296) aux_mod_aux_mod_v_main_~x~0_61_31_87)))) (or (forall ((aux_div_v_main_~y~0_42_31 Int)) (or (< (+ main_~y~0 main_~x~0) (+ (* aux_div_aux_mod_v_main_~x~0_61_31_87 4294967296) (* aux_div_v_main_~y~0_42_31 4294967296) aux_mod_aux_mod_v_main_~x~0_61_31_87)) (<= (+ (* aux_div_aux_mod_v_main_~x~0_61_31_87 4294967296) (* aux_div_v_main_~y~0_42_31 4294967296) 1) (+ main_~y~0 main_~x~0)))) (not (< (+ (* aux_div_aux_mod_v_main_~x~0_61_31_87 4294967296) aux_mod_aux_mod_v_main_~x~0_61_31_87) main_~x~0)) (not (< 0 (mod main_~x~0 4294967296))) (exists ((v_it_1 Int)) (and (<= (+ v_it_1 (* aux_div_aux_mod_v_main_~x~0_61_31_87 4294967296) aux_mod_aux_mod_v_main_~x~0_61_31_87 1) main_~x~0) (not (< 0 (mod (+ main_~x~0 (* v_it_1 4294967295)) 4294967296))) (<= 1 v_it_1))))) (< (+ (* aux_div_aux_mod_v_main_~x~0_61_31_87 4294967296) aux_mod_aux_mod_v_main_~x~0_61_31_87) (* aux_div_v_main_~x~0_61_31 4294967296)) (< (+ main_~n~0 (* aux_div_v_main_~x~0_61_31 4294967296)) (+ (* aux_div_aux_mod_v_main_~x~0_61_31_87 4294967296) (* (div main_~n~0 4294967296) 4294967296) aux_mod_aux_mod_v_main_~x~0_61_31_87 1))))} [94] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0) (= v_main_~y~0_6 v_main_~y~0_5)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_6 v_it_1 1) v_main_~y~0_5)))) (< v_main_~y~0_6 v_main_~y~0_5) (< 0 .cse0) (= v_main_~x~0_3 (+ v_main_~x~0_4 v_main_~y~0_6 (* (- 1) v_main_~y~0_5)))))) InVars {main_~y~0=v_main_~y~0_6, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3370#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is UNKNOWN [2022-04-07 17:33:26,894 INFO L290 TraceCheckUtils]: 5: Hoare triple {3364#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3471#(forall ((aux_mod_aux_mod_v_main_~x~0_61_31_87 Int) (aux_div_v_main_~x~0_61_31 Int) (aux_div_aux_mod_v_main_~x~0_61_31_87 Int)) (or (>= aux_mod_aux_mod_v_main_~x~0_61_31_87 4294967296) (> 0 aux_mod_aux_mod_v_main_~x~0_61_31_87) (and (or (forall ((aux_div_v_main_~y~0_42_31 Int)) (or (<= (+ (* aux_div_v_main_~y~0_42_31 4294967296) 1) (+ main_~y~0 aux_mod_aux_mod_v_main_~x~0_61_31_87)) (< main_~y~0 (* aux_div_v_main_~y~0_42_31 4294967296)))) (not (= main_~x~0 (+ (* aux_div_aux_mod_v_main_~x~0_61_31_87 4294967296) aux_mod_aux_mod_v_main_~x~0_61_31_87)))) (or (forall ((aux_div_v_main_~y~0_42_31 Int)) (or (< (+ main_~y~0 main_~x~0) (+ (* aux_div_aux_mod_v_main_~x~0_61_31_87 4294967296) (* aux_div_v_main_~y~0_42_31 4294967296) aux_mod_aux_mod_v_main_~x~0_61_31_87)) (<= (+ (* aux_div_aux_mod_v_main_~x~0_61_31_87 4294967296) (* aux_div_v_main_~y~0_42_31 4294967296) 1) (+ main_~y~0 main_~x~0)))) (not (< (+ (* aux_div_aux_mod_v_main_~x~0_61_31_87 4294967296) aux_mod_aux_mod_v_main_~x~0_61_31_87) main_~x~0)) (not (< 0 (mod main_~x~0 4294967296))) (exists ((v_it_1 Int)) (and (<= (+ v_it_1 (* aux_div_aux_mod_v_main_~x~0_61_31_87 4294967296) aux_mod_aux_mod_v_main_~x~0_61_31_87 1) main_~x~0) (not (< 0 (mod (+ main_~x~0 (* v_it_1 4294967295)) 4294967296))) (<= 1 v_it_1))))) (< (+ (* aux_div_aux_mod_v_main_~x~0_61_31_87 4294967296) aux_mod_aux_mod_v_main_~x~0_61_31_87) (* aux_div_v_main_~x~0_61_31 4294967296)) (< (+ main_~n~0 (* aux_div_v_main_~x~0_61_31 4294967296)) (+ (* aux_div_aux_mod_v_main_~x~0_61_31_87 4294967296) (* (div main_~n~0 4294967296) 4294967296) aux_mod_aux_mod_v_main_~x~0_61_31_87 1))))} is VALID [2022-04-07 17:33:26,894 INFO L272 TraceCheckUtils]: 4: Hoare triple {3364#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3364#true} is VALID [2022-04-07 17:33:26,894 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3364#true} {3364#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3364#true} is VALID [2022-04-07 17:33:26,895 INFO L290 TraceCheckUtils]: 2: Hoare triple {3364#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3364#true} is VALID [2022-04-07 17:33:26,895 INFO L290 TraceCheckUtils]: 1: Hoare triple {3364#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3364#true} is VALID [2022-04-07 17:33:26,895 INFO L272 TraceCheckUtils]: 0: Hoare triple {3364#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3364#true} is VALID [2022-04-07 17:33:26,895 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 17:33:26,895 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [383363097] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 17:33:26,895 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 17:33:26,895 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9, 9] total 18 [2022-04-07 17:33:26,895 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1156353183] [2022-04-07 17:33:26,895 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 17:33:26,896 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 1.6111111111111112) internal successors, (29), 15 states have internal predecessors, (29), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-07 17:33:26,896 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:33:26,896 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 18 states, 18 states have (on average 1.6111111111111112) internal successors, (29), 15 states have internal predecessors, (29), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:29,067 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 36 edges. 35 inductive. 0 not inductive. 1 times theorem prover too weak to decide inductivity. [2022-04-07 17:33:29,067 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 18 states [2022-04-07 17:33:29,068 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:33:29,068 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2022-04-07 17:33:29,068 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=64, Invalid=242, Unknown=0, NotChecked=0, Total=306 [2022-04-07 17:33:29,068 INFO L87 Difference]: Start difference. First operand 42 states and 64 transitions. Second operand has 18 states, 18 states have (on average 1.6111111111111112) internal successors, (29), 15 states have internal predecessors, (29), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:31,190 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:33:31,190 INFO L93 Difference]: Finished difference Result 63 states and 98 transitions. [2022-04-07 17:33:31,190 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2022-04-07 17:33:31,190 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 1.6111111111111112) internal successors, (29), 15 states have internal predecessors, (29), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-07 17:33:31,190 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:33:31,191 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 18 states have (on average 1.6111111111111112) internal successors, (29), 15 states have internal predecessors, (29), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:31,192 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 63 transitions. [2022-04-07 17:33:31,192 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 18 states have (on average 1.6111111111111112) internal successors, (29), 15 states have internal predecessors, (29), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:31,194 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 63 transitions. [2022-04-07 17:33:31,194 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 18 states and 63 transitions. [2022-04-07 17:33:33,366 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 63 edges. 62 inductive. 0 not inductive. 1 times theorem prover too weak to decide inductivity. [2022-04-07 17:33:33,367 INFO L225 Difference]: With dead ends: 63 [2022-04-07 17:33:33,367 INFO L226 Difference]: Without dead ends: 59 [2022-04-07 17:33:33,368 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 57 GetRequests, 26 SyntacticMatches, 6 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 186 ImplicationChecksByTransitivity, 6.6s TimeCoverageRelationStatistics Valid=164, Invalid=538, Unknown=0, NotChecked=0, Total=702 [2022-04-07 17:33:33,368 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 74 mSDsluCounter, 44 mSDsCounter, 0 mSdLazyCounter, 84 mSolverCounterSat, 14 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 74 SdHoareTripleChecker+Valid, 56 SdHoareTripleChecker+Invalid, 149 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 14 IncrementalHoareTripleChecker+Valid, 84 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 51 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 17:33:33,368 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [74 Valid, 56 Invalid, 149 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [14 Valid, 84 Invalid, 0 Unknown, 51 Unchecked, 0.1s Time] [2022-04-07 17:33:33,369 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59 states. [2022-04-07 17:33:33,370 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59 to 43. [2022-04-07 17:33:33,370 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:33:33,370 INFO L82 GeneralOperation]: Start isEquivalent. First operand 59 states. Second operand has 43 states, 38 states have (on average 1.631578947368421) internal successors, (62), 38 states have internal predecessors, (62), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:33,370 INFO L74 IsIncluded]: Start isIncluded. First operand 59 states. Second operand has 43 states, 38 states have (on average 1.631578947368421) internal successors, (62), 38 states have internal predecessors, (62), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:33,370 INFO L87 Difference]: Start difference. First operand 59 states. Second operand has 43 states, 38 states have (on average 1.631578947368421) internal successors, (62), 38 states have internal predecessors, (62), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:33,371 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:33:33,371 INFO L93 Difference]: Finished difference Result 59 states and 93 transitions. [2022-04-07 17:33:33,371 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 93 transitions. [2022-04-07 17:33:33,372 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:33:33,372 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:33:33,372 INFO L74 IsIncluded]: Start isIncluded. First operand has 43 states, 38 states have (on average 1.631578947368421) internal successors, (62), 38 states have internal predecessors, (62), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 59 states. [2022-04-07 17:33:33,372 INFO L87 Difference]: Start difference. First operand has 43 states, 38 states have (on average 1.631578947368421) internal successors, (62), 38 states have internal predecessors, (62), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 59 states. [2022-04-07 17:33:33,373 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:33:33,373 INFO L93 Difference]: Finished difference Result 59 states and 93 transitions. [2022-04-07 17:33:33,373 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 93 transitions. [2022-04-07 17:33:33,373 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:33:33,373 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:33:33,373 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:33:33,373 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:33:33,374 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 43 states, 38 states have (on average 1.631578947368421) internal successors, (62), 38 states have internal predecessors, (62), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:33,374 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 66 transitions. [2022-04-07 17:33:33,374 INFO L78 Accepts]: Start accepts. Automaton has 43 states and 66 transitions. Word has length 18 [2022-04-07 17:33:33,375 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:33:33,375 INFO L478 AbstractCegarLoop]: Abstraction has 43 states and 66 transitions. [2022-04-07 17:33:33,375 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 18 states, 18 states have (on average 1.6111111111111112) internal successors, (29), 15 states have internal predecessors, (29), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:33,375 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 66 transitions. [2022-04-07 17:33:33,375 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-04-07 17:33:33,375 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:33:33,375 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:33:33,395 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Ended with exit code 0 [2022-04-07 17:33:33,591 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable13 [2022-04-07 17:33:33,591 INFO L403 AbstractCegarLoop]: === Iteration 15 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:33:33,592 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:33:33,592 INFO L85 PathProgramCache]: Analyzing trace with hash 2104611596, now seen corresponding path program 1 times [2022-04-07 17:33:33,592 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:33:33,592 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1365491935] [2022-04-07 17:33:33,592 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:33:33,592 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:33:33,606 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_1.0))) (+ main_~x~0_5 .cse0 (* (- 4294967296) (div (+ main_~x~0_5 .cse0) 4294967296)))) 0)) [2022-04-07 17:33:33,606 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.1))) (+ main_~z~0_8 .cse0 (* (- 4294967296) (div (+ main_~z~0_8 .cse0) 4294967296)))) 0)) [2022-04-07 17:33:33,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:33:33,637 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_1.3))) (+ main_~x~0_5 .cse0 (* (- 4294967296) (div (+ main_~x~0_5 .cse0) 4294967296)))) 0)) [2022-04-07 17:33:33,648 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.4))) (+ main_~z~0_8 .cse0 (* (- 4294967296) (div (+ main_~z~0_8 .cse0) 4294967296)))) 0)) [2022-04-07 17:33:33,971 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:33:33,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:33:33,975 INFO L290 TraceCheckUtils]: 0: Hoare triple {3749#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3735#true} is VALID [2022-04-07 17:33:33,975 INFO L290 TraceCheckUtils]: 1: Hoare triple {3735#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3735#true} is VALID [2022-04-07 17:33:33,975 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {3735#true} {3735#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3735#true} is VALID [2022-04-07 17:33:33,976 INFO L272 TraceCheckUtils]: 0: Hoare triple {3735#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3749#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:33:33,976 INFO L290 TraceCheckUtils]: 1: Hoare triple {3749#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3735#true} is VALID [2022-04-07 17:33:33,976 INFO L290 TraceCheckUtils]: 2: Hoare triple {3735#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3735#true} is VALID [2022-04-07 17:33:33,976 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3735#true} {3735#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3735#true} is VALID [2022-04-07 17:33:33,976 INFO L272 TraceCheckUtils]: 4: Hoare triple {3735#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3735#true} is VALID [2022-04-07 17:33:33,977 INFO L290 TraceCheckUtils]: 5: Hoare triple {3735#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3740#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 17:33:33,990 INFO L290 TraceCheckUtils]: 6: Hoare triple {3740#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [94] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0) (= v_main_~y~0_6 v_main_~y~0_5)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_6 v_it_1 1) v_main_~y~0_5)))) (< v_main_~y~0_6 v_main_~y~0_5) (< 0 .cse0) (= v_main_~x~0_3 (+ v_main_~x~0_4 v_main_~y~0_6 (* (- 1) v_main_~y~0_5)))))) InVars {main_~y~0=v_main_~y~0_6, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3741#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ main_~y~0 main_~x~0) (+ (* 4294967296 (div (+ (- 1) main_~y~0 main_~x~0) 4294967296)) 4294967295)))} is VALID [2022-04-07 17:33:33,994 INFO L290 TraceCheckUtils]: 7: Hoare triple {3741#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ main_~y~0 main_~x~0) (+ (* 4294967296 (div (+ (- 1) main_~y~0 main_~x~0) 4294967296)) 4294967295)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3742#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ main_~y~0 (* 4294967296 (div main_~x~0 4294967296))) (+ 4294967295 (* (div (+ (- 1) main_~y~0 (* 4294967296 (div main_~x~0 4294967296))) 4294967296) 4294967296))))} is VALID [2022-04-07 17:33:33,996 INFO L290 TraceCheckUtils]: 8: Hoare triple {3742#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ main_~y~0 (* 4294967296 (div main_~x~0 4294967296))) (+ 4294967295 (* (div (+ (- 1) main_~y~0 (* 4294967296 (div main_~x~0 4294967296))) 4294967296) 4294967296))))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {3743#(and (= (+ main_~y~0 (* (- 1) main_~z~0)) 0) (or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (< (* (div main_~z~0 4294967296) 4294967296) main_~z~0)))} is VALID [2022-04-07 17:33:33,997 INFO L290 TraceCheckUtils]: 9: Hoare triple {3743#(and (= (+ main_~y~0 (* (- 1) main_~z~0)) 0) (or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (< (* (div main_~z~0 4294967296) 4294967296) main_~z~0)))} [98] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_8 4294967296))) (or (and (= v_main_~x~0_9 v_main_~x~0_8) (<= .cse0 0) (= v_main_~z~0_8 v_main_~z~0_7) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)) (and (forall ((v_it_2 Int)) (or (< 0 (mod (+ v_main_~z~0_8 (* v_it_2 4294967295)) 4294967296)) (not (<= (+ v_main_~z~0_7 v_it_2 1) v_main_~z~0_8)) (not (<= 1 v_it_2)))) (= (+ v_main_~x~0_9 v_main_~z~0_8 (* (- 1) v_main_~z~0_7)) v_main_~x~0_8) (< 0 .cse0) (< v_main_~z~0_7 v_main_~z~0_8)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_8, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3744#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:33:33,998 INFO L290 TraceCheckUtils]: 10: Hoare triple {3744#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {3744#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:33:33,999 INFO L290 TraceCheckUtils]: 11: Hoare triple {3744#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3745#(< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))} is VALID [2022-04-07 17:33:34,003 INFO L290 TraceCheckUtils]: 12: Hoare triple {3745#(< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3746#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:33:34,004 INFO L290 TraceCheckUtils]: 13: Hoare triple {3746#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {3746#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:33:34,005 INFO L272 TraceCheckUtils]: 14: Hoare triple {3746#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {3747#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:33:34,005 INFO L290 TraceCheckUtils]: 15: Hoare triple {3747#(not (= |__VERIFIER_assert_#in~cond| 0))} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3748#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:33:34,005 INFO L290 TraceCheckUtils]: 16: Hoare triple {3748#(not (= __VERIFIER_assert_~cond 0))} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3736#false} is VALID [2022-04-07 17:33:34,006 INFO L290 TraceCheckUtils]: 17: Hoare triple {3736#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3736#false} is VALID [2022-04-07 17:33:34,006 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:33:34,006 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:33:34,006 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1365491935] [2022-04-07 17:33:34,006 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1365491935] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:33:34,006 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [550008583] [2022-04-07 17:33:34,006 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:33:34,006 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:33:34,006 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:33:34,035 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:33:34,036 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2022-04-07 17:33:34,099 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:33:34,099 INFO L263 TraceCheckSpWp]: Trace formula consists of 63 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-07 17:33:34,133 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:33:34,134 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:33:37,812 WARN L319 FreeRefinementEngine]: Global settings require throwing the following exception [2022-04-07 17:33:37,829 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Ended with exit code 0 [2022-04-07 17:33:38,012 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable14 [2022-04-07 17:33:38,013 FATAL L? ?]: The Plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction has thrown an exception: java.lang.AssertionError: not dual finite connective at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.tryToPushOverDualFiniteConnective2(QuantifierPusher.java:374) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.tryToPushOverDualFiniteConnective(QuantifierPusher.java:355) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.QuantifierPushTermWalker.convert(QuantifierPushTermWalker.java:172) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.QuantifierPushTermWalker.convert(QuantifierPushTermWalker.java:1) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.TermContextTransformationEngine$ApplicationTermTask.doStep(TermContextTransformationEngine.java:169) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.TermContextTransformationEngine.transform(TermContextTransformationEngine.java:77) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.TermContextTransformationEngine.transform(TermContextTransformationEngine.java:61) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.QuantifierPushTermWalker.eliminate(QuantifierPushTermWalker.java:261) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.tryToPushOverDualFiniteConnective2(QuantifierPusher.java:496) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.tryToPushOverDualFiniteConnective(QuantifierPusher.java:355) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.QuantifierPushTermWalker.convert(QuantifierPushTermWalker.java:172) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.QuantifierPushTermWalker.convert(QuantifierPushTermWalker.java:1) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.TermContextTransformationEngine.transform(TermContextTransformationEngine.java:65) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.TermContextTransformationEngine.transform(TermContextTransformationEngine.java:61) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.QuantifierPushTermWalker.eliminate(QuantifierPushTermWalker.java:261) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.doit(QuantifierPusher.java:635) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.tryToPushOverDualFiniteConnective2(QuantifierPusher.java:446) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.tryToPushOverDualFiniteConnective(QuantifierPusher.java:355) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.QuantifierPushTermWalker.convert(QuantifierPushTermWalker.java:172) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.QuantifierPushTermWalker.convert(QuantifierPushTermWalker.java:1) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.TermContextTransformationEngine.transform(TermContextTransformationEngine.java:65) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.TermContextTransformationEngine.transform(TermContextTransformationEngine.java:61) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.QuantifierPushTermWalker.eliminate(QuantifierPushTermWalker.java:261) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.QuantifierPushTermWalker.eliminate(QuantifierPushTermWalker.java:247) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.PartialQuantifierElimination.eliminate(PartialQuantifierElimination.java:92) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.predicates.IterativePredicateTransformer$QuantifierEliminationPostprocessor.postprocess(IterativePredicateTransformer.java:238) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.predicates.IterativePredicateTransformer.applyPostprocessors(IterativePredicateTransformer.java:420) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.predicates.IterativePredicateTransformer.computeStrongestPostconditionSequence(IterativePredicateTransformer.java:199) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp.computeInterpolantsUsingUnsatCore(TraceCheckSpWp.java:299) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp.computeInterpolants(TraceCheckSpWp.java:185) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp.(TraceCheckSpWp.java:163) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleSpWp.construct(IpTcStrategyModuleSpWp.java:108) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleSpWp.construct(IpTcStrategyModuleSpWp.java:1) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getOrConstruct(IpTcStrategyModuleBase.java:101) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getInterpolantComputationStatus(IpTcStrategyModuleBase.java:77) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.tryExecuteInterpolantGenerator(AutomatonFreeRefinementEngine.java:266) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.generateProof(AutomatonFreeRefinementEngine.java:147) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.executeStrategy(AutomatonFreeRefinementEngine.java:137) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.(AutomatonFreeRefinementEngine.java:85) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:82) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:595) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:414) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.startCegar(AbstractCegarLoop.java:349) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.runCegar(AbstractCegarLoop.java:331) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.CegarLoopUtils.getCegarLoopResult(CegarLoopUtils.java:56) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.executeCegarLoop(TraceAbstractionStarter.java:412) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseProgram(TraceAbstractionStarter.java:302) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseSequentialProgram(TraceAbstractionStarter.java:262) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:175) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:154) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:123) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:320) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:63) [2022-04-07 17:33:38,017 INFO L158 Benchmark]: Toolchain (without parser) took 315008.25ms. Allocated memory was 175.1MB in the beginning and 241.2MB in the end (delta: 66.1MB). Free memory was 120.0MB in the beginning and 178.7MB in the end (delta: -58.7MB). Peak memory consumption was 120.2MB. Max. memory is 8.0GB. [2022-04-07 17:33:38,017 INFO L158 Benchmark]: CDTParser took 0.14ms. Allocated memory is still 175.1MB. Free memory is still 135.8MB. There was no memory consumed. Max. memory is 8.0GB. [2022-04-07 17:33:38,017 INFO L158 Benchmark]: CACSL2BoogieTranslator took 243.96ms. Allocated memory was 175.1MB in the beginning and 241.2MB in the end (delta: 66.1MB). Free memory was 119.8MB in the beginning and 213.4MB in the end (delta: -93.6MB). Peak memory consumption was 14.0MB. Max. memory is 8.0GB. [2022-04-07 17:33:38,017 INFO L158 Benchmark]: Boogie Preprocessor took 36.11ms. Allocated memory is still 241.2MB. Free memory was 213.4MB in the beginning and 211.9MB in the end (delta: 1.5MB). Peak memory consumption was 1.0MB. Max. memory is 8.0GB. [2022-04-07 17:33:38,018 INFO L158 Benchmark]: RCFGBuilder took 328.03ms. Allocated memory is still 241.2MB. Free memory was 211.9MB in the beginning and 198.3MB in the end (delta: 13.6MB). Peak memory consumption was 13.6MB. Max. memory is 8.0GB. [2022-04-07 17:33:38,018 INFO L158 Benchmark]: IcfgTransformer took 1745.42ms. Allocated memory is still 241.2MB. Free memory was 198.3MB in the beginning and 103.4MB in the end (delta: 94.9MB). Peak memory consumption was 95.4MB. Max. memory is 8.0GB. [2022-04-07 17:33:38,018 INFO L158 Benchmark]: TraceAbstraction took 312649.76ms. Allocated memory is still 241.2MB. Free memory was 102.8MB in the beginning and 178.7MB in the end (delta: -75.9MB). Peak memory consumption was 38.5MB. Max. memory is 8.0GB. [2022-04-07 17:33:38,019 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from IcfgTransformer: - StatisticsResult: Jordan loop acceleration statistics 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult - StatisticsResult: Jordan loop acceleration statistics 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult - StatisticsResult: Jordan loop acceleration statistics 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult - StatisticsResult: Jordan loop acceleration statistics 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult - StatisticsResult: Jordan loop acceleration statistics 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult * Results from de.uni_freiburg.informatik.ultimate.core: - AssertionsEnabledResult: Assertions are enabled Assertions are enabled - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.14ms. Allocated memory is still 175.1MB. Free memory is still 135.8MB. There was no memory consumed. Max. memory is 8.0GB. * CACSL2BoogieTranslator took 243.96ms. Allocated memory was 175.1MB in the beginning and 241.2MB in the end (delta: 66.1MB). Free memory was 119.8MB in the beginning and 213.4MB in the end (delta: -93.6MB). Peak memory consumption was 14.0MB. Max. memory is 8.0GB. * Boogie Preprocessor took 36.11ms. Allocated memory is still 241.2MB. Free memory was 213.4MB in the beginning and 211.9MB in the end (delta: 1.5MB). Peak memory consumption was 1.0MB. Max. memory is 8.0GB. * RCFGBuilder took 328.03ms. Allocated memory is still 241.2MB. Free memory was 211.9MB in the beginning and 198.3MB in the end (delta: 13.6MB). Peak memory consumption was 13.6MB. Max. memory is 8.0GB. * IcfgTransformer took 1745.42ms. Allocated memory is still 241.2MB. Free memory was 198.3MB in the beginning and 103.4MB in the end (delta: 94.9MB). Peak memory consumption was 95.4MB. Max. memory is 8.0GB. * TraceAbstraction took 312649.76ms. Allocated memory is still 241.2MB. Free memory was 102.8MB in the beginning and 178.7MB in the end (delta: -75.9MB). Peak memory consumption was 38.5MB. Max. memory is 8.0GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - ExceptionOrErrorResult: AssertionError: not dual finite connective de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: AssertionError: not dual finite connective: de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.tryToPushOverDualFiniteConnective2(QuantifierPusher.java:374) RESULT: Ultimate could not prove your program: Toolchain returned no result. [2022-04-07 17:33:38,185 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request...