/usr/bin/java -ea -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --core.log.level.for.class de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN -tc ../../../trunk/examples/toolchains/AutomizerCTransformed.xml -s ../../../trunk/examples/settings/automizer/LoopAccelerationJordanC.epf -i ../../../trunk/examples/svcomp/loops-crafted-1/in-de52.c -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-34549b5 [2022-04-07 17:32:39,219 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-04-07 17:32:39,221 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-04-07 17:32:39,253 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... 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[2022-04-07 17:32:39,259 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-04-07 17:32:39,260 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-04-07 17:32:39,260 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-04-07 17:32:39,261 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-04-07 17:32:39,261 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-04-07 17:32:39,262 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-04-07 17:32:39,263 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-04-07 17:32:39,264 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-04-07 17:32:39,267 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-04-07 17:32:39,268 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-04-07 17:32:39,269 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-04-07 17:32:39,270 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-04-07 17:32:39,270 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-04-07 17:32:39,272 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2022-04-07 17:32:39,277 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-04-07 17:32:39,278 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-04-07 17:32:39,278 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-04-07 17:32:39,279 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/automizer/LoopAccelerationJordanC.epf [2022-04-07 17:32:39,285 INFO L113 SettingsManager]: Loading preferences was successful [2022-04-07 17:32:39,285 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-04-07 17:32:39,286 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-04-07 17:32:39,287 INFO L138 SettingsManager]: * sizeof long=4 [2022-04-07 17:32:39,287 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-04-07 17:32:39,287 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-04-07 17:32:39,287 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-04-07 17:32:39,287 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-04-07 17:32:39,287 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-04-07 17:32:39,288 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-04-07 17:32:39,288 INFO L138 SettingsManager]: * sizeof long double=12 [2022-04-07 17:32:39,288 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-04-07 17:32:39,288 INFO L138 SettingsManager]: * Use constant arrays=true [2022-04-07 17:32:39,288 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-04-07 17:32:39,288 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-04-07 17:32:39,289 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-04-07 17:32:39,289 INFO L138 SettingsManager]: * To the following directory=./dump/ [2022-04-07 17:32:39,289 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-04-07 17:32:39,289 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-07 17:32:39,289 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-04-07 17:32:39,289 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-04-07 17:32:39,290 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-04-07 17:32:39,290 INFO L138 SettingsManager]: * TransformationType=LOOP_ACCELERATION_JORDAN WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.core: Log level for class -> de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN; [2022-04-07 17:32:39,468 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-04-07 17:32:39,484 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-04-07 17:32:39,486 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-04-07 17:32:39,487 INFO L271 PluginConnector]: Initializing CDTParser... [2022-04-07 17:32:39,488 INFO L275 PluginConnector]: CDTParser initialized [2022-04-07 17:32:39,489 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loops-crafted-1/in-de52.c [2022-04-07 17:32:39,537 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/8085124ca/fcdd16491bf94331b2afe11cd1e71a78/FLAG61f2362db [2022-04-07 17:32:39,836 INFO L306 CDTParser]: Found 1 translation units. [2022-04-07 17:32:39,836 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de52.c [2022-04-07 17:32:39,840 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/8085124ca/fcdd16491bf94331b2afe11cd1e71a78/FLAG61f2362db [2022-04-07 17:32:40,272 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/8085124ca/fcdd16491bf94331b2afe11cd1e71a78 [2022-04-07 17:32:40,275 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-04-07 17:32:40,288 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2022-04-07 17:32:40,289 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-04-07 17:32:40,290 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-04-07 17:32:40,292 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-04-07 17:32:40,293 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.04 05:32:40" (1/1) ... [2022-04-07 17:32:40,294 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7fa24bec and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:32:40, skipping insertion in model container [2022-04-07 17:32:40,294 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.04 05:32:40" (1/1) ... [2022-04-07 17:32:40,298 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-04-07 17:32:40,312 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-04-07 17:32:40,447 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de52.c[368,381] [2022-04-07 17:32:40,474 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-07 17:32:40,479 INFO L203 MainTranslator]: Completed pre-run [2022-04-07 17:32:40,501 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de52.c[368,381] [2022-04-07 17:32:40,505 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-07 17:32:40,515 INFO L208 MainTranslator]: Completed translation [2022-04-07 17:32:40,522 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:32:40 WrapperNode [2022-04-07 17:32:40,522 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-04-07 17:32:40,523 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-04-07 17:32:40,523 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-04-07 17:32:40,524 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-04-07 17:32:40,533 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:32:40" (1/1) ... [2022-04-07 17:32:40,533 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:32:40" (1/1) ... [2022-04-07 17:32:40,538 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:32:40" (1/1) ... [2022-04-07 17:32:40,538 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:32:40" (1/1) ... [2022-04-07 17:32:40,542 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:32:40" (1/1) ... [2022-04-07 17:32:40,546 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:32:40" (1/1) ... [2022-04-07 17:32:40,557 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:32:40" (1/1) ... [2022-04-07 17:32:40,559 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-04-07 17:32:40,560 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-04-07 17:32:40,561 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-04-07 17:32:40,561 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-04-07 17:32:40,562 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:32:40" (1/1) ... [2022-04-07 17:32:40,567 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-07 17:32:40,580 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:32:40,602 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-04-07 17:32:40,607 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-04-07 17:32:40,628 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2022-04-07 17:32:40,628 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-04-07 17:32:40,628 INFO L138 BoogieDeclarations]: Found implementation of procedure reach_error [2022-04-07 17:32:40,628 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2022-04-07 17:32:40,628 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2022-04-07 17:32:40,629 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2022-04-07 17:32:40,629 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_fail [2022-04-07 17:32:40,629 INFO L130 BoogieDeclarations]: Found specification of procedure reach_error [2022-04-07 17:32:40,629 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-04-07 17:32:40,629 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_uint [2022-04-07 17:32:40,629 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2022-04-07 17:32:40,629 INFO L130 BoogieDeclarations]: Found specification of procedure main [2022-04-07 17:32:40,629 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2022-04-07 17:32:40,629 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-04-07 17:32:40,629 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-04-07 17:32:40,630 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-04-07 17:32:40,630 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-04-07 17:32:40,630 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-04-07 17:32:40,673 INFO L234 CfgBuilder]: Building ICFG [2022-04-07 17:32:40,674 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-04-07 17:32:40,863 INFO L275 CfgBuilder]: Performing block encoding [2022-04-07 17:32:40,868 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-04-07 17:32:40,868 INFO L299 CfgBuilder]: Removed 5 assume(true) statements. [2022-04-07 17:32:40,883 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.04 05:32:40 BoogieIcfgContainer [2022-04-07 17:32:40,884 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-04-07 17:32:40,884 INFO L113 PluginConnector]: ------------------------IcfgTransformer---------------------------- [2022-04-07 17:32:40,884 INFO L271 PluginConnector]: Initializing IcfgTransformer... [2022-04-07 17:32:40,885 INFO L275 PluginConnector]: IcfgTransformer initialized [2022-04-07 17:32:40,888 INFO L185 PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.04 05:32:40" (1/1) ... [2022-04-07 17:32:40,889 INFO L168 ansformationObserver]: Applying ICFG transformation LOOP_ACCELERATION_JORDAN [2022-04-07 17:32:41,373 INFO L89 elerationTransformer]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-07 17:32:41,373 INFO L91 elerationTransformer]: Accelerated Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] to Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0) (= v_main_~y~0_6 v_main_~y~0_5)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_6 v_it_1 1) v_main_~y~0_5)))) (< v_main_~y~0_6 v_main_~y~0_5) (< 0 .cse0) (= v_main_~x~0_3 (+ v_main_~x~0_4 v_main_~y~0_6 (* (- 1) v_main_~y~0_5)))))) InVars {main_~y~0=v_main_~y~0_6, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] [2022-04-07 17:32:43,841 INFO L89 elerationTransformer]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-07 17:32:43,841 INFO L91 elerationTransformer]: Accelerated Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_~z~0=v_main_~z~0_7, main_#t~post8=|v_main_#t~post8_1|, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] to Formula: (let ((.cse0 (mod v_main_~z~0_8 4294967296))) (or (and (= v_main_~x~0_9 v_main_~x~0_8) (<= .cse0 0) (= v_main_~z~0_8 v_main_~z~0_7) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)) (and (forall ((v_it_2 Int)) (or (< 0 (mod (+ v_main_~z~0_8 (* v_it_2 4294967295)) 4294967296)) (not (<= (+ v_main_~z~0_7 v_it_2 1) v_main_~z~0_8)) (not (<= 1 v_it_2)))) (= (+ v_main_~x~0_9 v_main_~z~0_8 (* (- 1) v_main_~z~0_7)) v_main_~x~0_8) (< 0 .cse0) (< v_main_~z~0_7 v_main_~z~0_8)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_8, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] [2022-04-07 17:32:44,086 INFO L89 elerationTransformer]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-07 17:32:44,086 INFO L91 elerationTransformer]: Accelerated Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~z~0=v_main_~z~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post10=|v_main_#t~post10_1|, main_~z~0=v_main_~z~0_2, main_~y~0=v_main_~y~0_3, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] to Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (= (+ (* (- 1) v_main_~y~0_3) v_main_~y~0_4 v_main_~z~0_3) v_main_~z~0_2) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] [2022-04-07 17:32:44,362 INFO L89 elerationTransformer]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-07 17:32:44,363 INFO L91 elerationTransformer]: Accelerated Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_7, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] to Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (< v_main_~x~0_6 v_main_~x~0_7) (= (+ (* (- 1) v_main_~x~0_6) v_main_~x~0_7 v_main_~y~0_8) v_main_~y~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_8 v_main_~y~0_7) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_8, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] [2022-04-07 17:32:44,632 INFO L89 elerationTransformer]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-07 17:32:44,632 INFO L91 elerationTransformer]: Accelerated Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~z~0=v_main_~z~0_10, main_~y~0=v_main_~y~0_11} OutVars{main_~z~0=v_main_~z~0_9, main_~y~0=v_main_~y~0_10, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] to Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~y~0_10 (+ v_main_~y~0_11 v_main_~z~0_9 (* (- 1) v_main_~z~0_10))) (< 0 .cse0) (forall ((v_it_5 Int)) (or (not (<= (+ v_main_~z~0_9 v_it_5 1) v_main_~z~0_10)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)))) (< v_main_~z~0_9 v_main_~z~0_10)) (and (<= .cse0 0) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (= v_main_~y~0_11 v_main_~y~0_10) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] [2022-04-07 17:32:44,635 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 07.04 05:32:44 BasicIcfg [2022-04-07 17:32:44,635 INFO L132 PluginConnector]: ------------------------ END IcfgTransformer---------------------------- [2022-04-07 17:32:44,636 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-04-07 17:32:44,636 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-04-07 17:32:44,640 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-04-07 17:32:44,640 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.04 05:32:40" (1/4) ... [2022-04-07 17:32:44,641 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@44e3c319 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.04 05:32:44, skipping insertion in model container [2022-04-07 17:32:44,641 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:32:40" (2/4) ... [2022-04-07 17:32:44,642 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@44e3c319 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.04 05:32:44, skipping insertion in model container [2022-04-07 17:32:44,642 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.04 05:32:40" (3/4) ... [2022-04-07 17:32:44,644 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@44e3c319 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.04 05:32:44, skipping insertion in model container [2022-04-07 17:32:44,644 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 07.04 05:32:44" (4/4) ... [2022-04-07 17:32:44,645 INFO L111 eAbstractionObserver]: Analyzing ICFG in-de52.cJordan [2022-04-07 17:32:44,649 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:ForwardPredicates Determinization: PREDICATE_ABSTRACTION [2022-04-07 17:32:44,650 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-04-07 17:32:44,683 INFO L339 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-04-07 17:32:44,689 INFO L340 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=ForwardPredicates, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=false, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=All, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP [2022-04-07 17:32:44,690 INFO L341 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-04-07 17:32:44,704 INFO L276 IsEmpty]: Start isEmpty. Operand has 24 states, 16 states have (on average 1.75) internal successors, (28), 17 states have internal predecessors, (28), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 17:32:44,708 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-04-07 17:32:44,708 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:32:44,709 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:32:44,709 INFO L403 AbstractCegarLoop]: === Iteration 1 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:32:44,712 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:32:44,712 INFO L85 PathProgramCache]: Analyzing trace with hash 702671213, now seen corresponding path program 1 times [2022-04-07 17:32:44,719 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:32:44,719 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [168725240] [2022-04-07 17:32:44,719 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:32:44,720 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:32:44,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:32:44,832 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:32:44,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:32:44,844 INFO L290 TraceCheckUtils]: 0: Hoare triple {32#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {27#true} is VALID [2022-04-07 17:32:44,844 INFO L290 TraceCheckUtils]: 1: Hoare triple {27#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {27#true} is VALID [2022-04-07 17:32:44,844 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {27#true} {27#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {27#true} is VALID [2022-04-07 17:32:44,846 INFO L272 TraceCheckUtils]: 0: Hoare triple {27#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:32:44,846 INFO L290 TraceCheckUtils]: 1: Hoare triple {32#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {27#true} is VALID [2022-04-07 17:32:44,846 INFO L290 TraceCheckUtils]: 2: Hoare triple {27#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {27#true} is VALID [2022-04-07 17:32:44,846 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {27#true} {27#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {27#true} is VALID [2022-04-07 17:32:44,846 INFO L272 TraceCheckUtils]: 4: Hoare triple {27#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {27#true} is VALID [2022-04-07 17:32:44,847 INFO L290 TraceCheckUtils]: 5: Hoare triple {27#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {27#true} is VALID [2022-04-07 17:32:44,847 INFO L290 TraceCheckUtils]: 6: Hoare triple {27#true} [92] L16-2-->L16-3: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {28#false} is VALID [2022-04-07 17:32:44,847 INFO L290 TraceCheckUtils]: 7: Hoare triple {28#false} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {28#false} is VALID [2022-04-07 17:32:44,847 INFO L290 TraceCheckUtils]: 8: Hoare triple {28#false} [96] L23-2-->L29-1: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {28#false} is VALID [2022-04-07 17:32:44,848 INFO L290 TraceCheckUtils]: 9: Hoare triple {28#false} [99] L29-1-->L35-1: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {28#false} is VALID [2022-04-07 17:32:44,848 INFO L290 TraceCheckUtils]: 10: Hoare triple {28#false} [102] L35-1-->L41-1: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {28#false} is VALID [2022-04-07 17:32:44,848 INFO L290 TraceCheckUtils]: 11: Hoare triple {28#false} [105] L41-1-->L41-2: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {28#false} is VALID [2022-04-07 17:32:44,848 INFO L272 TraceCheckUtils]: 12: Hoare triple {28#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {28#false} is VALID [2022-04-07 17:32:44,848 INFO L290 TraceCheckUtils]: 13: Hoare triple {28#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {28#false} is VALID [2022-04-07 17:32:44,848 INFO L290 TraceCheckUtils]: 14: Hoare triple {28#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {28#false} is VALID [2022-04-07 17:32:44,849 INFO L290 TraceCheckUtils]: 15: Hoare triple {28#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28#false} is VALID [2022-04-07 17:32:44,849 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:32:44,849 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:32:44,849 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [168725240] [2022-04-07 17:32:44,850 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [168725240] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 17:32:44,850 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 17:32:44,850 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-07 17:32:44,851 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1755974672] [2022-04-07 17:32:44,852 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 17:32:44,870 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 4.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-07 17:32:44,872 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:32:44,874 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 4.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:32:44,886 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 16 edges. 16 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:32:44,886 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-07 17:32:44,886 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:32:44,899 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-07 17:32:44,900 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-07 17:32:44,902 INFO L87 Difference]: Start difference. First operand has 24 states, 16 states have (on average 1.75) internal successors, (28), 17 states have internal predecessors, (28), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 3 states, 3 states have (on average 4.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:32:44,998 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:32:44,998 INFO L93 Difference]: Finished difference Result 24 states and 28 transitions. [2022-04-07 17:32:44,998 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-07 17:32:44,998 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 4.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-07 17:32:44,999 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:32:44,999 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 4.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:32:45,005 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 34 transitions. [2022-04-07 17:32:45,005 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 4.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:32:45,007 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 34 transitions. [2022-04-07 17:32:45,007 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 34 transitions. [2022-04-07 17:32:45,042 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 34 edges. 34 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:32:45,047 INFO L225 Difference]: With dead ends: 24 [2022-04-07 17:32:45,047 INFO L226 Difference]: Without dead ends: 17 [2022-04-07 17:32:45,048 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-07 17:32:45,050 INFO L913 BasicCegarLoop]: 27 mSDtfsCounter, 19 mSDsluCounter, 3 mSDsCounter, 0 mSdLazyCounter, 3 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 20 SdHoareTripleChecker+Valid, 30 SdHoareTripleChecker+Invalid, 5 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 3 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 17:32:45,051 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [20 Valid, 30 Invalid, 5 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 3 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 17:32:45,062 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17 states. [2022-04-07 17:32:45,068 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17 to 17. [2022-04-07 17:32:45,068 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:32:45,069 INFO L82 GeneralOperation]: Start isEquivalent. First operand 17 states. Second operand has 17 states, 12 states have (on average 1.4166666666666667) internal successors, (17), 12 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:32:45,069 INFO L74 IsIncluded]: Start isIncluded. First operand 17 states. Second operand has 17 states, 12 states have (on average 1.4166666666666667) internal successors, (17), 12 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:32:45,069 INFO L87 Difference]: Start difference. First operand 17 states. Second operand has 17 states, 12 states have (on average 1.4166666666666667) internal successors, (17), 12 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:32:45,071 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:32:45,071 INFO L93 Difference]: Finished difference Result 17 states and 21 transitions. [2022-04-07 17:32:45,071 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 21 transitions. [2022-04-07 17:32:45,072 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:32:45,072 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:32:45,072 INFO L74 IsIncluded]: Start isIncluded. First operand has 17 states, 12 states have (on average 1.4166666666666667) internal successors, (17), 12 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 17 states. [2022-04-07 17:32:45,072 INFO L87 Difference]: Start difference. First operand has 17 states, 12 states have (on average 1.4166666666666667) internal successors, (17), 12 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 17 states. [2022-04-07 17:32:45,074 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:32:45,074 INFO L93 Difference]: Finished difference Result 17 states and 21 transitions. [2022-04-07 17:32:45,074 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 21 transitions. [2022-04-07 17:32:45,074 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:32:45,075 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:32:45,075 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:32:45,075 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:32:45,075 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 12 states have (on average 1.4166666666666667) internal successors, (17), 12 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:32:45,076 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 21 transitions. [2022-04-07 17:32:45,077 INFO L78 Accepts]: Start accepts. Automaton has 17 states and 21 transitions. Word has length 16 [2022-04-07 17:32:45,077 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:32:45,077 INFO L478 AbstractCegarLoop]: Abstraction has 17 states and 21 transitions. [2022-04-07 17:32:45,077 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 4.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:32:45,078 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 21 transitions. [2022-04-07 17:32:45,078 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-04-07 17:32:45,078 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:32:45,078 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:32:45,078 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-04-07 17:32:45,078 INFO L403 AbstractCegarLoop]: === Iteration 2 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:32:45,079 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:32:45,079 INFO L85 PathProgramCache]: Analyzing trace with hash -1128942900, now seen corresponding path program 1 times [2022-04-07 17:32:45,079 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:32:45,079 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1880322110] [2022-04-07 17:32:45,079 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:32:45,079 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:32:45,097 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:32:45,179 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:32:45,182 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:32:45,189 INFO L290 TraceCheckUtils]: 0: Hoare triple {118#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {110#true} is VALID [2022-04-07 17:32:45,189 INFO L290 TraceCheckUtils]: 1: Hoare triple {110#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {110#true} is VALID [2022-04-07 17:32:45,190 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {110#true} {110#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {110#true} is VALID [2022-04-07 17:32:45,190 INFO L272 TraceCheckUtils]: 0: Hoare triple {110#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {118#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:32:45,190 INFO L290 TraceCheckUtils]: 1: Hoare triple {118#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {110#true} is VALID [2022-04-07 17:32:45,191 INFO L290 TraceCheckUtils]: 2: Hoare triple {110#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {110#true} is VALID [2022-04-07 17:32:45,191 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {110#true} {110#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {110#true} is VALID [2022-04-07 17:32:45,191 INFO L272 TraceCheckUtils]: 4: Hoare triple {110#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {110#true} is VALID [2022-04-07 17:32:45,191 INFO L290 TraceCheckUtils]: 5: Hoare triple {110#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {110#true} is VALID [2022-04-07 17:32:45,191 INFO L290 TraceCheckUtils]: 6: Hoare triple {110#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {110#true} is VALID [2022-04-07 17:32:45,191 INFO L290 TraceCheckUtils]: 7: Hoare triple {110#true} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {110#true} is VALID [2022-04-07 17:32:45,192 INFO L290 TraceCheckUtils]: 8: Hoare triple {110#true} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {110#true} is VALID [2022-04-07 17:32:45,192 INFO L290 TraceCheckUtils]: 9: Hoare triple {110#true} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {115#(= (+ main_~y~0 (* (div main_~y~0 4294967296) (- 4294967296))) 0)} is VALID [2022-04-07 17:32:45,193 INFO L290 TraceCheckUtils]: 10: Hoare triple {115#(= (+ main_~y~0 (* (div main_~y~0 4294967296) (- 4294967296))) 0)} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {115#(= (+ main_~y~0 (* (div main_~y~0 4294967296) (- 4294967296))) 0)} is VALID [2022-04-07 17:32:45,193 INFO L290 TraceCheckUtils]: 11: Hoare triple {115#(= (+ main_~y~0 (* (div main_~y~0 4294967296) (- 4294967296))) 0)} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {115#(= (+ main_~y~0 (* (div main_~y~0 4294967296) (- 4294967296))) 0)} is VALID [2022-04-07 17:32:45,194 INFO L272 TraceCheckUtils]: 12: Hoare triple {115#(= (+ main_~y~0 (* (div main_~y~0 4294967296) (- 4294967296))) 0)} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {116#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:32:45,194 INFO L290 TraceCheckUtils]: 13: Hoare triple {116#(not (= |__VERIFIER_assert_#in~cond| 0))} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {117#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:32:45,195 INFO L290 TraceCheckUtils]: 14: Hoare triple {117#(not (= __VERIFIER_assert_~cond 0))} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {111#false} is VALID [2022-04-07 17:32:45,195 INFO L290 TraceCheckUtils]: 15: Hoare triple {111#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {111#false} is VALID [2022-04-07 17:32:45,195 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:32:45,196 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:32:45,196 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1880322110] [2022-04-07 17:32:45,196 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1880322110] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 17:32:45,196 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 17:32:45,196 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-04-07 17:32:45,196 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1862428109] [2022-04-07 17:32:45,196 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 17:32:45,197 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 2.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-07 17:32:45,197 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:32:45,197 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 6 states, 6 states have (on average 2.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:32:45,210 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 16 edges. 16 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:32:45,210 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-04-07 17:32:45,210 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:32:45,211 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-04-07 17:32:45,211 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2022-04-07 17:32:45,211 INFO L87 Difference]: Start difference. First operand 17 states and 21 transitions. Second operand has 6 states, 6 states have (on average 2.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:32:45,462 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:32:45,463 INFO L93 Difference]: Finished difference Result 28 states and 38 transitions. [2022-04-07 17:32:45,463 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-04-07 17:32:45,464 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 2.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-07 17:32:45,464 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:32:45,464 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 2.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:32:45,465 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 39 transitions. [2022-04-07 17:32:45,465 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 2.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:32:45,467 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 39 transitions. [2022-04-07 17:32:45,467 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 6 states and 39 transitions. [2022-04-07 17:32:45,503 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 39 edges. 39 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:32:45,504 INFO L225 Difference]: With dead ends: 28 [2022-04-07 17:32:45,504 INFO L226 Difference]: Without dead ends: 25 [2022-04-07 17:32:45,505 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=23, Invalid=49, Unknown=0, NotChecked=0, Total=72 [2022-04-07 17:32:45,506 INFO L913 BasicCegarLoop]: 14 mSDtfsCounter, 20 mSDsluCounter, 20 mSDsCounter, 0 mSdLazyCounter, 33 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 20 SdHoareTripleChecker+Valid, 34 SdHoareTripleChecker+Invalid, 48 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 33 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 7 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 17:32:45,507 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [20 Valid, 34 Invalid, 48 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 33 Invalid, 0 Unknown, 7 Unchecked, 0.1s Time] [2022-04-07 17:32:45,508 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2022-04-07 17:32:45,511 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 19. [2022-04-07 17:32:45,511 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:32:45,511 INFO L82 GeneralOperation]: Start isEquivalent. First operand 25 states. Second operand has 19 states, 14 states have (on average 1.4285714285714286) internal successors, (20), 14 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:32:45,512 INFO L74 IsIncluded]: Start isIncluded. First operand 25 states. Second operand has 19 states, 14 states have (on average 1.4285714285714286) internal successors, (20), 14 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:32:45,512 INFO L87 Difference]: Start difference. First operand 25 states. Second operand has 19 states, 14 states have (on average 1.4285714285714286) internal successors, (20), 14 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:32:45,521 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:32:45,521 INFO L93 Difference]: Finished difference Result 25 states and 35 transitions. [2022-04-07 17:32:45,522 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 35 transitions. [2022-04-07 17:32:45,522 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:32:45,522 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:32:45,523 INFO L74 IsIncluded]: Start isIncluded. First operand has 19 states, 14 states have (on average 1.4285714285714286) internal successors, (20), 14 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 25 states. [2022-04-07 17:32:45,523 INFO L87 Difference]: Start difference. First operand has 19 states, 14 states have (on average 1.4285714285714286) internal successors, (20), 14 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 25 states. [2022-04-07 17:32:45,526 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:32:45,526 INFO L93 Difference]: Finished difference Result 25 states and 35 transitions. [2022-04-07 17:32:45,526 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 35 transitions. [2022-04-07 17:32:45,526 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:32:45,526 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:32:45,526 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:32:45,526 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:32:45,527 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 14 states have (on average 1.4285714285714286) internal successors, (20), 14 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:32:45,528 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 24 transitions. [2022-04-07 17:32:45,528 INFO L78 Accepts]: Start accepts. Automaton has 19 states and 24 transitions. Word has length 16 [2022-04-07 17:32:45,529 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:32:45,529 INFO L478 AbstractCegarLoop]: Abstraction has 19 states and 24 transitions. [2022-04-07 17:32:45,529 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 2.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:32:45,529 INFO L276 IsEmpty]: Start isEmpty. Operand 19 states and 24 transitions. [2022-04-07 17:32:45,530 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-04-07 17:32:45,530 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:32:45,530 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:32:45,530 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-04-07 17:32:45,530 INFO L403 AbstractCegarLoop]: === Iteration 3 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:32:45,531 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:32:45,531 INFO L85 PathProgramCache]: Analyzing trace with hash -610770875, now seen corresponding path program 1 times [2022-04-07 17:32:45,531 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:32:45,531 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [757226438] [2022-04-07 17:32:45,531 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:32:45,531 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:32:45,544 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.0))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-07 17:32:45,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:32:45,570 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.1))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-07 17:32:45,687 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:32:45,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:32:45,713 INFO L290 TraceCheckUtils]: 0: Hoare triple {235#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {225#true} is VALID [2022-04-07 17:32:45,713 INFO L290 TraceCheckUtils]: 1: Hoare triple {225#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {225#true} is VALID [2022-04-07 17:32:45,713 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {225#true} {225#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {225#true} is VALID [2022-04-07 17:32:45,714 INFO L272 TraceCheckUtils]: 0: Hoare triple {225#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {235#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:32:45,714 INFO L290 TraceCheckUtils]: 1: Hoare triple {235#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {225#true} is VALID [2022-04-07 17:32:45,714 INFO L290 TraceCheckUtils]: 2: Hoare triple {225#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {225#true} is VALID [2022-04-07 17:32:45,714 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {225#true} {225#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {225#true} is VALID [2022-04-07 17:32:45,714 INFO L272 TraceCheckUtils]: 4: Hoare triple {225#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {225#true} is VALID [2022-04-07 17:32:45,715 INFO L290 TraceCheckUtils]: 5: Hoare triple {225#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {230#(= main_~y~0 0)} is VALID [2022-04-07 17:32:45,715 INFO L290 TraceCheckUtils]: 6: Hoare triple {230#(= main_~y~0 0)} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {230#(= main_~y~0 0)} is VALID [2022-04-07 17:32:45,717 INFO L290 TraceCheckUtils]: 7: Hoare triple {230#(= main_~y~0 0)} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {230#(= main_~y~0 0)} is VALID [2022-04-07 17:32:45,717 INFO L290 TraceCheckUtils]: 8: Hoare triple {230#(= main_~y~0 0)} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {231#(and (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)) (= main_~y~0 0))} is VALID [2022-04-07 17:32:45,718 INFO L290 TraceCheckUtils]: 9: Hoare triple {231#(and (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)) (= main_~y~0 0))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {231#(and (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)) (= main_~y~0 0))} is VALID [2022-04-07 17:32:45,718 INFO L290 TraceCheckUtils]: 10: Hoare triple {231#(and (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)) (= main_~y~0 0))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {231#(and (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)) (= main_~y~0 0))} is VALID [2022-04-07 17:32:45,720 INFO L290 TraceCheckUtils]: 11: Hoare triple {231#(and (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)) (= main_~y~0 0))} [107] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~y~0_10 (+ v_main_~y~0_11 v_main_~z~0_9 (* (- 1) v_main_~z~0_10))) (< 0 .cse0) (forall ((v_it_5 Int)) (or (not (<= (+ v_main_~z~0_9 v_it_5 1) v_main_~z~0_10)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)))) (< v_main_~z~0_9 v_main_~z~0_10)) (and (<= .cse0 0) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (= v_main_~y~0_11 v_main_~y~0_10) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {232#(and (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (not (<= (+ (div main_~y~0 4294967296) 1) 0)))} is VALID [2022-04-07 17:32:45,721 INFO L290 TraceCheckUtils]: 12: Hoare triple {232#(and (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (not (<= (+ (div main_~y~0 4294967296) 1) 0)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {232#(and (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (not (<= (+ (div main_~y~0 4294967296) 1) 0)))} is VALID [2022-04-07 17:32:45,722 INFO L272 TraceCheckUtils]: 13: Hoare triple {232#(and (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (not (<= (+ (div main_~y~0 4294967296) 1) 0)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {233#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:32:45,722 INFO L290 TraceCheckUtils]: 14: Hoare triple {233#(not (= |__VERIFIER_assert_#in~cond| 0))} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {234#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:32:45,722 INFO L290 TraceCheckUtils]: 15: Hoare triple {234#(not (= __VERIFIER_assert_~cond 0))} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {226#false} is VALID [2022-04-07 17:32:45,723 INFO L290 TraceCheckUtils]: 16: Hoare triple {226#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {226#false} is VALID [2022-04-07 17:32:45,723 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:32:45,723 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:32:45,723 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [757226438] [2022-04-07 17:32:45,723 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [757226438] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:32:45,723 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [853206245] [2022-04-07 17:32:45,724 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:32:45,724 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:32:45,724 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:32:45,725 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:32:45,729 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-04-07 17:32:45,772 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:32:45,774 INFO L263 TraceCheckSpWp]: Trace formula consists of 62 conjuncts, 6 conjunts are in the unsatisfiable core [2022-04-07 17:32:45,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:32:45,784 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:32:46,268 INFO L272 TraceCheckUtils]: 0: Hoare triple {225#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {225#true} is VALID [2022-04-07 17:32:46,269 INFO L290 TraceCheckUtils]: 1: Hoare triple {225#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {225#true} is VALID [2022-04-07 17:32:46,269 INFO L290 TraceCheckUtils]: 2: Hoare triple {225#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {225#true} is VALID [2022-04-07 17:32:46,269 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {225#true} {225#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {225#true} is VALID [2022-04-07 17:32:46,269 INFO L272 TraceCheckUtils]: 4: Hoare triple {225#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {225#true} is VALID [2022-04-07 17:32:46,269 INFO L290 TraceCheckUtils]: 5: Hoare triple {225#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {225#true} is VALID [2022-04-07 17:32:46,269 INFO L290 TraceCheckUtils]: 6: Hoare triple {225#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {225#true} is VALID [2022-04-07 17:32:46,270 INFO L290 TraceCheckUtils]: 7: Hoare triple {225#true} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {225#true} is VALID [2022-04-07 17:32:46,270 INFO L290 TraceCheckUtils]: 8: Hoare triple {225#true} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {263#(not (< 0 (mod main_~z~0 4294967296)))} is VALID [2022-04-07 17:32:46,271 INFO L290 TraceCheckUtils]: 9: Hoare triple {263#(not (< 0 (mod main_~z~0 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {267#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~z~0 4294967296))))} is VALID [2022-04-07 17:32:46,271 INFO L290 TraceCheckUtils]: 10: Hoare triple {267#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~z~0 4294967296))))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {267#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~z~0 4294967296))))} is VALID [2022-04-07 17:32:46,272 INFO L290 TraceCheckUtils]: 11: Hoare triple {267#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~z~0 4294967296))))} [107] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~y~0_10 (+ v_main_~y~0_11 v_main_~z~0_9 (* (- 1) v_main_~z~0_10))) (< 0 .cse0) (forall ((v_it_5 Int)) (or (not (<= (+ v_main_~z~0_9 v_it_5 1) v_main_~z~0_10)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)))) (< v_main_~z~0_9 v_main_~z~0_10)) (and (<= .cse0 0) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (= v_main_~y~0_11 v_main_~y~0_10) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {274#(<= (mod main_~y~0 4294967296) 0)} is VALID [2022-04-07 17:32:46,273 INFO L290 TraceCheckUtils]: 12: Hoare triple {274#(<= (mod main_~y~0 4294967296) 0)} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {274#(<= (mod main_~y~0 4294967296) 0)} is VALID [2022-04-07 17:32:46,274 INFO L272 TraceCheckUtils]: 13: Hoare triple {274#(<= (mod main_~y~0 4294967296) 0)} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {281#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:32:46,274 INFO L290 TraceCheckUtils]: 14: Hoare triple {281#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {285#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:32:46,274 INFO L290 TraceCheckUtils]: 15: Hoare triple {285#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {226#false} is VALID [2022-04-07 17:32:46,275 INFO L290 TraceCheckUtils]: 16: Hoare triple {226#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {226#false} is VALID [2022-04-07 17:32:46,275 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:32:46,275 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 17:32:51,408 INFO L290 TraceCheckUtils]: 16: Hoare triple {226#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {226#false} is VALID [2022-04-07 17:32:51,409 INFO L290 TraceCheckUtils]: 15: Hoare triple {285#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {226#false} is VALID [2022-04-07 17:32:51,410 INFO L290 TraceCheckUtils]: 14: Hoare triple {281#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {285#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:32:51,410 INFO L272 TraceCheckUtils]: 13: Hoare triple {274#(<= (mod main_~y~0 4294967296) 0)} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {281#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:32:51,411 INFO L290 TraceCheckUtils]: 12: Hoare triple {274#(<= (mod main_~y~0 4294967296) 0)} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {274#(<= (mod main_~y~0 4294967296) 0)} is VALID [2022-04-07 17:32:53,418 WARN L290 TraceCheckUtils]: 11: Hoare triple {307#(forall ((aux_mod_v_main_~y~0_27_31 Int)) (or (<= 4294967296 aux_mod_v_main_~y~0_27_31) (<= aux_mod_v_main_~y~0_27_31 0) (and (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~y~0_27_31 Int)) (not (= main_~y~0 (+ (* aux_div_v_main_~y~0_27_31 4294967296) aux_mod_v_main_~y~0_27_31))))) (or (not (< 0 (mod main_~z~0 4294967296))) (forall ((aux_div_v_main_~y~0_27_31 Int)) (or (not (< (+ (* aux_div_v_main_~y~0_27_31 4294967296) aux_mod_v_main_~y~0_27_31) main_~y~0)) (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ (* aux_div_v_main_~y~0_27_31 4294967296) v_it_5 aux_mod_v_main_~y~0_27_31 1) main_~y~0)))))))))} [107] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~y~0_10 (+ v_main_~y~0_11 v_main_~z~0_9 (* (- 1) v_main_~z~0_10))) (< 0 .cse0) (forall ((v_it_5 Int)) (or (not (<= (+ v_main_~z~0_9 v_it_5 1) v_main_~z~0_10)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)))) (< v_main_~z~0_9 v_main_~z~0_10)) (and (<= .cse0 0) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (= v_main_~y~0_11 v_main_~y~0_10) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {274#(<= (mod main_~y~0 4294967296) 0)} is UNKNOWN [2022-04-07 17:32:55,429 WARN L290 TraceCheckUtils]: 10: Hoare triple {307#(forall ((aux_mod_v_main_~y~0_27_31 Int)) (or (<= 4294967296 aux_mod_v_main_~y~0_27_31) (<= aux_mod_v_main_~y~0_27_31 0) (and (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~y~0_27_31 Int)) (not (= main_~y~0 (+ (* aux_div_v_main_~y~0_27_31 4294967296) aux_mod_v_main_~y~0_27_31))))) (or (not (< 0 (mod main_~z~0 4294967296))) (forall ((aux_div_v_main_~y~0_27_31 Int)) (or (not (< (+ (* aux_div_v_main_~y~0_27_31 4294967296) aux_mod_v_main_~y~0_27_31) main_~y~0)) (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ (* aux_div_v_main_~y~0_27_31 4294967296) v_it_5 aux_mod_v_main_~y~0_27_31 1) main_~y~0)))))))))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {307#(forall ((aux_mod_v_main_~y~0_27_31 Int)) (or (<= 4294967296 aux_mod_v_main_~y~0_27_31) (<= aux_mod_v_main_~y~0_27_31 0) (and (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~y~0_27_31 Int)) (not (= main_~y~0 (+ (* aux_div_v_main_~y~0_27_31 4294967296) aux_mod_v_main_~y~0_27_31))))) (or (not (< 0 (mod main_~z~0 4294967296))) (forall ((aux_div_v_main_~y~0_27_31 Int)) (or (not (< (+ (* aux_div_v_main_~y~0_27_31 4294967296) aux_mod_v_main_~y~0_27_31) main_~y~0)) (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ (* aux_div_v_main_~y~0_27_31 4294967296) v_it_5 aux_mod_v_main_~y~0_27_31 1) main_~y~0)))))))))} is UNKNOWN [2022-04-07 17:32:55,431 INFO L290 TraceCheckUtils]: 9: Hoare triple {263#(not (< 0 (mod main_~z~0 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {307#(forall ((aux_mod_v_main_~y~0_27_31 Int)) (or (<= 4294967296 aux_mod_v_main_~y~0_27_31) (<= aux_mod_v_main_~y~0_27_31 0) (and (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~y~0_27_31 Int)) (not (= main_~y~0 (+ (* aux_div_v_main_~y~0_27_31 4294967296) aux_mod_v_main_~y~0_27_31))))) (or (not (< 0 (mod main_~z~0 4294967296))) (forall ((aux_div_v_main_~y~0_27_31 Int)) (or (not (< (+ (* aux_div_v_main_~y~0_27_31 4294967296) aux_mod_v_main_~y~0_27_31) main_~y~0)) (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ (* aux_div_v_main_~y~0_27_31 4294967296) v_it_5 aux_mod_v_main_~y~0_27_31 1) main_~y~0)))))))))} is VALID [2022-04-07 17:32:55,432 INFO L290 TraceCheckUtils]: 8: Hoare triple {225#true} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {263#(not (< 0 (mod main_~z~0 4294967296)))} is VALID [2022-04-07 17:32:55,432 INFO L290 TraceCheckUtils]: 7: Hoare triple {225#true} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {225#true} is VALID [2022-04-07 17:32:55,432 INFO L290 TraceCheckUtils]: 6: Hoare triple {225#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {225#true} is VALID [2022-04-07 17:32:55,432 INFO L290 TraceCheckUtils]: 5: Hoare triple {225#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {225#true} is VALID [2022-04-07 17:32:55,432 INFO L272 TraceCheckUtils]: 4: Hoare triple {225#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {225#true} is VALID [2022-04-07 17:32:55,432 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {225#true} {225#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {225#true} is VALID [2022-04-07 17:32:55,432 INFO L290 TraceCheckUtils]: 2: Hoare triple {225#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {225#true} is VALID [2022-04-07 17:32:55,433 INFO L290 TraceCheckUtils]: 1: Hoare triple {225#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {225#true} is VALID [2022-04-07 17:32:55,433 INFO L272 TraceCheckUtils]: 0: Hoare triple {225#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {225#true} is VALID [2022-04-07 17:32:55,433 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:32:55,433 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [853206245] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 17:32:55,433 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 17:32:55,433 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7, 7] total 14 [2022-04-07 17:32:55,434 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2057293639] [2022-04-07 17:32:55,434 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 17:32:55,434 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 1.9285714285714286) internal successors, (27), 11 states have internal predecessors, (27), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-07 17:32:55,434 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:32:55,435 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 14 states, 14 states have (on average 1.9285714285714286) internal successors, (27), 11 states have internal predecessors, (27), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:32:57,596 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 33 edges. 32 inductive. 0 not inductive. 1 times theorem prover too weak to decide inductivity. [2022-04-07 17:32:57,597 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2022-04-07 17:32:57,597 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:32:57,597 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-04-07 17:32:57,597 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=142, Unknown=1, NotChecked=0, Total=182 [2022-04-07 17:32:57,598 INFO L87 Difference]: Start difference. First operand 19 states and 24 transitions. Second operand has 14 states, 14 states have (on average 1.9285714285714286) internal successors, (27), 11 states have internal predecessors, (27), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:32:58,218 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:32:58,218 INFO L93 Difference]: Finished difference Result 36 states and 50 transitions. [2022-04-07 17:32:58,218 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-04-07 17:32:58,218 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 1.9285714285714286) internal successors, (27), 11 states have internal predecessors, (27), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-07 17:32:58,218 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:32:58,219 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 14 states have (on average 1.9285714285714286) internal successors, (27), 11 states have internal predecessors, (27), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:32:58,220 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 51 transitions. [2022-04-07 17:32:58,220 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 14 states have (on average 1.9285714285714286) internal successors, (27), 11 states have internal predecessors, (27), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:32:58,222 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 51 transitions. [2022-04-07 17:32:58,222 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 13 states and 51 transitions. [2022-04-07 17:32:58,266 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 51 edges. 51 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:32:58,267 INFO L225 Difference]: With dead ends: 36 [2022-04-07 17:32:58,267 INFO L226 Difference]: Without dead ends: 32 [2022-04-07 17:32:58,268 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 28 SyntacticMatches, 3 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 97 ImplicationChecksByTransitivity, 2.6s TimeCoverageRelationStatistics Valid=102, Invalid=359, Unknown=1, NotChecked=0, Total=462 [2022-04-07 17:32:58,268 INFO L913 BasicCegarLoop]: 13 mSDtfsCounter, 27 mSDsluCounter, 49 mSDsCounter, 0 mSdLazyCounter, 76 mSolverCounterSat, 19 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 27 SdHoareTripleChecker+Valid, 62 SdHoareTripleChecker+Invalid, 114 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 19 IncrementalHoareTripleChecker+Valid, 76 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 19 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-07 17:32:58,268 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [27 Valid, 62 Invalid, 114 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [19 Valid, 76 Invalid, 0 Unknown, 19 Unchecked, 0.2s Time] [2022-04-07 17:32:58,269 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states. [2022-04-07 17:32:58,271 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 22. [2022-04-07 17:32:58,271 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:32:58,271 INFO L82 GeneralOperation]: Start isEquivalent. First operand 32 states. Second operand has 22 states, 17 states have (on average 1.4705882352941178) internal successors, (25), 17 states have internal predecessors, (25), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:32:58,271 INFO L74 IsIncluded]: Start isIncluded. First operand 32 states. Second operand has 22 states, 17 states have (on average 1.4705882352941178) internal successors, (25), 17 states have internal predecessors, (25), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:32:58,271 INFO L87 Difference]: Start difference. First operand 32 states. Second operand has 22 states, 17 states have (on average 1.4705882352941178) internal successors, (25), 17 states have internal predecessors, (25), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:32:58,272 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:32:58,273 INFO L93 Difference]: Finished difference Result 32 states and 45 transitions. [2022-04-07 17:32:58,273 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 45 transitions. [2022-04-07 17:32:58,273 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:32:58,273 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:32:58,273 INFO L74 IsIncluded]: Start isIncluded. First operand has 22 states, 17 states have (on average 1.4705882352941178) internal successors, (25), 17 states have internal predecessors, (25), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 32 states. [2022-04-07 17:32:58,273 INFO L87 Difference]: Start difference. First operand has 22 states, 17 states have (on average 1.4705882352941178) internal successors, (25), 17 states have internal predecessors, (25), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 32 states. [2022-04-07 17:32:58,274 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:32:58,274 INFO L93 Difference]: Finished difference Result 32 states and 45 transitions. [2022-04-07 17:32:58,275 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 45 transitions. [2022-04-07 17:32:58,275 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:32:58,275 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:32:58,275 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:32:58,275 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:32:58,275 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 17 states have (on average 1.4705882352941178) internal successors, (25), 17 states have internal predecessors, (25), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:32:58,278 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 29 transitions. [2022-04-07 17:32:58,278 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 29 transitions. Word has length 17 [2022-04-07 17:32:58,278 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:32:58,278 INFO L478 AbstractCegarLoop]: Abstraction has 22 states and 29 transitions. [2022-04-07 17:32:58,278 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 14 states have (on average 1.9285714285714286) internal successors, (27), 11 states have internal predecessors, (27), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:32:58,278 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 29 transitions. [2022-04-07 17:32:58,280 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-04-07 17:32:58,280 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:32:58,280 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:32:58,296 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2022-04-07 17:32:58,496 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2,2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:32:58,496 INFO L403 AbstractCegarLoop]: === Iteration 4 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:32:58,496 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:32:58,497 INFO L85 PathProgramCache]: Analyzing trace with hash 162216202, now seen corresponding path program 1 times [2022-04-07 17:32:58,497 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:32:58,500 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1087573791] [2022-04-07 17:32:58,500 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:32:58,503 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:32:58,523 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.0))) (+ .cse0 main_~x~0_5 (* (- 4294967296) (div (+ .cse0 main_~x~0_5) 4294967296)))) 0)) [2022-04-07 17:32:58,527 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:32:58,547 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.1))) (+ .cse0 main_~x~0_5 (* (- 4294967296) (div (+ .cse0 main_~x~0_5) 4294967296)))) 0)) [2022-04-07 17:32:58,691 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:32:58,693 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:32:58,697 INFO L290 TraceCheckUtils]: 0: Hoare triple {492#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {482#true} is VALID [2022-04-07 17:32:58,697 INFO L290 TraceCheckUtils]: 1: Hoare triple {482#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {482#true} is VALID [2022-04-07 17:32:58,697 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {482#true} {482#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {482#true} is VALID [2022-04-07 17:32:58,698 INFO L272 TraceCheckUtils]: 0: Hoare triple {482#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {492#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:32:58,698 INFO L290 TraceCheckUtils]: 1: Hoare triple {492#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {482#true} is VALID [2022-04-07 17:32:58,698 INFO L290 TraceCheckUtils]: 2: Hoare triple {482#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {482#true} is VALID [2022-04-07 17:32:58,698 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {482#true} {482#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {482#true} is VALID [2022-04-07 17:32:58,698 INFO L272 TraceCheckUtils]: 4: Hoare triple {482#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {482#true} is VALID [2022-04-07 17:32:58,698 INFO L290 TraceCheckUtils]: 5: Hoare triple {482#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {487#(= main_~y~0 0)} is VALID [2022-04-07 17:32:58,699 INFO L290 TraceCheckUtils]: 6: Hoare triple {487#(= main_~y~0 0)} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {488#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:32:58,700 INFO L290 TraceCheckUtils]: 7: Hoare triple {488#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {488#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:32:58,700 INFO L290 TraceCheckUtils]: 8: Hoare triple {488#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {488#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:32:58,701 INFO L290 TraceCheckUtils]: 9: Hoare triple {488#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {488#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:32:58,702 INFO L290 TraceCheckUtils]: 10: Hoare triple {488#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [104] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (< v_main_~x~0_6 v_main_~x~0_7) (= (+ (* (- 1) v_main_~x~0_6) v_main_~x~0_7 v_main_~y~0_8) v_main_~y~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_8 v_main_~y~0_7) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_8, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {489#(and (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (not (<= (+ (div main_~y~0 4294967296) 1) 0)))} is VALID [2022-04-07 17:32:58,703 INFO L290 TraceCheckUtils]: 11: Hoare triple {489#(and (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (not (<= (+ (div main_~y~0 4294967296) 1) 0)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {489#(and (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (not (<= (+ (div main_~y~0 4294967296) 1) 0)))} is VALID [2022-04-07 17:32:58,703 INFO L290 TraceCheckUtils]: 12: Hoare triple {489#(and (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (not (<= (+ (div main_~y~0 4294967296) 1) 0)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {489#(and (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (not (<= (+ (div main_~y~0 4294967296) 1) 0)))} is VALID [2022-04-07 17:32:58,704 INFO L272 TraceCheckUtils]: 13: Hoare triple {489#(and (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (not (<= (+ (div main_~y~0 4294967296) 1) 0)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {490#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:32:58,704 INFO L290 TraceCheckUtils]: 14: Hoare triple {490#(not (= |__VERIFIER_assert_#in~cond| 0))} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {491#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:32:58,705 INFO L290 TraceCheckUtils]: 15: Hoare triple {491#(not (= __VERIFIER_assert_~cond 0))} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {483#false} is VALID [2022-04-07 17:32:58,705 INFO L290 TraceCheckUtils]: 16: Hoare triple {483#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {483#false} is VALID [2022-04-07 17:32:58,705 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:32:58,705 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:32:58,705 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1087573791] [2022-04-07 17:32:58,706 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1087573791] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:32:58,706 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1091582952] [2022-04-07 17:32:58,706 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:32:58,706 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:32:58,706 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:32:58,720 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:32:58,721 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-04-07 17:32:58,747 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:32:58,748 INFO L263 TraceCheckSpWp]: Trace formula consists of 62 conjuncts, 6 conjunts are in the unsatisfiable core [2022-04-07 17:32:58,755 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:32:58,756 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:32:59,198 INFO L272 TraceCheckUtils]: 0: Hoare triple {482#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {482#true} is VALID [2022-04-07 17:32:59,198 INFO L290 TraceCheckUtils]: 1: Hoare triple {482#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {482#true} is VALID [2022-04-07 17:32:59,198 INFO L290 TraceCheckUtils]: 2: Hoare triple {482#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {482#true} is VALID [2022-04-07 17:32:59,198 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {482#true} {482#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {482#true} is VALID [2022-04-07 17:32:59,198 INFO L272 TraceCheckUtils]: 4: Hoare triple {482#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {482#true} is VALID [2022-04-07 17:32:59,198 INFO L290 TraceCheckUtils]: 5: Hoare triple {482#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {482#true} is VALID [2022-04-07 17:32:59,199 INFO L290 TraceCheckUtils]: 6: Hoare triple {482#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {514#(not (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-07 17:32:59,199 INFO L290 TraceCheckUtils]: 7: Hoare triple {514#(not (< 0 (mod main_~x~0 4294967296)))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {514#(not (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-07 17:32:59,200 INFO L290 TraceCheckUtils]: 8: Hoare triple {514#(not (< 0 (mod main_~x~0 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {514#(not (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-07 17:32:59,201 INFO L290 TraceCheckUtils]: 9: Hoare triple {514#(not (< 0 (mod main_~x~0 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {524#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-07 17:32:59,202 INFO L290 TraceCheckUtils]: 10: Hoare triple {524#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} [104] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (< v_main_~x~0_6 v_main_~x~0_7) (= (+ (* (- 1) v_main_~x~0_6) v_main_~x~0_7 v_main_~y~0_8) v_main_~y~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_8 v_main_~y~0_7) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_8, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {528#(<= (mod main_~y~0 4294967296) 0)} is VALID [2022-04-07 17:32:59,208 INFO L290 TraceCheckUtils]: 11: Hoare triple {528#(<= (mod main_~y~0 4294967296) 0)} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {528#(<= (mod main_~y~0 4294967296) 0)} is VALID [2022-04-07 17:32:59,210 INFO L290 TraceCheckUtils]: 12: Hoare triple {528#(<= (mod main_~y~0 4294967296) 0)} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {528#(<= (mod main_~y~0 4294967296) 0)} is VALID [2022-04-07 17:32:59,211 INFO L272 TraceCheckUtils]: 13: Hoare triple {528#(<= (mod main_~y~0 4294967296) 0)} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {538#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:32:59,211 INFO L290 TraceCheckUtils]: 14: Hoare triple {538#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {542#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:32:59,211 INFO L290 TraceCheckUtils]: 15: Hoare triple {542#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {483#false} is VALID [2022-04-07 17:32:59,212 INFO L290 TraceCheckUtils]: 16: Hoare triple {483#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {483#false} is VALID [2022-04-07 17:32:59,212 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:32:59,212 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 17:33:07,380 INFO L290 TraceCheckUtils]: 16: Hoare triple {483#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {483#false} is VALID [2022-04-07 17:33:07,381 INFO L290 TraceCheckUtils]: 15: Hoare triple {542#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {483#false} is VALID [2022-04-07 17:33:07,381 INFO L290 TraceCheckUtils]: 14: Hoare triple {538#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {542#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:33:07,382 INFO L272 TraceCheckUtils]: 13: Hoare triple {528#(<= (mod main_~y~0 4294967296) 0)} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {538#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:33:07,382 INFO L290 TraceCheckUtils]: 12: Hoare triple {528#(<= (mod main_~y~0 4294967296) 0)} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {528#(<= (mod main_~y~0 4294967296) 0)} is VALID [2022-04-07 17:33:07,382 INFO L290 TraceCheckUtils]: 11: Hoare triple {528#(<= (mod main_~y~0 4294967296) 0)} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {528#(<= (mod main_~y~0 4294967296) 0)} is VALID [2022-04-07 17:33:07,567 INFO L290 TraceCheckUtils]: 10: Hoare triple {567#(forall ((aux_mod_v_main_~y~0_29_31 Int)) (or (<= aux_mod_v_main_~y~0_29_31 0) (and (or (not (< 0 (mod main_~x~0 4294967296))) (forall ((aux_div_v_main_~y~0_29_31 Int)) (or (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= (+ v_it_4 main_~y~0 1) (+ aux_mod_v_main_~y~0_29_31 (* aux_div_v_main_~y~0_29_31 4294967296))) (<= 1 v_it_4))) (not (< main_~y~0 (+ aux_mod_v_main_~y~0_29_31 (* aux_div_v_main_~y~0_29_31 4294967296))))))) (or (forall ((aux_div_v_main_~y~0_29_31 Int)) (not (= (+ aux_mod_v_main_~y~0_29_31 (* aux_div_v_main_~y~0_29_31 4294967296)) main_~y~0))) (< 0 (mod main_~x~0 4294967296)))) (<= 4294967296 aux_mod_v_main_~y~0_29_31)))} [104] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (< v_main_~x~0_6 v_main_~x~0_7) (= (+ (* (- 1) v_main_~x~0_6) v_main_~x~0_7 v_main_~y~0_8) v_main_~y~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_8 v_main_~y~0_7) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_8, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {528#(<= (mod main_~y~0 4294967296) 0)} is VALID [2022-04-07 17:33:07,568 INFO L290 TraceCheckUtils]: 9: Hoare triple {514#(not (< 0 (mod main_~x~0 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {567#(forall ((aux_mod_v_main_~y~0_29_31 Int)) (or (<= aux_mod_v_main_~y~0_29_31 0) (and (or (not (< 0 (mod main_~x~0 4294967296))) (forall ((aux_div_v_main_~y~0_29_31 Int)) (or (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= (+ v_it_4 main_~y~0 1) (+ aux_mod_v_main_~y~0_29_31 (* aux_div_v_main_~y~0_29_31 4294967296))) (<= 1 v_it_4))) (not (< main_~y~0 (+ aux_mod_v_main_~y~0_29_31 (* aux_div_v_main_~y~0_29_31 4294967296))))))) (or (forall ((aux_div_v_main_~y~0_29_31 Int)) (not (= (+ aux_mod_v_main_~y~0_29_31 (* aux_div_v_main_~y~0_29_31 4294967296)) main_~y~0))) (< 0 (mod main_~x~0 4294967296)))) (<= 4294967296 aux_mod_v_main_~y~0_29_31)))} is VALID [2022-04-07 17:33:07,568 INFO L290 TraceCheckUtils]: 8: Hoare triple {514#(not (< 0 (mod main_~x~0 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {514#(not (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-07 17:33:07,569 INFO L290 TraceCheckUtils]: 7: Hoare triple {514#(not (< 0 (mod main_~x~0 4294967296)))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {514#(not (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-07 17:33:07,569 INFO L290 TraceCheckUtils]: 6: Hoare triple {482#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {514#(not (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-07 17:33:07,569 INFO L290 TraceCheckUtils]: 5: Hoare triple {482#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {482#true} is VALID [2022-04-07 17:33:07,569 INFO L272 TraceCheckUtils]: 4: Hoare triple {482#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {482#true} is VALID [2022-04-07 17:33:07,569 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {482#true} {482#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {482#true} is VALID [2022-04-07 17:33:07,569 INFO L290 TraceCheckUtils]: 2: Hoare triple {482#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {482#true} is VALID [2022-04-07 17:33:07,570 INFO L290 TraceCheckUtils]: 1: Hoare triple {482#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {482#true} is VALID [2022-04-07 17:33:07,570 INFO L272 TraceCheckUtils]: 0: Hoare triple {482#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {482#true} is VALID [2022-04-07 17:33:07,570 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:33:07,570 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1091582952] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 17:33:07,570 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 17:33:07,570 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7, 7] total 14 [2022-04-07 17:33:07,570 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1979148452] [2022-04-07 17:33:07,570 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 17:33:07,571 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 1.8571428571428572) internal successors, (26), 11 states have internal predecessors, (26), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-07 17:33:07,571 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:33:07,571 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 14 states, 14 states have (on average 1.8571428571428572) internal successors, (26), 11 states have internal predecessors, (26), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:08,427 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 32 edges. 32 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:33:08,428 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2022-04-07 17:33:08,428 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:33:08,428 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-04-07 17:33:08,428 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=142, Unknown=1, NotChecked=0, Total=182 [2022-04-07 17:33:08,429 INFO L87 Difference]: Start difference. First operand 22 states and 29 transitions. Second operand has 14 states, 14 states have (on average 1.8571428571428572) internal successors, (26), 11 states have internal predecessors, (26), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:09,098 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:33:09,098 INFO L93 Difference]: Finished difference Result 42 states and 60 transitions. [2022-04-07 17:33:09,098 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-04-07 17:33:09,098 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 1.8571428571428572) internal successors, (26), 11 states have internal predecessors, (26), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-07 17:33:09,099 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:33:09,099 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 14 states have (on average 1.8571428571428572) internal successors, (26), 11 states have internal predecessors, (26), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:09,101 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 57 transitions. [2022-04-07 17:33:09,101 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 14 states have (on average 1.8571428571428572) internal successors, (26), 11 states have internal predecessors, (26), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:09,102 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 57 transitions. [2022-04-07 17:33:09,102 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 13 states and 57 transitions. [2022-04-07 17:33:09,155 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 57 edges. 57 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:33:09,156 INFO L225 Difference]: With dead ends: 42 [2022-04-07 17:33:09,156 INFO L226 Difference]: Without dead ends: 38 [2022-04-07 17:33:09,156 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 53 GetRequests, 29 SyntacticMatches, 4 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 108 ImplicationChecksByTransitivity, 6.5s TimeCoverageRelationStatistics Valid=98, Invalid=363, Unknown=1, NotChecked=0, Total=462 [2022-04-07 17:33:09,157 INFO L913 BasicCegarLoop]: 16 mSDtfsCounter, 27 mSDsluCounter, 62 mSDsCounter, 0 mSdLazyCounter, 112 mSolverCounterSat, 13 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 27 SdHoareTripleChecker+Valid, 78 SdHoareTripleChecker+Invalid, 149 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 13 IncrementalHoareTripleChecker+Valid, 112 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 24 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-07 17:33:09,157 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [27 Valid, 78 Invalid, 149 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [13 Valid, 112 Invalid, 0 Unknown, 24 Unchecked, 0.2s Time] [2022-04-07 17:33:09,158 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38 states. [2022-04-07 17:33:09,160 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38 to 25. [2022-04-07 17:33:09,160 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:33:09,160 INFO L82 GeneralOperation]: Start isEquivalent. First operand 38 states. Second operand has 25 states, 20 states have (on average 1.55) internal successors, (31), 20 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:09,160 INFO L74 IsIncluded]: Start isIncluded. First operand 38 states. Second operand has 25 states, 20 states have (on average 1.55) internal successors, (31), 20 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:09,160 INFO L87 Difference]: Start difference. First operand 38 states. Second operand has 25 states, 20 states have (on average 1.55) internal successors, (31), 20 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:09,162 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:33:09,162 INFO L93 Difference]: Finished difference Result 38 states and 55 transitions. [2022-04-07 17:33:09,162 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 55 transitions. [2022-04-07 17:33:09,162 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:33:09,162 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:33:09,162 INFO L74 IsIncluded]: Start isIncluded. First operand has 25 states, 20 states have (on average 1.55) internal successors, (31), 20 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 38 states. [2022-04-07 17:33:09,163 INFO L87 Difference]: Start difference. First operand has 25 states, 20 states have (on average 1.55) internal successors, (31), 20 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 38 states. [2022-04-07 17:33:09,164 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:33:09,164 INFO L93 Difference]: Finished difference Result 38 states and 55 transitions. [2022-04-07 17:33:09,164 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 55 transitions. [2022-04-07 17:33:09,164 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:33:09,164 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:33:09,164 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:33:09,164 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:33:09,164 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 20 states have (on average 1.55) internal successors, (31), 20 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:09,165 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 35 transitions. [2022-04-07 17:33:09,165 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 35 transitions. Word has length 17 [2022-04-07 17:33:09,165 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:33:09,165 INFO L478 AbstractCegarLoop]: Abstraction has 25 states and 35 transitions. [2022-04-07 17:33:09,166 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 14 states have (on average 1.8571428571428572) internal successors, (26), 11 states have internal predecessors, (26), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:09,166 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 35 transitions. [2022-04-07 17:33:09,166 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-04-07 17:33:09,166 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:33:09,166 INFO L499 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:33:09,185 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2022-04-07 17:33:09,383 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable3 [2022-04-07 17:33:09,383 INFO L403 AbstractCegarLoop]: === Iteration 5 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:33:09,383 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:33:09,383 INFO L85 PathProgramCache]: Analyzing trace with hash -1727307284, now seen corresponding path program 2 times [2022-04-07 17:33:09,383 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:33:09,384 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2005071510] [2022-04-07 17:33:09,384 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:33:09,384 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:33:09,398 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.0))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-07 17:33:09,399 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.1))) (+ main_~z~0_11 .cse0 (* (- 4294967296) (div (+ main_~z~0_11 .cse0) 4294967296)))) 0)) [2022-04-07 17:33:09,416 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:33:09,433 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.2))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-07 17:33:09,436 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.3))) (+ main_~z~0_11 .cse0 (* (- 4294967296) (div (+ main_~z~0_11 .cse0) 4294967296)))) 0)) [2022-04-07 17:33:09,635 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:33:09,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:33:09,643 INFO L290 TraceCheckUtils]: 0: Hoare triple {772#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {762#true} is VALID [2022-04-07 17:33:09,644 INFO L290 TraceCheckUtils]: 1: Hoare triple {762#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {762#true} is VALID [2022-04-07 17:33:09,644 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {762#true} {762#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {762#true} is VALID [2022-04-07 17:33:09,644 INFO L272 TraceCheckUtils]: 0: Hoare triple {762#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {772#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:33:09,644 INFO L290 TraceCheckUtils]: 1: Hoare triple {772#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {762#true} is VALID [2022-04-07 17:33:09,644 INFO L290 TraceCheckUtils]: 2: Hoare triple {762#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {762#true} is VALID [2022-04-07 17:33:09,644 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {762#true} {762#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {762#true} is VALID [2022-04-07 17:33:09,645 INFO L272 TraceCheckUtils]: 4: Hoare triple {762#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {762#true} is VALID [2022-04-07 17:33:09,646 INFO L290 TraceCheckUtils]: 5: Hoare triple {762#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {767#(= main_~y~0 0)} is VALID [2022-04-07 17:33:09,646 INFO L290 TraceCheckUtils]: 6: Hoare triple {767#(= main_~y~0 0)} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {767#(= main_~y~0 0)} is VALID [2022-04-07 17:33:09,646 INFO L290 TraceCheckUtils]: 7: Hoare triple {767#(= main_~y~0 0)} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {768#(and (= main_~z~0 0) (= main_~y~0 0))} is VALID [2022-04-07 17:33:09,647 INFO L290 TraceCheckUtils]: 8: Hoare triple {768#(and (= main_~z~0 0) (= main_~y~0 0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {768#(and (= main_~z~0 0) (= main_~y~0 0))} is VALID [2022-04-07 17:33:09,647 INFO L290 TraceCheckUtils]: 9: Hoare triple {768#(and (= main_~z~0 0) (= main_~y~0 0))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {768#(and (= main_~z~0 0) (= main_~y~0 0))} is VALID [2022-04-07 17:33:09,647 INFO L290 TraceCheckUtils]: 10: Hoare triple {768#(and (= main_~z~0 0) (= main_~y~0 0))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {768#(and (= main_~z~0 0) (= main_~y~0 0))} is VALID [2022-04-07 17:33:09,648 INFO L290 TraceCheckUtils]: 11: Hoare triple {768#(and (= main_~z~0 0) (= main_~y~0 0))} [107] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~y~0_10 (+ v_main_~y~0_11 v_main_~z~0_9 (* (- 1) v_main_~z~0_10))) (< 0 .cse0) (forall ((v_it_5 Int)) (or (not (<= (+ v_main_~z~0_9 v_it_5 1) v_main_~z~0_10)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)))) (< v_main_~z~0_9 v_main_~z~0_10)) (and (<= .cse0 0) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (= v_main_~y~0_11 v_main_~y~0_10) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {768#(and (= main_~z~0 0) (= main_~y~0 0))} is VALID [2022-04-07 17:33:09,649 INFO L290 TraceCheckUtils]: 12: Hoare triple {768#(and (= main_~z~0 0) (= main_~y~0 0))} [107] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~y~0_10 (+ v_main_~y~0_11 v_main_~z~0_9 (* (- 1) v_main_~z~0_10))) (< 0 .cse0) (forall ((v_it_5 Int)) (or (not (<= (+ v_main_~z~0_9 v_it_5 1) v_main_~z~0_10)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)))) (< v_main_~z~0_9 v_main_~z~0_10)) (and (<= .cse0 0) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (= v_main_~y~0_11 v_main_~y~0_10) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {769#(and (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (not (<= (+ (div main_~y~0 4294967296) 1) 0)))} is VALID [2022-04-07 17:33:09,649 INFO L290 TraceCheckUtils]: 13: Hoare triple {769#(and (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (not (<= (+ (div main_~y~0 4294967296) 1) 0)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {769#(and (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (not (<= (+ (div main_~y~0 4294967296) 1) 0)))} is VALID [2022-04-07 17:33:09,650 INFO L272 TraceCheckUtils]: 14: Hoare triple {769#(and (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (not (<= (+ (div main_~y~0 4294967296) 1) 0)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {770#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:33:09,650 INFO L290 TraceCheckUtils]: 15: Hoare triple {770#(not (= |__VERIFIER_assert_#in~cond| 0))} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {771#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:33:09,650 INFO L290 TraceCheckUtils]: 16: Hoare triple {771#(not (= __VERIFIER_assert_~cond 0))} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {763#false} is VALID [2022-04-07 17:33:09,650 INFO L290 TraceCheckUtils]: 17: Hoare triple {763#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {763#false} is VALID [2022-04-07 17:33:09,651 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 17:33:09,651 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:33:09,651 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2005071510] [2022-04-07 17:33:09,651 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2005071510] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:33:09,651 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [431025689] [2022-04-07 17:33:09,651 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-07 17:33:09,651 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:33:09,651 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:33:09,652 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:33:09,653 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-04-07 17:33:09,686 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-07 17:33:09,686 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 17:33:09,687 INFO L263 TraceCheckSpWp]: Trace formula consists of 63 conjuncts, 7 conjunts are in the unsatisfiable core [2022-04-07 17:33:09,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:33:09,696 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:33:10,193 INFO L272 TraceCheckUtils]: 0: Hoare triple {762#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {762#true} is VALID [2022-04-07 17:33:10,193 INFO L290 TraceCheckUtils]: 1: Hoare triple {762#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {762#true} is VALID [2022-04-07 17:33:10,193 INFO L290 TraceCheckUtils]: 2: Hoare triple {762#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {762#true} is VALID [2022-04-07 17:33:10,193 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {762#true} {762#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {762#true} is VALID [2022-04-07 17:33:10,193 INFO L272 TraceCheckUtils]: 4: Hoare triple {762#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {762#true} is VALID [2022-04-07 17:33:10,193 INFO L290 TraceCheckUtils]: 5: Hoare triple {762#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {762#true} is VALID [2022-04-07 17:33:10,194 INFO L290 TraceCheckUtils]: 6: Hoare triple {762#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {762#true} is VALID [2022-04-07 17:33:10,194 INFO L290 TraceCheckUtils]: 7: Hoare triple {762#true} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {762#true} is VALID [2022-04-07 17:33:10,194 INFO L290 TraceCheckUtils]: 8: Hoare triple {762#true} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {800#(not (< 0 (mod main_~z~0 4294967296)))} is VALID [2022-04-07 17:33:10,195 INFO L290 TraceCheckUtils]: 9: Hoare triple {800#(not (< 0 (mod main_~z~0 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {804#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~z~0 4294967296))))} is VALID [2022-04-07 17:33:10,196 INFO L290 TraceCheckUtils]: 10: Hoare triple {804#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~z~0 4294967296))))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {804#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~z~0 4294967296))))} is VALID [2022-04-07 17:33:10,197 INFO L290 TraceCheckUtils]: 11: Hoare triple {804#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~z~0 4294967296))))} [107] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~y~0_10 (+ v_main_~y~0_11 v_main_~z~0_9 (* (- 1) v_main_~z~0_10))) (< 0 .cse0) (forall ((v_it_5 Int)) (or (not (<= (+ v_main_~z~0_9 v_it_5 1) v_main_~z~0_10)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)))) (< v_main_~z~0_9 v_main_~z~0_10)) (and (<= .cse0 0) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (= v_main_~y~0_11 v_main_~y~0_10) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {804#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~z~0 4294967296))))} is VALID [2022-04-07 17:33:10,197 INFO L290 TraceCheckUtils]: 12: Hoare triple {804#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~z~0 4294967296))))} [107] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~y~0_10 (+ v_main_~y~0_11 v_main_~z~0_9 (* (- 1) v_main_~z~0_10))) (< 0 .cse0) (forall ((v_it_5 Int)) (or (not (<= (+ v_main_~z~0_9 v_it_5 1) v_main_~z~0_10)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)))) (< v_main_~z~0_9 v_main_~z~0_10)) (and (<= .cse0 0) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (= v_main_~y~0_11 v_main_~y~0_10) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {814#(<= (mod main_~y~0 4294967296) 0)} is VALID [2022-04-07 17:33:10,198 INFO L290 TraceCheckUtils]: 13: Hoare triple {814#(<= (mod main_~y~0 4294967296) 0)} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {814#(<= (mod main_~y~0 4294967296) 0)} is VALID [2022-04-07 17:33:10,198 INFO L272 TraceCheckUtils]: 14: Hoare triple {814#(<= (mod main_~y~0 4294967296) 0)} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {821#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:33:10,199 INFO L290 TraceCheckUtils]: 15: Hoare triple {821#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {825#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:33:10,199 INFO L290 TraceCheckUtils]: 16: Hoare triple {825#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {763#false} is VALID [2022-04-07 17:33:10,199 INFO L290 TraceCheckUtils]: 17: Hoare triple {763#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {763#false} is VALID [2022-04-07 17:33:10,199 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 17:33:10,199 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 17:35:15,294 WARN L232 SmtUtils]: Spent 6.09s on a formula simplification that was a NOOP. DAG size: 73 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 17:35:15,322 INFO L290 TraceCheckUtils]: 17: Hoare triple {763#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {763#false} is VALID [2022-04-07 17:35:15,322 INFO L290 TraceCheckUtils]: 16: Hoare triple {825#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {763#false} is VALID [2022-04-07 17:35:15,323 INFO L290 TraceCheckUtils]: 15: Hoare triple {821#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {825#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:35:15,324 INFO L272 TraceCheckUtils]: 14: Hoare triple {814#(<= (mod main_~y~0 4294967296) 0)} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {821#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:35:15,324 INFO L290 TraceCheckUtils]: 13: Hoare triple {814#(<= (mod main_~y~0 4294967296) 0)} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {814#(<= (mod main_~y~0 4294967296) 0)} is VALID [2022-04-07 17:35:17,333 WARN L290 TraceCheckUtils]: 12: Hoare triple {847#(forall ((aux_mod_v_main_~y~0_32_31 Int)) (or (<= aux_mod_v_main_~y~0_32_31 0) (<= 4294967296 aux_mod_v_main_~y~0_32_31) (and (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~y~0_32_31 Int)) (not (= main_~y~0 (+ (* aux_div_v_main_~y~0_32_31 4294967296) aux_mod_v_main_~y~0_32_31))))) (or (not (< 0 (mod main_~z~0 4294967296))) (forall ((aux_div_v_main_~y~0_32_31 Int)) (or (not (< (+ (* aux_div_v_main_~y~0_32_31 4294967296) aux_mod_v_main_~y~0_32_31) main_~y~0)) (exists ((v_it_5 Int)) (and (<= (+ v_it_5 (* aux_div_v_main_~y~0_32_31 4294967296) aux_mod_v_main_~y~0_32_31 1) main_~y~0) (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5)))))))))} [107] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~y~0_10 (+ v_main_~y~0_11 v_main_~z~0_9 (* (- 1) v_main_~z~0_10))) (< 0 .cse0) (forall ((v_it_5 Int)) (or (not (<= (+ v_main_~z~0_9 v_it_5 1) v_main_~z~0_10)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)))) (< v_main_~z~0_9 v_main_~z~0_10)) (and (<= .cse0 0) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (= v_main_~y~0_11 v_main_~y~0_10) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {814#(<= (mod main_~y~0 4294967296) 0)} is UNKNOWN [2022-04-07 17:35:19,400 WARN L290 TraceCheckUtils]: 11: Hoare triple {851#(forall ((aux_mod_v_main_~y~0_32_31 Int)) (or (<= aux_mod_v_main_~y~0_32_31 0) (and (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~y~0_32_31 Int)) (not (= main_~y~0 (+ (* aux_div_v_main_~y~0_32_31 4294967296) aux_mod_v_main_~y~0_32_31))))) (or (not (< 0 (mod main_~z~0 4294967296))) (and (or (< 0 (mod (+ main_~z~0 aux_mod_v_main_~y~0_32_31 (* main_~y~0 4294967295)) 4294967296)) (forall ((aux_div_v_main_~y~0_32_31 Int)) (or (not (< (+ (* aux_div_v_main_~y~0_32_31 4294967296) aux_mod_v_main_~y~0_32_31) main_~y~0)) (exists ((v_it_5 Int)) (and (<= (+ v_it_5 (* aux_div_v_main_~y~0_32_31 4294967296) aux_mod_v_main_~y~0_32_31 1) main_~y~0) (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5)))))) (forall ((aux_div_v_main_~y~0_33_70 Int) (aux_mod_v_main_~y~0_33_70 Int) (aux_div_v_main_~y~0_32_31 Int)) (or (<= (+ (* main_~y~0 4294967296) main_~z~0) (+ (* aux_div_v_main_~y~0_33_70 4294967296) aux_mod_v_main_~y~0_33_70)) (exists ((v_it_5 Int)) (and (<= (+ v_it_5 (* aux_div_v_main_~y~0_33_70 4294967296) aux_mod_v_main_~y~0_33_70 1) (+ (* main_~y~0 4294967296) main_~z~0)) (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5))) (<= (+ (* aux_div_v_main_~y~0_33_70 4294967296) aux_mod_v_main_~y~0_33_70) (+ main_~z~0 (* aux_div_v_main_~y~0_32_31 4294967296) aux_mod_v_main_~y~0_32_31 (* main_~y~0 4294967295))) (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ aux_mod_v_main_~y~0_33_70 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ v_it_5 main_~z~0 (* aux_div_v_main_~y~0_32_31 4294967296) aux_mod_v_main_~y~0_32_31 (* main_~y~0 4294967295) 1) (+ (* aux_div_v_main_~y~0_33_70 4294967296) aux_mod_v_main_~y~0_33_70)))) (<= aux_mod_v_main_~y~0_33_70 0) (<= 4294967296 aux_mod_v_main_~y~0_33_70)))))) (<= 4294967296 aux_mod_v_main_~y~0_32_31)))} [107] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~y~0_10 (+ v_main_~y~0_11 v_main_~z~0_9 (* (- 1) v_main_~z~0_10))) (< 0 .cse0) (forall ((v_it_5 Int)) (or (not (<= (+ v_main_~z~0_9 v_it_5 1) v_main_~z~0_10)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)))) (< v_main_~z~0_9 v_main_~z~0_10)) (and (<= .cse0 0) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (= v_main_~y~0_11 v_main_~y~0_10) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {847#(forall ((aux_mod_v_main_~y~0_32_31 Int)) (or (<= aux_mod_v_main_~y~0_32_31 0) (<= 4294967296 aux_mod_v_main_~y~0_32_31) (and (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~y~0_32_31 Int)) (not (= main_~y~0 (+ (* aux_div_v_main_~y~0_32_31 4294967296) aux_mod_v_main_~y~0_32_31))))) (or (not (< 0 (mod main_~z~0 4294967296))) (forall ((aux_div_v_main_~y~0_32_31 Int)) (or (not (< (+ (* aux_div_v_main_~y~0_32_31 4294967296) aux_mod_v_main_~y~0_32_31) main_~y~0)) (exists ((v_it_5 Int)) (and (<= (+ v_it_5 (* aux_div_v_main_~y~0_32_31 4294967296) aux_mod_v_main_~y~0_32_31 1) main_~y~0) (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5)))))))))} is UNKNOWN [2022-04-07 17:35:21,532 WARN L290 TraceCheckUtils]: 10: Hoare triple {851#(forall ((aux_mod_v_main_~y~0_32_31 Int)) (or (<= aux_mod_v_main_~y~0_32_31 0) (and (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~y~0_32_31 Int)) (not (= main_~y~0 (+ (* aux_div_v_main_~y~0_32_31 4294967296) aux_mod_v_main_~y~0_32_31))))) (or (not (< 0 (mod main_~z~0 4294967296))) (and (or (< 0 (mod (+ main_~z~0 aux_mod_v_main_~y~0_32_31 (* main_~y~0 4294967295)) 4294967296)) (forall ((aux_div_v_main_~y~0_32_31 Int)) (or (not (< (+ (* aux_div_v_main_~y~0_32_31 4294967296) aux_mod_v_main_~y~0_32_31) main_~y~0)) (exists ((v_it_5 Int)) (and (<= (+ v_it_5 (* aux_div_v_main_~y~0_32_31 4294967296) aux_mod_v_main_~y~0_32_31 1) main_~y~0) (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5)))))) (forall ((aux_div_v_main_~y~0_33_70 Int) (aux_mod_v_main_~y~0_33_70 Int) (aux_div_v_main_~y~0_32_31 Int)) (or (<= (+ (* main_~y~0 4294967296) main_~z~0) (+ (* aux_div_v_main_~y~0_33_70 4294967296) aux_mod_v_main_~y~0_33_70)) (exists ((v_it_5 Int)) (and (<= (+ v_it_5 (* aux_div_v_main_~y~0_33_70 4294967296) aux_mod_v_main_~y~0_33_70 1) (+ (* main_~y~0 4294967296) main_~z~0)) (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5))) (<= (+ (* aux_div_v_main_~y~0_33_70 4294967296) aux_mod_v_main_~y~0_33_70) (+ main_~z~0 (* aux_div_v_main_~y~0_32_31 4294967296) aux_mod_v_main_~y~0_32_31 (* main_~y~0 4294967295))) (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ aux_mod_v_main_~y~0_33_70 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ v_it_5 main_~z~0 (* aux_div_v_main_~y~0_32_31 4294967296) aux_mod_v_main_~y~0_32_31 (* main_~y~0 4294967295) 1) (+ (* aux_div_v_main_~y~0_33_70 4294967296) aux_mod_v_main_~y~0_33_70)))) (<= aux_mod_v_main_~y~0_33_70 0) (<= 4294967296 aux_mod_v_main_~y~0_33_70)))))) (<= 4294967296 aux_mod_v_main_~y~0_32_31)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {851#(forall ((aux_mod_v_main_~y~0_32_31 Int)) (or (<= aux_mod_v_main_~y~0_32_31 0) (and (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~y~0_32_31 Int)) (not (= main_~y~0 (+ (* aux_div_v_main_~y~0_32_31 4294967296) aux_mod_v_main_~y~0_32_31))))) (or (not (< 0 (mod main_~z~0 4294967296))) (and (or (< 0 (mod (+ main_~z~0 aux_mod_v_main_~y~0_32_31 (* main_~y~0 4294967295)) 4294967296)) (forall ((aux_div_v_main_~y~0_32_31 Int)) (or (not (< (+ (* aux_div_v_main_~y~0_32_31 4294967296) aux_mod_v_main_~y~0_32_31) main_~y~0)) (exists ((v_it_5 Int)) (and (<= (+ v_it_5 (* aux_div_v_main_~y~0_32_31 4294967296) aux_mod_v_main_~y~0_32_31 1) main_~y~0) (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5)))))) (forall ((aux_div_v_main_~y~0_33_70 Int) (aux_mod_v_main_~y~0_33_70 Int) (aux_div_v_main_~y~0_32_31 Int)) (or (<= (+ (* main_~y~0 4294967296) main_~z~0) (+ (* aux_div_v_main_~y~0_33_70 4294967296) aux_mod_v_main_~y~0_33_70)) (exists ((v_it_5 Int)) (and (<= (+ v_it_5 (* aux_div_v_main_~y~0_33_70 4294967296) aux_mod_v_main_~y~0_33_70 1) (+ (* main_~y~0 4294967296) main_~z~0)) (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5))) (<= (+ (* aux_div_v_main_~y~0_33_70 4294967296) aux_mod_v_main_~y~0_33_70) (+ main_~z~0 (* aux_div_v_main_~y~0_32_31 4294967296) aux_mod_v_main_~y~0_32_31 (* main_~y~0 4294967295))) (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ aux_mod_v_main_~y~0_33_70 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ v_it_5 main_~z~0 (* aux_div_v_main_~y~0_32_31 4294967296) aux_mod_v_main_~y~0_32_31 (* main_~y~0 4294967295) 1) (+ (* aux_div_v_main_~y~0_33_70 4294967296) aux_mod_v_main_~y~0_33_70)))) (<= aux_mod_v_main_~y~0_33_70 0) (<= 4294967296 aux_mod_v_main_~y~0_33_70)))))) (<= 4294967296 aux_mod_v_main_~y~0_32_31)))} is UNKNOWN [2022-04-07 17:35:23,599 WARN L290 TraceCheckUtils]: 9: Hoare triple {858#(or (not (< 0 (mod main_~z~0 4294967296))) (forall ((aux_mod_main_~y~0_26 Int) (aux_mod_v_main_~y~0_32_31 Int)) (or (<= aux_mod_v_main_~y~0_32_31 0) (<= 4294967296 aux_mod_v_main_~y~0_32_31) (< aux_mod_main_~y~0_26 0) (< 0 aux_mod_main_~y~0_26) (and (or (< 0 (mod (+ main_~z~0 aux_mod_v_main_~y~0_32_31 (* aux_mod_main_~y~0_26 4294967295)) 4294967296)) (forall ((aux_div_main_~y~0_26 Int) (aux_div_v_main_~y~0_32_31 Int)) (or (not (< (+ (* aux_div_v_main_~y~0_32_31 4294967296) aux_mod_v_main_~y~0_32_31) (+ aux_mod_main_~y~0_26 (* 4294967296 aux_div_main_~y~0_26)))) (exists ((v_it_5 Int)) (and (<= (+ v_it_5 (* aux_div_v_main_~y~0_32_31 4294967296) aux_mod_v_main_~y~0_32_31 1) (+ aux_mod_main_~y~0_26 (* 4294967296 aux_div_main_~y~0_26))) (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5)))))) (forall ((aux_div_v_main_~y~0_33_70 Int) (aux_div_main_~y~0_26 Int) (aux_mod_v_main_~y~0_33_70 Int) (aux_div_v_main_~y~0_32_31 Int)) (or (<= (+ (* aux_div_v_main_~y~0_33_70 4294967296) aux_mod_v_main_~y~0_33_70) (+ main_~z~0 (* aux_div_v_main_~y~0_32_31 4294967296) aux_mod_v_main_~y~0_32_31 (* aux_mod_main_~y~0_26 4294967295) (* 18446744069414584320 aux_div_main_~y~0_26))) (<= aux_mod_v_main_~y~0_33_70 0) (<= 4294967296 aux_mod_v_main_~y~0_33_70) (exists ((v_it_5 Int)) (and (<= (+ v_it_5 (* aux_div_v_main_~y~0_33_70 4294967296) aux_mod_v_main_~y~0_33_70 1) (+ (* aux_mod_main_~y~0_26 4294967296) main_~z~0 (* 18446744073709551616 aux_div_main_~y~0_26))) (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5))) (<= (+ (* aux_mod_main_~y~0_26 4294967296) main_~z~0 (* 18446744073709551616 aux_div_main_~y~0_26)) (+ (* aux_div_v_main_~y~0_33_70 4294967296) aux_mod_v_main_~y~0_33_70)) (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ aux_mod_v_main_~y~0_33_70 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ v_it_5 main_~z~0 (* aux_div_v_main_~y~0_32_31 4294967296) aux_mod_v_main_~y~0_32_31 (* aux_mod_main_~y~0_26 4294967295) (* 18446744069414584320 aux_div_main_~y~0_26) 1) (+ (* aux_div_v_main_~y~0_33_70 4294967296) aux_mod_v_main_~y~0_33_70))))))))))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {851#(forall ((aux_mod_v_main_~y~0_32_31 Int)) (or (<= aux_mod_v_main_~y~0_32_31 0) (and (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~y~0_32_31 Int)) (not (= main_~y~0 (+ (* aux_div_v_main_~y~0_32_31 4294967296) aux_mod_v_main_~y~0_32_31))))) (or (not (< 0 (mod main_~z~0 4294967296))) (and (or (< 0 (mod (+ main_~z~0 aux_mod_v_main_~y~0_32_31 (* main_~y~0 4294967295)) 4294967296)) (forall ((aux_div_v_main_~y~0_32_31 Int)) (or (not (< (+ (* aux_div_v_main_~y~0_32_31 4294967296) aux_mod_v_main_~y~0_32_31) main_~y~0)) (exists ((v_it_5 Int)) (and (<= (+ v_it_5 (* aux_div_v_main_~y~0_32_31 4294967296) aux_mod_v_main_~y~0_32_31 1) main_~y~0) (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5)))))) (forall ((aux_div_v_main_~y~0_33_70 Int) (aux_mod_v_main_~y~0_33_70 Int) (aux_div_v_main_~y~0_32_31 Int)) (or (<= (+ (* main_~y~0 4294967296) main_~z~0) (+ (* aux_div_v_main_~y~0_33_70 4294967296) aux_mod_v_main_~y~0_33_70)) (exists ((v_it_5 Int)) (and (<= (+ v_it_5 (* aux_div_v_main_~y~0_33_70 4294967296) aux_mod_v_main_~y~0_33_70 1) (+ (* main_~y~0 4294967296) main_~z~0)) (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5))) (<= (+ (* aux_div_v_main_~y~0_33_70 4294967296) aux_mod_v_main_~y~0_33_70) (+ main_~z~0 (* aux_div_v_main_~y~0_32_31 4294967296) aux_mod_v_main_~y~0_32_31 (* main_~y~0 4294967295))) (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ aux_mod_v_main_~y~0_33_70 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ v_it_5 main_~z~0 (* aux_div_v_main_~y~0_32_31 4294967296) aux_mod_v_main_~y~0_32_31 (* main_~y~0 4294967295) 1) (+ (* aux_div_v_main_~y~0_33_70 4294967296) aux_mod_v_main_~y~0_33_70)))) (<= aux_mod_v_main_~y~0_33_70 0) (<= 4294967296 aux_mod_v_main_~y~0_33_70)))))) (<= 4294967296 aux_mod_v_main_~y~0_32_31)))} is UNKNOWN [2022-04-07 17:35:23,601 INFO L290 TraceCheckUtils]: 8: Hoare triple {762#true} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {858#(or (not (< 0 (mod main_~z~0 4294967296))) (forall ((aux_mod_main_~y~0_26 Int) (aux_mod_v_main_~y~0_32_31 Int)) (or (<= aux_mod_v_main_~y~0_32_31 0) (<= 4294967296 aux_mod_v_main_~y~0_32_31) (< aux_mod_main_~y~0_26 0) (< 0 aux_mod_main_~y~0_26) (and (or (< 0 (mod (+ main_~z~0 aux_mod_v_main_~y~0_32_31 (* aux_mod_main_~y~0_26 4294967295)) 4294967296)) (forall ((aux_div_main_~y~0_26 Int) (aux_div_v_main_~y~0_32_31 Int)) (or (not (< (+ (* aux_div_v_main_~y~0_32_31 4294967296) aux_mod_v_main_~y~0_32_31) (+ aux_mod_main_~y~0_26 (* 4294967296 aux_div_main_~y~0_26)))) (exists ((v_it_5 Int)) (and (<= (+ v_it_5 (* aux_div_v_main_~y~0_32_31 4294967296) aux_mod_v_main_~y~0_32_31 1) (+ aux_mod_main_~y~0_26 (* 4294967296 aux_div_main_~y~0_26))) (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5)))))) (forall ((aux_div_v_main_~y~0_33_70 Int) (aux_div_main_~y~0_26 Int) (aux_mod_v_main_~y~0_33_70 Int) (aux_div_v_main_~y~0_32_31 Int)) (or (<= (+ (* aux_div_v_main_~y~0_33_70 4294967296) aux_mod_v_main_~y~0_33_70) (+ main_~z~0 (* aux_div_v_main_~y~0_32_31 4294967296) aux_mod_v_main_~y~0_32_31 (* aux_mod_main_~y~0_26 4294967295) (* 18446744069414584320 aux_div_main_~y~0_26))) (<= aux_mod_v_main_~y~0_33_70 0) (<= 4294967296 aux_mod_v_main_~y~0_33_70) (exists ((v_it_5 Int)) (and (<= (+ v_it_5 (* aux_div_v_main_~y~0_33_70 4294967296) aux_mod_v_main_~y~0_33_70 1) (+ (* aux_mod_main_~y~0_26 4294967296) main_~z~0 (* 18446744073709551616 aux_div_main_~y~0_26))) (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5))) (<= (+ (* aux_mod_main_~y~0_26 4294967296) main_~z~0 (* 18446744073709551616 aux_div_main_~y~0_26)) (+ (* aux_div_v_main_~y~0_33_70 4294967296) aux_mod_v_main_~y~0_33_70)) (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ aux_mod_v_main_~y~0_33_70 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ v_it_5 main_~z~0 (* aux_div_v_main_~y~0_32_31 4294967296) aux_mod_v_main_~y~0_32_31 (* aux_mod_main_~y~0_26 4294967295) (* 18446744069414584320 aux_div_main_~y~0_26) 1) (+ (* aux_div_v_main_~y~0_33_70 4294967296) aux_mod_v_main_~y~0_33_70))))))))))} is VALID [2022-04-07 17:35:23,601 INFO L290 TraceCheckUtils]: 7: Hoare triple {762#true} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {762#true} is VALID [2022-04-07 17:35:23,601 INFO L290 TraceCheckUtils]: 6: Hoare triple {762#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {762#true} is VALID [2022-04-07 17:35:23,602 INFO L290 TraceCheckUtils]: 5: Hoare triple {762#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {762#true} is VALID [2022-04-07 17:35:23,602 INFO L272 TraceCheckUtils]: 4: Hoare triple {762#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {762#true} is VALID [2022-04-07 17:35:23,602 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {762#true} {762#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {762#true} is VALID [2022-04-07 17:35:23,602 INFO L290 TraceCheckUtils]: 2: Hoare triple {762#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {762#true} is VALID [2022-04-07 17:35:23,602 INFO L290 TraceCheckUtils]: 1: Hoare triple {762#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {762#true} is VALID [2022-04-07 17:35:23,602 INFO L272 TraceCheckUtils]: 0: Hoare triple {762#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {762#true} is VALID [2022-04-07 17:35:23,602 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 2 refuted. 1 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:35:23,603 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [431025689] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 17:35:23,603 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 17:35:23,603 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7, 8] total 16 [2022-04-07 17:35:23,603 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2075158235] [2022-04-07 17:35:23,603 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 17:35:23,604 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 1.9375) internal successors, (31), 13 states have internal predecessors, (31), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-07 17:35:23,604 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:35:23,604 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 16 states, 16 states have (on average 1.9375) internal successors, (31), 13 states have internal predecessors, (31), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:35:30,197 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 37 edges. 34 inductive. 0 not inductive. 3 times theorem prover too weak to decide inductivity. [2022-04-07 17:35:30,197 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2022-04-07 17:35:30,197 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:35:30,197 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2022-04-07 17:35:30,198 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=48, Invalid=180, Unknown=12, NotChecked=0, Total=240 [2022-04-07 17:35:30,198 INFO L87 Difference]: Start difference. First operand 25 states and 35 transitions. Second operand has 16 states, 16 states have (on average 1.9375) internal successors, (31), 13 states have internal predecessors, (31), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:35:41,323 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:35:41,323 INFO L93 Difference]: Finished difference Result 42 states and 59 transitions. [2022-04-07 17:35:41,323 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-04-07 17:35:41,323 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 1.9375) internal successors, (31), 13 states have internal predecessors, (31), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-07 17:35:41,323 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:35:41,323 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 1.9375) internal successors, (31), 13 states have internal predecessors, (31), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:35:41,325 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 51 transitions. [2022-04-07 17:35:41,325 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 1.9375) internal successors, (31), 13 states have internal predecessors, (31), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:35:41,326 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 51 transitions. [2022-04-07 17:35:41,327 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 12 states and 51 transitions. [2022-04-07 17:35:41,375 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 51 edges. 51 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:35:41,376 INFO L225 Difference]: With dead ends: 42 [2022-04-07 17:35:41,376 INFO L226 Difference]: Without dead ends: 32 [2022-04-07 17:35:41,376 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 55 GetRequests, 30 SyntacticMatches, 4 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 97 ImplicationChecksByTransitivity, 49.0s TimeCoverageRelationStatistics Valid=104, Invalid=386, Unknown=16, NotChecked=0, Total=506 [2022-04-07 17:35:41,378 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 37 mSDsluCounter, 65 mSDsCounter, 0 mSdLazyCounter, 72 mSolverCounterSat, 14 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 37 SdHoareTripleChecker+Valid, 77 SdHoareTripleChecker+Invalid, 129 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 14 IncrementalHoareTripleChecker+Valid, 72 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 43 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-07 17:35:41,378 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [37 Valid, 77 Invalid, 129 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [14 Valid, 72 Invalid, 0 Unknown, 43 Unchecked, 0.2s Time] [2022-04-07 17:35:41,378 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states. [2022-04-07 17:35:41,379 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 24. [2022-04-07 17:35:41,380 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:35:41,380 INFO L82 GeneralOperation]: Start isEquivalent. First operand 32 states. Second operand has 24 states, 19 states have (on average 1.4736842105263157) internal successors, (28), 19 states have internal predecessors, (28), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:35:41,380 INFO L74 IsIncluded]: Start isIncluded. First operand 32 states. Second operand has 24 states, 19 states have (on average 1.4736842105263157) internal successors, (28), 19 states have internal predecessors, (28), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:35:41,380 INFO L87 Difference]: Start difference. First operand 32 states. Second operand has 24 states, 19 states have (on average 1.4736842105263157) internal successors, (28), 19 states have internal predecessors, (28), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:35:41,381 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:35:41,381 INFO L93 Difference]: Finished difference Result 32 states and 45 transitions. [2022-04-07 17:35:41,381 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 45 transitions. [2022-04-07 17:35:41,381 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:35:41,381 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:35:41,381 INFO L74 IsIncluded]: Start isIncluded. First operand has 24 states, 19 states have (on average 1.4736842105263157) internal successors, (28), 19 states have internal predecessors, (28), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 32 states. [2022-04-07 17:35:41,382 INFO L87 Difference]: Start difference. First operand has 24 states, 19 states have (on average 1.4736842105263157) internal successors, (28), 19 states have internal predecessors, (28), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 32 states. [2022-04-07 17:35:41,382 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:35:41,383 INFO L93 Difference]: Finished difference Result 32 states and 45 transitions. [2022-04-07 17:35:41,383 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 45 transitions. [2022-04-07 17:35:41,383 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:35:41,383 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:35:41,383 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:35:41,383 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:35:41,383 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 19 states have (on average 1.4736842105263157) internal successors, (28), 19 states have internal predecessors, (28), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:35:41,384 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 32 transitions. [2022-04-07 17:35:41,384 INFO L78 Accepts]: Start accepts. Automaton has 24 states and 32 transitions. Word has length 18 [2022-04-07 17:35:41,384 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:35:41,384 INFO L478 AbstractCegarLoop]: Abstraction has 24 states and 32 transitions. [2022-04-07 17:35:41,384 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 1.9375) internal successors, (31), 13 states have internal predecessors, (31), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:35:41,384 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 32 transitions. [2022-04-07 17:35:41,385 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-04-07 17:35:41,385 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:35:41,385 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:35:41,401 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Ended with exit code 0 [2022-04-07 17:35:41,591 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:35:41,592 INFO L403 AbstractCegarLoop]: === Iteration 6 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:35:41,592 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:35:41,592 INFO L85 PathProgramCache]: Analyzing trace with hash 760455623, now seen corresponding path program 1 times [2022-04-07 17:35:41,592 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:35:41,592 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1648434671] [2022-04-07 17:35:41,592 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:35:41,592 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:35:41,611 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.0))) (+ .cse0 main_~x~0_5 (* (- 4294967296) (div (+ .cse0 main_~x~0_5) 4294967296)))) 0)) [2022-04-07 17:35:41,613 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.1))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-07 17:35:41,620 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:35:41,628 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.2))) (+ .cse0 main_~x~0_5 (* (- 4294967296) (div (+ .cse0 main_~x~0_5) 4294967296)))) 0)) [2022-04-07 17:35:41,630 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.3))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-07 17:35:41,925 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:35:41,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:35:41,929 INFO L290 TraceCheckUtils]: 0: Hoare triple {1046#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1034#true} is VALID [2022-04-07 17:35:41,929 INFO L290 TraceCheckUtils]: 1: Hoare triple {1034#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1034#true} is VALID [2022-04-07 17:35:41,929 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1034#true} {1034#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1034#true} is VALID [2022-04-07 17:35:41,930 INFO L272 TraceCheckUtils]: 0: Hoare triple {1034#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1046#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:35:41,930 INFO L290 TraceCheckUtils]: 1: Hoare triple {1046#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1034#true} is VALID [2022-04-07 17:35:41,930 INFO L290 TraceCheckUtils]: 2: Hoare triple {1034#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1034#true} is VALID [2022-04-07 17:35:41,930 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1034#true} {1034#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1034#true} is VALID [2022-04-07 17:35:41,930 INFO L272 TraceCheckUtils]: 4: Hoare triple {1034#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1034#true} is VALID [2022-04-07 17:35:41,931 INFO L290 TraceCheckUtils]: 5: Hoare triple {1034#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1039#(= main_~y~0 0)} is VALID [2022-04-07 17:35:41,931 INFO L290 TraceCheckUtils]: 6: Hoare triple {1039#(= main_~y~0 0)} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1040#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:35:41,932 INFO L290 TraceCheckUtils]: 7: Hoare triple {1040#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1040#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:35:41,933 INFO L290 TraceCheckUtils]: 8: Hoare triple {1040#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1041#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)) (= main_~y~0 0))} is VALID [2022-04-07 17:35:41,933 INFO L290 TraceCheckUtils]: 9: Hoare triple {1041#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)) (= main_~y~0 0))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1041#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)) (= main_~y~0 0))} is VALID [2022-04-07 17:35:41,934 INFO L290 TraceCheckUtils]: 10: Hoare triple {1041#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)) (= main_~y~0 0))} [104] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (< v_main_~x~0_6 v_main_~x~0_7) (= (+ (* (- 1) v_main_~x~0_6) v_main_~x~0_7 v_main_~y~0_8) v_main_~y~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_8 v_main_~y~0_7) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_8, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {1042#(and (<= 0 main_~y~0) (<= main_~y~0 0) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} is VALID [2022-04-07 17:35:41,935 INFO L290 TraceCheckUtils]: 11: Hoare triple {1042#(and (<= 0 main_~y~0) (<= main_~y~0 0) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1042#(and (<= 0 main_~y~0) (<= main_~y~0 0) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} is VALID [2022-04-07 17:35:41,936 INFO L290 TraceCheckUtils]: 12: Hoare triple {1042#(and (<= 0 main_~y~0) (<= main_~y~0 0) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} [107] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~y~0_10 (+ v_main_~y~0_11 v_main_~z~0_9 (* (- 1) v_main_~z~0_10))) (< 0 .cse0) (forall ((v_it_5 Int)) (or (not (<= (+ v_main_~z~0_9 v_it_5 1) v_main_~z~0_10)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)))) (< v_main_~z~0_9 v_main_~z~0_10)) (and (<= .cse0 0) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (= v_main_~y~0_11 v_main_~y~0_10) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {1043#(and (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (not (<= (+ (div main_~y~0 4294967296) 1) 0)))} is VALID [2022-04-07 17:35:41,937 INFO L290 TraceCheckUtils]: 13: Hoare triple {1043#(and (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (not (<= (+ (div main_~y~0 4294967296) 1) 0)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1043#(and (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (not (<= (+ (div main_~y~0 4294967296) 1) 0)))} is VALID [2022-04-07 17:35:41,943 INFO L272 TraceCheckUtils]: 14: Hoare triple {1043#(and (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (not (<= (+ (div main_~y~0 4294967296) 1) 0)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {1044#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:35:41,943 INFO L290 TraceCheckUtils]: 15: Hoare triple {1044#(not (= |__VERIFIER_assert_#in~cond| 0))} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1045#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:35:41,944 INFO L290 TraceCheckUtils]: 16: Hoare triple {1045#(not (= __VERIFIER_assert_~cond 0))} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1035#false} is VALID [2022-04-07 17:35:41,944 INFO L290 TraceCheckUtils]: 17: Hoare triple {1035#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1035#false} is VALID [2022-04-07 17:35:41,944 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:35:41,944 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:35:41,944 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1648434671] [2022-04-07 17:35:41,944 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1648434671] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:35:41,944 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1845924292] [2022-04-07 17:35:41,944 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:35:41,945 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:35:41,945 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:35:41,947 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:35:41,948 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-04-07 17:35:41,999 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:35:42,000 INFO L263 TraceCheckSpWp]: Trace formula consists of 63 conjuncts, 8 conjunts are in the unsatisfiable core [2022-04-07 17:35:42,014 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:35:42,015 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:35:43,133 INFO L272 TraceCheckUtils]: 0: Hoare triple {1034#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1034#true} is VALID [2022-04-07 17:35:43,133 INFO L290 TraceCheckUtils]: 1: Hoare triple {1034#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1034#true} is VALID [2022-04-07 17:35:43,133 INFO L290 TraceCheckUtils]: 2: Hoare triple {1034#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1034#true} is VALID [2022-04-07 17:35:43,134 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1034#true} {1034#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1034#true} is VALID [2022-04-07 17:35:43,134 INFO L272 TraceCheckUtils]: 4: Hoare triple {1034#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1034#true} is VALID [2022-04-07 17:35:43,134 INFO L290 TraceCheckUtils]: 5: Hoare triple {1034#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1034#true} is VALID [2022-04-07 17:35:43,135 INFO L290 TraceCheckUtils]: 6: Hoare triple {1034#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1068#(not (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-07 17:35:43,136 INFO L290 TraceCheckUtils]: 7: Hoare triple {1068#(not (< 0 (mod main_~x~0 4294967296)))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1068#(not (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-07 17:35:43,136 INFO L290 TraceCheckUtils]: 8: Hoare triple {1068#(not (< 0 (mod main_~x~0 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1075#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-07 17:35:43,136 INFO L290 TraceCheckUtils]: 9: Hoare triple {1075#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1079#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-07 17:35:43,137 INFO L290 TraceCheckUtils]: 10: Hoare triple {1079#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} [104] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (< v_main_~x~0_6 v_main_~x~0_7) (= (+ (* (- 1) v_main_~x~0_6) v_main_~x~0_7 v_main_~y~0_8) v_main_~y~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_8 v_main_~y~0_7) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_8, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {1083#(and (<= (mod main_~y~0 4294967296) 0) (<= (mod main_~z~0 4294967296) 0))} is VALID [2022-04-07 17:35:43,138 INFO L290 TraceCheckUtils]: 11: Hoare triple {1083#(and (<= (mod main_~y~0 4294967296) 0) (<= (mod main_~z~0 4294967296) 0))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1083#(and (<= (mod main_~y~0 4294967296) 0) (<= (mod main_~z~0 4294967296) 0))} is VALID [2022-04-07 17:35:43,138 INFO L290 TraceCheckUtils]: 12: Hoare triple {1083#(and (<= (mod main_~y~0 4294967296) 0) (<= (mod main_~z~0 4294967296) 0))} [107] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~y~0_10 (+ v_main_~y~0_11 v_main_~z~0_9 (* (- 1) v_main_~z~0_10))) (< 0 .cse0) (forall ((v_it_5 Int)) (or (not (<= (+ v_main_~z~0_9 v_it_5 1) v_main_~z~0_10)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)))) (< v_main_~z~0_9 v_main_~z~0_10)) (and (<= .cse0 0) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (= v_main_~y~0_11 v_main_~y~0_10) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {1090#(<= (mod main_~y~0 4294967296) 0)} is VALID [2022-04-07 17:35:43,139 INFO L290 TraceCheckUtils]: 13: Hoare triple {1090#(<= (mod main_~y~0 4294967296) 0)} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1090#(<= (mod main_~y~0 4294967296) 0)} is VALID [2022-04-07 17:35:43,140 INFO L272 TraceCheckUtils]: 14: Hoare triple {1090#(<= (mod main_~y~0 4294967296) 0)} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {1097#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:35:43,141 INFO L290 TraceCheckUtils]: 15: Hoare triple {1097#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1101#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:35:43,141 INFO L290 TraceCheckUtils]: 16: Hoare triple {1101#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1035#false} is VALID [2022-04-07 17:35:43,141 INFO L290 TraceCheckUtils]: 17: Hoare triple {1035#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1035#false} is VALID [2022-04-07 17:35:43,141 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:35:43,141 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 17:36:01,269 WARN L833 $PredicateComparison]: unable to prove that (forall ((aux_mod_v_main_~y~0_36_31 Int) (v_main_~y~0_37 Int)) (or (<= 4294967296 aux_mod_v_main_~y~0_36_31) (let ((.cse0 (< 0 (mod c_main_~z~0 4294967296)))) (and (or .cse0 (forall ((aux_div_v_main_~y~0_36_31 Int)) (not (= v_main_~y~0_37 (+ (* aux_div_v_main_~y~0_36_31 4294967296) aux_mod_v_main_~y~0_36_31))))) (or (not .cse0) (forall ((aux_div_v_main_~y~0_36_31 Int)) (or (not (< (+ (* aux_div_v_main_~y~0_36_31 4294967296) aux_mod_v_main_~y~0_36_31) v_main_~y~0_37)) (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ (* v_it_5 4294967295) c_main_~z~0) 4294967296))) (<= 1 v_it_5) (<= (+ (* aux_div_v_main_~y~0_36_31 4294967296) v_it_5 aux_mod_v_main_~y~0_36_31 1) v_main_~y~0_37)))))))) (<= aux_mod_v_main_~y~0_36_31 0) (let ((.cse1 (< 0 (mod c_main_~x~0 4294967296)))) (and (or (not (= v_main_~y~0_37 c_main_~y~0)) .cse1) (or (not .cse1) (exists ((v_it_4 Int)) (and (<= (+ v_it_4 c_main_~y~0 1) v_main_~y~0_37) (not (< 0 (mod (+ (* v_it_4 4294967295) c_main_~x~0) 4294967296))) (<= 1 v_it_4))) (not (< c_main_~y~0 v_main_~y~0_37))))))) is different from false [2022-04-07 17:36:19,394 INFO L290 TraceCheckUtils]: 17: Hoare triple {1035#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1035#false} is VALID [2022-04-07 17:36:19,395 INFO L290 TraceCheckUtils]: 16: Hoare triple {1101#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1035#false} is VALID [2022-04-07 17:36:19,395 INFO L290 TraceCheckUtils]: 15: Hoare triple {1097#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1101#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:36:19,396 INFO L272 TraceCheckUtils]: 14: Hoare triple {1090#(<= (mod main_~y~0 4294967296) 0)} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {1097#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:36:19,396 INFO L290 TraceCheckUtils]: 13: Hoare triple {1090#(<= (mod main_~y~0 4294967296) 0)} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1090#(<= (mod main_~y~0 4294967296) 0)} is VALID [2022-04-07 17:36:19,491 INFO L290 TraceCheckUtils]: 12: Hoare triple {1123#(forall ((aux_mod_v_main_~y~0_36_31 Int)) (or (<= 4294967296 aux_mod_v_main_~y~0_36_31) (<= aux_mod_v_main_~y~0_36_31 0) (and (or (not (< 0 (mod main_~z~0 4294967296))) (forall ((aux_div_v_main_~y~0_36_31 Int)) (or (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ (* aux_div_v_main_~y~0_36_31 4294967296) v_it_5 aux_mod_v_main_~y~0_36_31 1) main_~y~0))) (not (< (+ (* aux_div_v_main_~y~0_36_31 4294967296) aux_mod_v_main_~y~0_36_31) main_~y~0))))) (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~y~0_36_31 Int)) (not (= (+ (* aux_div_v_main_~y~0_36_31 4294967296) aux_mod_v_main_~y~0_36_31) main_~y~0)))))))} [107] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~y~0_10 (+ v_main_~y~0_11 v_main_~z~0_9 (* (- 1) v_main_~z~0_10))) (< 0 .cse0) (forall ((v_it_5 Int)) (or (not (<= (+ v_main_~z~0_9 v_it_5 1) v_main_~z~0_10)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)))) (< v_main_~z~0_9 v_main_~z~0_10)) (and (<= .cse0 0) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (= v_main_~y~0_11 v_main_~y~0_10) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {1090#(<= (mod main_~y~0 4294967296) 0)} is VALID [2022-04-07 17:36:21,512 WARN L290 TraceCheckUtils]: 11: Hoare triple {1123#(forall ((aux_mod_v_main_~y~0_36_31 Int)) (or (<= 4294967296 aux_mod_v_main_~y~0_36_31) (<= aux_mod_v_main_~y~0_36_31 0) (and (or (not (< 0 (mod main_~z~0 4294967296))) (forall ((aux_div_v_main_~y~0_36_31 Int)) (or (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ (* aux_div_v_main_~y~0_36_31 4294967296) v_it_5 aux_mod_v_main_~y~0_36_31 1) main_~y~0))) (not (< (+ (* aux_div_v_main_~y~0_36_31 4294967296) aux_mod_v_main_~y~0_36_31) main_~y~0))))) (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~y~0_36_31 Int)) (not (= (+ (* aux_div_v_main_~y~0_36_31 4294967296) aux_mod_v_main_~y~0_36_31) main_~y~0)))))))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1123#(forall ((aux_mod_v_main_~y~0_36_31 Int)) (or (<= 4294967296 aux_mod_v_main_~y~0_36_31) (<= aux_mod_v_main_~y~0_36_31 0) (and (or (not (< 0 (mod main_~z~0 4294967296))) (forall ((aux_div_v_main_~y~0_36_31 Int)) (or (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ (* aux_div_v_main_~y~0_36_31 4294967296) v_it_5 aux_mod_v_main_~y~0_36_31 1) main_~y~0))) (not (< (+ (* aux_div_v_main_~y~0_36_31 4294967296) aux_mod_v_main_~y~0_36_31) main_~y~0))))) (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~y~0_36_31 Int)) (not (= (+ (* aux_div_v_main_~y~0_36_31 4294967296) aux_mod_v_main_~y~0_36_31) main_~y~0)))))))} is UNKNOWN [2022-04-07 17:36:23,524 WARN L290 TraceCheckUtils]: 10: Hoare triple {1130#(forall ((aux_mod_v_main_~y~0_36_31 Int) (v_main_~y~0_37 Int)) (or (and (or (not (< 0 (mod main_~z~0 4294967296))) (forall ((aux_div_v_main_~y~0_36_31 Int)) (or (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ (* aux_div_v_main_~y~0_36_31 4294967296) v_it_5 aux_mod_v_main_~y~0_36_31 1) v_main_~y~0_37))) (not (< (+ (* aux_div_v_main_~y~0_36_31 4294967296) aux_mod_v_main_~y~0_36_31) v_main_~y~0_37))))) (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~y~0_36_31 Int)) (not (= v_main_~y~0_37 (+ (* aux_div_v_main_~y~0_36_31 4294967296) aux_mod_v_main_~y~0_36_31)))))) (<= 4294967296 aux_mod_v_main_~y~0_36_31) (and (or (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) v_main_~y~0_37) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))) (not (< main_~y~0 v_main_~y~0_37)) (not (< 0 (mod main_~x~0 4294967296)))) (or (not (= v_main_~y~0_37 main_~y~0)) (< 0 (mod main_~x~0 4294967296)))) (<= aux_mod_v_main_~y~0_36_31 0)))} [104] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (< v_main_~x~0_6 v_main_~x~0_7) (= (+ (* (- 1) v_main_~x~0_6) v_main_~x~0_7 v_main_~y~0_8) v_main_~y~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_8 v_main_~y~0_7) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_8, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {1123#(forall ((aux_mod_v_main_~y~0_36_31 Int)) (or (<= 4294967296 aux_mod_v_main_~y~0_36_31) (<= aux_mod_v_main_~y~0_36_31 0) (and (or (not (< 0 (mod main_~z~0 4294967296))) (forall ((aux_div_v_main_~y~0_36_31 Int)) (or (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ (* aux_div_v_main_~y~0_36_31 4294967296) v_it_5 aux_mod_v_main_~y~0_36_31 1) main_~y~0))) (not (< (+ (* aux_div_v_main_~y~0_36_31 4294967296) aux_mod_v_main_~y~0_36_31) main_~y~0))))) (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~y~0_36_31 Int)) (not (= (+ (* aux_div_v_main_~y~0_36_31 4294967296) aux_mod_v_main_~y~0_36_31) main_~y~0)))))))} is UNKNOWN [2022-04-07 17:36:25,538 WARN L290 TraceCheckUtils]: 9: Hoare triple {1134#(forall ((aux_mod_v_main_~y~0_36_31 Int) (aux_mod_main_~y~0_26 Int) (v_main_~y~0_37 Int)) (or (and (or (forall ((aux_div_main_~y~0_26 Int)) (not (= v_main_~y~0_37 (+ aux_mod_main_~y~0_26 (* 4294967296 aux_div_main_~y~0_26))))) (< 0 (mod main_~x~0 4294967296))) (or (forall ((aux_div_main_~y~0_26 Int)) (or (not (< (+ aux_mod_main_~y~0_26 (* 4294967296 aux_div_main_~y~0_26)) v_main_~y~0_37)) (exists ((v_it_4 Int)) (and (<= (+ aux_mod_main_~y~0_26 v_it_4 (* 4294967296 aux_div_main_~y~0_26) 1) v_main_~y~0_37) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))))) (not (< 0 (mod main_~x~0 4294967296))))) (< aux_mod_main_~y~0_26 0) (and (or (not (< 0 (mod main_~z~0 4294967296))) (forall ((aux_div_v_main_~y~0_36_31 Int)) (or (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ (* aux_div_v_main_~y~0_36_31 4294967296) v_it_5 aux_mod_v_main_~y~0_36_31 1) v_main_~y~0_37))) (not (< (+ (* aux_div_v_main_~y~0_36_31 4294967296) aux_mod_v_main_~y~0_36_31) v_main_~y~0_37))))) (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~y~0_36_31 Int)) (not (= v_main_~y~0_37 (+ (* aux_div_v_main_~y~0_36_31 4294967296) aux_mod_v_main_~y~0_36_31)))))) (<= 4294967296 aux_mod_v_main_~y~0_36_31) (< 0 aux_mod_main_~y~0_26) (<= aux_mod_v_main_~y~0_36_31 0)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1130#(forall ((aux_mod_v_main_~y~0_36_31 Int) (v_main_~y~0_37 Int)) (or (and (or (not (< 0 (mod main_~z~0 4294967296))) (forall ((aux_div_v_main_~y~0_36_31 Int)) (or (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ (* aux_div_v_main_~y~0_36_31 4294967296) v_it_5 aux_mod_v_main_~y~0_36_31 1) v_main_~y~0_37))) (not (< (+ (* aux_div_v_main_~y~0_36_31 4294967296) aux_mod_v_main_~y~0_36_31) v_main_~y~0_37))))) (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~y~0_36_31 Int)) (not (= v_main_~y~0_37 (+ (* aux_div_v_main_~y~0_36_31 4294967296) aux_mod_v_main_~y~0_36_31)))))) (<= 4294967296 aux_mod_v_main_~y~0_36_31) (and (or (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) v_main_~y~0_37) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))) (not (< main_~y~0 v_main_~y~0_37)) (not (< 0 (mod main_~x~0 4294967296)))) (or (not (= v_main_~y~0_37 main_~y~0)) (< 0 (mod main_~x~0 4294967296)))) (<= aux_mod_v_main_~y~0_36_31 0)))} is UNKNOWN [2022-04-07 17:36:25,546 INFO L290 TraceCheckUtils]: 8: Hoare triple {1068#(not (< 0 (mod main_~x~0 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1134#(forall ((aux_mod_v_main_~y~0_36_31 Int) (aux_mod_main_~y~0_26 Int) (v_main_~y~0_37 Int)) (or (and (or (forall ((aux_div_main_~y~0_26 Int)) (not (= v_main_~y~0_37 (+ aux_mod_main_~y~0_26 (* 4294967296 aux_div_main_~y~0_26))))) (< 0 (mod main_~x~0 4294967296))) (or (forall ((aux_div_main_~y~0_26 Int)) (or (not (< (+ aux_mod_main_~y~0_26 (* 4294967296 aux_div_main_~y~0_26)) v_main_~y~0_37)) (exists ((v_it_4 Int)) (and (<= (+ aux_mod_main_~y~0_26 v_it_4 (* 4294967296 aux_div_main_~y~0_26) 1) v_main_~y~0_37) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))))) (not (< 0 (mod main_~x~0 4294967296))))) (< aux_mod_main_~y~0_26 0) (and (or (not (< 0 (mod main_~z~0 4294967296))) (forall ((aux_div_v_main_~y~0_36_31 Int)) (or (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ (* aux_div_v_main_~y~0_36_31 4294967296) v_it_5 aux_mod_v_main_~y~0_36_31 1) v_main_~y~0_37))) (not (< (+ (* aux_div_v_main_~y~0_36_31 4294967296) aux_mod_v_main_~y~0_36_31) v_main_~y~0_37))))) (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~y~0_36_31 Int)) (not (= v_main_~y~0_37 (+ (* aux_div_v_main_~y~0_36_31 4294967296) aux_mod_v_main_~y~0_36_31)))))) (<= 4294967296 aux_mod_v_main_~y~0_36_31) (< 0 aux_mod_main_~y~0_26) (<= aux_mod_v_main_~y~0_36_31 0)))} is VALID [2022-04-07 17:36:25,547 INFO L290 TraceCheckUtils]: 7: Hoare triple {1068#(not (< 0 (mod main_~x~0 4294967296)))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1068#(not (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-07 17:36:25,548 INFO L290 TraceCheckUtils]: 6: Hoare triple {1034#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1068#(not (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-07 17:36:25,548 INFO L290 TraceCheckUtils]: 5: Hoare triple {1034#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1034#true} is VALID [2022-04-07 17:36:25,548 INFO L272 TraceCheckUtils]: 4: Hoare triple {1034#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1034#true} is VALID [2022-04-07 17:36:25,548 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1034#true} {1034#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1034#true} is VALID [2022-04-07 17:36:25,548 INFO L290 TraceCheckUtils]: 2: Hoare triple {1034#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1034#true} is VALID [2022-04-07 17:36:25,548 INFO L290 TraceCheckUtils]: 1: Hoare triple {1034#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1034#true} is VALID [2022-04-07 17:36:25,549 INFO L272 TraceCheckUtils]: 0: Hoare triple {1034#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1034#true} is VALID [2022-04-07 17:36:25,549 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 1 not checked. [2022-04-07 17:36:25,549 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1845924292] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 17:36:25,549 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 17:36:25,549 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9, 9] total 20 [2022-04-07 17:36:25,549 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1468569756] [2022-04-07 17:36:25,549 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 17:36:25,550 INFO L78 Accepts]: Start accepts. Automaton has has 20 states, 20 states have (on average 1.55) internal successors, (31), 17 states have internal predecessors, (31), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-07 17:36:25,550 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:36:25,550 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 20 states, 20 states have (on average 1.55) internal successors, (31), 17 states have internal predecessors, (31), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:36:31,774 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 37 edges. 34 inductive. 0 not inductive. 3 times theorem prover too weak to decide inductivity. [2022-04-07 17:36:31,774 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 20 states [2022-04-07 17:36:31,774 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:36:31,774 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2022-04-07 17:36:31,775 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=267, Unknown=7, NotChecked=34, Total=380 [2022-04-07 17:36:31,775 INFO L87 Difference]: Start difference. First operand 24 states and 32 transitions. Second operand has 20 states, 20 states have (on average 1.55) internal successors, (31), 17 states have internal predecessors, (31), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:36:35,198 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:36:35,198 INFO L93 Difference]: Finished difference Result 41 states and 56 transitions. [2022-04-07 17:36:35,198 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2022-04-07 17:36:35,198 INFO L78 Accepts]: Start accepts. Automaton has has 20 states, 20 states have (on average 1.55) internal successors, (31), 17 states have internal predecessors, (31), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-07 17:36:35,198 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:36:35,198 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 20 states have (on average 1.55) internal successors, (31), 17 states have internal predecessors, (31), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:36:35,200 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 56 transitions. [2022-04-07 17:36:35,200 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 20 states have (on average 1.55) internal successors, (31), 17 states have internal predecessors, (31), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:36:35,203 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 56 transitions. [2022-04-07 17:36:35,203 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 19 states and 56 transitions. [2022-04-07 17:36:35,260 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 56 edges. 56 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:36:35,261 INFO L225 Difference]: With dead ends: 41 [2022-04-07 17:36:35,261 INFO L226 Difference]: Without dead ends: 37 [2022-04-07 17:36:35,262 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 62 GetRequests, 26 SyntacticMatches, 6 SemanticMatches, 30 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 276 ImplicationChecksByTransitivity, 24.5s TimeCoverageRelationStatistics Valid=181, Invalid=745, Unknown=8, NotChecked=58, Total=992 [2022-04-07 17:36:35,262 INFO L913 BasicCegarLoop]: 15 mSDtfsCounter, 31 mSDsluCounter, 65 mSDsCounter, 0 mSdLazyCounter, 81 mSolverCounterSat, 26 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 31 SdHoareTripleChecker+Valid, 80 SdHoareTripleChecker+Invalid, 159 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 26 IncrementalHoareTripleChecker+Valid, 81 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 52 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-07 17:36:35,262 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [31 Valid, 80 Invalid, 159 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [26 Valid, 81 Invalid, 0 Unknown, 52 Unchecked, 0.2s Time] [2022-04-07 17:36:35,263 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37 states. [2022-04-07 17:36:35,264 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37 to 26. [2022-04-07 17:36:35,264 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:36:35,264 INFO L82 GeneralOperation]: Start isEquivalent. First operand 37 states. Second operand has 26 states, 21 states have (on average 1.4761904761904763) internal successors, (31), 21 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:36:35,264 INFO L74 IsIncluded]: Start isIncluded. First operand 37 states. Second operand has 26 states, 21 states have (on average 1.4761904761904763) internal successors, (31), 21 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:36:35,264 INFO L87 Difference]: Start difference. First operand 37 states. Second operand has 26 states, 21 states have (on average 1.4761904761904763) internal successors, (31), 21 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:36:35,265 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:36:35,265 INFO L93 Difference]: Finished difference Result 37 states and 51 transitions. [2022-04-07 17:36:35,266 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 51 transitions. [2022-04-07 17:36:35,266 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:36:35,266 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:36:35,266 INFO L74 IsIncluded]: Start isIncluded. First operand has 26 states, 21 states have (on average 1.4761904761904763) internal successors, (31), 21 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 37 states. [2022-04-07 17:36:35,266 INFO L87 Difference]: Start difference. First operand has 26 states, 21 states have (on average 1.4761904761904763) internal successors, (31), 21 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 37 states. [2022-04-07 17:36:35,267 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:36:35,267 INFO L93 Difference]: Finished difference Result 37 states and 51 transitions. [2022-04-07 17:36:35,267 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 51 transitions. [2022-04-07 17:36:35,267 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:36:35,267 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:36:35,267 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:36:35,267 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:36:35,268 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 21 states have (on average 1.4761904761904763) internal successors, (31), 21 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:36:35,268 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 35 transitions. [2022-04-07 17:36:35,268 INFO L78 Accepts]: Start accepts. Automaton has 26 states and 35 transitions. Word has length 18 [2022-04-07 17:36:35,268 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:36:35,268 INFO L478 AbstractCegarLoop]: Abstraction has 26 states and 35 transitions. [2022-04-07 17:36:35,269 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 20 states, 20 states have (on average 1.55) internal successors, (31), 17 states have internal predecessors, (31), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:36:35,269 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 35 transitions. [2022-04-07 17:36:35,269 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-04-07 17:36:35,269 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:36:35,269 INFO L499 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:36:35,287 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2022-04-07 17:36:35,469 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5,5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:36:35,470 INFO L403 AbstractCegarLoop]: === Iteration 7 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:36:35,470 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:36:35,470 INFO L85 PathProgramCache]: Analyzing trace with hash 1533442700, now seen corresponding path program 2 times [2022-04-07 17:36:35,470 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:36:35,470 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1894913701] [2022-04-07 17:36:35,470 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:36:35,471 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:36:35,484 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.0))) (+ .cse0 main_~x~0_5 (* (- 4294967296) (div (+ .cse0 main_~x~0_5) 4294967296)))) 0)) [2022-04-07 17:36:35,485 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.1))) (+ .cse0 main_~x~0_10 (* (- 4294967296) (div (+ .cse0 main_~x~0_10) 4294967296)))) 0)) [2022-04-07 17:36:35,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:36:35,496 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.2))) (+ .cse0 main_~x~0_5 (* (- 4294967296) (div (+ .cse0 main_~x~0_5) 4294967296)))) 0)) [2022-04-07 17:36:35,499 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.3))) (+ .cse0 main_~x~0_10 (* (- 4294967296) (div (+ .cse0 main_~x~0_10) 4294967296)))) 0)) [2022-04-07 17:36:35,681 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:36:35,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:36:35,685 INFO L290 TraceCheckUtils]: 0: Hoare triple {1343#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1333#true} is VALID [2022-04-07 17:36:35,685 INFO L290 TraceCheckUtils]: 1: Hoare triple {1333#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1333#true} is VALID [2022-04-07 17:36:35,685 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1333#true} {1333#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1333#true} is VALID [2022-04-07 17:36:35,686 INFO L272 TraceCheckUtils]: 0: Hoare triple {1333#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1343#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:36:35,686 INFO L290 TraceCheckUtils]: 1: Hoare triple {1343#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1333#true} is VALID [2022-04-07 17:36:35,686 INFO L290 TraceCheckUtils]: 2: Hoare triple {1333#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1333#true} is VALID [2022-04-07 17:36:35,686 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1333#true} {1333#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1333#true} is VALID [2022-04-07 17:36:35,686 INFO L272 TraceCheckUtils]: 4: Hoare triple {1333#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1333#true} is VALID [2022-04-07 17:36:35,687 INFO L290 TraceCheckUtils]: 5: Hoare triple {1333#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1338#(= main_~y~0 0)} is VALID [2022-04-07 17:36:35,687 INFO L290 TraceCheckUtils]: 6: Hoare triple {1338#(= main_~y~0 0)} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1339#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:36:35,688 INFO L290 TraceCheckUtils]: 7: Hoare triple {1339#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1339#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:36:35,688 INFO L290 TraceCheckUtils]: 8: Hoare triple {1339#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1339#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:36:35,688 INFO L290 TraceCheckUtils]: 9: Hoare triple {1339#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1339#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:36:35,690 INFO L290 TraceCheckUtils]: 10: Hoare triple {1339#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [104] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (< v_main_~x~0_6 v_main_~x~0_7) (= (+ (* (- 1) v_main_~x~0_6) v_main_~x~0_7 v_main_~y~0_8) v_main_~y~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_8 v_main_~y~0_7) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_8, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {1339#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:36:35,691 INFO L290 TraceCheckUtils]: 11: Hoare triple {1339#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [104] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (< v_main_~x~0_6 v_main_~x~0_7) (= (+ (* (- 1) v_main_~x~0_6) v_main_~x~0_7 v_main_~y~0_8) v_main_~y~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_8 v_main_~y~0_7) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_8, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {1340#(and (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (not (<= (+ (div main_~y~0 4294967296) 1) 0)))} is VALID [2022-04-07 17:36:35,692 INFO L290 TraceCheckUtils]: 12: Hoare triple {1340#(and (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (not (<= (+ (div main_~y~0 4294967296) 1) 0)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1340#(and (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (not (<= (+ (div main_~y~0 4294967296) 1) 0)))} is VALID [2022-04-07 17:36:35,692 INFO L290 TraceCheckUtils]: 13: Hoare triple {1340#(and (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (not (<= (+ (div main_~y~0 4294967296) 1) 0)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1340#(and (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (not (<= (+ (div main_~y~0 4294967296) 1) 0)))} is VALID [2022-04-07 17:36:35,693 INFO L272 TraceCheckUtils]: 14: Hoare triple {1340#(and (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (not (<= (+ (div main_~y~0 4294967296) 1) 0)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {1341#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:36:35,693 INFO L290 TraceCheckUtils]: 15: Hoare triple {1341#(not (= |__VERIFIER_assert_#in~cond| 0))} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1342#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:36:35,693 INFO L290 TraceCheckUtils]: 16: Hoare triple {1342#(not (= __VERIFIER_assert_~cond 0))} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1334#false} is VALID [2022-04-07 17:36:35,694 INFO L290 TraceCheckUtils]: 17: Hoare triple {1334#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1334#false} is VALID [2022-04-07 17:36:35,694 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 17:36:35,694 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:36:35,694 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1894913701] [2022-04-07 17:36:35,694 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1894913701] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:36:35,694 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [653075917] [2022-04-07 17:36:35,694 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-07 17:36:35,694 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:36:35,694 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:36:35,696 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:36:35,696 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-04-07 17:36:35,736 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-07 17:36:35,737 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 17:36:35,737 INFO L263 TraceCheckSpWp]: Trace formula consists of 63 conjuncts, 7 conjunts are in the unsatisfiable core [2022-04-07 17:36:35,748 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:36:35,748 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:36:36,489 INFO L272 TraceCheckUtils]: 0: Hoare triple {1333#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1333#true} is VALID [2022-04-07 17:36:36,490 INFO L290 TraceCheckUtils]: 1: Hoare triple {1333#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1333#true} is VALID [2022-04-07 17:36:36,490 INFO L290 TraceCheckUtils]: 2: Hoare triple {1333#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1333#true} is VALID [2022-04-07 17:36:36,490 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1333#true} {1333#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1333#true} is VALID [2022-04-07 17:36:36,490 INFO L272 TraceCheckUtils]: 4: Hoare triple {1333#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1333#true} is VALID [2022-04-07 17:36:36,490 INFO L290 TraceCheckUtils]: 5: Hoare triple {1333#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1333#true} is VALID [2022-04-07 17:36:36,490 INFO L290 TraceCheckUtils]: 6: Hoare triple {1333#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1365#(not (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-07 17:36:36,491 INFO L290 TraceCheckUtils]: 7: Hoare triple {1365#(not (< 0 (mod main_~x~0 4294967296)))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1365#(not (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-07 17:36:36,491 INFO L290 TraceCheckUtils]: 8: Hoare triple {1365#(not (< 0 (mod main_~x~0 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1365#(not (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-07 17:36:36,491 INFO L290 TraceCheckUtils]: 9: Hoare triple {1365#(not (< 0 (mod main_~x~0 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1375#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-07 17:36:36,493 INFO L290 TraceCheckUtils]: 10: Hoare triple {1375#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} [104] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (< v_main_~x~0_6 v_main_~x~0_7) (= (+ (* (- 1) v_main_~x~0_6) v_main_~x~0_7 v_main_~y~0_8) v_main_~y~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_8 v_main_~y~0_7) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_8, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {1375#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-07 17:36:36,493 INFO L290 TraceCheckUtils]: 11: Hoare triple {1375#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} [104] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (< v_main_~x~0_6 v_main_~x~0_7) (= (+ (* (- 1) v_main_~x~0_6) v_main_~x~0_7 v_main_~y~0_8) v_main_~y~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_8 v_main_~y~0_7) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_8, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {1382#(<= (mod main_~y~0 4294967296) 0)} is VALID [2022-04-07 17:36:36,494 INFO L290 TraceCheckUtils]: 12: Hoare triple {1382#(<= (mod main_~y~0 4294967296) 0)} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1382#(<= (mod main_~y~0 4294967296) 0)} is VALID [2022-04-07 17:36:36,494 INFO L290 TraceCheckUtils]: 13: Hoare triple {1382#(<= (mod main_~y~0 4294967296) 0)} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1382#(<= (mod main_~y~0 4294967296) 0)} is VALID [2022-04-07 17:36:36,495 INFO L272 TraceCheckUtils]: 14: Hoare triple {1382#(<= (mod main_~y~0 4294967296) 0)} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {1392#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:36:36,495 INFO L290 TraceCheckUtils]: 15: Hoare triple {1392#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1396#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:36:36,496 INFO L290 TraceCheckUtils]: 16: Hoare triple {1396#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1334#false} is VALID [2022-04-07 17:36:36,496 INFO L290 TraceCheckUtils]: 17: Hoare triple {1334#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1334#false} is VALID [2022-04-07 17:36:36,496 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 17:36:36,496 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 17:36:48,287 WARN L833 $PredicateComparison]: unable to prove that (forall ((aux_mod_v_main_~y~0_40_31 Int)) (or (let ((.cse0 (< 0 (mod c_main_~x~0 4294967296)))) (and (or (forall ((aux_div_v_main_~y~0_40_31 Int)) (not (= (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~y~0_40_31) c_main_~y~0))) .cse0) (or (not .cse0) (forall ((v_main_~y~0_41 Int)) (or (not (< c_main_~y~0 v_main_~y~0_41)) (let ((.cse1 (< 0 (mod (+ (* v_main_~y~0_41 4294967295) c_main_~x~0 c_main_~y~0) 4294967296)))) (and (or .cse1 (forall ((aux_div_v_main_~y~0_40_31 Int)) (not (= v_main_~y~0_41 (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~y~0_40_31))))) (or (forall ((aux_div_v_main_~y~0_40_31 Int)) (or (exists ((v_it_4 Int)) (and (<= (+ v_main_~y~0_41 v_it_4 1) (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~y~0_40_31)) (<= 1 v_it_4) (not (< 0 (mod (+ (* v_it_4 4294967295) (* v_main_~y~0_41 4294967295) c_main_~x~0 c_main_~y~0) 4294967296))))) (not (< v_main_~y~0_41 (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~y~0_40_31))))) (not .cse1)))) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) c_main_~x~0) 4294967296))) (<= (+ v_it_4 c_main_~y~0 1) v_main_~y~0_41) (<= 1 v_it_4)))))))) (<= aux_mod_v_main_~y~0_40_31 0) (<= 4294967296 aux_mod_v_main_~y~0_40_31))) is different from false [2022-04-07 17:37:58,333 INFO L290 TraceCheckUtils]: 17: Hoare triple {1334#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1334#false} is VALID [2022-04-07 17:37:58,333 INFO L290 TraceCheckUtils]: 16: Hoare triple {1396#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1334#false} is VALID [2022-04-07 17:37:58,333 INFO L290 TraceCheckUtils]: 15: Hoare triple {1392#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1396#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:37:58,334 INFO L272 TraceCheckUtils]: 14: Hoare triple {1382#(<= (mod main_~y~0 4294967296) 0)} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {1392#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:37:58,334 INFO L290 TraceCheckUtils]: 13: Hoare triple {1382#(<= (mod main_~y~0 4294967296) 0)} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1382#(<= (mod main_~y~0 4294967296) 0)} is VALID [2022-04-07 17:37:58,335 INFO L290 TraceCheckUtils]: 12: Hoare triple {1382#(<= (mod main_~y~0 4294967296) 0)} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1382#(<= (mod main_~y~0 4294967296) 0)} is VALID [2022-04-07 17:38:00,371 WARN L290 TraceCheckUtils]: 11: Hoare triple {1421#(forall ((aux_mod_v_main_~y~0_40_31 Int)) (or (and (or (< 0 (mod main_~x~0 4294967296)) (forall ((aux_div_v_main_~y~0_40_31 Int)) (not (= (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~y~0_40_31) main_~y~0)))) (or (forall ((aux_div_v_main_~y~0_40_31 Int)) (or (not (< main_~y~0 (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~y~0_40_31))) (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~y~0_40_31)) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))))) (not (< 0 (mod main_~x~0 4294967296))))) (<= aux_mod_v_main_~y~0_40_31 0) (<= 4294967296 aux_mod_v_main_~y~0_40_31)))} [104] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (< v_main_~x~0_6 v_main_~x~0_7) (= (+ (* (- 1) v_main_~x~0_6) v_main_~x~0_7 v_main_~y~0_8) v_main_~y~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_8 v_main_~y~0_7) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_8, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {1382#(<= (mod main_~y~0 4294967296) 0)} is UNKNOWN [2022-04-07 17:38:02,389 WARN L290 TraceCheckUtils]: 10: Hoare triple {1425#(forall ((aux_mod_v_main_~y~0_40_31 Int)) (or (<= aux_mod_v_main_~y~0_40_31 0) (<= 4294967296 aux_mod_v_main_~y~0_40_31) (and (or (< 0 (mod main_~x~0 4294967296)) (forall ((aux_div_v_main_~y~0_40_31 Int)) (not (= (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~y~0_40_31) main_~y~0)))) (or (forall ((v_main_~y~0_41 Int)) (or (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4) (<= (+ v_it_4 main_~y~0 1) v_main_~y~0_41))) (not (< main_~y~0 v_main_~y~0_41)) (and (or (< 0 (mod (+ main_~y~0 main_~x~0 (* v_main_~y~0_41 4294967295)) 4294967296)) (forall ((aux_div_v_main_~y~0_40_31 Int)) (not (= v_main_~y~0_41 (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~y~0_40_31))))) (or (forall ((aux_div_v_main_~y~0_40_31 Int)) (or (exists ((v_it_4 Int)) (and (<= (+ v_main_~y~0_41 v_it_4 1) (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~y~0_40_31)) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~y~0 main_~x~0 (* v_main_~y~0_41 4294967295)) 4294967296))) (<= 1 v_it_4))) (not (< v_main_~y~0_41 (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~y~0_40_31))))) (not (< 0 (mod (+ main_~y~0 main_~x~0 (* v_main_~y~0_41 4294967295)) 4294967296))))))) (not (< 0 (mod main_~x~0 4294967296)))))))} [104] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (< v_main_~x~0_6 v_main_~x~0_7) (= (+ (* (- 1) v_main_~x~0_6) v_main_~x~0_7 v_main_~y~0_8) v_main_~y~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_8 v_main_~y~0_7) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_8, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {1421#(forall ((aux_mod_v_main_~y~0_40_31 Int)) (or (and (or (< 0 (mod main_~x~0 4294967296)) (forall ((aux_div_v_main_~y~0_40_31 Int)) (not (= (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~y~0_40_31) main_~y~0)))) (or (forall ((aux_div_v_main_~y~0_40_31 Int)) (or (not (< main_~y~0 (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~y~0_40_31))) (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~y~0_40_31)) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))))) (not (< 0 (mod main_~x~0 4294967296))))) (<= aux_mod_v_main_~y~0_40_31 0) (<= 4294967296 aux_mod_v_main_~y~0_40_31)))} is UNKNOWN [2022-04-07 17:38:04,741 WARN L290 TraceCheckUtils]: 9: Hoare triple {1429#(or (not (< 0 (mod main_~x~0 4294967296))) (forall ((aux_mod_v_main_~y~0_40_31 Int)) (or (and (forall ((aux_div_main_~y~0_26 Int) (aux_mod_aux_mod_main_~y~0_26_92 Int) (aux_div_aux_mod_main_~y~0_26_92 Int) (aux_div_v_main_~y~0_40_31 Int)) (or (< aux_mod_aux_mod_main_~y~0_26_92 0) (<= (+ (* aux_div_v_main_~y~0_40_31 4294967296) main_~x~0 (* aux_mod_v_main_~y~0_40_31 4294967296)) (+ (* aux_div_aux_mod_main_~y~0_26_92 4294967296) aux_mod_aux_mod_main_~y~0_26_92 (* 4294967296 aux_div_main_~y~0_26))) (exists ((v_it_4 Int)) (and (<= (+ (* aux_div_aux_mod_main_~y~0_26_92 4294967296) v_it_4 aux_mod_aux_mod_main_~y~0_26_92 (* 4294967296 aux_div_main_~y~0_26) 1) (+ (* aux_div_v_main_~y~0_40_31 4294967296) main_~x~0 (* aux_mod_v_main_~y~0_40_31 4294967296))) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))) (< (+ (* aux_div_aux_mod_main_~y~0_26_92 4294967296) aux_mod_aux_mod_main_~y~0_26_92) (+ (* 4294967295 aux_mod_v_main_~y~0_40_31) main_~x~0)) (< 0 aux_mod_aux_mod_main_~y~0_26_92) (< (+ (* 4294967295 aux_mod_v_main_~y~0_40_31) main_~x~0) (+ (* aux_div_aux_mod_main_~y~0_26_92 4294967296) aux_mod_aux_mod_main_~y~0_26_92)))) (forall ((v_main_~y~0_41 Int) (aux_div_main_~y~0_26 Int) (aux_mod_aux_mod_main_~y~0_26_81 Int) (aux_div_aux_mod_main_~y~0_26_81 Int) (aux_div_v_main_~y~0_40_31 Int)) (or (exists ((v_it_4 Int)) (and (<= (+ v_main_~y~0_41 v_it_4 1) (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~y~0_40_31)) (<= 1 v_it_4) (not (< 0 (mod (+ (* v_it_4 4294967295) aux_mod_aux_mod_main_~y~0_26_81) 4294967296))))) (< (+ main_~x~0 (* v_main_~y~0_41 4294967295)) (+ (* aux_div_aux_mod_main_~y~0_26_81 4294967296) aux_mod_aux_mod_main_~y~0_26_81)) (<= (+ (* v_main_~y~0_41 4294967296) main_~x~0) (+ (* aux_div_aux_mod_main_~y~0_26_81 4294967296) aux_mod_aux_mod_main_~y~0_26_81 (* 4294967296 aux_div_main_~y~0_26))) (< (+ (* aux_div_aux_mod_main_~y~0_26_81 4294967296) aux_mod_aux_mod_main_~y~0_26_81) (+ main_~x~0 (* v_main_~y~0_41 4294967295))) (<= (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~y~0_40_31) v_main_~y~0_41) (exists ((v_it_4 Int)) (and (<= (+ (* aux_div_aux_mod_main_~y~0_26_81 4294967296) v_it_4 aux_mod_aux_mod_main_~y~0_26_81 (* 4294967296 aux_div_main_~y~0_26) 1) (+ (* v_main_~y~0_41 4294967296) main_~x~0)) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))) (<= 4294967296 aux_mod_aux_mod_main_~y~0_26_81) (<= aux_mod_aux_mod_main_~y~0_26_81 0)))) (<= aux_mod_v_main_~y~0_40_31 0) (<= 4294967296 aux_mod_v_main_~y~0_40_31))))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1425#(forall ((aux_mod_v_main_~y~0_40_31 Int)) (or (<= aux_mod_v_main_~y~0_40_31 0) (<= 4294967296 aux_mod_v_main_~y~0_40_31) (and (or (< 0 (mod main_~x~0 4294967296)) (forall ((aux_div_v_main_~y~0_40_31 Int)) (not (= (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~y~0_40_31) main_~y~0)))) (or (forall ((v_main_~y~0_41 Int)) (or (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4) (<= (+ v_it_4 main_~y~0 1) v_main_~y~0_41))) (not (< main_~y~0 v_main_~y~0_41)) (and (or (< 0 (mod (+ main_~y~0 main_~x~0 (* v_main_~y~0_41 4294967295)) 4294967296)) (forall ((aux_div_v_main_~y~0_40_31 Int)) (not (= v_main_~y~0_41 (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~y~0_40_31))))) (or (forall ((aux_div_v_main_~y~0_40_31 Int)) (or (exists ((v_it_4 Int)) (and (<= (+ v_main_~y~0_41 v_it_4 1) (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~y~0_40_31)) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~y~0 main_~x~0 (* v_main_~y~0_41 4294967295)) 4294967296))) (<= 1 v_it_4))) (not (< v_main_~y~0_41 (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~y~0_40_31))))) (not (< 0 (mod (+ main_~y~0 main_~x~0 (* v_main_~y~0_41 4294967295)) 4294967296))))))) (not (< 0 (mod main_~x~0 4294967296)))))))} is UNKNOWN [2022-04-07 17:38:06,948 WARN L290 TraceCheckUtils]: 8: Hoare triple {1429#(or (not (< 0 (mod main_~x~0 4294967296))) (forall ((aux_mod_v_main_~y~0_40_31 Int)) (or (and (forall ((aux_div_main_~y~0_26 Int) (aux_mod_aux_mod_main_~y~0_26_92 Int) (aux_div_aux_mod_main_~y~0_26_92 Int) (aux_div_v_main_~y~0_40_31 Int)) (or (< aux_mod_aux_mod_main_~y~0_26_92 0) (<= (+ (* aux_div_v_main_~y~0_40_31 4294967296) main_~x~0 (* aux_mod_v_main_~y~0_40_31 4294967296)) (+ (* aux_div_aux_mod_main_~y~0_26_92 4294967296) aux_mod_aux_mod_main_~y~0_26_92 (* 4294967296 aux_div_main_~y~0_26))) (exists ((v_it_4 Int)) (and (<= (+ (* aux_div_aux_mod_main_~y~0_26_92 4294967296) v_it_4 aux_mod_aux_mod_main_~y~0_26_92 (* 4294967296 aux_div_main_~y~0_26) 1) (+ (* aux_div_v_main_~y~0_40_31 4294967296) main_~x~0 (* aux_mod_v_main_~y~0_40_31 4294967296))) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))) (< (+ (* aux_div_aux_mod_main_~y~0_26_92 4294967296) aux_mod_aux_mod_main_~y~0_26_92) (+ (* 4294967295 aux_mod_v_main_~y~0_40_31) main_~x~0)) (< 0 aux_mod_aux_mod_main_~y~0_26_92) (< (+ (* 4294967295 aux_mod_v_main_~y~0_40_31) main_~x~0) (+ (* aux_div_aux_mod_main_~y~0_26_92 4294967296) aux_mod_aux_mod_main_~y~0_26_92)))) (forall ((v_main_~y~0_41 Int) (aux_div_main_~y~0_26 Int) (aux_mod_aux_mod_main_~y~0_26_81 Int) (aux_div_aux_mod_main_~y~0_26_81 Int) (aux_div_v_main_~y~0_40_31 Int)) (or (exists ((v_it_4 Int)) (and (<= (+ v_main_~y~0_41 v_it_4 1) (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~y~0_40_31)) (<= 1 v_it_4) (not (< 0 (mod (+ (* v_it_4 4294967295) aux_mod_aux_mod_main_~y~0_26_81) 4294967296))))) (< (+ main_~x~0 (* v_main_~y~0_41 4294967295)) (+ (* aux_div_aux_mod_main_~y~0_26_81 4294967296) aux_mod_aux_mod_main_~y~0_26_81)) (<= (+ (* v_main_~y~0_41 4294967296) main_~x~0) (+ (* aux_div_aux_mod_main_~y~0_26_81 4294967296) aux_mod_aux_mod_main_~y~0_26_81 (* 4294967296 aux_div_main_~y~0_26))) (< (+ (* aux_div_aux_mod_main_~y~0_26_81 4294967296) aux_mod_aux_mod_main_~y~0_26_81) (+ main_~x~0 (* v_main_~y~0_41 4294967295))) (<= (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~y~0_40_31) v_main_~y~0_41) (exists ((v_it_4 Int)) (and (<= (+ (* aux_div_aux_mod_main_~y~0_26_81 4294967296) v_it_4 aux_mod_aux_mod_main_~y~0_26_81 (* 4294967296 aux_div_main_~y~0_26) 1) (+ (* v_main_~y~0_41 4294967296) main_~x~0)) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))) (<= 4294967296 aux_mod_aux_mod_main_~y~0_26_81) (<= aux_mod_aux_mod_main_~y~0_26_81 0)))) (<= aux_mod_v_main_~y~0_40_31 0) (<= 4294967296 aux_mod_v_main_~y~0_40_31))))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1429#(or (not (< 0 (mod main_~x~0 4294967296))) (forall ((aux_mod_v_main_~y~0_40_31 Int)) (or (and (forall ((aux_div_main_~y~0_26 Int) (aux_mod_aux_mod_main_~y~0_26_92 Int) (aux_div_aux_mod_main_~y~0_26_92 Int) (aux_div_v_main_~y~0_40_31 Int)) (or (< aux_mod_aux_mod_main_~y~0_26_92 0) (<= (+ (* aux_div_v_main_~y~0_40_31 4294967296) main_~x~0 (* aux_mod_v_main_~y~0_40_31 4294967296)) (+ (* aux_div_aux_mod_main_~y~0_26_92 4294967296) aux_mod_aux_mod_main_~y~0_26_92 (* 4294967296 aux_div_main_~y~0_26))) (exists ((v_it_4 Int)) (and (<= (+ (* aux_div_aux_mod_main_~y~0_26_92 4294967296) v_it_4 aux_mod_aux_mod_main_~y~0_26_92 (* 4294967296 aux_div_main_~y~0_26) 1) (+ (* aux_div_v_main_~y~0_40_31 4294967296) main_~x~0 (* aux_mod_v_main_~y~0_40_31 4294967296))) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))) (< (+ (* aux_div_aux_mod_main_~y~0_26_92 4294967296) aux_mod_aux_mod_main_~y~0_26_92) (+ (* 4294967295 aux_mod_v_main_~y~0_40_31) main_~x~0)) (< 0 aux_mod_aux_mod_main_~y~0_26_92) (< (+ (* 4294967295 aux_mod_v_main_~y~0_40_31) main_~x~0) (+ (* aux_div_aux_mod_main_~y~0_26_92 4294967296) aux_mod_aux_mod_main_~y~0_26_92)))) (forall ((v_main_~y~0_41 Int) (aux_div_main_~y~0_26 Int) (aux_mod_aux_mod_main_~y~0_26_81 Int) (aux_div_aux_mod_main_~y~0_26_81 Int) (aux_div_v_main_~y~0_40_31 Int)) (or (exists ((v_it_4 Int)) (and (<= (+ v_main_~y~0_41 v_it_4 1) (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~y~0_40_31)) (<= 1 v_it_4) (not (< 0 (mod (+ (* v_it_4 4294967295) aux_mod_aux_mod_main_~y~0_26_81) 4294967296))))) (< (+ main_~x~0 (* v_main_~y~0_41 4294967295)) (+ (* aux_div_aux_mod_main_~y~0_26_81 4294967296) aux_mod_aux_mod_main_~y~0_26_81)) (<= (+ (* v_main_~y~0_41 4294967296) main_~x~0) (+ (* aux_div_aux_mod_main_~y~0_26_81 4294967296) aux_mod_aux_mod_main_~y~0_26_81 (* 4294967296 aux_div_main_~y~0_26))) (< (+ (* aux_div_aux_mod_main_~y~0_26_81 4294967296) aux_mod_aux_mod_main_~y~0_26_81) (+ main_~x~0 (* v_main_~y~0_41 4294967295))) (<= (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~y~0_40_31) v_main_~y~0_41) (exists ((v_it_4 Int)) (and (<= (+ (* aux_div_aux_mod_main_~y~0_26_81 4294967296) v_it_4 aux_mod_aux_mod_main_~y~0_26_81 (* 4294967296 aux_div_main_~y~0_26) 1) (+ (* v_main_~y~0_41 4294967296) main_~x~0)) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))) (<= 4294967296 aux_mod_aux_mod_main_~y~0_26_81) (<= aux_mod_aux_mod_main_~y~0_26_81 0)))) (<= aux_mod_v_main_~y~0_40_31 0) (<= 4294967296 aux_mod_v_main_~y~0_40_31))))} is UNKNOWN [2022-04-07 17:38:09,085 WARN L290 TraceCheckUtils]: 7: Hoare triple {1429#(or (not (< 0 (mod main_~x~0 4294967296))) (forall ((aux_mod_v_main_~y~0_40_31 Int)) (or (and (forall ((aux_div_main_~y~0_26 Int) (aux_mod_aux_mod_main_~y~0_26_92 Int) (aux_div_aux_mod_main_~y~0_26_92 Int) (aux_div_v_main_~y~0_40_31 Int)) (or (< aux_mod_aux_mod_main_~y~0_26_92 0) (<= (+ (* aux_div_v_main_~y~0_40_31 4294967296) main_~x~0 (* aux_mod_v_main_~y~0_40_31 4294967296)) (+ (* aux_div_aux_mod_main_~y~0_26_92 4294967296) aux_mod_aux_mod_main_~y~0_26_92 (* 4294967296 aux_div_main_~y~0_26))) (exists ((v_it_4 Int)) (and (<= (+ (* aux_div_aux_mod_main_~y~0_26_92 4294967296) v_it_4 aux_mod_aux_mod_main_~y~0_26_92 (* 4294967296 aux_div_main_~y~0_26) 1) (+ (* aux_div_v_main_~y~0_40_31 4294967296) main_~x~0 (* aux_mod_v_main_~y~0_40_31 4294967296))) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))) (< (+ (* aux_div_aux_mod_main_~y~0_26_92 4294967296) aux_mod_aux_mod_main_~y~0_26_92) (+ (* 4294967295 aux_mod_v_main_~y~0_40_31) main_~x~0)) (< 0 aux_mod_aux_mod_main_~y~0_26_92) (< (+ (* 4294967295 aux_mod_v_main_~y~0_40_31) main_~x~0) (+ (* aux_div_aux_mod_main_~y~0_26_92 4294967296) aux_mod_aux_mod_main_~y~0_26_92)))) (forall ((v_main_~y~0_41 Int) (aux_div_main_~y~0_26 Int) (aux_mod_aux_mod_main_~y~0_26_81 Int) (aux_div_aux_mod_main_~y~0_26_81 Int) (aux_div_v_main_~y~0_40_31 Int)) (or (exists ((v_it_4 Int)) (and (<= (+ v_main_~y~0_41 v_it_4 1) (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~y~0_40_31)) (<= 1 v_it_4) (not (< 0 (mod (+ (* v_it_4 4294967295) aux_mod_aux_mod_main_~y~0_26_81) 4294967296))))) (< (+ main_~x~0 (* v_main_~y~0_41 4294967295)) (+ (* aux_div_aux_mod_main_~y~0_26_81 4294967296) aux_mod_aux_mod_main_~y~0_26_81)) (<= (+ (* v_main_~y~0_41 4294967296) main_~x~0) (+ (* aux_div_aux_mod_main_~y~0_26_81 4294967296) aux_mod_aux_mod_main_~y~0_26_81 (* 4294967296 aux_div_main_~y~0_26))) (< (+ (* aux_div_aux_mod_main_~y~0_26_81 4294967296) aux_mod_aux_mod_main_~y~0_26_81) (+ main_~x~0 (* v_main_~y~0_41 4294967295))) (<= (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~y~0_40_31) v_main_~y~0_41) (exists ((v_it_4 Int)) (and (<= (+ (* aux_div_aux_mod_main_~y~0_26_81 4294967296) v_it_4 aux_mod_aux_mod_main_~y~0_26_81 (* 4294967296 aux_div_main_~y~0_26) 1) (+ (* v_main_~y~0_41 4294967296) main_~x~0)) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))) (<= 4294967296 aux_mod_aux_mod_main_~y~0_26_81) (<= aux_mod_aux_mod_main_~y~0_26_81 0)))) (<= aux_mod_v_main_~y~0_40_31 0) (<= 4294967296 aux_mod_v_main_~y~0_40_31))))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1429#(or (not (< 0 (mod main_~x~0 4294967296))) (forall ((aux_mod_v_main_~y~0_40_31 Int)) (or (and (forall ((aux_div_main_~y~0_26 Int) (aux_mod_aux_mod_main_~y~0_26_92 Int) (aux_div_aux_mod_main_~y~0_26_92 Int) (aux_div_v_main_~y~0_40_31 Int)) (or (< aux_mod_aux_mod_main_~y~0_26_92 0) (<= (+ (* aux_div_v_main_~y~0_40_31 4294967296) main_~x~0 (* aux_mod_v_main_~y~0_40_31 4294967296)) (+ (* aux_div_aux_mod_main_~y~0_26_92 4294967296) aux_mod_aux_mod_main_~y~0_26_92 (* 4294967296 aux_div_main_~y~0_26))) (exists ((v_it_4 Int)) (and (<= (+ (* aux_div_aux_mod_main_~y~0_26_92 4294967296) v_it_4 aux_mod_aux_mod_main_~y~0_26_92 (* 4294967296 aux_div_main_~y~0_26) 1) (+ (* aux_div_v_main_~y~0_40_31 4294967296) main_~x~0 (* aux_mod_v_main_~y~0_40_31 4294967296))) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))) (< (+ (* aux_div_aux_mod_main_~y~0_26_92 4294967296) aux_mod_aux_mod_main_~y~0_26_92) (+ (* 4294967295 aux_mod_v_main_~y~0_40_31) main_~x~0)) (< 0 aux_mod_aux_mod_main_~y~0_26_92) (< (+ (* 4294967295 aux_mod_v_main_~y~0_40_31) main_~x~0) (+ (* aux_div_aux_mod_main_~y~0_26_92 4294967296) aux_mod_aux_mod_main_~y~0_26_92)))) (forall ((v_main_~y~0_41 Int) (aux_div_main_~y~0_26 Int) (aux_mod_aux_mod_main_~y~0_26_81 Int) (aux_div_aux_mod_main_~y~0_26_81 Int) (aux_div_v_main_~y~0_40_31 Int)) (or (exists ((v_it_4 Int)) (and (<= (+ v_main_~y~0_41 v_it_4 1) (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~y~0_40_31)) (<= 1 v_it_4) (not (< 0 (mod (+ (* v_it_4 4294967295) aux_mod_aux_mod_main_~y~0_26_81) 4294967296))))) (< (+ main_~x~0 (* v_main_~y~0_41 4294967295)) (+ (* aux_div_aux_mod_main_~y~0_26_81 4294967296) aux_mod_aux_mod_main_~y~0_26_81)) (<= (+ (* v_main_~y~0_41 4294967296) main_~x~0) (+ (* aux_div_aux_mod_main_~y~0_26_81 4294967296) aux_mod_aux_mod_main_~y~0_26_81 (* 4294967296 aux_div_main_~y~0_26))) (< (+ (* aux_div_aux_mod_main_~y~0_26_81 4294967296) aux_mod_aux_mod_main_~y~0_26_81) (+ main_~x~0 (* v_main_~y~0_41 4294967295))) (<= (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~y~0_40_31) v_main_~y~0_41) (exists ((v_it_4 Int)) (and (<= (+ (* aux_div_aux_mod_main_~y~0_26_81 4294967296) v_it_4 aux_mod_aux_mod_main_~y~0_26_81 (* 4294967296 aux_div_main_~y~0_26) 1) (+ (* v_main_~y~0_41 4294967296) main_~x~0)) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))) (<= 4294967296 aux_mod_aux_mod_main_~y~0_26_81) (<= aux_mod_aux_mod_main_~y~0_26_81 0)))) (<= aux_mod_v_main_~y~0_40_31 0) (<= 4294967296 aux_mod_v_main_~y~0_40_31))))} is UNKNOWN [2022-04-07 17:38:09,087 INFO L290 TraceCheckUtils]: 6: Hoare triple {1333#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1429#(or (not (< 0 (mod main_~x~0 4294967296))) (forall ((aux_mod_v_main_~y~0_40_31 Int)) (or (and (forall ((aux_div_main_~y~0_26 Int) (aux_mod_aux_mod_main_~y~0_26_92 Int) (aux_div_aux_mod_main_~y~0_26_92 Int) (aux_div_v_main_~y~0_40_31 Int)) (or (< aux_mod_aux_mod_main_~y~0_26_92 0) (<= (+ (* aux_div_v_main_~y~0_40_31 4294967296) main_~x~0 (* aux_mod_v_main_~y~0_40_31 4294967296)) (+ (* aux_div_aux_mod_main_~y~0_26_92 4294967296) aux_mod_aux_mod_main_~y~0_26_92 (* 4294967296 aux_div_main_~y~0_26))) (exists ((v_it_4 Int)) (and (<= (+ (* aux_div_aux_mod_main_~y~0_26_92 4294967296) v_it_4 aux_mod_aux_mod_main_~y~0_26_92 (* 4294967296 aux_div_main_~y~0_26) 1) (+ (* aux_div_v_main_~y~0_40_31 4294967296) main_~x~0 (* aux_mod_v_main_~y~0_40_31 4294967296))) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))) (< (+ (* aux_div_aux_mod_main_~y~0_26_92 4294967296) aux_mod_aux_mod_main_~y~0_26_92) (+ (* 4294967295 aux_mod_v_main_~y~0_40_31) main_~x~0)) (< 0 aux_mod_aux_mod_main_~y~0_26_92) (< (+ (* 4294967295 aux_mod_v_main_~y~0_40_31) main_~x~0) (+ (* aux_div_aux_mod_main_~y~0_26_92 4294967296) aux_mod_aux_mod_main_~y~0_26_92)))) (forall ((v_main_~y~0_41 Int) (aux_div_main_~y~0_26 Int) (aux_mod_aux_mod_main_~y~0_26_81 Int) (aux_div_aux_mod_main_~y~0_26_81 Int) (aux_div_v_main_~y~0_40_31 Int)) (or (exists ((v_it_4 Int)) (and (<= (+ v_main_~y~0_41 v_it_4 1) (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~y~0_40_31)) (<= 1 v_it_4) (not (< 0 (mod (+ (* v_it_4 4294967295) aux_mod_aux_mod_main_~y~0_26_81) 4294967296))))) (< (+ main_~x~0 (* v_main_~y~0_41 4294967295)) (+ (* aux_div_aux_mod_main_~y~0_26_81 4294967296) aux_mod_aux_mod_main_~y~0_26_81)) (<= (+ (* v_main_~y~0_41 4294967296) main_~x~0) (+ (* aux_div_aux_mod_main_~y~0_26_81 4294967296) aux_mod_aux_mod_main_~y~0_26_81 (* 4294967296 aux_div_main_~y~0_26))) (< (+ (* aux_div_aux_mod_main_~y~0_26_81 4294967296) aux_mod_aux_mod_main_~y~0_26_81) (+ main_~x~0 (* v_main_~y~0_41 4294967295))) (<= (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~y~0_40_31) v_main_~y~0_41) (exists ((v_it_4 Int)) (and (<= (+ (* aux_div_aux_mod_main_~y~0_26_81 4294967296) v_it_4 aux_mod_aux_mod_main_~y~0_26_81 (* 4294967296 aux_div_main_~y~0_26) 1) (+ (* v_main_~y~0_41 4294967296) main_~x~0)) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))) (<= 4294967296 aux_mod_aux_mod_main_~y~0_26_81) (<= aux_mod_aux_mod_main_~y~0_26_81 0)))) (<= aux_mod_v_main_~y~0_40_31 0) (<= 4294967296 aux_mod_v_main_~y~0_40_31))))} is VALID [2022-04-07 17:38:09,087 INFO L290 TraceCheckUtils]: 5: Hoare triple {1333#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1333#true} is VALID [2022-04-07 17:38:09,087 INFO L272 TraceCheckUtils]: 4: Hoare triple {1333#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1333#true} is VALID [2022-04-07 17:38:09,087 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1333#true} {1333#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1333#true} is VALID [2022-04-07 17:38:09,087 INFO L290 TraceCheckUtils]: 2: Hoare triple {1333#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1333#true} is VALID [2022-04-07 17:38:09,087 INFO L290 TraceCheckUtils]: 1: Hoare triple {1333#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1333#true} is VALID [2022-04-07 17:38:09,087 INFO L272 TraceCheckUtils]: 0: Hoare triple {1333#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1333#true} is VALID [2022-04-07 17:38:09,087 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 2 not checked. [2022-04-07 17:38:09,088 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [653075917] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 17:38:09,088 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 17:38:09,088 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7, 8] total 16 [2022-04-07 17:38:09,088 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1395231425] [2022-04-07 17:38:09,088 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 17:38:09,088 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 2.0) internal successors, (32), 13 states have internal predecessors, (32), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-07 17:38:09,089 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:38:09,089 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 16 states, 16 states have (on average 2.0) internal successors, (32), 13 states have internal predecessors, (32), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:38:17,499 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 38 edges. 34 inductive. 0 not inductive. 4 times theorem prover too weak to decide inductivity. [2022-04-07 17:38:17,500 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2022-04-07 17:38:17,500 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:38:17,500 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2022-04-07 17:38:17,500 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=163, Unknown=5, NotChecked=26, Total=240 [2022-04-07 17:38:17,500 INFO L87 Difference]: Start difference. First operand 26 states and 35 transitions. Second operand has 16 states, 16 states have (on average 2.0) internal successors, (32), 13 states have internal predecessors, (32), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:38:25,206 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:38:25,206 INFO L93 Difference]: Finished difference Result 43 states and 60 transitions. [2022-04-07 17:38:25,206 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-04-07 17:38:25,206 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 2.0) internal successors, (32), 13 states have internal predecessors, (32), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-07 17:38:25,206 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:38:25,206 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 2.0) internal successors, (32), 13 states have internal predecessors, (32), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:38:25,207 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 52 transitions. [2022-04-07 17:38:25,207 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 2.0) internal successors, (32), 13 states have internal predecessors, (32), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:38:25,208 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 52 transitions. [2022-04-07 17:38:25,208 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 12 states and 52 transitions. [2022-04-07 17:38:25,262 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 52 edges. 52 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:38:25,263 INFO L225 Difference]: With dead ends: 43 [2022-04-07 17:38:25,263 INFO L226 Difference]: Without dead ends: 39 [2022-04-07 17:38:25,263 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 54 GetRequests, 28 SyntacticMatches, 5 SemanticMatches, 21 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 95 ImplicationChecksByTransitivity, 19.2s TimeCoverageRelationStatistics Valid=100, Invalid=361, Unknown=5, NotChecked=40, Total=506 [2022-04-07 17:38:25,264 INFO L913 BasicCegarLoop]: 13 mSDtfsCounter, 34 mSDsluCounter, 62 mSDsCounter, 0 mSdLazyCounter, 79 mSolverCounterSat, 14 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 34 SdHoareTripleChecker+Valid, 75 SdHoareTripleChecker+Invalid, 131 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 14 IncrementalHoareTripleChecker+Valid, 79 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 38 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-07 17:38:25,264 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [34 Valid, 75 Invalid, 131 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [14 Valid, 79 Invalid, 0 Unknown, 38 Unchecked, 0.2s Time] [2022-04-07 17:38:25,264 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39 states. [2022-04-07 17:38:25,265 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39 to 27. [2022-04-07 17:38:25,266 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:38:25,266 INFO L82 GeneralOperation]: Start isEquivalent. First operand 39 states. Second operand has 27 states, 22 states have (on average 1.5) internal successors, (33), 22 states have internal predecessors, (33), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:38:25,266 INFO L74 IsIncluded]: Start isIncluded. First operand 39 states. Second operand has 27 states, 22 states have (on average 1.5) internal successors, (33), 22 states have internal predecessors, (33), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:38:25,266 INFO L87 Difference]: Start difference. First operand 39 states. Second operand has 27 states, 22 states have (on average 1.5) internal successors, (33), 22 states have internal predecessors, (33), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:38:25,267 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:38:25,267 INFO L93 Difference]: Finished difference Result 39 states and 55 transitions. [2022-04-07 17:38:25,267 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 55 transitions. [2022-04-07 17:38:25,267 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:38:25,267 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:38:25,267 INFO L74 IsIncluded]: Start isIncluded. First operand has 27 states, 22 states have (on average 1.5) internal successors, (33), 22 states have internal predecessors, (33), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 39 states. [2022-04-07 17:38:25,267 INFO L87 Difference]: Start difference. First operand has 27 states, 22 states have (on average 1.5) internal successors, (33), 22 states have internal predecessors, (33), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 39 states. [2022-04-07 17:38:25,269 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:38:25,269 INFO L93 Difference]: Finished difference Result 39 states and 55 transitions. [2022-04-07 17:38:25,269 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 55 transitions. [2022-04-07 17:38:25,270 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:38:25,270 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:38:25,270 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:38:25,270 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:38:25,271 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27 states, 22 states have (on average 1.5) internal successors, (33), 22 states have internal predecessors, (33), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:38:25,272 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 37 transitions. [2022-04-07 17:38:25,272 INFO L78 Accepts]: Start accepts. Automaton has 27 states and 37 transitions. Word has length 18 [2022-04-07 17:38:25,272 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:38:25,272 INFO L478 AbstractCegarLoop]: Abstraction has 27 states and 37 transitions. [2022-04-07 17:38:25,272 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 2.0) internal successors, (32), 13 states have internal predecessors, (32), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:38:25,272 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 37 transitions. [2022-04-07 17:38:25,272 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-04-07 17:38:25,272 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:38:25,272 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:38:25,291 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Ended with exit code 0 [2022-04-07 17:38:25,473 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6,6 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:38:25,474 INFO L403 AbstractCegarLoop]: === Iteration 8 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:38:25,474 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:38:25,474 INFO L85 PathProgramCache]: Analyzing trace with hash 571694412, now seen corresponding path program 1 times [2022-04-07 17:38:25,474 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:38:25,474 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1513160705] [2022-04-07 17:38:25,474 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:38:25,475 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:38:25,488 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.0))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-07 17:38:25,490 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.1))) (+ main_~z~0_9 .cse0 (* (- 4294967296) (div (+ main_~z~0_9 .cse0) 4294967296)))) 0)) [2022-04-07 17:38:25,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:38:25,501 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.2))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-07 17:38:25,504 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.3))) (+ main_~z~0_9 .cse0 (* (- 4294967296) (div (+ main_~z~0_9 .cse0) 4294967296)))) 0)) [2022-04-07 17:38:25,726 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:38:25,728 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:38:25,733 INFO L290 TraceCheckUtils]: 0: Hoare triple {1633#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1623#true} is VALID [2022-04-07 17:38:25,733 INFO L290 TraceCheckUtils]: 1: Hoare triple {1623#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1623#true} is VALID [2022-04-07 17:38:25,733 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1623#true} {1623#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1623#true} is VALID [2022-04-07 17:38:25,734 INFO L272 TraceCheckUtils]: 0: Hoare triple {1623#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1633#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:38:25,734 INFO L290 TraceCheckUtils]: 1: Hoare triple {1633#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1623#true} is VALID [2022-04-07 17:38:25,734 INFO L290 TraceCheckUtils]: 2: Hoare triple {1623#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1623#true} is VALID [2022-04-07 17:38:25,734 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1623#true} {1623#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1623#true} is VALID [2022-04-07 17:38:25,734 INFO L272 TraceCheckUtils]: 4: Hoare triple {1623#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1623#true} is VALID [2022-04-07 17:38:25,735 INFO L290 TraceCheckUtils]: 5: Hoare triple {1623#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1628#(= main_~y~0 0)} is VALID [2022-04-07 17:38:25,735 INFO L290 TraceCheckUtils]: 6: Hoare triple {1628#(= main_~y~0 0)} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1628#(= main_~y~0 0)} is VALID [2022-04-07 17:38:25,735 INFO L290 TraceCheckUtils]: 7: Hoare triple {1628#(= main_~y~0 0)} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1629#(and (= main_~z~0 0) (= main_~y~0 0))} is VALID [2022-04-07 17:38:25,736 INFO L290 TraceCheckUtils]: 8: Hoare triple {1629#(and (= main_~z~0 0) (= main_~y~0 0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1629#(and (= main_~z~0 0) (= main_~y~0 0))} is VALID [2022-04-07 17:38:25,736 INFO L290 TraceCheckUtils]: 9: Hoare triple {1629#(and (= main_~z~0 0) (= main_~y~0 0))} [101] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (= (+ (* (- 1) v_main_~y~0_3) v_main_~y~0_4 v_main_~z~0_3) v_main_~z~0_2) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1629#(and (= main_~z~0 0) (= main_~y~0 0))} is VALID [2022-04-07 17:38:25,737 INFO L290 TraceCheckUtils]: 10: Hoare triple {1629#(and (= main_~z~0 0) (= main_~y~0 0))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1629#(and (= main_~z~0 0) (= main_~y~0 0))} is VALID [2022-04-07 17:38:25,738 INFO L290 TraceCheckUtils]: 11: Hoare triple {1629#(and (= main_~z~0 0) (= main_~y~0 0))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1629#(and (= main_~z~0 0) (= main_~y~0 0))} is VALID [2022-04-07 17:38:25,739 INFO L290 TraceCheckUtils]: 12: Hoare triple {1629#(and (= main_~z~0 0) (= main_~y~0 0))} [107] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~y~0_10 (+ v_main_~y~0_11 v_main_~z~0_9 (* (- 1) v_main_~z~0_10))) (< 0 .cse0) (forall ((v_it_5 Int)) (or (not (<= (+ v_main_~z~0_9 v_it_5 1) v_main_~z~0_10)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)))) (< v_main_~z~0_9 v_main_~z~0_10)) (and (<= .cse0 0) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (= v_main_~y~0_11 v_main_~y~0_10) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {1630#(and (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (not (<= (+ (div main_~y~0 4294967296) 1) 0)))} is VALID [2022-04-07 17:38:25,740 INFO L290 TraceCheckUtils]: 13: Hoare triple {1630#(and (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (not (<= (+ (div main_~y~0 4294967296) 1) 0)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1630#(and (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (not (<= (+ (div main_~y~0 4294967296) 1) 0)))} is VALID [2022-04-07 17:38:25,741 INFO L272 TraceCheckUtils]: 14: Hoare triple {1630#(and (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (not (<= (+ (div main_~y~0 4294967296) 1) 0)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {1631#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:38:25,742 INFO L290 TraceCheckUtils]: 15: Hoare triple {1631#(not (= |__VERIFIER_assert_#in~cond| 0))} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1632#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:38:25,742 INFO L290 TraceCheckUtils]: 16: Hoare triple {1632#(not (= __VERIFIER_assert_~cond 0))} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1624#false} is VALID [2022-04-07 17:38:25,742 INFO L290 TraceCheckUtils]: 17: Hoare triple {1624#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1624#false} is VALID [2022-04-07 17:38:25,742 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 17:38:25,742 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:38:25,743 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1513160705] [2022-04-07 17:38:25,743 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1513160705] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:38:25,743 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [303865428] [2022-04-07 17:38:25,743 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:38:25,743 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:38:25,743 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:38:25,744 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:38:25,745 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-04-07 17:38:25,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:38:25,776 INFO L263 TraceCheckSpWp]: Trace formula consists of 63 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-07 17:38:25,786 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:38:25,787 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:38:25,987 INFO L272 TraceCheckUtils]: 0: Hoare triple {1623#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1623#true} is VALID [2022-04-07 17:38:25,987 INFO L290 TraceCheckUtils]: 1: Hoare triple {1623#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1623#true} is VALID [2022-04-07 17:38:25,987 INFO L290 TraceCheckUtils]: 2: Hoare triple {1623#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1623#true} is VALID [2022-04-07 17:38:25,987 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1623#true} {1623#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1623#true} is VALID [2022-04-07 17:38:25,987 INFO L272 TraceCheckUtils]: 4: Hoare triple {1623#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1623#true} is VALID [2022-04-07 17:38:25,988 INFO L290 TraceCheckUtils]: 5: Hoare triple {1623#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1628#(= main_~y~0 0)} is VALID [2022-04-07 17:38:25,988 INFO L290 TraceCheckUtils]: 6: Hoare triple {1628#(= main_~y~0 0)} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1628#(= main_~y~0 0)} is VALID [2022-04-07 17:38:25,988 INFO L290 TraceCheckUtils]: 7: Hoare triple {1628#(= main_~y~0 0)} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1629#(and (= main_~z~0 0) (= main_~y~0 0))} is VALID [2022-04-07 17:38:25,989 INFO L290 TraceCheckUtils]: 8: Hoare triple {1629#(and (= main_~z~0 0) (= main_~y~0 0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1629#(and (= main_~z~0 0) (= main_~y~0 0))} is VALID [2022-04-07 17:38:25,990 INFO L290 TraceCheckUtils]: 9: Hoare triple {1629#(and (= main_~z~0 0) (= main_~y~0 0))} [101] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (= (+ (* (- 1) v_main_~y~0_3) v_main_~y~0_4 v_main_~z~0_3) v_main_~z~0_2) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1629#(and (= main_~z~0 0) (= main_~y~0 0))} is VALID [2022-04-07 17:38:25,990 INFO L290 TraceCheckUtils]: 10: Hoare triple {1629#(and (= main_~z~0 0) (= main_~y~0 0))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1629#(and (= main_~z~0 0) (= main_~y~0 0))} is VALID [2022-04-07 17:38:25,990 INFO L290 TraceCheckUtils]: 11: Hoare triple {1629#(and (= main_~z~0 0) (= main_~y~0 0))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1629#(and (= main_~z~0 0) (= main_~y~0 0))} is VALID [2022-04-07 17:38:25,991 INFO L290 TraceCheckUtils]: 12: Hoare triple {1629#(and (= main_~z~0 0) (= main_~y~0 0))} [107] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~y~0_10 (+ v_main_~y~0_11 v_main_~z~0_9 (* (- 1) v_main_~z~0_10))) (< 0 .cse0) (forall ((v_it_5 Int)) (or (not (<= (+ v_main_~z~0_9 v_it_5 1) v_main_~z~0_10)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)))) (< v_main_~z~0_9 v_main_~z~0_10)) (and (<= .cse0 0) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (= v_main_~y~0_11 v_main_~y~0_10) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {1628#(= main_~y~0 0)} is VALID [2022-04-07 17:38:25,991 INFO L290 TraceCheckUtils]: 13: Hoare triple {1628#(= main_~y~0 0)} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1628#(= main_~y~0 0)} is VALID [2022-04-07 17:38:25,992 INFO L272 TraceCheckUtils]: 14: Hoare triple {1628#(= main_~y~0 0)} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {1679#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:38:25,993 INFO L290 TraceCheckUtils]: 15: Hoare triple {1679#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1683#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:38:25,993 INFO L290 TraceCheckUtils]: 16: Hoare triple {1683#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1624#false} is VALID [2022-04-07 17:38:25,993 INFO L290 TraceCheckUtils]: 17: Hoare triple {1624#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1624#false} is VALID [2022-04-07 17:38:25,993 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 17:38:25,993 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 17:39:12,214 WARN L232 SmtUtils]: Spent 10.29s on a formula simplification that was a NOOP. DAG size: 69 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 17:39:12,269 INFO L290 TraceCheckUtils]: 17: Hoare triple {1624#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1624#false} is VALID [2022-04-07 17:39:12,269 INFO L290 TraceCheckUtils]: 16: Hoare triple {1683#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1624#false} is VALID [2022-04-07 17:39:12,270 INFO L290 TraceCheckUtils]: 15: Hoare triple {1679#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1683#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:39:12,270 INFO L272 TraceCheckUtils]: 14: Hoare triple {1699#(= (mod main_~y~0 4294967296) 0)} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {1679#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:39:12,271 INFO L290 TraceCheckUtils]: 13: Hoare triple {1699#(= (mod main_~y~0 4294967296) 0)} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1699#(= (mod main_~y~0 4294967296) 0)} is VALID [2022-04-07 17:39:14,291 WARN L290 TraceCheckUtils]: 12: Hoare triple {1706#(forall ((aux_mod_v_main_~y~0_44_31 Int)) (or (= aux_mod_v_main_~y~0_44_31 0) (and (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~y~0_44_31 Int)) (not (= (+ (* aux_div_v_main_~y~0_44_31 4294967296) aux_mod_v_main_~y~0_44_31) main_~y~0)))) (or (not (< 0 (mod main_~z~0 4294967296))) (forall ((aux_div_v_main_~y~0_44_31 Int)) (or (not (< (+ (* aux_div_v_main_~y~0_44_31 4294967296) aux_mod_v_main_~y~0_44_31) main_~y~0)) (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ v_it_5 (* aux_div_v_main_~y~0_44_31 4294967296) aux_mod_v_main_~y~0_44_31 1) main_~y~0))))))) (>= aux_mod_v_main_~y~0_44_31 4294967296) (> 0 aux_mod_v_main_~y~0_44_31)))} [107] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~y~0_10 (+ v_main_~y~0_11 v_main_~z~0_9 (* (- 1) v_main_~z~0_10))) (< 0 .cse0) (forall ((v_it_5 Int)) (or (not (<= (+ v_main_~z~0_9 v_it_5 1) v_main_~z~0_10)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)))) (< v_main_~z~0_9 v_main_~z~0_10)) (and (<= .cse0 0) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (= v_main_~y~0_11 v_main_~y~0_10) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {1699#(= (mod main_~y~0 4294967296) 0)} is UNKNOWN [2022-04-07 17:39:14,292 INFO L290 TraceCheckUtils]: 11: Hoare triple {1706#(forall ((aux_mod_v_main_~y~0_44_31 Int)) (or (= aux_mod_v_main_~y~0_44_31 0) (and (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~y~0_44_31 Int)) (not (= (+ (* aux_div_v_main_~y~0_44_31 4294967296) aux_mod_v_main_~y~0_44_31) main_~y~0)))) (or (not (< 0 (mod main_~z~0 4294967296))) (forall ((aux_div_v_main_~y~0_44_31 Int)) (or (not (< (+ (* aux_div_v_main_~y~0_44_31 4294967296) aux_mod_v_main_~y~0_44_31) main_~y~0)) (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ v_it_5 (* aux_div_v_main_~y~0_44_31 4294967296) aux_mod_v_main_~y~0_44_31 1) main_~y~0))))))) (>= aux_mod_v_main_~y~0_44_31 4294967296) (> 0 aux_mod_v_main_~y~0_44_31)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1706#(forall ((aux_mod_v_main_~y~0_44_31 Int)) (or (= aux_mod_v_main_~y~0_44_31 0) (and (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~y~0_44_31 Int)) (not (= (+ (* aux_div_v_main_~y~0_44_31 4294967296) aux_mod_v_main_~y~0_44_31) main_~y~0)))) (or (not (< 0 (mod main_~z~0 4294967296))) (forall ((aux_div_v_main_~y~0_44_31 Int)) (or (not (< (+ (* aux_div_v_main_~y~0_44_31 4294967296) aux_mod_v_main_~y~0_44_31) main_~y~0)) (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ v_it_5 (* aux_div_v_main_~y~0_44_31 4294967296) aux_mod_v_main_~y~0_44_31 1) main_~y~0))))))) (>= aux_mod_v_main_~y~0_44_31 4294967296) (> 0 aux_mod_v_main_~y~0_44_31)))} is VALID [2022-04-07 17:39:14,293 INFO L290 TraceCheckUtils]: 10: Hoare triple {1706#(forall ((aux_mod_v_main_~y~0_44_31 Int)) (or (= aux_mod_v_main_~y~0_44_31 0) (and (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~y~0_44_31 Int)) (not (= (+ (* aux_div_v_main_~y~0_44_31 4294967296) aux_mod_v_main_~y~0_44_31) main_~y~0)))) (or (not (< 0 (mod main_~z~0 4294967296))) (forall ((aux_div_v_main_~y~0_44_31 Int)) (or (not (< (+ (* aux_div_v_main_~y~0_44_31 4294967296) aux_mod_v_main_~y~0_44_31) main_~y~0)) (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ v_it_5 (* aux_div_v_main_~y~0_44_31 4294967296) aux_mod_v_main_~y~0_44_31 1) main_~y~0))))))) (>= aux_mod_v_main_~y~0_44_31 4294967296) (> 0 aux_mod_v_main_~y~0_44_31)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1706#(forall ((aux_mod_v_main_~y~0_44_31 Int)) (or (= aux_mod_v_main_~y~0_44_31 0) (and (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~y~0_44_31 Int)) (not (= (+ (* aux_div_v_main_~y~0_44_31 4294967296) aux_mod_v_main_~y~0_44_31) main_~y~0)))) (or (not (< 0 (mod main_~z~0 4294967296))) (forall ((aux_div_v_main_~y~0_44_31 Int)) (or (not (< (+ (* aux_div_v_main_~y~0_44_31 4294967296) aux_mod_v_main_~y~0_44_31) main_~y~0)) (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ v_it_5 (* aux_div_v_main_~y~0_44_31 4294967296) aux_mod_v_main_~y~0_44_31 1) main_~y~0))))))) (>= aux_mod_v_main_~y~0_44_31 4294967296) (> 0 aux_mod_v_main_~y~0_44_31)))} is VALID [2022-04-07 17:39:16,305 WARN L290 TraceCheckUtils]: 9: Hoare triple {1716#(forall ((aux_mod_v_main_~y~0_44_31 Int)) (or (= aux_mod_v_main_~y~0_44_31 0) (and (or (not (< 0 (mod main_~y~0 4294967296))) (and (forall ((aux_mod_v_main_~z~0_34_31 Int) (aux_div_v_main_~y~0_44_31 Int) (aux_div_v_main_~z~0_34_31 Int)) (or (exists ((v_it_3 Int)) (and (<= 1 v_it_3) (<= (+ v_it_3 main_~z~0 1) (+ (* 4294967296 aux_div_v_main_~z~0_34_31) aux_mod_v_main_~z~0_34_31)) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296))))) (<= (+ (* 4294967296 aux_div_v_main_~z~0_34_31) aux_mod_v_main_~z~0_34_31) main_~z~0) (exists ((v_it_5 Int)) (and (<= (+ (* 4294967296 aux_div_v_main_~z~0_34_31) aux_mod_v_main_~z~0_34_31 v_it_5 (* aux_div_v_main_~y~0_44_31 4294967296) aux_mod_v_main_~y~0_44_31 1) (+ main_~z~0 main_~y~0)) (<= 1 v_it_5) (not (< 0 (mod (+ aux_mod_v_main_~z~0_34_31 (* v_it_5 4294967295)) 4294967296))))) (<= 4294967296 aux_mod_v_main_~z~0_34_31) (<= (+ main_~z~0 main_~y~0) (+ (* 4294967296 aux_div_v_main_~z~0_34_31) aux_mod_v_main_~z~0_34_31 (* aux_div_v_main_~y~0_44_31 4294967296) aux_mod_v_main_~y~0_44_31)) (<= aux_mod_v_main_~z~0_34_31 0))) (or (< 0 (mod (+ main_~z~0 main_~y~0 (* 4294967295 aux_mod_v_main_~y~0_44_31)) 4294967296)) (forall ((aux_div_v_main_~y~0_44_31 Int)) (or (not (< (+ (* aux_div_v_main_~y~0_44_31 4294967296) aux_mod_v_main_~y~0_44_31) main_~y~0)) (exists ((v_it_3 Int)) (and (<= 1 v_it_3) (<= (+ v_it_3 (* aux_div_v_main_~y~0_44_31 4294967296) aux_mod_v_main_~y~0_44_31 1) main_~y~0) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296)))))))))) (or (not (< 0 (mod main_~z~0 4294967296))) (forall ((aux_div_v_main_~y~0_44_31 Int)) (or (not (< (+ (* aux_div_v_main_~y~0_44_31 4294967296) aux_mod_v_main_~y~0_44_31) main_~y~0)) (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ v_it_5 (* aux_div_v_main_~y~0_44_31 4294967296) aux_mod_v_main_~y~0_44_31 1) main_~y~0))))) (< 0 (mod main_~y~0 4294967296)))) (>= aux_mod_v_main_~y~0_44_31 4294967296) (> 0 aux_mod_v_main_~y~0_44_31)))} [101] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (= (+ (* (- 1) v_main_~y~0_3) v_main_~y~0_4 v_main_~z~0_3) v_main_~z~0_2) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1706#(forall ((aux_mod_v_main_~y~0_44_31 Int)) (or (= aux_mod_v_main_~y~0_44_31 0) (and (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~y~0_44_31 Int)) (not (= (+ (* aux_div_v_main_~y~0_44_31 4294967296) aux_mod_v_main_~y~0_44_31) main_~y~0)))) (or (not (< 0 (mod main_~z~0 4294967296))) (forall ((aux_div_v_main_~y~0_44_31 Int)) (or (not (< (+ (* aux_div_v_main_~y~0_44_31 4294967296) aux_mod_v_main_~y~0_44_31) main_~y~0)) (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ v_it_5 (* aux_div_v_main_~y~0_44_31 4294967296) aux_mod_v_main_~y~0_44_31 1) main_~y~0))))))) (>= aux_mod_v_main_~y~0_44_31 4294967296) (> 0 aux_mod_v_main_~y~0_44_31)))} is UNKNOWN [2022-04-07 17:39:18,324 WARN L290 TraceCheckUtils]: 8: Hoare triple {1720#(or (not (< 0 (mod main_~y~0 4294967296))) (< 0 (mod main_~z~0 4294967296)) (forall ((aux_mod_v_main_~y~0_44_31 Int)) (or (= aux_mod_v_main_~y~0_44_31 0) (and (forall ((aux_mod_v_main_~z~0_34_31 Int) (aux_div_v_main_~y~0_44_31 Int) (aux_div_v_main_~z~0_34_31 Int)) (or (exists ((v_it_3 Int)) (and (<= 1 v_it_3) (<= (+ v_it_3 main_~z~0 1) (+ (* 4294967296 aux_div_v_main_~z~0_34_31) aux_mod_v_main_~z~0_34_31)) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296))))) (<= (+ (* 4294967296 aux_div_v_main_~z~0_34_31) aux_mod_v_main_~z~0_34_31) main_~z~0) (exists ((v_it_5 Int)) (and (<= (+ (* 4294967296 aux_div_v_main_~z~0_34_31) aux_mod_v_main_~z~0_34_31 v_it_5 (* aux_div_v_main_~y~0_44_31 4294967296) aux_mod_v_main_~y~0_44_31 1) (+ main_~z~0 main_~y~0)) (<= 1 v_it_5) (not (< 0 (mod (+ aux_mod_v_main_~z~0_34_31 (* v_it_5 4294967295)) 4294967296))))) (<= 4294967296 aux_mod_v_main_~z~0_34_31) (<= (+ main_~z~0 main_~y~0) (+ (* 4294967296 aux_div_v_main_~z~0_34_31) aux_mod_v_main_~z~0_34_31 (* aux_div_v_main_~y~0_44_31 4294967296) aux_mod_v_main_~y~0_44_31)) (<= aux_mod_v_main_~z~0_34_31 0))) (or (< 0 (mod (+ main_~z~0 main_~y~0 (* 4294967295 aux_mod_v_main_~y~0_44_31)) 4294967296)) (forall ((aux_div_v_main_~y~0_44_31 Int)) (or (not (< (+ (* aux_div_v_main_~y~0_44_31 4294967296) aux_mod_v_main_~y~0_44_31) main_~y~0)) (exists ((v_it_3 Int)) (and (<= 1 v_it_3) (<= (+ v_it_3 (* aux_div_v_main_~y~0_44_31 4294967296) aux_mod_v_main_~y~0_44_31 1) main_~y~0) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296))))))))) (>= aux_mod_v_main_~y~0_44_31 4294967296) (> 0 aux_mod_v_main_~y~0_44_31))))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1716#(forall ((aux_mod_v_main_~y~0_44_31 Int)) (or (= aux_mod_v_main_~y~0_44_31 0) (and (or (not (< 0 (mod main_~y~0 4294967296))) (and (forall ((aux_mod_v_main_~z~0_34_31 Int) (aux_div_v_main_~y~0_44_31 Int) (aux_div_v_main_~z~0_34_31 Int)) (or (exists ((v_it_3 Int)) (and (<= 1 v_it_3) (<= (+ v_it_3 main_~z~0 1) (+ (* 4294967296 aux_div_v_main_~z~0_34_31) aux_mod_v_main_~z~0_34_31)) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296))))) (<= (+ (* 4294967296 aux_div_v_main_~z~0_34_31) aux_mod_v_main_~z~0_34_31) main_~z~0) (exists ((v_it_5 Int)) (and (<= (+ (* 4294967296 aux_div_v_main_~z~0_34_31) aux_mod_v_main_~z~0_34_31 v_it_5 (* aux_div_v_main_~y~0_44_31 4294967296) aux_mod_v_main_~y~0_44_31 1) (+ main_~z~0 main_~y~0)) (<= 1 v_it_5) (not (< 0 (mod (+ aux_mod_v_main_~z~0_34_31 (* v_it_5 4294967295)) 4294967296))))) (<= 4294967296 aux_mod_v_main_~z~0_34_31) (<= (+ main_~z~0 main_~y~0) (+ (* 4294967296 aux_div_v_main_~z~0_34_31) aux_mod_v_main_~z~0_34_31 (* aux_div_v_main_~y~0_44_31 4294967296) aux_mod_v_main_~y~0_44_31)) (<= aux_mod_v_main_~z~0_34_31 0))) (or (< 0 (mod (+ main_~z~0 main_~y~0 (* 4294967295 aux_mod_v_main_~y~0_44_31)) 4294967296)) (forall ((aux_div_v_main_~y~0_44_31 Int)) (or (not (< (+ (* aux_div_v_main_~y~0_44_31 4294967296) aux_mod_v_main_~y~0_44_31) main_~y~0)) (exists ((v_it_3 Int)) (and (<= 1 v_it_3) (<= (+ v_it_3 (* aux_div_v_main_~y~0_44_31 4294967296) aux_mod_v_main_~y~0_44_31 1) main_~y~0) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296)))))))))) (or (not (< 0 (mod main_~z~0 4294967296))) (forall ((aux_div_v_main_~y~0_44_31 Int)) (or (not (< (+ (* aux_div_v_main_~y~0_44_31 4294967296) aux_mod_v_main_~y~0_44_31) main_~y~0)) (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ v_it_5 (* aux_div_v_main_~y~0_44_31 4294967296) aux_mod_v_main_~y~0_44_31 1) main_~y~0))))) (< 0 (mod main_~y~0 4294967296)))) (>= aux_mod_v_main_~y~0_44_31 4294967296) (> 0 aux_mod_v_main_~y~0_44_31)))} is UNKNOWN [2022-04-07 17:39:18,325 INFO L290 TraceCheckUtils]: 7: Hoare triple {1623#true} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1720#(or (not (< 0 (mod main_~y~0 4294967296))) (< 0 (mod main_~z~0 4294967296)) (forall ((aux_mod_v_main_~y~0_44_31 Int)) (or (= aux_mod_v_main_~y~0_44_31 0) (and (forall ((aux_mod_v_main_~z~0_34_31 Int) (aux_div_v_main_~y~0_44_31 Int) (aux_div_v_main_~z~0_34_31 Int)) (or (exists ((v_it_3 Int)) (and (<= 1 v_it_3) (<= (+ v_it_3 main_~z~0 1) (+ (* 4294967296 aux_div_v_main_~z~0_34_31) aux_mod_v_main_~z~0_34_31)) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296))))) (<= (+ (* 4294967296 aux_div_v_main_~z~0_34_31) aux_mod_v_main_~z~0_34_31) main_~z~0) (exists ((v_it_5 Int)) (and (<= (+ (* 4294967296 aux_div_v_main_~z~0_34_31) aux_mod_v_main_~z~0_34_31 v_it_5 (* aux_div_v_main_~y~0_44_31 4294967296) aux_mod_v_main_~y~0_44_31 1) (+ main_~z~0 main_~y~0)) (<= 1 v_it_5) (not (< 0 (mod (+ aux_mod_v_main_~z~0_34_31 (* v_it_5 4294967295)) 4294967296))))) (<= 4294967296 aux_mod_v_main_~z~0_34_31) (<= (+ main_~z~0 main_~y~0) (+ (* 4294967296 aux_div_v_main_~z~0_34_31) aux_mod_v_main_~z~0_34_31 (* aux_div_v_main_~y~0_44_31 4294967296) aux_mod_v_main_~y~0_44_31)) (<= aux_mod_v_main_~z~0_34_31 0))) (or (< 0 (mod (+ main_~z~0 main_~y~0 (* 4294967295 aux_mod_v_main_~y~0_44_31)) 4294967296)) (forall ((aux_div_v_main_~y~0_44_31 Int)) (or (not (< (+ (* aux_div_v_main_~y~0_44_31 4294967296) aux_mod_v_main_~y~0_44_31) main_~y~0)) (exists ((v_it_3 Int)) (and (<= 1 v_it_3) (<= (+ v_it_3 (* aux_div_v_main_~y~0_44_31 4294967296) aux_mod_v_main_~y~0_44_31 1) main_~y~0) (not (< 0 (mod (+ main_~y~0 (* v_it_3 4294967295)) 4294967296))))))))) (>= aux_mod_v_main_~y~0_44_31 4294967296) (> 0 aux_mod_v_main_~y~0_44_31))))} is VALID [2022-04-07 17:39:18,325 INFO L290 TraceCheckUtils]: 6: Hoare triple {1623#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1623#true} is VALID [2022-04-07 17:39:18,325 INFO L290 TraceCheckUtils]: 5: Hoare triple {1623#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1623#true} is VALID [2022-04-07 17:39:18,326 INFO L272 TraceCheckUtils]: 4: Hoare triple {1623#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1623#true} is VALID [2022-04-07 17:39:18,326 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1623#true} {1623#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1623#true} is VALID [2022-04-07 17:39:18,326 INFO L290 TraceCheckUtils]: 2: Hoare triple {1623#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1623#true} is VALID [2022-04-07 17:39:18,326 INFO L290 TraceCheckUtils]: 1: Hoare triple {1623#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1623#true} is VALID [2022-04-07 17:39:18,326 INFO L272 TraceCheckUtils]: 0: Hoare triple {1623#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1623#true} is VALID [2022-04-07 17:39:18,326 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 1 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:39:18,326 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [303865428] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 17:39:18,326 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 17:39:18,326 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 6, 8] total 14 [2022-04-07 17:39:18,327 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1708700721] [2022-04-07 17:39:18,327 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 17:39:18,327 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 2.0) internal successors, (28), 11 states have internal predecessors, (28), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-07 17:39:18,327 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:39:18,327 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 14 states, 14 states have (on average 2.0) internal successors, (28), 11 states have internal predecessors, (28), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:39:24,813 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 35 edges. 32 inductive. 0 not inductive. 3 times theorem prover too weak to decide inductivity. [2022-04-07 17:39:24,814 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2022-04-07 17:39:24,814 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:39:24,814 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-04-07 17:39:24,814 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=132, Unknown=10, NotChecked=0, Total=182 [2022-04-07 17:39:24,814 INFO L87 Difference]: Start difference. First operand 27 states and 37 transitions. Second operand has 14 states, 14 states have (on average 2.0) internal successors, (28), 11 states have internal predecessors, (28), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:39:53,458 WARN L232 SmtUtils]: Spent 14.13s on a formula simplification that was a NOOP. DAG size: 76 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 17:40:36,305 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:40:36,305 INFO L93 Difference]: Finished difference Result 45 states and 63 transitions. [2022-04-07 17:40:36,305 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2022-04-07 17:40:36,305 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 2.0) internal successors, (28), 11 states have internal predecessors, (28), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-07 17:40:36,305 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:40:36,305 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 14 states have (on average 2.0) internal successors, (28), 11 states have internal predecessors, (28), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:40:36,312 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 54 transitions. [2022-04-07 17:40:36,312 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 14 states have (on average 2.0) internal successors, (28), 11 states have internal predecessors, (28), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:40:36,313 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 54 transitions. [2022-04-07 17:40:36,313 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 14 states and 54 transitions. [2022-04-07 17:40:44,858 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 54 edges. 50 inductive. 0 not inductive. 4 times theorem prover too weak to decide inductivity. [2022-04-07 17:40:44,859 INFO L225 Difference]: With dead ends: 45 [2022-04-07 17:40:44,859 INFO L226 Difference]: Without dead ends: 41 [2022-04-07 17:40:44,859 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 60 GetRequests, 35 SyntacticMatches, 4 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 90 ImplicationChecksByTransitivity, 92.6s TimeCoverageRelationStatistics Valid=114, Invalid=369, Unknown=23, NotChecked=0, Total=506 [2022-04-07 17:40:44,859 INFO L913 BasicCegarLoop]: 14 mSDtfsCounter, 34 mSDsluCounter, 43 mSDsCounter, 0 mSdLazyCounter, 53 mSolverCounterSat, 11 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 34 SdHoareTripleChecker+Valid, 57 SdHoareTripleChecker+Invalid, 127 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 11 IncrementalHoareTripleChecker+Valid, 53 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 63 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-07 17:40:44,860 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [34 Valid, 57 Invalid, 127 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [11 Valid, 53 Invalid, 0 Unknown, 63 Unchecked, 0.2s Time] [2022-04-07 17:40:44,860 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41 states. [2022-04-07 17:40:44,861 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41 to 34. [2022-04-07 17:40:44,861 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:40:44,861 INFO L82 GeneralOperation]: Start isEquivalent. First operand 41 states. Second operand has 34 states, 29 states have (on average 1.5862068965517242) internal successors, (46), 29 states have internal predecessors, (46), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:40:44,862 INFO L74 IsIncluded]: Start isIncluded. First operand 41 states. Second operand has 34 states, 29 states have (on average 1.5862068965517242) internal successors, (46), 29 states have internal predecessors, (46), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:40:44,862 INFO L87 Difference]: Start difference. First operand 41 states. Second operand has 34 states, 29 states have (on average 1.5862068965517242) internal successors, (46), 29 states have internal predecessors, (46), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:40:44,863 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:40:44,863 INFO L93 Difference]: Finished difference Result 41 states and 58 transitions. [2022-04-07 17:40:44,863 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 58 transitions. [2022-04-07 17:40:44,863 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:40:44,865 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:40:44,865 INFO L74 IsIncluded]: Start isIncluded. First operand has 34 states, 29 states have (on average 1.5862068965517242) internal successors, (46), 29 states have internal predecessors, (46), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 41 states. [2022-04-07 17:40:44,865 INFO L87 Difference]: Start difference. First operand has 34 states, 29 states have (on average 1.5862068965517242) internal successors, (46), 29 states have internal predecessors, (46), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 41 states. [2022-04-07 17:40:44,866 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:40:44,866 INFO L93 Difference]: Finished difference Result 41 states and 58 transitions. [2022-04-07 17:40:44,866 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 58 transitions. [2022-04-07 17:40:44,866 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:40:44,866 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:40:44,866 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:40:44,866 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:40:44,867 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 29 states have (on average 1.5862068965517242) internal successors, (46), 29 states have internal predecessors, (46), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:40:44,867 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 50 transitions. [2022-04-07 17:40:44,867 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 50 transitions. Word has length 18 [2022-04-07 17:40:44,867 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:40:44,867 INFO L478 AbstractCegarLoop]: Abstraction has 34 states and 50 transitions. [2022-04-07 17:40:44,868 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 14 states have (on average 2.0) internal successors, (28), 11 states have internal predecessors, (28), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:40:44,868 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 50 transitions. [2022-04-07 17:40:44,868 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-04-07 17:40:44,868 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:40:44,868 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:40:44,891 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Ended with exit code 0 [2022-04-07 17:40:45,068 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7,7 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:40:45,069 INFO L403 AbstractCegarLoop]: === Iteration 9 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:40:45,069 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:40:45,069 INFO L85 PathProgramCache]: Analyzing trace with hash 1344681489, now seen corresponding path program 1 times [2022-04-07 17:40:45,069 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:40:45,069 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [664665715] [2022-04-07 17:40:45,069 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:40:45,069 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:40:45,079 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.0))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-07 17:40:45,092 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.1))) (+ .cse0 main_~x~0_5 (* (- 4294967296) (div (+ .cse0 main_~x~0_5) 4294967296)))) 0)) [2022-04-07 17:40:45,095 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:40:45,105 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.2))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-07 17:40:45,114 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.3))) (+ .cse0 main_~x~0_5 (* (- 4294967296) (div (+ .cse0 main_~x~0_5) 4294967296)))) 0)) [2022-04-07 17:40:45,356 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:40:45,358 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:40:45,369 INFO L290 TraceCheckUtils]: 0: Hoare triple {1942#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1932#true} is VALID [2022-04-07 17:40:45,369 INFO L290 TraceCheckUtils]: 1: Hoare triple {1932#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1932#true} is VALID [2022-04-07 17:40:45,369 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1932#true} {1932#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1932#true} is VALID [2022-04-07 17:40:45,370 INFO L272 TraceCheckUtils]: 0: Hoare triple {1932#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1942#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:40:45,370 INFO L290 TraceCheckUtils]: 1: Hoare triple {1942#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1932#true} is VALID [2022-04-07 17:40:45,370 INFO L290 TraceCheckUtils]: 2: Hoare triple {1932#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1932#true} is VALID [2022-04-07 17:40:45,370 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1932#true} {1932#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1932#true} is VALID [2022-04-07 17:40:45,370 INFO L272 TraceCheckUtils]: 4: Hoare triple {1932#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1932#true} is VALID [2022-04-07 17:40:45,370 INFO L290 TraceCheckUtils]: 5: Hoare triple {1932#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1937#(= main_~y~0 0)} is VALID [2022-04-07 17:40:45,371 INFO L290 TraceCheckUtils]: 6: Hoare triple {1937#(= main_~y~0 0)} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1938#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:40:45,372 INFO L290 TraceCheckUtils]: 7: Hoare triple {1938#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1938#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:40:45,372 INFO L290 TraceCheckUtils]: 8: Hoare triple {1938#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1938#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:40:45,373 INFO L290 TraceCheckUtils]: 9: Hoare triple {1938#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [101] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (= (+ (* (- 1) v_main_~y~0_3) v_main_~y~0_4 v_main_~z~0_3) v_main_~z~0_2) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1938#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:40:45,373 INFO L290 TraceCheckUtils]: 10: Hoare triple {1938#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1938#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:40:45,375 INFO L290 TraceCheckUtils]: 11: Hoare triple {1938#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [104] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (< v_main_~x~0_6 v_main_~x~0_7) (= (+ (* (- 1) v_main_~x~0_6) v_main_~x~0_7 v_main_~y~0_8) v_main_~y~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_8 v_main_~y~0_7) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_8, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {1939#(and (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (not (<= (+ (div main_~y~0 4294967296) 1) 0)))} is VALID [2022-04-07 17:40:45,375 INFO L290 TraceCheckUtils]: 12: Hoare triple {1939#(and (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (not (<= (+ (div main_~y~0 4294967296) 1) 0)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1939#(and (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (not (<= (+ (div main_~y~0 4294967296) 1) 0)))} is VALID [2022-04-07 17:40:45,376 INFO L290 TraceCheckUtils]: 13: Hoare triple {1939#(and (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (not (<= (+ (div main_~y~0 4294967296) 1) 0)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1939#(and (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (not (<= (+ (div main_~y~0 4294967296) 1) 0)))} is VALID [2022-04-07 17:40:45,377 INFO L272 TraceCheckUtils]: 14: Hoare triple {1939#(and (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (not (<= (+ (div main_~y~0 4294967296) 1) 0)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {1940#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:40:45,377 INFO L290 TraceCheckUtils]: 15: Hoare triple {1940#(not (= |__VERIFIER_assert_#in~cond| 0))} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1941#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:40:45,377 INFO L290 TraceCheckUtils]: 16: Hoare triple {1941#(not (= __VERIFIER_assert_~cond 0))} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1933#false} is VALID [2022-04-07 17:40:45,377 INFO L290 TraceCheckUtils]: 17: Hoare triple {1933#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1933#false} is VALID [2022-04-07 17:40:45,377 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 17:40:45,378 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:40:45,378 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [664665715] [2022-04-07 17:40:45,378 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [664665715] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:40:45,378 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [811151177] [2022-04-07 17:40:45,378 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:40:45,378 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:40:45,378 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:40:45,379 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:40:45,387 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2022-04-07 17:40:45,423 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:40:45,424 INFO L263 TraceCheckSpWp]: Trace formula consists of 63 conjuncts, 6 conjunts are in the unsatisfiable core [2022-04-07 17:40:45,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:40:45,433 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:40:46,218 INFO L272 TraceCheckUtils]: 0: Hoare triple {1932#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1932#true} is VALID [2022-04-07 17:40:46,219 INFO L290 TraceCheckUtils]: 1: Hoare triple {1932#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1932#true} is VALID [2022-04-07 17:40:46,219 INFO L290 TraceCheckUtils]: 2: Hoare triple {1932#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1932#true} is VALID [2022-04-07 17:40:46,219 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1932#true} {1932#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1932#true} is VALID [2022-04-07 17:40:46,219 INFO L272 TraceCheckUtils]: 4: Hoare triple {1932#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1932#true} is VALID [2022-04-07 17:40:46,219 INFO L290 TraceCheckUtils]: 5: Hoare triple {1932#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1932#true} is VALID [2022-04-07 17:40:46,219 INFO L290 TraceCheckUtils]: 6: Hoare triple {1932#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1964#(not (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-07 17:40:46,220 INFO L290 TraceCheckUtils]: 7: Hoare triple {1964#(not (< 0 (mod main_~x~0 4294967296)))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1964#(not (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-07 17:40:46,223 INFO L290 TraceCheckUtils]: 8: Hoare triple {1964#(not (< 0 (mod main_~x~0 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1964#(not (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-07 17:40:46,224 INFO L290 TraceCheckUtils]: 9: Hoare triple {1964#(not (< 0 (mod main_~x~0 4294967296)))} [101] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (= (+ (* (- 1) v_main_~y~0_3) v_main_~y~0_4 v_main_~z~0_3) v_main_~z~0_2) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1964#(not (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-07 17:40:46,224 INFO L290 TraceCheckUtils]: 10: Hoare triple {1964#(not (< 0 (mod main_~x~0 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1977#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-07 17:40:46,225 INFO L290 TraceCheckUtils]: 11: Hoare triple {1977#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} [104] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (< v_main_~x~0_6 v_main_~x~0_7) (= (+ (* (- 1) v_main_~x~0_6) v_main_~x~0_7 v_main_~y~0_8) v_main_~y~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_8 v_main_~y~0_7) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_8, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {1981#(<= (mod main_~y~0 4294967296) 0)} is VALID [2022-04-07 17:40:46,226 INFO L290 TraceCheckUtils]: 12: Hoare triple {1981#(<= (mod main_~y~0 4294967296) 0)} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1981#(<= (mod main_~y~0 4294967296) 0)} is VALID [2022-04-07 17:40:46,226 INFO L290 TraceCheckUtils]: 13: Hoare triple {1981#(<= (mod main_~y~0 4294967296) 0)} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1981#(<= (mod main_~y~0 4294967296) 0)} is VALID [2022-04-07 17:40:46,227 INFO L272 TraceCheckUtils]: 14: Hoare triple {1981#(<= (mod main_~y~0 4294967296) 0)} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {1991#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:40:46,227 INFO L290 TraceCheckUtils]: 15: Hoare triple {1991#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1995#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:40:46,227 INFO L290 TraceCheckUtils]: 16: Hoare triple {1995#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1933#false} is VALID [2022-04-07 17:40:46,228 INFO L290 TraceCheckUtils]: 17: Hoare triple {1933#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1933#false} is VALID [2022-04-07 17:40:46,228 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 17:40:46,228 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 17:40:51,099 INFO L290 TraceCheckUtils]: 17: Hoare triple {1933#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1933#false} is VALID [2022-04-07 17:40:51,100 INFO L290 TraceCheckUtils]: 16: Hoare triple {1995#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1933#false} is VALID [2022-04-07 17:40:51,100 INFO L290 TraceCheckUtils]: 15: Hoare triple {1991#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1995#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:40:51,101 INFO L272 TraceCheckUtils]: 14: Hoare triple {1981#(<= (mod main_~y~0 4294967296) 0)} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {1991#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:40:51,101 INFO L290 TraceCheckUtils]: 13: Hoare triple {1981#(<= (mod main_~y~0 4294967296) 0)} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1981#(<= (mod main_~y~0 4294967296) 0)} is VALID [2022-04-07 17:40:51,102 INFO L290 TraceCheckUtils]: 12: Hoare triple {1981#(<= (mod main_~y~0 4294967296) 0)} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1981#(<= (mod main_~y~0 4294967296) 0)} is VALID [2022-04-07 17:40:53,114 WARN L290 TraceCheckUtils]: 11: Hoare triple {2020#(forall ((aux_mod_v_main_~y~0_47_31 Int)) (or (<= 4294967296 aux_mod_v_main_~y~0_47_31) (<= aux_mod_v_main_~y~0_47_31 0) (and (or (not (< 0 (mod main_~x~0 4294967296))) (forall ((aux_div_v_main_~y~0_47_31 Int)) (or (not (< main_~y~0 (+ (* aux_div_v_main_~y~0_47_31 4294967296) aux_mod_v_main_~y~0_47_31))) (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ (* aux_div_v_main_~y~0_47_31 4294967296) aux_mod_v_main_~y~0_47_31)) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4)))))) (or (forall ((aux_div_v_main_~y~0_47_31 Int)) (not (= main_~y~0 (+ (* aux_div_v_main_~y~0_47_31 4294967296) aux_mod_v_main_~y~0_47_31)))) (< 0 (mod main_~x~0 4294967296))))))} [104] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (< v_main_~x~0_6 v_main_~x~0_7) (= (+ (* (- 1) v_main_~x~0_6) v_main_~x~0_7 v_main_~y~0_8) v_main_~y~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_8 v_main_~y~0_7) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_8, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {1981#(<= (mod main_~y~0 4294967296) 0)} is UNKNOWN [2022-04-07 17:40:53,119 INFO L290 TraceCheckUtils]: 10: Hoare triple {1964#(not (< 0 (mod main_~x~0 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2020#(forall ((aux_mod_v_main_~y~0_47_31 Int)) (or (<= 4294967296 aux_mod_v_main_~y~0_47_31) (<= aux_mod_v_main_~y~0_47_31 0) (and (or (not (< 0 (mod main_~x~0 4294967296))) (forall ((aux_div_v_main_~y~0_47_31 Int)) (or (not (< main_~y~0 (+ (* aux_div_v_main_~y~0_47_31 4294967296) aux_mod_v_main_~y~0_47_31))) (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ (* aux_div_v_main_~y~0_47_31 4294967296) aux_mod_v_main_~y~0_47_31)) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4)))))) (or (forall ((aux_div_v_main_~y~0_47_31 Int)) (not (= main_~y~0 (+ (* aux_div_v_main_~y~0_47_31 4294967296) aux_mod_v_main_~y~0_47_31)))) (< 0 (mod main_~x~0 4294967296))))))} is VALID [2022-04-07 17:40:53,120 INFO L290 TraceCheckUtils]: 9: Hoare triple {1964#(not (< 0 (mod main_~x~0 4294967296)))} [101] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (= (+ (* (- 1) v_main_~y~0_3) v_main_~y~0_4 v_main_~z~0_3) v_main_~z~0_2) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1964#(not (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-07 17:40:53,120 INFO L290 TraceCheckUtils]: 8: Hoare triple {1964#(not (< 0 (mod main_~x~0 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1964#(not (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-07 17:40:53,120 INFO L290 TraceCheckUtils]: 7: Hoare triple {1964#(not (< 0 (mod main_~x~0 4294967296)))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1964#(not (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-07 17:40:53,121 INFO L290 TraceCheckUtils]: 6: Hoare triple {1932#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1964#(not (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-07 17:40:53,121 INFO L290 TraceCheckUtils]: 5: Hoare triple {1932#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1932#true} is VALID [2022-04-07 17:40:53,121 INFO L272 TraceCheckUtils]: 4: Hoare triple {1932#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1932#true} is VALID [2022-04-07 17:40:53,121 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1932#true} {1932#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1932#true} is VALID [2022-04-07 17:40:53,121 INFO L290 TraceCheckUtils]: 2: Hoare triple {1932#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1932#true} is VALID [2022-04-07 17:40:53,121 INFO L290 TraceCheckUtils]: 1: Hoare triple {1932#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1932#true} is VALID [2022-04-07 17:40:53,121 INFO L272 TraceCheckUtils]: 0: Hoare triple {1932#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1932#true} is VALID [2022-04-07 17:40:53,121 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 17:40:53,121 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [811151177] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 17:40:53,121 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 17:40:53,122 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7, 7] total 14 [2022-04-07 17:40:53,122 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [274999466] [2022-04-07 17:40:53,122 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 17:40:53,123 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 2.0) internal successors, (28), 11 states have internal predecessors, (28), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-07 17:40:53,123 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:40:53,123 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 14 states, 14 states have (on average 2.0) internal successors, (28), 11 states have internal predecessors, (28), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:40:55,203 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 34 edges. 33 inductive. 0 not inductive. 1 times theorem prover too weak to decide inductivity. [2022-04-07 17:40:55,204 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2022-04-07 17:40:55,204 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:40:55,204 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-04-07 17:40:55,204 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=142, Unknown=1, NotChecked=0, Total=182 [2022-04-07 17:40:55,204 INFO L87 Difference]: Start difference. First operand 34 states and 50 transitions. Second operand has 14 states, 14 states have (on average 2.0) internal successors, (28), 11 states have internal predecessors, (28), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:40:56,101 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:40:56,102 INFO L93 Difference]: Finished difference Result 52 states and 76 transitions. [2022-04-07 17:40:56,102 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-04-07 17:40:56,102 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 2.0) internal successors, (28), 11 states have internal predecessors, (28), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-07 17:40:56,102 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:40:56,102 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 14 states have (on average 2.0) internal successors, (28), 11 states have internal predecessors, (28), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:40:56,103 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 59 transitions. [2022-04-07 17:40:56,103 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 14 states have (on average 2.0) internal successors, (28), 11 states have internal predecessors, (28), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:40:56,104 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 59 transitions. [2022-04-07 17:40:56,104 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 15 states and 59 transitions. [2022-04-07 17:40:56,169 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 59 edges. 59 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:40:56,169 INFO L225 Difference]: With dead ends: 52 [2022-04-07 17:40:56,169 INFO L226 Difference]: Without dead ends: 48 [2022-04-07 17:40:56,170 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 55 GetRequests, 30 SyntacticMatches, 5 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 108 ImplicationChecksByTransitivity, 3.1s TimeCoverageRelationStatistics Valid=98, Invalid=363, Unknown=1, NotChecked=0, Total=462 [2022-04-07 17:40:56,170 INFO L913 BasicCegarLoop]: 15 mSDtfsCounter, 35 mSDsluCounter, 46 mSDsCounter, 0 mSdLazyCounter, 50 mSolverCounterSat, 15 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 35 SdHoareTripleChecker+Valid, 61 SdHoareTripleChecker+Invalid, 86 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 15 IncrementalHoareTripleChecker+Valid, 50 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 21 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-07 17:40:56,170 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [35 Valid, 61 Invalid, 86 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [15 Valid, 50 Invalid, 0 Unknown, 21 Unchecked, 0.2s Time] [2022-04-07 17:40:56,171 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states. [2022-04-07 17:40:56,172 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 36. [2022-04-07 17:40:56,172 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:40:56,172 INFO L82 GeneralOperation]: Start isEquivalent. First operand 48 states. Second operand has 36 states, 31 states have (on average 1.6129032258064515) internal successors, (50), 31 states have internal predecessors, (50), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:40:56,173 INFO L74 IsIncluded]: Start isIncluded. First operand 48 states. Second operand has 36 states, 31 states have (on average 1.6129032258064515) internal successors, (50), 31 states have internal predecessors, (50), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:40:56,173 INFO L87 Difference]: Start difference. First operand 48 states. Second operand has 36 states, 31 states have (on average 1.6129032258064515) internal successors, (50), 31 states have internal predecessors, (50), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:40:56,174 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:40:56,174 INFO L93 Difference]: Finished difference Result 48 states and 71 transitions. [2022-04-07 17:40:56,174 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 71 transitions. [2022-04-07 17:40:56,174 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:40:56,174 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:40:56,174 INFO L74 IsIncluded]: Start isIncluded. First operand has 36 states, 31 states have (on average 1.6129032258064515) internal successors, (50), 31 states have internal predecessors, (50), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 48 states. [2022-04-07 17:40:56,174 INFO L87 Difference]: Start difference. First operand has 36 states, 31 states have (on average 1.6129032258064515) internal successors, (50), 31 states have internal predecessors, (50), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 48 states. [2022-04-07 17:40:56,175 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:40:56,175 INFO L93 Difference]: Finished difference Result 48 states and 71 transitions. [2022-04-07 17:40:56,175 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 71 transitions. [2022-04-07 17:40:56,175 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:40:56,175 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:40:56,175 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:40:56,176 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:40:56,176 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 36 states, 31 states have (on average 1.6129032258064515) internal successors, (50), 31 states have internal predecessors, (50), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:40:56,176 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 54 transitions. [2022-04-07 17:40:56,176 INFO L78 Accepts]: Start accepts. Automaton has 36 states and 54 transitions. Word has length 18 [2022-04-07 17:40:56,177 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:40:56,177 INFO L478 AbstractCegarLoop]: Abstraction has 36 states and 54 transitions. [2022-04-07 17:40:56,177 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 14 states have (on average 2.0) internal successors, (28), 11 states have internal predecessors, (28), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:40:56,177 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 54 transitions. [2022-04-07 17:40:56,177 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-04-07 17:40:56,177 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:40:56,177 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:40:56,196 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Ended with exit code 0 [2022-04-07 17:40:56,377 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8,8 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:40:56,378 INFO L403 AbstractCegarLoop]: === Iteration 10 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:40:56,378 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:40:56,378 INFO L85 PathProgramCache]: Analyzing trace with hash -211948756, now seen corresponding path program 1 times [2022-04-07 17:40:56,378 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:40:56,378 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [154958216] [2022-04-07 17:40:56,378 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:40:56,378 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:40:56,387 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.0))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-07 17:40:56,389 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.1))) (+ .cse0 main_~x~0_8 (* (- 4294967296) (div (+ .cse0 main_~x~0_8) 4294967296)))) 0)) [2022-04-07 17:40:56,409 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:40:56,416 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.2))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-07 17:40:56,419 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.3))) (+ .cse0 main_~x~0_8 (* (- 4294967296) (div (+ .cse0 main_~x~0_8) 4294967296)))) 0)) [2022-04-07 17:40:56,765 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:40:56,766 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:40:56,768 INFO L290 TraceCheckUtils]: 0: Hoare triple {2269#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2258#true} is VALID [2022-04-07 17:40:56,769 INFO L290 TraceCheckUtils]: 1: Hoare triple {2258#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2258#true} is VALID [2022-04-07 17:40:56,769 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2258#true} {2258#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2258#true} is VALID [2022-04-07 17:40:56,769 INFO L272 TraceCheckUtils]: 0: Hoare triple {2258#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2269#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:40:56,769 INFO L290 TraceCheckUtils]: 1: Hoare triple {2269#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2258#true} is VALID [2022-04-07 17:40:56,769 INFO L290 TraceCheckUtils]: 2: Hoare triple {2258#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2258#true} is VALID [2022-04-07 17:40:56,770 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2258#true} {2258#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2258#true} is VALID [2022-04-07 17:40:56,770 INFO L272 TraceCheckUtils]: 4: Hoare triple {2258#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2258#true} is VALID [2022-04-07 17:40:56,770 INFO L290 TraceCheckUtils]: 5: Hoare triple {2258#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2263#(= main_~y~0 0)} is VALID [2022-04-07 17:40:56,771 INFO L290 TraceCheckUtils]: 6: Hoare triple {2263#(= main_~y~0 0)} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2264#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:40:56,771 INFO L290 TraceCheckUtils]: 7: Hoare triple {2264#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {2265#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:40:56,773 INFO L290 TraceCheckUtils]: 8: Hoare triple {2265#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [98] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_8 4294967296))) (or (and (= v_main_~x~0_9 v_main_~x~0_8) (<= .cse0 0) (= v_main_~z~0_8 v_main_~z~0_7) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)) (and (forall ((v_it_2 Int)) (or (< 0 (mod (+ v_main_~z~0_8 (* v_it_2 4294967295)) 4294967296)) (not (<= (+ v_main_~z~0_7 v_it_2 1) v_main_~z~0_8)) (not (<= 1 v_it_2)))) (= (+ v_main_~x~0_9 v_main_~z~0_8 (* (- 1) v_main_~z~0_7)) v_main_~x~0_8) (< 0 .cse0) (< v_main_~z~0_7 v_main_~z~0_8)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_8, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2265#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:40:56,773 INFO L290 TraceCheckUtils]: 9: Hoare triple {2265#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {2265#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:40:56,774 INFO L290 TraceCheckUtils]: 10: Hoare triple {2265#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2265#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:40:56,775 INFO L290 TraceCheckUtils]: 11: Hoare triple {2265#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [104] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (< v_main_~x~0_6 v_main_~x~0_7) (= (+ (* (- 1) v_main_~x~0_6) v_main_~x~0_7 v_main_~y~0_8) v_main_~y~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_8 v_main_~y~0_7) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_8, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {2266#(and (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (not (<= (+ (div main_~y~0 4294967296) 1) 0)))} is VALID [2022-04-07 17:40:56,776 INFO L290 TraceCheckUtils]: 12: Hoare triple {2266#(and (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (not (<= (+ (div main_~y~0 4294967296) 1) 0)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2266#(and (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (not (<= (+ (div main_~y~0 4294967296) 1) 0)))} is VALID [2022-04-07 17:40:56,776 INFO L290 TraceCheckUtils]: 13: Hoare triple {2266#(and (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (not (<= (+ (div main_~y~0 4294967296) 1) 0)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {2266#(and (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (not (<= (+ (div main_~y~0 4294967296) 1) 0)))} is VALID [2022-04-07 17:40:56,777 INFO L272 TraceCheckUtils]: 14: Hoare triple {2266#(and (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (not (<= (+ (div main_~y~0 4294967296) 1) 0)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {2267#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:40:56,778 INFO L290 TraceCheckUtils]: 15: Hoare triple {2267#(not (= |__VERIFIER_assert_#in~cond| 0))} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2268#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:40:56,778 INFO L290 TraceCheckUtils]: 16: Hoare triple {2268#(not (= __VERIFIER_assert_~cond 0))} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2259#false} is VALID [2022-04-07 17:40:56,778 INFO L290 TraceCheckUtils]: 17: Hoare triple {2259#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2259#false} is VALID [2022-04-07 17:40:56,778 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 17:40:56,778 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:40:56,779 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [154958216] [2022-04-07 17:40:56,779 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [154958216] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:40:56,779 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1187841141] [2022-04-07 17:40:56,779 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:40:56,779 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:40:56,779 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:40:56,780 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:40:56,781 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2022-04-07 17:40:56,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:40:56,810 INFO L263 TraceCheckSpWp]: Trace formula consists of 63 conjuncts, 11 conjunts are in the unsatisfiable core [2022-04-07 17:40:56,819 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:40:56,820 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:40:57,381 INFO L272 TraceCheckUtils]: 0: Hoare triple {2258#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2258#true} is VALID [2022-04-07 17:40:57,381 INFO L290 TraceCheckUtils]: 1: Hoare triple {2258#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2258#true} is VALID [2022-04-07 17:40:57,381 INFO L290 TraceCheckUtils]: 2: Hoare triple {2258#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2258#true} is VALID [2022-04-07 17:40:57,381 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2258#true} {2258#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2258#true} is VALID [2022-04-07 17:40:57,382 INFO L272 TraceCheckUtils]: 4: Hoare triple {2258#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2258#true} is VALID [2022-04-07 17:40:57,382 INFO L290 TraceCheckUtils]: 5: Hoare triple {2258#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2263#(= main_~y~0 0)} is VALID [2022-04-07 17:40:57,383 INFO L290 TraceCheckUtils]: 6: Hoare triple {2263#(= main_~y~0 0)} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2264#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:40:57,383 INFO L290 TraceCheckUtils]: 7: Hoare triple {2264#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {2265#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:40:57,384 INFO L290 TraceCheckUtils]: 8: Hoare triple {2265#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [98] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_8 4294967296))) (or (and (= v_main_~x~0_9 v_main_~x~0_8) (<= .cse0 0) (= v_main_~z~0_8 v_main_~z~0_7) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)) (and (forall ((v_it_2 Int)) (or (< 0 (mod (+ v_main_~z~0_8 (* v_it_2 4294967295)) 4294967296)) (not (<= (+ v_main_~z~0_7 v_it_2 1) v_main_~z~0_8)) (not (<= 1 v_it_2)))) (= (+ v_main_~x~0_9 v_main_~z~0_8 (* (- 1) v_main_~z~0_7)) v_main_~x~0_8) (< 0 .cse0) (< v_main_~z~0_7 v_main_~z~0_8)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_8, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2264#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:40:57,385 INFO L290 TraceCheckUtils]: 9: Hoare triple {2264#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {2264#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:40:57,385 INFO L290 TraceCheckUtils]: 10: Hoare triple {2264#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2264#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:40:57,387 INFO L290 TraceCheckUtils]: 11: Hoare triple {2264#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [104] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (< v_main_~x~0_6 v_main_~x~0_7) (= (+ (* (- 1) v_main_~x~0_6) v_main_~x~0_7 v_main_~y~0_8) v_main_~y~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_8 v_main_~y~0_7) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_8, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {2263#(= main_~y~0 0)} is VALID [2022-04-07 17:40:57,387 INFO L290 TraceCheckUtils]: 12: Hoare triple {2263#(= main_~y~0 0)} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2263#(= main_~y~0 0)} is VALID [2022-04-07 17:40:57,387 INFO L290 TraceCheckUtils]: 13: Hoare triple {2263#(= main_~y~0 0)} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {2263#(= main_~y~0 0)} is VALID [2022-04-07 17:40:57,388 INFO L272 TraceCheckUtils]: 14: Hoare triple {2263#(= main_~y~0 0)} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {2315#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:40:57,388 INFO L290 TraceCheckUtils]: 15: Hoare triple {2315#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2319#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:40:57,388 INFO L290 TraceCheckUtils]: 16: Hoare triple {2319#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2259#false} is VALID [2022-04-07 17:40:57,389 INFO L290 TraceCheckUtils]: 17: Hoare triple {2259#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2259#false} is VALID [2022-04-07 17:40:57,389 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:40:57,389 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 17:41:21,443 INFO L290 TraceCheckUtils]: 17: Hoare triple {2259#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2259#false} is VALID [2022-04-07 17:41:21,443 INFO L290 TraceCheckUtils]: 16: Hoare triple {2319#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2259#false} is VALID [2022-04-07 17:41:21,443 INFO L290 TraceCheckUtils]: 15: Hoare triple {2315#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2319#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:41:21,444 INFO L272 TraceCheckUtils]: 14: Hoare triple {2335#(= (mod main_~y~0 4294967296) 0)} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {2315#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:41:21,444 INFO L290 TraceCheckUtils]: 13: Hoare triple {2335#(= (mod main_~y~0 4294967296) 0)} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {2335#(= (mod main_~y~0 4294967296) 0)} is VALID [2022-04-07 17:41:21,444 INFO L290 TraceCheckUtils]: 12: Hoare triple {2335#(= (mod main_~y~0 4294967296) 0)} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2335#(= (mod main_~y~0 4294967296) 0)} is VALID [2022-04-07 17:41:23,457 WARN L290 TraceCheckUtils]: 11: Hoare triple {2345#(forall ((aux_mod_v_main_~y~0_50_31 Int)) (or (and (or (forall ((aux_div_v_main_~y~0_50_31 Int)) (or (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ aux_mod_v_main_~y~0_50_31 (* aux_div_v_main_~y~0_50_31 4294967296))) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))) (not (< main_~y~0 (+ aux_mod_v_main_~y~0_50_31 (* aux_div_v_main_~y~0_50_31 4294967296)))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (< 0 (mod main_~x~0 4294967296)) (forall ((aux_div_v_main_~y~0_50_31 Int)) (not (= (+ aux_mod_v_main_~y~0_50_31 (* aux_div_v_main_~y~0_50_31 4294967296)) main_~y~0))))) (> 0 aux_mod_v_main_~y~0_50_31) (= aux_mod_v_main_~y~0_50_31 0) (>= aux_mod_v_main_~y~0_50_31 4294967296)))} [104] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (< v_main_~x~0_6 v_main_~x~0_7) (= (+ (* (- 1) v_main_~x~0_6) v_main_~x~0_7 v_main_~y~0_8) v_main_~y~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_8 v_main_~y~0_7) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_8, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {2335#(= (mod main_~y~0 4294967296) 0)} is UNKNOWN [2022-04-07 17:41:23,484 INFO L290 TraceCheckUtils]: 10: Hoare triple {2349#(or (forall ((aux_mod_v_main_~y~0_50_31 Int)) (or (forall ((aux_div_v_main_~y~0_50_31 Int)) (or (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ aux_mod_v_main_~y~0_50_31 (* aux_div_v_main_~y~0_50_31 4294967296))) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))) (not (< main_~y~0 (+ aux_mod_v_main_~y~0_50_31 (* aux_div_v_main_~y~0_50_31 4294967296)))))) (> 0 aux_mod_v_main_~y~0_50_31) (= aux_mod_v_main_~y~0_50_31 0) (not (< 0 (mod main_~x~0 4294967296))) (>= aux_mod_v_main_~y~0_50_31 4294967296))) (< 0 (mod main_~y~0 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2345#(forall ((aux_mod_v_main_~y~0_50_31 Int)) (or (and (or (forall ((aux_div_v_main_~y~0_50_31 Int)) (or (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ aux_mod_v_main_~y~0_50_31 (* aux_div_v_main_~y~0_50_31 4294967296))) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))) (not (< main_~y~0 (+ aux_mod_v_main_~y~0_50_31 (* aux_div_v_main_~y~0_50_31 4294967296)))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (< 0 (mod main_~x~0 4294967296)) (forall ((aux_div_v_main_~y~0_50_31 Int)) (not (= (+ aux_mod_v_main_~y~0_50_31 (* aux_div_v_main_~y~0_50_31 4294967296)) main_~y~0))))) (> 0 aux_mod_v_main_~y~0_50_31) (= aux_mod_v_main_~y~0_50_31 0) (>= aux_mod_v_main_~y~0_50_31 4294967296)))} is VALID [2022-04-07 17:41:23,508 INFO L290 TraceCheckUtils]: 9: Hoare triple {2349#(or (forall ((aux_mod_v_main_~y~0_50_31 Int)) (or (forall ((aux_div_v_main_~y~0_50_31 Int)) (or (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ aux_mod_v_main_~y~0_50_31 (* aux_div_v_main_~y~0_50_31 4294967296))) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))) (not (< main_~y~0 (+ aux_mod_v_main_~y~0_50_31 (* aux_div_v_main_~y~0_50_31 4294967296)))))) (> 0 aux_mod_v_main_~y~0_50_31) (= aux_mod_v_main_~y~0_50_31 0) (not (< 0 (mod main_~x~0 4294967296))) (>= aux_mod_v_main_~y~0_50_31 4294967296))) (< 0 (mod main_~y~0 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {2349#(or (forall ((aux_mod_v_main_~y~0_50_31 Int)) (or (forall ((aux_div_v_main_~y~0_50_31 Int)) (or (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ aux_mod_v_main_~y~0_50_31 (* aux_div_v_main_~y~0_50_31 4294967296))) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))) (not (< main_~y~0 (+ aux_mod_v_main_~y~0_50_31 (* aux_div_v_main_~y~0_50_31 4294967296)))))) (> 0 aux_mod_v_main_~y~0_50_31) (= aux_mod_v_main_~y~0_50_31 0) (not (< 0 (mod main_~x~0 4294967296))) (>= aux_mod_v_main_~y~0_50_31 4294967296))) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-07 17:41:25,553 WARN L290 TraceCheckUtils]: 8: Hoare triple {2356#(or (forall ((aux_mod_v_main_~y~0_50_31 Int) (aux_div_v_main_~y~0_50_31 Int) (aux_mod_v_main_~x~0_32_31 Int)) (or (<= aux_mod_v_main_~x~0_32_31 0) (< aux_mod_v_main_~y~0_50_31 0) (= aux_mod_v_main_~y~0_50_31 0) (<= (+ aux_mod_v_main_~y~0_50_31 (* aux_div_v_main_~y~0_50_31 4294967296)) main_~y~0) (<= 4294967296 aux_mod_v_main_~y~0_50_31) (and (or (forall ((aux_div_v_main_~x~0_32_31 Int)) (or (not (< main_~x~0 (+ aux_mod_v_main_~x~0_32_31 (* aux_div_v_main_~x~0_32_31 4294967296)))) (exists ((v_it_2 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_2 4294967295)) 4294967296))) (<= (+ v_it_2 main_~x~0 1) (+ aux_mod_v_main_~x~0_32_31 (* aux_div_v_main_~x~0_32_31 4294967296))) (<= 1 v_it_2))))) (not (< 0 (mod main_~z~0 4294967296)))) (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~x~0_32_31 Int)) (not (= main_~x~0 (+ aux_mod_v_main_~x~0_32_31 (* aux_div_v_main_~x~0_32_31 4294967296))))))) (<= 4294967296 aux_mod_v_main_~x~0_32_31) (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ aux_mod_v_main_~y~0_50_31 (* aux_div_v_main_~y~0_50_31 4294967296))) (not (< 0 (mod (+ (* v_it_4 4294967295) aux_mod_v_main_~x~0_32_31) 4294967296))) (<= 1 v_it_4))))) (< 0 (mod main_~y~0 4294967296)))} [98] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_8 4294967296))) (or (and (= v_main_~x~0_9 v_main_~x~0_8) (<= .cse0 0) (= v_main_~z~0_8 v_main_~z~0_7) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)) (and (forall ((v_it_2 Int)) (or (< 0 (mod (+ v_main_~z~0_8 (* v_it_2 4294967295)) 4294967296)) (not (<= (+ v_main_~z~0_7 v_it_2 1) v_main_~z~0_8)) (not (<= 1 v_it_2)))) (= (+ v_main_~x~0_9 v_main_~z~0_8 (* (- 1) v_main_~z~0_7)) v_main_~x~0_8) (< 0 .cse0) (< v_main_~z~0_7 v_main_~z~0_8)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_8, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2349#(or (forall ((aux_mod_v_main_~y~0_50_31 Int)) (or (forall ((aux_div_v_main_~y~0_50_31 Int)) (or (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ aux_mod_v_main_~y~0_50_31 (* aux_div_v_main_~y~0_50_31 4294967296))) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))) (not (< main_~y~0 (+ aux_mod_v_main_~y~0_50_31 (* aux_div_v_main_~y~0_50_31 4294967296)))))) (> 0 aux_mod_v_main_~y~0_50_31) (= aux_mod_v_main_~y~0_50_31 0) (not (< 0 (mod main_~x~0 4294967296))) (>= aux_mod_v_main_~y~0_50_31 4294967296))) (< 0 (mod main_~y~0 4294967296)))} is UNKNOWN [2022-04-07 17:41:25,578 INFO L290 TraceCheckUtils]: 7: Hoare triple {2360#(or (<= (div (* (- 1) main_~x~0) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1)) (< 0 (mod main_~y~0 4294967296)))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {2356#(or (forall ((aux_mod_v_main_~y~0_50_31 Int) (aux_div_v_main_~y~0_50_31 Int) (aux_mod_v_main_~x~0_32_31 Int)) (or (<= aux_mod_v_main_~x~0_32_31 0) (< aux_mod_v_main_~y~0_50_31 0) (= aux_mod_v_main_~y~0_50_31 0) (<= (+ aux_mod_v_main_~y~0_50_31 (* aux_div_v_main_~y~0_50_31 4294967296)) main_~y~0) (<= 4294967296 aux_mod_v_main_~y~0_50_31) (and (or (forall ((aux_div_v_main_~x~0_32_31 Int)) (or (not (< main_~x~0 (+ aux_mod_v_main_~x~0_32_31 (* aux_div_v_main_~x~0_32_31 4294967296)))) (exists ((v_it_2 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_2 4294967295)) 4294967296))) (<= (+ v_it_2 main_~x~0 1) (+ aux_mod_v_main_~x~0_32_31 (* aux_div_v_main_~x~0_32_31 4294967296))) (<= 1 v_it_2))))) (not (< 0 (mod main_~z~0 4294967296)))) (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~x~0_32_31 Int)) (not (= main_~x~0 (+ aux_mod_v_main_~x~0_32_31 (* aux_div_v_main_~x~0_32_31 4294967296))))))) (<= 4294967296 aux_mod_v_main_~x~0_32_31) (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ aux_mod_v_main_~y~0_50_31 (* aux_div_v_main_~y~0_50_31 4294967296))) (not (< 0 (mod (+ (* v_it_4 4294967295) aux_mod_v_main_~x~0_32_31) 4294967296))) (<= 1 v_it_4))))) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-07 17:41:25,580 INFO L290 TraceCheckUtils]: 6: Hoare triple {2258#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2360#(or (<= (div (* (- 1) main_~x~0) (- 4294967296)) (+ (div (+ main_~x~0 (- 4294967296)) 4294967296) 1)) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-07 17:41:25,580 INFO L290 TraceCheckUtils]: 5: Hoare triple {2258#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2258#true} is VALID [2022-04-07 17:41:25,580 INFO L272 TraceCheckUtils]: 4: Hoare triple {2258#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2258#true} is VALID [2022-04-07 17:41:25,580 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2258#true} {2258#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2258#true} is VALID [2022-04-07 17:41:25,581 INFO L290 TraceCheckUtils]: 2: Hoare triple {2258#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2258#true} is VALID [2022-04-07 17:41:25,581 INFO L290 TraceCheckUtils]: 1: Hoare triple {2258#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2258#true} is VALID [2022-04-07 17:41:25,581 INFO L272 TraceCheckUtils]: 0: Hoare triple {2258#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2258#true} is VALID [2022-04-07 17:41:25,581 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:41:25,581 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1187841141] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 17:41:25,581 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 17:41:25,581 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 7, 9] total 16 [2022-04-07 17:41:25,582 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1880184090] [2022-04-07 17:41:25,582 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 17:41:25,582 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 2.0) internal successors, (32), 13 states have internal predecessors, (32), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-07 17:41:25,582 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:41:25,582 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 16 states, 16 states have (on average 2.0) internal successors, (32), 13 states have internal predecessors, (32), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:41:29,759 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 39 edges. 37 inductive. 0 not inductive. 2 times theorem prover too weak to decide inductivity. [2022-04-07 17:41:29,759 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2022-04-07 17:41:29,760 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:41:29,760 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2022-04-07 17:41:29,760 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=184, Unknown=5, NotChecked=0, Total=240 [2022-04-07 17:41:29,760 INFO L87 Difference]: Start difference. First operand 36 states and 54 transitions. Second operand has 16 states, 16 states have (on average 2.0) internal successors, (32), 13 states have internal predecessors, (32), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:41:48,874 WARN L232 SmtUtils]: Spent 12.44s on a formula simplification that was a NOOP. DAG size: 86 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 17:42:08,394 WARN L232 SmtUtils]: Spent 15.04s on a formula simplification. DAG size of input: 92 DAG size of output: 90 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 17:42:25,394 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:42:25,395 INFO L93 Difference]: Finished difference Result 58 states and 86 transitions. [2022-04-07 17:42:25,395 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2022-04-07 17:42:25,395 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 2.0) internal successors, (32), 13 states have internal predecessors, (32), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-07 17:42:25,395 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:42:25,395 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 2.0) internal successors, (32), 13 states have internal predecessors, (32), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:42:25,396 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 60 transitions. [2022-04-07 17:42:25,396 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 2.0) internal successors, (32), 13 states have internal predecessors, (32), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:42:25,397 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 60 transitions. [2022-04-07 17:42:25,397 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 17 states and 60 transitions. [2022-04-07 17:42:31,832 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 60 edges. 57 inductive. 0 not inductive. 3 times theorem prover too weak to decide inductivity. [2022-04-07 17:42:31,833 INFO L225 Difference]: With dead ends: 58 [2022-04-07 17:42:31,833 INFO L226 Difference]: Without dead ends: 54 [2022-04-07 17:42:31,833 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 61 GetRequests, 29 SyntacticMatches, 8 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 173 ImplicationChecksByTransitivity, 68.1s TimeCoverageRelationStatistics Valid=140, Invalid=499, Unknown=11, NotChecked=0, Total=650 [2022-04-07 17:42:31,834 INFO L913 BasicCegarLoop]: 13 mSDtfsCounter, 46 mSDsluCounter, 51 mSDsCounter, 0 mSdLazyCounter, 54 mSolverCounterSat, 16 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 46 SdHoareTripleChecker+Valid, 64 SdHoareTripleChecker+Invalid, 127 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 16 IncrementalHoareTripleChecker+Valid, 54 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 57 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-07 17:42:31,834 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [46 Valid, 64 Invalid, 127 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [16 Valid, 54 Invalid, 0 Unknown, 57 Unchecked, 0.2s Time] [2022-04-07 17:42:31,834 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54 states. [2022-04-07 17:42:31,835 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54 to 40. [2022-04-07 17:42:31,836 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:42:31,836 INFO L82 GeneralOperation]: Start isEquivalent. First operand 54 states. Second operand has 40 states, 35 states have (on average 1.6285714285714286) internal successors, (57), 35 states have internal predecessors, (57), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:42:31,836 INFO L74 IsIncluded]: Start isIncluded. First operand 54 states. Second operand has 40 states, 35 states have (on average 1.6285714285714286) internal successors, (57), 35 states have internal predecessors, (57), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:42:31,836 INFO L87 Difference]: Start difference. First operand 54 states. Second operand has 40 states, 35 states have (on average 1.6285714285714286) internal successors, (57), 35 states have internal predecessors, (57), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:42:31,837 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:42:31,837 INFO L93 Difference]: Finished difference Result 54 states and 81 transitions. [2022-04-07 17:42:31,837 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 81 transitions. [2022-04-07 17:42:31,837 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:42:31,837 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:42:31,837 INFO L74 IsIncluded]: Start isIncluded. First operand has 40 states, 35 states have (on average 1.6285714285714286) internal successors, (57), 35 states have internal predecessors, (57), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 54 states. [2022-04-07 17:42:31,837 INFO L87 Difference]: Start difference. First operand has 40 states, 35 states have (on average 1.6285714285714286) internal successors, (57), 35 states have internal predecessors, (57), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 54 states. [2022-04-07 17:42:31,838 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:42:31,838 INFO L93 Difference]: Finished difference Result 54 states and 81 transitions. [2022-04-07 17:42:31,838 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 81 transitions. [2022-04-07 17:42:31,838 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:42:31,838 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:42:31,838 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:42:31,838 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:42:31,839 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 40 states, 35 states have (on average 1.6285714285714286) internal successors, (57), 35 states have internal predecessors, (57), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:42:31,839 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 61 transitions. [2022-04-07 17:42:31,839 INFO L78 Accepts]: Start accepts. Automaton has 40 states and 61 transitions. Word has length 18 [2022-04-07 17:42:31,839 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:42:31,839 INFO L478 AbstractCegarLoop]: Abstraction has 40 states and 61 transitions. [2022-04-07 17:42:31,839 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 2.0) internal successors, (32), 13 states have internal predecessors, (32), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:42:31,839 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 61 transitions. [2022-04-07 17:42:31,840 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-07 17:42:31,840 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:42:31,840 INFO L499 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:42:31,856 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Ended with exit code 0 [2022-04-07 17:42:32,041 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable9 [2022-04-07 17:42:32,041 INFO L403 AbstractCegarLoop]: === Iteration 11 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:42:32,042 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:42:32,042 INFO L85 PathProgramCache]: Analyzing trace with hash 2126008490, now seen corresponding path program 2 times [2022-04-07 17:42:32,042 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:42:32,042 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1689745755] [2022-04-07 17:42:32,042 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:42:32,042 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:42:32,050 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.0))) (+ .cse0 main_~x~0_5 (* (- 4294967296) (div (+ .cse0 main_~x~0_5) 4294967296)))) 0)) [2022-04-07 17:42:32,051 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.1))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-07 17:42:32,052 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.2))) (+ main_~z~0_12 .cse0 (* (- 4294967296) (div (+ main_~z~0_12 .cse0) 4294967296)))) 0)) [2022-04-07 17:42:32,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:42:32,060 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.3))) (+ .cse0 main_~x~0_5 (* (- 4294967296) (div (+ .cse0 main_~x~0_5) 4294967296)))) 0)) [2022-04-07 17:42:32,061 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.4))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-07 17:42:32,062 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.5))) (+ main_~z~0_12 .cse0 (* (- 4294967296) (div (+ main_~z~0_12 .cse0) 4294967296)))) 0)) [2022-04-07 17:42:32,422 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:42:32,423 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:42:32,426 INFO L290 TraceCheckUtils]: 0: Hoare triple {2626#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2614#true} is VALID [2022-04-07 17:42:32,426 INFO L290 TraceCheckUtils]: 1: Hoare triple {2614#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2614#true} is VALID [2022-04-07 17:42:32,426 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2614#true} {2614#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2614#true} is VALID [2022-04-07 17:42:32,426 INFO L272 TraceCheckUtils]: 0: Hoare triple {2614#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2626#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:42:32,426 INFO L290 TraceCheckUtils]: 1: Hoare triple {2626#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2614#true} is VALID [2022-04-07 17:42:32,426 INFO L290 TraceCheckUtils]: 2: Hoare triple {2614#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2614#true} is VALID [2022-04-07 17:42:32,426 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2614#true} {2614#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2614#true} is VALID [2022-04-07 17:42:32,427 INFO L272 TraceCheckUtils]: 4: Hoare triple {2614#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2614#true} is VALID [2022-04-07 17:42:32,427 INFO L290 TraceCheckUtils]: 5: Hoare triple {2614#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2619#(= main_~y~0 0)} is VALID [2022-04-07 17:42:32,428 INFO L290 TraceCheckUtils]: 6: Hoare triple {2619#(= main_~y~0 0)} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2620#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:42:32,428 INFO L290 TraceCheckUtils]: 7: Hoare triple {2620#(and (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {2621#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:42:32,428 INFO L290 TraceCheckUtils]: 8: Hoare triple {2621#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {2621#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:42:32,429 INFO L290 TraceCheckUtils]: 9: Hoare triple {2621#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2621#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:42:32,430 INFO L290 TraceCheckUtils]: 10: Hoare triple {2621#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [104] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (< v_main_~x~0_6 v_main_~x~0_7) (= (+ (* (- 1) v_main_~x~0_6) v_main_~x~0_7 v_main_~y~0_8) v_main_~y~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_8 v_main_~y~0_7) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_8, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {2622#(and (<= 0 main_~y~0) (= main_~z~0 0) (<= main_~y~0 0))} is VALID [2022-04-07 17:42:32,431 INFO L290 TraceCheckUtils]: 11: Hoare triple {2622#(and (<= 0 main_~y~0) (= main_~z~0 0) (<= main_~y~0 0))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2622#(and (<= 0 main_~y~0) (= main_~z~0 0) (<= main_~y~0 0))} is VALID [2022-04-07 17:42:32,431 INFO L290 TraceCheckUtils]: 12: Hoare triple {2622#(and (<= 0 main_~y~0) (= main_~z~0 0) (<= main_~y~0 0))} [107] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~y~0_10 (+ v_main_~y~0_11 v_main_~z~0_9 (* (- 1) v_main_~z~0_10))) (< 0 .cse0) (forall ((v_it_5 Int)) (or (not (<= (+ v_main_~z~0_9 v_it_5 1) v_main_~z~0_10)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)))) (< v_main_~z~0_9 v_main_~z~0_10)) (and (<= .cse0 0) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (= v_main_~y~0_11 v_main_~y~0_10) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {2622#(and (<= 0 main_~y~0) (= main_~z~0 0) (<= main_~y~0 0))} is VALID [2022-04-07 17:42:32,433 INFO L290 TraceCheckUtils]: 13: Hoare triple {2622#(and (<= 0 main_~y~0) (= main_~z~0 0) (<= main_~y~0 0))} [107] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~y~0_10 (+ v_main_~y~0_11 v_main_~z~0_9 (* (- 1) v_main_~z~0_10))) (< 0 .cse0) (forall ((v_it_5 Int)) (or (not (<= (+ v_main_~z~0_9 v_it_5 1) v_main_~z~0_10)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)))) (< v_main_~z~0_9 v_main_~z~0_10)) (and (<= .cse0 0) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (= v_main_~y~0_11 v_main_~y~0_10) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {2623#(and (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (not (<= (+ (div main_~y~0 4294967296) 1) 0)))} is VALID [2022-04-07 17:42:32,433 INFO L290 TraceCheckUtils]: 14: Hoare triple {2623#(and (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (not (<= (+ (div main_~y~0 4294967296) 1) 0)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {2623#(and (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (not (<= (+ (div main_~y~0 4294967296) 1) 0)))} is VALID [2022-04-07 17:42:32,434 INFO L272 TraceCheckUtils]: 15: Hoare triple {2623#(and (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (not (<= (+ (div main_~y~0 4294967296) 1) 0)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {2624#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:42:32,434 INFO L290 TraceCheckUtils]: 16: Hoare triple {2624#(not (= |__VERIFIER_assert_#in~cond| 0))} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2625#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:42:32,435 INFO L290 TraceCheckUtils]: 17: Hoare triple {2625#(not (= __VERIFIER_assert_~cond 0))} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2615#false} is VALID [2022-04-07 17:42:32,435 INFO L290 TraceCheckUtils]: 18: Hoare triple {2615#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2615#false} is VALID [2022-04-07 17:42:32,435 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 17:42:32,435 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:42:32,435 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1689745755] [2022-04-07 17:42:32,435 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1689745755] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:42:32,435 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [683035180] [2022-04-07 17:42:32,435 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-07 17:42:32,435 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:42:32,435 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:42:32,436 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:42:32,437 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2022-04-07 17:42:32,467 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-07 17:42:32,467 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 17:42:32,468 INFO L263 TraceCheckSpWp]: Trace formula consists of 64 conjuncts, 9 conjunts are in the unsatisfiable core [2022-04-07 17:42:32,478 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:42:32,479 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:42:33,782 INFO L272 TraceCheckUtils]: 0: Hoare triple {2614#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2614#true} is VALID [2022-04-07 17:42:33,782 INFO L290 TraceCheckUtils]: 1: Hoare triple {2614#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2614#true} is VALID [2022-04-07 17:42:33,782 INFO L290 TraceCheckUtils]: 2: Hoare triple {2614#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2614#true} is VALID [2022-04-07 17:42:33,782 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2614#true} {2614#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2614#true} is VALID [2022-04-07 17:42:33,782 INFO L272 TraceCheckUtils]: 4: Hoare triple {2614#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2614#true} is VALID [2022-04-07 17:42:33,782 INFO L290 TraceCheckUtils]: 5: Hoare triple {2614#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2614#true} is VALID [2022-04-07 17:42:33,783 INFO L290 TraceCheckUtils]: 6: Hoare triple {2614#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2648#(not (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-07 17:42:33,783 INFO L290 TraceCheckUtils]: 7: Hoare triple {2648#(not (< 0 (mod main_~x~0 4294967296)))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {2648#(not (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-07 17:42:33,783 INFO L290 TraceCheckUtils]: 8: Hoare triple {2648#(not (< 0 (mod main_~x~0 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {2655#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-07 17:42:33,784 INFO L290 TraceCheckUtils]: 9: Hoare triple {2655#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2659#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-07 17:42:33,785 INFO L290 TraceCheckUtils]: 10: Hoare triple {2659#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} [104] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (< v_main_~x~0_6 v_main_~x~0_7) (= (+ (* (- 1) v_main_~x~0_6) v_main_~x~0_7 v_main_~y~0_8) v_main_~y~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_8 v_main_~y~0_7) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_8, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {2663#(and (<= (mod main_~y~0 4294967296) 0) (<= (mod main_~z~0 4294967296) 0))} is VALID [2022-04-07 17:42:33,786 INFO L290 TraceCheckUtils]: 11: Hoare triple {2663#(and (<= (mod main_~y~0 4294967296) 0) (<= (mod main_~z~0 4294967296) 0))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2663#(and (<= (mod main_~y~0 4294967296) 0) (<= (mod main_~z~0 4294967296) 0))} is VALID [2022-04-07 17:42:33,787 INFO L290 TraceCheckUtils]: 12: Hoare triple {2663#(and (<= (mod main_~y~0 4294967296) 0) (<= (mod main_~z~0 4294967296) 0))} [107] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~y~0_10 (+ v_main_~y~0_11 v_main_~z~0_9 (* (- 1) v_main_~z~0_10))) (< 0 .cse0) (forall ((v_it_5 Int)) (or (not (<= (+ v_main_~z~0_9 v_it_5 1) v_main_~z~0_10)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)))) (< v_main_~z~0_9 v_main_~z~0_10)) (and (<= .cse0 0) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (= v_main_~y~0_11 v_main_~y~0_10) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {2663#(and (<= (mod main_~y~0 4294967296) 0) (<= (mod main_~z~0 4294967296) 0))} is VALID [2022-04-07 17:42:33,788 INFO L290 TraceCheckUtils]: 13: Hoare triple {2663#(and (<= (mod main_~y~0 4294967296) 0) (<= (mod main_~z~0 4294967296) 0))} [107] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~y~0_10 (+ v_main_~y~0_11 v_main_~z~0_9 (* (- 1) v_main_~z~0_10))) (< 0 .cse0) (forall ((v_it_5 Int)) (or (not (<= (+ v_main_~z~0_9 v_it_5 1) v_main_~z~0_10)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)))) (< v_main_~z~0_9 v_main_~z~0_10)) (and (<= .cse0 0) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (= v_main_~y~0_11 v_main_~y~0_10) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {2673#(<= (mod main_~y~0 4294967296) 0)} is VALID [2022-04-07 17:42:33,788 INFO L290 TraceCheckUtils]: 14: Hoare triple {2673#(<= (mod main_~y~0 4294967296) 0)} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {2673#(<= (mod main_~y~0 4294967296) 0)} is VALID [2022-04-07 17:42:33,789 INFO L272 TraceCheckUtils]: 15: Hoare triple {2673#(<= (mod main_~y~0 4294967296) 0)} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {2680#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:42:33,789 INFO L290 TraceCheckUtils]: 16: Hoare triple {2680#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2684#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:42:33,789 INFO L290 TraceCheckUtils]: 17: Hoare triple {2684#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2615#false} is VALID [2022-04-07 17:42:33,790 INFO L290 TraceCheckUtils]: 18: Hoare triple {2615#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2615#false} is VALID [2022-04-07 17:42:33,790 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 17:42:33,790 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 17:45:27,163 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_main_~y~0_56 Int) (aux_mod_v_main_~y~0_54_31 Int)) (or (<= aux_mod_v_main_~y~0_54_31 0) (let ((.cse0 (< 0 (mod c_main_~z~0 4294967296)))) (and (or (forall ((aux_div_v_main_~y~0_54_31 Int)) (not (= v_main_~y~0_56 (+ aux_mod_v_main_~y~0_54_31 (* aux_div_v_main_~y~0_54_31 4294967296))))) .cse0) (or (not .cse0) (and (forall ((aux_div_v_main_~y~0_55_70 Int) (aux_mod_v_main_~y~0_55_70 Int) (aux_div_v_main_~y~0_54_31 Int)) (let ((.cse1 (+ (* aux_div_v_main_~y~0_55_70 4294967296) aux_mod_v_main_~y~0_55_70))) (or (<= (+ (* v_main_~y~0_56 4294967296) c_main_~z~0) .cse1) (exists ((v_it_5 Int)) (and (<= (+ (* v_main_~y~0_56 4294967295) v_it_5 aux_mod_v_main_~y~0_54_31 c_main_~z~0 (* aux_div_v_main_~y~0_54_31 4294967296) 1) (+ (* aux_div_v_main_~y~0_55_70 4294967296) aux_mod_v_main_~y~0_55_70)) (<= 1 v_it_5) (not (< 0 (mod (+ aux_mod_v_main_~y~0_55_70 (* v_it_5 4294967295)) 4294967296))))) (<= aux_mod_v_main_~y~0_55_70 0) (<= .cse1 (+ (* v_main_~y~0_56 4294967295) aux_mod_v_main_~y~0_54_31 c_main_~z~0 (* aux_div_v_main_~y~0_54_31 4294967296))) (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ (* v_it_5 4294967295) c_main_~z~0) 4294967296))) (<= (+ (* aux_div_v_main_~y~0_55_70 4294967296) v_it_5 aux_mod_v_main_~y~0_55_70 1) (+ (* v_main_~y~0_56 4294967296) c_main_~z~0)) (<= 1 v_it_5))) (<= 4294967296 aux_mod_v_main_~y~0_55_70)))) (or (< 0 (mod (+ (* v_main_~y~0_56 4294967295) aux_mod_v_main_~y~0_54_31 c_main_~z~0) 4294967296)) (forall ((aux_div_v_main_~y~0_54_31 Int)) (or (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ (* v_it_5 4294967295) c_main_~z~0) 4294967296))) (<= 1 v_it_5) (<= (+ v_it_5 aux_mod_v_main_~y~0_54_31 (* aux_div_v_main_~y~0_54_31 4294967296) 1) v_main_~y~0_56))) (not (< (+ aux_mod_v_main_~y~0_54_31 (* aux_div_v_main_~y~0_54_31 4294967296)) v_main_~y~0_56))))))))) (<= 4294967296 aux_mod_v_main_~y~0_54_31) (let ((.cse2 (< 0 (mod c_main_~x~0 4294967296)))) (and (or (not .cse2) (exists ((v_it_4 Int)) (and (<= (+ v_it_4 c_main_~y~0 1) v_main_~y~0_56) (not (< 0 (mod (+ (* v_it_4 4294967295) c_main_~x~0) 4294967296))) (<= 1 v_it_4))) (not (< c_main_~y~0 v_main_~y~0_56))) (or (not (= v_main_~y~0_56 c_main_~y~0)) .cse2))))) is different from false