/usr/bin/java -ea -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --core.log.level.for.class de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN -tc ../../../trunk/examples/toolchains/AutomizerCTransformed.xml -s ../../../trunk/examples/settings/automizer/LoopAccelerationJordanC.epf -i ../../../trunk/examples/svcomp/loops-crafted-1/in-de61.c -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-34549b5 [2022-04-07 17:33:14,779 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-04-07 17:33:14,782 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-04-07 17:33:14,825 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... 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[2022-04-07 17:33:14,834 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-04-07 17:33:14,841 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-04-07 17:33:14,842 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-04-07 17:33:14,847 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-04-07 17:33:14,848 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-04-07 17:33:14,851 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-04-07 17:33:14,853 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-04-07 17:33:14,854 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-04-07 17:33:14,855 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-04-07 17:33:14,858 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-04-07 17:33:14,860 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-04-07 17:33:14,861 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-04-07 17:33:14,862 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-04-07 17:33:14,869 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2022-04-07 17:33:14,884 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/automizer/LoopAccelerationJordanC.epf [2022-04-07 17:33:14,897 INFO L113 SettingsManager]: Loading preferences was successful [2022-04-07 17:33:14,897 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-04-07 17:33:14,898 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-04-07 17:33:14,898 INFO L138 SettingsManager]: * sizeof long=4 [2022-04-07 17:33:14,899 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-04-07 17:33:14,899 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-04-07 17:33:14,899 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-04-07 17:33:14,899 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-04-07 17:33:14,899 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-04-07 17:33:14,900 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-04-07 17:33:14,900 INFO L138 SettingsManager]: * sizeof long double=12 [2022-04-07 17:33:14,900 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-04-07 17:33:14,901 INFO L138 SettingsManager]: * Use constant arrays=true [2022-04-07 17:33:14,901 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-04-07 17:33:14,901 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-04-07 17:33:14,901 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-04-07 17:33:14,901 INFO L138 SettingsManager]: * To the following directory=./dump/ [2022-04-07 17:33:14,901 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-04-07 17:33:14,901 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-07 17:33:14,902 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-04-07 17:33:14,902 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-04-07 17:33:14,903 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-04-07 17:33:14,904 INFO L138 SettingsManager]: * TransformationType=LOOP_ACCELERATION_JORDAN WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.core: Log level for class -> de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN; [2022-04-07 17:33:15,120 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-04-07 17:33:15,144 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-04-07 17:33:15,147 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-04-07 17:33:15,148 INFO L271 PluginConnector]: Initializing CDTParser... [2022-04-07 17:33:15,148 INFO L275 PluginConnector]: CDTParser initialized [2022-04-07 17:33:15,149 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loops-crafted-1/in-de61.c [2022-04-07 17:33:15,221 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/5c482d87d/11ed0f9fd1964bcb97a2280401a934e8/FLAGad767f6a1 [2022-04-07 17:33:15,583 INFO L306 CDTParser]: Found 1 translation units. [2022-04-07 17:33:15,584 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de61.c [2022-04-07 17:33:15,591 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/5c482d87d/11ed0f9fd1964bcb97a2280401a934e8/FLAGad767f6a1 [2022-04-07 17:33:16,012 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/5c482d87d/11ed0f9fd1964bcb97a2280401a934e8 [2022-04-07 17:33:16,014 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-04-07 17:33:16,016 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2022-04-07 17:33:16,017 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-04-07 17:33:16,017 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-04-07 17:33:16,020 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-04-07 17:33:16,021 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.04 05:33:16" (1/1) ... [2022-04-07 17:33:16,022 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7272ca13 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:33:16, skipping insertion in model container [2022-04-07 17:33:16,022 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.04 05:33:16" (1/1) ... [2022-04-07 17:33:16,028 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-04-07 17:33:16,040 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-04-07 17:33:16,256 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de61.c[368,381] [2022-04-07 17:33:16,290 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-07 17:33:16,304 INFO L203 MainTranslator]: Completed pre-run [2022-04-07 17:33:16,314 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de61.c[368,381] [2022-04-07 17:33:16,320 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-07 17:33:16,332 INFO L208 MainTranslator]: Completed translation [2022-04-07 17:33:16,332 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:33:16 WrapperNode [2022-04-07 17:33:16,332 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-04-07 17:33:16,333 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-04-07 17:33:16,333 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-04-07 17:33:16,333 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-04-07 17:33:16,342 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:33:16" (1/1) ... [2022-04-07 17:33:16,342 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:33:16" (1/1) ... [2022-04-07 17:33:16,347 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:33:16" (1/1) ... [2022-04-07 17:33:16,348 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:33:16" (1/1) ... [2022-04-07 17:33:16,354 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:33:16" (1/1) ... [2022-04-07 17:33:16,359 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:33:16" (1/1) ... [2022-04-07 17:33:16,360 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:33:16" (1/1) ... [2022-04-07 17:33:16,362 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-04-07 17:33:16,363 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-04-07 17:33:16,363 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-04-07 17:33:16,364 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-04-07 17:33:16,364 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:33:16" (1/1) ... [2022-04-07 17:33:16,371 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-07 17:33:16,379 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:33:16,397 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-04-07 17:33:16,405 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-04-07 17:33:16,437 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2022-04-07 17:33:16,437 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-04-07 17:33:16,438 INFO L138 BoogieDeclarations]: Found implementation of procedure reach_error [2022-04-07 17:33:16,438 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2022-04-07 17:33:16,438 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2022-04-07 17:33:16,438 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2022-04-07 17:33:16,438 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_fail [2022-04-07 17:33:16,439 INFO L130 BoogieDeclarations]: Found specification of procedure reach_error [2022-04-07 17:33:16,439 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-04-07 17:33:16,439 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_uint [2022-04-07 17:33:16,439 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2022-04-07 17:33:16,439 INFO L130 BoogieDeclarations]: Found specification of procedure main [2022-04-07 17:33:16,439 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2022-04-07 17:33:16,440 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-04-07 17:33:16,440 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-04-07 17:33:16,440 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-04-07 17:33:16,440 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-04-07 17:33:16,440 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-04-07 17:33:16,493 INFO L234 CfgBuilder]: Building ICFG [2022-04-07 17:33:16,495 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-04-07 17:33:16,660 INFO L275 CfgBuilder]: Performing block encoding [2022-04-07 17:33:16,666 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-04-07 17:33:16,667 INFO L299 CfgBuilder]: Removed 6 assume(true) statements. [2022-04-07 17:33:16,669 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.04 05:33:16 BoogieIcfgContainer [2022-04-07 17:33:16,669 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-04-07 17:33:16,670 INFO L113 PluginConnector]: ------------------------IcfgTransformer---------------------------- [2022-04-07 17:33:16,670 INFO L271 PluginConnector]: Initializing IcfgTransformer... [2022-04-07 17:33:16,673 INFO L275 PluginConnector]: IcfgTransformer initialized [2022-04-07 17:33:16,676 INFO L185 PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.04 05:33:16" (1/1) ... [2022-04-07 17:33:16,678 INFO L168 ansformationObserver]: Applying ICFG transformation LOOP_ACCELERATION_JORDAN [2022-04-07 17:33:17,308 INFO L89 elerationTransformer]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-07 17:33:17,309 INFO L91 elerationTransformer]: Accelerated Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_8 (+ v_main_~y~0_9 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_9} OutVars{main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_8, main_#t~post5=|v_main_#t~post5_1|, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] to Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~y~0_9 v_main_~y~0_8) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0)) (and (= v_main_~x~0_3 (+ (* (- 1) v_main_~y~0_8) v_main_~x~0_4 v_main_~y~0_9)) (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_9 v_it_1 1) v_main_~y~0_8)))) (< 0 .cse0) (< v_main_~y~0_9 v_main_~y~0_8)))) InVars {main_~y~0=v_main_~y~0_9, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_8, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] [2022-04-07 17:33:17,861 INFO L89 elerationTransformer]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-07 17:33:17,861 INFO L91 elerationTransformer]: Accelerated Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_11 4294967296)) (= v_main_~z~0_11 (+ v_main_~z~0_10 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_11} OutVars{main_~x~0=v_main_~x~0_8, main_~z~0=v_main_~z~0_10, main_#t~post8=|v_main_#t~post8_1|, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] to Formula: (let ((.cse0 (mod v_main_~z~0_11 4294967296))) (or (and (< v_main_~z~0_10 v_main_~z~0_11) (= v_main_~x~0_8 (+ v_main_~z~0_11 v_main_~x~0_9 (* (- 1) v_main_~z~0_10))) (< 0 .cse0) (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (not (<= (+ v_main_~z~0_10 v_it_2 1) v_main_~z~0_11)) (< 0 (mod (+ v_main_~z~0_11 (* v_it_2 4294967295)) 4294967296))))) (and (= v_main_~x~0_9 v_main_~x~0_8) (= v_main_~z~0_11 v_main_~z~0_10) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (<= .cse0 0) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_11, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_10, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] [2022-04-07 17:33:18,181 INFO L89 elerationTransformer]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-07 17:33:18,182 INFO L91 elerationTransformer]: Accelerated Formula: (and (< 0 (mod v_main_~y~0_5 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_5 (+ v_main_~y~0_4 1))) InVars {main_~z~0=v_main_~z~0_3, main_~y~0=v_main_~y~0_5} OutVars{main_#t~post10=|v_main_#t~post10_1|, main_~z~0=v_main_~z~0_2, main_~y~0=v_main_~y~0_4, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] to Formula: (let ((.cse0 (mod v_main_~y~0_5 4294967296))) (or (and (= v_main_~y~0_4 v_main_~y~0_5) (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= |v_main_#t~post9_3| |v_main_#t~post9_1|) (<= .cse0 0)) (and (= v_main_~y~0_4 (+ v_main_~y~0_5 v_main_~z~0_3 (* (- 1) v_main_~z~0_2))) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= (+ v_main_~z~0_3 v_it_3 1) v_main_~z~0_2)) (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_5 (* v_it_3 4294967295)) 4294967296)))) (< v_main_~z~0_3 v_main_~z~0_2)))) InVars {main_~y~0=v_main_~y~0_5, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] [2022-04-07 17:33:18,501 INFO L89 elerationTransformer]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-07 17:33:18,501 INFO L91 elerationTransformer]: Accelerated Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_10 (+ v_main_~y~0_11 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_11} OutVars{main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_10, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] to Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (= v_main_~y~0_10 (+ (* (- 1) v_main_~x~0_6) v_main_~y~0_11 v_main_~x~0_7)) (< v_main_~x~0_6 v_main_~x~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_11 v_main_~y~0_10) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_11, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_10, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] [2022-04-07 17:33:18,776 INFO L89 elerationTransformer]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-07 17:33:18,777 INFO L91 elerationTransformer]: Accelerated Formula: (and (= v_main_~z~0_13 (+ v_main_~z~0_12 1)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1)) (< 0 (mod v_main_~z~0_13 4294967296))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_13} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_12, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] to Formula: (let ((.cse0 (mod v_main_~z~0_13 4294967296))) (or (and (= v_main_~z~0_12 (+ v_main_~x~0_11 v_main_~z~0_13 (* (- 1) v_main_~x~0_10))) (< v_main_~x~0_11 v_main_~x~0_10) (forall ((v_it_5 Int)) (or (< 0 (mod (+ v_main_~z~0_13 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)) (not (<= (+ v_main_~x~0_11 v_it_5 1) v_main_~x~0_10)))) (< 0 .cse0)) (and (= v_main_~x~0_11 v_main_~x~0_10) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (<= .cse0 0) (= v_main_~z~0_13 v_main_~z~0_12) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_13, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_12, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] [2022-04-07 17:33:19,080 INFO L89 elerationTransformer]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-07 17:33:19,081 INFO L91 elerationTransformer]: Accelerated Formula: (and (< 0 (mod v_main_~y~0_7 4294967296)) (= v_main_~y~0_7 (+ v_main_~y~0_6 1)) (= v_main_~z~0_4 (+ v_main_~z~0_5 1))) InVars {main_~z~0=v_main_~z~0_5, main_~y~0=v_main_~y~0_7} OutVars{main_~z~0=v_main_~z~0_4, main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] to Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] [2022-04-07 17:33:19,085 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 07.04 05:33:19 BasicIcfg [2022-04-07 17:33:19,085 INFO L132 PluginConnector]: ------------------------ END IcfgTransformer---------------------------- [2022-04-07 17:33:19,086 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-04-07 17:33:19,086 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-04-07 17:33:19,089 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-04-07 17:33:19,090 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.04 05:33:16" (1/4) ... [2022-04-07 17:33:19,091 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5a3ee493 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.04 05:33:19, skipping insertion in model container [2022-04-07 17:33:19,091 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:33:16" (2/4) ... [2022-04-07 17:33:19,091 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5a3ee493 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.04 05:33:19, skipping insertion in model container [2022-04-07 17:33:19,091 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.04 05:33:16" (3/4) ... [2022-04-07 17:33:19,093 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5a3ee493 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.04 05:33:19, skipping insertion in model container [2022-04-07 17:33:19,093 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 07.04 05:33:19" (4/4) ... [2022-04-07 17:33:19,094 INFO L111 eAbstractionObserver]: Analyzing ICFG in-de61.cJordan [2022-04-07 17:33:19,100 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:ForwardPredicates Determinization: PREDICATE_ABSTRACTION [2022-04-07 17:33:19,100 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-04-07 17:33:19,142 INFO L339 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-04-07 17:33:19,150 INFO L340 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=ForwardPredicates, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=false, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=All, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP [2022-04-07 17:33:19,151 INFO L341 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-04-07 17:33:19,170 INFO L276 IsEmpty]: Start isEmpty. Operand has 25 states, 17 states have (on average 1.8235294117647058) internal successors, (31), 18 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 17:33:19,177 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-04-07 17:33:19,177 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:33:19,178 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:33:19,178 INFO L403 AbstractCegarLoop]: === Iteration 1 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:33:19,183 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:33:19,184 INFO L85 PathProgramCache]: Analyzing trace with hash 430051023, now seen corresponding path program 1 times [2022-04-07 17:33:19,192 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:33:19,193 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [245336107] [2022-04-07 17:33:19,193 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:33:19,194 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:33:19,270 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:33:19,301 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:33:19,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:33:19,316 INFO L290 TraceCheckUtils]: 0: Hoare triple {33#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {28#true} is VALID [2022-04-07 17:33:19,317 INFO L290 TraceCheckUtils]: 1: Hoare triple {28#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28#true} is VALID [2022-04-07 17:33:19,317 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {28#true} {28#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28#true} is VALID [2022-04-07 17:33:19,319 INFO L272 TraceCheckUtils]: 0: Hoare triple {28#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {33#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:33:19,319 INFO L290 TraceCheckUtils]: 1: Hoare triple {33#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {28#true} is VALID [2022-04-07 17:33:19,319 INFO L290 TraceCheckUtils]: 2: Hoare triple {28#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28#true} is VALID [2022-04-07 17:33:19,320 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {28#true} {28#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28#true} is VALID [2022-04-07 17:33:19,320 INFO L272 TraceCheckUtils]: 4: Hoare triple {28#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28#true} is VALID [2022-04-07 17:33:19,320 INFO L290 TraceCheckUtils]: 5: Hoare triple {28#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {28#true} is VALID [2022-04-07 17:33:19,321 INFO L290 TraceCheckUtils]: 6: Hoare triple {28#true} [103] L16-2-->L16-3: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {29#false} is VALID [2022-04-07 17:33:19,321 INFO L290 TraceCheckUtils]: 7: Hoare triple {29#false} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {29#false} is VALID [2022-04-07 17:33:19,321 INFO L290 TraceCheckUtils]: 8: Hoare triple {29#false} [107] L23-2-->L29-1: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {29#false} is VALID [2022-04-07 17:33:19,321 INFO L290 TraceCheckUtils]: 9: Hoare triple {29#false} [110] L29-1-->L35-1: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {29#false} is VALID [2022-04-07 17:33:19,321 INFO L290 TraceCheckUtils]: 10: Hoare triple {29#false} [113] L35-1-->L41-1: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {29#false} is VALID [2022-04-07 17:33:19,322 INFO L290 TraceCheckUtils]: 11: Hoare triple {29#false} [116] L41-1-->L47-1: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {29#false} is VALID [2022-04-07 17:33:19,322 INFO L290 TraceCheckUtils]: 12: Hoare triple {29#false} [119] L47-1-->L47-2: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {29#false} is VALID [2022-04-07 17:33:19,322 INFO L272 TraceCheckUtils]: 13: Hoare triple {29#false} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {29#false} is VALID [2022-04-07 17:33:19,322 INFO L290 TraceCheckUtils]: 14: Hoare triple {29#false} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {29#false} is VALID [2022-04-07 17:33:19,322 INFO L290 TraceCheckUtils]: 15: Hoare triple {29#false} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {29#false} is VALID [2022-04-07 17:33:19,323 INFO L290 TraceCheckUtils]: 16: Hoare triple {29#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {29#false} is VALID [2022-04-07 17:33:19,323 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:33:19,324 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:33:19,324 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [245336107] [2022-04-07 17:33:19,325 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [245336107] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 17:33:19,325 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 17:33:19,325 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-07 17:33:19,326 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1563778950] [2022-04-07 17:33:19,327 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 17:33:19,332 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 4.333333333333333) internal successors, (13), 2 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-07 17:33:19,334 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:33:19,337 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 4.333333333333333) internal successors, (13), 2 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:19,356 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 17 edges. 17 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:33:19,357 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-07 17:33:19,357 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:33:19,374 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-07 17:33:19,375 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-07 17:33:19,377 INFO L87 Difference]: Start difference. First operand has 25 states, 17 states have (on average 1.8235294117647058) internal successors, (31), 18 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 3 states, 3 states have (on average 4.333333333333333) internal successors, (13), 2 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:19,439 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:33:19,440 INFO L93 Difference]: Finished difference Result 25 states and 30 transitions. [2022-04-07 17:33:19,440 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-07 17:33:19,440 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 4.333333333333333) internal successors, (13), 2 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-07 17:33:19,441 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:33:19,442 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 4.333333333333333) internal successors, (13), 2 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:19,450 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 37 transitions. [2022-04-07 17:33:19,450 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 4.333333333333333) internal successors, (13), 2 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:19,453 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 37 transitions. [2022-04-07 17:33:19,453 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 37 transitions. [2022-04-07 17:33:19,500 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 37 edges. 37 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:33:19,512 INFO L225 Difference]: With dead ends: 25 [2022-04-07 17:33:19,512 INFO L226 Difference]: Without dead ends: 18 [2022-04-07 17:33:19,514 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-07 17:33:19,519 INFO L913 BasicCegarLoop]: 29 mSDtfsCounter, 21 mSDsluCounter, 3 mSDsCounter, 0 mSdLazyCounter, 3 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 22 SdHoareTripleChecker+Valid, 32 SdHoareTripleChecker+Invalid, 5 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 3 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 17:33:19,521 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [22 Valid, 32 Invalid, 5 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 3 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 17:33:19,536 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18 states. [2022-04-07 17:33:19,546 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18 to 18. [2022-04-07 17:33:19,547 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:33:19,548 INFO L82 GeneralOperation]: Start isEquivalent. First operand 18 states. Second operand has 18 states, 13 states have (on average 1.4615384615384615) internal successors, (19), 13 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:19,548 INFO L74 IsIncluded]: Start isIncluded. First operand 18 states. Second operand has 18 states, 13 states have (on average 1.4615384615384615) internal successors, (19), 13 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:19,550 INFO L87 Difference]: Start difference. First operand 18 states. Second operand has 18 states, 13 states have (on average 1.4615384615384615) internal successors, (19), 13 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:19,557 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:33:19,558 INFO L93 Difference]: Finished difference Result 18 states and 23 transitions. [2022-04-07 17:33:19,558 INFO L276 IsEmpty]: Start isEmpty. Operand 18 states and 23 transitions. [2022-04-07 17:33:19,558 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:33:19,558 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:33:19,559 INFO L74 IsIncluded]: Start isIncluded. First operand has 18 states, 13 states have (on average 1.4615384615384615) internal successors, (19), 13 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 18 states. [2022-04-07 17:33:19,560 INFO L87 Difference]: Start difference. First operand has 18 states, 13 states have (on average 1.4615384615384615) internal successors, (19), 13 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 18 states. [2022-04-07 17:33:19,564 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:33:19,566 INFO L93 Difference]: Finished difference Result 18 states and 23 transitions. [2022-04-07 17:33:19,567 INFO L276 IsEmpty]: Start isEmpty. Operand 18 states and 23 transitions. [2022-04-07 17:33:19,572 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:33:19,572 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:33:19,572 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:33:19,572 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:33:19,573 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 13 states have (on average 1.4615384615384615) internal successors, (19), 13 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:19,577 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 23 transitions. [2022-04-07 17:33:19,578 INFO L78 Accepts]: Start accepts. Automaton has 18 states and 23 transitions. Word has length 17 [2022-04-07 17:33:19,579 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:33:19,579 INFO L478 AbstractCegarLoop]: Abstraction has 18 states and 23 transitions. [2022-04-07 17:33:19,579 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 4.333333333333333) internal successors, (13), 2 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:19,579 INFO L276 IsEmpty]: Start isEmpty. Operand 18 states and 23 transitions. [2022-04-07 17:33:19,580 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-04-07 17:33:19,582 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:33:19,582 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:33:19,582 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-04-07 17:33:19,583 INFO L403 AbstractCegarLoop]: === Iteration 2 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:33:19,586 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:33:19,586 INFO L85 PathProgramCache]: Analyzing trace with hash -514488111, now seen corresponding path program 1 times [2022-04-07 17:33:19,586 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:33:19,587 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [984056923] [2022-04-07 17:33:19,587 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:33:19,587 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:33:19,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:33:19,914 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:33:19,917 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:33:19,937 INFO L290 TraceCheckUtils]: 0: Hoare triple {126#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {115#true} is VALID [2022-04-07 17:33:19,937 INFO L290 TraceCheckUtils]: 1: Hoare triple {115#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {115#true} is VALID [2022-04-07 17:33:19,937 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {115#true} {115#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {115#true} is VALID [2022-04-07 17:33:19,938 INFO L272 TraceCheckUtils]: 0: Hoare triple {115#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {126#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:33:19,939 INFO L290 TraceCheckUtils]: 1: Hoare triple {126#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {115#true} is VALID [2022-04-07 17:33:19,939 INFO L290 TraceCheckUtils]: 2: Hoare triple {115#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {115#true} is VALID [2022-04-07 17:33:19,939 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {115#true} {115#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {115#true} is VALID [2022-04-07 17:33:19,939 INFO L272 TraceCheckUtils]: 4: Hoare triple {115#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {115#true} is VALID [2022-04-07 17:33:19,940 INFO L290 TraceCheckUtils]: 5: Hoare triple {115#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {120#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 17:33:19,941 INFO L290 TraceCheckUtils]: 6: Hoare triple {120#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {121#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:33:19,942 INFO L290 TraceCheckUtils]: 7: Hoare triple {121#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {122#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:33:19,943 INFO L290 TraceCheckUtils]: 8: Hoare triple {122#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {122#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:33:19,943 INFO L290 TraceCheckUtils]: 9: Hoare triple {122#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {122#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:33:19,944 INFO L290 TraceCheckUtils]: 10: Hoare triple {122#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {123#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:33:19,945 INFO L290 TraceCheckUtils]: 11: Hoare triple {123#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {123#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:33:19,945 INFO L290 TraceCheckUtils]: 12: Hoare triple {123#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {123#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:33:19,946 INFO L272 TraceCheckUtils]: 13: Hoare triple {123#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {124#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:33:19,947 INFO L290 TraceCheckUtils]: 14: Hoare triple {124#(not (= |__VERIFIER_assert_#in~cond| 0))} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {125#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:33:19,948 INFO L290 TraceCheckUtils]: 15: Hoare triple {125#(not (= __VERIFIER_assert_~cond 0))} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {116#false} is VALID [2022-04-07 17:33:19,948 INFO L290 TraceCheckUtils]: 16: Hoare triple {116#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {116#false} is VALID [2022-04-07 17:33:19,949 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:33:19,950 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:33:19,950 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [984056923] [2022-04-07 17:33:19,950 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [984056923] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 17:33:19,950 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 17:33:19,950 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2022-04-07 17:33:19,951 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1587415083] [2022-04-07 17:33:19,954 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 17:33:19,955 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 1.4444444444444444) internal successors, (13), 7 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-07 17:33:19,956 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:33:19,956 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 9 states, 9 states have (on average 1.4444444444444444) internal successors, (13), 7 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:19,976 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 17 edges. 17 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:33:19,976 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2022-04-07 17:33:19,977 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:33:19,978 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2022-04-07 17:33:19,979 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2022-04-07 17:33:19,979 INFO L87 Difference]: Start difference. First operand 18 states and 23 transitions. Second operand has 9 states, 9 states have (on average 1.4444444444444444) internal successors, (13), 7 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:20,275 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:33:20,275 INFO L93 Difference]: Finished difference Result 33 states and 48 transitions. [2022-04-07 17:33:20,275 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-04-07 17:33:20,276 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 1.4444444444444444) internal successors, (13), 7 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-07 17:33:20,277 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:33:20,278 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 9 states have (on average 1.4444444444444444) internal successors, (13), 7 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:20,282 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 49 transitions. [2022-04-07 17:33:20,283 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 9 states have (on average 1.4444444444444444) internal successors, (13), 7 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:20,286 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 49 transitions. [2022-04-07 17:33:20,286 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 8 states and 49 transitions. [2022-04-07 17:33:20,348 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 49 edges. 49 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:33:20,364 INFO L225 Difference]: With dead ends: 33 [2022-04-07 17:33:20,365 INFO L226 Difference]: Without dead ends: 30 [2022-04-07 17:33:20,366 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=46, Invalid=136, Unknown=0, NotChecked=0, Total=182 [2022-04-07 17:33:20,368 INFO L913 BasicCegarLoop]: 9 mSDtfsCounter, 35 mSDsluCounter, 30 mSDsCounter, 0 mSdLazyCounter, 72 mSolverCounterSat, 10 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 35 SdHoareTripleChecker+Valid, 39 SdHoareTripleChecker+Invalid, 88 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Valid, 72 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 6 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 17:33:20,369 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [35 Valid, 39 Invalid, 88 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [10 Valid, 72 Invalid, 0 Unknown, 6 Unchecked, 0.1s Time] [2022-04-07 17:33:20,370 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states. [2022-04-07 17:33:20,374 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 25. [2022-04-07 17:33:20,375 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:33:20,375 INFO L82 GeneralOperation]: Start isEquivalent. First operand 30 states. Second operand has 25 states, 20 states have (on average 1.55) internal successors, (31), 20 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:20,376 INFO L74 IsIncluded]: Start isIncluded. First operand 30 states. Second operand has 25 states, 20 states have (on average 1.55) internal successors, (31), 20 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:20,376 INFO L87 Difference]: Start difference. First operand 30 states. Second operand has 25 states, 20 states have (on average 1.55) internal successors, (31), 20 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:20,379 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:33:20,379 INFO L93 Difference]: Finished difference Result 30 states and 45 transitions. [2022-04-07 17:33:20,379 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 45 transitions. [2022-04-07 17:33:20,380 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:33:20,380 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:33:20,381 INFO L74 IsIncluded]: Start isIncluded. First operand has 25 states, 20 states have (on average 1.55) internal successors, (31), 20 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 30 states. [2022-04-07 17:33:20,382 INFO L87 Difference]: Start difference. First operand has 25 states, 20 states have (on average 1.55) internal successors, (31), 20 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 30 states. [2022-04-07 17:33:20,384 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:33:20,384 INFO L93 Difference]: Finished difference Result 30 states and 45 transitions. [2022-04-07 17:33:20,385 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 45 transitions. [2022-04-07 17:33:20,385 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:33:20,385 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:33:20,385 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:33:20,386 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:33:20,386 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 20 states have (on average 1.55) internal successors, (31), 20 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:20,388 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 35 transitions. [2022-04-07 17:33:20,388 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 35 transitions. Word has length 17 [2022-04-07 17:33:20,388 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:33:20,388 INFO L478 AbstractCegarLoop]: Abstraction has 25 states and 35 transitions. [2022-04-07 17:33:20,389 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 1.4444444444444444) internal successors, (13), 7 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:20,389 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 35 transitions. [2022-04-07 17:33:20,389 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-04-07 17:33:20,389 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:33:20,390 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:33:20,390 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-04-07 17:33:20,390 INFO L403 AbstractCegarLoop]: === Iteration 3 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:33:20,398 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:33:20,398 INFO L85 PathProgramCache]: Analyzing trace with hash 34479891, now seen corresponding path program 1 times [2022-04-07 17:33:20,398 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:33:20,399 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [691169371] [2022-04-07 17:33:20,399 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:33:20,400 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:33:20,428 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.0))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-07 17:33:20,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:33:20,501 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.1))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-07 17:33:20,717 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:33:20,721 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:33:20,731 INFO L290 TraceCheckUtils]: 0: Hoare triple {269#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {257#true} is VALID [2022-04-07 17:33:20,732 INFO L290 TraceCheckUtils]: 1: Hoare triple {257#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {257#true} is VALID [2022-04-07 17:33:20,733 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {257#true} {257#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {257#true} is VALID [2022-04-07 17:33:20,734 INFO L272 TraceCheckUtils]: 0: Hoare triple {257#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {269#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:33:20,737 INFO L290 TraceCheckUtils]: 1: Hoare triple {269#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {257#true} is VALID [2022-04-07 17:33:20,737 INFO L290 TraceCheckUtils]: 2: Hoare triple {257#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {257#true} is VALID [2022-04-07 17:33:20,738 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {257#true} {257#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {257#true} is VALID [2022-04-07 17:33:20,739 INFO L272 TraceCheckUtils]: 4: Hoare triple {257#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {257#true} is VALID [2022-04-07 17:33:20,742 INFO L290 TraceCheckUtils]: 5: Hoare triple {257#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {262#(and (= main_~n~0 main_~x~0) (= main_~y~0 0))} is VALID [2022-04-07 17:33:20,744 INFO L290 TraceCheckUtils]: 6: Hoare triple {262#(and (= main_~n~0 main_~x~0) (= main_~y~0 0))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {263#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:33:20,745 INFO L290 TraceCheckUtils]: 7: Hoare triple {263#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {264#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 17:33:20,746 INFO L290 TraceCheckUtils]: 8: Hoare triple {264#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {264#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 17:33:20,747 INFO L290 TraceCheckUtils]: 9: Hoare triple {264#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [112] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_5 4294967296))) (or (and (= v_main_~y~0_4 v_main_~y~0_5) (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= |v_main_#t~post9_3| |v_main_#t~post9_1|) (<= .cse0 0)) (and (= v_main_~y~0_4 (+ v_main_~y~0_5 v_main_~z~0_3 (* (- 1) v_main_~z~0_2))) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= (+ v_main_~z~0_3 v_it_3 1) v_main_~z~0_2)) (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_5 (* v_it_3 4294967295)) 4294967296)))) (< v_main_~z~0_3 v_main_~z~0_2)))) InVars {main_~y~0=v_main_~y~0_5, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {265#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} is VALID [2022-04-07 17:33:20,747 INFO L290 TraceCheckUtils]: 10: Hoare triple {265#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {265#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} is VALID [2022-04-07 17:33:20,749 INFO L290 TraceCheckUtils]: 11: Hoare triple {265#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {266#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:33:20,751 INFO L290 TraceCheckUtils]: 12: Hoare triple {266#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {266#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:33:20,752 INFO L290 TraceCheckUtils]: 13: Hoare triple {266#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {266#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:33:20,754 INFO L272 TraceCheckUtils]: 14: Hoare triple {266#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {267#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:33:20,754 INFO L290 TraceCheckUtils]: 15: Hoare triple {267#(not (= |__VERIFIER_assert_#in~cond| 0))} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {268#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:33:20,755 INFO L290 TraceCheckUtils]: 16: Hoare triple {268#(not (= __VERIFIER_assert_~cond 0))} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {258#false} is VALID [2022-04-07 17:33:20,755 INFO L290 TraceCheckUtils]: 17: Hoare triple {258#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {258#false} is VALID [2022-04-07 17:33:20,756 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:33:20,756 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:33:20,756 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [691169371] [2022-04-07 17:33:20,757 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [691169371] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:33:20,757 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1040525100] [2022-04-07 17:33:20,757 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:33:20,757 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:33:20,757 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:33:20,763 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:33:20,774 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-04-07 17:33:20,815 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:33:20,817 INFO L263 TraceCheckSpWp]: Trace formula consists of 63 conjuncts, 7 conjunts are in the unsatisfiable core [2022-04-07 17:33:20,826 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:33:20,830 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:33:21,475 INFO L272 TraceCheckUtils]: 0: Hoare triple {257#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {257#true} is VALID [2022-04-07 17:33:21,476 INFO L290 TraceCheckUtils]: 1: Hoare triple {257#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {257#true} is VALID [2022-04-07 17:33:21,476 INFO L290 TraceCheckUtils]: 2: Hoare triple {257#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {257#true} is VALID [2022-04-07 17:33:21,476 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {257#true} {257#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {257#true} is VALID [2022-04-07 17:33:21,476 INFO L272 TraceCheckUtils]: 4: Hoare triple {257#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {257#true} is VALID [2022-04-07 17:33:21,477 INFO L290 TraceCheckUtils]: 5: Hoare triple {257#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {288#(= main_~n~0 main_~x~0)} is VALID [2022-04-07 17:33:21,477 INFO L290 TraceCheckUtils]: 6: Hoare triple {288#(= main_~n~0 main_~x~0)} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {292#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:33:21,478 INFO L290 TraceCheckUtils]: 7: Hoare triple {292#(not (< 0 (mod main_~n~0 4294967296)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {292#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:33:21,478 INFO L290 TraceCheckUtils]: 8: Hoare triple {292#(not (< 0 (mod main_~n~0 4294967296)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {292#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:33:21,479 INFO L290 TraceCheckUtils]: 9: Hoare triple {292#(not (< 0 (mod main_~n~0 4294967296)))} [112] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_5 4294967296))) (or (and (= v_main_~y~0_4 v_main_~y~0_5) (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= |v_main_#t~post9_3| |v_main_#t~post9_1|) (<= .cse0 0)) (and (= v_main_~y~0_4 (+ v_main_~y~0_5 v_main_~z~0_3 (* (- 1) v_main_~z~0_2))) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= (+ v_main_~z~0_3 v_it_3 1) v_main_~z~0_2)) (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_5 (* v_it_3 4294967295)) 4294967296)))) (< v_main_~z~0_3 v_main_~z~0_2)))) InVars {main_~y~0=v_main_~y~0_5, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {292#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:33:21,479 INFO L290 TraceCheckUtils]: 10: Hoare triple {292#(not (< 0 (mod main_~n~0 4294967296)))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {292#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:33:21,480 INFO L290 TraceCheckUtils]: 11: Hoare triple {292#(not (< 0 (mod main_~n~0 4294967296)))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {292#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:33:21,480 INFO L290 TraceCheckUtils]: 12: Hoare triple {292#(not (< 0 (mod main_~n~0 4294967296)))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {311#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:33:21,481 INFO L290 TraceCheckUtils]: 13: Hoare triple {311#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {311#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:33:21,482 INFO L272 TraceCheckUtils]: 14: Hoare triple {311#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {318#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:33:21,483 INFO L290 TraceCheckUtils]: 15: Hoare triple {318#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {322#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:33:21,483 INFO L290 TraceCheckUtils]: 16: Hoare triple {322#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {258#false} is VALID [2022-04-07 17:33:21,484 INFO L290 TraceCheckUtils]: 17: Hoare triple {258#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {258#false} is VALID [2022-04-07 17:33:21,484 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 17:33:21,484 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-07 17:33:21,484 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1040525100] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 17:33:21,484 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-07 17:33:21,485 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [10] total 15 [2022-04-07 17:33:21,485 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [351475435] [2022-04-07 17:33:21,485 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 17:33:21,485 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-07 17:33:21,486 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:33:21,486 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:21,503 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 18 edges. 18 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:33:21,503 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-04-07 17:33:21,504 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:33:21,504 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-04-07 17:33:21,504 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=163, Unknown=0, NotChecked=0, Total=210 [2022-04-07 17:33:21,505 INFO L87 Difference]: Start difference. First operand 25 states and 35 transitions. Second operand has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:21,624 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:33:21,624 INFO L93 Difference]: Finished difference Result 32 states and 45 transitions. [2022-04-07 17:33:21,625 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-04-07 17:33:21,625 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-07 17:33:21,625 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:33:21,625 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:21,627 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 46 transitions. [2022-04-07 17:33:21,627 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:21,628 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 46 transitions. [2022-04-07 17:33:21,628 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 9 states and 46 transitions. [2022-04-07 17:33:21,688 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 46 edges. 46 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:33:21,689 INFO L225 Difference]: With dead ends: 32 [2022-04-07 17:33:21,689 INFO L226 Difference]: Without dead ends: 29 [2022-04-07 17:33:21,690 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 59 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=68, Invalid=238, Unknown=0, NotChecked=0, Total=306 [2022-04-07 17:33:21,690 INFO L913 BasicCegarLoop]: 13 mSDtfsCounter, 12 mSDsluCounter, 51 mSDsCounter, 0 mSdLazyCounter, 24 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 12 SdHoareTripleChecker+Valid, 64 SdHoareTripleChecker+Invalid, 31 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 24 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 6 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 17:33:21,691 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [12 Valid, 64 Invalid, 31 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 24 Invalid, 0 Unknown, 6 Unchecked, 0.0s Time] [2022-04-07 17:33:21,691 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states. [2022-04-07 17:33:21,694 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 25. [2022-04-07 17:33:21,694 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:33:21,694 INFO L82 GeneralOperation]: Start isEquivalent. First operand 29 states. Second operand has 25 states, 20 states have (on average 1.55) internal successors, (31), 20 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:21,695 INFO L74 IsIncluded]: Start isIncluded. First operand 29 states. Second operand has 25 states, 20 states have (on average 1.55) internal successors, (31), 20 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:21,695 INFO L87 Difference]: Start difference. First operand 29 states. Second operand has 25 states, 20 states have (on average 1.55) internal successors, (31), 20 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:21,696 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:33:21,697 INFO L93 Difference]: Finished difference Result 29 states and 42 transitions. [2022-04-07 17:33:21,697 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 42 transitions. [2022-04-07 17:33:21,697 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:33:21,697 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:33:21,697 INFO L74 IsIncluded]: Start isIncluded. First operand has 25 states, 20 states have (on average 1.55) internal successors, (31), 20 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 29 states. [2022-04-07 17:33:21,698 INFO L87 Difference]: Start difference. First operand has 25 states, 20 states have (on average 1.55) internal successors, (31), 20 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 29 states. [2022-04-07 17:33:21,703 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:33:21,703 INFO L93 Difference]: Finished difference Result 29 states and 42 transitions. [2022-04-07 17:33:21,704 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 42 transitions. [2022-04-07 17:33:21,705 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:33:21,705 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:33:21,705 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:33:21,705 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:33:21,706 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 20 states have (on average 1.55) internal successors, (31), 20 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:21,708 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 35 transitions. [2022-04-07 17:33:21,709 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 35 transitions. Word has length 18 [2022-04-07 17:33:21,709 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:33:21,709 INFO L478 AbstractCegarLoop]: Abstraction has 25 states and 35 transitions. [2022-04-07 17:33:21,709 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:21,709 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 35 transitions. [2022-04-07 17:33:21,710 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-04-07 17:33:21,710 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:33:21,710 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:33:21,738 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2022-04-07 17:33:21,919 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2,2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:33:21,920 INFO L403 AbstractCegarLoop]: === Iteration 4 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:33:21,920 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:33:21,920 INFO L85 PathProgramCache]: Analyzing trace with hash 1257458414, now seen corresponding path program 1 times [2022-04-07 17:33:21,920 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:33:21,921 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [103165191] [2022-04-07 17:33:21,921 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:33:21,921 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:33:21,933 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_6.0))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-07 17:33:21,944 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:33:21,975 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_6.2))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-07 17:33:22,177 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:33:22,179 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:33:22,184 INFO L290 TraceCheckUtils]: 0: Hoare triple {462#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {449#true} is VALID [2022-04-07 17:33:22,185 INFO L290 TraceCheckUtils]: 1: Hoare triple {449#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {449#true} is VALID [2022-04-07 17:33:22,185 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {449#true} {449#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {449#true} is VALID [2022-04-07 17:33:22,186 INFO L272 TraceCheckUtils]: 0: Hoare triple {449#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {462#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:33:22,186 INFO L290 TraceCheckUtils]: 1: Hoare triple {462#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {449#true} is VALID [2022-04-07 17:33:22,186 INFO L290 TraceCheckUtils]: 2: Hoare triple {449#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {449#true} is VALID [2022-04-07 17:33:22,186 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {449#true} {449#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {449#true} is VALID [2022-04-07 17:33:22,186 INFO L272 TraceCheckUtils]: 4: Hoare triple {449#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {449#true} is VALID [2022-04-07 17:33:22,187 INFO L290 TraceCheckUtils]: 5: Hoare triple {449#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {454#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 17:33:22,189 INFO L290 TraceCheckUtils]: 6: Hoare triple {454#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {455#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:33:22,190 INFO L290 TraceCheckUtils]: 7: Hoare triple {455#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {456#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 17:33:22,191 INFO L290 TraceCheckUtils]: 8: Hoare triple {456#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {456#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 17:33:22,192 INFO L290 TraceCheckUtils]: 9: Hoare triple {456#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {457#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 17:33:22,193 INFO L290 TraceCheckUtils]: 10: Hoare triple {457#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {458#(and (= main_~z~0 0) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-07 17:33:22,193 INFO L290 TraceCheckUtils]: 11: Hoare triple {458#(and (= main_~z~0 0) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {458#(and (= main_~z~0 0) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-07 17:33:22,195 INFO L290 TraceCheckUtils]: 12: Hoare triple {458#(and (= main_~z~0 0) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {459#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:33:22,196 INFO L290 TraceCheckUtils]: 13: Hoare triple {459#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {459#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:33:22,197 INFO L272 TraceCheckUtils]: 14: Hoare triple {459#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {460#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:33:22,198 INFO L290 TraceCheckUtils]: 15: Hoare triple {460#(not (= |__VERIFIER_assert_#in~cond| 0))} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {461#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:33:22,198 INFO L290 TraceCheckUtils]: 16: Hoare triple {461#(not (= __VERIFIER_assert_~cond 0))} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {450#false} is VALID [2022-04-07 17:33:22,198 INFO L290 TraceCheckUtils]: 17: Hoare triple {450#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {450#false} is VALID [2022-04-07 17:33:22,199 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:33:22,199 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:33:22,199 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [103165191] [2022-04-07 17:33:22,199 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [103165191] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:33:22,199 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1252006203] [2022-04-07 17:33:22,199 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:33:22,200 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:33:22,200 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:33:22,204 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:33:22,207 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-04-07 17:33:22,242 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:33:22,243 INFO L263 TraceCheckSpWp]: Trace formula consists of 63 conjuncts, 9 conjunts are in the unsatisfiable core [2022-04-07 17:33:22,264 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:33:22,265 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:33:23,108 INFO L272 TraceCheckUtils]: 0: Hoare triple {449#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {449#true} is VALID [2022-04-07 17:33:23,109 INFO L290 TraceCheckUtils]: 1: Hoare triple {449#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {449#true} is VALID [2022-04-07 17:33:23,109 INFO L290 TraceCheckUtils]: 2: Hoare triple {449#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {449#true} is VALID [2022-04-07 17:33:23,109 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {449#true} {449#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {449#true} is VALID [2022-04-07 17:33:23,109 INFO L272 TraceCheckUtils]: 4: Hoare triple {449#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {449#true} is VALID [2022-04-07 17:33:23,110 INFO L290 TraceCheckUtils]: 5: Hoare triple {449#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {481#(= main_~n~0 main_~x~0)} is VALID [2022-04-07 17:33:23,111 INFO L290 TraceCheckUtils]: 6: Hoare triple {481#(= main_~n~0 main_~x~0)} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {485#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:33:23,111 INFO L290 TraceCheckUtils]: 7: Hoare triple {485#(not (< 0 (mod main_~n~0 4294967296)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {485#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:33:23,112 INFO L290 TraceCheckUtils]: 8: Hoare triple {485#(not (< 0 (mod main_~n~0 4294967296)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {492#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:33:23,112 INFO L290 TraceCheckUtils]: 9: Hoare triple {492#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {496#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:33:23,113 INFO L290 TraceCheckUtils]: 10: Hoare triple {496#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {496#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:33:23,113 INFO L290 TraceCheckUtils]: 11: Hoare triple {496#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {496#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:33:23,114 INFO L290 TraceCheckUtils]: 12: Hoare triple {496#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {492#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:33:23,115 INFO L290 TraceCheckUtils]: 13: Hoare triple {492#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {492#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:33:23,116 INFO L272 TraceCheckUtils]: 14: Hoare triple {492#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {512#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:33:23,116 INFO L290 TraceCheckUtils]: 15: Hoare triple {512#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {516#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:33:23,117 INFO L290 TraceCheckUtils]: 16: Hoare triple {516#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {450#false} is VALID [2022-04-07 17:33:23,117 INFO L290 TraceCheckUtils]: 17: Hoare triple {450#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {450#false} is VALID [2022-04-07 17:33:23,117 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:33:23,118 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 17:33:28,311 INFO L290 TraceCheckUtils]: 17: Hoare triple {450#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {450#false} is VALID [2022-04-07 17:33:28,312 INFO L290 TraceCheckUtils]: 16: Hoare triple {516#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {450#false} is VALID [2022-04-07 17:33:28,320 INFO L290 TraceCheckUtils]: 15: Hoare triple {512#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {516#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:33:28,321 INFO L272 TraceCheckUtils]: 14: Hoare triple {532#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {512#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:33:28,321 INFO L290 TraceCheckUtils]: 13: Hoare triple {532#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {532#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} is VALID [2022-04-07 17:33:30,330 WARN L290 TraceCheckUtils]: 12: Hoare triple {539#(forall ((aux_mod_v_main_~z~0_28_31 Int)) (or (> 0 aux_mod_v_main_~z~0_28_31) (>= aux_mod_v_main_~z~0_28_31 4294967296) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_28_31) (and (or (forall ((aux_div_v_main_~z~0_28_31 Int)) (not (= (+ aux_mod_v_main_~z~0_28_31 (* 4294967296 aux_div_v_main_~z~0_28_31)) main_~z~0))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_28_31 Int)) (or (not (< main_~z~0 (+ aux_mod_v_main_~z~0_28_31 (* 4294967296 aux_div_v_main_~z~0_28_31)))) (exists ((v_it_6 Int)) (and (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_28_31 (* 4294967296 aux_div_v_main_~z~0_28_31))) (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296)))))))))))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {532#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} is UNKNOWN [2022-04-07 17:33:32,371 WARN L290 TraceCheckUtils]: 11: Hoare triple {539#(forall ((aux_mod_v_main_~z~0_28_31 Int)) (or (> 0 aux_mod_v_main_~z~0_28_31) (>= aux_mod_v_main_~z~0_28_31 4294967296) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_28_31) (and (or (forall ((aux_div_v_main_~z~0_28_31 Int)) (not (= (+ aux_mod_v_main_~z~0_28_31 (* 4294967296 aux_div_v_main_~z~0_28_31)) main_~z~0))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_28_31 Int)) (or (not (< main_~z~0 (+ aux_mod_v_main_~z~0_28_31 (* 4294967296 aux_div_v_main_~z~0_28_31)))) (exists ((v_it_6 Int)) (and (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_28_31 (* 4294967296 aux_div_v_main_~z~0_28_31))) (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296)))))))))))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {539#(forall ((aux_mod_v_main_~z~0_28_31 Int)) (or (> 0 aux_mod_v_main_~z~0_28_31) (>= aux_mod_v_main_~z~0_28_31 4294967296) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_28_31) (and (or (forall ((aux_div_v_main_~z~0_28_31 Int)) (not (= (+ aux_mod_v_main_~z~0_28_31 (* 4294967296 aux_div_v_main_~z~0_28_31)) main_~z~0))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_28_31 Int)) (or (not (< main_~z~0 (+ aux_mod_v_main_~z~0_28_31 (* 4294967296 aux_div_v_main_~z~0_28_31)))) (exists ((v_it_6 Int)) (and (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_28_31 (* 4294967296 aux_div_v_main_~z~0_28_31))) (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296)))))))))))} is UNKNOWN [2022-04-07 17:33:32,506 INFO L290 TraceCheckUtils]: 10: Hoare triple {539#(forall ((aux_mod_v_main_~z~0_28_31 Int)) (or (> 0 aux_mod_v_main_~z~0_28_31) (>= aux_mod_v_main_~z~0_28_31 4294967296) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_28_31) (and (or (forall ((aux_div_v_main_~z~0_28_31 Int)) (not (= (+ aux_mod_v_main_~z~0_28_31 (* 4294967296 aux_div_v_main_~z~0_28_31)) main_~z~0))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_28_31 Int)) (or (not (< main_~z~0 (+ aux_mod_v_main_~z~0_28_31 (* 4294967296 aux_div_v_main_~z~0_28_31)))) (exists ((v_it_6 Int)) (and (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_28_31 (* 4294967296 aux_div_v_main_~z~0_28_31))) (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296)))))))))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {539#(forall ((aux_mod_v_main_~z~0_28_31 Int)) (or (> 0 aux_mod_v_main_~z~0_28_31) (>= aux_mod_v_main_~z~0_28_31 4294967296) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_28_31) (and (or (forall ((aux_div_v_main_~z~0_28_31 Int)) (not (= (+ aux_mod_v_main_~z~0_28_31 (* 4294967296 aux_div_v_main_~z~0_28_31)) main_~z~0))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_28_31 Int)) (or (not (< main_~z~0 (+ aux_mod_v_main_~z~0_28_31 (* 4294967296 aux_div_v_main_~z~0_28_31)))) (exists ((v_it_6 Int)) (and (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_28_31 (* 4294967296 aux_div_v_main_~z~0_28_31))) (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296)))))))))))} is VALID [2022-04-07 17:33:32,513 INFO L290 TraceCheckUtils]: 9: Hoare triple {532#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {539#(forall ((aux_mod_v_main_~z~0_28_31 Int)) (or (> 0 aux_mod_v_main_~z~0_28_31) (>= aux_mod_v_main_~z~0_28_31 4294967296) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_28_31) (and (or (forall ((aux_div_v_main_~z~0_28_31 Int)) (not (= (+ aux_mod_v_main_~z~0_28_31 (* 4294967296 aux_div_v_main_~z~0_28_31)) main_~z~0))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_28_31 Int)) (or (not (< main_~z~0 (+ aux_mod_v_main_~z~0_28_31 (* 4294967296 aux_div_v_main_~z~0_28_31)))) (exists ((v_it_6 Int)) (and (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_28_31 (* 4294967296 aux_div_v_main_~z~0_28_31))) (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296)))))))))))} is VALID [2022-04-07 17:33:32,514 INFO L290 TraceCheckUtils]: 8: Hoare triple {485#(not (< 0 (mod main_~n~0 4294967296)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {532#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} is VALID [2022-04-07 17:33:32,515 INFO L290 TraceCheckUtils]: 7: Hoare triple {485#(not (< 0 (mod main_~n~0 4294967296)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {485#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:33:32,515 INFO L290 TraceCheckUtils]: 6: Hoare triple {558#(or (< 0 (mod main_~x~0 4294967296)) (not (< 0 (mod main_~n~0 4294967296))))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {485#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:33:32,516 INFO L290 TraceCheckUtils]: 5: Hoare triple {449#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {558#(or (< 0 (mod main_~x~0 4294967296)) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:33:32,516 INFO L272 TraceCheckUtils]: 4: Hoare triple {449#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {449#true} is VALID [2022-04-07 17:33:32,516 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {449#true} {449#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {449#true} is VALID [2022-04-07 17:33:32,516 INFO L290 TraceCheckUtils]: 2: Hoare triple {449#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {449#true} is VALID [2022-04-07 17:33:32,516 INFO L290 TraceCheckUtils]: 1: Hoare triple {449#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {449#true} is VALID [2022-04-07 17:33:32,517 INFO L272 TraceCheckUtils]: 0: Hoare triple {449#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {449#true} is VALID [2022-04-07 17:33:32,517 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:33:32,517 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1252006203] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 17:33:32,517 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 17:33:32,517 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 8, 8] total 20 [2022-04-07 17:33:32,517 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1196034663] [2022-04-07 17:33:32,517 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 17:33:32,518 INFO L78 Accepts]: Start accepts. Automaton has has 20 states, 20 states have (on average 1.7) internal successors, (34), 17 states have internal predecessors, (34), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-07 17:33:32,519 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:33:32,519 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 20 states, 20 states have (on average 1.7) internal successors, (34), 17 states have internal predecessors, (34), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:36,849 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 41 edges. 39 inductive. 0 not inductive. 2 times theorem prover too weak to decide inductivity. [2022-04-07 17:33:36,849 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 20 states [2022-04-07 17:33:36,849 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:33:36,850 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2022-04-07 17:33:36,850 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=82, Invalid=297, Unknown=1, NotChecked=0, Total=380 [2022-04-07 17:33:36,850 INFO L87 Difference]: Start difference. First operand 25 states and 35 transitions. Second operand has 20 states, 20 states have (on average 1.7) internal successors, (34), 17 states have internal predecessors, (34), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:37,231 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:33:37,232 INFO L93 Difference]: Finished difference Result 38 states and 56 transitions. [2022-04-07 17:33:37,232 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-04-07 17:33:37,232 INFO L78 Accepts]: Start accepts. Automaton has has 20 states, 20 states have (on average 1.7) internal successors, (34), 17 states have internal predecessors, (34), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-07 17:33:37,232 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:33:37,232 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 20 states have (on average 1.7) internal successors, (34), 17 states have internal predecessors, (34), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:37,233 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 50 transitions. [2022-04-07 17:33:37,234 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 20 states have (on average 1.7) internal successors, (34), 17 states have internal predecessors, (34), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:37,235 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 50 transitions. [2022-04-07 17:33:37,235 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 10 states and 50 transitions. [2022-04-07 17:33:37,288 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 50 edges. 50 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:33:37,290 INFO L225 Difference]: With dead ends: 38 [2022-04-07 17:33:37,290 INFO L226 Difference]: Without dead ends: 35 [2022-04-07 17:33:37,290 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 53 GetRequests, 25 SyntacticMatches, 4 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 161 ImplicationChecksByTransitivity, 2.8s TimeCoverageRelationStatistics Valid=140, Invalid=509, Unknown=1, NotChecked=0, Total=650 [2022-04-07 17:33:37,291 INFO L913 BasicCegarLoop]: 11 mSDtfsCounter, 40 mSDsluCounter, 56 mSDsCounter, 0 mSdLazyCounter, 93 mSolverCounterSat, 13 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 40 SdHoareTripleChecker+Valid, 67 SdHoareTripleChecker+Invalid, 129 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 13 IncrementalHoareTripleChecker+Valid, 93 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 23 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 17:33:37,291 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [40 Valid, 67 Invalid, 129 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [13 Valid, 93 Invalid, 0 Unknown, 23 Unchecked, 0.1s Time] [2022-04-07 17:33:37,291 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35 states. [2022-04-07 17:33:37,293 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35 to 29. [2022-04-07 17:33:37,294 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:33:37,294 INFO L82 GeneralOperation]: Start isEquivalent. First operand 35 states. Second operand has 29 states, 24 states have (on average 1.5833333333333333) internal successors, (38), 24 states have internal predecessors, (38), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:37,294 INFO L74 IsIncluded]: Start isIncluded. First operand 35 states. Second operand has 29 states, 24 states have (on average 1.5833333333333333) internal successors, (38), 24 states have internal predecessors, (38), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:37,294 INFO L87 Difference]: Start difference. First operand 35 states. Second operand has 29 states, 24 states have (on average 1.5833333333333333) internal successors, (38), 24 states have internal predecessors, (38), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:37,296 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:33:37,296 INFO L93 Difference]: Finished difference Result 35 states and 53 transitions. [2022-04-07 17:33:37,296 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 53 transitions. [2022-04-07 17:33:37,296 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:33:37,296 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:33:37,296 INFO L74 IsIncluded]: Start isIncluded. First operand has 29 states, 24 states have (on average 1.5833333333333333) internal successors, (38), 24 states have internal predecessors, (38), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 35 states. [2022-04-07 17:33:37,297 INFO L87 Difference]: Start difference. First operand has 29 states, 24 states have (on average 1.5833333333333333) internal successors, (38), 24 states have internal predecessors, (38), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 35 states. [2022-04-07 17:33:37,298 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:33:37,298 INFO L93 Difference]: Finished difference Result 35 states and 53 transitions. [2022-04-07 17:33:37,298 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 53 transitions. [2022-04-07 17:33:37,298 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:33:37,298 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:33:37,299 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:33:37,299 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:33:37,299 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 24 states have (on average 1.5833333333333333) internal successors, (38), 24 states have internal predecessors, (38), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:37,300 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 42 transitions. [2022-04-07 17:33:37,300 INFO L78 Accepts]: Start accepts. Automaton has 29 states and 42 transitions. Word has length 18 [2022-04-07 17:33:37,300 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:33:37,300 INFO L478 AbstractCegarLoop]: Abstraction has 29 states and 42 transitions. [2022-04-07 17:33:37,301 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 20 states, 20 states have (on average 1.7) internal successors, (34), 17 states have internal predecessors, (34), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:37,301 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 42 transitions. [2022-04-07 17:33:37,301 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-04-07 17:33:37,301 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:33:37,301 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:33:37,334 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2022-04-07 17:33:37,511 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable3 [2022-04-07 17:33:37,512 INFO L403 AbstractCegarLoop]: === Iteration 5 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:33:37,512 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:33:37,512 INFO L85 PathProgramCache]: Analyzing trace with hash 2030445491, now seen corresponding path program 1 times [2022-04-07 17:33:37,512 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:33:37,512 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1171812645] [2022-04-07 17:33:37,512 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:33:37,512 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:33:37,525 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.0))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-07 17:33:37,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:33:37,554 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.1))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-07 17:33:37,721 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:33:37,723 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:33:37,727 INFO L290 TraceCheckUtils]: 0: Hoare triple {740#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {728#true} is VALID [2022-04-07 17:33:37,727 INFO L290 TraceCheckUtils]: 1: Hoare triple {728#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {728#true} is VALID [2022-04-07 17:33:37,727 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {728#true} {728#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {728#true} is VALID [2022-04-07 17:33:37,729 INFO L272 TraceCheckUtils]: 0: Hoare triple {728#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {740#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:33:37,729 INFO L290 TraceCheckUtils]: 1: Hoare triple {740#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {728#true} is VALID [2022-04-07 17:33:37,729 INFO L290 TraceCheckUtils]: 2: Hoare triple {728#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {728#true} is VALID [2022-04-07 17:33:37,729 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {728#true} {728#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {728#true} is VALID [2022-04-07 17:33:37,729 INFO L272 TraceCheckUtils]: 4: Hoare triple {728#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {728#true} is VALID [2022-04-07 17:33:37,730 INFO L290 TraceCheckUtils]: 5: Hoare triple {728#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {733#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 17:33:37,731 INFO L290 TraceCheckUtils]: 6: Hoare triple {733#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {734#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:33:37,731 INFO L290 TraceCheckUtils]: 7: Hoare triple {734#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {735#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 17:33:37,732 INFO L290 TraceCheckUtils]: 8: Hoare triple {735#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {735#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 17:33:37,732 INFO L290 TraceCheckUtils]: 9: Hoare triple {735#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {735#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 17:33:37,733 INFO L290 TraceCheckUtils]: 10: Hoare triple {735#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {735#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 17:33:37,734 INFO L290 TraceCheckUtils]: 11: Hoare triple {735#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [118] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_13 4294967296))) (or (and (= v_main_~z~0_12 (+ v_main_~x~0_11 v_main_~z~0_13 (* (- 1) v_main_~x~0_10))) (< v_main_~x~0_11 v_main_~x~0_10) (forall ((v_it_5 Int)) (or (< 0 (mod (+ v_main_~z~0_13 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)) (not (<= (+ v_main_~x~0_11 v_it_5 1) v_main_~x~0_10)))) (< 0 .cse0)) (and (= v_main_~x~0_11 v_main_~x~0_10) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (<= .cse0 0) (= v_main_~z~0_13 v_main_~z~0_12) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_13, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_12, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {736#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} is VALID [2022-04-07 17:33:37,735 INFO L290 TraceCheckUtils]: 12: Hoare triple {736#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {737#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:33:37,735 INFO L290 TraceCheckUtils]: 13: Hoare triple {737#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {737#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:33:37,737 INFO L272 TraceCheckUtils]: 14: Hoare triple {737#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {738#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:33:37,737 INFO L290 TraceCheckUtils]: 15: Hoare triple {738#(not (= |__VERIFIER_assert_#in~cond| 0))} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {739#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:33:37,737 INFO L290 TraceCheckUtils]: 16: Hoare triple {739#(not (= __VERIFIER_assert_~cond 0))} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {729#false} is VALID [2022-04-07 17:33:37,738 INFO L290 TraceCheckUtils]: 17: Hoare triple {729#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {729#false} is VALID [2022-04-07 17:33:37,738 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:33:37,738 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:33:37,738 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1171812645] [2022-04-07 17:33:37,738 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1171812645] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:33:37,738 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [812388220] [2022-04-07 17:33:37,738 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:33:37,738 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:33:37,739 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:33:37,744 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:33:37,748 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-04-07 17:33:37,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:33:37,786 INFO L263 TraceCheckSpWp]: Trace formula consists of 63 conjuncts, 7 conjunts are in the unsatisfiable core [2022-04-07 17:33:37,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:33:37,793 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:33:38,410 INFO L272 TraceCheckUtils]: 0: Hoare triple {728#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {728#true} is VALID [2022-04-07 17:33:38,410 INFO L290 TraceCheckUtils]: 1: Hoare triple {728#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {728#true} is VALID [2022-04-07 17:33:38,410 INFO L290 TraceCheckUtils]: 2: Hoare triple {728#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {728#true} is VALID [2022-04-07 17:33:38,411 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {728#true} {728#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {728#true} is VALID [2022-04-07 17:33:38,411 INFO L272 TraceCheckUtils]: 4: Hoare triple {728#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {728#true} is VALID [2022-04-07 17:33:38,411 INFO L290 TraceCheckUtils]: 5: Hoare triple {728#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {759#(= main_~n~0 main_~x~0)} is VALID [2022-04-07 17:33:38,412 INFO L290 TraceCheckUtils]: 6: Hoare triple {759#(= main_~n~0 main_~x~0)} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {763#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:33:38,412 INFO L290 TraceCheckUtils]: 7: Hoare triple {763#(not (< 0 (mod main_~n~0 4294967296)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {763#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:33:38,412 INFO L290 TraceCheckUtils]: 8: Hoare triple {763#(not (< 0 (mod main_~n~0 4294967296)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {763#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:33:38,413 INFO L290 TraceCheckUtils]: 9: Hoare triple {763#(not (< 0 (mod main_~n~0 4294967296)))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {763#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:33:38,413 INFO L290 TraceCheckUtils]: 10: Hoare triple {763#(not (< 0 (mod main_~n~0 4294967296)))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {763#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:33:38,413 INFO L290 TraceCheckUtils]: 11: Hoare triple {763#(not (< 0 (mod main_~n~0 4294967296)))} [118] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_13 4294967296))) (or (and (= v_main_~z~0_12 (+ v_main_~x~0_11 v_main_~z~0_13 (* (- 1) v_main_~x~0_10))) (< v_main_~x~0_11 v_main_~x~0_10) (forall ((v_it_5 Int)) (or (< 0 (mod (+ v_main_~z~0_13 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)) (not (<= (+ v_main_~x~0_11 v_it_5 1) v_main_~x~0_10)))) (< 0 .cse0)) (and (= v_main_~x~0_11 v_main_~x~0_10) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (<= .cse0 0) (= v_main_~z~0_13 v_main_~z~0_12) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_13, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_12, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {763#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:33:38,414 INFO L290 TraceCheckUtils]: 12: Hoare triple {763#(not (< 0 (mod main_~n~0 4294967296)))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {782#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:33:38,414 INFO L290 TraceCheckUtils]: 13: Hoare triple {782#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {782#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:33:38,415 INFO L272 TraceCheckUtils]: 14: Hoare triple {782#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {789#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:33:38,416 INFO L290 TraceCheckUtils]: 15: Hoare triple {789#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {793#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:33:38,416 INFO L290 TraceCheckUtils]: 16: Hoare triple {793#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {729#false} is VALID [2022-04-07 17:33:38,416 INFO L290 TraceCheckUtils]: 17: Hoare triple {729#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {729#false} is VALID [2022-04-07 17:33:38,417 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 17:33:38,417 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-07 17:33:38,417 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [812388220] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 17:33:38,417 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-07 17:33:38,417 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [10] total 15 [2022-04-07 17:33:38,417 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1065040455] [2022-04-07 17:33:38,417 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 17:33:38,418 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-07 17:33:38,418 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:33:38,418 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:38,433 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 18 edges. 18 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:33:38,433 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-04-07 17:33:38,433 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:33:38,434 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-04-07 17:33:38,434 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=166, Unknown=0, NotChecked=0, Total=210 [2022-04-07 17:33:38,434 INFO L87 Difference]: Start difference. First operand 29 states and 42 transitions. Second operand has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:38,576 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:33:38,576 INFO L93 Difference]: Finished difference Result 34 states and 48 transitions. [2022-04-07 17:33:38,576 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-04-07 17:33:38,576 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-07 17:33:38,577 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:33:38,577 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:38,578 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 42 transitions. [2022-04-07 17:33:38,578 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:38,579 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 42 transitions. [2022-04-07 17:33:38,580 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 9 states and 42 transitions. [2022-04-07 17:33:38,618 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 42 edges. 42 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:33:38,619 INFO L225 Difference]: With dead ends: 34 [2022-04-07 17:33:38,619 INFO L226 Difference]: Without dead ends: 31 [2022-04-07 17:33:38,619 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 57 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=66, Invalid=240, Unknown=0, NotChecked=0, Total=306 [2022-04-07 17:33:38,623 INFO L913 BasicCegarLoop]: 13 mSDtfsCounter, 12 mSDsluCounter, 60 mSDsCounter, 0 mSdLazyCounter, 29 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 12 SdHoareTripleChecker+Valid, 73 SdHoareTripleChecker+Invalid, 36 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 29 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 6 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 17:33:38,623 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [12 Valid, 73 Invalid, 36 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 29 Invalid, 0 Unknown, 6 Unchecked, 0.0s Time] [2022-04-07 17:33:38,624 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31 states. [2022-04-07 17:33:38,628 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31 to 30. [2022-04-07 17:33:38,628 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:33:38,628 INFO L82 GeneralOperation]: Start isEquivalent. First operand 31 states. Second operand has 30 states, 25 states have (on average 1.6) internal successors, (40), 25 states have internal predecessors, (40), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:38,628 INFO L74 IsIncluded]: Start isIncluded. First operand 31 states. Second operand has 30 states, 25 states have (on average 1.6) internal successors, (40), 25 states have internal predecessors, (40), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:38,628 INFO L87 Difference]: Start difference. First operand 31 states. Second operand has 30 states, 25 states have (on average 1.6) internal successors, (40), 25 states have internal predecessors, (40), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:38,630 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:33:38,630 INFO L93 Difference]: Finished difference Result 31 states and 45 transitions. [2022-04-07 17:33:38,630 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 45 transitions. [2022-04-07 17:33:38,630 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:33:38,630 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:33:38,631 INFO L74 IsIncluded]: Start isIncluded. First operand has 30 states, 25 states have (on average 1.6) internal successors, (40), 25 states have internal predecessors, (40), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 31 states. [2022-04-07 17:33:38,631 INFO L87 Difference]: Start difference. First operand has 30 states, 25 states have (on average 1.6) internal successors, (40), 25 states have internal predecessors, (40), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 31 states. [2022-04-07 17:33:38,632 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:33:38,632 INFO L93 Difference]: Finished difference Result 31 states and 45 transitions. [2022-04-07 17:33:38,633 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 45 transitions. [2022-04-07 17:33:38,633 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:33:38,633 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:33:38,633 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:33:38,633 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:33:38,633 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 30 states, 25 states have (on average 1.6) internal successors, (40), 25 states have internal predecessors, (40), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:38,634 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 44 transitions. [2022-04-07 17:33:38,635 INFO L78 Accepts]: Start accepts. Automaton has 30 states and 44 transitions. Word has length 18 [2022-04-07 17:33:38,635 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:33:38,635 INFO L478 AbstractCegarLoop]: Abstraction has 30 states and 44 transitions. [2022-04-07 17:33:38,635 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:38,635 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 44 transitions. [2022-04-07 17:33:38,636 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-04-07 17:33:38,636 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:33:38,636 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:33:38,656 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-04-07 17:33:38,847 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:33:38,848 INFO L403 AbstractCegarLoop]: === Iteration 6 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:33:38,848 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:33:38,848 INFO L85 PathProgramCache]: Analyzing trace with hash 223241102, now seen corresponding path program 1 times [2022-04-07 17:33:38,848 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:33:38,848 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [359344130] [2022-04-07 17:33:38,848 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:33:38,848 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:33:38,858 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.0))) (+ .cse0 main_~x~0_5 (* (- 4294967296) (div (+ .cse0 main_~x~0_5) 4294967296)))) 0)) [2022-04-07 17:33:38,862 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:33:38,875 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.1))) (+ .cse0 main_~x~0_5 (* (- 4294967296) (div (+ .cse0 main_~x~0_5) 4294967296)))) 0)) [2022-04-07 17:33:39,037 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:33:39,039 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:33:39,043 INFO L290 TraceCheckUtils]: 0: Hoare triple {942#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {931#true} is VALID [2022-04-07 17:33:39,043 INFO L290 TraceCheckUtils]: 1: Hoare triple {931#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {931#true} is VALID [2022-04-07 17:33:39,043 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {931#true} {931#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {931#true} is VALID [2022-04-07 17:33:39,044 INFO L272 TraceCheckUtils]: 0: Hoare triple {931#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {942#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:33:39,044 INFO L290 TraceCheckUtils]: 1: Hoare triple {942#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {931#true} is VALID [2022-04-07 17:33:39,044 INFO L290 TraceCheckUtils]: 2: Hoare triple {931#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {931#true} is VALID [2022-04-07 17:33:39,045 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {931#true} {931#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {931#true} is VALID [2022-04-07 17:33:39,045 INFO L272 TraceCheckUtils]: 4: Hoare triple {931#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {931#true} is VALID [2022-04-07 17:33:39,045 INFO L290 TraceCheckUtils]: 5: Hoare triple {931#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {936#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 17:33:39,046 INFO L290 TraceCheckUtils]: 6: Hoare triple {936#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {937#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:33:39,047 INFO L290 TraceCheckUtils]: 7: Hoare triple {937#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {938#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:33:39,048 INFO L290 TraceCheckUtils]: 8: Hoare triple {938#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {938#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:33:39,048 INFO L290 TraceCheckUtils]: 9: Hoare triple {938#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {938#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:33:39,049 INFO L290 TraceCheckUtils]: 10: Hoare triple {938#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [115] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (= v_main_~y~0_10 (+ (* (- 1) v_main_~x~0_6) v_main_~y~0_11 v_main_~x~0_7)) (< v_main_~x~0_6 v_main_~x~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_11 v_main_~y~0_10) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_11, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_10, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {939#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:33:39,050 INFO L290 TraceCheckUtils]: 11: Hoare triple {939#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {939#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:33:39,050 INFO L290 TraceCheckUtils]: 12: Hoare triple {939#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {939#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:33:39,051 INFO L290 TraceCheckUtils]: 13: Hoare triple {939#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {939#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:33:39,052 INFO L272 TraceCheckUtils]: 14: Hoare triple {939#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {940#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:33:39,053 INFO L290 TraceCheckUtils]: 15: Hoare triple {940#(not (= |__VERIFIER_assert_#in~cond| 0))} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {941#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:33:39,053 INFO L290 TraceCheckUtils]: 16: Hoare triple {941#(not (= __VERIFIER_assert_~cond 0))} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {932#false} is VALID [2022-04-07 17:33:39,053 INFO L290 TraceCheckUtils]: 17: Hoare triple {932#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {932#false} is VALID [2022-04-07 17:33:39,053 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:33:39,054 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:33:39,054 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [359344130] [2022-04-07 17:33:39,054 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [359344130] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:33:39,054 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1935814141] [2022-04-07 17:33:39,054 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:33:39,054 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:33:39,054 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:33:39,055 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:33:39,084 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-04-07 17:33:39,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:33:39,102 INFO L263 TraceCheckSpWp]: Trace formula consists of 63 conjuncts, 9 conjunts are in the unsatisfiable core [2022-04-07 17:33:39,119 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:33:39,130 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:33:39,840 INFO L272 TraceCheckUtils]: 0: Hoare triple {931#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {931#true} is VALID [2022-04-07 17:33:39,841 INFO L290 TraceCheckUtils]: 1: Hoare triple {931#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {931#true} is VALID [2022-04-07 17:33:39,841 INFO L290 TraceCheckUtils]: 2: Hoare triple {931#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {931#true} is VALID [2022-04-07 17:33:39,841 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {931#true} {931#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {931#true} is VALID [2022-04-07 17:33:39,841 INFO L272 TraceCheckUtils]: 4: Hoare triple {931#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {931#true} is VALID [2022-04-07 17:33:39,846 INFO L290 TraceCheckUtils]: 5: Hoare triple {931#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {961#(= main_~n~0 main_~x~0)} is VALID [2022-04-07 17:33:39,846 INFO L290 TraceCheckUtils]: 6: Hoare triple {961#(= main_~n~0 main_~x~0)} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {965#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-07 17:33:39,847 INFO L290 TraceCheckUtils]: 7: Hoare triple {965#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {965#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-07 17:33:39,847 INFO L290 TraceCheckUtils]: 8: Hoare triple {965#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {972#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-07 17:33:39,848 INFO L290 TraceCheckUtils]: 9: Hoare triple {972#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {972#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-07 17:33:39,849 INFO L290 TraceCheckUtils]: 10: Hoare triple {972#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} [115] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (= v_main_~y~0_10 (+ (* (- 1) v_main_~x~0_6) v_main_~y~0_11 v_main_~x~0_7)) (< v_main_~x~0_6 v_main_~x~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_11 v_main_~y~0_10) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_11, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_10, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {972#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-07 17:33:39,849 INFO L290 TraceCheckUtils]: 11: Hoare triple {972#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {982#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:33:39,850 INFO L290 TraceCheckUtils]: 12: Hoare triple {982#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {982#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:33:39,850 INFO L290 TraceCheckUtils]: 13: Hoare triple {982#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {982#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:33:39,851 INFO L272 TraceCheckUtils]: 14: Hoare triple {982#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {992#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:33:39,852 INFO L290 TraceCheckUtils]: 15: Hoare triple {992#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {996#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:33:39,852 INFO L290 TraceCheckUtils]: 16: Hoare triple {996#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {932#false} is VALID [2022-04-07 17:33:39,853 INFO L290 TraceCheckUtils]: 17: Hoare triple {932#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {932#false} is VALID [2022-04-07 17:33:39,853 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 17:33:39,853 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-07 17:33:39,853 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1935814141] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 17:33:39,853 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-07 17:33:39,853 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [9] total 15 [2022-04-07 17:33:39,853 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [54850414] [2022-04-07 17:33:39,853 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 17:33:39,854 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 1.75) internal successors, (14), 7 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-07 17:33:39,854 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:33:39,854 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 8 states, 8 states have (on average 1.75) internal successors, (14), 7 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:39,873 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 18 edges. 18 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:33:39,874 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-04-07 17:33:39,874 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:33:39,874 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-04-07 17:33:39,874 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=167, Unknown=0, NotChecked=0, Total=210 [2022-04-07 17:33:39,875 INFO L87 Difference]: Start difference. First operand 30 states and 44 transitions. Second operand has 8 states, 8 states have (on average 1.75) internal successors, (14), 7 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:39,975 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:33:39,976 INFO L93 Difference]: Finished difference Result 36 states and 52 transitions. [2022-04-07 17:33:39,976 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-04-07 17:33:39,976 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 1.75) internal successors, (14), 7 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-07 17:33:39,976 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:33:39,976 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 1.75) internal successors, (14), 7 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:39,978 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 39 transitions. [2022-04-07 17:33:39,978 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 1.75) internal successors, (14), 7 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:39,979 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 39 transitions. [2022-04-07 17:33:39,979 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 7 states and 39 transitions. [2022-04-07 17:33:40,019 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 39 edges. 39 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:33:40,020 INFO L225 Difference]: With dead ends: 36 [2022-04-07 17:33:40,020 INFO L226 Difference]: Without dead ends: 33 [2022-04-07 17:33:40,020 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 14 SyntacticMatches, 1 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 43 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=49, Invalid=191, Unknown=0, NotChecked=0, Total=240 [2022-04-07 17:33:40,021 INFO L913 BasicCegarLoop]: 13 mSDtfsCounter, 14 mSDsluCounter, 45 mSDsCounter, 0 mSdLazyCounter, 27 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 14 SdHoareTripleChecker+Valid, 58 SdHoareTripleChecker+Invalid, 34 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 27 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 6 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 17:33:40,021 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [14 Valid, 58 Invalid, 34 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 27 Invalid, 0 Unknown, 6 Unchecked, 0.0s Time] [2022-04-07 17:33:40,022 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33 states. [2022-04-07 17:33:40,024 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33 to 31. [2022-04-07 17:33:40,024 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:33:40,024 INFO L82 GeneralOperation]: Start isEquivalent. First operand 33 states. Second operand has 31 states, 26 states have (on average 1.6153846153846154) internal successors, (42), 26 states have internal predecessors, (42), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:40,024 INFO L74 IsIncluded]: Start isIncluded. First operand 33 states. Second operand has 31 states, 26 states have (on average 1.6153846153846154) internal successors, (42), 26 states have internal predecessors, (42), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:40,025 INFO L87 Difference]: Start difference. First operand 33 states. Second operand has 31 states, 26 states have (on average 1.6153846153846154) internal successors, (42), 26 states have internal predecessors, (42), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:40,026 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:33:40,026 INFO L93 Difference]: Finished difference Result 33 states and 49 transitions. [2022-04-07 17:33:40,026 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 49 transitions. [2022-04-07 17:33:40,027 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:33:40,027 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:33:40,027 INFO L74 IsIncluded]: Start isIncluded. First operand has 31 states, 26 states have (on average 1.6153846153846154) internal successors, (42), 26 states have internal predecessors, (42), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 33 states. [2022-04-07 17:33:40,027 INFO L87 Difference]: Start difference. First operand has 31 states, 26 states have (on average 1.6153846153846154) internal successors, (42), 26 states have internal predecessors, (42), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 33 states. [2022-04-07 17:33:40,029 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:33:40,029 INFO L93 Difference]: Finished difference Result 33 states and 49 transitions. [2022-04-07 17:33:40,029 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 49 transitions. [2022-04-07 17:33:40,029 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:33:40,029 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:33:40,029 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:33:40,029 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:33:40,030 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 31 states, 26 states have (on average 1.6153846153846154) internal successors, (42), 26 states have internal predecessors, (42), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:40,031 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 46 transitions. [2022-04-07 17:33:40,031 INFO L78 Accepts]: Start accepts. Automaton has 31 states and 46 transitions. Word has length 18 [2022-04-07 17:33:40,031 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:33:40,031 INFO L478 AbstractCegarLoop]: Abstraction has 31 states and 46 transitions. [2022-04-07 17:33:40,031 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 1.75) internal successors, (14), 7 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:40,031 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 46 transitions. [2022-04-07 17:33:40,032 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-04-07 17:33:40,032 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:33:40,032 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:33:40,059 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2022-04-07 17:33:40,256 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5,5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:33:40,257 INFO L403 AbstractCegarLoop]: === Iteration 7 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:33:40,257 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:33:40,257 INFO L85 PathProgramCache]: Analyzing trace with hash -1522150354, now seen corresponding path program 1 times [2022-04-07 17:33:40,258 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:33:40,258 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [719408886] [2022-04-07 17:33:40,258 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:33:40,258 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:33:40,270 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.0))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-07 17:33:40,282 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:33:40,303 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.1))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-07 17:33:40,433 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:33:40,438 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:33:40,443 INFO L290 TraceCheckUtils]: 0: Hoare triple {1149#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1137#true} is VALID [2022-04-07 17:33:40,443 INFO L290 TraceCheckUtils]: 1: Hoare triple {1137#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1137#true} is VALID [2022-04-07 17:33:40,443 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1137#true} {1137#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1137#true} is VALID [2022-04-07 17:33:40,444 INFO L272 TraceCheckUtils]: 0: Hoare triple {1137#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1149#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:33:40,444 INFO L290 TraceCheckUtils]: 1: Hoare triple {1149#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1137#true} is VALID [2022-04-07 17:33:40,445 INFO L290 TraceCheckUtils]: 2: Hoare triple {1137#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1137#true} is VALID [2022-04-07 17:33:40,445 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1137#true} {1137#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1137#true} is VALID [2022-04-07 17:33:40,445 INFO L272 TraceCheckUtils]: 4: Hoare triple {1137#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1137#true} is VALID [2022-04-07 17:33:40,445 INFO L290 TraceCheckUtils]: 5: Hoare triple {1137#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1142#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 17:33:40,446 INFO L290 TraceCheckUtils]: 6: Hoare triple {1142#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1143#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:33:40,447 INFO L290 TraceCheckUtils]: 7: Hoare triple {1143#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {1144#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} is VALID [2022-04-07 17:33:40,449 INFO L290 TraceCheckUtils]: 8: Hoare triple {1144#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} [109] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_11 4294967296))) (or (and (< v_main_~z~0_10 v_main_~z~0_11) (= v_main_~x~0_8 (+ v_main_~z~0_11 v_main_~x~0_9 (* (- 1) v_main_~z~0_10))) (< 0 .cse0) (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (not (<= (+ v_main_~z~0_10 v_it_2 1) v_main_~z~0_11)) (< 0 (mod (+ v_main_~z~0_11 (* v_it_2 4294967295)) 4294967296))))) (and (= v_main_~x~0_9 v_main_~x~0_8) (= v_main_~z~0_11 v_main_~z~0_10) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (<= .cse0 0) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_11, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_10, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1145#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} is VALID [2022-04-07 17:33:40,451 INFO L290 TraceCheckUtils]: 9: Hoare triple {1145#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {1146#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:33:40,451 INFO L290 TraceCheckUtils]: 10: Hoare triple {1146#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1146#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:33:40,452 INFO L290 TraceCheckUtils]: 11: Hoare triple {1146#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1146#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:33:40,453 INFO L290 TraceCheckUtils]: 12: Hoare triple {1146#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {1146#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:33:40,453 INFO L290 TraceCheckUtils]: 13: Hoare triple {1146#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {1146#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:33:40,454 INFO L272 TraceCheckUtils]: 14: Hoare triple {1146#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {1147#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:33:40,455 INFO L290 TraceCheckUtils]: 15: Hoare triple {1147#(not (= |__VERIFIER_assert_#in~cond| 0))} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1148#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:33:40,455 INFO L290 TraceCheckUtils]: 16: Hoare triple {1148#(not (= __VERIFIER_assert_~cond 0))} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1138#false} is VALID [2022-04-07 17:33:40,456 INFO L290 TraceCheckUtils]: 17: Hoare triple {1138#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1138#false} is VALID [2022-04-07 17:33:40,456 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:33:40,456 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:33:40,456 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [719408886] [2022-04-07 17:33:40,456 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [719408886] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:33:40,456 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2062828721] [2022-04-07 17:33:40,456 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:33:40,457 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:33:40,457 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:33:40,460 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:33:40,481 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-04-07 17:33:40,507 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:33:40,508 INFO L263 TraceCheckSpWp]: Trace formula consists of 63 conjuncts, 7 conjunts are in the unsatisfiable core [2022-04-07 17:33:40,515 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:33:40,516 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:33:41,072 INFO L272 TraceCheckUtils]: 0: Hoare triple {1137#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1137#true} is VALID [2022-04-07 17:33:41,072 INFO L290 TraceCheckUtils]: 1: Hoare triple {1137#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1137#true} is VALID [2022-04-07 17:33:41,073 INFO L290 TraceCheckUtils]: 2: Hoare triple {1137#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1137#true} is VALID [2022-04-07 17:33:41,073 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1137#true} {1137#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1137#true} is VALID [2022-04-07 17:33:41,073 INFO L272 TraceCheckUtils]: 4: Hoare triple {1137#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1137#true} is VALID [2022-04-07 17:33:41,073 INFO L290 TraceCheckUtils]: 5: Hoare triple {1137#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1168#(= main_~n~0 main_~x~0)} is VALID [2022-04-07 17:33:41,073 INFO L290 TraceCheckUtils]: 6: Hoare triple {1168#(= main_~n~0 main_~x~0)} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1172#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:33:41,074 INFO L290 TraceCheckUtils]: 7: Hoare triple {1172#(not (< 0 (mod main_~n~0 4294967296)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {1172#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:33:41,074 INFO L290 TraceCheckUtils]: 8: Hoare triple {1172#(not (< 0 (mod main_~n~0 4294967296)))} [109] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_11 4294967296))) (or (and (< v_main_~z~0_10 v_main_~z~0_11) (= v_main_~x~0_8 (+ v_main_~z~0_11 v_main_~x~0_9 (* (- 1) v_main_~z~0_10))) (< 0 .cse0) (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (not (<= (+ v_main_~z~0_10 v_it_2 1) v_main_~z~0_11)) (< 0 (mod (+ v_main_~z~0_11 (* v_it_2 4294967295)) 4294967296))))) (and (= v_main_~x~0_9 v_main_~x~0_8) (= v_main_~z~0_11 v_main_~z~0_10) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (<= .cse0 0) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_11, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_10, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1172#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:33:41,074 INFO L290 TraceCheckUtils]: 9: Hoare triple {1172#(not (< 0 (mod main_~n~0 4294967296)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {1182#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:33:41,075 INFO L290 TraceCheckUtils]: 10: Hoare triple {1182#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1182#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:33:41,076 INFO L290 TraceCheckUtils]: 11: Hoare triple {1182#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1182#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:33:41,077 INFO L290 TraceCheckUtils]: 12: Hoare triple {1182#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {1182#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:33:41,078 INFO L290 TraceCheckUtils]: 13: Hoare triple {1182#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {1182#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:33:41,080 INFO L272 TraceCheckUtils]: 14: Hoare triple {1182#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {1198#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:33:41,081 INFO L290 TraceCheckUtils]: 15: Hoare triple {1198#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1202#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:33:41,082 INFO L290 TraceCheckUtils]: 16: Hoare triple {1202#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1138#false} is VALID [2022-04-07 17:33:41,082 INFO L290 TraceCheckUtils]: 17: Hoare triple {1138#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1138#false} is VALID [2022-04-07 17:33:41,082 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 17:33:41,082 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-07 17:33:41,082 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2062828721] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 17:33:41,082 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-07 17:33:41,082 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [10] total 15 [2022-04-07 17:33:41,082 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1539439656] [2022-04-07 17:33:41,082 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 17:33:41,083 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-07 17:33:41,083 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:33:41,083 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:41,096 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 18 edges. 18 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:33:41,096 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-04-07 17:33:41,097 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:33:41,097 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-04-07 17:33:41,097 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=166, Unknown=0, NotChecked=0, Total=210 [2022-04-07 17:33:41,097 INFO L87 Difference]: Start difference. First operand 31 states and 46 transitions. Second operand has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:41,223 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:33:41,223 INFO L93 Difference]: Finished difference Result 39 states and 58 transitions. [2022-04-07 17:33:41,223 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-04-07 17:33:41,223 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-07 17:33:41,223 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:33:41,224 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:41,225 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 48 transitions. [2022-04-07 17:33:41,225 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:41,226 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 48 transitions. [2022-04-07 17:33:41,226 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 9 states and 48 transitions. [2022-04-07 17:33:41,270 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 48 edges. 48 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:33:41,271 INFO L225 Difference]: With dead ends: 39 [2022-04-07 17:33:41,271 INFO L226 Difference]: Without dead ends: 36 [2022-04-07 17:33:41,272 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 57 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=66, Invalid=240, Unknown=0, NotChecked=0, Total=306 [2022-04-07 17:33:41,272 INFO L913 BasicCegarLoop]: 13 mSDtfsCounter, 16 mSDsluCounter, 60 mSDsCounter, 0 mSdLazyCounter, 31 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 16 SdHoareTripleChecker+Valid, 73 SdHoareTripleChecker+Invalid, 37 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 31 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 6 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 17:33:41,273 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [16 Valid, 73 Invalid, 37 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 31 Invalid, 0 Unknown, 6 Unchecked, 0.0s Time] [2022-04-07 17:33:41,273 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36 states. [2022-04-07 17:33:41,275 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36 to 33. [2022-04-07 17:33:41,275 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:33:41,276 INFO L82 GeneralOperation]: Start isEquivalent. First operand 36 states. Second operand has 33 states, 28 states have (on average 1.6428571428571428) internal successors, (46), 28 states have internal predecessors, (46), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:41,276 INFO L74 IsIncluded]: Start isIncluded. First operand 36 states. Second operand has 33 states, 28 states have (on average 1.6428571428571428) internal successors, (46), 28 states have internal predecessors, (46), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:41,276 INFO L87 Difference]: Start difference. First operand 36 states. Second operand has 33 states, 28 states have (on average 1.6428571428571428) internal successors, (46), 28 states have internal predecessors, (46), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:41,277 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:33:41,278 INFO L93 Difference]: Finished difference Result 36 states and 55 transitions. [2022-04-07 17:33:41,278 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 55 transitions. [2022-04-07 17:33:41,278 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:33:41,278 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:33:41,278 INFO L74 IsIncluded]: Start isIncluded. First operand has 33 states, 28 states have (on average 1.6428571428571428) internal successors, (46), 28 states have internal predecessors, (46), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 36 states. [2022-04-07 17:33:41,278 INFO L87 Difference]: Start difference. First operand has 33 states, 28 states have (on average 1.6428571428571428) internal successors, (46), 28 states have internal predecessors, (46), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 36 states. [2022-04-07 17:33:41,280 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:33:41,280 INFO L93 Difference]: Finished difference Result 36 states and 55 transitions. [2022-04-07 17:33:41,280 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 55 transitions. [2022-04-07 17:33:41,281 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:33:41,281 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:33:41,281 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:33:41,281 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:33:41,281 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 33 states, 28 states have (on average 1.6428571428571428) internal successors, (46), 28 states have internal predecessors, (46), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:41,282 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 50 transitions. [2022-04-07 17:33:41,282 INFO L78 Accepts]: Start accepts. Automaton has 33 states and 50 transitions. Word has length 18 [2022-04-07 17:33:41,283 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:33:41,283 INFO L478 AbstractCegarLoop]: Abstraction has 33 states and 50 transitions. [2022-04-07 17:33:41,283 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 2.0) internal successors, (14), 6 states have internal predecessors, (14), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:41,283 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 50 transitions. [2022-04-07 17:33:41,283 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-04-07 17:33:41,284 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:33:41,284 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:33:41,305 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2022-04-07 17:33:41,499 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6,6 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:33:41,500 INFO L403 AbstractCegarLoop]: === Iteration 8 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:33:41,500 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:33:41,500 INFO L85 PathProgramCache]: Analyzing trace with hash -1504591698, now seen corresponding path program 1 times [2022-04-07 17:33:41,500 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:33:41,500 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1756151169] [2022-04-07 17:33:41,500 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:33:41,500 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:33:41,509 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_1.0))) (+ main_~x~0_5 .cse0 (* (- 4294967296) (div (+ main_~x~0_5 .cse0) 4294967296)))) 0)) [2022-04-07 17:33:41,516 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:33:41,523 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_1.1))) (+ main_~x~0_5 .cse0 (* (- 4294967296) (div (+ main_~x~0_5 .cse0) 4294967296)))) 0)) [2022-04-07 17:33:41,732 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:33:41,745 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:33:41,751 INFO L290 TraceCheckUtils]: 0: Hoare triple {1371#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1358#true} is VALID [2022-04-07 17:33:41,751 INFO L290 TraceCheckUtils]: 1: Hoare triple {1358#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1358#true} is VALID [2022-04-07 17:33:41,756 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1358#true} {1358#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1358#true} is VALID [2022-04-07 17:33:41,757 INFO L272 TraceCheckUtils]: 0: Hoare triple {1358#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1371#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:33:41,757 INFO L290 TraceCheckUtils]: 1: Hoare triple {1371#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1358#true} is VALID [2022-04-07 17:33:41,758 INFO L290 TraceCheckUtils]: 2: Hoare triple {1358#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1358#true} is VALID [2022-04-07 17:33:41,758 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1358#true} {1358#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1358#true} is VALID [2022-04-07 17:33:41,758 INFO L272 TraceCheckUtils]: 4: Hoare triple {1358#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1358#true} is VALID [2022-04-07 17:33:41,758 INFO L290 TraceCheckUtils]: 5: Hoare triple {1358#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1363#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 17:33:41,769 INFO L290 TraceCheckUtils]: 6: Hoare triple {1363#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [105] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~y~0_9 v_main_~y~0_8) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0)) (and (= v_main_~x~0_3 (+ (* (- 1) v_main_~y~0_8) v_main_~x~0_4 v_main_~y~0_9)) (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_9 v_it_1 1) v_main_~y~0_8)))) (< 0 .cse0) (< v_main_~y~0_9 v_main_~y~0_8)))) InVars {main_~y~0=v_main_~y~0_9, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_8, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1364#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-07 17:33:41,770 INFO L290 TraceCheckUtils]: 7: Hoare triple {1364#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1365#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-07 17:33:41,771 INFO L290 TraceCheckUtils]: 8: Hoare triple {1365#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {1366#(or (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-07 17:33:41,772 INFO L290 TraceCheckUtils]: 9: Hoare triple {1366#(or (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {1367#(or (and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-07 17:33:41,773 INFO L290 TraceCheckUtils]: 10: Hoare triple {1367#(or (and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1368#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:33:41,774 INFO L290 TraceCheckUtils]: 11: Hoare triple {1368#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1368#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:33:41,774 INFO L290 TraceCheckUtils]: 12: Hoare triple {1368#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {1368#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:33:41,775 INFO L290 TraceCheckUtils]: 13: Hoare triple {1368#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {1368#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:33:41,776 INFO L272 TraceCheckUtils]: 14: Hoare triple {1368#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {1369#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:33:41,776 INFO L290 TraceCheckUtils]: 15: Hoare triple {1369#(not (= |__VERIFIER_assert_#in~cond| 0))} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1370#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:33:41,777 INFO L290 TraceCheckUtils]: 16: Hoare triple {1370#(not (= __VERIFIER_assert_~cond 0))} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1359#false} is VALID [2022-04-07 17:33:41,777 INFO L290 TraceCheckUtils]: 17: Hoare triple {1359#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1359#false} is VALID [2022-04-07 17:33:41,777 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:33:41,777 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:33:41,778 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1756151169] [2022-04-07 17:33:41,778 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1756151169] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:33:41,778 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1502032810] [2022-04-07 17:33:41,779 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:33:41,779 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:33:41,779 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:33:41,780 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:33:41,781 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-04-07 17:33:41,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:33:41,833 INFO L263 TraceCheckSpWp]: Trace formula consists of 63 conjuncts, 11 conjunts are in the unsatisfiable core [2022-04-07 17:33:41,849 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:33:41,850 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:33:42,676 INFO L272 TraceCheckUtils]: 0: Hoare triple {1358#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1358#true} is VALID [2022-04-07 17:33:42,676 INFO L290 TraceCheckUtils]: 1: Hoare triple {1358#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1358#true} is VALID [2022-04-07 17:33:42,676 INFO L290 TraceCheckUtils]: 2: Hoare triple {1358#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1358#true} is VALID [2022-04-07 17:33:42,676 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1358#true} {1358#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1358#true} is VALID [2022-04-07 17:33:42,677 INFO L272 TraceCheckUtils]: 4: Hoare triple {1358#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1358#true} is VALID [2022-04-07 17:33:42,677 INFO L290 TraceCheckUtils]: 5: Hoare triple {1358#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1363#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 17:33:42,683 INFO L290 TraceCheckUtils]: 6: Hoare triple {1363#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [105] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~y~0_9 v_main_~y~0_8) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0)) (and (= v_main_~x~0_3 (+ (* (- 1) v_main_~y~0_8) v_main_~x~0_4 v_main_~y~0_9)) (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_9 v_it_1 1) v_main_~y~0_8)))) (< 0 .cse0) (< v_main_~y~0_9 v_main_~y~0_8)))) InVars {main_~y~0=v_main_~y~0_9, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_8, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1393#(or (and (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)))} is VALID [2022-04-07 17:33:42,684 INFO L290 TraceCheckUtils]: 7: Hoare triple {1393#(or (and (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1393#(or (and (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)))} is VALID [2022-04-07 17:33:42,685 INFO L290 TraceCheckUtils]: 8: Hoare triple {1393#(or (and (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {1400#(or (and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0)) (and (< 0 main_~z~0) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~z~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:33:42,691 INFO L290 TraceCheckUtils]: 9: Hoare triple {1400#(or (and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0)) (and (< 0 main_~z~0) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~z~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296))))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {1404#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-07 17:33:42,692 INFO L290 TraceCheckUtils]: 10: Hoare triple {1404#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1404#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-07 17:33:42,692 INFO L290 TraceCheckUtils]: 11: Hoare triple {1404#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1404#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-07 17:33:42,693 INFO L290 TraceCheckUtils]: 12: Hoare triple {1404#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {1404#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-07 17:33:42,693 INFO L290 TraceCheckUtils]: 13: Hoare triple {1404#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {1404#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-07 17:33:42,694 INFO L272 TraceCheckUtils]: 14: Hoare triple {1404#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {1420#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:33:42,694 INFO L290 TraceCheckUtils]: 15: Hoare triple {1420#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1424#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:33:42,694 INFO L290 TraceCheckUtils]: 16: Hoare triple {1424#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1359#false} is VALID [2022-04-07 17:33:42,695 INFO L290 TraceCheckUtils]: 17: Hoare triple {1359#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1359#false} is VALID [2022-04-07 17:33:42,695 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:33:42,695 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 17:33:44,122 INFO L290 TraceCheckUtils]: 17: Hoare triple {1359#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1359#false} is VALID [2022-04-07 17:33:44,122 INFO L290 TraceCheckUtils]: 16: Hoare triple {1424#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1359#false} is VALID [2022-04-07 17:33:44,123 INFO L290 TraceCheckUtils]: 15: Hoare triple {1420#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1424#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:33:44,124 INFO L272 TraceCheckUtils]: 14: Hoare triple {1368#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {1420#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:33:44,125 INFO L290 TraceCheckUtils]: 13: Hoare triple {1368#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {1368#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:33:44,125 INFO L290 TraceCheckUtils]: 12: Hoare triple {1368#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {1368#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:33:44,126 INFO L290 TraceCheckUtils]: 11: Hoare triple {1368#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1368#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:33:44,126 INFO L290 TraceCheckUtils]: 10: Hoare triple {1368#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1368#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:33:44,127 INFO L290 TraceCheckUtils]: 9: Hoare triple {1455#(or (< 0 (mod main_~z~0 4294967296)) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {1368#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:33:44,127 INFO L290 TraceCheckUtils]: 8: Hoare triple {1365#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {1455#(or (< 0 (mod main_~z~0 4294967296)) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:33:44,128 INFO L290 TraceCheckUtils]: 7: Hoare triple {1365#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1365#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-07 17:33:44,169 INFO L290 TraceCheckUtils]: 6: Hoare triple {1465#(or (forall ((aux_mod_v_main_~y~0_30_31 Int)) (or (< aux_mod_v_main_~y~0_30_31 0) (<= 1 aux_mod_v_main_~y~0_30_31) (and (or (not (< 0 (mod main_~x~0 4294967296))) (forall ((aux_div_v_main_~y~0_30_31 Int)) (or (not (< main_~y~0 (+ (* aux_div_v_main_~y~0_30_31 4294967296) aux_mod_v_main_~y~0_30_31))) (exists ((v_it_1 Int)) (and (not (< 0 (mod (+ main_~x~0 (* v_it_1 4294967295)) 4294967296))) (<= (+ v_it_1 main_~y~0 1) (+ (* aux_div_v_main_~y~0_30_31 4294967296) aux_mod_v_main_~y~0_30_31)) (<= 1 v_it_1)))))) (or (forall ((aux_div_v_main_~y~0_30_31 Int)) (not (= main_~y~0 (+ (* aux_div_v_main_~y~0_30_31 4294967296) aux_mod_v_main_~y~0_30_31)))) (< 0 (mod main_~x~0 4294967296)))))) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [105] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~y~0_9 v_main_~y~0_8) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0)) (and (= v_main_~x~0_3 (+ (* (- 1) v_main_~y~0_8) v_main_~x~0_4 v_main_~y~0_9)) (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_9 v_it_1 1) v_main_~y~0_8)))) (< 0 .cse0) (< v_main_~y~0_9 v_main_~y~0_8)))) InVars {main_~y~0=v_main_~y~0_9, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_8, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1365#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-07 17:33:44,174 INFO L290 TraceCheckUtils]: 5: Hoare triple {1358#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1465#(or (forall ((aux_mod_v_main_~y~0_30_31 Int)) (or (< aux_mod_v_main_~y~0_30_31 0) (<= 1 aux_mod_v_main_~y~0_30_31) (and (or (not (< 0 (mod main_~x~0 4294967296))) (forall ((aux_div_v_main_~y~0_30_31 Int)) (or (not (< main_~y~0 (+ (* aux_div_v_main_~y~0_30_31 4294967296) aux_mod_v_main_~y~0_30_31))) (exists ((v_it_1 Int)) (and (not (< 0 (mod (+ main_~x~0 (* v_it_1 4294967295)) 4294967296))) (<= (+ v_it_1 main_~y~0 1) (+ (* aux_div_v_main_~y~0_30_31 4294967296) aux_mod_v_main_~y~0_30_31)) (<= 1 v_it_1)))))) (or (forall ((aux_div_v_main_~y~0_30_31 Int)) (not (= main_~y~0 (+ (* aux_div_v_main_~y~0_30_31 4294967296) aux_mod_v_main_~y~0_30_31)))) (< 0 (mod main_~x~0 4294967296)))))) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-07 17:33:44,174 INFO L272 TraceCheckUtils]: 4: Hoare triple {1358#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1358#true} is VALID [2022-04-07 17:33:44,174 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1358#true} {1358#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1358#true} is VALID [2022-04-07 17:33:44,175 INFO L290 TraceCheckUtils]: 2: Hoare triple {1358#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1358#true} is VALID [2022-04-07 17:33:44,175 INFO L290 TraceCheckUtils]: 1: Hoare triple {1358#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1358#true} is VALID [2022-04-07 17:33:44,175 INFO L272 TraceCheckUtils]: 0: Hoare triple {1358#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1358#true} is VALID [2022-04-07 17:33:44,175 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:33:44,175 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1502032810] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 17:33:44,175 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 17:33:44,175 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 8, 8] total 18 [2022-04-07 17:33:44,175 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1670527971] [2022-04-07 17:33:44,175 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 17:33:44,176 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 1.7222222222222223) internal successors, (31), 15 states have internal predecessors, (31), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-07 17:33:44,176 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:33:44,176 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 18 states, 18 states have (on average 1.7222222222222223) internal successors, (31), 15 states have internal predecessors, (31), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:44,791 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 38 edges. 38 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:33:44,791 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 18 states [2022-04-07 17:33:44,792 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:33:44,792 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2022-04-07 17:33:44,792 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=56, Invalid=250, Unknown=0, NotChecked=0, Total=306 [2022-04-07 17:33:44,792 INFO L87 Difference]: Start difference. First operand 33 states and 50 transitions. Second operand has 18 states, 18 states have (on average 1.7222222222222223) internal successors, (31), 15 states have internal predecessors, (31), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:47,499 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:33:47,499 INFO L93 Difference]: Finished difference Result 49 states and 76 transitions. [2022-04-07 17:33:47,499 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-04-07 17:33:47,500 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 1.7222222222222223) internal successors, (31), 15 states have internal predecessors, (31), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-07 17:33:47,500 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:33:47,500 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 18 states have (on average 1.7222222222222223) internal successors, (31), 15 states have internal predecessors, (31), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:47,502 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 61 transitions. [2022-04-07 17:33:47,502 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 18 states have (on average 1.7222222222222223) internal successors, (31), 15 states have internal predecessors, (31), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:47,503 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 61 transitions. [2022-04-07 17:33:47,503 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 11 states and 61 transitions. [2022-04-07 17:33:47,656 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 61 edges. 61 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:33:47,657 INFO L225 Difference]: With dead ends: 49 [2022-04-07 17:33:47,657 INFO L226 Difference]: Without dead ends: 46 [2022-04-07 17:33:47,658 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 55 GetRequests, 28 SyntacticMatches, 4 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 136 ImplicationChecksByTransitivity, 2.9s TimeCoverageRelationStatistics Valid=125, Invalid=474, Unknown=1, NotChecked=0, Total=600 [2022-04-07 17:33:47,658 INFO L913 BasicCegarLoop]: 11 mSDtfsCounter, 69 mSDsluCounter, 52 mSDsCounter, 0 mSdLazyCounter, 103 mSolverCounterSat, 15 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 69 SdHoareTripleChecker+Valid, 63 SdHoareTripleChecker+Invalid, 154 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 15 IncrementalHoareTripleChecker+Valid, 103 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 36 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 17:33:47,659 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [69 Valid, 63 Invalid, 154 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [15 Valid, 103 Invalid, 0 Unknown, 36 Unchecked, 0.1s Time] [2022-04-07 17:33:47,659 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states. [2022-04-07 17:33:47,661 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 36. [2022-04-07 17:33:47,661 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:33:47,662 INFO L82 GeneralOperation]: Start isEquivalent. First operand 46 states. Second operand has 36 states, 31 states have (on average 1.6451612903225807) internal successors, (51), 31 states have internal predecessors, (51), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:47,662 INFO L74 IsIncluded]: Start isIncluded. First operand 46 states. Second operand has 36 states, 31 states have (on average 1.6451612903225807) internal successors, (51), 31 states have internal predecessors, (51), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:47,662 INFO L87 Difference]: Start difference. First operand 46 states. Second operand has 36 states, 31 states have (on average 1.6451612903225807) internal successors, (51), 31 states have internal predecessors, (51), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:47,664 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:33:47,664 INFO L93 Difference]: Finished difference Result 46 states and 73 transitions. [2022-04-07 17:33:47,664 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 73 transitions. [2022-04-07 17:33:47,664 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:33:47,664 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:33:47,665 INFO L74 IsIncluded]: Start isIncluded. First operand has 36 states, 31 states have (on average 1.6451612903225807) internal successors, (51), 31 states have internal predecessors, (51), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 46 states. [2022-04-07 17:33:47,665 INFO L87 Difference]: Start difference. First operand has 36 states, 31 states have (on average 1.6451612903225807) internal successors, (51), 31 states have internal predecessors, (51), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 46 states. [2022-04-07 17:33:47,669 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:33:47,669 INFO L93 Difference]: Finished difference Result 46 states and 73 transitions. [2022-04-07 17:33:47,669 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 73 transitions. [2022-04-07 17:33:47,669 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:33:47,669 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:33:47,669 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:33:47,669 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:33:47,670 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 36 states, 31 states have (on average 1.6451612903225807) internal successors, (51), 31 states have internal predecessors, (51), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:47,671 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 55 transitions. [2022-04-07 17:33:47,671 INFO L78 Accepts]: Start accepts. Automaton has 36 states and 55 transitions. Word has length 18 [2022-04-07 17:33:47,671 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:33:47,671 INFO L478 AbstractCegarLoop]: Abstraction has 36 states and 55 transitions. [2022-04-07 17:33:47,671 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 18 states, 18 states have (on average 1.7222222222222223) internal successors, (31), 15 states have internal predecessors, (31), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:33:47,672 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 55 transitions. [2022-04-07 17:33:47,672 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-07 17:33:47,672 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:33:47,672 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:33:47,698 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2022-04-07 17:33:47,894 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7,7 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:33:47,895 INFO L403 AbstractCegarLoop]: === Iteration 9 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:33:47,895 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:33:47,895 INFO L85 PathProgramCache]: Analyzing trace with hash 1095597292, now seen corresponding path program 1 times [2022-04-07 17:33:47,895 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:33:47,895 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [709180894] [2022-04-07 17:33:47,895 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:33:47,896 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:33:47,912 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.0))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-07 17:33:47,924 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_6.1))) (+ main_~y~0_9 .cse0 (* (- 4294967296) (div (+ main_~y~0_9 .cse0) 4294967296)))) 0)) [2022-04-07 17:33:47,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:33:47,948 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.3))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-07 17:33:47,953 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_6.4))) (+ main_~y~0_9 .cse0 (* (- 4294967296) (div (+ main_~y~0_9 .cse0) 4294967296)))) 0)) [2022-04-07 17:33:48,124 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:33:48,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:33:48,128 INFO L290 TraceCheckUtils]: 0: Hoare triple {1692#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1678#true} is VALID [2022-04-07 17:33:48,128 INFO L290 TraceCheckUtils]: 1: Hoare triple {1678#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1678#true} is VALID [2022-04-07 17:33:48,128 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1678#true} {1678#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1678#true} is VALID [2022-04-07 17:33:48,129 INFO L272 TraceCheckUtils]: 0: Hoare triple {1678#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1692#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:33:48,129 INFO L290 TraceCheckUtils]: 1: Hoare triple {1692#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1678#true} is VALID [2022-04-07 17:33:48,129 INFO L290 TraceCheckUtils]: 2: Hoare triple {1678#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1678#true} is VALID [2022-04-07 17:33:48,129 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1678#true} {1678#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1678#true} is VALID [2022-04-07 17:33:48,129 INFO L272 TraceCheckUtils]: 4: Hoare triple {1678#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1678#true} is VALID [2022-04-07 17:33:48,130 INFO L290 TraceCheckUtils]: 5: Hoare triple {1678#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1683#(and (= main_~n~0 main_~x~0) (= main_~y~0 0))} is VALID [2022-04-07 17:33:48,131 INFO L290 TraceCheckUtils]: 6: Hoare triple {1683#(and (= main_~n~0 main_~x~0) (= main_~y~0 0))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1684#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:33:48,131 INFO L290 TraceCheckUtils]: 7: Hoare triple {1684#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {1685#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 17:33:48,132 INFO L290 TraceCheckUtils]: 8: Hoare triple {1685#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {1685#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 17:33:48,133 INFO L290 TraceCheckUtils]: 9: Hoare triple {1685#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [112] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_5 4294967296))) (or (and (= v_main_~y~0_4 v_main_~y~0_5) (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= |v_main_#t~post9_3| |v_main_#t~post9_1|) (<= .cse0 0)) (and (= v_main_~y~0_4 (+ v_main_~y~0_5 v_main_~z~0_3 (* (- 1) v_main_~z~0_2))) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= (+ v_main_~z~0_3 v_it_3 1) v_main_~z~0_2)) (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_5 (* v_it_3 4294967295)) 4294967296)))) (< v_main_~z~0_3 v_main_~z~0_2)))) InVars {main_~y~0=v_main_~y~0_5, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1686#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 17:33:48,134 INFO L290 TraceCheckUtils]: 10: Hoare triple {1686#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1687#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 17:33:48,135 INFO L290 TraceCheckUtils]: 11: Hoare triple {1687#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1688#(and (= main_~z~0 0) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-07 17:33:48,135 INFO L290 TraceCheckUtils]: 12: Hoare triple {1688#(and (= main_~z~0 0) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {1688#(and (= main_~z~0 0) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-07 17:33:48,137 INFO L290 TraceCheckUtils]: 13: Hoare triple {1688#(and (= main_~z~0 0) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {1689#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))) (<= 0 main_~z~0))} is VALID [2022-04-07 17:33:48,138 INFO L290 TraceCheckUtils]: 14: Hoare triple {1689#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))) (<= 0 main_~z~0))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {1689#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))) (<= 0 main_~z~0))} is VALID [2022-04-07 17:33:48,139 INFO L272 TraceCheckUtils]: 15: Hoare triple {1689#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))) (<= 0 main_~z~0))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {1690#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:33:48,139 INFO L290 TraceCheckUtils]: 16: Hoare triple {1690#(not (= |__VERIFIER_assert_#in~cond| 0))} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1691#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:33:48,139 INFO L290 TraceCheckUtils]: 17: Hoare triple {1691#(not (= __VERIFIER_assert_~cond 0))} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1679#false} is VALID [2022-04-07 17:33:48,140 INFO L290 TraceCheckUtils]: 18: Hoare triple {1679#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1679#false} is VALID [2022-04-07 17:33:48,140 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:33:48,140 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:33:48,140 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [709180894] [2022-04-07 17:33:48,140 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [709180894] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:33:48,140 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1289221607] [2022-04-07 17:33:48,140 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:33:48,140 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:33:48,141 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:33:48,144 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:33:48,150 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2022-04-07 17:33:48,180 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:33:48,181 INFO L263 TraceCheckSpWp]: Trace formula consists of 64 conjuncts, 9 conjunts are in the unsatisfiable core [2022-04-07 17:33:48,189 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:33:48,190 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:33:48,848 INFO L272 TraceCheckUtils]: 0: Hoare triple {1678#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1678#true} is VALID [2022-04-07 17:33:48,848 INFO L290 TraceCheckUtils]: 1: Hoare triple {1678#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1678#true} is VALID [2022-04-07 17:33:48,848 INFO L290 TraceCheckUtils]: 2: Hoare triple {1678#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1678#true} is VALID [2022-04-07 17:33:48,848 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1678#true} {1678#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1678#true} is VALID [2022-04-07 17:33:48,849 INFO L272 TraceCheckUtils]: 4: Hoare triple {1678#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1678#true} is VALID [2022-04-07 17:33:48,854 INFO L290 TraceCheckUtils]: 5: Hoare triple {1678#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1711#(= main_~n~0 main_~x~0)} is VALID [2022-04-07 17:33:48,854 INFO L290 TraceCheckUtils]: 6: Hoare triple {1711#(= main_~n~0 main_~x~0)} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1715#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:33:48,855 INFO L290 TraceCheckUtils]: 7: Hoare triple {1715#(not (< 0 (mod main_~n~0 4294967296)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {1715#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:33:48,855 INFO L290 TraceCheckUtils]: 8: Hoare triple {1715#(not (< 0 (mod main_~n~0 4294967296)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {1715#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:33:48,856 INFO L290 TraceCheckUtils]: 9: Hoare triple {1715#(not (< 0 (mod main_~n~0 4294967296)))} [112] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_5 4294967296))) (or (and (= v_main_~y~0_4 v_main_~y~0_5) (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= |v_main_#t~post9_3| |v_main_#t~post9_1|) (<= .cse0 0)) (and (= v_main_~y~0_4 (+ v_main_~y~0_5 v_main_~z~0_3 (* (- 1) v_main_~z~0_2))) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= (+ v_main_~z~0_3 v_it_3 1) v_main_~z~0_2)) (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_5 (* v_it_3 4294967295)) 4294967296)))) (< v_main_~z~0_3 v_main_~z~0_2)))) InVars {main_~y~0=v_main_~y~0_5, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1715#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:33:48,856 INFO L290 TraceCheckUtils]: 10: Hoare triple {1715#(not (< 0 (mod main_~n~0 4294967296)))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1728#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:33:48,857 INFO L290 TraceCheckUtils]: 11: Hoare triple {1728#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1728#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:33:48,857 INFO L290 TraceCheckUtils]: 12: Hoare triple {1728#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {1735#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:33:48,859 INFO L290 TraceCheckUtils]: 13: Hoare triple {1735#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {1739#(and (<= (mod main_~n~0 4294967296) 0) (<= (mod main_~z~0 4294967296) 0))} is VALID [2022-04-07 17:33:48,859 INFO L290 TraceCheckUtils]: 14: Hoare triple {1739#(and (<= (mod main_~n~0 4294967296) 0) (<= (mod main_~z~0 4294967296) 0))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {1739#(and (<= (mod main_~n~0 4294967296) 0) (<= (mod main_~z~0 4294967296) 0))} is VALID [2022-04-07 17:33:48,860 INFO L272 TraceCheckUtils]: 15: Hoare triple {1739#(and (<= (mod main_~n~0 4294967296) 0) (<= (mod main_~z~0 4294967296) 0))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {1746#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:33:48,860 INFO L290 TraceCheckUtils]: 16: Hoare triple {1746#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1750#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:33:48,860 INFO L290 TraceCheckUtils]: 17: Hoare triple {1750#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1679#false} is VALID [2022-04-07 17:33:48,861 INFO L290 TraceCheckUtils]: 18: Hoare triple {1679#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1679#false} is VALID [2022-04-07 17:33:48,861 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 17:33:48,861 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 17:34:03,348 INFO L290 TraceCheckUtils]: 18: Hoare triple {1679#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1679#false} is VALID [2022-04-07 17:34:03,349 INFO L290 TraceCheckUtils]: 17: Hoare triple {1750#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1679#false} is VALID [2022-04-07 17:34:03,349 INFO L290 TraceCheckUtils]: 16: Hoare triple {1746#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1750#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:34:03,350 INFO L272 TraceCheckUtils]: 15: Hoare triple {1766#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {1746#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:34:03,350 INFO L290 TraceCheckUtils]: 14: Hoare triple {1766#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {1766#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} is VALID [2022-04-07 17:34:05,367 WARN L290 TraceCheckUtils]: 13: Hoare triple {1773#(forall ((aux_mod_v_main_~z~0_34_31 Int)) (or (and (or (forall ((aux_div_v_main_~z~0_34_31 Int)) (not (= (+ (* 4294967296 aux_div_v_main_~z~0_34_31) aux_mod_v_main_~z~0_34_31) main_~z~0))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_34_31 Int)) (or (not (< main_~z~0 (+ (* 4294967296 aux_div_v_main_~z~0_34_31) aux_mod_v_main_~z~0_34_31))) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 1) (+ (* 4294967296 aux_div_v_main_~z~0_34_31) aux_mod_v_main_~z~0_34_31)) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))))))) (>= aux_mod_v_main_~z~0_34_31 4294967296) (> 0 aux_mod_v_main_~z~0_34_31) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_34_31)))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {1766#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} is UNKNOWN [2022-04-07 17:34:07,378 WARN L290 TraceCheckUtils]: 12: Hoare triple {1777#(forall ((aux_mod_v_main_~z~0_34_31 Int) (aux_mod_main_~z~0_26 Int)) (or (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_34_31) (< aux_mod_v_main_~z~0_34_31 0) (and (or (forall ((aux_div_v_main_~z~0_34_31 Int) (aux_div_main_~z~0_26 Int)) (not (= (+ (* 4294967296 aux_div_v_main_~z~0_34_31) aux_mod_v_main_~z~0_34_31) (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26))))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_34_31 Int) (aux_div_main_~z~0_26 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ aux_mod_main_~z~0_26 v_it_6 (* 4294967296 aux_div_main_~z~0_26) 1) (+ (* 4294967296 aux_div_v_main_~z~0_34_31) aux_mod_v_main_~z~0_34_31)) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26)) (+ (* 4294967296 aux_div_v_main_~z~0_34_31) aux_mod_v_main_~z~0_34_31))))))) (<= 4294967296 aux_mod_v_main_~z~0_34_31) (< 0 aux_mod_main_~z~0_26) (< aux_mod_main_~z~0_26 0)))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {1773#(forall ((aux_mod_v_main_~z~0_34_31 Int)) (or (and (or (forall ((aux_div_v_main_~z~0_34_31 Int)) (not (= (+ (* 4294967296 aux_div_v_main_~z~0_34_31) aux_mod_v_main_~z~0_34_31) main_~z~0))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_34_31 Int)) (or (not (< main_~z~0 (+ (* 4294967296 aux_div_v_main_~z~0_34_31) aux_mod_v_main_~z~0_34_31))) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 1) (+ (* 4294967296 aux_div_v_main_~z~0_34_31) aux_mod_v_main_~z~0_34_31)) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))))))) (>= aux_mod_v_main_~z~0_34_31 4294967296) (> 0 aux_mod_v_main_~z~0_34_31) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_34_31)))} is UNKNOWN [2022-04-07 17:34:09,391 WARN L290 TraceCheckUtils]: 11: Hoare triple {1777#(forall ((aux_mod_v_main_~z~0_34_31 Int) (aux_mod_main_~z~0_26 Int)) (or (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_34_31) (< aux_mod_v_main_~z~0_34_31 0) (and (or (forall ((aux_div_v_main_~z~0_34_31 Int) (aux_div_main_~z~0_26 Int)) (not (= (+ (* 4294967296 aux_div_v_main_~z~0_34_31) aux_mod_v_main_~z~0_34_31) (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26))))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_34_31 Int) (aux_div_main_~z~0_26 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ aux_mod_main_~z~0_26 v_it_6 (* 4294967296 aux_div_main_~z~0_26) 1) (+ (* 4294967296 aux_div_v_main_~z~0_34_31) aux_mod_v_main_~z~0_34_31)) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26)) (+ (* 4294967296 aux_div_v_main_~z~0_34_31) aux_mod_v_main_~z~0_34_31))))))) (<= 4294967296 aux_mod_v_main_~z~0_34_31) (< 0 aux_mod_main_~z~0_26) (< aux_mod_main_~z~0_26 0)))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1777#(forall ((aux_mod_v_main_~z~0_34_31 Int) (aux_mod_main_~z~0_26 Int)) (or (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_34_31) (< aux_mod_v_main_~z~0_34_31 0) (and (or (forall ((aux_div_v_main_~z~0_34_31 Int) (aux_div_main_~z~0_26 Int)) (not (= (+ (* 4294967296 aux_div_v_main_~z~0_34_31) aux_mod_v_main_~z~0_34_31) (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26))))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_34_31 Int) (aux_div_main_~z~0_26 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ aux_mod_main_~z~0_26 v_it_6 (* 4294967296 aux_div_main_~z~0_26) 1) (+ (* 4294967296 aux_div_v_main_~z~0_34_31) aux_mod_v_main_~z~0_34_31)) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26)) (+ (* 4294967296 aux_div_v_main_~z~0_34_31) aux_mod_v_main_~z~0_34_31))))))) (<= 4294967296 aux_mod_v_main_~z~0_34_31) (< 0 aux_mod_main_~z~0_26) (< aux_mod_main_~z~0_26 0)))} is UNKNOWN [2022-04-07 17:34:09,394 INFO L290 TraceCheckUtils]: 10: Hoare triple {1715#(not (< 0 (mod main_~n~0 4294967296)))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1777#(forall ((aux_mod_v_main_~z~0_34_31 Int) (aux_mod_main_~z~0_26 Int)) (or (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_34_31) (< aux_mod_v_main_~z~0_34_31 0) (and (or (forall ((aux_div_v_main_~z~0_34_31 Int) (aux_div_main_~z~0_26 Int)) (not (= (+ (* 4294967296 aux_div_v_main_~z~0_34_31) aux_mod_v_main_~z~0_34_31) (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26))))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_34_31 Int) (aux_div_main_~z~0_26 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ aux_mod_main_~z~0_26 v_it_6 (* 4294967296 aux_div_main_~z~0_26) 1) (+ (* 4294967296 aux_div_v_main_~z~0_34_31) aux_mod_v_main_~z~0_34_31)) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26)) (+ (* 4294967296 aux_div_v_main_~z~0_34_31) aux_mod_v_main_~z~0_34_31))))))) (<= 4294967296 aux_mod_v_main_~z~0_34_31) (< 0 aux_mod_main_~z~0_26) (< aux_mod_main_~z~0_26 0)))} is VALID [2022-04-07 17:34:09,394 INFO L290 TraceCheckUtils]: 9: Hoare triple {1715#(not (< 0 (mod main_~n~0 4294967296)))} [112] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_5 4294967296))) (or (and (= v_main_~y~0_4 v_main_~y~0_5) (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= |v_main_#t~post9_3| |v_main_#t~post9_1|) (<= .cse0 0)) (and (= v_main_~y~0_4 (+ v_main_~y~0_5 v_main_~z~0_3 (* (- 1) v_main_~z~0_2))) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= (+ v_main_~z~0_3 v_it_3 1) v_main_~z~0_2)) (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_5 (* v_it_3 4294967295)) 4294967296)))) (< v_main_~z~0_3 v_main_~z~0_2)))) InVars {main_~y~0=v_main_~y~0_5, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1715#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:34:09,395 INFO L290 TraceCheckUtils]: 8: Hoare triple {1715#(not (< 0 (mod main_~n~0 4294967296)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {1715#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:34:09,395 INFO L290 TraceCheckUtils]: 7: Hoare triple {1715#(not (< 0 (mod main_~n~0 4294967296)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {1715#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:34:09,395 INFO L290 TraceCheckUtils]: 6: Hoare triple {1796#(or (< 0 (mod main_~x~0 4294967296)) (not (< 0 (mod main_~n~0 4294967296))))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1715#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:34:09,396 INFO L290 TraceCheckUtils]: 5: Hoare triple {1678#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1796#(or (< 0 (mod main_~x~0 4294967296)) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:34:09,396 INFO L272 TraceCheckUtils]: 4: Hoare triple {1678#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1678#true} is VALID [2022-04-07 17:34:09,396 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1678#true} {1678#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1678#true} is VALID [2022-04-07 17:34:09,396 INFO L290 TraceCheckUtils]: 2: Hoare triple {1678#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1678#true} is VALID [2022-04-07 17:34:09,396 INFO L290 TraceCheckUtils]: 1: Hoare triple {1678#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1678#true} is VALID [2022-04-07 17:34:09,396 INFO L272 TraceCheckUtils]: 0: Hoare triple {1678#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1678#true} is VALID [2022-04-07 17:34:09,397 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 17:34:09,397 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1289221607] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 17:34:09,397 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 17:34:09,397 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 9, 9] total 23 [2022-04-07 17:34:09,397 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1953162730] [2022-04-07 17:34:09,397 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 17:34:09,398 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 23 states have (on average 1.5217391304347827) internal successors, (35), 20 states have internal predecessors, (35), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-07 17:34:09,398 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:34:09,398 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 23 states, 23 states have (on average 1.5217391304347827) internal successors, (35), 20 states have internal predecessors, (35), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:34:15,523 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 42 edges. 39 inductive. 0 not inductive. 3 times theorem prover too weak to decide inductivity. [2022-04-07 17:34:15,524 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 23 states [2022-04-07 17:34:15,524 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:34:15,524 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2022-04-07 17:34:15,525 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=111, Invalid=391, Unknown=4, NotChecked=0, Total=506 [2022-04-07 17:34:15,525 INFO L87 Difference]: Start difference. First operand 36 states and 55 transitions. Second operand has 23 states, 23 states have (on average 1.5217391304347827) internal successors, (35), 20 states have internal predecessors, (35), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:34:16,071 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:34:16,072 INFO L93 Difference]: Finished difference Result 55 states and 85 transitions. [2022-04-07 17:34:16,072 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2022-04-07 17:34:16,072 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 23 states have (on average 1.5217391304347827) internal successors, (35), 20 states have internal predecessors, (35), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-07 17:34:16,072 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:34:16,072 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 23 states have (on average 1.5217391304347827) internal successors, (35), 20 states have internal predecessors, (35), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:34:16,074 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 67 transitions. [2022-04-07 17:34:16,074 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 23 states have (on average 1.5217391304347827) internal successors, (35), 20 states have internal predecessors, (35), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:34:16,076 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 67 transitions. [2022-04-07 17:34:16,076 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 16 states and 67 transitions. [2022-04-07 17:34:16,152 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 67 edges. 67 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:34:16,153 INFO L225 Difference]: With dead ends: 55 [2022-04-07 17:34:16,153 INFO L226 Difference]: Without dead ends: 51 [2022-04-07 17:34:16,154 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 30 SyntacticMatches, 2 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 270 ImplicationChecksByTransitivity, 8.8s TimeCoverageRelationStatistics Valid=233, Invalid=819, Unknown=4, NotChecked=0, Total=1056 [2022-04-07 17:34:16,154 INFO L913 BasicCegarLoop]: 11 mSDtfsCounter, 60 mSDsluCounter, 82 mSDsCounter, 0 mSdLazyCounter, 130 mSolverCounterSat, 23 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 60 SdHoareTripleChecker+Valid, 93 SdHoareTripleChecker+Invalid, 197 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 23 IncrementalHoareTripleChecker+Valid, 130 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 44 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 17:34:16,154 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [60 Valid, 93 Invalid, 197 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [23 Valid, 130 Invalid, 0 Unknown, 44 Unchecked, 0.1s Time] [2022-04-07 17:34:16,155 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states. [2022-04-07 17:34:16,157 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 38. [2022-04-07 17:34:16,157 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:34:16,157 INFO L82 GeneralOperation]: Start isEquivalent. First operand 51 states. Second operand has 38 states, 33 states have (on average 1.6666666666666667) internal successors, (55), 33 states have internal predecessors, (55), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:34:16,157 INFO L74 IsIncluded]: Start isIncluded. First operand 51 states. Second operand has 38 states, 33 states have (on average 1.6666666666666667) internal successors, (55), 33 states have internal predecessors, (55), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:34:16,158 INFO L87 Difference]: Start difference. First operand 51 states. Second operand has 38 states, 33 states have (on average 1.6666666666666667) internal successors, (55), 33 states have internal predecessors, (55), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:34:16,159 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:34:16,159 INFO L93 Difference]: Finished difference Result 51 states and 80 transitions. [2022-04-07 17:34:16,159 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 80 transitions. [2022-04-07 17:34:16,160 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:34:16,160 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:34:16,160 INFO L74 IsIncluded]: Start isIncluded. First operand has 38 states, 33 states have (on average 1.6666666666666667) internal successors, (55), 33 states have internal predecessors, (55), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 51 states. [2022-04-07 17:34:16,160 INFO L87 Difference]: Start difference. First operand has 38 states, 33 states have (on average 1.6666666666666667) internal successors, (55), 33 states have internal predecessors, (55), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 51 states. [2022-04-07 17:34:16,161 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:34:16,162 INFO L93 Difference]: Finished difference Result 51 states and 80 transitions. [2022-04-07 17:34:16,162 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 80 transitions. [2022-04-07 17:34:16,162 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:34:16,162 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:34:16,162 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:34:16,162 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:34:16,162 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 38 states, 33 states have (on average 1.6666666666666667) internal successors, (55), 33 states have internal predecessors, (55), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:34:16,163 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 59 transitions. [2022-04-07 17:34:16,163 INFO L78 Accepts]: Start accepts. Automaton has 38 states and 59 transitions. Word has length 19 [2022-04-07 17:34:16,164 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:34:16,164 INFO L478 AbstractCegarLoop]: Abstraction has 38 states and 59 transitions. [2022-04-07 17:34:16,164 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 23 states, 23 states have (on average 1.5217391304347827) internal successors, (35), 20 states have internal predecessors, (35), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:34:16,164 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 59 transitions. [2022-04-07 17:34:16,164 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-07 17:34:16,164 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:34:16,164 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:34:16,186 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2022-04-07 17:34:16,379 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8,8 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:34:16,379 INFO L403 AbstractCegarLoop]: === Iteration 10 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:34:16,380 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:34:16,380 INFO L85 PathProgramCache]: Analyzing trace with hash 1868584369, now seen corresponding path program 1 times [2022-04-07 17:34:16,380 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:34:16,380 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1359106717] [2022-04-07 17:34:16,380 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:34:16,380 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:34:16,389 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.0))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-07 17:34:16,391 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.1))) (+ main_~z~0_9 .cse0 (* (- 4294967296) (div (+ main_~z~0_9 .cse0) 4294967296)))) 0)) [2022-04-07 17:34:16,396 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:34:16,406 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.2))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-07 17:34:16,409 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.3))) (+ main_~z~0_9 .cse0 (* (- 4294967296) (div (+ main_~z~0_9 .cse0) 4294967296)))) 0)) [2022-04-07 17:34:16,549 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:34:16,551 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:34:16,554 INFO L290 TraceCheckUtils]: 0: Hoare triple {2048#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2035#true} is VALID [2022-04-07 17:34:16,554 INFO L290 TraceCheckUtils]: 1: Hoare triple {2035#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2035#true} is VALID [2022-04-07 17:34:16,554 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2035#true} {2035#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2035#true} is VALID [2022-04-07 17:34:16,555 INFO L272 TraceCheckUtils]: 0: Hoare triple {2035#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2048#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:34:16,555 INFO L290 TraceCheckUtils]: 1: Hoare triple {2048#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2035#true} is VALID [2022-04-07 17:34:16,555 INFO L290 TraceCheckUtils]: 2: Hoare triple {2035#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2035#true} is VALID [2022-04-07 17:34:16,555 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2035#true} {2035#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2035#true} is VALID [2022-04-07 17:34:16,555 INFO L272 TraceCheckUtils]: 4: Hoare triple {2035#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2035#true} is VALID [2022-04-07 17:34:16,556 INFO L290 TraceCheckUtils]: 5: Hoare triple {2035#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2040#(and (= main_~n~0 main_~x~0) (= main_~y~0 0))} is VALID [2022-04-07 17:34:16,557 INFO L290 TraceCheckUtils]: 6: Hoare triple {2040#(and (= main_~n~0 main_~x~0) (= main_~y~0 0))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2041#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:34:16,557 INFO L290 TraceCheckUtils]: 7: Hoare triple {2041#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {2042#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 17:34:16,558 INFO L290 TraceCheckUtils]: 8: Hoare triple {2042#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {2042#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 17:34:16,559 INFO L290 TraceCheckUtils]: 9: Hoare triple {2042#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [112] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_5 4294967296))) (or (and (= v_main_~y~0_4 v_main_~y~0_5) (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= |v_main_#t~post9_3| |v_main_#t~post9_1|) (<= .cse0 0)) (and (= v_main_~y~0_4 (+ v_main_~y~0_5 v_main_~z~0_3 (* (- 1) v_main_~z~0_2))) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= (+ v_main_~z~0_3 v_it_3 1) v_main_~z~0_2)) (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_5 (* v_it_3 4294967295)) 4294967296)))) (< v_main_~z~0_3 v_main_~z~0_2)))) InVars {main_~y~0=v_main_~y~0_5, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2043#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 17:34:16,560 INFO L290 TraceCheckUtils]: 10: Hoare triple {2043#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2043#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 17:34:16,560 INFO L290 TraceCheckUtils]: 11: Hoare triple {2043#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2043#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 17:34:16,561 INFO L290 TraceCheckUtils]: 12: Hoare triple {2043#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [118] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_13 4294967296))) (or (and (= v_main_~z~0_12 (+ v_main_~x~0_11 v_main_~z~0_13 (* (- 1) v_main_~x~0_10))) (< v_main_~x~0_11 v_main_~x~0_10) (forall ((v_it_5 Int)) (or (< 0 (mod (+ v_main_~z~0_13 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)) (not (<= (+ v_main_~x~0_11 v_it_5 1) v_main_~x~0_10)))) (< 0 .cse0)) (and (= v_main_~x~0_11 v_main_~x~0_10) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (<= .cse0 0) (= v_main_~z~0_13 v_main_~z~0_12) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_13, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_12, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {2044#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} is VALID [2022-04-07 17:34:16,562 INFO L290 TraceCheckUtils]: 13: Hoare triple {2044#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {2045#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:34:16,563 INFO L290 TraceCheckUtils]: 14: Hoare triple {2045#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {2045#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:34:16,564 INFO L272 TraceCheckUtils]: 15: Hoare triple {2045#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {2046#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:34:16,564 INFO L290 TraceCheckUtils]: 16: Hoare triple {2046#(not (= |__VERIFIER_assert_#in~cond| 0))} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2047#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:34:16,564 INFO L290 TraceCheckUtils]: 17: Hoare triple {2047#(not (= __VERIFIER_assert_~cond 0))} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2036#false} is VALID [2022-04-07 17:34:16,565 INFO L290 TraceCheckUtils]: 18: Hoare triple {2036#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2036#false} is VALID [2022-04-07 17:34:16,565 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:34:16,565 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:34:16,565 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1359106717] [2022-04-07 17:34:16,565 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1359106717] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:34:16,565 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [656303420] [2022-04-07 17:34:16,565 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:34:16,565 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:34:16,566 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:34:16,572 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:34:16,605 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2022-04-07 17:34:16,620 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:34:16,621 INFO L263 TraceCheckSpWp]: Trace formula consists of 64 conjuncts, 7 conjunts are in the unsatisfiable core [2022-04-07 17:34:16,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:34:16,630 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:34:17,158 INFO L272 TraceCheckUtils]: 0: Hoare triple {2035#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2035#true} is VALID [2022-04-07 17:34:17,159 INFO L290 TraceCheckUtils]: 1: Hoare triple {2035#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2035#true} is VALID [2022-04-07 17:34:17,159 INFO L290 TraceCheckUtils]: 2: Hoare triple {2035#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2035#true} is VALID [2022-04-07 17:34:17,159 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2035#true} {2035#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2035#true} is VALID [2022-04-07 17:34:17,159 INFO L272 TraceCheckUtils]: 4: Hoare triple {2035#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2035#true} is VALID [2022-04-07 17:34:17,159 INFO L290 TraceCheckUtils]: 5: Hoare triple {2035#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2067#(= main_~n~0 main_~x~0)} is VALID [2022-04-07 17:34:17,159 INFO L290 TraceCheckUtils]: 6: Hoare triple {2067#(= main_~n~0 main_~x~0)} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2071#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:34:17,160 INFO L290 TraceCheckUtils]: 7: Hoare triple {2071#(not (< 0 (mod main_~n~0 4294967296)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {2071#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:34:17,160 INFO L290 TraceCheckUtils]: 8: Hoare triple {2071#(not (< 0 (mod main_~n~0 4294967296)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {2071#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:34:17,160 INFO L290 TraceCheckUtils]: 9: Hoare triple {2071#(not (< 0 (mod main_~n~0 4294967296)))} [112] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_5 4294967296))) (or (and (= v_main_~y~0_4 v_main_~y~0_5) (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= |v_main_#t~post9_3| |v_main_#t~post9_1|) (<= .cse0 0)) (and (= v_main_~y~0_4 (+ v_main_~y~0_5 v_main_~z~0_3 (* (- 1) v_main_~z~0_2))) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= (+ v_main_~z~0_3 v_it_3 1) v_main_~z~0_2)) (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_5 (* v_it_3 4294967295)) 4294967296)))) (< v_main_~z~0_3 v_main_~z~0_2)))) InVars {main_~y~0=v_main_~y~0_5, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2071#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:34:17,161 INFO L290 TraceCheckUtils]: 10: Hoare triple {2071#(not (< 0 (mod main_~n~0 4294967296)))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2071#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:34:17,164 INFO L290 TraceCheckUtils]: 11: Hoare triple {2071#(not (< 0 (mod main_~n~0 4294967296)))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2071#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:34:17,164 INFO L290 TraceCheckUtils]: 12: Hoare triple {2071#(not (< 0 (mod main_~n~0 4294967296)))} [118] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_13 4294967296))) (or (and (= v_main_~z~0_12 (+ v_main_~x~0_11 v_main_~z~0_13 (* (- 1) v_main_~x~0_10))) (< v_main_~x~0_11 v_main_~x~0_10) (forall ((v_it_5 Int)) (or (< 0 (mod (+ v_main_~z~0_13 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)) (not (<= (+ v_main_~x~0_11 v_it_5 1) v_main_~x~0_10)))) (< 0 .cse0)) (and (= v_main_~x~0_11 v_main_~x~0_10) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (<= .cse0 0) (= v_main_~z~0_13 v_main_~z~0_12) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_13, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_12, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {2071#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:34:17,165 INFO L290 TraceCheckUtils]: 13: Hoare triple {2071#(not (< 0 (mod main_~n~0 4294967296)))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {2093#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:34:17,165 INFO L290 TraceCheckUtils]: 14: Hoare triple {2093#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {2093#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:34:17,166 INFO L272 TraceCheckUtils]: 15: Hoare triple {2093#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {2100#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:34:17,166 INFO L290 TraceCheckUtils]: 16: Hoare triple {2100#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2104#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:34:17,167 INFO L290 TraceCheckUtils]: 17: Hoare triple {2104#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2036#false} is VALID [2022-04-07 17:34:17,167 INFO L290 TraceCheckUtils]: 18: Hoare triple {2036#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2036#false} is VALID [2022-04-07 17:34:17,167 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-07 17:34:17,167 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-07 17:34:17,167 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [656303420] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 17:34:17,167 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-07 17:34:17,167 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [11] total 16 [2022-04-07 17:34:17,167 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [164915464] [2022-04-07 17:34:17,167 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 17:34:17,168 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-07 17:34:17,168 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:34:17,168 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:34:17,182 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 19 edges. 19 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:34:17,182 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-04-07 17:34:17,182 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:34:17,182 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-04-07 17:34:17,183 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=54, Invalid=186, Unknown=0, NotChecked=0, Total=240 [2022-04-07 17:34:17,183 INFO L87 Difference]: Start difference. First operand 38 states and 59 transitions. Second operand has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:34:17,280 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:34:17,280 INFO L93 Difference]: Finished difference Result 45 states and 67 transitions. [2022-04-07 17:34:17,280 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-04-07 17:34:17,280 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-07 17:34:17,281 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:34:17,281 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:34:17,282 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 46 transitions. [2022-04-07 17:34:17,282 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:34:17,283 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 46 transitions. [2022-04-07 17:34:17,283 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 9 states and 46 transitions. [2022-04-07 17:34:17,334 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 46 edges. 46 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:34:17,335 INFO L225 Difference]: With dead ends: 45 [2022-04-07 17:34:17,335 INFO L226 Difference]: Without dead ends: 42 [2022-04-07 17:34:17,335 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 80 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=78, Invalid=264, Unknown=0, NotChecked=0, Total=342 [2022-04-07 17:34:17,336 INFO L913 BasicCegarLoop]: 13 mSDtfsCounter, 12 mSDsluCounter, 59 mSDsCounter, 0 mSdLazyCounter, 29 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 12 SdHoareTripleChecker+Valid, 72 SdHoareTripleChecker+Invalid, 36 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 29 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 6 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 17:34:17,336 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [12 Valid, 72 Invalid, 36 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 29 Invalid, 0 Unknown, 6 Unchecked, 0.0s Time] [2022-04-07 17:34:17,337 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42 states. [2022-04-07 17:34:17,338 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42 to 37. [2022-04-07 17:34:17,338 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:34:17,339 INFO L82 GeneralOperation]: Start isEquivalent. First operand 42 states. Second operand has 37 states, 32 states have (on average 1.65625) internal successors, (53), 32 states have internal predecessors, (53), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:34:17,339 INFO L74 IsIncluded]: Start isIncluded. First operand 42 states. Second operand has 37 states, 32 states have (on average 1.65625) internal successors, (53), 32 states have internal predecessors, (53), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:34:17,339 INFO L87 Difference]: Start difference. First operand 42 states. Second operand has 37 states, 32 states have (on average 1.65625) internal successors, (53), 32 states have internal predecessors, (53), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:34:17,341 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:34:17,341 INFO L93 Difference]: Finished difference Result 42 states and 64 transitions. [2022-04-07 17:34:17,341 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 64 transitions. [2022-04-07 17:34:17,341 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:34:17,341 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:34:17,342 INFO L74 IsIncluded]: Start isIncluded. First operand has 37 states, 32 states have (on average 1.65625) internal successors, (53), 32 states have internal predecessors, (53), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 42 states. [2022-04-07 17:34:17,342 INFO L87 Difference]: Start difference. First operand has 37 states, 32 states have (on average 1.65625) internal successors, (53), 32 states have internal predecessors, (53), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 42 states. [2022-04-07 17:34:17,343 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:34:17,343 INFO L93 Difference]: Finished difference Result 42 states and 64 transitions. [2022-04-07 17:34:17,343 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 64 transitions. [2022-04-07 17:34:17,343 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:34:17,343 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:34:17,344 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:34:17,344 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:34:17,344 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 37 states, 32 states have (on average 1.65625) internal successors, (53), 32 states have internal predecessors, (53), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:34:17,344 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 57 transitions. [2022-04-07 17:34:17,345 INFO L78 Accepts]: Start accepts. Automaton has 37 states and 57 transitions. Word has length 19 [2022-04-07 17:34:17,345 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:34:17,345 INFO L478 AbstractCegarLoop]: Abstraction has 37 states and 57 transitions. [2022-04-07 17:34:17,345 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:34:17,345 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 57 transitions. [2022-04-07 17:34:17,345 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-07 17:34:17,345 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:34:17,345 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:34:17,367 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2022-04-07 17:34:17,563 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable9 [2022-04-07 17:34:17,564 INFO L403 AbstractCegarLoop]: === Iteration 11 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:34:17,564 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:34:17,564 INFO L85 PathProgramCache]: Analyzing trace with hash 61379980, now seen corresponding path program 1 times [2022-04-07 17:34:17,564 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:34:17,564 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [668168431] [2022-04-07 17:34:17,564 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:34:17,564 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:34:17,572 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.0))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-07 17:34:17,574 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.1))) (+ .cse0 main_~x~0_5 (* (- 4294967296) (div (+ .cse0 main_~x~0_5) 4294967296)))) 0)) [2022-04-07 17:34:17,578 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:34:17,587 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.2))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-07 17:34:17,591 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.3))) (+ .cse0 main_~x~0_5 (* (- 4294967296) (div (+ .cse0 main_~x~0_5) 4294967296)))) 0)) [2022-04-07 17:34:17,750 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:34:17,752 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:34:17,754 INFO L290 TraceCheckUtils]: 0: Hoare triple {2294#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2282#true} is VALID [2022-04-07 17:34:17,755 INFO L290 TraceCheckUtils]: 1: Hoare triple {2282#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2282#true} is VALID [2022-04-07 17:34:17,755 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2282#true} {2282#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2282#true} is VALID [2022-04-07 17:34:17,755 INFO L272 TraceCheckUtils]: 0: Hoare triple {2282#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2294#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:34:17,756 INFO L290 TraceCheckUtils]: 1: Hoare triple {2294#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2282#true} is VALID [2022-04-07 17:34:17,756 INFO L290 TraceCheckUtils]: 2: Hoare triple {2282#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2282#true} is VALID [2022-04-07 17:34:17,756 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2282#true} {2282#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2282#true} is VALID [2022-04-07 17:34:17,756 INFO L272 TraceCheckUtils]: 4: Hoare triple {2282#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2282#true} is VALID [2022-04-07 17:34:17,756 INFO L290 TraceCheckUtils]: 5: Hoare triple {2282#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2287#(and (= main_~n~0 main_~x~0) (= main_~y~0 0))} is VALID [2022-04-07 17:34:17,757 INFO L290 TraceCheckUtils]: 6: Hoare triple {2287#(and (= main_~n~0 main_~x~0) (= main_~y~0 0))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2288#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:34:17,758 INFO L290 TraceCheckUtils]: 7: Hoare triple {2288#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {2289#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 17:34:17,758 INFO L290 TraceCheckUtils]: 8: Hoare triple {2289#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {2289#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 17:34:17,759 INFO L290 TraceCheckUtils]: 9: Hoare triple {2289#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [112] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_5 4294967296))) (or (and (= v_main_~y~0_4 v_main_~y~0_5) (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= |v_main_#t~post9_3| |v_main_#t~post9_1|) (<= .cse0 0)) (and (= v_main_~y~0_4 (+ v_main_~y~0_5 v_main_~z~0_3 (* (- 1) v_main_~z~0_2))) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= (+ v_main_~z~0_3 v_it_3 1) v_main_~z~0_2)) (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_5 (* v_it_3 4294967295)) 4294967296)))) (< v_main_~z~0_3 v_main_~z~0_2)))) InVars {main_~y~0=v_main_~y~0_5, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2290#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} is VALID [2022-04-07 17:34:17,761 INFO L290 TraceCheckUtils]: 10: Hoare triple {2290#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2290#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} is VALID [2022-04-07 17:34:17,763 INFO L290 TraceCheckUtils]: 11: Hoare triple {2290#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} [115] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (= v_main_~y~0_10 (+ (* (- 1) v_main_~x~0_6) v_main_~y~0_11 v_main_~x~0_7)) (< v_main_~x~0_6 v_main_~x~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_11 v_main_~y~0_10) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_11, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_10, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {2291#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:34:17,763 INFO L290 TraceCheckUtils]: 12: Hoare triple {2291#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2291#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:34:17,764 INFO L290 TraceCheckUtils]: 13: Hoare triple {2291#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {2291#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:34:17,764 INFO L290 TraceCheckUtils]: 14: Hoare triple {2291#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {2291#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:34:17,765 INFO L272 TraceCheckUtils]: 15: Hoare triple {2291#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {2292#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:34:17,766 INFO L290 TraceCheckUtils]: 16: Hoare triple {2292#(not (= |__VERIFIER_assert_#in~cond| 0))} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2293#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:34:17,766 INFO L290 TraceCheckUtils]: 17: Hoare triple {2293#(not (= __VERIFIER_assert_~cond 0))} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2283#false} is VALID [2022-04-07 17:34:17,766 INFO L290 TraceCheckUtils]: 18: Hoare triple {2283#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2283#false} is VALID [2022-04-07 17:34:17,767 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:34:17,767 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:34:17,767 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [668168431] [2022-04-07 17:34:17,767 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [668168431] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:34:17,767 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1062964810] [2022-04-07 17:34:17,767 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:34:17,767 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:34:17,767 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:34:17,772 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:34:17,773 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2022-04-07 17:34:17,810 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:34:17,810 INFO L263 TraceCheckSpWp]: Trace formula consists of 64 conjuncts, 9 conjunts are in the unsatisfiable core [2022-04-07 17:34:17,820 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:34:17,822 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:34:18,317 INFO L272 TraceCheckUtils]: 0: Hoare triple {2282#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2282#true} is VALID [2022-04-07 17:34:18,318 INFO L290 TraceCheckUtils]: 1: Hoare triple {2282#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2282#true} is VALID [2022-04-07 17:34:18,318 INFO L290 TraceCheckUtils]: 2: Hoare triple {2282#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2282#true} is VALID [2022-04-07 17:34:18,318 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2282#true} {2282#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2282#true} is VALID [2022-04-07 17:34:18,318 INFO L272 TraceCheckUtils]: 4: Hoare triple {2282#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2282#true} is VALID [2022-04-07 17:34:18,319 INFO L290 TraceCheckUtils]: 5: Hoare triple {2282#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2313#(= main_~n~0 main_~x~0)} is VALID [2022-04-07 17:34:18,319 INFO L290 TraceCheckUtils]: 6: Hoare triple {2313#(= main_~n~0 main_~x~0)} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2317#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-07 17:34:18,320 INFO L290 TraceCheckUtils]: 7: Hoare triple {2317#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {2317#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-07 17:34:18,320 INFO L290 TraceCheckUtils]: 8: Hoare triple {2317#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {2317#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-07 17:34:18,321 INFO L290 TraceCheckUtils]: 9: Hoare triple {2317#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [112] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_5 4294967296))) (or (and (= v_main_~y~0_4 v_main_~y~0_5) (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= |v_main_#t~post9_3| |v_main_#t~post9_1|) (<= .cse0 0)) (and (= v_main_~y~0_4 (+ v_main_~y~0_5 v_main_~z~0_3 (* (- 1) v_main_~z~0_2))) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= (+ v_main_~z~0_3 v_it_3 1) v_main_~z~0_2)) (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_5 (* v_it_3 4294967295)) 4294967296)))) (< v_main_~z~0_3 v_main_~z~0_2)))) InVars {main_~y~0=v_main_~y~0_5, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2317#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-07 17:34:18,321 INFO L290 TraceCheckUtils]: 10: Hoare triple {2317#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2317#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-07 17:34:18,322 INFO L290 TraceCheckUtils]: 11: Hoare triple {2317#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [115] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (= v_main_~y~0_10 (+ (* (- 1) v_main_~x~0_6) v_main_~y~0_11 v_main_~x~0_7)) (< v_main_~x~0_6 v_main_~x~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_11 v_main_~y~0_10) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_11, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_10, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {2317#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-07 17:34:18,322 INFO L290 TraceCheckUtils]: 12: Hoare triple {2317#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2336#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:34:18,323 INFO L290 TraceCheckUtils]: 13: Hoare triple {2336#(not (< 0 (mod main_~n~0 4294967296)))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {2340#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:34:18,323 INFO L290 TraceCheckUtils]: 14: Hoare triple {2340#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {2340#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:34:18,324 INFO L272 TraceCheckUtils]: 15: Hoare triple {2340#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {2347#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:34:18,324 INFO L290 TraceCheckUtils]: 16: Hoare triple {2347#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2351#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:34:18,324 INFO L290 TraceCheckUtils]: 17: Hoare triple {2351#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2283#false} is VALID [2022-04-07 17:34:18,325 INFO L290 TraceCheckUtils]: 18: Hoare triple {2283#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2283#false} is VALID [2022-04-07 17:34:18,325 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-07 17:34:18,325 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-07 17:34:18,325 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1062964810] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 17:34:18,325 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-07 17:34:18,325 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [10] total 16 [2022-04-07 17:34:18,325 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2054205792] [2022-04-07 17:34:18,325 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 17:34:18,326 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 1.875) internal successors, (15), 7 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-07 17:34:18,327 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:34:18,327 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 8 states, 8 states have (on average 1.875) internal successors, (15), 7 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:34:18,343 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 19 edges. 19 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:34:18,343 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-04-07 17:34:18,343 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:34:18,343 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-04-07 17:34:18,344 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=54, Invalid=186, Unknown=0, NotChecked=0, Total=240 [2022-04-07 17:34:18,344 INFO L87 Difference]: Start difference. First operand 37 states and 57 transitions. Second operand has 8 states, 8 states have (on average 1.875) internal successors, (15), 7 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:34:18,436 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:34:18,436 INFO L93 Difference]: Finished difference Result 46 states and 70 transitions. [2022-04-07 17:34:18,437 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-04-07 17:34:18,437 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 1.875) internal successors, (15), 7 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-07 17:34:18,437 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:34:18,437 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 1.875) internal successors, (15), 7 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:34:18,438 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 45 transitions. [2022-04-07 17:34:18,438 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 1.875) internal successors, (15), 7 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:34:18,439 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 45 transitions. [2022-04-07 17:34:18,439 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 7 states and 45 transitions. [2022-04-07 17:34:18,480 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 45 edges. 45 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:34:18,480 INFO L225 Difference]: With dead ends: 46 [2022-04-07 17:34:18,480 INFO L226 Difference]: Without dead ends: 43 [2022-04-07 17:34:18,481 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 15 SyntacticMatches, 1 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 69 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=68, Invalid=238, Unknown=0, NotChecked=0, Total=306 [2022-04-07 17:34:18,481 INFO L913 BasicCegarLoop]: 13 mSDtfsCounter, 20 mSDsluCounter, 50 mSDsCounter, 0 mSdLazyCounter, 25 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 20 SdHoareTripleChecker+Valid, 63 SdHoareTripleChecker+Invalid, 33 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 25 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 6 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 17:34:18,481 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [20 Valid, 63 Invalid, 33 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 25 Invalid, 0 Unknown, 6 Unchecked, 0.0s Time] [2022-04-07 17:34:18,482 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43 states. [2022-04-07 17:34:18,483 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43 to 35. [2022-04-07 17:34:18,484 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:34:18,484 INFO L82 GeneralOperation]: Start isEquivalent. First operand 43 states. Second operand has 35 states, 30 states have (on average 1.6333333333333333) internal successors, (49), 30 states have internal predecessors, (49), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:34:18,485 INFO L74 IsIncluded]: Start isIncluded. First operand 43 states. Second operand has 35 states, 30 states have (on average 1.6333333333333333) internal successors, (49), 30 states have internal predecessors, (49), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:34:18,485 INFO L87 Difference]: Start difference. First operand 43 states. Second operand has 35 states, 30 states have (on average 1.6333333333333333) internal successors, (49), 30 states have internal predecessors, (49), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:34:18,486 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:34:18,486 INFO L93 Difference]: Finished difference Result 43 states and 67 transitions. [2022-04-07 17:34:18,486 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 67 transitions. [2022-04-07 17:34:18,486 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:34:18,487 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:34:18,487 INFO L74 IsIncluded]: Start isIncluded. First operand has 35 states, 30 states have (on average 1.6333333333333333) internal successors, (49), 30 states have internal predecessors, (49), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 43 states. [2022-04-07 17:34:18,487 INFO L87 Difference]: Start difference. First operand has 35 states, 30 states have (on average 1.6333333333333333) internal successors, (49), 30 states have internal predecessors, (49), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 43 states. [2022-04-07 17:34:18,488 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:34:18,488 INFO L93 Difference]: Finished difference Result 43 states and 67 transitions. [2022-04-07 17:34:18,488 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 67 transitions. [2022-04-07 17:34:18,488 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:34:18,488 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:34:18,489 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:34:18,489 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:34:18,489 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 35 states, 30 states have (on average 1.6333333333333333) internal successors, (49), 30 states have internal predecessors, (49), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:34:18,490 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35 states to 35 states and 53 transitions. [2022-04-07 17:34:18,490 INFO L78 Accepts]: Start accepts. Automaton has 35 states and 53 transitions. Word has length 19 [2022-04-07 17:34:18,490 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:34:18,490 INFO L478 AbstractCegarLoop]: Abstraction has 35 states and 53 transitions. [2022-04-07 17:34:18,490 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 1.875) internal successors, (15), 7 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:34:18,490 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 53 transitions. [2022-04-07 17:34:18,490 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-07 17:34:18,490 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:34:18,491 INFO L499 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:34:18,510 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2022-04-07 17:34:18,699 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10,10 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:34:18,700 INFO L403 AbstractCegarLoop]: === Iteration 12 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:34:18,700 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:34:18,700 INFO L85 PathProgramCache]: Analyzing trace with hash 353225841, now seen corresponding path program 2 times [2022-04-07 17:34:18,700 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:34:18,700 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [718051824] [2022-04-07 17:34:18,700 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:34:18,700 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:34:18,709 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_6.0))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-07 17:34:18,710 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_6.1))) (+ main_~y~0_12 .cse0 (* (- 4294967296) (div (+ main_~y~0_12 .cse0) 4294967296)))) 0)) [2022-04-07 17:34:18,715 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:34:18,725 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_6.3))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-07 17:34:18,727 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_6.4))) (+ main_~y~0_12 .cse0 (* (- 4294967296) (div (+ main_~y~0_12 .cse0) 4294967296)))) 0)) [2022-04-07 17:34:18,867 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:34:18,869 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:34:18,876 INFO L290 TraceCheckUtils]: 0: Hoare triple {2540#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2528#true} is VALID [2022-04-07 17:34:18,877 INFO L290 TraceCheckUtils]: 1: Hoare triple {2528#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2528#true} is VALID [2022-04-07 17:34:18,877 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2528#true} {2528#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2528#true} is VALID [2022-04-07 17:34:18,877 INFO L272 TraceCheckUtils]: 0: Hoare triple {2528#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2540#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:34:18,878 INFO L290 TraceCheckUtils]: 1: Hoare triple {2540#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2528#true} is VALID [2022-04-07 17:34:18,878 INFO L290 TraceCheckUtils]: 2: Hoare triple {2528#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2528#true} is VALID [2022-04-07 17:34:18,878 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2528#true} {2528#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2528#true} is VALID [2022-04-07 17:34:18,878 INFO L272 TraceCheckUtils]: 4: Hoare triple {2528#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2528#true} is VALID [2022-04-07 17:34:18,879 INFO L290 TraceCheckUtils]: 5: Hoare triple {2528#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2533#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 17:34:18,879 INFO L290 TraceCheckUtils]: 6: Hoare triple {2533#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2534#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:34:18,880 INFO L290 TraceCheckUtils]: 7: Hoare triple {2534#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {2535#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:34:18,880 INFO L290 TraceCheckUtils]: 8: Hoare triple {2535#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {2535#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:34:18,881 INFO L290 TraceCheckUtils]: 9: Hoare triple {2535#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2535#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:34:18,882 INFO L290 TraceCheckUtils]: 10: Hoare triple {2535#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2536#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} is VALID [2022-04-07 17:34:18,883 INFO L290 TraceCheckUtils]: 11: Hoare triple {2536#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {2536#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} is VALID [2022-04-07 17:34:18,886 INFO L290 TraceCheckUtils]: 12: Hoare triple {2536#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {2536#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} is VALID [2022-04-07 17:34:18,887 INFO L290 TraceCheckUtils]: 13: Hoare triple {2536#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {2537#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:34:18,888 INFO L290 TraceCheckUtils]: 14: Hoare triple {2537#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {2537#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:34:18,889 INFO L272 TraceCheckUtils]: 15: Hoare triple {2537#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {2538#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:34:18,889 INFO L290 TraceCheckUtils]: 16: Hoare triple {2538#(not (= |__VERIFIER_assert_#in~cond| 0))} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2539#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:34:18,890 INFO L290 TraceCheckUtils]: 17: Hoare triple {2539#(not (= __VERIFIER_assert_~cond 0))} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2529#false} is VALID [2022-04-07 17:34:18,890 INFO L290 TraceCheckUtils]: 18: Hoare triple {2529#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2529#false} is VALID [2022-04-07 17:34:18,890 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 17:34:18,890 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:34:18,890 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [718051824] [2022-04-07 17:34:18,890 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [718051824] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:34:18,890 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [743695127] [2022-04-07 17:34:18,890 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-07 17:34:18,891 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:34:18,891 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:34:18,896 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:34:18,918 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2022-04-07 17:34:18,936 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-07 17:34:18,937 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 17:34:18,937 INFO L263 TraceCheckSpWp]: Trace formula consists of 64 conjuncts, 13 conjunts are in the unsatisfiable core [2022-04-07 17:34:18,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:34:18,948 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:34:19,271 INFO L272 TraceCheckUtils]: 0: Hoare triple {2528#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2528#true} is VALID [2022-04-07 17:34:19,272 INFO L290 TraceCheckUtils]: 1: Hoare triple {2528#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2528#true} is VALID [2022-04-07 17:34:19,272 INFO L290 TraceCheckUtils]: 2: Hoare triple {2528#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2528#true} is VALID [2022-04-07 17:34:19,272 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2528#true} {2528#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2528#true} is VALID [2022-04-07 17:34:19,272 INFO L272 TraceCheckUtils]: 4: Hoare triple {2528#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2528#true} is VALID [2022-04-07 17:34:19,272 INFO L290 TraceCheckUtils]: 5: Hoare triple {2528#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2533#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 17:34:19,273 INFO L290 TraceCheckUtils]: 6: Hoare triple {2533#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2562#(and (not (< 0 (mod main_~n~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:34:19,273 INFO L290 TraceCheckUtils]: 7: Hoare triple {2562#(and (not (< 0 (mod main_~n~0 4294967296))) (= main_~y~0 0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {2536#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} is VALID [2022-04-07 17:34:19,274 INFO L290 TraceCheckUtils]: 8: Hoare triple {2536#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {2536#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} is VALID [2022-04-07 17:34:19,274 INFO L290 TraceCheckUtils]: 9: Hoare triple {2536#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2536#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} is VALID [2022-04-07 17:34:19,275 INFO L290 TraceCheckUtils]: 10: Hoare triple {2536#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2536#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} is VALID [2022-04-07 17:34:19,275 INFO L290 TraceCheckUtils]: 11: Hoare triple {2536#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {2536#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} is VALID [2022-04-07 17:34:19,276 INFO L290 TraceCheckUtils]: 12: Hoare triple {2536#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {2536#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} is VALID [2022-04-07 17:34:19,277 INFO L290 TraceCheckUtils]: 13: Hoare triple {2536#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {2537#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:34:19,277 INFO L290 TraceCheckUtils]: 14: Hoare triple {2537#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {2537#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:34:19,278 INFO L272 TraceCheckUtils]: 15: Hoare triple {2537#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {2590#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:34:19,278 INFO L290 TraceCheckUtils]: 16: Hoare triple {2590#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2594#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:34:19,279 INFO L290 TraceCheckUtils]: 17: Hoare triple {2594#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2529#false} is VALID [2022-04-07 17:34:19,279 INFO L290 TraceCheckUtils]: 18: Hoare triple {2529#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2529#false} is VALID [2022-04-07 17:34:19,279 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 17:34:19,279 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 17:34:55,703 INFO L290 TraceCheckUtils]: 18: Hoare triple {2529#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2529#false} is VALID [2022-04-07 17:34:55,704 INFO L290 TraceCheckUtils]: 17: Hoare triple {2594#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2529#false} is VALID [2022-04-07 17:34:55,704 INFO L290 TraceCheckUtils]: 16: Hoare triple {2590#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2594#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:34:55,705 INFO L272 TraceCheckUtils]: 15: Hoare triple {2610#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {2590#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:34:55,705 INFO L290 TraceCheckUtils]: 14: Hoare triple {2610#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {2610#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} is VALID [2022-04-07 17:34:57,715 WARN L290 TraceCheckUtils]: 13: Hoare triple {2617#(forall ((aux_mod_v_main_~z~0_40_31 Int)) (or (and (or (forall ((aux_div_v_main_~z~0_40_31 Int)) (not (= (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31)) main_~z~0))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_40_31 Int)) (or (not (< main_~z~0 (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31)))) (exists ((v_it_6 Int)) (and (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31))) (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))))))) (>= aux_mod_v_main_~z~0_40_31 4294967296) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_40_31) (> 0 aux_mod_v_main_~z~0_40_31)))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {2610#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} is UNKNOWN [2022-04-07 17:34:59,731 WARN L290 TraceCheckUtils]: 12: Hoare triple {2621#(forall ((aux_mod_v_main_~z~0_40_31 Int)) (or (>= aux_mod_v_main_~z~0_40_31 4294967296) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_40_31) (and (or (forall ((aux_div_v_main_~z~0_40_31 Int)) (not (= (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31)) main_~z~0))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (and (forall ((aux_mod_v_main_~y~0_40_31 Int) (aux_div_v_main_~z~0_40_31 Int) (aux_div_v_main_~y~0_40_31 Int)) (or (<= (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31) aux_mod_v_main_~y~0_40_31) (+ main_~z~0 main_~y~0)) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ (* aux_div_v_main_~y~0_40_31 4294967296) v_it_6 aux_mod_v_main_~y~0_40_31 1) main_~y~0) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (<= main_~y~0 (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~y~0_40_31)) (<= aux_mod_v_main_~y~0_40_31 0) (<= 4294967296 aux_mod_v_main_~y~0_40_31) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 main_~y~0 1) (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31) aux_mod_v_main_~y~0_40_31)) (not (< 0 (mod (+ aux_mod_v_main_~y~0_40_31 (* v_it_6 4294967295)) 4294967296))))))) (or (forall ((aux_div_v_main_~z~0_40_31 Int)) (or (not (< main_~z~0 (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31)))) (exists ((v_it_6 Int)) (and (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31))) (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))))) (< 0 (mod (+ (* aux_mod_v_main_~z~0_40_31 4294967295) main_~z~0 main_~y~0) 4294967296)))))) (> 0 aux_mod_v_main_~z~0_40_31)))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {2617#(forall ((aux_mod_v_main_~z~0_40_31 Int)) (or (and (or (forall ((aux_div_v_main_~z~0_40_31 Int)) (not (= (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31)) main_~z~0))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_40_31 Int)) (or (not (< main_~z~0 (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31)))) (exists ((v_it_6 Int)) (and (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31))) (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))))))) (>= aux_mod_v_main_~z~0_40_31 4294967296) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_40_31) (> 0 aux_mod_v_main_~z~0_40_31)))} is UNKNOWN [2022-04-07 17:35:01,770 WARN L290 TraceCheckUtils]: 11: Hoare triple {2621#(forall ((aux_mod_v_main_~z~0_40_31 Int)) (or (>= aux_mod_v_main_~z~0_40_31 4294967296) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_40_31) (and (or (forall ((aux_div_v_main_~z~0_40_31 Int)) (not (= (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31)) main_~z~0))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (and (forall ((aux_mod_v_main_~y~0_40_31 Int) (aux_div_v_main_~z~0_40_31 Int) (aux_div_v_main_~y~0_40_31 Int)) (or (<= (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31) aux_mod_v_main_~y~0_40_31) (+ main_~z~0 main_~y~0)) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ (* aux_div_v_main_~y~0_40_31 4294967296) v_it_6 aux_mod_v_main_~y~0_40_31 1) main_~y~0) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (<= main_~y~0 (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~y~0_40_31)) (<= aux_mod_v_main_~y~0_40_31 0) (<= 4294967296 aux_mod_v_main_~y~0_40_31) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 main_~y~0 1) (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31) aux_mod_v_main_~y~0_40_31)) (not (< 0 (mod (+ aux_mod_v_main_~y~0_40_31 (* v_it_6 4294967295)) 4294967296))))))) (or (forall ((aux_div_v_main_~z~0_40_31 Int)) (or (not (< main_~z~0 (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31)))) (exists ((v_it_6 Int)) (and (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31))) (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))))) (< 0 (mod (+ (* aux_mod_v_main_~z~0_40_31 4294967295) main_~z~0 main_~y~0) 4294967296)))))) (> 0 aux_mod_v_main_~z~0_40_31)))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {2621#(forall ((aux_mod_v_main_~z~0_40_31 Int)) (or (>= aux_mod_v_main_~z~0_40_31 4294967296) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_40_31) (and (or (forall ((aux_div_v_main_~z~0_40_31 Int)) (not (= (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31)) main_~z~0))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (and (forall ((aux_mod_v_main_~y~0_40_31 Int) (aux_div_v_main_~z~0_40_31 Int) (aux_div_v_main_~y~0_40_31 Int)) (or (<= (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31) aux_mod_v_main_~y~0_40_31) (+ main_~z~0 main_~y~0)) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ (* aux_div_v_main_~y~0_40_31 4294967296) v_it_6 aux_mod_v_main_~y~0_40_31 1) main_~y~0) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (<= main_~y~0 (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~y~0_40_31)) (<= aux_mod_v_main_~y~0_40_31 0) (<= 4294967296 aux_mod_v_main_~y~0_40_31) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 main_~y~0 1) (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31) aux_mod_v_main_~y~0_40_31)) (not (< 0 (mod (+ aux_mod_v_main_~y~0_40_31 (* v_it_6 4294967295)) 4294967296))))))) (or (forall ((aux_div_v_main_~z~0_40_31 Int)) (or (not (< main_~z~0 (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31)))) (exists ((v_it_6 Int)) (and (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31))) (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))))) (< 0 (mod (+ (* aux_mod_v_main_~z~0_40_31 4294967295) main_~z~0 main_~y~0) 4294967296)))))) (> 0 aux_mod_v_main_~z~0_40_31)))} is UNKNOWN [2022-04-07 17:35:03,796 WARN L290 TraceCheckUtils]: 10: Hoare triple {2621#(forall ((aux_mod_v_main_~z~0_40_31 Int)) (or (>= aux_mod_v_main_~z~0_40_31 4294967296) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_40_31) (and (or (forall ((aux_div_v_main_~z~0_40_31 Int)) (not (= (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31)) main_~z~0))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (and (forall ((aux_mod_v_main_~y~0_40_31 Int) (aux_div_v_main_~z~0_40_31 Int) (aux_div_v_main_~y~0_40_31 Int)) (or (<= (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31) aux_mod_v_main_~y~0_40_31) (+ main_~z~0 main_~y~0)) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ (* aux_div_v_main_~y~0_40_31 4294967296) v_it_6 aux_mod_v_main_~y~0_40_31 1) main_~y~0) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (<= main_~y~0 (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~y~0_40_31)) (<= aux_mod_v_main_~y~0_40_31 0) (<= 4294967296 aux_mod_v_main_~y~0_40_31) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 main_~y~0 1) (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31) aux_mod_v_main_~y~0_40_31)) (not (< 0 (mod (+ aux_mod_v_main_~y~0_40_31 (* v_it_6 4294967295)) 4294967296))))))) (or (forall ((aux_div_v_main_~z~0_40_31 Int)) (or (not (< main_~z~0 (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31)))) (exists ((v_it_6 Int)) (and (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31))) (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))))) (< 0 (mod (+ (* aux_mod_v_main_~z~0_40_31 4294967295) main_~z~0 main_~y~0) 4294967296)))))) (> 0 aux_mod_v_main_~z~0_40_31)))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2621#(forall ((aux_mod_v_main_~z~0_40_31 Int)) (or (>= aux_mod_v_main_~z~0_40_31 4294967296) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_40_31) (and (or (forall ((aux_div_v_main_~z~0_40_31 Int)) (not (= (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31)) main_~z~0))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (and (forall ((aux_mod_v_main_~y~0_40_31 Int) (aux_div_v_main_~z~0_40_31 Int) (aux_div_v_main_~y~0_40_31 Int)) (or (<= (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31) aux_mod_v_main_~y~0_40_31) (+ main_~z~0 main_~y~0)) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ (* aux_div_v_main_~y~0_40_31 4294967296) v_it_6 aux_mod_v_main_~y~0_40_31 1) main_~y~0) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (<= main_~y~0 (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~y~0_40_31)) (<= aux_mod_v_main_~y~0_40_31 0) (<= 4294967296 aux_mod_v_main_~y~0_40_31) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 main_~y~0 1) (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31) aux_mod_v_main_~y~0_40_31)) (not (< 0 (mod (+ aux_mod_v_main_~y~0_40_31 (* v_it_6 4294967295)) 4294967296))))))) (or (forall ((aux_div_v_main_~z~0_40_31 Int)) (or (not (< main_~z~0 (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31)))) (exists ((v_it_6 Int)) (and (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31))) (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))))) (< 0 (mod (+ (* aux_mod_v_main_~z~0_40_31 4294967295) main_~z~0 main_~y~0) 4294967296)))))) (> 0 aux_mod_v_main_~z~0_40_31)))} is UNKNOWN [2022-04-07 17:35:03,804 INFO L290 TraceCheckUtils]: 9: Hoare triple {2631#(or (and (<= (div (+ (- 1) (* (- 1) main_~z~0)) (- 4294967296)) (div (+ (- 1) (mod main_~n~0 4294967296) (* (- 1) main_~z~0)) (- 4294967296))) (<= (div (+ (mod main_~n~0 4294967296) (* (- 1) main_~z~0)) (- 4294967296)) (+ (div (+ main_~z~0 (- 4294967296)) 4294967296) 1))) (< 0 (mod main_~y~0 4294967296)))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2621#(forall ((aux_mod_v_main_~z~0_40_31 Int)) (or (>= aux_mod_v_main_~z~0_40_31 4294967296) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_40_31) (and (or (forall ((aux_div_v_main_~z~0_40_31 Int)) (not (= (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31)) main_~z~0))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (and (forall ((aux_mod_v_main_~y~0_40_31 Int) (aux_div_v_main_~z~0_40_31 Int) (aux_div_v_main_~y~0_40_31 Int)) (or (<= (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31) aux_mod_v_main_~y~0_40_31) (+ main_~z~0 main_~y~0)) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ (* aux_div_v_main_~y~0_40_31 4294967296) v_it_6 aux_mod_v_main_~y~0_40_31 1) main_~y~0) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (<= main_~y~0 (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~y~0_40_31)) (<= aux_mod_v_main_~y~0_40_31 0) (<= 4294967296 aux_mod_v_main_~y~0_40_31) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 main_~y~0 1) (+ (* aux_div_v_main_~y~0_40_31 4294967296) aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31) aux_mod_v_main_~y~0_40_31)) (not (< 0 (mod (+ aux_mod_v_main_~y~0_40_31 (* v_it_6 4294967295)) 4294967296))))))) (or (forall ((aux_div_v_main_~z~0_40_31 Int)) (or (not (< main_~z~0 (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31)))) (exists ((v_it_6 Int)) (and (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_40_31 (* 4294967296 aux_div_v_main_~z~0_40_31))) (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))))) (< 0 (mod (+ (* aux_mod_v_main_~z~0_40_31 4294967295) main_~z~0 main_~y~0) 4294967296)))))) (> 0 aux_mod_v_main_~z~0_40_31)))} is VALID [2022-04-07 17:35:03,805 INFO L290 TraceCheckUtils]: 8: Hoare triple {2631#(or (and (<= (div (+ (- 1) (* (- 1) main_~z~0)) (- 4294967296)) (div (+ (- 1) (mod main_~n~0 4294967296) (* (- 1) main_~z~0)) (- 4294967296))) (<= (div (+ (mod main_~n~0 4294967296) (* (- 1) main_~z~0)) (- 4294967296)) (+ (div (+ main_~z~0 (- 4294967296)) 4294967296) 1))) (< 0 (mod main_~y~0 4294967296)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {2631#(or (and (<= (div (+ (- 1) (* (- 1) main_~z~0)) (- 4294967296)) (div (+ (- 1) (mod main_~n~0 4294967296) (* (- 1) main_~z~0)) (- 4294967296))) (<= (div (+ (mod main_~n~0 4294967296) (* (- 1) main_~z~0)) (- 4294967296)) (+ (div (+ main_~z~0 (- 4294967296)) 4294967296) 1))) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-07 17:35:03,810 INFO L290 TraceCheckUtils]: 7: Hoare triple {2638#(or (<= (div (+ (- 1) (* (- 1) main_~y~0)) (- 4294967296)) (div (+ (- 1) (mod main_~n~0 4294967296) (* (- 1) main_~y~0)) (- 4294967296))) (< 0 (mod main_~y~0 4294967296)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {2631#(or (and (<= (div (+ (- 1) (* (- 1) main_~z~0)) (- 4294967296)) (div (+ (- 1) (mod main_~n~0 4294967296) (* (- 1) main_~z~0)) (- 4294967296))) (<= (div (+ (mod main_~n~0 4294967296) (* (- 1) main_~z~0)) (- 4294967296)) (+ (div (+ main_~z~0 (- 4294967296)) 4294967296) 1))) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-07 17:35:03,830 INFO L290 TraceCheckUtils]: 6: Hoare triple {2642#(or (< 0 (mod main_~x~0 4294967296)) (<= (div (+ (- 1) (* (- 1) main_~y~0)) (- 4294967296)) (div (+ (- 1) (mod main_~n~0 4294967296) (* (- 1) main_~y~0)) (- 4294967296))) (< 0 (mod main_~y~0 4294967296)))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2638#(or (<= (div (+ (- 1) (* (- 1) main_~y~0)) (- 4294967296)) (div (+ (- 1) (mod main_~n~0 4294967296) (* (- 1) main_~y~0)) (- 4294967296))) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-07 17:35:03,831 INFO L290 TraceCheckUtils]: 5: Hoare triple {2528#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2642#(or (< 0 (mod main_~x~0 4294967296)) (<= (div (+ (- 1) (* (- 1) main_~y~0)) (- 4294967296)) (div (+ (- 1) (mod main_~n~0 4294967296) (* (- 1) main_~y~0)) (- 4294967296))) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-07 17:35:03,831 INFO L272 TraceCheckUtils]: 4: Hoare triple {2528#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2528#true} is VALID [2022-04-07 17:35:03,831 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2528#true} {2528#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2528#true} is VALID [2022-04-07 17:35:03,831 INFO L290 TraceCheckUtils]: 2: Hoare triple {2528#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2528#true} is VALID [2022-04-07 17:35:03,831 INFO L290 TraceCheckUtils]: 1: Hoare triple {2528#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2528#true} is VALID [2022-04-07 17:35:03,832 INFO L272 TraceCheckUtils]: 0: Hoare triple {2528#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2528#true} is VALID [2022-04-07 17:35:03,832 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 2 refuted. 1 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:35:03,832 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [743695127] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 17:35:03,832 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 17:35:03,832 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 8, 10] total 19 [2022-04-07 17:35:03,832 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [453291716] [2022-04-07 17:35:03,832 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 17:35:03,833 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 1.736842105263158) internal successors, (33), 16 states have internal predecessors, (33), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-07 17:35:03,833 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:35:03,833 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 19 states, 19 states have (on average 1.736842105263158) internal successors, (33), 16 states have internal predecessors, (33), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:35:11,987 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 40 edges. 36 inductive. 0 not inductive. 4 times theorem prover too weak to decide inductivity. [2022-04-07 17:35:11,987 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2022-04-07 17:35:11,987 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:35:11,987 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2022-04-07 17:35:11,988 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=71, Invalid=260, Unknown=11, NotChecked=0, Total=342 [2022-04-07 17:35:11,988 INFO L87 Difference]: Start difference. First operand 35 states and 53 transitions. Second operand has 19 states, 19 states have (on average 1.736842105263158) internal successors, (33), 16 states have internal predecessors, (33), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:35:16,437 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:35:16,437 INFO L93 Difference]: Finished difference Result 50 states and 76 transitions. [2022-04-07 17:35:16,437 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-04-07 17:35:16,437 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 1.736842105263158) internal successors, (33), 16 states have internal predecessors, (33), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-07 17:35:16,437 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:35:16,438 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.736842105263158) internal successors, (33), 16 states have internal predecessors, (33), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:35:16,441 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 50 transitions. [2022-04-07 17:35:16,441 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.736842105263158) internal successors, (33), 16 states have internal predecessors, (33), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:35:16,442 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 50 transitions. [2022-04-07 17:35:16,442 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 10 states and 50 transitions. [2022-04-07 17:35:16,500 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 50 edges. 50 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:35:16,501 INFO L225 Difference]: With dead ends: 50 [2022-04-07 17:35:16,501 INFO L226 Difference]: Without dead ends: 44 [2022-04-07 17:35:16,501 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 57 GetRequests, 30 SyntacticMatches, 4 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 107 ImplicationChecksByTransitivity, 27.1s TimeCoverageRelationStatistics Valid=128, Invalid=459, Unknown=13, NotChecked=0, Total=600 [2022-04-07 17:35:16,502 INFO L913 BasicCegarLoop]: 10 mSDtfsCounter, 46 mSDsluCounter, 65 mSDsCounter, 0 mSdLazyCounter, 129 mSolverCounterSat, 11 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 46 SdHoareTripleChecker+Valid, 75 SdHoareTripleChecker+Invalid, 176 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 11 IncrementalHoareTripleChecker+Valid, 129 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 36 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 17:35:16,502 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [46 Valid, 75 Invalid, 176 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [11 Valid, 129 Invalid, 0 Unknown, 36 Unchecked, 0.1s Time] [2022-04-07 17:35:16,502 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states. [2022-04-07 17:35:16,504 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 38. [2022-04-07 17:35:16,504 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:35:16,504 INFO L82 GeneralOperation]: Start isEquivalent. First operand 44 states. Second operand has 38 states, 33 states have (on average 1.6363636363636365) internal successors, (54), 33 states have internal predecessors, (54), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:35:16,505 INFO L74 IsIncluded]: Start isIncluded. First operand 44 states. Second operand has 38 states, 33 states have (on average 1.6363636363636365) internal successors, (54), 33 states have internal predecessors, (54), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:35:16,505 INFO L87 Difference]: Start difference. First operand 44 states. Second operand has 38 states, 33 states have (on average 1.6363636363636365) internal successors, (54), 33 states have internal predecessors, (54), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:35:16,506 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:35:16,506 INFO L93 Difference]: Finished difference Result 44 states and 69 transitions. [2022-04-07 17:35:16,506 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 69 transitions. [2022-04-07 17:35:16,506 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:35:16,506 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:35:16,506 INFO L74 IsIncluded]: Start isIncluded. First operand has 38 states, 33 states have (on average 1.6363636363636365) internal successors, (54), 33 states have internal predecessors, (54), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 44 states. [2022-04-07 17:35:16,506 INFO L87 Difference]: Start difference. First operand has 38 states, 33 states have (on average 1.6363636363636365) internal successors, (54), 33 states have internal predecessors, (54), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 44 states. [2022-04-07 17:35:16,507 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:35:16,507 INFO L93 Difference]: Finished difference Result 44 states and 69 transitions. [2022-04-07 17:35:16,507 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 69 transitions. [2022-04-07 17:35:16,508 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:35:16,508 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:35:16,508 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:35:16,508 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:35:16,508 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 38 states, 33 states have (on average 1.6363636363636365) internal successors, (54), 33 states have internal predecessors, (54), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:35:16,512 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 58 transitions. [2022-04-07 17:35:16,512 INFO L78 Accepts]: Start accepts. Automaton has 38 states and 58 transitions. Word has length 19 [2022-04-07 17:35:16,513 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:35:16,513 INFO L478 AbstractCegarLoop]: Abstraction has 38 states and 58 transitions. [2022-04-07 17:35:16,517 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 19 states, 19 states have (on average 1.736842105263158) internal successors, (33), 16 states have internal predecessors, (33), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:35:16,517 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 58 transitions. [2022-04-07 17:35:16,517 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-07 17:35:16,517 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:35:16,518 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:35:16,545 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Forceful destruction successful, exit code 0 [2022-04-07 17:35:16,739 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable11 [2022-04-07 17:35:16,740 INFO L403 AbstractCegarLoop]: === Iteration 13 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:35:16,740 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:35:16,740 INFO L85 PathProgramCache]: Analyzing trace with hash -1453978548, now seen corresponding path program 1 times [2022-04-07 17:35:16,740 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:35:16,740 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1211488715] [2022-04-07 17:35:16,740 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:35:16,740 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:35:16,749 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.0))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-07 17:35:16,750 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_6.1))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-07 17:35:16,759 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:35:16,776 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.3))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-07 17:35:16,780 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_6.4))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-07 17:35:16,989 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:35:16,990 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:35:16,996 INFO L290 TraceCheckUtils]: 0: Hoare triple {2865#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2852#true} is VALID [2022-04-07 17:35:16,997 INFO L290 TraceCheckUtils]: 1: Hoare triple {2852#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2852#true} is VALID [2022-04-07 17:35:16,997 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2852#true} {2852#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2852#true} is VALID [2022-04-07 17:35:16,997 INFO L272 TraceCheckUtils]: 0: Hoare triple {2852#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2865#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:35:16,998 INFO L290 TraceCheckUtils]: 1: Hoare triple {2865#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2852#true} is VALID [2022-04-07 17:35:16,998 INFO L290 TraceCheckUtils]: 2: Hoare triple {2852#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2852#true} is VALID [2022-04-07 17:35:16,998 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2852#true} {2852#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2852#true} is VALID [2022-04-07 17:35:16,998 INFO L272 TraceCheckUtils]: 4: Hoare triple {2852#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2852#true} is VALID [2022-04-07 17:35:16,998 INFO L290 TraceCheckUtils]: 5: Hoare triple {2852#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2857#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 17:35:16,999 INFO L290 TraceCheckUtils]: 6: Hoare triple {2857#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2858#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:35:17,000 INFO L290 TraceCheckUtils]: 7: Hoare triple {2858#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {2859#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 17:35:17,000 INFO L290 TraceCheckUtils]: 8: Hoare triple {2859#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {2859#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 17:35:17,001 INFO L290 TraceCheckUtils]: 9: Hoare triple {2859#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2860#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 17:35:17,001 INFO L290 TraceCheckUtils]: 10: Hoare triple {2860#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2860#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 17:35:17,002 INFO L290 TraceCheckUtils]: 11: Hoare triple {2860#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [118] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_13 4294967296))) (or (and (= v_main_~z~0_12 (+ v_main_~x~0_11 v_main_~z~0_13 (* (- 1) v_main_~x~0_10))) (< v_main_~x~0_11 v_main_~x~0_10) (forall ((v_it_5 Int)) (or (< 0 (mod (+ v_main_~z~0_13 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)) (not (<= (+ v_main_~x~0_11 v_it_5 1) v_main_~x~0_10)))) (< 0 .cse0)) (and (= v_main_~x~0_11 v_main_~x~0_10) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (<= .cse0 0) (= v_main_~z~0_13 v_main_~z~0_12) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_13, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_12, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {2861#(and (<= main_~z~0 0) (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= 0 main_~z~0))} is VALID [2022-04-07 17:35:17,003 INFO L290 TraceCheckUtils]: 12: Hoare triple {2861#(and (<= main_~z~0 0) (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= 0 main_~z~0))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {2861#(and (<= main_~z~0 0) (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= 0 main_~z~0))} is VALID [2022-04-07 17:35:17,005 INFO L290 TraceCheckUtils]: 13: Hoare triple {2861#(and (<= main_~z~0 0) (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= 0 main_~z~0))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {2862#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))) (<= 0 main_~z~0))} is VALID [2022-04-07 17:35:17,005 INFO L290 TraceCheckUtils]: 14: Hoare triple {2862#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))) (<= 0 main_~z~0))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {2862#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))) (<= 0 main_~z~0))} is VALID [2022-04-07 17:35:17,006 INFO L272 TraceCheckUtils]: 15: Hoare triple {2862#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))) (<= 0 main_~z~0))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {2863#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:35:17,007 INFO L290 TraceCheckUtils]: 16: Hoare triple {2863#(not (= |__VERIFIER_assert_#in~cond| 0))} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2864#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:35:17,007 INFO L290 TraceCheckUtils]: 17: Hoare triple {2864#(not (= __VERIFIER_assert_~cond 0))} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2853#false} is VALID [2022-04-07 17:35:17,007 INFO L290 TraceCheckUtils]: 18: Hoare triple {2853#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2853#false} is VALID [2022-04-07 17:35:17,007 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:35:17,007 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:35:17,007 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1211488715] [2022-04-07 17:35:17,008 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1211488715] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:35:17,008 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1368827292] [2022-04-07 17:35:17,008 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:35:17,008 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:35:17,008 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:35:17,009 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:35:17,010 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2022-04-07 17:35:17,040 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:35:17,041 INFO L263 TraceCheckSpWp]: Trace formula consists of 64 conjuncts, 9 conjunts are in the unsatisfiable core [2022-04-07 17:35:17,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:35:17,055 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:35:17,691 INFO L272 TraceCheckUtils]: 0: Hoare triple {2852#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2852#true} is VALID [2022-04-07 17:35:17,691 INFO L290 TraceCheckUtils]: 1: Hoare triple {2852#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2852#true} is VALID [2022-04-07 17:35:17,692 INFO L290 TraceCheckUtils]: 2: Hoare triple {2852#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2852#true} is VALID [2022-04-07 17:35:17,692 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2852#true} {2852#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2852#true} is VALID [2022-04-07 17:35:17,692 INFO L272 TraceCheckUtils]: 4: Hoare triple {2852#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2852#true} is VALID [2022-04-07 17:35:17,692 INFO L290 TraceCheckUtils]: 5: Hoare triple {2852#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2884#(= main_~n~0 main_~x~0)} is VALID [2022-04-07 17:35:17,692 INFO L290 TraceCheckUtils]: 6: Hoare triple {2884#(= main_~n~0 main_~x~0)} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2888#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:35:17,693 INFO L290 TraceCheckUtils]: 7: Hoare triple {2888#(not (< 0 (mod main_~n~0 4294967296)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {2888#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:35:17,693 INFO L290 TraceCheckUtils]: 8: Hoare triple {2888#(not (< 0 (mod main_~n~0 4294967296)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {2888#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:35:17,693 INFO L290 TraceCheckUtils]: 9: Hoare triple {2888#(not (< 0 (mod main_~n~0 4294967296)))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2898#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:35:17,694 INFO L290 TraceCheckUtils]: 10: Hoare triple {2898#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2898#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:35:17,694 INFO L290 TraceCheckUtils]: 11: Hoare triple {2898#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [118] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_13 4294967296))) (or (and (= v_main_~z~0_12 (+ v_main_~x~0_11 v_main_~z~0_13 (* (- 1) v_main_~x~0_10))) (< v_main_~x~0_11 v_main_~x~0_10) (forall ((v_it_5 Int)) (or (< 0 (mod (+ v_main_~z~0_13 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)) (not (<= (+ v_main_~x~0_11 v_it_5 1) v_main_~x~0_10)))) (< 0 .cse0)) (and (= v_main_~x~0_11 v_main_~x~0_10) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (<= .cse0 0) (= v_main_~z~0_13 v_main_~z~0_12) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_13, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_12, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {2898#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:35:17,694 INFO L290 TraceCheckUtils]: 12: Hoare triple {2898#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {2908#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:35:17,695 INFO L290 TraceCheckUtils]: 13: Hoare triple {2908#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {2912#(and (<= (mod main_~n~0 4294967296) 0) (<= (mod main_~z~0 4294967296) 0))} is VALID [2022-04-07 17:35:17,696 INFO L290 TraceCheckUtils]: 14: Hoare triple {2912#(and (<= (mod main_~n~0 4294967296) 0) (<= (mod main_~z~0 4294967296) 0))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {2912#(and (<= (mod main_~n~0 4294967296) 0) (<= (mod main_~z~0 4294967296) 0))} is VALID [2022-04-07 17:35:17,697 INFO L272 TraceCheckUtils]: 15: Hoare triple {2912#(and (<= (mod main_~n~0 4294967296) 0) (<= (mod main_~z~0 4294967296) 0))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {2919#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:35:17,697 INFO L290 TraceCheckUtils]: 16: Hoare triple {2919#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2923#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:35:17,697 INFO L290 TraceCheckUtils]: 17: Hoare triple {2923#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2853#false} is VALID [2022-04-07 17:35:17,697 INFO L290 TraceCheckUtils]: 18: Hoare triple {2853#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2853#false} is VALID [2022-04-07 17:35:17,698 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 17:35:17,698 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 17:35:37,946 INFO L290 TraceCheckUtils]: 18: Hoare triple {2853#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2853#false} is VALID [2022-04-07 17:35:37,947 INFO L290 TraceCheckUtils]: 17: Hoare triple {2923#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2853#false} is VALID [2022-04-07 17:35:37,947 INFO L290 TraceCheckUtils]: 16: Hoare triple {2919#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2923#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:35:37,948 INFO L272 TraceCheckUtils]: 15: Hoare triple {2939#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {2919#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:35:37,948 INFO L290 TraceCheckUtils]: 14: Hoare triple {2939#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {2939#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} is VALID [2022-04-07 17:35:39,963 WARN L290 TraceCheckUtils]: 13: Hoare triple {2946#(forall ((aux_mod_v_main_~z~0_45_31 Int)) (or (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_45_31) (and (or (forall ((aux_div_v_main_~z~0_45_31 Int)) (not (= (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31)) main_~z~0))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_45_31 Int)) (or (exists ((v_it_6 Int)) (and (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31))) (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31)))))))) (> 0 aux_mod_v_main_~z~0_45_31) (>= aux_mod_v_main_~z~0_45_31 4294967296)))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {2939#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} is UNKNOWN [2022-04-07 17:35:41,982 WARN L290 TraceCheckUtils]: 12: Hoare triple {2950#(forall ((aux_mod_v_main_~z~0_45_31 Int) (aux_mod_main_~z~0_26 Int)) (or (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_45_31) (<= 4294967296 aux_mod_v_main_~z~0_45_31) (and (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_45_31 Int) (aux_div_main_~z~0_26 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ aux_mod_main_~z~0_26 v_it_6 (* 4294967296 aux_div_main_~z~0_26) 1) (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31))) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26)) (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31))))))) (or (forall ((aux_div_v_main_~z~0_45_31 Int) (aux_div_main_~z~0_26 Int)) (not (= (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31)) (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26))))) (< 0 (mod main_~y~0 4294967296)))) (< 0 aux_mod_main_~z~0_26) (< aux_mod_main_~z~0_26 0) (< aux_mod_v_main_~z~0_45_31 0)))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {2946#(forall ((aux_mod_v_main_~z~0_45_31 Int)) (or (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_45_31) (and (or (forall ((aux_div_v_main_~z~0_45_31 Int)) (not (= (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31)) main_~z~0))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_45_31 Int)) (or (exists ((v_it_6 Int)) (and (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31))) (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31)))))))) (> 0 aux_mod_v_main_~z~0_45_31) (>= aux_mod_v_main_~z~0_45_31 4294967296)))} is UNKNOWN [2022-04-07 17:35:43,993 WARN L290 TraceCheckUtils]: 11: Hoare triple {2950#(forall ((aux_mod_v_main_~z~0_45_31 Int) (aux_mod_main_~z~0_26 Int)) (or (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_45_31) (<= 4294967296 aux_mod_v_main_~z~0_45_31) (and (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_45_31 Int) (aux_div_main_~z~0_26 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ aux_mod_main_~z~0_26 v_it_6 (* 4294967296 aux_div_main_~z~0_26) 1) (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31))) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26)) (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31))))))) (or (forall ((aux_div_v_main_~z~0_45_31 Int) (aux_div_main_~z~0_26 Int)) (not (= (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31)) (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26))))) (< 0 (mod main_~y~0 4294967296)))) (< 0 aux_mod_main_~z~0_26) (< aux_mod_main_~z~0_26 0) (< aux_mod_v_main_~z~0_45_31 0)))} [118] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_13 4294967296))) (or (and (= v_main_~z~0_12 (+ v_main_~x~0_11 v_main_~z~0_13 (* (- 1) v_main_~x~0_10))) (< v_main_~x~0_11 v_main_~x~0_10) (forall ((v_it_5 Int)) (or (< 0 (mod (+ v_main_~z~0_13 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)) (not (<= (+ v_main_~x~0_11 v_it_5 1) v_main_~x~0_10)))) (< 0 .cse0)) (and (= v_main_~x~0_11 v_main_~x~0_10) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (<= .cse0 0) (= v_main_~z~0_13 v_main_~z~0_12) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_13, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_12, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {2950#(forall ((aux_mod_v_main_~z~0_45_31 Int) (aux_mod_main_~z~0_26 Int)) (or (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_45_31) (<= 4294967296 aux_mod_v_main_~z~0_45_31) (and (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_45_31 Int) (aux_div_main_~z~0_26 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ aux_mod_main_~z~0_26 v_it_6 (* 4294967296 aux_div_main_~z~0_26) 1) (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31))) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26)) (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31))))))) (or (forall ((aux_div_v_main_~z~0_45_31 Int) (aux_div_main_~z~0_26 Int)) (not (= (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31)) (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26))))) (< 0 (mod main_~y~0 4294967296)))) (< 0 aux_mod_main_~z~0_26) (< aux_mod_main_~z~0_26 0) (< aux_mod_v_main_~z~0_45_31 0)))} is UNKNOWN [2022-04-07 17:35:46,005 WARN L290 TraceCheckUtils]: 10: Hoare triple {2950#(forall ((aux_mod_v_main_~z~0_45_31 Int) (aux_mod_main_~z~0_26 Int)) (or (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_45_31) (<= 4294967296 aux_mod_v_main_~z~0_45_31) (and (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_45_31 Int) (aux_div_main_~z~0_26 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ aux_mod_main_~z~0_26 v_it_6 (* 4294967296 aux_div_main_~z~0_26) 1) (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31))) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26)) (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31))))))) (or (forall ((aux_div_v_main_~z~0_45_31 Int) (aux_div_main_~z~0_26 Int)) (not (= (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31)) (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26))))) (< 0 (mod main_~y~0 4294967296)))) (< 0 aux_mod_main_~z~0_26) (< aux_mod_main_~z~0_26 0) (< aux_mod_v_main_~z~0_45_31 0)))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2950#(forall ((aux_mod_v_main_~z~0_45_31 Int) (aux_mod_main_~z~0_26 Int)) (or (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_45_31) (<= 4294967296 aux_mod_v_main_~z~0_45_31) (and (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_45_31 Int) (aux_div_main_~z~0_26 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ aux_mod_main_~z~0_26 v_it_6 (* 4294967296 aux_div_main_~z~0_26) 1) (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31))) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26)) (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31))))))) (or (forall ((aux_div_v_main_~z~0_45_31 Int) (aux_div_main_~z~0_26 Int)) (not (= (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31)) (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26))))) (< 0 (mod main_~y~0 4294967296)))) (< 0 aux_mod_main_~z~0_26) (< aux_mod_main_~z~0_26 0) (< aux_mod_v_main_~z~0_45_31 0)))} is UNKNOWN [2022-04-07 17:35:46,009 INFO L290 TraceCheckUtils]: 9: Hoare triple {2888#(not (< 0 (mod main_~n~0 4294967296)))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2950#(forall ((aux_mod_v_main_~z~0_45_31 Int) (aux_mod_main_~z~0_26 Int)) (or (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_45_31) (<= 4294967296 aux_mod_v_main_~z~0_45_31) (and (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_45_31 Int) (aux_div_main_~z~0_26 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ aux_mod_main_~z~0_26 v_it_6 (* 4294967296 aux_div_main_~z~0_26) 1) (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31))) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26)) (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31))))))) (or (forall ((aux_div_v_main_~z~0_45_31 Int) (aux_div_main_~z~0_26 Int)) (not (= (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31)) (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26))))) (< 0 (mod main_~y~0 4294967296)))) (< 0 aux_mod_main_~z~0_26) (< aux_mod_main_~z~0_26 0) (< aux_mod_v_main_~z~0_45_31 0)))} is VALID [2022-04-07 17:35:46,010 INFO L290 TraceCheckUtils]: 8: Hoare triple {2888#(not (< 0 (mod main_~n~0 4294967296)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {2888#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:35:46,010 INFO L290 TraceCheckUtils]: 7: Hoare triple {2888#(not (< 0 (mod main_~n~0 4294967296)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {2888#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:35:46,010 INFO L290 TraceCheckUtils]: 6: Hoare triple {2969#(or (< 0 (mod main_~x~0 4294967296)) (not (< 0 (mod main_~n~0 4294967296))))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2888#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:35:46,011 INFO L290 TraceCheckUtils]: 5: Hoare triple {2852#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2969#(or (< 0 (mod main_~x~0 4294967296)) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:35:46,011 INFO L272 TraceCheckUtils]: 4: Hoare triple {2852#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2852#true} is VALID [2022-04-07 17:35:46,011 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2852#true} {2852#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2852#true} is VALID [2022-04-07 17:35:46,011 INFO L290 TraceCheckUtils]: 2: Hoare triple {2852#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2852#true} is VALID [2022-04-07 17:35:46,011 INFO L290 TraceCheckUtils]: 1: Hoare triple {2852#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2852#true} is VALID [2022-04-07 17:35:46,011 INFO L272 TraceCheckUtils]: 0: Hoare triple {2852#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2852#true} is VALID [2022-04-07 17:35:46,021 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 17:35:46,021 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1368827292] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 17:35:46,021 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 17:35:46,021 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 9, 9] total 22 [2022-04-07 17:35:46,021 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [575279591] [2022-04-07 17:35:46,021 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 17:35:46,022 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 22 states have (on average 1.6363636363636365) internal successors, (36), 19 states have internal predecessors, (36), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-07 17:35:46,022 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:35:46,022 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 22 states, 22 states have (on average 1.6363636363636365) internal successors, (36), 19 states have internal predecessors, (36), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:35:54,156 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 43 edges. 39 inductive. 0 not inductive. 4 times theorem prover too weak to decide inductivity. [2022-04-07 17:35:54,156 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 22 states [2022-04-07 17:35:54,156 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:35:54,157 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2022-04-07 17:35:54,157 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=94, Invalid=362, Unknown=6, NotChecked=0, Total=462 [2022-04-07 17:35:54,157 INFO L87 Difference]: Start difference. First operand 38 states and 58 transitions. Second operand has 22 states, 22 states have (on average 1.6363636363636365) internal successors, (36), 19 states have internal predecessors, (36), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:35:55,235 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:35:55,235 INFO L93 Difference]: Finished difference Result 52 states and 79 transitions. [2022-04-07 17:35:55,235 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-04-07 17:35:55,235 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 22 states have (on average 1.6363636363636365) internal successors, (36), 19 states have internal predecessors, (36), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-07 17:35:55,235 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:35:55,236 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 1.6363636363636365) internal successors, (36), 19 states have internal predecessors, (36), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:35:55,237 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 55 transitions. [2022-04-07 17:35:55,237 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 1.6363636363636365) internal successors, (36), 19 states have internal predecessors, (36), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:35:55,238 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 55 transitions. [2022-04-07 17:35:55,238 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 15 states and 55 transitions. [2022-04-07 17:35:55,295 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 55 edges. 55 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:35:55,295 INFO L225 Difference]: With dead ends: 52 [2022-04-07 17:35:55,295 INFO L226 Difference]: Without dead ends: 48 [2022-04-07 17:35:55,296 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 61 GetRequests, 29 SyntacticMatches, 2 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 225 ImplicationChecksByTransitivity, 13.0s TimeCoverageRelationStatistics Valid=209, Invalid=777, Unknown=6, NotChecked=0, Total=992 [2022-04-07 17:35:55,296 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 46 mSDsluCounter, 53 mSDsCounter, 0 mSdLazyCounter, 90 mSolverCounterSat, 18 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 46 SdHoareTripleChecker+Valid, 65 SdHoareTripleChecker+Invalid, 148 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 18 IncrementalHoareTripleChecker+Valid, 90 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 40 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 17:35:55,297 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [46 Valid, 65 Invalid, 148 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [18 Valid, 90 Invalid, 0 Unknown, 40 Unchecked, 0.1s Time] [2022-04-07 17:35:55,297 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states. [2022-04-07 17:35:55,300 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 39. [2022-04-07 17:35:55,300 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:35:55,300 INFO L82 GeneralOperation]: Start isEquivalent. First operand 48 states. Second operand has 39 states, 34 states have (on average 1.6470588235294117) internal successors, (56), 34 states have internal predecessors, (56), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:35:55,300 INFO L74 IsIncluded]: Start isIncluded. First operand 48 states. Second operand has 39 states, 34 states have (on average 1.6470588235294117) internal successors, (56), 34 states have internal predecessors, (56), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:35:55,301 INFO L87 Difference]: Start difference. First operand 48 states. Second operand has 39 states, 34 states have (on average 1.6470588235294117) internal successors, (56), 34 states have internal predecessors, (56), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:35:55,302 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:35:55,302 INFO L93 Difference]: Finished difference Result 48 states and 74 transitions. [2022-04-07 17:35:55,302 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 74 transitions. [2022-04-07 17:35:55,302 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:35:55,302 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:35:55,302 INFO L74 IsIncluded]: Start isIncluded. First operand has 39 states, 34 states have (on average 1.6470588235294117) internal successors, (56), 34 states have internal predecessors, (56), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 48 states. [2022-04-07 17:35:55,303 INFO L87 Difference]: Start difference. First operand has 39 states, 34 states have (on average 1.6470588235294117) internal successors, (56), 34 states have internal predecessors, (56), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 48 states. [2022-04-07 17:35:55,303 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:35:55,304 INFO L93 Difference]: Finished difference Result 48 states and 74 transitions. [2022-04-07 17:35:55,304 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 74 transitions. [2022-04-07 17:35:55,304 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:35:55,304 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:35:55,304 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:35:55,304 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:35:55,304 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 39 states, 34 states have (on average 1.6470588235294117) internal successors, (56), 34 states have internal predecessors, (56), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:35:55,305 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 60 transitions. [2022-04-07 17:35:55,305 INFO L78 Accepts]: Start accepts. Automaton has 39 states and 60 transitions. Word has length 19 [2022-04-07 17:35:55,305 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:35:55,305 INFO L478 AbstractCegarLoop]: Abstraction has 39 states and 60 transitions. [2022-04-07 17:35:55,305 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 22 states, 22 states have (on average 1.6363636363636365) internal successors, (36), 19 states have internal predecessors, (36), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:35:55,305 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 60 transitions. [2022-04-07 17:35:55,306 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-07 17:35:55,306 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:35:55,306 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:35:55,333 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Ended with exit code 0 [2022-04-07 17:35:55,519 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable12 [2022-04-07 17:35:55,519 INFO L403 AbstractCegarLoop]: === Iteration 14 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:35:55,520 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:35:55,520 INFO L85 PathProgramCache]: Analyzing trace with hash -1642739759, now seen corresponding path program 1 times [2022-04-07 17:35:55,520 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:35:55,520 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1126116839] [2022-04-07 17:35:55,520 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:35:55,520 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:35:55,528 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.0))) (+ .cse0 main_~x~0_5 (* (- 4294967296) (div (+ .cse0 main_~x~0_5) 4294967296)))) 0)) [2022-04-07 17:35:55,533 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_6.1))) (+ main_~y~0_10 .cse0 (* (- 4294967296) (div (+ main_~y~0_10 .cse0) 4294967296)))) 0)) [2022-04-07 17:35:55,539 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:35:55,547 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.3))) (+ .cse0 main_~x~0_5 (* (- 4294967296) (div (+ .cse0 main_~x~0_5) 4294967296)))) 0)) [2022-04-07 17:35:55,559 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_6.4))) (+ main_~y~0_10 .cse0 (* (- 4294967296) (div (+ main_~y~0_10 .cse0) 4294967296)))) 0)) [2022-04-07 17:35:55,701 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:35:55,702 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:35:55,705 INFO L290 TraceCheckUtils]: 0: Hoare triple {3210#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3198#true} is VALID [2022-04-07 17:35:55,705 INFO L290 TraceCheckUtils]: 1: Hoare triple {3198#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3198#true} is VALID [2022-04-07 17:35:55,705 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {3198#true} {3198#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3198#true} is VALID [2022-04-07 17:35:55,706 INFO L272 TraceCheckUtils]: 0: Hoare triple {3198#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3210#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:35:55,706 INFO L290 TraceCheckUtils]: 1: Hoare triple {3210#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3198#true} is VALID [2022-04-07 17:35:55,706 INFO L290 TraceCheckUtils]: 2: Hoare triple {3198#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3198#true} is VALID [2022-04-07 17:35:55,706 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3198#true} {3198#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3198#true} is VALID [2022-04-07 17:35:55,706 INFO L272 TraceCheckUtils]: 4: Hoare triple {3198#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3198#true} is VALID [2022-04-07 17:35:55,706 INFO L290 TraceCheckUtils]: 5: Hoare triple {3198#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3203#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 17:35:55,707 INFO L290 TraceCheckUtils]: 6: Hoare triple {3203#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3204#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:35:55,707 INFO L290 TraceCheckUtils]: 7: Hoare triple {3204#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {3205#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:35:55,708 INFO L290 TraceCheckUtils]: 8: Hoare triple {3205#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {3205#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:35:55,708 INFO L290 TraceCheckUtils]: 9: Hoare triple {3205#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3205#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:35:55,709 INFO L290 TraceCheckUtils]: 10: Hoare triple {3205#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [115] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (= v_main_~y~0_10 (+ (* (- 1) v_main_~x~0_6) v_main_~y~0_11 v_main_~x~0_7)) (< v_main_~x~0_6 v_main_~x~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_11 v_main_~y~0_10) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_11, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_10, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {3206#(and (= main_~z~0 0) (not (<= (+ (div main_~y~0 4294967296) 1) 0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~y~0 0))} is VALID [2022-04-07 17:35:55,710 INFO L290 TraceCheckUtils]: 11: Hoare triple {3206#(and (= main_~z~0 0) (not (<= (+ (div main_~y~0 4294967296) 1) 0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~y~0 0))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3206#(and (= main_~z~0 0) (not (<= (+ (div main_~y~0 4294967296) 1) 0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~y~0 0))} is VALID [2022-04-07 17:35:55,710 INFO L290 TraceCheckUtils]: 12: Hoare triple {3206#(and (= main_~z~0 0) (not (<= (+ (div main_~y~0 4294967296) 1) 0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~y~0 0))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {3206#(and (= main_~z~0 0) (not (<= (+ (div main_~y~0 4294967296) 1) 0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~y~0 0))} is VALID [2022-04-07 17:35:55,712 INFO L290 TraceCheckUtils]: 13: Hoare triple {3206#(and (= main_~z~0 0) (not (<= (+ (div main_~y~0 4294967296) 1) 0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~y~0 0))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {3207#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:35:55,712 INFO L290 TraceCheckUtils]: 14: Hoare triple {3207#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {3207#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:35:55,713 INFO L272 TraceCheckUtils]: 15: Hoare triple {3207#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {3208#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:35:55,713 INFO L290 TraceCheckUtils]: 16: Hoare triple {3208#(not (= |__VERIFIER_assert_#in~cond| 0))} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3209#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:35:55,713 INFO L290 TraceCheckUtils]: 17: Hoare triple {3209#(not (= __VERIFIER_assert_~cond 0))} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3199#false} is VALID [2022-04-07 17:35:55,714 INFO L290 TraceCheckUtils]: 18: Hoare triple {3199#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3199#false} is VALID [2022-04-07 17:35:55,714 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:35:55,714 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:35:55,714 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1126116839] [2022-04-07 17:35:55,714 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1126116839] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:35:55,714 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1169569558] [2022-04-07 17:35:55,714 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:35:55,714 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:35:55,714 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:35:55,715 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:35:55,716 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2022-04-07 17:35:55,746 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:35:55,746 INFO L263 TraceCheckSpWp]: Trace formula consists of 64 conjuncts, 13 conjunts are in the unsatisfiable core [2022-04-07 17:35:55,759 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:35:55,760 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:35:56,543 INFO L272 TraceCheckUtils]: 0: Hoare triple {3198#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3198#true} is VALID [2022-04-07 17:35:56,544 INFO L290 TraceCheckUtils]: 1: Hoare triple {3198#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3198#true} is VALID [2022-04-07 17:35:56,544 INFO L290 TraceCheckUtils]: 2: Hoare triple {3198#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3198#true} is VALID [2022-04-07 17:35:56,544 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3198#true} {3198#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3198#true} is VALID [2022-04-07 17:35:56,544 INFO L272 TraceCheckUtils]: 4: Hoare triple {3198#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3198#true} is VALID [2022-04-07 17:35:56,544 INFO L290 TraceCheckUtils]: 5: Hoare triple {3198#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3203#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 17:35:56,545 INFO L290 TraceCheckUtils]: 6: Hoare triple {3203#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3204#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:35:56,545 INFO L290 TraceCheckUtils]: 7: Hoare triple {3204#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {3205#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:35:56,546 INFO L290 TraceCheckUtils]: 8: Hoare triple {3205#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {3205#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:35:56,546 INFO L290 TraceCheckUtils]: 9: Hoare triple {3205#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3205#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:35:56,547 INFO L290 TraceCheckUtils]: 10: Hoare triple {3205#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [115] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (= v_main_~y~0_10 (+ (* (- 1) v_main_~x~0_6) v_main_~y~0_11 v_main_~x~0_7)) (< v_main_~x~0_6 v_main_~x~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_11 v_main_~y~0_10) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_11, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_10, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {3206#(and (= main_~z~0 0) (not (<= (+ (div main_~y~0 4294967296) 1) 0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~y~0 0))} is VALID [2022-04-07 17:35:56,548 INFO L290 TraceCheckUtils]: 11: Hoare triple {3206#(and (= main_~z~0 0) (not (<= (+ (div main_~y~0 4294967296) 1) 0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~y~0 0))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3206#(and (= main_~z~0 0) (not (<= (+ (div main_~y~0 4294967296) 1) 0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~y~0 0))} is VALID [2022-04-07 17:35:56,548 INFO L290 TraceCheckUtils]: 12: Hoare triple {3206#(and (= main_~z~0 0) (not (<= (+ (div main_~y~0 4294967296) 1) 0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~y~0 0))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {3206#(and (= main_~z~0 0) (not (<= (+ (div main_~y~0 4294967296) 1) 0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~y~0 0))} is VALID [2022-04-07 17:35:56,549 INFO L290 TraceCheckUtils]: 13: Hoare triple {3206#(and (= main_~z~0 0) (not (<= (+ (div main_~y~0 4294967296) 1) 0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~y~0 0))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {3207#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:35:56,550 INFO L290 TraceCheckUtils]: 14: Hoare triple {3207#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {3207#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:35:56,551 INFO L272 TraceCheckUtils]: 15: Hoare triple {3207#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {3259#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:35:56,551 INFO L290 TraceCheckUtils]: 16: Hoare triple {3259#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3263#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:35:56,551 INFO L290 TraceCheckUtils]: 17: Hoare triple {3263#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3199#false} is VALID [2022-04-07 17:35:56,552 INFO L290 TraceCheckUtils]: 18: Hoare triple {3199#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3199#false} is VALID [2022-04-07 17:35:56,552 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:35:56,552 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 17:36:06,057 WARN L833 $PredicateComparison]: unable to prove that (forall ((aux_mod_v_main_~z~0_50_31 Int)) (or (>= aux_mod_v_main_~z~0_50_31 4294967296) (> 0 aux_mod_v_main_~z~0_50_31) (= aux_mod_v_main_~z~0_50_31 (mod c_main_~n~0 4294967296)) (let ((.cse2 (forall ((aux_div_v_main_~z~0_50_31 Int)) (not (= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) c_main_~z~0)))) (.cse0 (< 0 (mod c_main_~x~0 4294967296)))) (and (or .cse0 (let ((.cse1 (< 0 (mod c_main_~y~0 4294967296)))) (and (or .cse1 .cse2) (or (not .cse1) (forall ((aux_div_v_main_~z~0_50_31 Int)) (or (not (< c_main_~z~0 (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)))) (exists ((v_it_6 Int)) (and (<= (+ v_it_6 c_main_~z~0 1) (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))) (<= 1 v_it_6) (not (< 0 (mod (+ (* v_it_6 4294967295) c_main_~y~0) 4294967296))))))))))) (or (and (forall ((aux_div_v_main_~y~0_48_31 Int) (aux_mod_v_main_~y~0_48_31 Int) (aux_div_v_main_~z~0_50_31 Int)) (or (exists ((v_it_6 Int)) (and (<= (+ v_it_6 c_main_~z~0 1) (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))) (<= 1 v_it_6) (not (< 0 (mod (+ aux_mod_v_main_~y~0_48_31 (* v_it_6 4294967295)) 4294967296))))) (<= 4294967296 aux_mod_v_main_~y~0_48_31) (<= aux_mod_v_main_~y~0_48_31 0) (<= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) c_main_~z~0) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) c_main_~x~0) 4294967296))) (<= 1 v_it_4) (<= (+ v_it_4 c_main_~y~0 1) (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296))))) (<= (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296)) c_main_~y~0))) (or (forall ((aux_div_v_main_~y~0_48_31 Int) (aux_mod_v_main_~y~0_48_31 Int)) (or (< aux_mod_v_main_~y~0_48_31 0) (< 0 aux_mod_v_main_~y~0_48_31) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) c_main_~x~0) 4294967296))) (<= 1 v_it_4) (<= (+ v_it_4 c_main_~y~0 1) (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296))))) (<= (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296)) c_main_~y~0))) .cse2)) (not .cse0)))))) is different from false [2022-04-07 17:36:11,388 WARN L855 $PredicateComparison]: unable to prove that (or (forall ((aux_mod_v_main_~z~0_50_31 Int)) (or (>= aux_mod_v_main_~z~0_50_31 4294967296) (> 0 aux_mod_v_main_~z~0_50_31) (= aux_mod_v_main_~z~0_50_31 (mod c_main_~n~0 4294967296)) (let ((.cse1 (forall ((aux_div_v_main_~z~0_50_31 Int)) (not (= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) c_main_~z~0)))) (.cse0 (< 0 (mod c_main_~x~0 4294967296)))) (and (or .cse0 .cse1) (or (and (forall ((aux_div_v_main_~y~0_48_31 Int) (aux_mod_v_main_~y~0_48_31 Int) (aux_div_v_main_~z~0_50_31 Int)) (or (exists ((v_it_6 Int)) (and (<= (+ v_it_6 c_main_~z~0 1) (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))) (<= 1 v_it_6) (not (< 0 (mod (+ aux_mod_v_main_~y~0_48_31 (* v_it_6 4294967295)) 4294967296))))) (<= 4294967296 aux_mod_v_main_~y~0_48_31) (<= aux_mod_v_main_~y~0_48_31 0) (<= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) c_main_~z~0) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) c_main_~x~0) 4294967296))) (<= 1 v_it_4) (<= (+ v_it_4 c_main_~y~0 1) (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296))))) (<= (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296)) c_main_~y~0))) (or (forall ((aux_div_v_main_~y~0_48_31 Int) (aux_mod_v_main_~y~0_48_31 Int)) (or (< aux_mod_v_main_~y~0_48_31 0) (< 0 aux_mod_v_main_~y~0_48_31) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) c_main_~x~0) 4294967296))) (<= 1 v_it_4) (<= (+ v_it_4 c_main_~y~0 1) (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296))))) (<= (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296)) c_main_~y~0))) .cse1)) (not .cse0)))))) (< 0 (mod c_main_~y~0 4294967296))) is different from true [2022-04-07 17:36:20,100 WARN L855 $PredicateComparison]: unable to prove that (or (< 0 (mod c_main_~y~0 4294967296)) (forall ((aux_mod_v_main_~z~0_50_31 Int)) (or (>= aux_mod_v_main_~z~0_50_31 4294967296) (> 0 aux_mod_v_main_~z~0_50_31) (= aux_mod_v_main_~z~0_50_31 (mod c_main_~n~0 4294967296)) (let ((.cse1 (< 0 (mod c_main_~x~0 4294967296))) (.cse0 (forall ((aux_div_v_main_~z~0_50_31 Int)) (not (= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) c_main_~y~0))))) (and (or .cse0 .cse1) (or (not .cse1) (and (forall ((aux_div_v_main_~y~0_48_31 Int) (aux_mod_v_main_~y~0_48_31 Int) (aux_div_v_main_~z~0_50_31 Int)) (or (<= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) c_main_~y~0) (<= 4294967296 aux_mod_v_main_~y~0_48_31) (<= aux_mod_v_main_~y~0_48_31 0) (exists ((v_it_6 Int)) (and (<= (+ v_it_6 c_main_~y~0 1) (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))) (<= 1 v_it_6) (not (< 0 (mod (+ aux_mod_v_main_~y~0_48_31 (* v_it_6 4294967295)) 4294967296))))) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) c_main_~x~0) 4294967296))) (<= 1 v_it_4) (<= (+ v_it_4 c_main_~y~0 1) (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296))))) (<= (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296)) c_main_~y~0))) (or .cse0 (forall ((aux_div_v_main_~y~0_48_31 Int) (aux_mod_v_main_~y~0_48_31 Int)) (or (< aux_mod_v_main_~y~0_48_31 0) (< 0 aux_mod_v_main_~y~0_48_31) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) c_main_~x~0) 4294967296))) (<= 1 v_it_4) (<= (+ v_it_4 c_main_~y~0 1) (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296))))) (<= (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296)) c_main_~y~0))))))))))) is different from true [2022-04-07 17:36:21,122 INFO L290 TraceCheckUtils]: 18: Hoare triple {3199#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3199#false} is VALID [2022-04-07 17:36:21,122 INFO L290 TraceCheckUtils]: 17: Hoare triple {3263#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3199#false} is VALID [2022-04-07 17:36:21,123 INFO L290 TraceCheckUtils]: 16: Hoare triple {3259#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3263#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:36:21,123 INFO L272 TraceCheckUtils]: 15: Hoare triple {3279#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {3259#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:36:21,124 INFO L290 TraceCheckUtils]: 14: Hoare triple {3279#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {3279#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} is VALID [2022-04-07 17:36:23,149 WARN L290 TraceCheckUtils]: 13: Hoare triple {3286#(forall ((aux_mod_v_main_~z~0_50_31 Int)) (or (>= aux_mod_v_main_~z~0_50_31 4294967296) (> 0 aux_mod_v_main_~z~0_50_31) (and (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_50_31 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))))))) (or (forall ((aux_div_v_main_~z~0_50_31 Int)) (not (= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~z~0))) (< 0 (mod main_~y~0 4294967296)))) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_50_31)))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {3279#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} is UNKNOWN [2022-04-07 17:36:25,165 WARN L290 TraceCheckUtils]: 12: Hoare triple {3286#(forall ((aux_mod_v_main_~z~0_50_31 Int)) (or (>= aux_mod_v_main_~z~0_50_31 4294967296) (> 0 aux_mod_v_main_~z~0_50_31) (and (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_50_31 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))))))) (or (forall ((aux_div_v_main_~z~0_50_31 Int)) (not (= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~z~0))) (< 0 (mod main_~y~0 4294967296)))) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_50_31)))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {3286#(forall ((aux_mod_v_main_~z~0_50_31 Int)) (or (>= aux_mod_v_main_~z~0_50_31 4294967296) (> 0 aux_mod_v_main_~z~0_50_31) (and (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_50_31 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))))))) (or (forall ((aux_div_v_main_~z~0_50_31 Int)) (not (= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~z~0))) (< 0 (mod main_~y~0 4294967296)))) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_50_31)))} is UNKNOWN [2022-04-07 17:36:27,202 WARN L290 TraceCheckUtils]: 11: Hoare triple {3286#(forall ((aux_mod_v_main_~z~0_50_31 Int)) (or (>= aux_mod_v_main_~z~0_50_31 4294967296) (> 0 aux_mod_v_main_~z~0_50_31) (and (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_50_31 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))))))) (or (forall ((aux_div_v_main_~z~0_50_31 Int)) (not (= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~z~0))) (< 0 (mod main_~y~0 4294967296)))) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_50_31)))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3286#(forall ((aux_mod_v_main_~z~0_50_31 Int)) (or (>= aux_mod_v_main_~z~0_50_31 4294967296) (> 0 aux_mod_v_main_~z~0_50_31) (and (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_50_31 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))))))) (or (forall ((aux_div_v_main_~z~0_50_31 Int)) (not (= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~z~0))) (< 0 (mod main_~y~0 4294967296)))) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_50_31)))} is UNKNOWN [2022-04-07 17:36:29,213 WARN L290 TraceCheckUtils]: 10: Hoare triple {3296#(forall ((aux_mod_v_main_~z~0_50_31 Int)) (or (and (or (and (forall ((aux_div_v_main_~y~0_48_31 Int) (aux_mod_v_main_~y~0_48_31 Int) (aux_div_v_main_~z~0_50_31 Int)) (or (<= 4294967296 aux_mod_v_main_~y~0_48_31) (<= aux_mod_v_main_~y~0_48_31 0) (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296))) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))) (<= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~z~0) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))) (not (< 0 (mod (+ aux_mod_v_main_~y~0_48_31 (* v_it_6 4294967295)) 4294967296))))) (<= (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296)) main_~y~0))) (or (forall ((aux_div_v_main_~z~0_50_31 Int)) (not (= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~z~0))) (forall ((aux_div_v_main_~y~0_48_31 Int) (aux_mod_v_main_~y~0_48_31 Int)) (or (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296))) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))) (< aux_mod_v_main_~y~0_48_31 0) (< 0 aux_mod_v_main_~y~0_48_31) (<= (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296)) main_~y~0))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (and (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_50_31 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))))))) (or (forall ((aux_div_v_main_~z~0_50_31 Int)) (not (= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~z~0))) (< 0 (mod main_~y~0 4294967296)))) (< 0 (mod main_~x~0 4294967296)))) (>= aux_mod_v_main_~z~0_50_31 4294967296) (> 0 aux_mod_v_main_~z~0_50_31) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_50_31)))} [115] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (= v_main_~y~0_10 (+ (* (- 1) v_main_~x~0_6) v_main_~y~0_11 v_main_~x~0_7)) (< v_main_~x~0_6 v_main_~x~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_11 v_main_~y~0_10) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_11, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_10, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {3286#(forall ((aux_mod_v_main_~z~0_50_31 Int)) (or (>= aux_mod_v_main_~z~0_50_31 4294967296) (> 0 aux_mod_v_main_~z~0_50_31) (and (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_50_31 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))))))) (or (forall ((aux_div_v_main_~z~0_50_31 Int)) (not (= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~z~0))) (< 0 (mod main_~y~0 4294967296)))) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_50_31)))} is UNKNOWN [2022-04-07 17:36:31,229 WARN L290 TraceCheckUtils]: 9: Hoare triple {3300#(or (forall ((aux_mod_v_main_~z~0_50_31 Int)) (or (and (or (and (forall ((aux_div_v_main_~y~0_48_31 Int) (aux_mod_v_main_~y~0_48_31 Int) (aux_div_v_main_~z~0_50_31 Int)) (or (<= 4294967296 aux_mod_v_main_~y~0_48_31) (<= aux_mod_v_main_~y~0_48_31 0) (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296))) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))) (<= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~z~0) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))) (not (< 0 (mod (+ aux_mod_v_main_~y~0_48_31 (* v_it_6 4294967295)) 4294967296))))) (<= (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296)) main_~y~0))) (or (forall ((aux_div_v_main_~z~0_50_31 Int)) (not (= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~z~0))) (forall ((aux_div_v_main_~y~0_48_31 Int) (aux_mod_v_main_~y~0_48_31 Int)) (or (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296))) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))) (< aux_mod_v_main_~y~0_48_31 0) (< 0 aux_mod_v_main_~y~0_48_31) (<= (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296)) main_~y~0))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (forall ((aux_div_v_main_~z~0_50_31 Int)) (not (= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~z~0))) (< 0 (mod main_~x~0 4294967296)))) (>= aux_mod_v_main_~z~0_50_31 4294967296) (> 0 aux_mod_v_main_~z~0_50_31) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_50_31))) (< 0 (mod main_~y~0 4294967296)))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3296#(forall ((aux_mod_v_main_~z~0_50_31 Int)) (or (and (or (and (forall ((aux_div_v_main_~y~0_48_31 Int) (aux_mod_v_main_~y~0_48_31 Int) (aux_div_v_main_~z~0_50_31 Int)) (or (<= 4294967296 aux_mod_v_main_~y~0_48_31) (<= aux_mod_v_main_~y~0_48_31 0) (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296))) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))) (<= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~z~0) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))) (not (< 0 (mod (+ aux_mod_v_main_~y~0_48_31 (* v_it_6 4294967295)) 4294967296))))) (<= (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296)) main_~y~0))) (or (forall ((aux_div_v_main_~z~0_50_31 Int)) (not (= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~z~0))) (forall ((aux_div_v_main_~y~0_48_31 Int) (aux_mod_v_main_~y~0_48_31 Int)) (or (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296))) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))) (< aux_mod_v_main_~y~0_48_31 0) (< 0 aux_mod_v_main_~y~0_48_31) (<= (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296)) main_~y~0))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (and (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_50_31 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))))))) (or (forall ((aux_div_v_main_~z~0_50_31 Int)) (not (= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~z~0))) (< 0 (mod main_~y~0 4294967296)))) (< 0 (mod main_~x~0 4294967296)))) (>= aux_mod_v_main_~z~0_50_31 4294967296) (> 0 aux_mod_v_main_~z~0_50_31) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_50_31)))} is UNKNOWN [2022-04-07 17:36:33,241 WARN L290 TraceCheckUtils]: 8: Hoare triple {3300#(or (forall ((aux_mod_v_main_~z~0_50_31 Int)) (or (and (or (and (forall ((aux_div_v_main_~y~0_48_31 Int) (aux_mod_v_main_~y~0_48_31 Int) (aux_div_v_main_~z~0_50_31 Int)) (or (<= 4294967296 aux_mod_v_main_~y~0_48_31) (<= aux_mod_v_main_~y~0_48_31 0) (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296))) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))) (<= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~z~0) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))) (not (< 0 (mod (+ aux_mod_v_main_~y~0_48_31 (* v_it_6 4294967295)) 4294967296))))) (<= (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296)) main_~y~0))) (or (forall ((aux_div_v_main_~z~0_50_31 Int)) (not (= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~z~0))) (forall ((aux_div_v_main_~y~0_48_31 Int) (aux_mod_v_main_~y~0_48_31 Int)) (or (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296))) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))) (< aux_mod_v_main_~y~0_48_31 0) (< 0 aux_mod_v_main_~y~0_48_31) (<= (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296)) main_~y~0))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (forall ((aux_div_v_main_~z~0_50_31 Int)) (not (= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~z~0))) (< 0 (mod main_~x~0 4294967296)))) (>= aux_mod_v_main_~z~0_50_31 4294967296) (> 0 aux_mod_v_main_~z~0_50_31) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_50_31))) (< 0 (mod main_~y~0 4294967296)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {3300#(or (forall ((aux_mod_v_main_~z~0_50_31 Int)) (or (and (or (and (forall ((aux_div_v_main_~y~0_48_31 Int) (aux_mod_v_main_~y~0_48_31 Int) (aux_div_v_main_~z~0_50_31 Int)) (or (<= 4294967296 aux_mod_v_main_~y~0_48_31) (<= aux_mod_v_main_~y~0_48_31 0) (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296))) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))) (<= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~z~0) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))) (not (< 0 (mod (+ aux_mod_v_main_~y~0_48_31 (* v_it_6 4294967295)) 4294967296))))) (<= (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296)) main_~y~0))) (or (forall ((aux_div_v_main_~z~0_50_31 Int)) (not (= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~z~0))) (forall ((aux_div_v_main_~y~0_48_31 Int) (aux_mod_v_main_~y~0_48_31 Int)) (or (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296))) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))) (< aux_mod_v_main_~y~0_48_31 0) (< 0 aux_mod_v_main_~y~0_48_31) (<= (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296)) main_~y~0))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (forall ((aux_div_v_main_~z~0_50_31 Int)) (not (= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~z~0))) (< 0 (mod main_~x~0 4294967296)))) (>= aux_mod_v_main_~z~0_50_31 4294967296) (> 0 aux_mod_v_main_~z~0_50_31) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_50_31))) (< 0 (mod main_~y~0 4294967296)))} is UNKNOWN [2022-04-07 17:36:35,254 WARN L290 TraceCheckUtils]: 7: Hoare triple {3307#(or (forall ((aux_mod_v_main_~z~0_50_31 Int)) (or (>= aux_mod_v_main_~z~0_50_31 4294967296) (> 0 aux_mod_v_main_~z~0_50_31) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_50_31) (and (or (forall ((aux_div_v_main_~z~0_50_31 Int)) (not (= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~y~0))) (< 0 (mod main_~x~0 4294967296))) (or (not (< 0 (mod main_~x~0 4294967296))) (and (forall ((aux_div_v_main_~y~0_48_31 Int) (aux_mod_v_main_~y~0_48_31 Int) (aux_div_v_main_~z~0_50_31 Int)) (or (<= 4294967296 aux_mod_v_main_~y~0_48_31) (<= aux_mod_v_main_~y~0_48_31 0) (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296))) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~y~0 1) (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))) (not (< 0 (mod (+ aux_mod_v_main_~y~0_48_31 (* v_it_6 4294967295)) 4294967296))))) (<= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~y~0) (<= (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296)) main_~y~0))) (or (forall ((aux_div_v_main_~z~0_50_31 Int)) (not (= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~y~0))) (forall ((aux_div_v_main_~y~0_48_31 Int) (aux_mod_v_main_~y~0_48_31 Int)) (or (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296))) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))) (< aux_mod_v_main_~y~0_48_31 0) (< 0 aux_mod_v_main_~y~0_48_31) (<= (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296)) main_~y~0))))))))) (< 0 (mod main_~y~0 4294967296)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {3300#(or (forall ((aux_mod_v_main_~z~0_50_31 Int)) (or (and (or (and (forall ((aux_div_v_main_~y~0_48_31 Int) (aux_mod_v_main_~y~0_48_31 Int) (aux_div_v_main_~z~0_50_31 Int)) (or (<= 4294967296 aux_mod_v_main_~y~0_48_31) (<= aux_mod_v_main_~y~0_48_31 0) (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296))) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))) (<= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~z~0) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))) (not (< 0 (mod (+ aux_mod_v_main_~y~0_48_31 (* v_it_6 4294967295)) 4294967296))))) (<= (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296)) main_~y~0))) (or (forall ((aux_div_v_main_~z~0_50_31 Int)) (not (= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~z~0))) (forall ((aux_div_v_main_~y~0_48_31 Int) (aux_mod_v_main_~y~0_48_31 Int)) (or (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296))) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))) (< aux_mod_v_main_~y~0_48_31 0) (< 0 aux_mod_v_main_~y~0_48_31) (<= (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296)) main_~y~0))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (forall ((aux_div_v_main_~z~0_50_31 Int)) (not (= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~z~0))) (< 0 (mod main_~x~0 4294967296)))) (>= aux_mod_v_main_~z~0_50_31 4294967296) (> 0 aux_mod_v_main_~z~0_50_31) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_50_31))) (< 0 (mod main_~y~0 4294967296)))} is UNKNOWN [2022-04-07 17:36:35,265 INFO L290 TraceCheckUtils]: 6: Hoare triple {3311#(or (< 0 (mod main_~x~0 4294967296)) (<= (div (+ (- 1) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 (* (- 1) (mod main_~n~0 4294967296))) 4294967296) 1)) (< 0 (mod main_~y~0 4294967296)))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3307#(or (forall ((aux_mod_v_main_~z~0_50_31 Int)) (or (>= aux_mod_v_main_~z~0_50_31 4294967296) (> 0 aux_mod_v_main_~z~0_50_31) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_50_31) (and (or (forall ((aux_div_v_main_~z~0_50_31 Int)) (not (= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~y~0))) (< 0 (mod main_~x~0 4294967296))) (or (not (< 0 (mod main_~x~0 4294967296))) (and (forall ((aux_div_v_main_~y~0_48_31 Int) (aux_mod_v_main_~y~0_48_31 Int) (aux_div_v_main_~z~0_50_31 Int)) (or (<= 4294967296 aux_mod_v_main_~y~0_48_31) (<= aux_mod_v_main_~y~0_48_31 0) (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296))) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~y~0 1) (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))) (not (< 0 (mod (+ aux_mod_v_main_~y~0_48_31 (* v_it_6 4294967295)) 4294967296))))) (<= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~y~0) (<= (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296)) main_~y~0))) (or (forall ((aux_div_v_main_~z~0_50_31 Int)) (not (= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) main_~y~0))) (forall ((aux_div_v_main_~y~0_48_31 Int) (aux_mod_v_main_~y~0_48_31 Int)) (or (exists ((v_it_4 Int)) (and (<= (+ v_it_4 main_~y~0 1) (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296))) (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= 1 v_it_4))) (< aux_mod_v_main_~y~0_48_31 0) (< 0 aux_mod_v_main_~y~0_48_31) (<= (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296)) main_~y~0))))))))) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-07 17:36:35,266 INFO L290 TraceCheckUtils]: 5: Hoare triple {3198#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3311#(or (< 0 (mod main_~x~0 4294967296)) (<= (div (+ (- 1) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div (+ main_~y~0 (* (- 1) (mod main_~n~0 4294967296))) 4294967296) 1)) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-07 17:36:35,266 INFO L272 TraceCheckUtils]: 4: Hoare triple {3198#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3198#true} is VALID [2022-04-07 17:36:35,266 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3198#true} {3198#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3198#true} is VALID [2022-04-07 17:36:35,266 INFO L290 TraceCheckUtils]: 2: Hoare triple {3198#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3198#true} is VALID [2022-04-07 17:36:35,266 INFO L290 TraceCheckUtils]: 1: Hoare triple {3198#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3198#true} is VALID [2022-04-07 17:36:35,266 INFO L272 TraceCheckUtils]: 0: Hoare triple {3198#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3198#true} is VALID [2022-04-07 17:36:35,267 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 1 not checked. [2022-04-07 17:36:35,267 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1169569558] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 17:36:35,267 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 17:36:35,267 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9, 10] total 18 [2022-04-07 17:36:35,267 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1377144417] [2022-04-07 17:36:35,267 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 17:36:35,268 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 1.5555555555555556) internal successors, (28), 15 states have internal predecessors, (28), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-07 17:36:35,268 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:36:35,268 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 18 states, 18 states have (on average 1.5555555555555556) internal successors, (28), 15 states have internal predecessors, (28), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:36:49,642 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 35 edges. 28 inductive. 0 not inductive. 7 times theorem prover too weak to decide inductivity. [2022-04-07 17:36:49,642 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 18 states [2022-04-07 17:36:49,643 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:36:49,643 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2022-04-07 17:36:49,643 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=167, Unknown=4, NotChecked=84, Total=306 [2022-04-07 17:36:49,643 INFO L87 Difference]: Start difference. First operand 39 states and 60 transitions. Second operand has 18 states, 18 states have (on average 1.5555555555555556) internal successors, (28), 15 states have internal predecessors, (28), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:36:58,073 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:36:58,073 INFO L93 Difference]: Finished difference Result 50 states and 77 transitions. [2022-04-07 17:36:58,073 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-04-07 17:36:58,073 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 1.5555555555555556) internal successors, (28), 15 states have internal predecessors, (28), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-07 17:36:58,074 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:36:58,074 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 18 states have (on average 1.5555555555555556) internal successors, (28), 15 states have internal predecessors, (28), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:36:58,075 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 51 transitions. [2022-04-07 17:36:58,075 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 18 states have (on average 1.5555555555555556) internal successors, (28), 15 states have internal predecessors, (28), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:36:58,076 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 51 transitions. [2022-04-07 17:36:58,076 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 11 states and 51 transitions. [2022-04-07 17:36:58,134 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 51 edges. 51 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:36:58,135 INFO L225 Difference]: With dead ends: 50 [2022-04-07 17:36:58,135 INFO L226 Difference]: Without dead ends: 47 [2022-04-07 17:36:58,135 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 28 SyntacticMatches, 7 SemanticMatches, 23 ConstructedPredicates, 3 IntricatePredicates, 0 DeprecatedPredicates, 94 ImplicationChecksByTransitivity, 10.9s TimeCoverageRelationStatistics Valid=106, Invalid=364, Unknown=4, NotChecked=126, Total=600 [2022-04-07 17:36:58,136 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 31 mSDsluCounter, 58 mSDsCounter, 0 mSdLazyCounter, 112 mSolverCounterSat, 11 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 31 SdHoareTripleChecker+Valid, 70 SdHoareTripleChecker+Invalid, 207 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 11 IncrementalHoareTripleChecker+Valid, 112 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 84 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 17:36:58,136 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [31 Valid, 70 Invalid, 207 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [11 Valid, 112 Invalid, 0 Unknown, 84 Unchecked, 0.1s Time] [2022-04-07 17:36:58,136 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47 states. [2022-04-07 17:36:58,138 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47 to 41. [2022-04-07 17:36:58,138 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:36:58,138 INFO L82 GeneralOperation]: Start isEquivalent. First operand 47 states. Second operand has 41 states, 36 states have (on average 1.6666666666666667) internal successors, (60), 36 states have internal predecessors, (60), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:36:58,139 INFO L74 IsIncluded]: Start isIncluded. First operand 47 states. Second operand has 41 states, 36 states have (on average 1.6666666666666667) internal successors, (60), 36 states have internal predecessors, (60), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:36:58,139 INFO L87 Difference]: Start difference. First operand 47 states. Second operand has 41 states, 36 states have (on average 1.6666666666666667) internal successors, (60), 36 states have internal predecessors, (60), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:36:58,140 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:36:58,140 INFO L93 Difference]: Finished difference Result 47 states and 74 transitions. [2022-04-07 17:36:58,140 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 74 transitions. [2022-04-07 17:36:58,140 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:36:58,140 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:36:58,140 INFO L74 IsIncluded]: Start isIncluded. First operand has 41 states, 36 states have (on average 1.6666666666666667) internal successors, (60), 36 states have internal predecessors, (60), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 47 states. [2022-04-07 17:36:58,140 INFO L87 Difference]: Start difference. First operand has 41 states, 36 states have (on average 1.6666666666666667) internal successors, (60), 36 states have internal predecessors, (60), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 47 states. [2022-04-07 17:36:58,141 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:36:58,141 INFO L93 Difference]: Finished difference Result 47 states and 74 transitions. [2022-04-07 17:36:58,141 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 74 transitions. [2022-04-07 17:36:58,141 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:36:58,142 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:36:58,142 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:36:58,142 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:36:58,142 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 41 states, 36 states have (on average 1.6666666666666667) internal successors, (60), 36 states have internal predecessors, (60), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:36:58,142 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 64 transitions. [2022-04-07 17:36:58,143 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 64 transitions. Word has length 19 [2022-04-07 17:36:58,143 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:36:58,143 INFO L478 AbstractCegarLoop]: Abstraction has 41 states and 64 transitions. [2022-04-07 17:36:58,143 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 18 states, 18 states have (on average 1.5555555555555556) internal successors, (28), 15 states have internal predecessors, (28), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:36:58,147 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 64 transitions. [2022-04-07 17:36:58,148 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-07 17:36:58,148 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:36:58,148 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:36:58,175 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Forceful destruction successful, exit code 0 [2022-04-07 17:36:58,363 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable13 [2022-04-07 17:36:58,364 INFO L403 AbstractCegarLoop]: === Iteration 15 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:36:58,364 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:36:58,364 INFO L85 PathProgramCache]: Analyzing trace with hash -869752682, now seen corresponding path program 1 times [2022-04-07 17:36:58,364 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:36:58,364 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [29633081] [2022-04-07 17:36:58,364 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:36:58,364 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:36:58,373 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.0))) (+ .cse0 main_~x~0_5 (* (- 4294967296) (div (+ .cse0 main_~x~0_5) 4294967296)))) 0)) [2022-04-07 17:36:58,376 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.1))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-07 17:36:58,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:36:58,405 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.3))) (+ .cse0 main_~x~0_5 (* (- 4294967296) (div (+ .cse0 main_~x~0_5) 4294967296)))) 0)) [2022-04-07 17:36:58,408 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.4))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-07 17:36:58,574 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:36:58,576 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:36:58,580 INFO L290 TraceCheckUtils]: 0: Hoare triple {3547#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3534#true} is VALID [2022-04-07 17:36:58,580 INFO L290 TraceCheckUtils]: 1: Hoare triple {3534#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3534#true} is VALID [2022-04-07 17:36:58,580 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {3534#true} {3534#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3534#true} is VALID [2022-04-07 17:36:58,581 INFO L272 TraceCheckUtils]: 0: Hoare triple {3534#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3547#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:36:58,581 INFO L290 TraceCheckUtils]: 1: Hoare triple {3547#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3534#true} is VALID [2022-04-07 17:36:58,581 INFO L290 TraceCheckUtils]: 2: Hoare triple {3534#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3534#true} is VALID [2022-04-07 17:36:58,581 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3534#true} {3534#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3534#true} is VALID [2022-04-07 17:36:58,581 INFO L272 TraceCheckUtils]: 4: Hoare triple {3534#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3534#true} is VALID [2022-04-07 17:36:58,582 INFO L290 TraceCheckUtils]: 5: Hoare triple {3534#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3539#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 17:36:58,583 INFO L290 TraceCheckUtils]: 6: Hoare triple {3539#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3540#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:36:58,583 INFO L290 TraceCheckUtils]: 7: Hoare triple {3540#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {3541#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 17:36:58,584 INFO L290 TraceCheckUtils]: 8: Hoare triple {3541#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {3541#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 17:36:58,584 INFO L290 TraceCheckUtils]: 9: Hoare triple {3541#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3541#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 17:36:58,585 INFO L290 TraceCheckUtils]: 10: Hoare triple {3541#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [115] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (= v_main_~y~0_10 (+ (* (- 1) v_main_~x~0_6) v_main_~y~0_11 v_main_~x~0_7)) (< v_main_~x~0_6 v_main_~x~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_11 v_main_~y~0_10) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_11, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_10, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {3542#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-07 17:36:58,585 INFO L290 TraceCheckUtils]: 11: Hoare triple {3542#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3542#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-07 17:36:58,586 INFO L290 TraceCheckUtils]: 12: Hoare triple {3542#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [118] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_13 4294967296))) (or (and (= v_main_~z~0_12 (+ v_main_~x~0_11 v_main_~z~0_13 (* (- 1) v_main_~x~0_10))) (< v_main_~x~0_11 v_main_~x~0_10) (forall ((v_it_5 Int)) (or (< 0 (mod (+ v_main_~z~0_13 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)) (not (<= (+ v_main_~x~0_11 v_it_5 1) v_main_~x~0_10)))) (< 0 .cse0)) (and (= v_main_~x~0_11 v_main_~x~0_10) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (<= .cse0 0) (= v_main_~z~0_13 v_main_~z~0_12) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_13, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_12, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {3543#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} is VALID [2022-04-07 17:36:58,587 INFO L290 TraceCheckUtils]: 13: Hoare triple {3543#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {3544#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:36:58,587 INFO L290 TraceCheckUtils]: 14: Hoare triple {3544#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {3544#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:36:58,588 INFO L272 TraceCheckUtils]: 15: Hoare triple {3544#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {3545#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:36:58,588 INFO L290 TraceCheckUtils]: 16: Hoare triple {3545#(not (= |__VERIFIER_assert_#in~cond| 0))} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3546#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:36:58,589 INFO L290 TraceCheckUtils]: 17: Hoare triple {3546#(not (= __VERIFIER_assert_~cond 0))} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3535#false} is VALID [2022-04-07 17:36:58,589 INFO L290 TraceCheckUtils]: 18: Hoare triple {3535#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3535#false} is VALID [2022-04-07 17:36:58,589 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:36:58,589 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:36:58,589 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [29633081] [2022-04-07 17:36:58,589 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [29633081] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:36:58,589 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [55880091] [2022-04-07 17:36:58,589 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:36:58,589 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:36:58,589 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:36:58,590 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:36:58,591 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2022-04-07 17:36:58,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:36:58,628 INFO L263 TraceCheckSpWp]: Trace formula consists of 64 conjuncts, 9 conjunts are in the unsatisfiable core [2022-04-07 17:36:58,636 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:36:58,637 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:36:59,228 INFO L272 TraceCheckUtils]: 0: Hoare triple {3534#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3534#true} is VALID [2022-04-07 17:36:59,228 INFO L290 TraceCheckUtils]: 1: Hoare triple {3534#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3534#true} is VALID [2022-04-07 17:36:59,229 INFO L290 TraceCheckUtils]: 2: Hoare triple {3534#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3534#true} is VALID [2022-04-07 17:36:59,229 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3534#true} {3534#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3534#true} is VALID [2022-04-07 17:36:59,229 INFO L272 TraceCheckUtils]: 4: Hoare triple {3534#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3534#true} is VALID [2022-04-07 17:36:59,229 INFO L290 TraceCheckUtils]: 5: Hoare triple {3534#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3566#(= main_~n~0 main_~x~0)} is VALID [2022-04-07 17:36:59,229 INFO L290 TraceCheckUtils]: 6: Hoare triple {3566#(= main_~n~0 main_~x~0)} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3570#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-07 17:36:59,230 INFO L290 TraceCheckUtils]: 7: Hoare triple {3570#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {3570#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-07 17:36:59,230 INFO L290 TraceCheckUtils]: 8: Hoare triple {3570#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {3570#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-07 17:36:59,230 INFO L290 TraceCheckUtils]: 9: Hoare triple {3570#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3570#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-07 17:36:59,231 INFO L290 TraceCheckUtils]: 10: Hoare triple {3570#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [115] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (= v_main_~y~0_10 (+ (* (- 1) v_main_~x~0_6) v_main_~y~0_11 v_main_~x~0_7)) (< v_main_~x~0_6 v_main_~x~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_11 v_main_~y~0_10) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_11, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_10, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {3570#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-07 17:36:59,232 INFO L290 TraceCheckUtils]: 11: Hoare triple {3570#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3586#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:36:59,232 INFO L290 TraceCheckUtils]: 12: Hoare triple {3586#(not (< 0 (mod main_~n~0 4294967296)))} [118] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_13 4294967296))) (or (and (= v_main_~z~0_12 (+ v_main_~x~0_11 v_main_~z~0_13 (* (- 1) v_main_~x~0_10))) (< v_main_~x~0_11 v_main_~x~0_10) (forall ((v_it_5 Int)) (or (< 0 (mod (+ v_main_~z~0_13 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)) (not (<= (+ v_main_~x~0_11 v_it_5 1) v_main_~x~0_10)))) (< 0 .cse0)) (and (= v_main_~x~0_11 v_main_~x~0_10) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (<= .cse0 0) (= v_main_~z~0_13 v_main_~z~0_12) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_13, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_12, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {3586#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:36:59,232 INFO L290 TraceCheckUtils]: 13: Hoare triple {3586#(not (< 0 (mod main_~n~0 4294967296)))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {3593#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:36:59,233 INFO L290 TraceCheckUtils]: 14: Hoare triple {3593#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {3593#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:36:59,234 INFO L272 TraceCheckUtils]: 15: Hoare triple {3593#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {3600#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:36:59,236 INFO L290 TraceCheckUtils]: 16: Hoare triple {3600#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3604#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:36:59,237 INFO L290 TraceCheckUtils]: 17: Hoare triple {3604#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3535#false} is VALID [2022-04-07 17:36:59,237 INFO L290 TraceCheckUtils]: 18: Hoare triple {3535#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3535#false} is VALID [2022-04-07 17:36:59,237 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-07 17:36:59,237 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-07 17:36:59,237 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [55880091] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 17:36:59,237 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-07 17:36:59,237 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [11] total 17 [2022-04-07 17:36:59,237 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1518902857] [2022-04-07 17:36:59,237 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 17:36:59,238 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 1.875) internal successors, (15), 7 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-07 17:36:59,238 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:36:59,238 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 8 states, 8 states have (on average 1.875) internal successors, (15), 7 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:36:59,253 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 19 edges. 19 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:36:59,253 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-04-07 17:36:59,253 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:36:59,253 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-04-07 17:36:59,254 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=58, Invalid=214, Unknown=0, NotChecked=0, Total=272 [2022-04-07 17:36:59,254 INFO L87 Difference]: Start difference. First operand 41 states and 64 transitions. Second operand has 8 states, 8 states have (on average 1.875) internal successors, (15), 7 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:36:59,394 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:36:59,394 INFO L93 Difference]: Finished difference Result 51 states and 77 transitions. [2022-04-07 17:36:59,394 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-04-07 17:36:59,395 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 1.875) internal successors, (15), 7 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-07 17:36:59,395 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:36:59,395 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 1.875) internal successors, (15), 7 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:36:59,396 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 45 transitions. [2022-04-07 17:36:59,396 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 1.875) internal successors, (15), 7 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:36:59,397 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 45 transitions. [2022-04-07 17:36:59,397 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 9 states and 45 transitions. [2022-04-07 17:36:59,445 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 45 edges. 45 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:36:59,445 INFO L225 Difference]: With dead ends: 51 [2022-04-07 17:36:59,445 INFO L226 Difference]: Without dead ends: 48 [2022-04-07 17:36:59,446 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 15 SyntacticMatches, 1 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 76 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=73, Invalid=269, Unknown=0, NotChecked=0, Total=342 [2022-04-07 17:36:59,446 INFO L913 BasicCegarLoop]: 17 mSDtfsCounter, 15 mSDsluCounter, 62 mSDsCounter, 0 mSdLazyCounter, 22 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 15 SdHoareTripleChecker+Valid, 79 SdHoareTripleChecker+Invalid, 30 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 22 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 6 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 17:36:59,447 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [15 Valid, 79 Invalid, 30 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 22 Invalid, 0 Unknown, 6 Unchecked, 0.0s Time] [2022-04-07 17:36:59,447 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states. [2022-04-07 17:36:59,451 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 41. [2022-04-07 17:36:59,451 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:36:59,451 INFO L82 GeneralOperation]: Start isEquivalent. First operand 48 states. Second operand has 41 states, 36 states have (on average 1.6666666666666667) internal successors, (60), 36 states have internal predecessors, (60), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:36:59,452 INFO L74 IsIncluded]: Start isIncluded. First operand 48 states. Second operand has 41 states, 36 states have (on average 1.6666666666666667) internal successors, (60), 36 states have internal predecessors, (60), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:36:59,452 INFO L87 Difference]: Start difference. First operand 48 states. Second operand has 41 states, 36 states have (on average 1.6666666666666667) internal successors, (60), 36 states have internal predecessors, (60), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:36:59,453 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:36:59,453 INFO L93 Difference]: Finished difference Result 48 states and 74 transitions. [2022-04-07 17:36:59,453 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 74 transitions. [2022-04-07 17:36:59,453 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:36:59,453 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:36:59,453 INFO L74 IsIncluded]: Start isIncluded. First operand has 41 states, 36 states have (on average 1.6666666666666667) internal successors, (60), 36 states have internal predecessors, (60), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 48 states. [2022-04-07 17:36:59,455 INFO L87 Difference]: Start difference. First operand has 41 states, 36 states have (on average 1.6666666666666667) internal successors, (60), 36 states have internal predecessors, (60), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 48 states. [2022-04-07 17:36:59,456 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:36:59,456 INFO L93 Difference]: Finished difference Result 48 states and 74 transitions. [2022-04-07 17:36:59,456 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 74 transitions. [2022-04-07 17:36:59,456 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:36:59,456 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:36:59,456 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:36:59,457 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:36:59,457 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 41 states, 36 states have (on average 1.6666666666666667) internal successors, (60), 36 states have internal predecessors, (60), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:36:59,457 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 64 transitions. [2022-04-07 17:36:59,458 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 64 transitions. Word has length 19 [2022-04-07 17:36:59,458 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:36:59,458 INFO L478 AbstractCegarLoop]: Abstraction has 41 states and 64 transitions. [2022-04-07 17:36:59,458 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 1.875) internal successors, (15), 7 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:36:59,458 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 64 transitions. [2022-04-07 17:36:59,458 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-07 17:36:59,458 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:36:59,458 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:36:59,477 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Forceful destruction successful, exit code 0 [2022-04-07 17:36:59,667 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable14 [2022-04-07 17:36:59,668 INFO L403 AbstractCegarLoop]: === Iteration 16 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:36:59,668 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:36:59,668 INFO L85 PathProgramCache]: Analyzing trace with hash -1138278570, now seen corresponding path program 1 times [2022-04-07 17:36:59,668 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:36:59,668 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1082331237] [2022-04-07 17:36:59,668 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:36:59,668 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:36:59,676 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.0))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-07 17:36:59,677 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.1))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-07 17:36:59,682 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:36:59,689 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.3))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-07 17:36:59,692 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.4))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-07 17:36:59,839 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:36:59,840 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:36:59,843 INFO L290 TraceCheckUtils]: 0: Hoare triple {3815#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3802#true} is VALID [2022-04-07 17:36:59,843 INFO L290 TraceCheckUtils]: 1: Hoare triple {3802#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3802#true} is VALID [2022-04-07 17:36:59,843 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {3802#true} {3802#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3802#true} is VALID [2022-04-07 17:36:59,844 INFO L272 TraceCheckUtils]: 0: Hoare triple {3802#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3815#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:36:59,844 INFO L290 TraceCheckUtils]: 1: Hoare triple {3815#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3802#true} is VALID [2022-04-07 17:36:59,844 INFO L290 TraceCheckUtils]: 2: Hoare triple {3802#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3802#true} is VALID [2022-04-07 17:36:59,844 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3802#true} {3802#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3802#true} is VALID [2022-04-07 17:36:59,844 INFO L272 TraceCheckUtils]: 4: Hoare triple {3802#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3802#true} is VALID [2022-04-07 17:36:59,845 INFO L290 TraceCheckUtils]: 5: Hoare triple {3802#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3807#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 17:36:59,845 INFO L290 TraceCheckUtils]: 6: Hoare triple {3807#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3808#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:36:59,846 INFO L290 TraceCheckUtils]: 7: Hoare triple {3808#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {3809#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 17:36:59,847 INFO L290 TraceCheckUtils]: 8: Hoare triple {3809#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [109] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_11 4294967296))) (or (and (< v_main_~z~0_10 v_main_~z~0_11) (= v_main_~x~0_8 (+ v_main_~z~0_11 v_main_~x~0_9 (* (- 1) v_main_~z~0_10))) (< 0 .cse0) (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (not (<= (+ v_main_~z~0_10 v_it_2 1) v_main_~z~0_11)) (< 0 (mod (+ v_main_~z~0_11 (* v_it_2 4294967295)) 4294967296))))) (and (= v_main_~x~0_9 v_main_~x~0_8) (= v_main_~z~0_11 v_main_~z~0_10) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (<= .cse0 0) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_11, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_10, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3810#(and (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:36:59,847 INFO L290 TraceCheckUtils]: 9: Hoare triple {3810#(and (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (= main_~y~0 0))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {3810#(and (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:36:59,849 INFO L290 TraceCheckUtils]: 10: Hoare triple {3810#(and (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (= main_~y~0 0))} [112] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_5 4294967296))) (or (and (= v_main_~y~0_4 v_main_~y~0_5) (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= |v_main_#t~post9_3| |v_main_#t~post9_1|) (<= .cse0 0)) (and (= v_main_~y~0_4 (+ v_main_~y~0_5 v_main_~z~0_3 (* (- 1) v_main_~z~0_2))) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= (+ v_main_~z~0_3 v_it_3 1) v_main_~z~0_2)) (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_5 (* v_it_3 4294967295)) 4294967296)))) (< v_main_~z~0_3 v_main_~z~0_2)))) InVars {main_~y~0=v_main_~y~0_5, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3811#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} is VALID [2022-04-07 17:36:59,849 INFO L290 TraceCheckUtils]: 11: Hoare triple {3811#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3811#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} is VALID [2022-04-07 17:36:59,850 INFO L290 TraceCheckUtils]: 12: Hoare triple {3811#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3811#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} is VALID [2022-04-07 17:36:59,850 INFO L290 TraceCheckUtils]: 13: Hoare triple {3811#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {3812#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:36:59,851 INFO L290 TraceCheckUtils]: 14: Hoare triple {3812#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {3812#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:36:59,852 INFO L272 TraceCheckUtils]: 15: Hoare triple {3812#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {3813#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:36:59,852 INFO L290 TraceCheckUtils]: 16: Hoare triple {3813#(not (= |__VERIFIER_assert_#in~cond| 0))} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3814#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:36:59,852 INFO L290 TraceCheckUtils]: 17: Hoare triple {3814#(not (= __VERIFIER_assert_~cond 0))} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3803#false} is VALID [2022-04-07 17:36:59,852 INFO L290 TraceCheckUtils]: 18: Hoare triple {3803#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3803#false} is VALID [2022-04-07 17:36:59,853 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:36:59,853 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:36:59,853 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1082331237] [2022-04-07 17:36:59,853 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1082331237] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:36:59,853 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2122000617] [2022-04-07 17:36:59,853 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:36:59,853 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:36:59,853 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:36:59,854 INFO L229 MonitoredProcess]: Starting monitored process 15 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:36:59,855 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2022-04-07 17:36:59,884 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:36:59,885 INFO L263 TraceCheckSpWp]: Trace formula consists of 64 conjuncts, 7 conjunts are in the unsatisfiable core [2022-04-07 17:36:59,890 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:36:59,891 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:37:00,385 INFO L272 TraceCheckUtils]: 0: Hoare triple {3802#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3802#true} is VALID [2022-04-07 17:37:00,385 INFO L290 TraceCheckUtils]: 1: Hoare triple {3802#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3802#true} is VALID [2022-04-07 17:37:00,386 INFO L290 TraceCheckUtils]: 2: Hoare triple {3802#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3802#true} is VALID [2022-04-07 17:37:00,386 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3802#true} {3802#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3802#true} is VALID [2022-04-07 17:37:00,386 INFO L272 TraceCheckUtils]: 4: Hoare triple {3802#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3802#true} is VALID [2022-04-07 17:37:00,386 INFO L290 TraceCheckUtils]: 5: Hoare triple {3802#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3834#(= main_~n~0 main_~x~0)} is VALID [2022-04-07 17:37:00,386 INFO L290 TraceCheckUtils]: 6: Hoare triple {3834#(= main_~n~0 main_~x~0)} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3838#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:37:00,387 INFO L290 TraceCheckUtils]: 7: Hoare triple {3838#(not (< 0 (mod main_~n~0 4294967296)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {3838#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:37:00,387 INFO L290 TraceCheckUtils]: 8: Hoare triple {3838#(not (< 0 (mod main_~n~0 4294967296)))} [109] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_11 4294967296))) (or (and (< v_main_~z~0_10 v_main_~z~0_11) (= v_main_~x~0_8 (+ v_main_~z~0_11 v_main_~x~0_9 (* (- 1) v_main_~z~0_10))) (< 0 .cse0) (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (not (<= (+ v_main_~z~0_10 v_it_2 1) v_main_~z~0_11)) (< 0 (mod (+ v_main_~z~0_11 (* v_it_2 4294967295)) 4294967296))))) (and (= v_main_~x~0_9 v_main_~x~0_8) (= v_main_~z~0_11 v_main_~z~0_10) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (<= .cse0 0) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_11, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_10, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3838#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:37:00,388 INFO L290 TraceCheckUtils]: 9: Hoare triple {3838#(not (< 0 (mod main_~n~0 4294967296)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {3838#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:37:00,396 INFO L290 TraceCheckUtils]: 10: Hoare triple {3838#(not (< 0 (mod main_~n~0 4294967296)))} [112] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_5 4294967296))) (or (and (= v_main_~y~0_4 v_main_~y~0_5) (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= |v_main_#t~post9_3| |v_main_#t~post9_1|) (<= .cse0 0)) (and (= v_main_~y~0_4 (+ v_main_~y~0_5 v_main_~z~0_3 (* (- 1) v_main_~z~0_2))) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= (+ v_main_~z~0_3 v_it_3 1) v_main_~z~0_2)) (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_5 (* v_it_3 4294967295)) 4294967296)))) (< v_main_~z~0_3 v_main_~z~0_2)))) InVars {main_~y~0=v_main_~y~0_5, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3838#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:37:00,396 INFO L290 TraceCheckUtils]: 11: Hoare triple {3838#(not (< 0 (mod main_~n~0 4294967296)))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3838#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:37:00,397 INFO L290 TraceCheckUtils]: 12: Hoare triple {3838#(not (< 0 (mod main_~n~0 4294967296)))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3838#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:37:00,397 INFO L290 TraceCheckUtils]: 13: Hoare triple {3838#(not (< 0 (mod main_~n~0 4294967296)))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {3860#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:37:00,398 INFO L290 TraceCheckUtils]: 14: Hoare triple {3860#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {3860#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:37:00,399 INFO L272 TraceCheckUtils]: 15: Hoare triple {3860#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {3867#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:37:00,399 INFO L290 TraceCheckUtils]: 16: Hoare triple {3867#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3871#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:37:00,400 INFO L290 TraceCheckUtils]: 17: Hoare triple {3871#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3803#false} is VALID [2022-04-07 17:37:00,400 INFO L290 TraceCheckUtils]: 18: Hoare triple {3803#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3803#false} is VALID [2022-04-07 17:37:00,400 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-07 17:37:00,400 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-07 17:37:00,400 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2122000617] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 17:37:00,400 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-07 17:37:00,400 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [11] total 16 [2022-04-07 17:37:00,400 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [957570012] [2022-04-07 17:37:00,400 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 17:37:00,401 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-07 17:37:00,401 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:37:00,401 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:37:00,415 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 19 edges. 19 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:37:00,415 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-04-07 17:37:00,415 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:37:00,416 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-04-07 17:37:00,416 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=189, Unknown=0, NotChecked=0, Total=240 [2022-04-07 17:37:00,416 INFO L87 Difference]: Start difference. First operand 41 states and 64 transitions. Second operand has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:37:00,544 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:37:00,544 INFO L93 Difference]: Finished difference Result 54 states and 84 transitions. [2022-04-07 17:37:00,544 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-04-07 17:37:00,544 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-07 17:37:00,544 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:37:00,544 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:37:00,545 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 52 transitions. [2022-04-07 17:37:00,545 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:37:00,546 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 52 transitions. [2022-04-07 17:37:00,546 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 9 states and 52 transitions. [2022-04-07 17:37:00,597 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 52 edges. 52 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:37:00,598 INFO L225 Difference]: With dead ends: 54 [2022-04-07 17:37:00,598 INFO L226 Difference]: Without dead ends: 51 [2022-04-07 17:37:00,598 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 85 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=73, Invalid=269, Unknown=0, NotChecked=0, Total=342 [2022-04-07 17:37:00,602 INFO L913 BasicCegarLoop]: 14 mSDtfsCounter, 12 mSDsluCounter, 62 mSDsCounter, 0 mSdLazyCounter, 31 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 12 SdHoareTripleChecker+Valid, 76 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 31 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 6 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 17:37:00,602 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [12 Valid, 76 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 31 Invalid, 0 Unknown, 6 Unchecked, 0.0s Time] [2022-04-07 17:37:00,603 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states. [2022-04-07 17:37:00,608 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 42. [2022-04-07 17:37:00,608 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:37:00,609 INFO L82 GeneralOperation]: Start isEquivalent. First operand 51 states. Second operand has 42 states, 37 states have (on average 1.6756756756756757) internal successors, (62), 37 states have internal predecessors, (62), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:37:00,609 INFO L74 IsIncluded]: Start isIncluded. First operand 51 states. Second operand has 42 states, 37 states have (on average 1.6756756756756757) internal successors, (62), 37 states have internal predecessors, (62), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:37:00,609 INFO L87 Difference]: Start difference. First operand 51 states. Second operand has 42 states, 37 states have (on average 1.6756756756756757) internal successors, (62), 37 states have internal predecessors, (62), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:37:00,611 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:37:00,611 INFO L93 Difference]: Finished difference Result 51 states and 81 transitions. [2022-04-07 17:37:00,611 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 81 transitions. [2022-04-07 17:37:00,612 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:37:00,612 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:37:00,612 INFO L74 IsIncluded]: Start isIncluded. First operand has 42 states, 37 states have (on average 1.6756756756756757) internal successors, (62), 37 states have internal predecessors, (62), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 51 states. [2022-04-07 17:37:00,612 INFO L87 Difference]: Start difference. First operand has 42 states, 37 states have (on average 1.6756756756756757) internal successors, (62), 37 states have internal predecessors, (62), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 51 states. [2022-04-07 17:37:00,613 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:37:00,613 INFO L93 Difference]: Finished difference Result 51 states and 81 transitions. [2022-04-07 17:37:00,613 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 81 transitions. [2022-04-07 17:37:00,613 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:37:00,613 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:37:00,614 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:37:00,614 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:37:00,614 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 42 states, 37 states have (on average 1.6756756756756757) internal successors, (62), 37 states have internal predecessors, (62), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:37:00,615 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 66 transitions. [2022-04-07 17:37:00,615 INFO L78 Accepts]: Start accepts. Automaton has 42 states and 66 transitions. Word has length 19 [2022-04-07 17:37:00,616 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:37:00,616 INFO L478 AbstractCegarLoop]: Abstraction has 42 states and 66 transitions. [2022-04-07 17:37:00,616 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:37:00,616 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 66 transitions. [2022-04-07 17:37:00,616 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-07 17:37:00,617 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:37:00,617 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:37:00,644 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Forceful destruction successful, exit code 0 [2022-04-07 17:37:00,831 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15,15 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:37:00,832 INFO L403 AbstractCegarLoop]: === Iteration 17 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:37:00,832 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:37:00,832 INFO L85 PathProgramCache]: Analyzing trace with hash 84699953, now seen corresponding path program 1 times [2022-04-07 17:37:00,832 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:37:00,832 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1005569032] [2022-04-07 17:37:00,832 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:37:00,832 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:37:00,842 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.0))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-07 17:37:00,844 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_6.1))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-07 17:37:00,855 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:37:00,874 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.3))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-07 17:37:00,879 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_6.4))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-07 17:37:01,077 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:37:01,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:37:01,081 INFO L290 TraceCheckUtils]: 0: Hoare triple {4094#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4081#true} is VALID [2022-04-07 17:37:01,081 INFO L290 TraceCheckUtils]: 1: Hoare triple {4081#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4081#true} is VALID [2022-04-07 17:37:01,081 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {4081#true} {4081#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4081#true} is VALID [2022-04-07 17:37:01,081 INFO L272 TraceCheckUtils]: 0: Hoare triple {4081#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4094#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:37:01,081 INFO L290 TraceCheckUtils]: 1: Hoare triple {4094#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4081#true} is VALID [2022-04-07 17:37:01,081 INFO L290 TraceCheckUtils]: 2: Hoare triple {4081#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4081#true} is VALID [2022-04-07 17:37:01,081 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4081#true} {4081#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4081#true} is VALID [2022-04-07 17:37:01,082 INFO L272 TraceCheckUtils]: 4: Hoare triple {4081#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4081#true} is VALID [2022-04-07 17:37:01,082 INFO L290 TraceCheckUtils]: 5: Hoare triple {4081#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4086#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 17:37:01,083 INFO L290 TraceCheckUtils]: 6: Hoare triple {4086#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {4087#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:37:01,083 INFO L290 TraceCheckUtils]: 7: Hoare triple {4087#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {4088#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} is VALID [2022-04-07 17:37:01,084 INFO L290 TraceCheckUtils]: 8: Hoare triple {4088#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} [109] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_11 4294967296))) (or (and (< v_main_~z~0_10 v_main_~z~0_11) (= v_main_~x~0_8 (+ v_main_~z~0_11 v_main_~x~0_9 (* (- 1) v_main_~z~0_10))) (< 0 .cse0) (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (not (<= (+ v_main_~z~0_10 v_it_2 1) v_main_~z~0_11)) (< 0 (mod (+ v_main_~z~0_11 (* v_it_2 4294967295)) 4294967296))))) (and (= v_main_~x~0_9 v_main_~x~0_8) (= v_main_~z~0_11 v_main_~z~0_10) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (<= .cse0 0) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_11, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_10, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4089#(and (<= main_~z~0 0) (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= 0 main_~z~0))} is VALID [2022-04-07 17:37:01,085 INFO L290 TraceCheckUtils]: 9: Hoare triple {4089#(and (<= main_~z~0 0) (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= 0 main_~z~0))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {4089#(and (<= main_~z~0 0) (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= 0 main_~z~0))} is VALID [2022-04-07 17:37:01,085 INFO L290 TraceCheckUtils]: 10: Hoare triple {4089#(and (<= main_~z~0 0) (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= 0 main_~z~0))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {4090#(and (<= main_~z~0 0) (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= 0 main_~z~0))} is VALID [2022-04-07 17:37:01,086 INFO L290 TraceCheckUtils]: 11: Hoare triple {4090#(and (<= main_~z~0 0) (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= 0 main_~z~0))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {4090#(and (<= main_~z~0 0) (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= 0 main_~z~0))} is VALID [2022-04-07 17:37:01,086 INFO L290 TraceCheckUtils]: 12: Hoare triple {4090#(and (<= main_~z~0 0) (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= 0 main_~z~0))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {4090#(and (<= main_~z~0 0) (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= 0 main_~z~0))} is VALID [2022-04-07 17:37:01,088 INFO L290 TraceCheckUtils]: 13: Hoare triple {4090#(and (<= main_~z~0 0) (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= 0 main_~z~0))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {4091#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))) (<= 0 main_~z~0))} is VALID [2022-04-07 17:37:01,088 INFO L290 TraceCheckUtils]: 14: Hoare triple {4091#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))) (<= 0 main_~z~0))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {4091#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))) (<= 0 main_~z~0))} is VALID [2022-04-07 17:37:01,089 INFO L272 TraceCheckUtils]: 15: Hoare triple {4091#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))) (<= 0 main_~z~0))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {4092#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:37:01,090 INFO L290 TraceCheckUtils]: 16: Hoare triple {4092#(not (= |__VERIFIER_assert_#in~cond| 0))} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4093#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:37:01,090 INFO L290 TraceCheckUtils]: 17: Hoare triple {4093#(not (= __VERIFIER_assert_~cond 0))} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {4082#false} is VALID [2022-04-07 17:37:01,090 INFO L290 TraceCheckUtils]: 18: Hoare triple {4082#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4082#false} is VALID [2022-04-07 17:37:01,090 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:37:01,090 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:37:01,091 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1005569032] [2022-04-07 17:37:01,091 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1005569032] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:37:01,091 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2125981327] [2022-04-07 17:37:01,091 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:37:01,091 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:37:01,091 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:37:01,096 INFO L229 MonitoredProcess]: Starting monitored process 16 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:37:01,102 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2022-04-07 17:37:01,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:37:01,129 INFO L263 TraceCheckSpWp]: Trace formula consists of 64 conjuncts, 9 conjunts are in the unsatisfiable core [2022-04-07 17:37:01,139 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:37:01,140 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:37:01,769 INFO L272 TraceCheckUtils]: 0: Hoare triple {4081#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4081#true} is VALID [2022-04-07 17:37:01,769 INFO L290 TraceCheckUtils]: 1: Hoare triple {4081#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4081#true} is VALID [2022-04-07 17:37:01,769 INFO L290 TraceCheckUtils]: 2: Hoare triple {4081#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4081#true} is VALID [2022-04-07 17:37:01,769 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4081#true} {4081#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4081#true} is VALID [2022-04-07 17:37:01,769 INFO L272 TraceCheckUtils]: 4: Hoare triple {4081#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4081#true} is VALID [2022-04-07 17:37:01,770 INFO L290 TraceCheckUtils]: 5: Hoare triple {4081#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4113#(= main_~n~0 main_~x~0)} is VALID [2022-04-07 17:37:01,770 INFO L290 TraceCheckUtils]: 6: Hoare triple {4113#(= main_~n~0 main_~x~0)} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {4117#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:37:01,770 INFO L290 TraceCheckUtils]: 7: Hoare triple {4117#(not (< 0 (mod main_~n~0 4294967296)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {4117#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:37:01,771 INFO L290 TraceCheckUtils]: 8: Hoare triple {4117#(not (< 0 (mod main_~n~0 4294967296)))} [109] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_11 4294967296))) (or (and (< v_main_~z~0_10 v_main_~z~0_11) (= v_main_~x~0_8 (+ v_main_~z~0_11 v_main_~x~0_9 (* (- 1) v_main_~z~0_10))) (< 0 .cse0) (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (not (<= (+ v_main_~z~0_10 v_it_2 1) v_main_~z~0_11)) (< 0 (mod (+ v_main_~z~0_11 (* v_it_2 4294967295)) 4294967296))))) (and (= v_main_~x~0_9 v_main_~x~0_8) (= v_main_~z~0_11 v_main_~z~0_10) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (<= .cse0 0) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_11, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_10, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4117#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:37:01,771 INFO L290 TraceCheckUtils]: 9: Hoare triple {4117#(not (< 0 (mod main_~n~0 4294967296)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {4127#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:37:01,771 INFO L290 TraceCheckUtils]: 10: Hoare triple {4127#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {4131#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:37:01,772 INFO L290 TraceCheckUtils]: 11: Hoare triple {4131#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {4131#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:37:01,772 INFO L290 TraceCheckUtils]: 12: Hoare triple {4131#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {4131#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:37:01,773 INFO L290 TraceCheckUtils]: 13: Hoare triple {4131#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {4127#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:37:01,774 INFO L290 TraceCheckUtils]: 14: Hoare triple {4127#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {4127#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:37:01,774 INFO L272 TraceCheckUtils]: 15: Hoare triple {4127#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {4147#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:37:01,775 INFO L290 TraceCheckUtils]: 16: Hoare triple {4147#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4151#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:37:01,775 INFO L290 TraceCheckUtils]: 17: Hoare triple {4151#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {4082#false} is VALID [2022-04-07 17:37:01,775 INFO L290 TraceCheckUtils]: 18: Hoare triple {4082#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4082#false} is VALID [2022-04-07 17:37:01,775 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 17:37:01,775 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 17:37:06,341 INFO L290 TraceCheckUtils]: 18: Hoare triple {4082#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4082#false} is VALID [2022-04-07 17:37:06,341 INFO L290 TraceCheckUtils]: 17: Hoare triple {4151#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {4082#false} is VALID [2022-04-07 17:37:06,341 INFO L290 TraceCheckUtils]: 16: Hoare triple {4147#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4151#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:37:06,342 INFO L272 TraceCheckUtils]: 15: Hoare triple {4167#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {4147#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:37:06,342 INFO L290 TraceCheckUtils]: 14: Hoare triple {4167#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {4167#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} is VALID [2022-04-07 17:37:08,356 WARN L290 TraceCheckUtils]: 13: Hoare triple {4174#(forall ((aux_mod_v_main_~z~0_54_31 Int)) (or (> 0 aux_mod_v_main_~z~0_54_31) (>= aux_mod_v_main_~z~0_54_31 4294967296) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_54_31) (and (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_54_31 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_54_31 (* 4294967296 aux_div_v_main_~z~0_54_31))) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_54_31 (* 4294967296 aux_div_v_main_~z~0_54_31))))))) (or (forall ((aux_div_v_main_~z~0_54_31 Int)) (not (= main_~z~0 (+ aux_mod_v_main_~z~0_54_31 (* 4294967296 aux_div_v_main_~z~0_54_31))))) (< 0 (mod main_~y~0 4294967296))))))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {4167#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} is UNKNOWN [2022-04-07 17:37:10,365 WARN L290 TraceCheckUtils]: 12: Hoare triple {4174#(forall ((aux_mod_v_main_~z~0_54_31 Int)) (or (> 0 aux_mod_v_main_~z~0_54_31) (>= aux_mod_v_main_~z~0_54_31 4294967296) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_54_31) (and (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_54_31 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_54_31 (* 4294967296 aux_div_v_main_~z~0_54_31))) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_54_31 (* 4294967296 aux_div_v_main_~z~0_54_31))))))) (or (forall ((aux_div_v_main_~z~0_54_31 Int)) (not (= main_~z~0 (+ aux_mod_v_main_~z~0_54_31 (* 4294967296 aux_div_v_main_~z~0_54_31))))) (< 0 (mod main_~y~0 4294967296))))))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {4174#(forall ((aux_mod_v_main_~z~0_54_31 Int)) (or (> 0 aux_mod_v_main_~z~0_54_31) (>= aux_mod_v_main_~z~0_54_31 4294967296) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_54_31) (and (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_54_31 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_54_31 (* 4294967296 aux_div_v_main_~z~0_54_31))) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_54_31 (* 4294967296 aux_div_v_main_~z~0_54_31))))))) (or (forall ((aux_div_v_main_~z~0_54_31 Int)) (not (= main_~z~0 (+ aux_mod_v_main_~z~0_54_31 (* 4294967296 aux_div_v_main_~z~0_54_31))))) (< 0 (mod main_~y~0 4294967296))))))} is UNKNOWN [2022-04-07 17:37:12,379 WARN L290 TraceCheckUtils]: 11: Hoare triple {4174#(forall ((aux_mod_v_main_~z~0_54_31 Int)) (or (> 0 aux_mod_v_main_~z~0_54_31) (>= aux_mod_v_main_~z~0_54_31 4294967296) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_54_31) (and (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_54_31 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_54_31 (* 4294967296 aux_div_v_main_~z~0_54_31))) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_54_31 (* 4294967296 aux_div_v_main_~z~0_54_31))))))) (or (forall ((aux_div_v_main_~z~0_54_31 Int)) (not (= main_~z~0 (+ aux_mod_v_main_~z~0_54_31 (* 4294967296 aux_div_v_main_~z~0_54_31))))) (< 0 (mod main_~y~0 4294967296))))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {4174#(forall ((aux_mod_v_main_~z~0_54_31 Int)) (or (> 0 aux_mod_v_main_~z~0_54_31) (>= aux_mod_v_main_~z~0_54_31 4294967296) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_54_31) (and (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_54_31 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_54_31 (* 4294967296 aux_div_v_main_~z~0_54_31))) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_54_31 (* 4294967296 aux_div_v_main_~z~0_54_31))))))) (or (forall ((aux_div_v_main_~z~0_54_31 Int)) (not (= main_~z~0 (+ aux_mod_v_main_~z~0_54_31 (* 4294967296 aux_div_v_main_~z~0_54_31))))) (< 0 (mod main_~y~0 4294967296))))))} is UNKNOWN [2022-04-07 17:37:12,383 INFO L290 TraceCheckUtils]: 10: Hoare triple {4167#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {4174#(forall ((aux_mod_v_main_~z~0_54_31 Int)) (or (> 0 aux_mod_v_main_~z~0_54_31) (>= aux_mod_v_main_~z~0_54_31 4294967296) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_54_31) (and (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_54_31 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_54_31 (* 4294967296 aux_div_v_main_~z~0_54_31))) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_54_31 (* 4294967296 aux_div_v_main_~z~0_54_31))))))) (or (forall ((aux_div_v_main_~z~0_54_31 Int)) (not (= main_~z~0 (+ aux_mod_v_main_~z~0_54_31 (* 4294967296 aux_div_v_main_~z~0_54_31))))) (< 0 (mod main_~y~0 4294967296))))))} is VALID [2022-04-07 17:37:12,384 INFO L290 TraceCheckUtils]: 9: Hoare triple {4117#(not (< 0 (mod main_~n~0 4294967296)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {4167#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} is VALID [2022-04-07 17:37:12,384 INFO L290 TraceCheckUtils]: 8: Hoare triple {4117#(not (< 0 (mod main_~n~0 4294967296)))} [109] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_11 4294967296))) (or (and (< v_main_~z~0_10 v_main_~z~0_11) (= v_main_~x~0_8 (+ v_main_~z~0_11 v_main_~x~0_9 (* (- 1) v_main_~z~0_10))) (< 0 .cse0) (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (not (<= (+ v_main_~z~0_10 v_it_2 1) v_main_~z~0_11)) (< 0 (mod (+ v_main_~z~0_11 (* v_it_2 4294967295)) 4294967296))))) (and (= v_main_~x~0_9 v_main_~x~0_8) (= v_main_~z~0_11 v_main_~z~0_10) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (<= .cse0 0) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_11, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_10, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4117#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:37:12,384 INFO L290 TraceCheckUtils]: 7: Hoare triple {4117#(not (< 0 (mod main_~n~0 4294967296)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {4117#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:37:12,385 INFO L290 TraceCheckUtils]: 6: Hoare triple {4196#(or (< 0 (mod main_~x~0 4294967296)) (not (< 0 (mod main_~n~0 4294967296))))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {4117#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:37:12,385 INFO L290 TraceCheckUtils]: 5: Hoare triple {4081#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4196#(or (< 0 (mod main_~x~0 4294967296)) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:37:12,385 INFO L272 TraceCheckUtils]: 4: Hoare triple {4081#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4081#true} is VALID [2022-04-07 17:37:12,385 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4081#true} {4081#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4081#true} is VALID [2022-04-07 17:37:12,385 INFO L290 TraceCheckUtils]: 2: Hoare triple {4081#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4081#true} is VALID [2022-04-07 17:37:12,385 INFO L290 TraceCheckUtils]: 1: Hoare triple {4081#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4081#true} is VALID [2022-04-07 17:37:12,386 INFO L272 TraceCheckUtils]: 0: Hoare triple {4081#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4081#true} is VALID [2022-04-07 17:37:12,386 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 17:37:12,386 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2125981327] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 17:37:12,386 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 17:37:12,386 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 8, 8] total 20 [2022-04-07 17:37:12,386 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1450954831] [2022-04-07 17:37:12,386 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 17:37:12,386 INFO L78 Accepts]: Start accepts. Automaton has has 20 states, 20 states have (on average 1.8) internal successors, (36), 17 states have internal predecessors, (36), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-07 17:37:12,387 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:37:12,387 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 20 states, 20 states have (on average 1.8) internal successors, (36), 17 states have internal predecessors, (36), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:37:18,486 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 43 edges. 40 inductive. 0 not inductive. 3 times theorem prover too weak to decide inductivity. [2022-04-07 17:37:18,487 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 20 states [2022-04-07 17:37:18,487 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:37:18,487 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2022-04-07 17:37:18,488 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=76, Invalid=304, Unknown=0, NotChecked=0, Total=380 [2022-04-07 17:37:18,488 INFO L87 Difference]: Start difference. First operand 42 states and 66 transitions. Second operand has 20 states, 20 states have (on average 1.8) internal successors, (36), 17 states have internal predecessors, (36), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:37:19,199 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:37:19,199 INFO L93 Difference]: Finished difference Result 62 states and 99 transitions. [2022-04-07 17:37:19,199 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-04-07 17:37:19,199 INFO L78 Accepts]: Start accepts. Automaton has has 20 states, 20 states have (on average 1.8) internal successors, (36), 17 states have internal predecessors, (36), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-07 17:37:19,200 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:37:19,200 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 20 states have (on average 1.8) internal successors, (36), 17 states have internal predecessors, (36), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:37:19,201 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 67 transitions. [2022-04-07 17:37:19,201 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 20 states have (on average 1.8) internal successors, (36), 17 states have internal predecessors, (36), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:37:19,202 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 67 transitions. [2022-04-07 17:37:19,202 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 15 states and 67 transitions. [2022-04-07 17:37:19,271 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 67 edges. 67 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:37:19,272 INFO L225 Difference]: With dead ends: 62 [2022-04-07 17:37:19,272 INFO L226 Difference]: Without dead ends: 58 [2022-04-07 17:37:19,273 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 62 GetRequests, 30 SyntacticMatches, 4 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 207 ImplicationChecksByTransitivity, 2.8s TimeCoverageRelationStatistics Valid=180, Invalid=690, Unknown=0, NotChecked=0, Total=870 [2022-04-07 17:37:19,273 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 45 mSDsluCounter, 76 mSDsCounter, 0 mSdLazyCounter, 176 mSolverCounterSat, 12 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 45 SdHoareTripleChecker+Valid, 88 SdHoareTripleChecker+Invalid, 215 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 12 IncrementalHoareTripleChecker+Valid, 176 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 27 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-07 17:37:19,273 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [45 Valid, 88 Invalid, 215 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [12 Valid, 176 Invalid, 0 Unknown, 27 Unchecked, 0.2s Time] [2022-04-07 17:37:19,273 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58 states. [2022-04-07 17:37:19,275 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58 to 45. [2022-04-07 17:37:19,275 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:37:19,278 INFO L82 GeneralOperation]: Start isEquivalent. First operand 58 states. Second operand has 45 states, 40 states have (on average 1.7) internal successors, (68), 40 states have internal predecessors, (68), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:37:19,279 INFO L74 IsIncluded]: Start isIncluded. First operand 58 states. Second operand has 45 states, 40 states have (on average 1.7) internal successors, (68), 40 states have internal predecessors, (68), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:37:19,279 INFO L87 Difference]: Start difference. First operand 58 states. Second operand has 45 states, 40 states have (on average 1.7) internal successors, (68), 40 states have internal predecessors, (68), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:37:19,280 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:37:19,280 INFO L93 Difference]: Finished difference Result 58 states and 94 transitions. [2022-04-07 17:37:19,280 INFO L276 IsEmpty]: Start isEmpty. Operand 58 states and 94 transitions. [2022-04-07 17:37:19,281 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:37:19,281 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:37:19,281 INFO L74 IsIncluded]: Start isIncluded. First operand has 45 states, 40 states have (on average 1.7) internal successors, (68), 40 states have internal predecessors, (68), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 58 states. [2022-04-07 17:37:19,281 INFO L87 Difference]: Start difference. First operand has 45 states, 40 states have (on average 1.7) internal successors, (68), 40 states have internal predecessors, (68), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 58 states. [2022-04-07 17:37:19,282 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:37:19,283 INFO L93 Difference]: Finished difference Result 58 states and 94 transitions. [2022-04-07 17:37:19,283 INFO L276 IsEmpty]: Start isEmpty. Operand 58 states and 94 transitions. [2022-04-07 17:37:19,283 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:37:19,283 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:37:19,283 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:37:19,283 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:37:19,283 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 45 states, 40 states have (on average 1.7) internal successors, (68), 40 states have internal predecessors, (68), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:37:19,284 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 72 transitions. [2022-04-07 17:37:19,284 INFO L78 Accepts]: Start accepts. Automaton has 45 states and 72 transitions. Word has length 19 [2022-04-07 17:37:19,284 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:37:19,286 INFO L478 AbstractCegarLoop]: Abstraction has 45 states and 72 transitions. [2022-04-07 17:37:19,286 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 20 states, 20 states have (on average 1.8) internal successors, (36), 17 states have internal predecessors, (36), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:37:19,286 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 72 transitions. [2022-04-07 17:37:19,287 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-07 17:37:19,287 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:37:19,287 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:37:19,313 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Forceful destruction successful, exit code 0 [2022-04-07 17:37:19,503 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 16 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable16 [2022-04-07 17:37:19,503 INFO L403 AbstractCegarLoop]: === Iteration 18 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:37:19,504 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:37:19,504 INFO L85 PathProgramCache]: Analyzing trace with hash 857687030, now seen corresponding path program 1 times [2022-04-07 17:37:19,504 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:37:19,504 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1602206729] [2022-04-07 17:37:19,504 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:37:19,504 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:37:19,512 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.0))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-07 17:37:19,514 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.1))) (+ main_~z~0_8 .cse0 (* (- 4294967296) (div (+ main_~z~0_8 .cse0) 4294967296)))) 0)) [2022-04-07 17:37:19,517 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:37:19,524 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.3))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-07 17:37:19,529 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.4))) (+ main_~z~0_8 .cse0 (* (- 4294967296) (div (+ main_~z~0_8 .cse0) 4294967296)))) 0)) [2022-04-07 17:37:19,670 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:37:19,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:37:19,684 INFO L290 TraceCheckUtils]: 0: Hoare triple {4476#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4463#true} is VALID [2022-04-07 17:37:19,684 INFO L290 TraceCheckUtils]: 1: Hoare triple {4463#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4463#true} is VALID [2022-04-07 17:37:19,684 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {4463#true} {4463#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4463#true} is VALID [2022-04-07 17:37:19,685 INFO L272 TraceCheckUtils]: 0: Hoare triple {4463#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4476#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:37:19,685 INFO L290 TraceCheckUtils]: 1: Hoare triple {4476#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4463#true} is VALID [2022-04-07 17:37:19,685 INFO L290 TraceCheckUtils]: 2: Hoare triple {4463#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4463#true} is VALID [2022-04-07 17:37:19,685 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4463#true} {4463#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4463#true} is VALID [2022-04-07 17:37:19,685 INFO L272 TraceCheckUtils]: 4: Hoare triple {4463#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4463#true} is VALID [2022-04-07 17:37:19,686 INFO L290 TraceCheckUtils]: 5: Hoare triple {4463#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4468#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 17:37:19,687 INFO L290 TraceCheckUtils]: 6: Hoare triple {4468#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {4469#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:37:19,687 INFO L290 TraceCheckUtils]: 7: Hoare triple {4469#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {4470#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} is VALID [2022-04-07 17:37:19,689 INFO L290 TraceCheckUtils]: 8: Hoare triple {4470#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} [109] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_11 4294967296))) (or (and (< v_main_~z~0_10 v_main_~z~0_11) (= v_main_~x~0_8 (+ v_main_~z~0_11 v_main_~x~0_9 (* (- 1) v_main_~z~0_10))) (< 0 .cse0) (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (not (<= (+ v_main_~z~0_10 v_it_2 1) v_main_~z~0_11)) (< 0 (mod (+ v_main_~z~0_11 (* v_it_2 4294967295)) 4294967296))))) (and (= v_main_~x~0_9 v_main_~x~0_8) (= v_main_~z~0_11 v_main_~z~0_10) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (<= .cse0 0) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_11, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_10, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4471#(<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)))} is VALID [2022-04-07 17:37:19,690 INFO L290 TraceCheckUtils]: 9: Hoare triple {4471#(<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {4472#(and (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} is VALID [2022-04-07 17:37:19,690 INFO L290 TraceCheckUtils]: 10: Hoare triple {4472#(and (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {4472#(and (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} is VALID [2022-04-07 17:37:19,691 INFO L290 TraceCheckUtils]: 11: Hoare triple {4472#(and (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {4472#(and (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} is VALID [2022-04-07 17:37:19,693 INFO L290 TraceCheckUtils]: 12: Hoare triple {4472#(and (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} [118] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_13 4294967296))) (or (and (= v_main_~z~0_12 (+ v_main_~x~0_11 v_main_~z~0_13 (* (- 1) v_main_~x~0_10))) (< v_main_~x~0_11 v_main_~x~0_10) (forall ((v_it_5 Int)) (or (< 0 (mod (+ v_main_~z~0_13 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)) (not (<= (+ v_main_~x~0_11 v_it_5 1) v_main_~x~0_10)))) (< 0 .cse0)) (and (= v_main_~x~0_11 v_main_~x~0_10) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (<= .cse0 0) (= v_main_~z~0_13 v_main_~z~0_12) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_13, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_12, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {4473#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} is VALID [2022-04-07 17:37:19,695 INFO L290 TraceCheckUtils]: 13: Hoare triple {4473#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {4471#(<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)))} is VALID [2022-04-07 17:37:19,695 INFO L290 TraceCheckUtils]: 14: Hoare triple {4471#(<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {4471#(<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)))} is VALID [2022-04-07 17:37:19,697 INFO L272 TraceCheckUtils]: 15: Hoare triple {4471#(<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {4474#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:37:19,698 INFO L290 TraceCheckUtils]: 16: Hoare triple {4474#(not (= |__VERIFIER_assert_#in~cond| 0))} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4475#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:37:19,698 INFO L290 TraceCheckUtils]: 17: Hoare triple {4475#(not (= __VERIFIER_assert_~cond 0))} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {4464#false} is VALID [2022-04-07 17:37:19,698 INFO L290 TraceCheckUtils]: 18: Hoare triple {4464#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4464#false} is VALID [2022-04-07 17:37:19,699 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:37:19,699 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:37:19,699 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1602206729] [2022-04-07 17:37:19,699 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1602206729] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:37:19,699 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1773974070] [2022-04-07 17:37:19,699 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:37:19,699 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:37:19,699 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:37:19,701 INFO L229 MonitoredProcess]: Starting monitored process 17 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:37:19,702 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2022-04-07 17:37:19,732 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:37:19,732 INFO L263 TraceCheckSpWp]: Trace formula consists of 64 conjuncts, 7 conjunts are in the unsatisfiable core [2022-04-07 17:37:19,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:37:19,739 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:37:41,129 INFO L272 TraceCheckUtils]: 0: Hoare triple {4463#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4463#true} is VALID [2022-04-07 17:37:41,130 INFO L290 TraceCheckUtils]: 1: Hoare triple {4463#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4463#true} is VALID [2022-04-07 17:37:41,130 INFO L290 TraceCheckUtils]: 2: Hoare triple {4463#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4463#true} is VALID [2022-04-07 17:37:41,130 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4463#true} {4463#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4463#true} is VALID [2022-04-07 17:37:41,130 INFO L272 TraceCheckUtils]: 4: Hoare triple {4463#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4463#true} is VALID [2022-04-07 17:37:41,130 INFO L290 TraceCheckUtils]: 5: Hoare triple {4463#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4495#(= main_~n~0 main_~x~0)} is VALID [2022-04-07 17:37:41,131 INFO L290 TraceCheckUtils]: 6: Hoare triple {4495#(= main_~n~0 main_~x~0)} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {4499#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:37:41,131 INFO L290 TraceCheckUtils]: 7: Hoare triple {4499#(not (< 0 (mod main_~n~0 4294967296)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {4499#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:37:41,131 INFO L290 TraceCheckUtils]: 8: Hoare triple {4499#(not (< 0 (mod main_~n~0 4294967296)))} [109] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_11 4294967296))) (or (and (< v_main_~z~0_10 v_main_~z~0_11) (= v_main_~x~0_8 (+ v_main_~z~0_11 v_main_~x~0_9 (* (- 1) v_main_~z~0_10))) (< 0 .cse0) (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (not (<= (+ v_main_~z~0_10 v_it_2 1) v_main_~z~0_11)) (< 0 (mod (+ v_main_~z~0_11 (* v_it_2 4294967295)) 4294967296))))) (and (= v_main_~x~0_9 v_main_~x~0_8) (= v_main_~z~0_11 v_main_~z~0_10) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (<= .cse0 0) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_11, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_10, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4499#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:37:41,135 INFO L290 TraceCheckUtils]: 9: Hoare triple {4499#(not (< 0 (mod main_~n~0 4294967296)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {4499#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:37:41,135 INFO L290 TraceCheckUtils]: 10: Hoare triple {4499#(not (< 0 (mod main_~n~0 4294967296)))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {4499#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:37:41,135 INFO L290 TraceCheckUtils]: 11: Hoare triple {4499#(not (< 0 (mod main_~n~0 4294967296)))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {4499#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:37:41,136 INFO L290 TraceCheckUtils]: 12: Hoare triple {4499#(not (< 0 (mod main_~n~0 4294967296)))} [118] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_13 4294967296))) (or (and (= v_main_~z~0_12 (+ v_main_~x~0_11 v_main_~z~0_13 (* (- 1) v_main_~x~0_10))) (< v_main_~x~0_11 v_main_~x~0_10) (forall ((v_it_5 Int)) (or (< 0 (mod (+ v_main_~z~0_13 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)) (not (<= (+ v_main_~x~0_11 v_it_5 1) v_main_~x~0_10)))) (< 0 .cse0)) (and (= v_main_~x~0_11 v_main_~x~0_10) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (<= .cse0 0) (= v_main_~z~0_13 v_main_~z~0_12) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_13, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_12, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {4499#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:37:41,137 INFO L290 TraceCheckUtils]: 13: Hoare triple {4499#(not (< 0 (mod main_~n~0 4294967296)))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {4472#(and (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} is VALID [2022-04-07 17:37:41,137 INFO L290 TraceCheckUtils]: 14: Hoare triple {4472#(and (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {4472#(and (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} is VALID [2022-04-07 17:37:41,139 INFO L272 TraceCheckUtils]: 15: Hoare triple {4472#(and (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296)))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {4527#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:37:41,139 INFO L290 TraceCheckUtils]: 16: Hoare triple {4527#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4531#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:37:41,140 INFO L290 TraceCheckUtils]: 17: Hoare triple {4531#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {4464#false} is VALID [2022-04-07 17:37:41,140 INFO L290 TraceCheckUtils]: 18: Hoare triple {4464#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4464#false} is VALID [2022-04-07 17:37:41,140 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-07 17:37:41,140 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-07 17:37:41,140 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1773974070] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 17:37:41,140 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-07 17:37:41,140 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [11] total 15 [2022-04-07 17:37:41,140 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [124930458] [2022-04-07 17:37:41,140 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 17:37:41,141 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-07 17:37:41,141 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:37:41,141 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:37:41,157 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 19 edges. 19 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:37:41,157 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-04-07 17:37:41,157 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:37:41,157 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-04-07 17:37:41,158 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=166, Unknown=0, NotChecked=0, Total=210 [2022-04-07 17:37:41,158 INFO L87 Difference]: Start difference. First operand 45 states and 72 transitions. Second operand has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:37:41,317 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:37:41,317 INFO L93 Difference]: Finished difference Result 51 states and 79 transitions. [2022-04-07 17:37:41,317 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-04-07 17:37:41,317 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-07 17:37:41,317 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:37:41,317 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:37:41,318 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 48 transitions. [2022-04-07 17:37:41,318 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:37:41,319 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 48 transitions. [2022-04-07 17:37:41,319 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 9 states and 48 transitions. [2022-04-07 17:37:41,380 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 48 edges. 48 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:37:41,380 INFO L225 Difference]: With dead ends: 51 [2022-04-07 17:37:41,380 INFO L226 Difference]: Without dead ends: 48 [2022-04-07 17:37:41,381 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 34 GetRequests, 16 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 68 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=66, Invalid=240, Unknown=0, NotChecked=0, Total=306 [2022-04-07 17:37:41,381 INFO L913 BasicCegarLoop]: 16 mSDtfsCounter, 12 mSDsluCounter, 68 mSDsCounter, 0 mSdLazyCounter, 31 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 12 SdHoareTripleChecker+Valid, 84 SdHoareTripleChecker+Invalid, 43 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 31 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 10 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 17:37:41,381 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [12 Valid, 84 Invalid, 43 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 31 Invalid, 0 Unknown, 10 Unchecked, 0.0s Time] [2022-04-07 17:37:41,381 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states. [2022-04-07 17:37:41,382 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 44. [2022-04-07 17:37:41,383 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:37:41,383 INFO L82 GeneralOperation]: Start isEquivalent. First operand 48 states. Second operand has 44 states, 39 states have (on average 1.6923076923076923) internal successors, (66), 39 states have internal predecessors, (66), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:37:41,383 INFO L74 IsIncluded]: Start isIncluded. First operand 48 states. Second operand has 44 states, 39 states have (on average 1.6923076923076923) internal successors, (66), 39 states have internal predecessors, (66), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:37:41,383 INFO L87 Difference]: Start difference. First operand 48 states. Second operand has 44 states, 39 states have (on average 1.6923076923076923) internal successors, (66), 39 states have internal predecessors, (66), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:37:41,384 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:37:41,384 INFO L93 Difference]: Finished difference Result 48 states and 76 transitions. [2022-04-07 17:37:41,384 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 76 transitions. [2022-04-07 17:37:41,384 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:37:41,384 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:37:41,385 INFO L74 IsIncluded]: Start isIncluded. First operand has 44 states, 39 states have (on average 1.6923076923076923) internal successors, (66), 39 states have internal predecessors, (66), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 48 states. [2022-04-07 17:37:41,385 INFO L87 Difference]: Start difference. First operand has 44 states, 39 states have (on average 1.6923076923076923) internal successors, (66), 39 states have internal predecessors, (66), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 48 states. [2022-04-07 17:37:41,386 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:37:41,386 INFO L93 Difference]: Finished difference Result 48 states and 76 transitions. [2022-04-07 17:37:41,386 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 76 transitions. [2022-04-07 17:37:41,386 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:37:41,386 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:37:41,386 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:37:41,386 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:37:41,386 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 44 states, 39 states have (on average 1.6923076923076923) internal successors, (66), 39 states have internal predecessors, (66), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:37:41,387 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 70 transitions. [2022-04-07 17:37:41,387 INFO L78 Accepts]: Start accepts. Automaton has 44 states and 70 transitions. Word has length 19 [2022-04-07 17:37:41,387 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:37:41,387 INFO L478 AbstractCegarLoop]: Abstraction has 44 states and 70 transitions. [2022-04-07 17:37:41,387 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:37:41,387 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 70 transitions. [2022-04-07 17:37:41,388 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-07 17:37:41,388 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:37:41,388 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:37:41,404 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Forceful destruction successful, exit code 0 [2022-04-07 17:37:41,588 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 17 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable17 [2022-04-07 17:37:41,588 INFO L403 AbstractCegarLoop]: === Iteration 19 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:37:41,589 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:37:41,589 INFO L85 PathProgramCache]: Analyzing trace with hash -949517359, now seen corresponding path program 1 times [2022-04-07 17:37:41,589 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:37:41,589 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [896738366] [2022-04-07 17:37:41,589 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:37:41,589 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:37:41,597 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.0))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-07 17:37:41,598 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.1))) (+ .cse0 main_~x~0_8 (* (- 4294967296) (div (+ .cse0 main_~x~0_8) 4294967296)))) 0)) [2022-04-07 17:37:41,606 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:37:41,612 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.2))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-04-07 17:37:41,617 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.3))) (+ .cse0 main_~x~0_8 (* (- 4294967296) (div (+ .cse0 main_~x~0_8) 4294967296)))) 0)) [2022-04-07 17:37:41,751 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:37:41,752 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:37:41,754 INFO L290 TraceCheckUtils]: 0: Hoare triple {4746#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4734#true} is VALID [2022-04-07 17:37:41,754 INFO L290 TraceCheckUtils]: 1: Hoare triple {4734#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4734#true} is VALID [2022-04-07 17:37:41,754 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {4734#true} {4734#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4734#true} is VALID [2022-04-07 17:37:41,755 INFO L272 TraceCheckUtils]: 0: Hoare triple {4734#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4746#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:37:41,755 INFO L290 TraceCheckUtils]: 1: Hoare triple {4746#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4734#true} is VALID [2022-04-07 17:37:41,755 INFO L290 TraceCheckUtils]: 2: Hoare triple {4734#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4734#true} is VALID [2022-04-07 17:37:41,755 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4734#true} {4734#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4734#true} is VALID [2022-04-07 17:37:41,755 INFO L272 TraceCheckUtils]: 4: Hoare triple {4734#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4734#true} is VALID [2022-04-07 17:37:41,756 INFO L290 TraceCheckUtils]: 5: Hoare triple {4734#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4739#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 17:37:41,756 INFO L290 TraceCheckUtils]: 6: Hoare triple {4739#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {4740#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:37:41,757 INFO L290 TraceCheckUtils]: 7: Hoare triple {4740#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {4741#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} is VALID [2022-04-07 17:37:41,758 INFO L290 TraceCheckUtils]: 8: Hoare triple {4741#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))))} [109] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_11 4294967296))) (or (and (< v_main_~z~0_10 v_main_~z~0_11) (= v_main_~x~0_8 (+ v_main_~z~0_11 v_main_~x~0_9 (* (- 1) v_main_~z~0_10))) (< 0 .cse0) (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (not (<= (+ v_main_~z~0_10 v_it_2 1) v_main_~z~0_11)) (< 0 (mod (+ v_main_~z~0_11 (* v_it_2 4294967295)) 4294967296))))) (and (= v_main_~x~0_9 v_main_~x~0_8) (= v_main_~z~0_11 v_main_~z~0_10) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (<= .cse0 0) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_11, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_10, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4742#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} is VALID [2022-04-07 17:37:41,759 INFO L290 TraceCheckUtils]: 9: Hoare triple {4742#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {4743#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:37:41,759 INFO L290 TraceCheckUtils]: 10: Hoare triple {4743#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {4743#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:37:41,760 INFO L290 TraceCheckUtils]: 11: Hoare triple {4743#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [115] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (= v_main_~y~0_10 (+ (* (- 1) v_main_~x~0_6) v_main_~y~0_11 v_main_~x~0_7)) (< v_main_~x~0_6 v_main_~x~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_11 v_main_~y~0_10) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_11, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_10, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {4743#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:37:41,760 INFO L290 TraceCheckUtils]: 12: Hoare triple {4743#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {4743#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:37:41,761 INFO L290 TraceCheckUtils]: 13: Hoare triple {4743#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {4743#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:37:41,761 INFO L290 TraceCheckUtils]: 14: Hoare triple {4743#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {4743#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:37:41,762 INFO L272 TraceCheckUtils]: 15: Hoare triple {4743#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {4744#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:37:41,762 INFO L290 TraceCheckUtils]: 16: Hoare triple {4744#(not (= |__VERIFIER_assert_#in~cond| 0))} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4745#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:37:41,763 INFO L290 TraceCheckUtils]: 17: Hoare triple {4745#(not (= __VERIFIER_assert_~cond 0))} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {4735#false} is VALID [2022-04-07 17:37:41,763 INFO L290 TraceCheckUtils]: 18: Hoare triple {4735#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4735#false} is VALID [2022-04-07 17:37:41,763 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 17:37:41,763 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:37:41,763 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [896738366] [2022-04-07 17:37:41,763 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [896738366] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:37:41,764 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2110394206] [2022-04-07 17:37:41,764 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:37:41,764 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:37:41,764 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:37:41,764 INFO L229 MonitoredProcess]: Starting monitored process 18 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:37:41,769 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2022-04-07 17:37:41,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:37:41,799 INFO L263 TraceCheckSpWp]: Trace formula consists of 64 conjuncts, 7 conjunts are in the unsatisfiable core [2022-04-07 17:37:41,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:37:41,805 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:37:42,329 INFO L272 TraceCheckUtils]: 0: Hoare triple {4734#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4734#true} is VALID [2022-04-07 17:37:42,329 INFO L290 TraceCheckUtils]: 1: Hoare triple {4734#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4734#true} is VALID [2022-04-07 17:37:42,329 INFO L290 TraceCheckUtils]: 2: Hoare triple {4734#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4734#true} is VALID [2022-04-07 17:37:42,329 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4734#true} {4734#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4734#true} is VALID [2022-04-07 17:37:42,330 INFO L272 TraceCheckUtils]: 4: Hoare triple {4734#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4734#true} is VALID [2022-04-07 17:37:42,330 INFO L290 TraceCheckUtils]: 5: Hoare triple {4734#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4765#(= main_~n~0 main_~x~0)} is VALID [2022-04-07 17:37:42,330 INFO L290 TraceCheckUtils]: 6: Hoare triple {4765#(= main_~n~0 main_~x~0)} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {4769#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:37:42,330 INFO L290 TraceCheckUtils]: 7: Hoare triple {4769#(not (< 0 (mod main_~n~0 4294967296)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {4769#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:37:42,331 INFO L290 TraceCheckUtils]: 8: Hoare triple {4769#(not (< 0 (mod main_~n~0 4294967296)))} [109] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_11 4294967296))) (or (and (< v_main_~z~0_10 v_main_~z~0_11) (= v_main_~x~0_8 (+ v_main_~z~0_11 v_main_~x~0_9 (* (- 1) v_main_~z~0_10))) (< 0 .cse0) (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (not (<= (+ v_main_~z~0_10 v_it_2 1) v_main_~z~0_11)) (< 0 (mod (+ v_main_~z~0_11 (* v_it_2 4294967295)) 4294967296))))) (and (= v_main_~x~0_9 v_main_~x~0_8) (= v_main_~z~0_11 v_main_~z~0_10) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (<= .cse0 0) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_11, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_10, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4769#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:37:42,331 INFO L290 TraceCheckUtils]: 9: Hoare triple {4769#(not (< 0 (mod main_~n~0 4294967296)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {4779#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:37:42,332 INFO L290 TraceCheckUtils]: 10: Hoare triple {4779#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {4779#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:37:42,332 INFO L290 TraceCheckUtils]: 11: Hoare triple {4779#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [115] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (= v_main_~y~0_10 (+ (* (- 1) v_main_~x~0_6) v_main_~y~0_11 v_main_~x~0_7)) (< v_main_~x~0_6 v_main_~x~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_11 v_main_~y~0_10) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_11, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_10, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {4779#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:37:42,333 INFO L290 TraceCheckUtils]: 12: Hoare triple {4779#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {4779#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:37:42,333 INFO L290 TraceCheckUtils]: 13: Hoare triple {4779#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {4779#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:37:42,333 INFO L290 TraceCheckUtils]: 14: Hoare triple {4779#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {4779#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:37:42,334 INFO L272 TraceCheckUtils]: 15: Hoare triple {4779#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {4798#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:37:42,334 INFO L290 TraceCheckUtils]: 16: Hoare triple {4798#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4802#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:37:42,335 INFO L290 TraceCheckUtils]: 17: Hoare triple {4802#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {4735#false} is VALID [2022-04-07 17:37:42,335 INFO L290 TraceCheckUtils]: 18: Hoare triple {4735#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4735#false} is VALID [2022-04-07 17:37:42,335 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-07 17:37:42,335 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-07 17:37:42,335 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2110394206] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 17:37:42,335 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-07 17:37:42,335 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [10] total 15 [2022-04-07 17:37:42,335 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1540238204] [2022-04-07 17:37:42,335 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 17:37:42,336 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-07 17:37:42,336 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:37:42,336 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:37:42,351 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 19 edges. 19 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:37:42,352 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-04-07 17:37:42,352 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:37:42,352 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-04-07 17:37:42,352 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=166, Unknown=0, NotChecked=0, Total=210 [2022-04-07 17:37:42,352 INFO L87 Difference]: Start difference. First operand 44 states and 70 transitions. Second operand has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:37:42,491 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:37:42,491 INFO L93 Difference]: Finished difference Result 54 states and 84 transitions. [2022-04-07 17:37:42,492 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-04-07 17:37:42,492 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-07 17:37:42,492 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:37:42,492 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:37:42,492 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 46 transitions. [2022-04-07 17:37:42,493 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:37:42,493 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 46 transitions. [2022-04-07 17:37:42,493 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 9 states and 46 transitions. [2022-04-07 17:37:42,530 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 46 edges. 46 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:37:42,531 INFO L225 Difference]: With dead ends: 54 [2022-04-07 17:37:42,531 INFO L226 Difference]: Without dead ends: 51 [2022-04-07 17:37:42,531 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 57 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=66, Invalid=240, Unknown=0, NotChecked=0, Total=306 [2022-04-07 17:37:42,532 INFO L913 BasicCegarLoop]: 15 mSDtfsCounter, 14 mSDsluCounter, 66 mSDsCounter, 0 mSdLazyCounter, 31 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 14 SdHoareTripleChecker+Valid, 81 SdHoareTripleChecker+Invalid, 43 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 31 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 12 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 17:37:42,532 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [14 Valid, 81 Invalid, 43 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 31 Invalid, 0 Unknown, 12 Unchecked, 0.0s Time] [2022-04-07 17:37:42,532 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states. [2022-04-07 17:37:42,533 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 43. [2022-04-07 17:37:42,533 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:37:42,534 INFO L82 GeneralOperation]: Start isEquivalent. First operand 51 states. Second operand has 43 states, 38 states have (on average 1.6842105263157894) internal successors, (64), 38 states have internal predecessors, (64), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:37:42,534 INFO L74 IsIncluded]: Start isIncluded. First operand 51 states. Second operand has 43 states, 38 states have (on average 1.6842105263157894) internal successors, (64), 38 states have internal predecessors, (64), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:37:42,534 INFO L87 Difference]: Start difference. First operand 51 states. Second operand has 43 states, 38 states have (on average 1.6842105263157894) internal successors, (64), 38 states have internal predecessors, (64), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:37:42,535 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:37:42,535 INFO L93 Difference]: Finished difference Result 51 states and 81 transitions. [2022-04-07 17:37:42,535 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 81 transitions. [2022-04-07 17:37:42,535 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:37:42,535 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:37:42,535 INFO L74 IsIncluded]: Start isIncluded. First operand has 43 states, 38 states have (on average 1.6842105263157894) internal successors, (64), 38 states have internal predecessors, (64), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 51 states. [2022-04-07 17:37:42,536 INFO L87 Difference]: Start difference. First operand has 43 states, 38 states have (on average 1.6842105263157894) internal successors, (64), 38 states have internal predecessors, (64), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 51 states. [2022-04-07 17:37:42,537 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:37:42,537 INFO L93 Difference]: Finished difference Result 51 states and 81 transitions. [2022-04-07 17:37:42,537 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 81 transitions. [2022-04-07 17:37:42,537 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:37:42,537 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:37:42,537 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:37:42,537 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:37:42,537 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 43 states, 38 states have (on average 1.6842105263157894) internal successors, (64), 38 states have internal predecessors, (64), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:37:42,538 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 68 transitions. [2022-04-07 17:37:42,538 INFO L78 Accepts]: Start accepts. Automaton has 43 states and 68 transitions. Word has length 19 [2022-04-07 17:37:42,538 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:37:42,538 INFO L478 AbstractCegarLoop]: Abstraction has 43 states and 68 transitions. [2022-04-07 17:37:42,538 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 6 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:37:42,538 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 68 transitions. [2022-04-07 17:37:42,539 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-07 17:37:42,539 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:37:42,539 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:37:42,560 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Forceful destruction successful, exit code 0 [2022-04-07 17:37:42,751 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18,18 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:37:42,751 INFO L403 AbstractCegarLoop]: === Iteration 20 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:37:42,752 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:37:42,752 INFO L85 PathProgramCache]: Analyzing trace with hash -593960234, now seen corresponding path program 1 times [2022-04-07 17:37:42,752 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:37:42,752 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1012931297] [2022-04-07 17:37:42,752 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:37:42,752 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:37:42,759 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_1.0))) (+ main_~x~0_5 .cse0 (* (- 4294967296) (div (+ main_~x~0_5 .cse0) 4294967296)))) 0)) [2022-04-07 17:37:42,760 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.1))) (+ main_~y~0_6 .cse0 (* (- 4294967296) (div (+ main_~y~0_6 .cse0) 4294967296)))) 0)) [2022-04-07 17:37:42,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:37:42,788 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_1.2))) (+ main_~x~0_5 .cse0 (* (- 4294967296) (div (+ main_~x~0_5 .cse0) 4294967296)))) 0)) [2022-04-07 17:37:42,794 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.3))) (+ main_~y~0_6 .cse0 (* (- 4294967296) (div (+ main_~y~0_6 .cse0) 4294967296)))) 0)) [2022-04-07 17:37:43,018 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:37:43,019 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:37:43,021 INFO L290 TraceCheckUtils]: 0: Hoare triple {5027#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5013#true} is VALID [2022-04-07 17:37:43,022 INFO L290 TraceCheckUtils]: 1: Hoare triple {5013#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5013#true} is VALID [2022-04-07 17:37:43,022 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {5013#true} {5013#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5013#true} is VALID [2022-04-07 17:37:43,022 INFO L272 TraceCheckUtils]: 0: Hoare triple {5013#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5027#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:37:43,022 INFO L290 TraceCheckUtils]: 1: Hoare triple {5027#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5013#true} is VALID [2022-04-07 17:37:43,022 INFO L290 TraceCheckUtils]: 2: Hoare triple {5013#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5013#true} is VALID [2022-04-07 17:37:43,022 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5013#true} {5013#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5013#true} is VALID [2022-04-07 17:37:43,022 INFO L272 TraceCheckUtils]: 4: Hoare triple {5013#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5013#true} is VALID [2022-04-07 17:37:43,023 INFO L290 TraceCheckUtils]: 5: Hoare triple {5013#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {5018#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 17:37:43,031 INFO L290 TraceCheckUtils]: 6: Hoare triple {5018#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [105] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~y~0_9 v_main_~y~0_8) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0)) (and (= v_main_~x~0_3 (+ (* (- 1) v_main_~y~0_8) v_main_~x~0_4 v_main_~y~0_9)) (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_9 v_it_1 1) v_main_~y~0_8)))) (< 0 .cse0) (< v_main_~y~0_9 v_main_~y~0_8)))) InVars {main_~y~0=v_main_~y~0_9, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_8, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5019#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-07 17:37:43,032 INFO L290 TraceCheckUtils]: 7: Hoare triple {5019#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {5020#(or (< (* (div main_~y~0 4294967296) 4294967296) main_~y~0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-07 17:37:43,032 INFO L290 TraceCheckUtils]: 8: Hoare triple {5020#(or (< (* (div main_~y~0 4294967296) 4294967296) main_~y~0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {5021#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (and (< (* (div main_~y~0 4294967296) 4294967296) main_~y~0) (= (+ main_~y~0 (* (- 1) main_~z~0)) 0)))} is VALID [2022-04-07 17:37:43,033 INFO L290 TraceCheckUtils]: 9: Hoare triple {5021#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (and (< (* (div main_~y~0 4294967296) 4294967296) main_~y~0) (= (+ main_~y~0 (* (- 1) main_~z~0)) 0)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {5022#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} is VALID [2022-04-07 17:37:43,034 INFO L290 TraceCheckUtils]: 10: Hoare triple {5022#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} [112] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_5 4294967296))) (or (and (= v_main_~y~0_4 v_main_~y~0_5) (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= |v_main_#t~post9_3| |v_main_#t~post9_1|) (<= .cse0 0)) (and (= v_main_~y~0_4 (+ v_main_~y~0_5 v_main_~z~0_3 (* (- 1) v_main_~z~0_2))) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= (+ v_main_~z~0_3 v_it_3 1) v_main_~z~0_2)) (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_5 (* v_it_3 4294967295)) 4294967296)))) (< v_main_~z~0_3 v_main_~z~0_2)))) InVars {main_~y~0=v_main_~y~0_5, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5023#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} is VALID [2022-04-07 17:37:43,034 INFO L290 TraceCheckUtils]: 11: Hoare triple {5023#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {5023#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} is VALID [2022-04-07 17:37:43,035 INFO L290 TraceCheckUtils]: 12: Hoare triple {5023#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {5023#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} is VALID [2022-04-07 17:37:43,035 INFO L290 TraceCheckUtils]: 13: Hoare triple {5023#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {5024#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:37:43,036 INFO L290 TraceCheckUtils]: 14: Hoare triple {5024#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {5024#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:37:43,037 INFO L272 TraceCheckUtils]: 15: Hoare triple {5024#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {5025#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:37:43,037 INFO L290 TraceCheckUtils]: 16: Hoare triple {5025#(not (= |__VERIFIER_assert_#in~cond| 0))} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5026#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:37:43,037 INFO L290 TraceCheckUtils]: 17: Hoare triple {5026#(not (= __VERIFIER_assert_~cond 0))} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {5014#false} is VALID [2022-04-07 17:37:43,038 INFO L290 TraceCheckUtils]: 18: Hoare triple {5014#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5014#false} is VALID [2022-04-07 17:37:43,038 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:37:43,038 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:37:43,038 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1012931297] [2022-04-07 17:37:43,038 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1012931297] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:37:43,038 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1474550284] [2022-04-07 17:37:43,038 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:37:43,038 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:37:43,038 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:37:43,039 INFO L229 MonitoredProcess]: Starting monitored process 19 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:37:43,040 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2022-04-07 17:37:43,109 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:37:43,110 INFO L263 TraceCheckSpWp]: Trace formula consists of 64 conjuncts, 12 conjunts are in the unsatisfiable core [2022-04-07 17:37:43,123 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:37:43,124 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:37:44,424 INFO L272 TraceCheckUtils]: 0: Hoare triple {5013#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5013#true} is VALID [2022-04-07 17:37:44,424 INFO L290 TraceCheckUtils]: 1: Hoare triple {5013#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5013#true} is VALID [2022-04-07 17:37:44,424 INFO L290 TraceCheckUtils]: 2: Hoare triple {5013#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5013#true} is VALID [2022-04-07 17:37:44,424 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5013#true} {5013#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5013#true} is VALID [2022-04-07 17:37:44,424 INFO L272 TraceCheckUtils]: 4: Hoare triple {5013#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5013#true} is VALID [2022-04-07 17:37:44,425 INFO L290 TraceCheckUtils]: 5: Hoare triple {5013#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {5018#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 17:37:44,433 INFO L290 TraceCheckUtils]: 6: Hoare triple {5018#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [105] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~y~0_9 v_main_~y~0_8) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0)) (and (= v_main_~x~0_3 (+ (* (- 1) v_main_~y~0_8) v_main_~x~0_4 v_main_~y~0_9)) (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_9 v_it_1 1) v_main_~y~0_8)))) (< 0 .cse0) (< v_main_~y~0_9 v_main_~y~0_8)))) InVars {main_~y~0=v_main_~y~0_9, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_8, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5049#(or (and (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)))} is VALID [2022-04-07 17:37:44,435 INFO L290 TraceCheckUtils]: 7: Hoare triple {5049#(or (and (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {5049#(or (and (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)))} is VALID [2022-04-07 17:37:44,436 INFO L290 TraceCheckUtils]: 8: Hoare triple {5049#(or (and (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {5056#(or (and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0)) (and (< 0 main_~z~0) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~z~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:37:44,440 INFO L290 TraceCheckUtils]: 9: Hoare triple {5056#(or (and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0)) (and (< 0 main_~z~0) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~z~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296))))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {5022#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} is VALID [2022-04-07 17:37:44,440 INFO L290 TraceCheckUtils]: 10: Hoare triple {5022#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} [112] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_5 4294967296))) (or (and (= v_main_~y~0_4 v_main_~y~0_5) (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= |v_main_#t~post9_3| |v_main_#t~post9_1|) (<= .cse0 0)) (and (= v_main_~y~0_4 (+ v_main_~y~0_5 v_main_~z~0_3 (* (- 1) v_main_~z~0_2))) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= (+ v_main_~z~0_3 v_it_3 1) v_main_~z~0_2)) (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_5 (* v_it_3 4294967295)) 4294967296)))) (< v_main_~z~0_3 v_main_~z~0_2)))) InVars {main_~y~0=v_main_~y~0_5, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5022#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} is VALID [2022-04-07 17:37:44,441 INFO L290 TraceCheckUtils]: 11: Hoare triple {5022#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {5022#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} is VALID [2022-04-07 17:37:44,441 INFO L290 TraceCheckUtils]: 12: Hoare triple {5022#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {5022#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} is VALID [2022-04-07 17:37:44,441 INFO L290 TraceCheckUtils]: 13: Hoare triple {5022#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {5072#(and (not (< 0 (mod main_~z~0 4294967296))) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-07 17:37:44,442 INFO L290 TraceCheckUtils]: 14: Hoare triple {5072#(and (not (< 0 (mod main_~z~0 4294967296))) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {5072#(and (not (< 0 (mod main_~z~0 4294967296))) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-07 17:37:44,443 INFO L272 TraceCheckUtils]: 15: Hoare triple {5072#(and (not (< 0 (mod main_~z~0 4294967296))) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {5079#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:37:44,443 INFO L290 TraceCheckUtils]: 16: Hoare triple {5079#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5083#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:37:44,443 INFO L290 TraceCheckUtils]: 17: Hoare triple {5083#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {5014#false} is VALID [2022-04-07 17:37:44,443 INFO L290 TraceCheckUtils]: 18: Hoare triple {5014#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5014#false} is VALID [2022-04-07 17:37:44,444 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 17:37:44,444 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 17:37:45,684 INFO L290 TraceCheckUtils]: 18: Hoare triple {5014#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5014#false} is VALID [2022-04-07 17:37:45,685 INFO L290 TraceCheckUtils]: 17: Hoare triple {5083#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {5014#false} is VALID [2022-04-07 17:37:45,685 INFO L290 TraceCheckUtils]: 16: Hoare triple {5079#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5083#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:37:45,686 INFO L272 TraceCheckUtils]: 15: Hoare triple {5024#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {5079#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:37:45,687 INFO L290 TraceCheckUtils]: 14: Hoare triple {5024#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {5024#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:37:45,688 INFO L290 TraceCheckUtils]: 13: Hoare triple {5022#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {5024#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:37:45,688 INFO L290 TraceCheckUtils]: 12: Hoare triple {5022#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {5022#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} is VALID [2022-04-07 17:37:45,688 INFO L290 TraceCheckUtils]: 11: Hoare triple {5022#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {5022#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} is VALID [2022-04-07 17:37:45,689 INFO L290 TraceCheckUtils]: 10: Hoare triple {5022#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} [112] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_5 4294967296))) (or (and (= v_main_~y~0_4 v_main_~y~0_5) (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= |v_main_#t~post9_3| |v_main_#t~post9_1|) (<= .cse0 0)) (and (= v_main_~y~0_4 (+ v_main_~y~0_5 v_main_~z~0_3 (* (- 1) v_main_~z~0_2))) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= (+ v_main_~z~0_3 v_it_3 1) v_main_~z~0_2)) (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_5 (* v_it_3 4294967295)) 4294967296)))) (< v_main_~z~0_3 v_main_~z~0_2)))) InVars {main_~y~0=v_main_~y~0_5, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5022#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} is VALID [2022-04-07 17:37:45,689 INFO L290 TraceCheckUtils]: 9: Hoare triple {5117#(or (< 0 (mod main_~z~0 4294967296)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {5022#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} is VALID [2022-04-07 17:37:45,690 INFO L290 TraceCheckUtils]: 8: Hoare triple {5020#(or (< (* (div main_~y~0 4294967296) 4294967296) main_~y~0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {5117#(or (< 0 (mod main_~z~0 4294967296)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-07 17:37:45,690 INFO L290 TraceCheckUtils]: 7: Hoare triple {5020#(or (< (* (div main_~y~0 4294967296) 4294967296) main_~y~0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {5020#(or (< (* (div main_~y~0 4294967296) 4294967296) main_~y~0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-07 17:37:45,707 INFO L290 TraceCheckUtils]: 6: Hoare triple {5127#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (forall ((aux_mod_v_main_~y~0_56_31 Int)) (or (< 0 aux_mod_v_main_~y~0_56_31) (and (or (< 0 (mod main_~x~0 4294967296)) (forall ((aux_div_v_main_~y~0_56_31 Int)) (not (= main_~y~0 (+ aux_mod_v_main_~y~0_56_31 (* aux_div_v_main_~y~0_56_31 4294967296)))))) (or (not (< 0 (mod main_~x~0 4294967296))) (forall ((aux_div_v_main_~y~0_56_31 Int)) (or (exists ((v_it_1 Int)) (and (not (< 0 (mod (+ main_~x~0 (* v_it_1 4294967295)) 4294967296))) (<= 1 v_it_1) (<= (+ v_it_1 main_~y~0 1) (+ aux_mod_v_main_~y~0_56_31 (* aux_div_v_main_~y~0_56_31 4294967296))))) (not (< main_~y~0 (+ aux_mod_v_main_~y~0_56_31 (* aux_div_v_main_~y~0_56_31 4294967296)))))))) (< aux_mod_v_main_~y~0_56_31 0))))} [105] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~y~0_9 v_main_~y~0_8) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0)) (and (= v_main_~x~0_3 (+ (* (- 1) v_main_~y~0_8) v_main_~x~0_4 v_main_~y~0_9)) (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_9 v_it_1 1) v_main_~y~0_8)))) (< 0 .cse0) (< v_main_~y~0_9 v_main_~y~0_8)))) InVars {main_~y~0=v_main_~y~0_9, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_8, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5020#(or (< (* (div main_~y~0 4294967296) 4294967296) main_~y~0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-07 17:37:45,714 INFO L290 TraceCheckUtils]: 5: Hoare triple {5013#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {5127#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (forall ((aux_mod_v_main_~y~0_56_31 Int)) (or (< 0 aux_mod_v_main_~y~0_56_31) (and (or (< 0 (mod main_~x~0 4294967296)) (forall ((aux_div_v_main_~y~0_56_31 Int)) (not (= main_~y~0 (+ aux_mod_v_main_~y~0_56_31 (* aux_div_v_main_~y~0_56_31 4294967296)))))) (or (not (< 0 (mod main_~x~0 4294967296))) (forall ((aux_div_v_main_~y~0_56_31 Int)) (or (exists ((v_it_1 Int)) (and (not (< 0 (mod (+ main_~x~0 (* v_it_1 4294967295)) 4294967296))) (<= 1 v_it_1) (<= (+ v_it_1 main_~y~0 1) (+ aux_mod_v_main_~y~0_56_31 (* aux_div_v_main_~y~0_56_31 4294967296))))) (not (< main_~y~0 (+ aux_mod_v_main_~y~0_56_31 (* aux_div_v_main_~y~0_56_31 4294967296)))))))) (< aux_mod_v_main_~y~0_56_31 0))))} is VALID [2022-04-07 17:37:45,714 INFO L272 TraceCheckUtils]: 4: Hoare triple {5013#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5013#true} is VALID [2022-04-07 17:37:45,714 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5013#true} {5013#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5013#true} is VALID [2022-04-07 17:37:45,714 INFO L290 TraceCheckUtils]: 2: Hoare triple {5013#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5013#true} is VALID [2022-04-07 17:37:45,714 INFO L290 TraceCheckUtils]: 1: Hoare triple {5013#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5013#true} is VALID [2022-04-07 17:37:45,714 INFO L272 TraceCheckUtils]: 0: Hoare triple {5013#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5013#true} is VALID [2022-04-07 17:37:45,714 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 17:37:45,714 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1474550284] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 17:37:45,714 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 17:37:45,714 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 9, 9] total 19 [2022-04-07 17:37:45,715 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [761688501] [2022-04-07 17:37:45,715 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 17:37:45,715 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 1.736842105263158) internal successors, (33), 16 states have internal predecessors, (33), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-07 17:37:45,715 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:37:45,716 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 19 states, 19 states have (on average 1.736842105263158) internal successors, (33), 16 states have internal predecessors, (33), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:37:45,784 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 40 edges. 40 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:37:45,784 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2022-04-07 17:37:45,784 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:37:45,785 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2022-04-07 17:37:45,785 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=64, Invalid=278, Unknown=0, NotChecked=0, Total=342 [2022-04-07 17:37:45,785 INFO L87 Difference]: Start difference. First operand 43 states and 68 transitions. Second operand has 19 states, 19 states have (on average 1.736842105263158) internal successors, (33), 16 states have internal predecessors, (33), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:37:48,566 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:37:48,567 INFO L93 Difference]: Finished difference Result 62 states and 99 transitions. [2022-04-07 17:37:48,567 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-04-07 17:37:48,567 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 1.736842105263158) internal successors, (33), 16 states have internal predecessors, (33), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-07 17:37:48,567 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:37:48,567 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.736842105263158) internal successors, (33), 16 states have internal predecessors, (33), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:37:48,568 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 64 transitions. [2022-04-07 17:37:48,568 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.736842105263158) internal successors, (33), 16 states have internal predecessors, (33), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:37:48,569 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 64 transitions. [2022-04-07 17:37:48,569 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 15 states and 64 transitions. [2022-04-07 17:37:48,637 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 64 edges. 64 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:37:48,637 INFO L225 Difference]: With dead ends: 62 [2022-04-07 17:37:48,638 INFO L226 Difference]: Without dead ends: 59 [2022-04-07 17:37:48,646 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 60 GetRequests, 27 SyntacticMatches, 6 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 189 ImplicationChecksByTransitivity, 2.9s TimeCoverageRelationStatistics Valid=183, Invalid=628, Unknown=1, NotChecked=0, Total=812 [2022-04-07 17:37:48,646 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 66 mSDsluCounter, 67 mSDsCounter, 0 mSdLazyCounter, 124 mSolverCounterSat, 14 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 66 SdHoareTripleChecker+Valid, 79 SdHoareTripleChecker+Invalid, 165 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 14 IncrementalHoareTripleChecker+Valid, 124 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 27 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 17:37:48,646 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [66 Valid, 79 Invalid, 165 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [14 Valid, 124 Invalid, 0 Unknown, 27 Unchecked, 0.1s Time] [2022-04-07 17:37:48,647 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59 states. [2022-04-07 17:37:48,650 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59 to 42. [2022-04-07 17:37:48,650 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:37:48,650 INFO L82 GeneralOperation]: Start isEquivalent. First operand 59 states. Second operand has 42 states, 37 states have (on average 1.6756756756756757) internal successors, (62), 37 states have internal predecessors, (62), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:37:48,651 INFO L74 IsIncluded]: Start isIncluded. First operand 59 states. Second operand has 42 states, 37 states have (on average 1.6756756756756757) internal successors, (62), 37 states have internal predecessors, (62), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:37:48,651 INFO L87 Difference]: Start difference. First operand 59 states. Second operand has 42 states, 37 states have (on average 1.6756756756756757) internal successors, (62), 37 states have internal predecessors, (62), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:37:48,652 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:37:48,652 INFO L93 Difference]: Finished difference Result 59 states and 96 transitions. [2022-04-07 17:37:48,652 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 96 transitions. [2022-04-07 17:37:48,652 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:37:48,652 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:37:48,652 INFO L74 IsIncluded]: Start isIncluded. First operand has 42 states, 37 states have (on average 1.6756756756756757) internal successors, (62), 37 states have internal predecessors, (62), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 59 states. [2022-04-07 17:37:48,653 INFO L87 Difference]: Start difference. First operand has 42 states, 37 states have (on average 1.6756756756756757) internal successors, (62), 37 states have internal predecessors, (62), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 59 states. [2022-04-07 17:37:48,654 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:37:48,654 INFO L93 Difference]: Finished difference Result 59 states and 96 transitions. [2022-04-07 17:37:48,654 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 96 transitions. [2022-04-07 17:37:48,654 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:37:48,654 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:37:48,654 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:37:48,654 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:37:48,654 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 42 states, 37 states have (on average 1.6756756756756757) internal successors, (62), 37 states have internal predecessors, (62), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:37:48,655 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 66 transitions. [2022-04-07 17:37:48,655 INFO L78 Accepts]: Start accepts. Automaton has 42 states and 66 transitions. Word has length 19 [2022-04-07 17:37:48,655 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:37:48,655 INFO L478 AbstractCegarLoop]: Abstraction has 42 states and 66 transitions. [2022-04-07 17:37:48,655 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 19 states, 19 states have (on average 1.736842105263158) internal successors, (33), 16 states have internal predecessors, (33), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:37:48,656 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 66 transitions. [2022-04-07 17:37:48,656 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-07 17:37:48,656 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:37:48,656 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:37:48,680 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Forceful destruction successful, exit code 0 [2022-04-07 17:37:48,879 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19,19 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:37:48,880 INFO L403 AbstractCegarLoop]: === Iteration 21 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:37:48,881 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:37:48,881 INFO L85 PathProgramCache]: Analyzing trace with hash 629018289, now seen corresponding path program 1 times [2022-04-07 17:37:48,881 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:37:48,881 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [425897054] [2022-04-07 17:37:48,881 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:37:48,881 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:37:48,889 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_1.0))) (+ main_~x~0_5 .cse0 (* (- 4294967296) (div (+ main_~x~0_5 .cse0) 4294967296)))) 0)) [2022-04-07 17:37:48,890 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_6.1))) (+ main_~y~0_6 .cse0 (* (- 4294967296) (div (+ main_~y~0_6 .cse0) 4294967296)))) 0)) [2022-04-07 17:37:48,895 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:37:48,900 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_1.2))) (+ main_~x~0_5 .cse0 (* (- 4294967296) (div (+ main_~x~0_5 .cse0) 4294967296)))) 0)) [2022-04-07 17:37:48,907 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_6.3))) (+ main_~y~0_6 .cse0 (* (- 4294967296) (div (+ main_~y~0_6 .cse0) 4294967296)))) 0)) [2022-04-07 17:37:49,087 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:37:49,090 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:37:49,104 INFO L290 TraceCheckUtils]: 0: Hoare triple {5403#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5390#true} is VALID [2022-04-07 17:37:49,105 INFO L290 TraceCheckUtils]: 1: Hoare triple {5390#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5390#true} is VALID [2022-04-07 17:37:49,105 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {5390#true} {5390#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5390#true} is VALID [2022-04-07 17:37:49,105 INFO L272 TraceCheckUtils]: 0: Hoare triple {5390#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5403#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:37:49,105 INFO L290 TraceCheckUtils]: 1: Hoare triple {5403#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5390#true} is VALID [2022-04-07 17:37:49,106 INFO L290 TraceCheckUtils]: 2: Hoare triple {5390#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5390#true} is VALID [2022-04-07 17:37:49,106 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5390#true} {5390#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5390#true} is VALID [2022-04-07 17:37:49,106 INFO L272 TraceCheckUtils]: 4: Hoare triple {5390#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5390#true} is VALID [2022-04-07 17:37:49,106 INFO L290 TraceCheckUtils]: 5: Hoare triple {5390#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {5395#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 17:37:49,116 INFO L290 TraceCheckUtils]: 6: Hoare triple {5395#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [105] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~y~0_9 v_main_~y~0_8) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0)) (and (= v_main_~x~0_3 (+ (* (- 1) v_main_~y~0_8) v_main_~x~0_4 v_main_~y~0_9)) (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_9 v_it_1 1) v_main_~y~0_8)))) (< 0 .cse0) (< v_main_~y~0_9 v_main_~y~0_8)))) InVars {main_~y~0=v_main_~y~0_9, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_8, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5396#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-07 17:37:49,117 INFO L290 TraceCheckUtils]: 7: Hoare triple {5396#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {5397#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-07 17:37:49,118 INFO L290 TraceCheckUtils]: 8: Hoare triple {5397#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {5398#(and (= main_~z~0 main_~y~0) (or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0)))} is VALID [2022-04-07 17:37:49,118 INFO L290 TraceCheckUtils]: 9: Hoare triple {5398#(and (= main_~z~0 main_~y~0) (or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {5398#(and (= main_~z~0 main_~y~0) (or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0)))} is VALID [2022-04-07 17:37:49,119 INFO L290 TraceCheckUtils]: 10: Hoare triple {5398#(and (= main_~z~0 main_~y~0) (or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0)))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {5399#(and (= main_~z~0 main_~y~0) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-07 17:37:49,120 INFO L290 TraceCheckUtils]: 11: Hoare triple {5399#(and (= main_~z~0 main_~y~0) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {5399#(and (= main_~z~0 main_~y~0) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-07 17:37:49,120 INFO L290 TraceCheckUtils]: 12: Hoare triple {5399#(and (= main_~z~0 main_~y~0) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {5399#(and (= main_~z~0 main_~y~0) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-07 17:37:49,123 INFO L290 TraceCheckUtils]: 13: Hoare triple {5399#(and (= main_~z~0 main_~y~0) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {5400#(and (not (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:37:49,123 INFO L290 TraceCheckUtils]: 14: Hoare triple {5400#(and (not (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {5400#(and (not (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:37:49,124 INFO L272 TraceCheckUtils]: 15: Hoare triple {5400#(and (not (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {5401#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:37:49,125 INFO L290 TraceCheckUtils]: 16: Hoare triple {5401#(not (= |__VERIFIER_assert_#in~cond| 0))} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5402#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:37:49,125 INFO L290 TraceCheckUtils]: 17: Hoare triple {5402#(not (= __VERIFIER_assert_~cond 0))} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {5391#false} is VALID [2022-04-07 17:37:49,125 INFO L290 TraceCheckUtils]: 18: Hoare triple {5391#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5391#false} is VALID [2022-04-07 17:37:49,126 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:37:49,126 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:37:49,126 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [425897054] [2022-04-07 17:37:49,126 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [425897054] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:37:49,126 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1138895892] [2022-04-07 17:37:49,126 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:37:49,126 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:37:49,126 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:37:49,127 INFO L229 MonitoredProcess]: Starting monitored process 20 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:37:49,140 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process [2022-04-07 17:37:49,189 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:37:49,190 INFO L263 TraceCheckSpWp]: Trace formula consists of 64 conjuncts, 13 conjunts are in the unsatisfiable core [2022-04-07 17:37:49,205 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:37:49,206 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:37:50,068 INFO L272 TraceCheckUtils]: 0: Hoare triple {5390#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5390#true} is VALID [2022-04-07 17:37:50,068 INFO L290 TraceCheckUtils]: 1: Hoare triple {5390#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5390#true} is VALID [2022-04-07 17:37:50,068 INFO L290 TraceCheckUtils]: 2: Hoare triple {5390#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5390#true} is VALID [2022-04-07 17:37:50,068 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5390#true} {5390#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5390#true} is VALID [2022-04-07 17:37:50,068 INFO L272 TraceCheckUtils]: 4: Hoare triple {5390#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5390#true} is VALID [2022-04-07 17:37:50,069 INFO L290 TraceCheckUtils]: 5: Hoare triple {5390#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {5395#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 17:37:50,075 INFO L290 TraceCheckUtils]: 6: Hoare triple {5395#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [105] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~y~0_9 v_main_~y~0_8) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0)) (and (= v_main_~x~0_3 (+ (* (- 1) v_main_~y~0_8) v_main_~x~0_4 v_main_~y~0_9)) (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_9 v_it_1 1) v_main_~y~0_8)))) (< 0 .cse0) (< v_main_~y~0_9 v_main_~y~0_8)))) InVars {main_~y~0=v_main_~y~0_9, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_8, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5425#(or (and (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)))} is VALID [2022-04-07 17:37:50,077 INFO L290 TraceCheckUtils]: 7: Hoare triple {5425#(or (and (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {5425#(or (and (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)))} is VALID [2022-04-07 17:37:50,078 INFO L290 TraceCheckUtils]: 8: Hoare triple {5425#(or (and (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {5432#(and (= main_~z~0 main_~y~0) (or (and (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0))))} is VALID [2022-04-07 17:37:50,084 INFO L290 TraceCheckUtils]: 9: Hoare triple {5432#(and (= main_~z~0 main_~y~0) (or (and (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0))))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {5436#(and (= main_~z~0 main_~y~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0))} is VALID [2022-04-07 17:37:50,085 INFO L290 TraceCheckUtils]: 10: Hoare triple {5436#(and (= main_~z~0 main_~y~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {5436#(and (= main_~z~0 main_~y~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0))} is VALID [2022-04-07 17:37:50,085 INFO L290 TraceCheckUtils]: 11: Hoare triple {5436#(and (= main_~z~0 main_~y~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {5436#(and (= main_~z~0 main_~y~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0))} is VALID [2022-04-07 17:37:50,086 INFO L290 TraceCheckUtils]: 12: Hoare triple {5436#(and (= main_~z~0 main_~y~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {5436#(and (= main_~z~0 main_~y~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0))} is VALID [2022-04-07 17:37:50,086 INFO L290 TraceCheckUtils]: 13: Hoare triple {5436#(and (= main_~z~0 main_~y~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {5449#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-07 17:37:50,087 INFO L290 TraceCheckUtils]: 14: Hoare triple {5449#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {5449#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-07 17:37:50,087 INFO L272 TraceCheckUtils]: 15: Hoare triple {5449#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {5456#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:37:50,088 INFO L290 TraceCheckUtils]: 16: Hoare triple {5456#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5460#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:37:50,088 INFO L290 TraceCheckUtils]: 17: Hoare triple {5460#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {5391#false} is VALID [2022-04-07 17:37:50,088 INFO L290 TraceCheckUtils]: 18: Hoare triple {5391#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5391#false} is VALID [2022-04-07 17:37:50,088 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:37:50,088 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 17:38:07,253 INFO L290 TraceCheckUtils]: 18: Hoare triple {5391#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5391#false} is VALID [2022-04-07 17:38:07,253 INFO L290 TraceCheckUtils]: 17: Hoare triple {5460#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {5391#false} is VALID [2022-04-07 17:38:07,254 INFO L290 TraceCheckUtils]: 16: Hoare triple {5456#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5460#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:38:07,255 INFO L272 TraceCheckUtils]: 15: Hoare triple {5400#(and (not (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {5456#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:38:07,255 INFO L290 TraceCheckUtils]: 14: Hoare triple {5400#(and (not (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {5400#(and (not (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:38:09,267 WARN L290 TraceCheckUtils]: 13: Hoare triple {5482#(and (or (and (forall ((aux_div_v_main_~z~0_62_31 Int) (aux_mod_v_main_~z~0_62_31 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_62_31 (* 4294967296 aux_div_v_main_~z~0_62_31))))) (<= (+ aux_mod_v_main_~z~0_62_31 (* (div main_~n~0 4294967296) 4294967296)) main_~n~0) (>= aux_mod_v_main_~z~0_62_31 4294967296) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_62_31 (* 4294967296 aux_div_v_main_~z~0_62_31)))))) (forall ((aux_div_v_main_~z~0_62_31 Int) (aux_mod_v_main_~z~0_62_31 Int)) (or (< main_~n~0 (+ aux_mod_v_main_~z~0_62_31 (* (div main_~n~0 4294967296) 4294967296) 1)) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_62_31 (* 4294967296 aux_div_v_main_~z~0_62_31))))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_62_31 (* 4294967296 aux_div_v_main_~z~0_62_31)))) (> 0 aux_mod_v_main_~z~0_62_31)))) (not (< 0 (mod main_~y~0 4294967296)))) (or (and (not (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (< 0 (mod main_~y~0 4294967296))))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {5400#(and (not (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is UNKNOWN [2022-04-07 17:38:11,276 WARN L290 TraceCheckUtils]: 12: Hoare triple {5482#(and (or (and (forall ((aux_div_v_main_~z~0_62_31 Int) (aux_mod_v_main_~z~0_62_31 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_62_31 (* 4294967296 aux_div_v_main_~z~0_62_31))))) (<= (+ aux_mod_v_main_~z~0_62_31 (* (div main_~n~0 4294967296) 4294967296)) main_~n~0) (>= aux_mod_v_main_~z~0_62_31 4294967296) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_62_31 (* 4294967296 aux_div_v_main_~z~0_62_31)))))) (forall ((aux_div_v_main_~z~0_62_31 Int) (aux_mod_v_main_~z~0_62_31 Int)) (or (< main_~n~0 (+ aux_mod_v_main_~z~0_62_31 (* (div main_~n~0 4294967296) 4294967296) 1)) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_62_31 (* 4294967296 aux_div_v_main_~z~0_62_31))))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_62_31 (* 4294967296 aux_div_v_main_~z~0_62_31)))) (> 0 aux_mod_v_main_~z~0_62_31)))) (not (< 0 (mod main_~y~0 4294967296)))) (or (and (not (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (< 0 (mod main_~y~0 4294967296))))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {5482#(and (or (and (forall ((aux_div_v_main_~z~0_62_31 Int) (aux_mod_v_main_~z~0_62_31 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_62_31 (* 4294967296 aux_div_v_main_~z~0_62_31))))) (<= (+ aux_mod_v_main_~z~0_62_31 (* (div main_~n~0 4294967296) 4294967296)) main_~n~0) (>= aux_mod_v_main_~z~0_62_31 4294967296) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_62_31 (* 4294967296 aux_div_v_main_~z~0_62_31)))))) (forall ((aux_div_v_main_~z~0_62_31 Int) (aux_mod_v_main_~z~0_62_31 Int)) (or (< main_~n~0 (+ aux_mod_v_main_~z~0_62_31 (* (div main_~n~0 4294967296) 4294967296) 1)) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_62_31 (* 4294967296 aux_div_v_main_~z~0_62_31))))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_62_31 (* 4294967296 aux_div_v_main_~z~0_62_31)))) (> 0 aux_mod_v_main_~z~0_62_31)))) (not (< 0 (mod main_~y~0 4294967296)))) (or (and (not (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (< 0 (mod main_~y~0 4294967296))))} is UNKNOWN [2022-04-07 17:38:13,295 WARN L290 TraceCheckUtils]: 11: Hoare triple {5482#(and (or (and (forall ((aux_div_v_main_~z~0_62_31 Int) (aux_mod_v_main_~z~0_62_31 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_62_31 (* 4294967296 aux_div_v_main_~z~0_62_31))))) (<= (+ aux_mod_v_main_~z~0_62_31 (* (div main_~n~0 4294967296) 4294967296)) main_~n~0) (>= aux_mod_v_main_~z~0_62_31 4294967296) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_62_31 (* 4294967296 aux_div_v_main_~z~0_62_31)))))) (forall ((aux_div_v_main_~z~0_62_31 Int) (aux_mod_v_main_~z~0_62_31 Int)) (or (< main_~n~0 (+ aux_mod_v_main_~z~0_62_31 (* (div main_~n~0 4294967296) 4294967296) 1)) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_62_31 (* 4294967296 aux_div_v_main_~z~0_62_31))))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_62_31 (* 4294967296 aux_div_v_main_~z~0_62_31)))) (> 0 aux_mod_v_main_~z~0_62_31)))) (not (< 0 (mod main_~y~0 4294967296)))) (or (and (not (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (< 0 (mod main_~y~0 4294967296))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {5482#(and (or (and (forall ((aux_div_v_main_~z~0_62_31 Int) (aux_mod_v_main_~z~0_62_31 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_62_31 (* 4294967296 aux_div_v_main_~z~0_62_31))))) (<= (+ aux_mod_v_main_~z~0_62_31 (* (div main_~n~0 4294967296) 4294967296)) main_~n~0) (>= aux_mod_v_main_~z~0_62_31 4294967296) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_62_31 (* 4294967296 aux_div_v_main_~z~0_62_31)))))) (forall ((aux_div_v_main_~z~0_62_31 Int) (aux_mod_v_main_~z~0_62_31 Int)) (or (< main_~n~0 (+ aux_mod_v_main_~z~0_62_31 (* (div main_~n~0 4294967296) 4294967296) 1)) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_62_31 (* 4294967296 aux_div_v_main_~z~0_62_31))))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_62_31 (* 4294967296 aux_div_v_main_~z~0_62_31)))) (> 0 aux_mod_v_main_~z~0_62_31)))) (not (< 0 (mod main_~y~0 4294967296)))) (or (and (not (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (< 0 (mod main_~y~0 4294967296))))} is UNKNOWN [2022-04-07 17:38:13,296 INFO L290 TraceCheckUtils]: 10: Hoare triple {5492#(or (and (not (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (< 0 (mod main_~y~0 4294967296)))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {5482#(and (or (and (forall ((aux_div_v_main_~z~0_62_31 Int) (aux_mod_v_main_~z~0_62_31 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_62_31 (* 4294967296 aux_div_v_main_~z~0_62_31))))) (<= (+ aux_mod_v_main_~z~0_62_31 (* (div main_~n~0 4294967296) 4294967296)) main_~n~0) (>= aux_mod_v_main_~z~0_62_31 4294967296) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_62_31 (* 4294967296 aux_div_v_main_~z~0_62_31)))))) (forall ((aux_div_v_main_~z~0_62_31 Int) (aux_mod_v_main_~z~0_62_31 Int)) (or (< main_~n~0 (+ aux_mod_v_main_~z~0_62_31 (* (div main_~n~0 4294967296) 4294967296) 1)) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_62_31 (* 4294967296 aux_div_v_main_~z~0_62_31))))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_62_31 (* 4294967296 aux_div_v_main_~z~0_62_31)))) (> 0 aux_mod_v_main_~z~0_62_31)))) (not (< 0 (mod main_~y~0 4294967296)))) (or (and (not (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (< 0 (mod main_~y~0 4294967296))))} is VALID [2022-04-07 17:38:13,297 INFO L290 TraceCheckUtils]: 9: Hoare triple {5496#(or (not (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (< 0 (mod main_~z~0 4294967296)) (< 0 (mod main_~y~0 4294967296)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {5492#(or (and (not (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-07 17:38:13,298 INFO L290 TraceCheckUtils]: 8: Hoare triple {5397#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {5496#(or (not (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (< 0 (mod main_~z~0 4294967296)) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-07 17:38:13,298 INFO L290 TraceCheckUtils]: 7: Hoare triple {5397#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {5397#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-07 17:38:15,307 WARN L290 TraceCheckUtils]: 6: Hoare triple {5506#(or (forall ((aux_mod_v_main_~y~0_61_31 Int)) (or (<= 1 aux_mod_v_main_~y~0_61_31) (and (or (forall ((aux_div_v_main_~y~0_61_31 Int)) (or (exists ((v_it_1 Int)) (and (<= (+ v_it_1 main_~y~0 1) (+ aux_mod_v_main_~y~0_61_31 (* aux_div_v_main_~y~0_61_31 4294967296))) (not (< 0 (mod (+ main_~x~0 (* v_it_1 4294967295)) 4294967296))) (<= 1 v_it_1))) (not (< main_~y~0 (+ aux_mod_v_main_~y~0_61_31 (* aux_div_v_main_~y~0_61_31 4294967296)))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (forall ((aux_div_v_main_~y~0_61_31 Int)) (not (= main_~y~0 (+ aux_mod_v_main_~y~0_61_31 (* aux_div_v_main_~y~0_61_31 4294967296))))) (< 0 (mod main_~x~0 4294967296)))) (< aux_mod_v_main_~y~0_61_31 0))) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [105] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~y~0_9 v_main_~y~0_8) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0)) (and (= v_main_~x~0_3 (+ (* (- 1) v_main_~y~0_8) v_main_~x~0_4 v_main_~y~0_9)) (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_9 v_it_1 1) v_main_~y~0_8)))) (< 0 .cse0) (< v_main_~y~0_9 v_main_~y~0_8)))) InVars {main_~y~0=v_main_~y~0_9, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_8, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5397#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is UNKNOWN [2022-04-07 17:38:15,316 INFO L290 TraceCheckUtils]: 5: Hoare triple {5390#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {5506#(or (forall ((aux_mod_v_main_~y~0_61_31 Int)) (or (<= 1 aux_mod_v_main_~y~0_61_31) (and (or (forall ((aux_div_v_main_~y~0_61_31 Int)) (or (exists ((v_it_1 Int)) (and (<= (+ v_it_1 main_~y~0 1) (+ aux_mod_v_main_~y~0_61_31 (* aux_div_v_main_~y~0_61_31 4294967296))) (not (< 0 (mod (+ main_~x~0 (* v_it_1 4294967295)) 4294967296))) (<= 1 v_it_1))) (not (< main_~y~0 (+ aux_mod_v_main_~y~0_61_31 (* aux_div_v_main_~y~0_61_31 4294967296)))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (forall ((aux_div_v_main_~y~0_61_31 Int)) (not (= main_~y~0 (+ aux_mod_v_main_~y~0_61_31 (* aux_div_v_main_~y~0_61_31 4294967296))))) (< 0 (mod main_~x~0 4294967296)))) (< aux_mod_v_main_~y~0_61_31 0))) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-07 17:38:15,316 INFO L272 TraceCheckUtils]: 4: Hoare triple {5390#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5390#true} is VALID [2022-04-07 17:38:15,316 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5390#true} {5390#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5390#true} is VALID [2022-04-07 17:38:15,316 INFO L290 TraceCheckUtils]: 2: Hoare triple {5390#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5390#true} is VALID [2022-04-07 17:38:15,317 INFO L290 TraceCheckUtils]: 1: Hoare triple {5390#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5390#true} is VALID [2022-04-07 17:38:15,317 INFO L272 TraceCheckUtils]: 0: Hoare triple {5390#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5390#true} is VALID [2022-04-07 17:38:15,317 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:38:15,317 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1138895892] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 17:38:15,317 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 17:38:15,317 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 9, 10] total 21 [2022-04-07 17:38:15,317 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1791110420] [2022-04-07 17:38:15,318 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 17:38:15,318 INFO L78 Accepts]: Start accepts. Automaton has has 21 states, 21 states have (on average 1.7142857142857142) internal successors, (36), 18 states have internal predecessors, (36), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-07 17:38:15,318 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:38:15,319 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 21 states, 21 states have (on average 1.7142857142857142) internal successors, (36), 18 states have internal predecessors, (36), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:38:18,966 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 43 edges. 42 inductive. 0 not inductive. 1 times theorem prover too weak to decide inductivity. [2022-04-07 17:38:18,966 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 21 states [2022-04-07 17:38:18,966 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:38:18,966 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2022-04-07 17:38:18,966 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=90, Invalid=327, Unknown=3, NotChecked=0, Total=420 [2022-04-07 17:38:18,967 INFO L87 Difference]: Start difference. First operand 42 states and 66 transitions. Second operand has 21 states, 21 states have (on average 1.7142857142857142) internal successors, (36), 18 states have internal predecessors, (36), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:38:19,408 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:38:19,409 INFO L93 Difference]: Finished difference Result 55 states and 87 transitions. [2022-04-07 17:38:19,409 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-04-07 17:38:19,409 INFO L78 Accepts]: Start accepts. Automaton has has 21 states, 21 states have (on average 1.7142857142857142) internal successors, (36), 18 states have internal predecessors, (36), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-07 17:38:19,409 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:38:19,409 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 21 states have (on average 1.7142857142857142) internal successors, (36), 18 states have internal predecessors, (36), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:38:19,410 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 58 transitions. [2022-04-07 17:38:19,410 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 21 states have (on average 1.7142857142857142) internal successors, (36), 18 states have internal predecessors, (36), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:38:19,411 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 58 transitions. [2022-04-07 17:38:19,412 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 12 states and 58 transitions. [2022-04-07 17:38:19,509 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 58 edges. 58 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:38:19,509 INFO L225 Difference]: With dead ends: 55 [2022-04-07 17:38:19,510 INFO L226 Difference]: Without dead ends: 52 [2022-04-07 17:38:19,510 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 28 SyntacticMatches, 4 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 196 ImplicationChecksByTransitivity, 13.9s TimeCoverageRelationStatistics Valid=167, Invalid=586, Unknown=3, NotChecked=0, Total=756 [2022-04-07 17:38:19,510 INFO L913 BasicCegarLoop]: 13 mSDtfsCounter, 64 mSDsluCounter, 39 mSDsCounter, 0 mSdLazyCounter, 90 mSolverCounterSat, 14 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 64 SdHoareTripleChecker+Valid, 52 SdHoareTripleChecker+Invalid, 136 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 14 IncrementalHoareTripleChecker+Valid, 90 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 32 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 17:38:19,511 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [64 Valid, 52 Invalid, 136 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [14 Valid, 90 Invalid, 0 Unknown, 32 Unchecked, 0.1s Time] [2022-04-07 17:38:19,511 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states. [2022-04-07 17:38:19,512 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 45. [2022-04-07 17:38:19,512 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:38:19,512 INFO L82 GeneralOperation]: Start isEquivalent. First operand 52 states. Second operand has 45 states, 40 states have (on average 1.7) internal successors, (68), 40 states have internal predecessors, (68), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:38:19,513 INFO L74 IsIncluded]: Start isIncluded. First operand 52 states. Second operand has 45 states, 40 states have (on average 1.7) internal successors, (68), 40 states have internal predecessors, (68), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:38:19,513 INFO L87 Difference]: Start difference. First operand 52 states. Second operand has 45 states, 40 states have (on average 1.7) internal successors, (68), 40 states have internal predecessors, (68), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:38:19,514 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:38:19,514 INFO L93 Difference]: Finished difference Result 52 states and 84 transitions. [2022-04-07 17:38:19,514 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states and 84 transitions. [2022-04-07 17:38:19,514 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:38:19,514 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:38:19,514 INFO L74 IsIncluded]: Start isIncluded. First operand has 45 states, 40 states have (on average 1.7) internal successors, (68), 40 states have internal predecessors, (68), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 52 states. [2022-04-07 17:38:19,514 INFO L87 Difference]: Start difference. First operand has 45 states, 40 states have (on average 1.7) internal successors, (68), 40 states have internal predecessors, (68), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 52 states. [2022-04-07 17:38:19,515 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:38:19,515 INFO L93 Difference]: Finished difference Result 52 states and 84 transitions. [2022-04-07 17:38:19,515 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states and 84 transitions. [2022-04-07 17:38:19,516 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:38:19,516 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:38:19,516 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:38:19,516 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:38:19,516 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 45 states, 40 states have (on average 1.7) internal successors, (68), 40 states have internal predecessors, (68), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:38:19,517 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 72 transitions. [2022-04-07 17:38:19,517 INFO L78 Accepts]: Start accepts. Automaton has 45 states and 72 transitions. Word has length 19 [2022-04-07 17:38:19,517 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:38:19,517 INFO L478 AbstractCegarLoop]: Abstraction has 45 states and 72 transitions. [2022-04-07 17:38:19,517 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 21 states, 21 states have (on average 1.7142857142857142) internal successors, (36), 18 states have internal predecessors, (36), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:38:19,517 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 72 transitions. [2022-04-07 17:38:19,517 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-07 17:38:19,518 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:38:19,518 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:38:19,544 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Ended with exit code 0 [2022-04-07 17:38:19,731 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20,20 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:38:19,731 INFO L403 AbstractCegarLoop]: === Iteration 22 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:38:19,732 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:38:19,732 INFO L85 PathProgramCache]: Analyzing trace with hash 1402005366, now seen corresponding path program 1 times [2022-04-07 17:38:19,732 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:38:19,732 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1184755525] [2022-04-07 17:38:19,732 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:38:19,732 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:38:19,744 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_1.0))) (+ main_~x~0_5 .cse0 (* (- 4294967296) (div (+ main_~x~0_5 .cse0) 4294967296)))) 0)) [2022-04-07 17:38:19,746 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.1))) (+ main_~z~0_8 .cse0 (* (- 4294967296) (div (+ main_~z~0_8 .cse0) 4294967296)))) 0)) [2022-04-07 17:38:19,751 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:38:19,759 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_1.2))) (+ main_~x~0_5 .cse0 (* (- 4294967296) (div (+ main_~x~0_5 .cse0) 4294967296)))) 0)) [2022-04-07 17:38:19,765 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.3))) (+ main_~z~0_8 .cse0 (* (- 4294967296) (div (+ main_~z~0_8 .cse0) 4294967296)))) 0)) [2022-04-07 17:38:19,948 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:38:19,950 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:38:19,952 INFO L290 TraceCheckUtils]: 0: Hoare triple {5760#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5747#true} is VALID [2022-04-07 17:38:19,953 INFO L290 TraceCheckUtils]: 1: Hoare triple {5747#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5747#true} is VALID [2022-04-07 17:38:19,953 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {5747#true} {5747#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5747#true} is VALID [2022-04-07 17:38:19,953 INFO L272 TraceCheckUtils]: 0: Hoare triple {5747#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5760#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:38:19,953 INFO L290 TraceCheckUtils]: 1: Hoare triple {5760#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5747#true} is VALID [2022-04-07 17:38:19,954 INFO L290 TraceCheckUtils]: 2: Hoare triple {5747#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5747#true} is VALID [2022-04-07 17:38:19,954 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5747#true} {5747#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5747#true} is VALID [2022-04-07 17:38:19,954 INFO L272 TraceCheckUtils]: 4: Hoare triple {5747#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5747#true} is VALID [2022-04-07 17:38:19,954 INFO L290 TraceCheckUtils]: 5: Hoare triple {5747#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {5752#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 17:38:19,959 INFO L290 TraceCheckUtils]: 6: Hoare triple {5752#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [105] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~y~0_9 v_main_~y~0_8) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0)) (and (= v_main_~x~0_3 (+ (* (- 1) v_main_~y~0_8) v_main_~x~0_4 v_main_~y~0_9)) (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_9 v_it_1 1) v_main_~y~0_8)))) (< 0 .cse0) (< v_main_~y~0_9 v_main_~y~0_8)))) InVars {main_~y~0=v_main_~y~0_9, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_8, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5753#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-07 17:38:19,960 INFO L290 TraceCheckUtils]: 7: Hoare triple {5753#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {5754#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-07 17:38:19,961 INFO L290 TraceCheckUtils]: 8: Hoare triple {5754#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {5754#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-07 17:38:19,962 INFO L290 TraceCheckUtils]: 9: Hoare triple {5754#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {5754#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-07 17:38:19,963 INFO L290 TraceCheckUtils]: 10: Hoare triple {5754#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {5755#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} is VALID [2022-04-07 17:38:19,963 INFO L290 TraceCheckUtils]: 11: Hoare triple {5755#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {5755#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} is VALID [2022-04-07 17:38:19,964 INFO L290 TraceCheckUtils]: 12: Hoare triple {5755#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} [118] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_13 4294967296))) (or (and (= v_main_~z~0_12 (+ v_main_~x~0_11 v_main_~z~0_13 (* (- 1) v_main_~x~0_10))) (< v_main_~x~0_11 v_main_~x~0_10) (forall ((v_it_5 Int)) (or (< 0 (mod (+ v_main_~z~0_13 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)) (not (<= (+ v_main_~x~0_11 v_it_5 1) v_main_~x~0_10)))) (< 0 .cse0)) (and (= v_main_~x~0_11 v_main_~x~0_10) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (<= .cse0 0) (= v_main_~z~0_13 v_main_~z~0_12) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_13, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_12, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {5756#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} is VALID [2022-04-07 17:38:19,965 INFO L290 TraceCheckUtils]: 13: Hoare triple {5756#(< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {5757#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:38:19,966 INFO L290 TraceCheckUtils]: 14: Hoare triple {5757#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {5757#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:38:19,967 INFO L272 TraceCheckUtils]: 15: Hoare triple {5757#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {5758#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:38:19,968 INFO L290 TraceCheckUtils]: 16: Hoare triple {5758#(not (= |__VERIFIER_assert_#in~cond| 0))} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5759#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:38:19,968 INFO L290 TraceCheckUtils]: 17: Hoare triple {5759#(not (= __VERIFIER_assert_~cond 0))} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {5748#false} is VALID [2022-04-07 17:38:19,968 INFO L290 TraceCheckUtils]: 18: Hoare triple {5748#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5748#false} is VALID [2022-04-07 17:38:19,968 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:38:19,968 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:38:19,969 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1184755525] [2022-04-07 17:38:19,969 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1184755525] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:38:19,969 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [139980156] [2022-04-07 17:38:19,969 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:38:19,969 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:38:19,969 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:38:19,970 INFO L229 MonitoredProcess]: Starting monitored process 21 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:38:19,974 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Waiting until timeout for monitored process [2022-04-07 17:38:20,023 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:38:20,024 INFO L263 TraceCheckSpWp]: Trace formula consists of 64 conjuncts, 13 conjunts are in the unsatisfiable core [2022-04-07 17:38:20,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:38:20,038 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:38:20,985 INFO L272 TraceCheckUtils]: 0: Hoare triple {5747#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5747#true} is VALID [2022-04-07 17:38:20,985 INFO L290 TraceCheckUtils]: 1: Hoare triple {5747#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5747#true} is VALID [2022-04-07 17:38:20,985 INFO L290 TraceCheckUtils]: 2: Hoare triple {5747#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5747#true} is VALID [2022-04-07 17:38:20,986 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5747#true} {5747#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5747#true} is VALID [2022-04-07 17:38:20,986 INFO L272 TraceCheckUtils]: 4: Hoare triple {5747#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5747#true} is VALID [2022-04-07 17:38:20,986 INFO L290 TraceCheckUtils]: 5: Hoare triple {5747#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {5752#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 17:38:20,991 INFO L290 TraceCheckUtils]: 6: Hoare triple {5752#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [105] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~y~0_9 v_main_~y~0_8) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0)) (and (= v_main_~x~0_3 (+ (* (- 1) v_main_~y~0_8) v_main_~x~0_4 v_main_~y~0_9)) (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_9 v_it_1 1) v_main_~y~0_8)))) (< 0 .cse0) (< v_main_~y~0_9 v_main_~y~0_8)))) InVars {main_~y~0=v_main_~y~0_9, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_8, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5782#(or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)))} is VALID [2022-04-07 17:38:20,993 INFO L290 TraceCheckUtils]: 7: Hoare triple {5782#(or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {5782#(or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)))} is VALID [2022-04-07 17:38:20,994 INFO L290 TraceCheckUtils]: 8: Hoare triple {5782#(or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {5789#(or (and (< 0 main_~z~0) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~z~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (= (+ main_~n~0 (* (- 1) main_~z~0)) main_~x~0)) (and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0)))} is VALID [2022-04-07 17:38:20,997 INFO L290 TraceCheckUtils]: 9: Hoare triple {5789#(or (and (< 0 main_~z~0) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~z~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (= (+ main_~n~0 (* (- 1) main_~z~0)) main_~x~0)) (and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {5793#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-07 17:38:20,998 INFO L290 TraceCheckUtils]: 10: Hoare triple {5793#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {5793#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-07 17:38:20,998 INFO L290 TraceCheckUtils]: 11: Hoare triple {5793#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {5793#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-07 17:38:20,999 INFO L290 TraceCheckUtils]: 12: Hoare triple {5793#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0))} [118] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_13 4294967296))) (or (and (= v_main_~z~0_12 (+ v_main_~x~0_11 v_main_~z~0_13 (* (- 1) v_main_~x~0_10))) (< v_main_~x~0_11 v_main_~x~0_10) (forall ((v_it_5 Int)) (or (< 0 (mod (+ v_main_~z~0_13 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)) (not (<= (+ v_main_~x~0_11 v_it_5 1) v_main_~x~0_10)))) (< 0 .cse0)) (and (= v_main_~x~0_11 v_main_~x~0_10) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (<= .cse0 0) (= v_main_~z~0_13 v_main_~z~0_12) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_13, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_12, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {5803#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-07 17:38:21,000 INFO L290 TraceCheckUtils]: 13: Hoare triple {5803#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {5803#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-07 17:38:21,000 INFO L290 TraceCheckUtils]: 14: Hoare triple {5803#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {5803#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-07 17:38:21,001 INFO L272 TraceCheckUtils]: 15: Hoare triple {5803#(and (= main_~z~0 0) (<= (mod main_~n~0 4294967296) 0))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {5813#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:38:21,002 INFO L290 TraceCheckUtils]: 16: Hoare triple {5813#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5817#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:38:21,002 INFO L290 TraceCheckUtils]: 17: Hoare triple {5817#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {5748#false} is VALID [2022-04-07 17:38:21,002 INFO L290 TraceCheckUtils]: 18: Hoare triple {5748#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5748#false} is VALID [2022-04-07 17:38:21,002 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:38:21,003 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 17:38:24,556 INFO L290 TraceCheckUtils]: 18: Hoare triple {5748#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5748#false} is VALID [2022-04-07 17:38:24,557 INFO L290 TraceCheckUtils]: 17: Hoare triple {5817#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {5748#false} is VALID [2022-04-07 17:38:24,560 INFO L290 TraceCheckUtils]: 16: Hoare triple {5813#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5817#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:38:24,561 INFO L272 TraceCheckUtils]: 15: Hoare triple {5757#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {5813#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:38:24,562 INFO L290 TraceCheckUtils]: 14: Hoare triple {5757#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {5757#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:38:24,562 INFO L290 TraceCheckUtils]: 13: Hoare triple {5839#(or (< 0 (mod main_~z~0 4294967296)) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {5757#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:38:24,564 INFO L290 TraceCheckUtils]: 12: Hoare triple {5755#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} [118] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_13 4294967296))) (or (and (= v_main_~z~0_12 (+ v_main_~x~0_11 v_main_~z~0_13 (* (- 1) v_main_~x~0_10))) (< v_main_~x~0_11 v_main_~x~0_10) (forall ((v_it_5 Int)) (or (< 0 (mod (+ v_main_~z~0_13 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)) (not (<= (+ v_main_~x~0_11 v_it_5 1) v_main_~x~0_10)))) (< 0 .cse0)) (and (= v_main_~x~0_11 v_main_~x~0_10) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (<= .cse0 0) (= v_main_~z~0_13 v_main_~z~0_12) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_13, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_12, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {5839#(or (< 0 (mod main_~z~0 4294967296)) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:38:24,564 INFO L290 TraceCheckUtils]: 11: Hoare triple {5755#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {5755#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} is VALID [2022-04-07 17:38:24,564 INFO L290 TraceCheckUtils]: 10: Hoare triple {5755#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {5755#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} is VALID [2022-04-07 17:38:24,565 INFO L290 TraceCheckUtils]: 9: Hoare triple {5839#(or (< 0 (mod main_~z~0 4294967296)) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {5755#(<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))} is VALID [2022-04-07 17:38:24,566 INFO L290 TraceCheckUtils]: 8: Hoare triple {5754#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {5839#(or (< 0 (mod main_~z~0 4294967296)) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:38:24,566 INFO L290 TraceCheckUtils]: 7: Hoare triple {5754#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {5754#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-07 17:38:26,574 WARN L290 TraceCheckUtils]: 6: Hoare triple {5861#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (forall ((aux_mod_v_main_~y~0_64_31 Int)) (or (<= 1 aux_mod_v_main_~y~0_64_31) (< aux_mod_v_main_~y~0_64_31 0) (and (or (forall ((aux_div_v_main_~y~0_64_31 Int)) (or (not (< main_~y~0 (+ aux_mod_v_main_~y~0_64_31 (* aux_div_v_main_~y~0_64_31 4294967296)))) (exists ((v_it_1 Int)) (and (not (< 0 (mod (+ main_~x~0 (* v_it_1 4294967295)) 4294967296))) (<= 1 v_it_1) (<= (+ v_it_1 main_~y~0 1) (+ aux_mod_v_main_~y~0_64_31 (* aux_div_v_main_~y~0_64_31 4294967296))))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (forall ((aux_div_v_main_~y~0_64_31 Int)) (not (= (+ aux_mod_v_main_~y~0_64_31 (* aux_div_v_main_~y~0_64_31 4294967296)) main_~y~0))) (< 0 (mod main_~x~0 4294967296)))))))} [105] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~y~0_9 v_main_~y~0_8) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0)) (and (= v_main_~x~0_3 (+ (* (- 1) v_main_~y~0_8) v_main_~x~0_4 v_main_~y~0_9)) (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_9 v_it_1 1) v_main_~y~0_8)))) (< 0 .cse0) (< v_main_~y~0_9 v_main_~y~0_8)))) InVars {main_~y~0=v_main_~y~0_9, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_8, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5754#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is UNKNOWN [2022-04-07 17:38:26,577 INFO L290 TraceCheckUtils]: 5: Hoare triple {5747#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {5861#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (forall ((aux_mod_v_main_~y~0_64_31 Int)) (or (<= 1 aux_mod_v_main_~y~0_64_31) (< aux_mod_v_main_~y~0_64_31 0) (and (or (forall ((aux_div_v_main_~y~0_64_31 Int)) (or (not (< main_~y~0 (+ aux_mod_v_main_~y~0_64_31 (* aux_div_v_main_~y~0_64_31 4294967296)))) (exists ((v_it_1 Int)) (and (not (< 0 (mod (+ main_~x~0 (* v_it_1 4294967295)) 4294967296))) (<= 1 v_it_1) (<= (+ v_it_1 main_~y~0 1) (+ aux_mod_v_main_~y~0_64_31 (* aux_div_v_main_~y~0_64_31 4294967296))))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (forall ((aux_div_v_main_~y~0_64_31 Int)) (not (= (+ aux_mod_v_main_~y~0_64_31 (* aux_div_v_main_~y~0_64_31 4294967296)) main_~y~0))) (< 0 (mod main_~x~0 4294967296)))))))} is VALID [2022-04-07 17:38:26,578 INFO L272 TraceCheckUtils]: 4: Hoare triple {5747#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5747#true} is VALID [2022-04-07 17:38:26,578 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5747#true} {5747#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5747#true} is VALID [2022-04-07 17:38:26,578 INFO L290 TraceCheckUtils]: 2: Hoare triple {5747#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5747#true} is VALID [2022-04-07 17:38:26,578 INFO L290 TraceCheckUtils]: 1: Hoare triple {5747#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5747#true} is VALID [2022-04-07 17:38:26,578 INFO L272 TraceCheckUtils]: 0: Hoare triple {5747#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5747#true} is VALID [2022-04-07 17:38:26,578 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:38:26,578 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [139980156] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 17:38:26,578 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 17:38:26,578 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 9, 9] total 19 [2022-04-07 17:38:26,578 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1668134666] [2022-04-07 17:38:26,579 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 17:38:26,579 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 1.8421052631578947) internal successors, (35), 16 states have internal predecessors, (35), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-07 17:38:26,579 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:38:26,579 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 19 states, 19 states have (on average 1.8421052631578947) internal successors, (35), 16 states have internal predecessors, (35), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:38:26,703 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 42 edges. 42 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:38:26,703 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2022-04-07 17:38:26,703 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:38:26,704 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2022-04-07 17:38:26,704 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=69, Invalid=273, Unknown=0, NotChecked=0, Total=342 [2022-04-07 17:38:26,704 INFO L87 Difference]: Start difference. First operand 45 states and 72 transitions. Second operand has 19 states, 19 states have (on average 1.8421052631578947) internal successors, (35), 16 states have internal predecessors, (35), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:38:29,428 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:38:29,428 INFO L93 Difference]: Finished difference Result 69 states and 111 transitions. [2022-04-07 17:38:29,428 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2022-04-07 17:38:29,429 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 1.8421052631578947) internal successors, (35), 16 states have internal predecessors, (35), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-07 17:38:29,429 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:38:29,429 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.8421052631578947) internal successors, (35), 16 states have internal predecessors, (35), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:38:29,430 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 71 transitions. [2022-04-07 17:38:29,430 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.8421052631578947) internal successors, (35), 16 states have internal predecessors, (35), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:38:29,431 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 71 transitions. [2022-04-07 17:38:29,431 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 16 states and 71 transitions. [2022-04-07 17:38:31,571 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 71 edges. 70 inductive. 0 not inductive. 1 times theorem prover too weak to decide inductivity. [2022-04-07 17:38:31,572 INFO L225 Difference]: With dead ends: 69 [2022-04-07 17:38:31,572 INFO L226 Difference]: Without dead ends: 65 [2022-04-07 17:38:31,573 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 60 GetRequests, 27 SyntacticMatches, 7 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 200 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=160, Invalid=596, Unknown=0, NotChecked=0, Total=756 [2022-04-07 17:38:31,573 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 82 mSDsluCounter, 46 mSDsCounter, 0 mSdLazyCounter, 117 mSolverCounterSat, 20 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 82 SdHoareTripleChecker+Valid, 58 SdHoareTripleChecker+Invalid, 200 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 20 IncrementalHoareTripleChecker+Valid, 117 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 63 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 17:38:31,573 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [82 Valid, 58 Invalid, 200 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [20 Valid, 117 Invalid, 0 Unknown, 63 Unchecked, 0.1s Time] [2022-04-07 17:38:31,574 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65 states. [2022-04-07 17:38:31,577 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65 to 51. [2022-04-07 17:38:31,577 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:38:31,577 INFO L82 GeneralOperation]: Start isEquivalent. First operand 65 states. Second operand has 51 states, 46 states have (on average 1.7173913043478262) internal successors, (79), 46 states have internal predecessors, (79), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:38:31,578 INFO L74 IsIncluded]: Start isIncluded. First operand 65 states. Second operand has 51 states, 46 states have (on average 1.7173913043478262) internal successors, (79), 46 states have internal predecessors, (79), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:38:31,578 INFO L87 Difference]: Start difference. First operand 65 states. Second operand has 51 states, 46 states have (on average 1.7173913043478262) internal successors, (79), 46 states have internal predecessors, (79), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:38:31,579 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:38:31,579 INFO L93 Difference]: Finished difference Result 65 states and 106 transitions. [2022-04-07 17:38:31,579 INFO L276 IsEmpty]: Start isEmpty. Operand 65 states and 106 transitions. [2022-04-07 17:38:31,579 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:38:31,579 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:38:31,579 INFO L74 IsIncluded]: Start isIncluded. First operand has 51 states, 46 states have (on average 1.7173913043478262) internal successors, (79), 46 states have internal predecessors, (79), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 65 states. [2022-04-07 17:38:31,579 INFO L87 Difference]: Start difference. First operand has 51 states, 46 states have (on average 1.7173913043478262) internal successors, (79), 46 states have internal predecessors, (79), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 65 states. [2022-04-07 17:38:31,580 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:38:31,580 INFO L93 Difference]: Finished difference Result 65 states and 106 transitions. [2022-04-07 17:38:31,581 INFO L276 IsEmpty]: Start isEmpty. Operand 65 states and 106 transitions. [2022-04-07 17:38:31,581 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:38:31,581 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:38:31,581 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:38:31,581 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:38:31,581 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 51 states, 46 states have (on average 1.7173913043478262) internal successors, (79), 46 states have internal predecessors, (79), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:38:31,582 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 83 transitions. [2022-04-07 17:38:31,582 INFO L78 Accepts]: Start accepts. Automaton has 51 states and 83 transitions. Word has length 19 [2022-04-07 17:38:31,582 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:38:31,582 INFO L478 AbstractCegarLoop]: Abstraction has 51 states and 83 transitions. [2022-04-07 17:38:31,582 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 19 states, 19 states have (on average 1.8421052631578947) internal successors, (35), 16 states have internal predecessors, (35), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:38:31,582 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 83 transitions. [2022-04-07 17:38:31,583 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-07 17:38:31,583 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:38:31,583 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:38:31,601 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Forceful destruction successful, exit code 0 [2022-04-07 17:38:31,787 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 21 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable21 [2022-04-07 17:38:31,787 INFO L403 AbstractCegarLoop]: === Iteration 23 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:38:31,788 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:38:31,788 INFO L85 PathProgramCache]: Analyzing trace with hash -405199023, now seen corresponding path program 1 times [2022-04-07 17:38:31,788 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:38:31,788 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1974643552] [2022-04-07 17:38:31,788 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:38:31,788 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:38:31,796 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_1.0))) (+ main_~x~0_5 .cse0 (* (- 4294967296) (div (+ main_~x~0_5 .cse0) 4294967296)))) 0)) [2022-04-07 17:38:31,796 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.1))) (+ .cse0 main_~x~0_6 (* (- 4294967296) (div (+ .cse0 main_~x~0_6) 4294967296)))) 0)) [2022-04-07 17:38:31,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:38:31,806 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_1.2))) (+ main_~x~0_5 .cse0 (* (- 4294967296) (div (+ main_~x~0_5 .cse0) 4294967296)))) 0)) [2022-04-07 17:38:31,819 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.3))) (+ .cse0 main_~x~0_6 (* (- 4294967296) (div (+ .cse0 main_~x~0_6) 4294967296)))) 0)) [2022-04-07 17:38:32,009 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:38:32,011 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:38:32,015 INFO L290 TraceCheckUtils]: 0: Hoare triple {6165#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6152#true} is VALID [2022-04-07 17:38:32,016 INFO L290 TraceCheckUtils]: 1: Hoare triple {6152#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6152#true} is VALID [2022-04-07 17:38:32,016 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {6152#true} {6152#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6152#true} is VALID [2022-04-07 17:38:32,017 INFO L272 TraceCheckUtils]: 0: Hoare triple {6152#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6165#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:38:32,017 INFO L290 TraceCheckUtils]: 1: Hoare triple {6165#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6152#true} is VALID [2022-04-07 17:38:32,017 INFO L290 TraceCheckUtils]: 2: Hoare triple {6152#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6152#true} is VALID [2022-04-07 17:38:32,017 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6152#true} {6152#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6152#true} is VALID [2022-04-07 17:38:32,017 INFO L272 TraceCheckUtils]: 4: Hoare triple {6152#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6152#true} is VALID [2022-04-07 17:38:32,018 INFO L290 TraceCheckUtils]: 5: Hoare triple {6152#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {6157#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 17:38:32,024 INFO L290 TraceCheckUtils]: 6: Hoare triple {6157#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [105] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~y~0_9 v_main_~y~0_8) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0)) (and (= v_main_~x~0_3 (+ (* (- 1) v_main_~y~0_8) v_main_~x~0_4 v_main_~y~0_9)) (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_9 v_it_1 1) v_main_~y~0_8)))) (< 0 .cse0) (< v_main_~y~0_9 v_main_~y~0_8)))) InVars {main_~y~0=v_main_~y~0_9, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_8, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6158#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is VALID [2022-04-07 17:38:32,025 INFO L290 TraceCheckUtils]: 7: Hoare triple {6158#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {6159#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-07 17:38:32,026 INFO L290 TraceCheckUtils]: 8: Hoare triple {6159#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {6160#(or (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-07 17:38:32,027 INFO L290 TraceCheckUtils]: 9: Hoare triple {6160#(or (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {6161#(or (and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-07 17:38:32,028 INFO L290 TraceCheckUtils]: 10: Hoare triple {6161#(or (and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {6162#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:38:32,028 INFO L290 TraceCheckUtils]: 11: Hoare triple {6162#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [115] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (= v_main_~y~0_10 (+ (* (- 1) v_main_~x~0_6) v_main_~y~0_11 v_main_~x~0_7)) (< v_main_~x~0_6 v_main_~x~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_11 v_main_~y~0_10) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_11, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_10, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {6162#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:38:32,029 INFO L290 TraceCheckUtils]: 12: Hoare triple {6162#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {6162#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:38:32,029 INFO L290 TraceCheckUtils]: 13: Hoare triple {6162#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {6162#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:38:32,030 INFO L290 TraceCheckUtils]: 14: Hoare triple {6162#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {6162#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:38:32,031 INFO L272 TraceCheckUtils]: 15: Hoare triple {6162#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {6163#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:38:32,031 INFO L290 TraceCheckUtils]: 16: Hoare triple {6163#(not (= |__VERIFIER_assert_#in~cond| 0))} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6164#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:38:32,031 INFO L290 TraceCheckUtils]: 17: Hoare triple {6164#(not (= __VERIFIER_assert_~cond 0))} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {6153#false} is VALID [2022-04-07 17:38:32,031 INFO L290 TraceCheckUtils]: 18: Hoare triple {6153#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6153#false} is VALID [2022-04-07 17:38:32,032 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 17:38:32,032 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:38:32,032 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1974643552] [2022-04-07 17:38:32,032 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1974643552] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:38:32,032 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [786194308] [2022-04-07 17:38:32,032 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:38:32,032 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:38:32,032 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:38:32,033 INFO L229 MonitoredProcess]: Starting monitored process 22 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:38:32,033 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Waiting until timeout for monitored process [2022-04-07 17:38:32,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:38:32,067 INFO L263 TraceCheckSpWp]: Trace formula consists of 64 conjuncts, 12 conjunts are in the unsatisfiable core [2022-04-07 17:38:32,113 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:38:32,114 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:38:37,700 INFO L272 TraceCheckUtils]: 0: Hoare triple {6152#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6152#true} is VALID [2022-04-07 17:38:37,700 INFO L290 TraceCheckUtils]: 1: Hoare triple {6152#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6152#true} is VALID [2022-04-07 17:38:37,700 INFO L290 TraceCheckUtils]: 2: Hoare triple {6152#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6152#true} is VALID [2022-04-07 17:38:37,700 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6152#true} {6152#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6152#true} is VALID [2022-04-07 17:38:37,700 INFO L272 TraceCheckUtils]: 4: Hoare triple {6152#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6152#true} is VALID [2022-04-07 17:38:37,701 INFO L290 TraceCheckUtils]: 5: Hoare triple {6152#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {6157#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 17:38:37,721 INFO L290 TraceCheckUtils]: 6: Hoare triple {6157#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [105] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~y~0_9 v_main_~y~0_8) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0)) (and (= v_main_~x~0_3 (+ (* (- 1) v_main_~y~0_8) v_main_~x~0_4 v_main_~y~0_9)) (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_9 v_it_1 1) v_main_~y~0_8)))) (< 0 .cse0) (< v_main_~y~0_9 v_main_~y~0_8)))) InVars {main_~y~0=v_main_~y~0_9, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_8, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6187#(or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)))} is VALID [2022-04-07 17:38:37,723 INFO L290 TraceCheckUtils]: 7: Hoare triple {6187#(or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {6191#(and (not (< 0 (mod main_~x~0 4294967296))) (or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (= main_~y~0 0))))} is VALID [2022-04-07 17:38:37,724 INFO L290 TraceCheckUtils]: 8: Hoare triple {6191#(and (not (< 0 (mod main_~x~0 4294967296))) (or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (= main_~y~0 0))))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {6191#(and (not (< 0 (mod main_~x~0 4294967296))) (or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (= main_~y~0 0))))} is VALID [2022-04-07 17:38:37,726 INFO L290 TraceCheckUtils]: 9: Hoare triple {6191#(and (not (< 0 (mod main_~x~0 4294967296))) (or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (= main_~y~0 0))))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {6198#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))) (or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (= main_~y~0 0))))} is VALID [2022-04-07 17:38:37,728 INFO L290 TraceCheckUtils]: 10: Hoare triple {6198#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))) (or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (= main_~y~0 0))))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {6198#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))) (or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (= main_~y~0 0))))} is VALID [2022-04-07 17:38:37,731 INFO L290 TraceCheckUtils]: 11: Hoare triple {6198#(and (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))) (or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (= main_~y~0 0))))} [115] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (= v_main_~y~0_10 (+ (* (- 1) v_main_~x~0_6) v_main_~y~0_11 v_main_~x~0_7)) (< v_main_~x~0_6 v_main_~x~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_11 v_main_~y~0_10) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_11, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_10, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {6205#(and (or (and (<= (div (+ main_~y~0 (* (- 1) main_~n~0)) (- 4294967296)) (div (+ main_~n~0 (* (- 1) main_~y~0)) 4294967296)) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (<= (div (- main_~n~0) (- 4294967296)) (div main_~n~0 4294967296)) (= main_~y~0 0))) (not (< 0 (mod main_~z~0 4294967296))))} is VALID [2022-04-07 17:38:37,733 INFO L290 TraceCheckUtils]: 12: Hoare triple {6205#(and (or (and (<= (div (+ main_~y~0 (* (- 1) main_~n~0)) (- 4294967296)) (div (+ main_~n~0 (* (- 1) main_~y~0)) 4294967296)) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (<= (div (- main_~n~0) (- 4294967296)) (div main_~n~0 4294967296)) (= main_~y~0 0))) (not (< 0 (mod main_~z~0 4294967296))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {6205#(and (or (and (<= (div (+ main_~y~0 (* (- 1) main_~n~0)) (- 4294967296)) (div (+ main_~n~0 (* (- 1) main_~y~0)) 4294967296)) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (<= (div (- main_~n~0) (- 4294967296)) (div main_~n~0 4294967296)) (= main_~y~0 0))) (not (< 0 (mod main_~z~0 4294967296))))} is VALID [2022-04-07 17:38:37,735 INFO L290 TraceCheckUtils]: 13: Hoare triple {6205#(and (or (and (<= (div (+ main_~y~0 (* (- 1) main_~n~0)) (- 4294967296)) (div (+ main_~n~0 (* (- 1) main_~y~0)) 4294967296)) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (<= (div (- main_~n~0) (- 4294967296)) (div main_~n~0 4294967296)) (= main_~y~0 0))) (not (< 0 (mod main_~z~0 4294967296))))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {6205#(and (or (and (<= (div (+ main_~y~0 (* (- 1) main_~n~0)) (- 4294967296)) (div (+ main_~n~0 (* (- 1) main_~y~0)) 4294967296)) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (<= (div (- main_~n~0) (- 4294967296)) (div main_~n~0 4294967296)) (= main_~y~0 0))) (not (< 0 (mod main_~z~0 4294967296))))} is VALID [2022-04-07 17:38:37,744 INFO L290 TraceCheckUtils]: 14: Hoare triple {6205#(and (or (and (<= (div (+ main_~y~0 (* (- 1) main_~n~0)) (- 4294967296)) (div (+ main_~n~0 (* (- 1) main_~y~0)) 4294967296)) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (<= (div (- main_~n~0) (- 4294967296)) (div main_~n~0 4294967296)) (= main_~y~0 0))) (not (< 0 (mod main_~z~0 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {6215#(and (<= (div (* (- 1) main_~n~0) (- 4294967296)) (div main_~n~0 4294967296)) (not (< 0 (mod main_~z~0 4294967296))))} is VALID [2022-04-07 17:38:37,745 INFO L272 TraceCheckUtils]: 15: Hoare triple {6215#(and (<= (div (* (- 1) main_~n~0) (- 4294967296)) (div main_~n~0 4294967296)) (not (< 0 (mod main_~z~0 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {6219#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:38:37,746 INFO L290 TraceCheckUtils]: 16: Hoare triple {6219#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6223#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:38:37,746 INFO L290 TraceCheckUtils]: 17: Hoare triple {6223#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {6153#false} is VALID [2022-04-07 17:38:37,746 INFO L290 TraceCheckUtils]: 18: Hoare triple {6153#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6153#false} is VALID [2022-04-07 17:38:37,746 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:38:37,746 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 17:38:58,569 INFO L290 TraceCheckUtils]: 18: Hoare triple {6153#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6153#false} is VALID [2022-04-07 17:38:58,570 INFO L290 TraceCheckUtils]: 17: Hoare triple {6223#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {6153#false} is VALID [2022-04-07 17:38:58,570 INFO L290 TraceCheckUtils]: 16: Hoare triple {6219#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6223#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:38:58,571 INFO L272 TraceCheckUtils]: 15: Hoare triple {6162#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {6219#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:38:58,572 INFO L290 TraceCheckUtils]: 14: Hoare triple {6161#(or (and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {6162#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:38:58,572 INFO L290 TraceCheckUtils]: 13: Hoare triple {6161#(or (and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {6161#(or (and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-07 17:38:58,573 INFO L290 TraceCheckUtils]: 12: Hoare triple {6161#(or (and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {6161#(or (and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-07 17:39:00,582 WARN L290 TraceCheckUtils]: 11: Hoare triple {6251#(or (and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (forall ((aux_mod_v_main_~y~0_68_31 Int)) (or (< aux_mod_v_main_~y~0_68_31 0) (<= 1 aux_mod_v_main_~y~0_68_31) (and (or (forall ((aux_div_v_main_~y~0_68_31 Int)) (not (= main_~y~0 (+ (* aux_div_v_main_~y~0_68_31 4294967296) aux_mod_v_main_~y~0_68_31)))) (< 0 (mod main_~x~0 4294967296))) (or (forall ((aux_div_v_main_~y~0_68_31 Int)) (or (not (< main_~y~0 (+ (* aux_div_v_main_~y~0_68_31 4294967296) aux_mod_v_main_~y~0_68_31))) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= (+ v_it_4 main_~y~0 1) (+ (* aux_div_v_main_~y~0_68_31 4294967296) aux_mod_v_main_~y~0_68_31)) (<= 1 v_it_4))))) (not (< 0 (mod main_~x~0 4294967296))))))))} [115] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (= v_main_~y~0_10 (+ (* (- 1) v_main_~x~0_6) v_main_~y~0_11 v_main_~x~0_7)) (< v_main_~x~0_6 v_main_~x~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_11 v_main_~y~0_10) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_11, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_10, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {6161#(or (and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is UNKNOWN [2022-04-07 17:39:00,745 INFO L290 TraceCheckUtils]: 10: Hoare triple {6251#(or (and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (forall ((aux_mod_v_main_~y~0_68_31 Int)) (or (< aux_mod_v_main_~y~0_68_31 0) (<= 1 aux_mod_v_main_~y~0_68_31) (and (or (forall ((aux_div_v_main_~y~0_68_31 Int)) (not (= main_~y~0 (+ (* aux_div_v_main_~y~0_68_31 4294967296) aux_mod_v_main_~y~0_68_31)))) (< 0 (mod main_~x~0 4294967296))) (or (forall ((aux_div_v_main_~y~0_68_31 Int)) (or (not (< main_~y~0 (+ (* aux_div_v_main_~y~0_68_31 4294967296) aux_mod_v_main_~y~0_68_31))) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= (+ v_it_4 main_~y~0 1) (+ (* aux_div_v_main_~y~0_68_31 4294967296) aux_mod_v_main_~y~0_68_31)) (<= 1 v_it_4))))) (not (< 0 (mod main_~x~0 4294967296))))))))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {6251#(or (and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (forall ((aux_mod_v_main_~y~0_68_31 Int)) (or (< aux_mod_v_main_~y~0_68_31 0) (<= 1 aux_mod_v_main_~y~0_68_31) (and (or (forall ((aux_div_v_main_~y~0_68_31 Int)) (not (= main_~y~0 (+ (* aux_div_v_main_~y~0_68_31 4294967296) aux_mod_v_main_~y~0_68_31)))) (< 0 (mod main_~x~0 4294967296))) (or (forall ((aux_div_v_main_~y~0_68_31 Int)) (or (not (< main_~y~0 (+ (* aux_div_v_main_~y~0_68_31 4294967296) aux_mod_v_main_~y~0_68_31))) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= (+ v_it_4 main_~y~0 1) (+ (* aux_div_v_main_~y~0_68_31 4294967296) aux_mod_v_main_~y~0_68_31)) (<= 1 v_it_4))))) (not (< 0 (mod main_~x~0 4294967296))))))))} is VALID [2022-04-07 17:39:01,243 INFO L290 TraceCheckUtils]: 9: Hoare triple {6258#(or (forall ((aux_mod_v_main_~y~0_68_31 Int)) (or (< aux_mod_v_main_~y~0_68_31 0) (<= 1 aux_mod_v_main_~y~0_68_31) (and (or (forall ((aux_div_v_main_~y~0_68_31 Int)) (not (= main_~y~0 (+ (* aux_div_v_main_~y~0_68_31 4294967296) aux_mod_v_main_~y~0_68_31)))) (< 0 (mod main_~x~0 4294967296))) (or (forall ((aux_div_v_main_~y~0_68_31 Int)) (or (not (< main_~y~0 (+ (* aux_div_v_main_~y~0_68_31 4294967296) aux_mod_v_main_~y~0_68_31))) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= (+ v_it_4 main_~y~0 1) (+ (* aux_div_v_main_~y~0_68_31 4294967296) aux_mod_v_main_~y~0_68_31)) (<= 1 v_it_4))))) (not (< 0 (mod main_~x~0 4294967296))))))) (forall ((aux_div_main_~z~0_26 Int) (aux_mod_main_~z~0_26 Int)) (or (< (+ (* (div (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26)) 4294967296) 4294967296) main_~n~0) (+ aux_mod_main_~z~0_26 (* (div main_~n~0 4294967296) 4294967296) (* 4294967296 aux_div_main_~z~0_26) 1)) (< 0 aux_mod_main_~z~0_26) (< aux_mod_main_~z~0_26 0))))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {6251#(or (and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (forall ((aux_mod_v_main_~y~0_68_31 Int)) (or (< aux_mod_v_main_~y~0_68_31 0) (<= 1 aux_mod_v_main_~y~0_68_31) (and (or (forall ((aux_div_v_main_~y~0_68_31 Int)) (not (= main_~y~0 (+ (* aux_div_v_main_~y~0_68_31 4294967296) aux_mod_v_main_~y~0_68_31)))) (< 0 (mod main_~x~0 4294967296))) (or (forall ((aux_div_v_main_~y~0_68_31 Int)) (or (not (< main_~y~0 (+ (* aux_div_v_main_~y~0_68_31 4294967296) aux_mod_v_main_~y~0_68_31))) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= (+ v_it_4 main_~y~0 1) (+ (* aux_div_v_main_~y~0_68_31 4294967296) aux_mod_v_main_~y~0_68_31)) (<= 1 v_it_4))))) (not (< 0 (mod main_~x~0 4294967296))))))))} is VALID [2022-04-07 17:39:03,255 WARN L290 TraceCheckUtils]: 8: Hoare triple {6258#(or (forall ((aux_mod_v_main_~y~0_68_31 Int)) (or (< aux_mod_v_main_~y~0_68_31 0) (<= 1 aux_mod_v_main_~y~0_68_31) (and (or (forall ((aux_div_v_main_~y~0_68_31 Int)) (not (= main_~y~0 (+ (* aux_div_v_main_~y~0_68_31 4294967296) aux_mod_v_main_~y~0_68_31)))) (< 0 (mod main_~x~0 4294967296))) (or (forall ((aux_div_v_main_~y~0_68_31 Int)) (or (not (< main_~y~0 (+ (* aux_div_v_main_~y~0_68_31 4294967296) aux_mod_v_main_~y~0_68_31))) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= (+ v_it_4 main_~y~0 1) (+ (* aux_div_v_main_~y~0_68_31 4294967296) aux_mod_v_main_~y~0_68_31)) (<= 1 v_it_4))))) (not (< 0 (mod main_~x~0 4294967296))))))) (forall ((aux_div_main_~z~0_26 Int) (aux_mod_main_~z~0_26 Int)) (or (< (+ (* (div (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26)) 4294967296) 4294967296) main_~n~0) (+ aux_mod_main_~z~0_26 (* (div main_~n~0 4294967296) 4294967296) (* 4294967296 aux_div_main_~z~0_26) 1)) (< 0 aux_mod_main_~z~0_26) (< aux_mod_main_~z~0_26 0))))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {6258#(or (forall ((aux_mod_v_main_~y~0_68_31 Int)) (or (< aux_mod_v_main_~y~0_68_31 0) (<= 1 aux_mod_v_main_~y~0_68_31) (and (or (forall ((aux_div_v_main_~y~0_68_31 Int)) (not (= main_~y~0 (+ (* aux_div_v_main_~y~0_68_31 4294967296) aux_mod_v_main_~y~0_68_31)))) (< 0 (mod main_~x~0 4294967296))) (or (forall ((aux_div_v_main_~y~0_68_31 Int)) (or (not (< main_~y~0 (+ (* aux_div_v_main_~y~0_68_31 4294967296) aux_mod_v_main_~y~0_68_31))) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= (+ v_it_4 main_~y~0 1) (+ (* aux_div_v_main_~y~0_68_31 4294967296) aux_mod_v_main_~y~0_68_31)) (<= 1 v_it_4))))) (not (< 0 (mod main_~x~0 4294967296))))))) (forall ((aux_div_main_~z~0_26 Int) (aux_mod_main_~z~0_26 Int)) (or (< (+ (* (div (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26)) 4294967296) 4294967296) main_~n~0) (+ aux_mod_main_~z~0_26 (* (div main_~n~0 4294967296) 4294967296) (* 4294967296 aux_div_main_~z~0_26) 1)) (< 0 aux_mod_main_~z~0_26) (< aux_mod_main_~z~0_26 0))))} is UNKNOWN [2022-04-07 17:39:03,258 INFO L290 TraceCheckUtils]: 7: Hoare triple {6158#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {6258#(or (forall ((aux_mod_v_main_~y~0_68_31 Int)) (or (< aux_mod_v_main_~y~0_68_31 0) (<= 1 aux_mod_v_main_~y~0_68_31) (and (or (forall ((aux_div_v_main_~y~0_68_31 Int)) (not (= main_~y~0 (+ (* aux_div_v_main_~y~0_68_31 4294967296) aux_mod_v_main_~y~0_68_31)))) (< 0 (mod main_~x~0 4294967296))) (or (forall ((aux_div_v_main_~y~0_68_31 Int)) (or (not (< main_~y~0 (+ (* aux_div_v_main_~y~0_68_31 4294967296) aux_mod_v_main_~y~0_68_31))) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) main_~x~0) 4294967296))) (<= (+ v_it_4 main_~y~0 1) (+ (* aux_div_v_main_~y~0_68_31 4294967296) aux_mod_v_main_~y~0_68_31)) (<= 1 v_it_4))))) (not (< 0 (mod main_~x~0 4294967296))))))) (forall ((aux_div_main_~z~0_26 Int) (aux_mod_main_~z~0_26 Int)) (or (< (+ (* (div (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26)) 4294967296) 4294967296) main_~n~0) (+ aux_mod_main_~z~0_26 (* (div main_~n~0 4294967296) 4294967296) (* 4294967296 aux_div_main_~z~0_26) 1)) (< 0 aux_mod_main_~z~0_26) (< aux_mod_main_~z~0_26 0))))} is VALID [2022-04-07 17:39:05,282 WARN L290 TraceCheckUtils]: 6: Hoare triple {6268#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (forall ((aux_mod_v_main_~x~0_54_31 Int)) (or (>= aux_mod_v_main_~x~0_54_31 4294967296) (> 0 aux_mod_v_main_~x~0_54_31) (and (or (< 0 (mod main_~x~0 4294967296)) (forall ((aux_div_v_main_~x~0_54_31 Int)) (not (= main_~x~0 (+ aux_mod_v_main_~x~0_54_31 (* aux_div_v_main_~x~0_54_31 4294967296))))) (forall ((aux_div_v_main_~y~0_69_31 Int)) (or (< main_~y~0 (* aux_div_v_main_~y~0_69_31 4294967296)) (<= (+ (* aux_div_v_main_~y~0_69_31 4294967296) 1) (+ aux_mod_v_main_~x~0_54_31 main_~y~0))))) (or (forall ((aux_div_v_main_~y~0_69_31 Int) (aux_div_v_main_~x~0_54_31 Int)) (or (exists ((v_it_1 Int)) (and (not (< 0 (mod (+ main_~x~0 (* v_it_1 4294967295)) 4294967296))) (<= (+ aux_mod_v_main_~x~0_54_31 v_it_1 (* aux_div_v_main_~x~0_54_31 4294967296) 1) main_~x~0) (<= 1 v_it_1))) (<= (+ (* aux_div_v_main_~y~0_69_31 4294967296) (* aux_div_v_main_~x~0_54_31 4294967296) 1) (+ main_~y~0 main_~x~0)) (< (+ main_~y~0 main_~x~0) (+ aux_mod_v_main_~x~0_54_31 (* aux_div_v_main_~y~0_69_31 4294967296) (* aux_div_v_main_~x~0_54_31 4294967296))) (not (< (+ aux_mod_v_main_~x~0_54_31 (* aux_div_v_main_~x~0_54_31 4294967296)) main_~x~0)))) (not (< 0 (mod main_~x~0 4294967296))))))))} [105] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~y~0_9 v_main_~y~0_8) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0)) (and (= v_main_~x~0_3 (+ (* (- 1) v_main_~y~0_8) v_main_~x~0_4 v_main_~y~0_9)) (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_9 v_it_1 1) v_main_~y~0_8)))) (< 0 .cse0) (< v_main_~y~0_9 v_main_~y~0_8)))) InVars {main_~y~0=v_main_~y~0_9, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_8, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6158#(or (<= (+ (* (div main_~y~0 4294967296) 4294967296) (* 4294967296 (div main_~x~0 4294967296)) 1) (+ main_~y~0 main_~x~0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)))} is UNKNOWN [2022-04-07 17:39:05,293 INFO L290 TraceCheckUtils]: 5: Hoare triple {6152#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {6268#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (forall ((aux_mod_v_main_~x~0_54_31 Int)) (or (>= aux_mod_v_main_~x~0_54_31 4294967296) (> 0 aux_mod_v_main_~x~0_54_31) (and (or (< 0 (mod main_~x~0 4294967296)) (forall ((aux_div_v_main_~x~0_54_31 Int)) (not (= main_~x~0 (+ aux_mod_v_main_~x~0_54_31 (* aux_div_v_main_~x~0_54_31 4294967296))))) (forall ((aux_div_v_main_~y~0_69_31 Int)) (or (< main_~y~0 (* aux_div_v_main_~y~0_69_31 4294967296)) (<= (+ (* aux_div_v_main_~y~0_69_31 4294967296) 1) (+ aux_mod_v_main_~x~0_54_31 main_~y~0))))) (or (forall ((aux_div_v_main_~y~0_69_31 Int) (aux_div_v_main_~x~0_54_31 Int)) (or (exists ((v_it_1 Int)) (and (not (< 0 (mod (+ main_~x~0 (* v_it_1 4294967295)) 4294967296))) (<= (+ aux_mod_v_main_~x~0_54_31 v_it_1 (* aux_div_v_main_~x~0_54_31 4294967296) 1) main_~x~0) (<= 1 v_it_1))) (<= (+ (* aux_div_v_main_~y~0_69_31 4294967296) (* aux_div_v_main_~x~0_54_31 4294967296) 1) (+ main_~y~0 main_~x~0)) (< (+ main_~y~0 main_~x~0) (+ aux_mod_v_main_~x~0_54_31 (* aux_div_v_main_~y~0_69_31 4294967296) (* aux_div_v_main_~x~0_54_31 4294967296))) (not (< (+ aux_mod_v_main_~x~0_54_31 (* aux_div_v_main_~x~0_54_31 4294967296)) main_~x~0)))) (not (< 0 (mod main_~x~0 4294967296))))))))} is VALID [2022-04-07 17:39:05,293 INFO L272 TraceCheckUtils]: 4: Hoare triple {6152#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6152#true} is VALID [2022-04-07 17:39:05,293 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6152#true} {6152#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6152#true} is VALID [2022-04-07 17:39:05,293 INFO L290 TraceCheckUtils]: 2: Hoare triple {6152#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6152#true} is VALID [2022-04-07 17:39:05,293 INFO L290 TraceCheckUtils]: 1: Hoare triple {6152#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6152#true} is VALID [2022-04-07 17:39:05,293 INFO L272 TraceCheckUtils]: 0: Hoare triple {6152#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6152#true} is VALID [2022-04-07 17:39:05,294 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:39:05,294 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [786194308] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 17:39:05,294 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 17:39:05,294 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 10, 10] total 21 [2022-04-07 17:39:05,294 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1181252140] [2022-04-07 17:39:05,294 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 17:39:05,294 INFO L78 Accepts]: Start accepts. Automaton has has 21 states, 20 states have (on average 1.85) internal successors, (37), 18 states have internal predecessors, (37), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-07 17:39:05,295 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:39:05,295 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 21 states, 20 states have (on average 1.85) internal successors, (37), 18 states have internal predecessors, (37), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:39:11,580 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 44 edges. 41 inductive. 0 not inductive. 3 times theorem prover too weak to decide inductivity. [2022-04-07 17:39:11,581 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 21 states [2022-04-07 17:39:11,581 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:39:11,581 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2022-04-07 17:39:11,581 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=84, Invalid=330, Unknown=6, NotChecked=0, Total=420 [2022-04-07 17:39:11,582 INFO L87 Difference]: Start difference. First operand 51 states and 83 transitions. Second operand has 21 states, 20 states have (on average 1.85) internal successors, (37), 18 states have internal predecessors, (37), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:39:15,243 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:39:15,243 INFO L93 Difference]: Finished difference Result 69 states and 111 transitions. [2022-04-07 17:39:15,243 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2022-04-07 17:39:15,243 INFO L78 Accepts]: Start accepts. Automaton has has 21 states, 20 states have (on average 1.85) internal successors, (37), 18 states have internal predecessors, (37), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-07 17:39:15,244 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:39:15,244 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 20 states have (on average 1.85) internal successors, (37), 18 states have internal predecessors, (37), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:39:15,245 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 57 transitions. [2022-04-07 17:39:15,245 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 20 states have (on average 1.85) internal successors, (37), 18 states have internal predecessors, (37), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:39:15,246 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 57 transitions. [2022-04-07 17:39:15,246 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 18 states and 57 transitions. [2022-04-07 17:39:18,241 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 57 edges. 56 inductive. 0 not inductive. 1 times theorem prover too weak to decide inductivity. [2022-04-07 17:39:18,243 INFO L225 Difference]: With dead ends: 69 [2022-04-07 17:39:18,243 INFO L226 Difference]: Without dead ends: 65 [2022-04-07 17:39:18,244 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 61 GetRequests, 25 SyntacticMatches, 6 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 287 ImplicationChecksByTransitivity, 22.8s TimeCoverageRelationStatistics Valid=206, Invalid=779, Unknown=7, NotChecked=0, Total=992 [2022-04-07 17:39:18,244 INFO L913 BasicCegarLoop]: 13 mSDtfsCounter, 25 mSDsluCounter, 36 mSDsCounter, 0 mSdLazyCounter, 48 mSolverCounterSat, 9 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 25 SdHoareTripleChecker+Valid, 49 SdHoareTripleChecker+Invalid, 104 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 9 IncrementalHoareTripleChecker+Valid, 48 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 47 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 17:39:18,244 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [25 Valid, 49 Invalid, 104 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [9 Valid, 48 Invalid, 0 Unknown, 47 Unchecked, 0.1s Time] [2022-04-07 17:39:18,245 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65 states. [2022-04-07 17:39:18,246 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65 to 51. [2022-04-07 17:39:18,246 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:39:18,246 INFO L82 GeneralOperation]: Start isEquivalent. First operand 65 states. Second operand has 51 states, 46 states have (on average 1.7173913043478262) internal successors, (79), 46 states have internal predecessors, (79), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:39:18,247 INFO L74 IsIncluded]: Start isIncluded. First operand 65 states. Second operand has 51 states, 46 states have (on average 1.7173913043478262) internal successors, (79), 46 states have internal predecessors, (79), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:39:18,247 INFO L87 Difference]: Start difference. First operand 65 states. Second operand has 51 states, 46 states have (on average 1.7173913043478262) internal successors, (79), 46 states have internal predecessors, (79), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:39:18,249 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:39:18,249 INFO L93 Difference]: Finished difference Result 65 states and 106 transitions. [2022-04-07 17:39:18,249 INFO L276 IsEmpty]: Start isEmpty. Operand 65 states and 106 transitions. [2022-04-07 17:39:18,249 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:39:18,249 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:39:18,249 INFO L74 IsIncluded]: Start isIncluded. First operand has 51 states, 46 states have (on average 1.7173913043478262) internal successors, (79), 46 states have internal predecessors, (79), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 65 states. [2022-04-07 17:39:18,250 INFO L87 Difference]: Start difference. First operand has 51 states, 46 states have (on average 1.7173913043478262) internal successors, (79), 46 states have internal predecessors, (79), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 65 states. [2022-04-07 17:39:18,251 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:39:18,251 INFO L93 Difference]: Finished difference Result 65 states and 106 transitions. [2022-04-07 17:39:18,251 INFO L276 IsEmpty]: Start isEmpty. Operand 65 states and 106 transitions. [2022-04-07 17:39:18,251 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:39:18,251 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:39:18,251 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:39:18,251 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:39:18,251 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 51 states, 46 states have (on average 1.7173913043478262) internal successors, (79), 46 states have internal predecessors, (79), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:39:18,252 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 83 transitions. [2022-04-07 17:39:18,252 INFO L78 Accepts]: Start accepts. Automaton has 51 states and 83 transitions. Word has length 19 [2022-04-07 17:39:18,252 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:39:18,253 INFO L478 AbstractCegarLoop]: Abstraction has 51 states and 83 transitions. [2022-04-07 17:39:18,253 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 21 states, 20 states have (on average 1.85) internal successors, (37), 18 states have internal predecessors, (37), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:39:18,253 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 83 transitions. [2022-04-07 17:39:18,253 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-07 17:39:18,253 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:39:18,253 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:39:18,278 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Ended with exit code 0 [2022-04-07 17:39:18,467 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 22 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable22 [2022-04-07 17:39:18,467 INFO L403 AbstractCegarLoop]: === Iteration 24 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:39:18,468 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:39:18,468 INFO L85 PathProgramCache]: Analyzing trace with hash 2144376817, now seen corresponding path program 1 times [2022-04-07 17:39:18,468 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:39:18,468 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1259570002] [2022-04-07 17:39:18,468 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:39:18,468 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:39:18,475 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_1.0))) (+ main_~x~0_5 .cse0 (* (- 4294967296) (div (+ main_~x~0_5 .cse0) 4294967296)))) 0)) [2022-04-07 17:39:18,476 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.1))) (+ main_~z~0_8 .cse0 (* (- 4294967296) (div (+ main_~z~0_8 .cse0) 4294967296)))) 0)) [2022-04-07 17:39:18,483 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:39:18,489 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_1.4))) (+ main_~x~0_5 .cse0 (* (- 4294967296) (div (+ main_~x~0_5 .cse0) 4294967296)))) 0)) [2022-04-07 17:39:18,494 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.5))) (+ main_~z~0_8 .cse0 (* (- 4294967296) (div (+ main_~z~0_8 .cse0) 4294967296)))) 0)) [2022-04-07 17:39:18,720 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:39:18,721 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:39:18,723 INFO L290 TraceCheckUtils]: 0: Hoare triple {6576#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6562#true} is VALID [2022-04-07 17:39:18,723 INFO L290 TraceCheckUtils]: 1: Hoare triple {6562#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6562#true} is VALID [2022-04-07 17:39:18,723 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {6562#true} {6562#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6562#true} is VALID [2022-04-07 17:39:18,724 INFO L272 TraceCheckUtils]: 0: Hoare triple {6562#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6576#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:39:18,724 INFO L290 TraceCheckUtils]: 1: Hoare triple {6576#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6562#true} is VALID [2022-04-07 17:39:18,724 INFO L290 TraceCheckUtils]: 2: Hoare triple {6562#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6562#true} is VALID [2022-04-07 17:39:18,724 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6562#true} {6562#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6562#true} is VALID [2022-04-07 17:39:18,724 INFO L272 TraceCheckUtils]: 4: Hoare triple {6562#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6562#true} is VALID [2022-04-07 17:39:18,724 INFO L290 TraceCheckUtils]: 5: Hoare triple {6562#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {6567#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 17:39:18,736 INFO L290 TraceCheckUtils]: 6: Hoare triple {6567#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [105] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~y~0_9 v_main_~y~0_8) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0)) (and (= v_main_~x~0_3 (+ (* (- 1) v_main_~y~0_8) v_main_~x~0_4 v_main_~y~0_9)) (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_9 v_it_1 1) v_main_~y~0_8)))) (< 0 .cse0) (< v_main_~y~0_9 v_main_~y~0_8)))) InVars {main_~y~0=v_main_~y~0_9, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_8, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6568#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ main_~y~0 main_~x~0) (+ (* 4294967296 (div (+ (- 1) main_~y~0 main_~x~0) 4294967296)) 4294967295)))} is VALID [2022-04-07 17:39:18,737 INFO L290 TraceCheckUtils]: 7: Hoare triple {6568#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ main_~y~0 main_~x~0) (+ (* 4294967296 (div (+ (- 1) main_~y~0 main_~x~0) 4294967296)) 4294967295)))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {6569#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ main_~y~0 (* 4294967296 (div main_~x~0 4294967296))) (+ 4294967295 (* (div (+ (- 1) main_~y~0 (* 4294967296 (div main_~x~0 4294967296))) 4294967296) 4294967296))))} is VALID [2022-04-07 17:39:18,738 INFO L290 TraceCheckUtils]: 8: Hoare triple {6569#(or (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (+ main_~y~0 (* 4294967296 (div main_~x~0 4294967296))) (+ 4294967295 (* (div (+ (- 1) main_~y~0 (* 4294967296 (div main_~x~0 4294967296))) 4294967296) 4294967296))))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {6570#(and (or (<= (+ (* (div main_~z~0 4294967296) 4294967296) 1) main_~y~0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))) (= (+ main_~y~0 (* (- 1) main_~z~0)) 0))} is VALID [2022-04-07 17:39:18,740 INFO L290 TraceCheckUtils]: 9: Hoare triple {6570#(and (or (<= (+ (* (div main_~z~0 4294967296) 4294967296) 1) main_~y~0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296))) (= (+ main_~y~0 (* (- 1) main_~z~0)) 0))} [109] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_11 4294967296))) (or (and (< v_main_~z~0_10 v_main_~z~0_11) (= v_main_~x~0_8 (+ v_main_~z~0_11 v_main_~x~0_9 (* (- 1) v_main_~z~0_10))) (< 0 .cse0) (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (not (<= (+ v_main_~z~0_10 v_it_2 1) v_main_~z~0_11)) (< 0 (mod (+ v_main_~z~0_11 (* v_it_2 4294967295)) 4294967296))))) (and (= v_main_~x~0_9 v_main_~x~0_8) (= v_main_~z~0_11 v_main_~z~0_10) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (<= .cse0 0) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_11, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_10, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6571#(or (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-07 17:39:18,741 INFO L290 TraceCheckUtils]: 10: Hoare triple {6571#(or (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {6572#(or (and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} is VALID [2022-04-07 17:39:18,741 INFO L290 TraceCheckUtils]: 11: Hoare triple {6572#(or (and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (<= (+ (* (div main_~y~0 4294967296) 4294967296) 1) main_~y~0))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {6573#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:39:18,742 INFO L290 TraceCheckUtils]: 12: Hoare triple {6573#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {6573#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:39:18,742 INFO L290 TraceCheckUtils]: 13: Hoare triple {6573#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {6573#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:39:18,743 INFO L290 TraceCheckUtils]: 14: Hoare triple {6573#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {6573#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:39:18,743 INFO L272 TraceCheckUtils]: 15: Hoare triple {6573#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {6574#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:39:18,744 INFO L290 TraceCheckUtils]: 16: Hoare triple {6574#(not (= |__VERIFIER_assert_#in~cond| 0))} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6575#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:39:18,744 INFO L290 TraceCheckUtils]: 17: Hoare triple {6575#(not (= __VERIFIER_assert_~cond 0))} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {6563#false} is VALID [2022-04-07 17:39:18,744 INFO L290 TraceCheckUtils]: 18: Hoare triple {6563#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6563#false} is VALID [2022-04-07 17:39:18,744 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:39:18,744 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:39:18,745 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1259570002] [2022-04-07 17:39:18,745 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1259570002] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:39:18,745 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1282003921] [2022-04-07 17:39:18,745 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:39:18,745 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:39:18,745 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:39:18,746 INFO L229 MonitoredProcess]: Starting monitored process 23 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:39:18,747 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Waiting until timeout for monitored process [2022-04-07 17:39:18,819 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:39:18,820 INFO L263 TraceCheckSpWp]: Trace formula consists of 64 conjuncts, 14 conjunts are in the unsatisfiable core [2022-04-07 17:39:18,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:39:18,845 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:39:21,653 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (mod c_main_~n~0 4294967296)) (.cse2 (= c_main_~y~0 c_main_~z~0))) (or (and (< 0 c_main_~y~0) (< 0 .cse0) (forall ((v_it_1 Int)) (or (< 0 (mod (+ c_main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) c_main_~y~0)) (not (<= 1 v_it_1)))) (let ((.cse1 (mod c_main_~y~0 4294967296))) (or (and (< 0 .cse1) (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (not (<= (+ v_it_2 c_main_~z~0 1) c_main_~y~0)) (< 0 (mod (+ (* v_it_2 4294967295) c_main_~y~0) 4294967296)))) (= (+ (* (- 1) c_main_~z~0) c_main_~n~0) c_main_~x~0) (< c_main_~z~0 c_main_~y~0)) (and (<= .cse1 0) (= (+ (* (- 1) c_main_~y~0) c_main_~n~0) c_main_~x~0) .cse2)))) (and (<= .cse0 0) (= c_main_~y~0 0) .cse2 (= c_main_~n~0 c_main_~x~0)))) is different from false [2022-04-07 17:40:37,184 WARN L232 SmtUtils]: Spent 1.02m on a formula simplification. DAG size of input: 59 DAG size of output: 52 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 17:40:59,181 INFO L272 TraceCheckUtils]: 0: Hoare triple {6562#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6562#true} is VALID [2022-04-07 17:40:59,181 INFO L290 TraceCheckUtils]: 1: Hoare triple {6562#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6562#true} is VALID [2022-04-07 17:40:59,181 INFO L290 TraceCheckUtils]: 2: Hoare triple {6562#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6562#true} is VALID [2022-04-07 17:40:59,181 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6562#true} {6562#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6562#true} is VALID [2022-04-07 17:40:59,181 INFO L272 TraceCheckUtils]: 4: Hoare triple {6562#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6562#true} is VALID [2022-04-07 17:40:59,181 INFO L290 TraceCheckUtils]: 5: Hoare triple {6562#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {6567#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 17:40:59,188 INFO L290 TraceCheckUtils]: 6: Hoare triple {6567#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [105] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~y~0_9 v_main_~y~0_8) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0)) (and (= v_main_~x~0_3 (+ (* (- 1) v_main_~y~0_8) v_main_~x~0_4 v_main_~y~0_9)) (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_9 v_it_1 1) v_main_~y~0_8)))) (< 0 .cse0) (< v_main_~y~0_9 v_main_~y~0_8)))) InVars {main_~y~0=v_main_~y~0_9, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_8, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6598#(or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)))} is VALID [2022-04-07 17:40:59,190 INFO L290 TraceCheckUtils]: 7: Hoare triple {6598#(or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {6598#(or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)))} is VALID [2022-04-07 17:40:59,191 INFO L290 TraceCheckUtils]: 8: Hoare triple {6598#(or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {6605#(and (= main_~z~0 main_~y~0) (or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0))))} is VALID [2022-04-07 17:40:59,196 INFO L290 TraceCheckUtils]: 9: Hoare triple {6605#(and (= main_~z~0 main_~y~0) (or (and (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0))))} [109] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_11 4294967296))) (or (and (< v_main_~z~0_10 v_main_~z~0_11) (= v_main_~x~0_8 (+ v_main_~z~0_11 v_main_~x~0_9 (* (- 1) v_main_~z~0_10))) (< 0 .cse0) (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (not (<= (+ v_main_~z~0_10 v_it_2 1) v_main_~z~0_11)) (< 0 (mod (+ v_main_~z~0_11 (* v_it_2 4294967295)) 4294967296))))) (and (= v_main_~x~0_9 v_main_~x~0_8) (= v_main_~z~0_11 v_main_~z~0_10) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (<= .cse0 0) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_11, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_10, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6609#(or (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (or (and (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (< 0 (mod (+ main_~y~0 (* v_it_2 4294967295)) 4294967296)) (not (<= (+ v_it_2 main_~z~0 1) main_~y~0)))) (< main_~z~0 main_~y~0) (= (+ main_~n~0 (* (- 1) main_~z~0)) main_~x~0) (< 0 (mod main_~y~0 4294967296))) (and (= main_~z~0 main_~y~0) (<= (mod main_~y~0 4294967296) 0) (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (= main_~z~0 main_~y~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)))} is VALID [2022-04-07 17:40:59,220 INFO L290 TraceCheckUtils]: 10: Hoare triple {6609#(or (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (or (and (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (< 0 (mod (+ main_~y~0 (* v_it_2 4294967295)) 4294967296)) (not (<= (+ v_it_2 main_~z~0 1) main_~y~0)))) (< main_~z~0 main_~y~0) (= (+ main_~n~0 (* (- 1) main_~z~0)) main_~x~0) (< 0 (mod main_~y~0 4294967296))) (and (= main_~z~0 main_~y~0) (<= (mod main_~y~0 4294967296) 0) (= main_~x~0 (+ main_~n~0 (* (- 1) main_~y~0))))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0)) (and (= main_~n~0 main_~x~0) (= main_~z~0 main_~y~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {6613#(and (or (and (= main_~n~0 main_~x~0) (= main_~z~0 main_~y~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)) (and (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (< 0 (mod (+ main_~y~0 (* v_it_2 4294967295)) 4294967296)) (not (<= (+ v_it_2 main_~z~0 1) main_~y~0)))) (< main_~z~0 main_~y~0) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0) (= main_~n~0 (+ main_~z~0 main_~x~0)))) (not (< 0 (mod main_~z~0 4294967296))))} is VALID [2022-04-07 17:40:59,418 INFO L290 TraceCheckUtils]: 11: Hoare triple {6613#(and (or (and (= main_~n~0 main_~x~0) (= main_~z~0 main_~y~0) (<= (mod main_~n~0 4294967296) 0) (= main_~y~0 0)) (and (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (< 0 (mod (+ main_~y~0 (* v_it_2 4294967295)) 4294967296)) (not (<= (+ v_it_2 main_~z~0 1) main_~y~0)))) (< main_~z~0 main_~y~0) (forall ((v_it_1 Int)) (or (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) main_~y~0)) (not (<= 1 v_it_1)))) (< 0 (mod main_~n~0 4294967296)) (< 0 main_~y~0) (= main_~n~0 (+ main_~z~0 main_~x~0)))) (not (< 0 (mod main_~z~0 4294967296))))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {6617#(exists ((aux_mod_main_~y~0_26 Int)) (and (or (and (exists ((aux_div_main_~y~0_26 Int)) (and (< 0 (+ aux_mod_main_~y~0_26 (* 4294967296 aux_div_main_~y~0_26))) (< main_~z~0 (+ aux_mod_main_~y~0_26 (* 4294967296 aux_div_main_~y~0_26))) (forall ((v_it_1 Int)) (or (not (<= (+ v_it_1 1) (+ aux_mod_main_~y~0_26 (* 4294967296 aux_div_main_~y~0_26)))) (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)))) (forall ((v_it_2 Int)) (or (< 0 (mod (+ aux_mod_main_~y~0_26 (* v_it_2 4294967295)) 4294967296)) (not (<= 1 v_it_2)) (not (<= (+ v_it_2 main_~z~0 1) (+ aux_mod_main_~y~0_26 (* 4294967296 aux_div_main_~y~0_26)))))))) (< 0 (mod main_~n~0 4294967296)) (= main_~n~0 (+ main_~z~0 main_~x~0))) (and (= main_~n~0 main_~x~0) (exists ((aux_div_main_~y~0_26 Int)) (and (= main_~z~0 (+ aux_mod_main_~y~0_26 (* 4294967296 aux_div_main_~y~0_26))) (= (+ aux_mod_main_~y~0_26 (* 4294967296 aux_div_main_~y~0_26)) 0))) (<= (mod main_~n~0 4294967296) 0))) (<= aux_mod_main_~y~0_26 0) (<= 0 aux_mod_main_~y~0_26)))} is VALID [2022-04-07 17:41:01,446 WARN L290 TraceCheckUtils]: 12: Hoare triple {6617#(exists ((aux_mod_main_~y~0_26 Int)) (and (or (and (exists ((aux_div_main_~y~0_26 Int)) (and (< 0 (+ aux_mod_main_~y~0_26 (* 4294967296 aux_div_main_~y~0_26))) (< main_~z~0 (+ aux_mod_main_~y~0_26 (* 4294967296 aux_div_main_~y~0_26))) (forall ((v_it_1 Int)) (or (not (<= (+ v_it_1 1) (+ aux_mod_main_~y~0_26 (* 4294967296 aux_div_main_~y~0_26)))) (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)))) (forall ((v_it_2 Int)) (or (< 0 (mod (+ aux_mod_main_~y~0_26 (* v_it_2 4294967295)) 4294967296)) (not (<= 1 v_it_2)) (not (<= (+ v_it_2 main_~z~0 1) (+ aux_mod_main_~y~0_26 (* 4294967296 aux_div_main_~y~0_26)))))))) (< 0 (mod main_~n~0 4294967296)) (= main_~n~0 (+ main_~z~0 main_~x~0))) (and (= main_~n~0 main_~x~0) (exists ((aux_div_main_~y~0_26 Int)) (and (= main_~z~0 (+ aux_mod_main_~y~0_26 (* 4294967296 aux_div_main_~y~0_26))) (= (+ aux_mod_main_~y~0_26 (* 4294967296 aux_div_main_~y~0_26)) 0))) (<= (mod main_~n~0 4294967296) 0))) (<= aux_mod_main_~y~0_26 0) (<= 0 aux_mod_main_~y~0_26)))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {6621#(exists ((aux_mod_main_~y~0_26 Int)) (and (or (and (exists ((aux_div_main_~y~0_26 Int)) (and (< 0 (+ aux_mod_main_~y~0_26 (* 4294967296 aux_div_main_~y~0_26))) (< main_~z~0 (+ aux_mod_main_~y~0_26 (* 4294967296 aux_div_main_~y~0_26))) (forall ((v_it_1 Int)) (or (not (<= (+ v_it_1 1) (+ aux_mod_main_~y~0_26 (* 4294967296 aux_div_main_~y~0_26)))) (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)))) (forall ((v_it_2 Int)) (or (< 0 (mod (+ aux_mod_main_~y~0_26 (* v_it_2 4294967295)) 4294967296)) (not (<= 1 v_it_2)) (not (<= (+ v_it_2 main_~z~0 1) (+ aux_mod_main_~y~0_26 (* 4294967296 aux_div_main_~y~0_26)))))))) (< 0 (mod main_~n~0 4294967296)) (<= (div (+ main_~z~0 (* (- 1) main_~n~0)) (- 4294967296)) (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296))) (and (exists ((aux_div_main_~y~0_26 Int)) (and (= main_~z~0 (+ aux_mod_main_~y~0_26 (* 4294967296 aux_div_main_~y~0_26))) (= (+ aux_mod_main_~y~0_26 (* 4294967296 aux_div_main_~y~0_26)) 0))) (<= (mod main_~n~0 4294967296) 0))) (<= aux_mod_main_~y~0_26 0) (<= 0 aux_mod_main_~y~0_26)))} is UNKNOWN [2022-04-07 17:41:03,461 WARN L290 TraceCheckUtils]: 13: Hoare triple {6621#(exists ((aux_mod_main_~y~0_26 Int)) (and (or (and (exists ((aux_div_main_~y~0_26 Int)) (and (< 0 (+ aux_mod_main_~y~0_26 (* 4294967296 aux_div_main_~y~0_26))) (< main_~z~0 (+ aux_mod_main_~y~0_26 (* 4294967296 aux_div_main_~y~0_26))) (forall ((v_it_1 Int)) (or (not (<= (+ v_it_1 1) (+ aux_mod_main_~y~0_26 (* 4294967296 aux_div_main_~y~0_26)))) (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)))) (forall ((v_it_2 Int)) (or (< 0 (mod (+ aux_mod_main_~y~0_26 (* v_it_2 4294967295)) 4294967296)) (not (<= 1 v_it_2)) (not (<= (+ v_it_2 main_~z~0 1) (+ aux_mod_main_~y~0_26 (* 4294967296 aux_div_main_~y~0_26)))))))) (< 0 (mod main_~n~0 4294967296)) (<= (div (+ main_~z~0 (* (- 1) main_~n~0)) (- 4294967296)) (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296))) (and (exists ((aux_div_main_~y~0_26 Int)) (and (= main_~z~0 (+ aux_mod_main_~y~0_26 (* 4294967296 aux_div_main_~y~0_26))) (= (+ aux_mod_main_~y~0_26 (* 4294967296 aux_div_main_~y~0_26)) 0))) (<= (mod main_~n~0 4294967296) 0))) (<= aux_mod_main_~y~0_26 0) (<= 0 aux_mod_main_~y~0_26)))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {6621#(exists ((aux_mod_main_~y~0_26 Int)) (and (or (and (exists ((aux_div_main_~y~0_26 Int)) (and (< 0 (+ aux_mod_main_~y~0_26 (* 4294967296 aux_div_main_~y~0_26))) (< main_~z~0 (+ aux_mod_main_~y~0_26 (* 4294967296 aux_div_main_~y~0_26))) (forall ((v_it_1 Int)) (or (not (<= (+ v_it_1 1) (+ aux_mod_main_~y~0_26 (* 4294967296 aux_div_main_~y~0_26)))) (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)))) (forall ((v_it_2 Int)) (or (< 0 (mod (+ aux_mod_main_~y~0_26 (* v_it_2 4294967295)) 4294967296)) (not (<= 1 v_it_2)) (not (<= (+ v_it_2 main_~z~0 1) (+ aux_mod_main_~y~0_26 (* 4294967296 aux_div_main_~y~0_26)))))))) (< 0 (mod main_~n~0 4294967296)) (<= (div (+ main_~z~0 (* (- 1) main_~n~0)) (- 4294967296)) (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296))) (and (exists ((aux_div_main_~y~0_26 Int)) (and (= main_~z~0 (+ aux_mod_main_~y~0_26 (* 4294967296 aux_div_main_~y~0_26))) (= (+ aux_mod_main_~y~0_26 (* 4294967296 aux_div_main_~y~0_26)) 0))) (<= (mod main_~n~0 4294967296) 0))) (<= aux_mod_main_~y~0_26 0) (<= 0 aux_mod_main_~y~0_26)))} is UNKNOWN [2022-04-07 17:41:05,502 WARN L290 TraceCheckUtils]: 14: Hoare triple {6621#(exists ((aux_mod_main_~y~0_26 Int)) (and (or (and (exists ((aux_div_main_~y~0_26 Int)) (and (< 0 (+ aux_mod_main_~y~0_26 (* 4294967296 aux_div_main_~y~0_26))) (< main_~z~0 (+ aux_mod_main_~y~0_26 (* 4294967296 aux_div_main_~y~0_26))) (forall ((v_it_1 Int)) (or (not (<= (+ v_it_1 1) (+ aux_mod_main_~y~0_26 (* 4294967296 aux_div_main_~y~0_26)))) (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)))) (forall ((v_it_2 Int)) (or (< 0 (mod (+ aux_mod_main_~y~0_26 (* v_it_2 4294967295)) 4294967296)) (not (<= 1 v_it_2)) (not (<= (+ v_it_2 main_~z~0 1) (+ aux_mod_main_~y~0_26 (* 4294967296 aux_div_main_~y~0_26)))))))) (< 0 (mod main_~n~0 4294967296)) (<= (div (+ main_~z~0 (* (- 1) main_~n~0)) (- 4294967296)) (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296))) (and (exists ((aux_div_main_~y~0_26 Int)) (and (= main_~z~0 (+ aux_mod_main_~y~0_26 (* 4294967296 aux_div_main_~y~0_26))) (= (+ aux_mod_main_~y~0_26 (* 4294967296 aux_div_main_~y~0_26)) 0))) (<= (mod main_~n~0 4294967296) 0))) (<= aux_mod_main_~y~0_26 0) (<= 0 aux_mod_main_~y~0_26)))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {6621#(exists ((aux_mod_main_~y~0_26 Int)) (and (or (and (exists ((aux_div_main_~y~0_26 Int)) (and (< 0 (+ aux_mod_main_~y~0_26 (* 4294967296 aux_div_main_~y~0_26))) (< main_~z~0 (+ aux_mod_main_~y~0_26 (* 4294967296 aux_div_main_~y~0_26))) (forall ((v_it_1 Int)) (or (not (<= (+ v_it_1 1) (+ aux_mod_main_~y~0_26 (* 4294967296 aux_div_main_~y~0_26)))) (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)))) (forall ((v_it_2 Int)) (or (< 0 (mod (+ aux_mod_main_~y~0_26 (* v_it_2 4294967295)) 4294967296)) (not (<= 1 v_it_2)) (not (<= (+ v_it_2 main_~z~0 1) (+ aux_mod_main_~y~0_26 (* 4294967296 aux_div_main_~y~0_26)))))))) (< 0 (mod main_~n~0 4294967296)) (<= (div (+ main_~z~0 (* (- 1) main_~n~0)) (- 4294967296)) (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296))) (and (exists ((aux_div_main_~y~0_26 Int)) (and (= main_~z~0 (+ aux_mod_main_~y~0_26 (* 4294967296 aux_div_main_~y~0_26))) (= (+ aux_mod_main_~y~0_26 (* 4294967296 aux_div_main_~y~0_26)) 0))) (<= (mod main_~n~0 4294967296) 0))) (<= aux_mod_main_~y~0_26 0) (<= 0 aux_mod_main_~y~0_26)))} is UNKNOWN [2022-04-07 17:41:07,517 WARN L272 TraceCheckUtils]: 15: Hoare triple {6621#(exists ((aux_mod_main_~y~0_26 Int)) (and (or (and (exists ((aux_div_main_~y~0_26 Int)) (and (< 0 (+ aux_mod_main_~y~0_26 (* 4294967296 aux_div_main_~y~0_26))) (< main_~z~0 (+ aux_mod_main_~y~0_26 (* 4294967296 aux_div_main_~y~0_26))) (forall ((v_it_1 Int)) (or (not (<= (+ v_it_1 1) (+ aux_mod_main_~y~0_26 (* 4294967296 aux_div_main_~y~0_26)))) (< 0 (mod (+ main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)))) (forall ((v_it_2 Int)) (or (< 0 (mod (+ aux_mod_main_~y~0_26 (* v_it_2 4294967295)) 4294967296)) (not (<= 1 v_it_2)) (not (<= (+ v_it_2 main_~z~0 1) (+ aux_mod_main_~y~0_26 (* 4294967296 aux_div_main_~y~0_26)))))))) (< 0 (mod main_~n~0 4294967296)) (<= (div (+ main_~z~0 (* (- 1) main_~n~0)) (- 4294967296)) (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296))) (and (exists ((aux_div_main_~y~0_26 Int)) (and (= main_~z~0 (+ aux_mod_main_~y~0_26 (* 4294967296 aux_div_main_~y~0_26))) (= (+ aux_mod_main_~y~0_26 (* 4294967296 aux_div_main_~y~0_26)) 0))) (<= (mod main_~n~0 4294967296) 0))) (<= aux_mod_main_~y~0_26 0) (<= 0 aux_mod_main_~y~0_26)))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {6631#(<= 1 |__VERIFIER_assert_#in~cond|)} is UNKNOWN [2022-04-07 17:41:07,518 INFO L290 TraceCheckUtils]: 16: Hoare triple {6631#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6635#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:41:07,519 INFO L290 TraceCheckUtils]: 17: Hoare triple {6635#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {6563#false} is VALID [2022-04-07 17:41:07,519 INFO L290 TraceCheckUtils]: 18: Hoare triple {6563#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6563#false} is VALID [2022-04-07 17:41:07,519 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 1 not checked. [2022-04-07 17:41:07,519 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 17:42:03,193 INFO L290 TraceCheckUtils]: 18: Hoare triple {6563#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6563#false} is VALID [2022-04-07 17:42:03,194 INFO L290 TraceCheckUtils]: 17: Hoare triple {6635#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {6563#false} is VALID [2022-04-07 17:42:03,194 INFO L290 TraceCheckUtils]: 16: Hoare triple {6631#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6635#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:42:03,195 INFO L272 TraceCheckUtils]: 15: Hoare triple {6573#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {6631#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:42:03,196 INFO L290 TraceCheckUtils]: 14: Hoare triple {6573#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {6573#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:42:03,196 INFO L290 TraceCheckUtils]: 13: Hoare triple {6573#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {6573#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:42:03,197 INFO L290 TraceCheckUtils]: 12: Hoare triple {6660#(or (and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (< 0 (mod main_~x~0 4294967296)))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {6573#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 17:42:03,197 INFO L290 TraceCheckUtils]: 11: Hoare triple {6664#(or (and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (< 0 (mod main_~x~0 4294967296)) (< 0 (mod main_~y~0 4294967296)))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {6660#(or (and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-07 17:42:03,198 INFO L290 TraceCheckUtils]: 10: Hoare triple {6668#(or (< 0 (mod main_~z~0 4294967296)) (< 0 (mod main_~x~0 4294967296)) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (< 0 (mod main_~y~0 4294967296)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {6664#(or (and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (< 0 (mod main_~x~0 4294967296)) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-07 17:42:05,245 WARN L290 TraceCheckUtils]: 9: Hoare triple {6672#(or (forall ((aux_mod_aux_mod_v_main_~z~0_72_31_42 Int) (aux_div_aux_mod_v_main_~z~0_72_31_42 Int)) (or (and (or (forall ((aux_div_v_main_~z~0_72_31 Int) (aux_div_v_main_~x~0_58_31 Int)) (or (< (+ main_~z~0 main_~x~0) (+ (* aux_div_v_main_~x~0_58_31 4294967296) aux_mod_aux_mod_v_main_~z~0_72_31_42 (* aux_div_aux_mod_v_main_~z~0_72_31_42 4294967296) (* 4294967296 aux_div_v_main_~z~0_72_31))) (< (+ (* aux_div_v_main_~x~0_58_31 4294967296) aux_mod_aux_mod_v_main_~z~0_72_31_42 (* aux_div_aux_mod_v_main_~z~0_72_31_42 4294967296) (* 4294967296 aux_div_v_main_~z~0_72_31)) (+ main_~z~0 main_~x~0)) (exists ((v_it_2 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_2 4294967295)) 4294967296))) (<= 1 v_it_2) (<= (+ v_it_2 aux_mod_aux_mod_v_main_~z~0_72_31_42 (* aux_div_aux_mod_v_main_~z~0_72_31_42 4294967296) 1 (* 4294967296 aux_div_v_main_~z~0_72_31)) main_~z~0))) (not (< (+ aux_mod_aux_mod_v_main_~z~0_72_31_42 (* aux_div_aux_mod_v_main_~z~0_72_31_42 4294967296) (* 4294967296 aux_div_v_main_~z~0_72_31)) main_~z~0)))) (not (< 0 (mod main_~z~0 4294967296)))) (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~z~0_72_31 Int)) (not (= main_~z~0 (+ aux_mod_aux_mod_v_main_~z~0_72_31_42 (* aux_div_aux_mod_v_main_~z~0_72_31_42 4294967296) (* 4294967296 aux_div_v_main_~z~0_72_31))))) (< (div (+ (- 1) (* (- 1) main_~x~0)) (- 4294967296)) (+ 2 (div (+ (- 1) main_~x~0) 4294967296))))) (< (+ aux_mod_aux_mod_v_main_~z~0_72_31_42 (* aux_div_aux_mod_v_main_~z~0_72_31_42 4294967296)) 0) (< 0 aux_mod_aux_mod_v_main_~z~0_72_31_42) (< main_~n~0 (+ aux_mod_aux_mod_v_main_~z~0_72_31_42 (* aux_div_aux_mod_v_main_~z~0_72_31_42 4294967296) (* (div main_~n~0 4294967296) 4294967296) 1)) (< aux_mod_aux_mod_v_main_~z~0_72_31_42 0))) (< 0 (mod main_~y~0 4294967296)))} [109] L23-2-->L23-2: Formula: (let ((.cse0 (mod v_main_~z~0_11 4294967296))) (or (and (< v_main_~z~0_10 v_main_~z~0_11) (= v_main_~x~0_8 (+ v_main_~z~0_11 v_main_~x~0_9 (* (- 1) v_main_~z~0_10))) (< 0 .cse0) (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (not (<= (+ v_main_~z~0_10 v_it_2 1) v_main_~z~0_11)) (< 0 (mod (+ v_main_~z~0_11 (* v_it_2 4294967295)) 4294967296))))) (and (= v_main_~x~0_9 v_main_~x~0_8) (= v_main_~z~0_11 v_main_~z~0_10) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (<= .cse0 0) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_11, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_10, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6668#(or (< 0 (mod main_~z~0 4294967296)) (< 0 (mod main_~x~0 4294967296)) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (< 0 (mod main_~y~0 4294967296)))} is UNKNOWN [2022-04-07 17:42:05,257 INFO L290 TraceCheckUtils]: 8: Hoare triple {6676#(or (< (div (+ (- 1) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div main_~n~0 4294967296) 2 (div (+ main_~y~0 (* (- 1) main_~n~0)) 4294967296))) (< (div (+ (- 1) (* (- 1) main_~x~0)) (- 4294967296)) (+ 2 (div (+ (- 1) main_~x~0) 4294967296))) (< 0 (mod main_~y~0 4294967296)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {6672#(or (forall ((aux_mod_aux_mod_v_main_~z~0_72_31_42 Int) (aux_div_aux_mod_v_main_~z~0_72_31_42 Int)) (or (and (or (forall ((aux_div_v_main_~z~0_72_31 Int) (aux_div_v_main_~x~0_58_31 Int)) (or (< (+ main_~z~0 main_~x~0) (+ (* aux_div_v_main_~x~0_58_31 4294967296) aux_mod_aux_mod_v_main_~z~0_72_31_42 (* aux_div_aux_mod_v_main_~z~0_72_31_42 4294967296) (* 4294967296 aux_div_v_main_~z~0_72_31))) (< (+ (* aux_div_v_main_~x~0_58_31 4294967296) aux_mod_aux_mod_v_main_~z~0_72_31_42 (* aux_div_aux_mod_v_main_~z~0_72_31_42 4294967296) (* 4294967296 aux_div_v_main_~z~0_72_31)) (+ main_~z~0 main_~x~0)) (exists ((v_it_2 Int)) (and (not (< 0 (mod (+ main_~z~0 (* v_it_2 4294967295)) 4294967296))) (<= 1 v_it_2) (<= (+ v_it_2 aux_mod_aux_mod_v_main_~z~0_72_31_42 (* aux_div_aux_mod_v_main_~z~0_72_31_42 4294967296) 1 (* 4294967296 aux_div_v_main_~z~0_72_31)) main_~z~0))) (not (< (+ aux_mod_aux_mod_v_main_~z~0_72_31_42 (* aux_div_aux_mod_v_main_~z~0_72_31_42 4294967296) (* 4294967296 aux_div_v_main_~z~0_72_31)) main_~z~0)))) (not (< 0 (mod main_~z~0 4294967296)))) (or (< 0 (mod main_~z~0 4294967296)) (forall ((aux_div_v_main_~z~0_72_31 Int)) (not (= main_~z~0 (+ aux_mod_aux_mod_v_main_~z~0_72_31_42 (* aux_div_aux_mod_v_main_~z~0_72_31_42 4294967296) (* 4294967296 aux_div_v_main_~z~0_72_31))))) (< (div (+ (- 1) (* (- 1) main_~x~0)) (- 4294967296)) (+ 2 (div (+ (- 1) main_~x~0) 4294967296))))) (< (+ aux_mod_aux_mod_v_main_~z~0_72_31_42 (* aux_div_aux_mod_v_main_~z~0_72_31_42 4294967296)) 0) (< 0 aux_mod_aux_mod_v_main_~z~0_72_31_42) (< main_~n~0 (+ aux_mod_aux_mod_v_main_~z~0_72_31_42 (* aux_div_aux_mod_v_main_~z~0_72_31_42 4294967296) (* (div main_~n~0 4294967296) 4294967296) 1)) (< aux_mod_aux_mod_v_main_~z~0_72_31_42 0))) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-07 17:42:05,258 INFO L290 TraceCheckUtils]: 7: Hoare triple {6676#(or (< (div (+ (- 1) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div main_~n~0 4294967296) 2 (div (+ main_~y~0 (* (- 1) main_~n~0)) 4294967296))) (< (div (+ (- 1) (* (- 1) main_~x~0)) (- 4294967296)) (+ 2 (div (+ (- 1) main_~x~0) 4294967296))) (< 0 (mod main_~y~0 4294967296)))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {6676#(or (< (div (+ (- 1) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div main_~n~0 4294967296) 2 (div (+ main_~y~0 (* (- 1) main_~n~0)) 4294967296))) (< (div (+ (- 1) (* (- 1) main_~x~0)) (- 4294967296)) (+ 2 (div (+ (- 1) main_~x~0) 4294967296))) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-07 17:42:07,269 WARN L290 TraceCheckUtils]: 6: Hoare triple {6683#(forall ((aux_div_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~y~0_72_31_107_155_70_173 Int) (aux_div_aux_mod_aux_mod_aux_mod_v_main_~y~0_72_31_107_155_70 Int) (aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~y~0_72_31_107_155_70_173_216 Int) (aux_div_v_main_~x~0_59_41 Int) (aux_div_aux_mod_v_main_~x~0_59_41_111 Int) (aux_div_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~y~0_72_31_107_155_70_173_216 Int)) (or (<= 4294967296 aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~y~0_72_31_107_155_70_173_216) (< aux_div_aux_mod_v_main_~x~0_59_41_111 (+ 2 aux_div_v_main_~x~0_59_41)) (<= (+ 8589934593 main_~n~0 aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~y~0_72_31_107_155_70_173_216 (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~y~0_72_31_107_155_70_173_216 4294967296)) 0) (<= (+ (* 4294967296 aux_div_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~y~0_72_31_107_155_70_173) 1) (+ main_~n~0 aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~y~0_72_31_107_155_70_173_216 (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~y~0_72_31_107_155_70_173_216 4294967296))) (and (or (forall ((aux_div_aux_mod_aux_mod_v_main_~y~0_72_31_107_155 Int)) (or (not (< main_~y~0 (+ main_~n~0 aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~y~0_72_31_107_155_70_173_216 4294967296 (* aux_div_aux_mod_aux_mod_v_main_~y~0_72_31_107_155 4294967296) (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~y~0_72_31_107_155_70_173_216 4294967296)))) (<= (+ 8589934593 main_~n~0 (* aux_div_v_main_~x~0_59_41 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~y~0_72_31_107_155_70_173_216 (* aux_div_aux_mod_aux_mod_v_main_~y~0_72_31_107_155 4294967296) (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~y~0_72_31_107_155_70_173_216 4294967296)) (+ main_~y~0 main_~x~0)) (exists ((v_it_1 Int)) (and (<= (+ v_it_1 main_~y~0) (+ main_~n~0 4294967295 aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~y~0_72_31_107_155_70_173_216 (* aux_div_aux_mod_aux_mod_v_main_~y~0_72_31_107_155 4294967296) (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~y~0_72_31_107_155_70_173_216 4294967296))) (not (< 0 (mod (+ main_~x~0 (* v_it_1 4294967295)) 4294967296))) (<= 1 v_it_1))) (<= (+ main_~y~0 main_~x~0 1) (+ main_~n~0 (* 4294967296 aux_div_aux_mod_v_main_~x~0_59_41_111) aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~y~0_72_31_107_155_70_173_216 (* aux_div_aux_mod_aux_mod_v_main_~y~0_72_31_107_155 4294967296) (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~y~0_72_31_107_155_70_173_216 4294967296))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (<= (+ main_~x~0 4294967297) (* 4294967296 aux_div_aux_mod_v_main_~x~0_59_41_111)) (<= (+ (* aux_div_v_main_~x~0_59_41 4294967296) 4294967297) main_~x~0) (not (= (mod (+ main_~n~0 aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~y~0_72_31_107_155_70_173_216 (* main_~y~0 4294967295)) 4294967296) 0)))) (<= 0 (+ (div main_~n~0 4294967296) aux_div_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~y~0_72_31_107_155_70_173_216 2)) (<= (+ 8589934593 main_~n~0 aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~y~0_72_31_107_155_70_173_216 (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~y~0_72_31_107_155_70_173_216 4294967296)) (* 4294967296 aux_div_aux_mod_aux_mod_aux_mod_v_main_~y~0_72_31_107_155_70)) (< aux_div_aux_mod_aux_mod_aux_mod_v_main_~y~0_72_31_107_155_70 (+ 2 aux_div_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~y~0_72_31_107_155_70_173))))} [105] L16-2-->L16-2: Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~y~0_9 v_main_~y~0_8) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0)) (and (= v_main_~x~0_3 (+ (* (- 1) v_main_~y~0_8) v_main_~x~0_4 v_main_~y~0_9)) (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_9 v_it_1 1) v_main_~y~0_8)))) (< 0 .cse0) (< v_main_~y~0_9 v_main_~y~0_8)))) InVars {main_~y~0=v_main_~y~0_9, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_8, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6676#(or (< (div (+ (- 1) (* (- 1) main_~y~0)) (- 4294967296)) (+ (div main_~n~0 4294967296) 2 (div (+ main_~y~0 (* (- 1) main_~n~0)) 4294967296))) (< (div (+ (- 1) (* (- 1) main_~x~0)) (- 4294967296)) (+ 2 (div (+ (- 1) main_~x~0) 4294967296))) (< 0 (mod main_~y~0 4294967296)))} is UNKNOWN [2022-04-07 17:42:07,303 INFO L290 TraceCheckUtils]: 5: Hoare triple {6562#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {6683#(forall ((aux_div_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~y~0_72_31_107_155_70_173 Int) (aux_div_aux_mod_aux_mod_aux_mod_v_main_~y~0_72_31_107_155_70 Int) (aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~y~0_72_31_107_155_70_173_216 Int) (aux_div_v_main_~x~0_59_41 Int) (aux_div_aux_mod_v_main_~x~0_59_41_111 Int) (aux_div_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~y~0_72_31_107_155_70_173_216 Int)) (or (<= 4294967296 aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~y~0_72_31_107_155_70_173_216) (< aux_div_aux_mod_v_main_~x~0_59_41_111 (+ 2 aux_div_v_main_~x~0_59_41)) (<= (+ 8589934593 main_~n~0 aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~y~0_72_31_107_155_70_173_216 (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~y~0_72_31_107_155_70_173_216 4294967296)) 0) (<= (+ (* 4294967296 aux_div_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~y~0_72_31_107_155_70_173) 1) (+ main_~n~0 aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~y~0_72_31_107_155_70_173_216 (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~y~0_72_31_107_155_70_173_216 4294967296))) (and (or (forall ((aux_div_aux_mod_aux_mod_v_main_~y~0_72_31_107_155 Int)) (or (not (< main_~y~0 (+ main_~n~0 aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~y~0_72_31_107_155_70_173_216 4294967296 (* aux_div_aux_mod_aux_mod_v_main_~y~0_72_31_107_155 4294967296) (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~y~0_72_31_107_155_70_173_216 4294967296)))) (<= (+ 8589934593 main_~n~0 (* aux_div_v_main_~x~0_59_41 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~y~0_72_31_107_155_70_173_216 (* aux_div_aux_mod_aux_mod_v_main_~y~0_72_31_107_155 4294967296) (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~y~0_72_31_107_155_70_173_216 4294967296)) (+ main_~y~0 main_~x~0)) (exists ((v_it_1 Int)) (and (<= (+ v_it_1 main_~y~0) (+ main_~n~0 4294967295 aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~y~0_72_31_107_155_70_173_216 (* aux_div_aux_mod_aux_mod_v_main_~y~0_72_31_107_155 4294967296) (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~y~0_72_31_107_155_70_173_216 4294967296))) (not (< 0 (mod (+ main_~x~0 (* v_it_1 4294967295)) 4294967296))) (<= 1 v_it_1))) (<= (+ main_~y~0 main_~x~0 1) (+ main_~n~0 (* 4294967296 aux_div_aux_mod_v_main_~x~0_59_41_111) aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~y~0_72_31_107_155_70_173_216 (* aux_div_aux_mod_aux_mod_v_main_~y~0_72_31_107_155 4294967296) (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~y~0_72_31_107_155_70_173_216 4294967296))))) (not (< 0 (mod main_~x~0 4294967296)))) (or (<= (+ main_~x~0 4294967297) (* 4294967296 aux_div_aux_mod_v_main_~x~0_59_41_111)) (<= (+ (* aux_div_v_main_~x~0_59_41 4294967296) 4294967297) main_~x~0) (not (= (mod (+ main_~n~0 aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~y~0_72_31_107_155_70_173_216 (* main_~y~0 4294967295)) 4294967296) 0)))) (<= 0 (+ (div main_~n~0 4294967296) aux_div_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~y~0_72_31_107_155_70_173_216 2)) (<= (+ 8589934593 main_~n~0 aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~y~0_72_31_107_155_70_173_216 (* aux_div_aux_mod_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~y~0_72_31_107_155_70_173_216 4294967296)) (* 4294967296 aux_div_aux_mod_aux_mod_aux_mod_v_main_~y~0_72_31_107_155_70)) (< aux_div_aux_mod_aux_mod_aux_mod_v_main_~y~0_72_31_107_155_70 (+ 2 aux_div_aux_mod_aux_mod_aux_mod_aux_mod_v_main_~y~0_72_31_107_155_70_173))))} is VALID [2022-04-07 17:42:07,304 INFO L272 TraceCheckUtils]: 4: Hoare triple {6562#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6562#true} is VALID [2022-04-07 17:42:07,304 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6562#true} {6562#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6562#true} is VALID [2022-04-07 17:42:07,304 INFO L290 TraceCheckUtils]: 2: Hoare triple {6562#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6562#true} is VALID [2022-04-07 17:42:07,304 INFO L290 TraceCheckUtils]: 1: Hoare triple {6562#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6562#true} is VALID [2022-04-07 17:42:07,304 INFO L272 TraceCheckUtils]: 0: Hoare triple {6562#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6562#true} is VALID [2022-04-07 17:42:07,304 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:42:07,304 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1282003921] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 17:42:07,304 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 17:42:07,304 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 11, 11] total 26 [2022-04-07 17:42:07,305 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1271955296] [2022-04-07 17:42:07,305 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 17:42:07,305 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 26 states have (on average 1.3461538461538463) internal successors, (35), 23 states have internal predecessors, (35), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-07 17:42:07,306 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:42:07,306 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 26 states, 26 states have (on average 1.3461538461538463) internal successors, (35), 23 states have internal predecessors, (35), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:42:19,696 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 42 edges. 36 inductive. 0 not inductive. 6 times theorem prover too weak to decide inductivity. [2022-04-07 17:42:19,697 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 26 states [2022-04-07 17:42:19,697 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:42:19,697 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2022-04-07 17:42:19,697 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=123, Invalid=457, Unknown=24, NotChecked=46, Total=650 [2022-04-07 17:42:19,698 INFO L87 Difference]: Start difference. First operand 51 states and 83 transitions. Second operand has 26 states, 26 states have (on average 1.3461538461538463) internal successors, (35), 23 states have internal predecessors, (35), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:42:21,988 WARN L833 $PredicateComparison]: unable to prove that (and (or (< (+ (* (div c_main_~z~0 4294967296) 4294967296) c_main_~n~0) (+ (* (div c_main_~n~0 4294967296) 4294967296) c_main_~z~0 1)) (<= (+ (* 4294967296 (div c_main_~y~0 4294967296)) 1) c_main_~y~0)) (let ((.cse0 (mod c_main_~n~0 4294967296)) (.cse2 (= c_main_~y~0 c_main_~z~0))) (or (and (< 0 c_main_~y~0) (< 0 .cse0) (forall ((v_it_1 Int)) (or (< 0 (mod (+ c_main_~n~0 (* v_it_1 4294967295)) 4294967296)) (not (<= (+ v_it_1 1) c_main_~y~0)) (not (<= 1 v_it_1)))) (let ((.cse1 (mod c_main_~y~0 4294967296))) (or (and (< 0 .cse1) (forall ((v_it_2 Int)) (or (not (<= 1 v_it_2)) (not (<= (+ v_it_2 c_main_~z~0 1) c_main_~y~0)) (< 0 (mod (+ (* v_it_2 4294967295) c_main_~y~0) 4294967296)))) (= (+ (* (- 1) c_main_~z~0) c_main_~n~0) c_main_~x~0) (< c_main_~z~0 c_main_~y~0)) (and (<= .cse1 0) (= (+ (* (- 1) c_main_~y~0) c_main_~n~0) c_main_~x~0) .cse2)))) (and (<= .cse0 0) (= c_main_~y~0 0) .cse2 (= c_main_~n~0 c_main_~x~0))))) is different from false [2022-04-07 17:42:43,670 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:42:43,670 INFO L93 Difference]: Finished difference Result 79 states and 131 transitions. [2022-04-07 17:42:43,670 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2022-04-07 17:42:43,671 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 26 states have (on average 1.3461538461538463) internal successors, (35), 23 states have internal predecessors, (35), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-07 17:42:43,671 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:42:43,671 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 26 states have (on average 1.3461538461538463) internal successors, (35), 23 states have internal predecessors, (35), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:42:43,672 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 86 transitions. [2022-04-07 17:42:43,672 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 26 states have (on average 1.3461538461538463) internal successors, (35), 23 states have internal predecessors, (35), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:42:43,673 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 86 transitions. [2022-04-07 17:42:43,673 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 20 states and 86 transitions. [2022-04-07 17:42:50,129 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 86 edges. 83 inductive. 0 not inductive. 3 times theorem prover too weak to decide inductivity. [2022-04-07 17:42:50,130 INFO L225 Difference]: With dead ends: 79 [2022-04-07 17:42:50,130 INFO L226 Difference]: Without dead ends: 75 [2022-04-07 17:42:50,131 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 65 GetRequests, 23 SyntacticMatches, 6 SemanticMatches, 36 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 338 ImplicationChecksByTransitivity, 141.8s TimeCoverageRelationStatistics Valid=276, Invalid=961, Unknown=31, NotChecked=138, Total=1406 [2022-04-07 17:42:50,131 INFO L913 BasicCegarLoop]: 11 mSDtfsCounter, 127 mSDsluCounter, 50 mSDsCounter, 0 mSdLazyCounter, 118 mSolverCounterSat, 19 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 127 SdHoareTripleChecker+Valid, 61 SdHoareTripleChecker+Invalid, 280 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 19 IncrementalHoareTripleChecker+Valid, 118 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 143 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-07 17:42:50,132 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [127 Valid, 61 Invalid, 280 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [19 Valid, 118 Invalid, 0 Unknown, 143 Unchecked, 0.2s Time] [2022-04-07 17:42:50,132 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 75 states. [2022-04-07 17:42:50,133 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 75 to 53. [2022-04-07 17:42:50,133 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:42:50,134 INFO L82 GeneralOperation]: Start isEquivalent. First operand 75 states. Second operand has 53 states, 48 states have (on average 1.7291666666666667) internal successors, (83), 48 states have internal predecessors, (83), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:42:50,134 INFO L74 IsIncluded]: Start isIncluded. First operand 75 states. Second operand has 53 states, 48 states have (on average 1.7291666666666667) internal successors, (83), 48 states have internal predecessors, (83), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:42:50,134 INFO L87 Difference]: Start difference. First operand 75 states. Second operand has 53 states, 48 states have (on average 1.7291666666666667) internal successors, (83), 48 states have internal predecessors, (83), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:42:50,135 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:42:50,135 INFO L93 Difference]: Finished difference Result 75 states and 126 transitions. [2022-04-07 17:42:50,135 INFO L276 IsEmpty]: Start isEmpty. Operand 75 states and 126 transitions. [2022-04-07 17:42:50,135 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:42:50,136 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:42:50,136 INFO L74 IsIncluded]: Start isIncluded. First operand has 53 states, 48 states have (on average 1.7291666666666667) internal successors, (83), 48 states have internal predecessors, (83), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 75 states. [2022-04-07 17:42:50,136 INFO L87 Difference]: Start difference. First operand has 53 states, 48 states have (on average 1.7291666666666667) internal successors, (83), 48 states have internal predecessors, (83), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 75 states. [2022-04-07 17:42:50,137 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:42:50,137 INFO L93 Difference]: Finished difference Result 75 states and 126 transitions. [2022-04-07 17:42:50,137 INFO L276 IsEmpty]: Start isEmpty. Operand 75 states and 126 transitions. [2022-04-07 17:42:50,137 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:42:50,137 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:42:50,137 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:42:50,137 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:42:50,138 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 53 states, 48 states have (on average 1.7291666666666667) internal successors, (83), 48 states have internal predecessors, (83), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:42:50,138 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53 states to 53 states and 87 transitions. [2022-04-07 17:42:50,138 INFO L78 Accepts]: Start accepts. Automaton has 53 states and 87 transitions. Word has length 19 [2022-04-07 17:42:50,138 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:42:50,139 INFO L478 AbstractCegarLoop]: Abstraction has 53 states and 87 transitions. [2022-04-07 17:42:50,139 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 26 states, 26 states have (on average 1.3461538461538463) internal successors, (35), 23 states have internal predecessors, (35), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:42:50,139 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 87 transitions. [2022-04-07 17:42:50,139 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2022-04-07 17:42:50,139 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:42:50,139 INFO L499 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:42:50,147 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Forceful destruction successful, exit code 0 [2022-04-07 17:42:50,344 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23,23 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:42:50,344 INFO L403 AbstractCegarLoop]: === Iteration 25 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:42:50,344 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:42:50,344 INFO L85 PathProgramCache]: Analyzing trace with hash -369501645, now seen corresponding path program 2 times [2022-04-07 17:42:50,345 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:42:50,345 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1860947353] [2022-04-07 17:42:50,345 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:42:50,345 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:42:50,354 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.0))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-07 17:42:50,355 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_6.1))) (+ main_~y~0_9 .cse0 (* (- 4294967296) (div (+ main_~y~0_9 .cse0) 4294967296)))) 0)) [2022-04-07 17:42:50,355 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_6.2))) (+ main_~y~0_13 .cse0 (* (- 4294967296) (div (+ main_~y~0_13 .cse0) 4294967296)))) 0)) [2022-04-07 17:42:50,364 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:42:50,377 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.4))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-07 17:42:50,381 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_6.5))) (+ main_~y~0_9 .cse0 (* (- 4294967296) (div (+ main_~y~0_9 .cse0) 4294967296)))) 0)) [2022-04-07 17:42:50,382 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_6.6))) (+ main_~y~0_13 .cse0 (* (- 4294967296) (div (+ main_~y~0_13 .cse0) 4294967296)))) 0)) [2022-04-07 17:42:50,614 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:42:50,616 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:42:50,619 INFO L290 TraceCheckUtils]: 0: Hoare triple {7025#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7013#true} is VALID [2022-04-07 17:42:50,619 INFO L290 TraceCheckUtils]: 1: Hoare triple {7013#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7013#true} is VALID [2022-04-07 17:42:50,619 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {7013#true} {7013#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7013#true} is VALID [2022-04-07 17:42:50,620 INFO L272 TraceCheckUtils]: 0: Hoare triple {7013#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7025#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:42:50,620 INFO L290 TraceCheckUtils]: 1: Hoare triple {7025#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7013#true} is VALID [2022-04-07 17:42:50,620 INFO L290 TraceCheckUtils]: 2: Hoare triple {7013#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7013#true} is VALID [2022-04-07 17:42:50,620 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7013#true} {7013#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7013#true} is VALID [2022-04-07 17:42:50,620 INFO L272 TraceCheckUtils]: 4: Hoare triple {7013#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7013#true} is VALID [2022-04-07 17:42:50,621 INFO L290 TraceCheckUtils]: 5: Hoare triple {7013#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {7018#(and (= main_~n~0 main_~x~0) (= main_~y~0 0))} is VALID [2022-04-07 17:42:50,622 INFO L290 TraceCheckUtils]: 6: Hoare triple {7018#(and (= main_~n~0 main_~x~0) (= main_~y~0 0))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {7019#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:42:50,622 INFO L290 TraceCheckUtils]: 7: Hoare triple {7019#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {7020#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:42:50,623 INFO L290 TraceCheckUtils]: 8: Hoare triple {7020#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {7020#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:42:50,624 INFO L290 TraceCheckUtils]: 9: Hoare triple {7020#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [112] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_5 4294967296))) (or (and (= v_main_~y~0_4 v_main_~y~0_5) (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= |v_main_#t~post9_3| |v_main_#t~post9_1|) (<= .cse0 0)) (and (= v_main_~y~0_4 (+ v_main_~y~0_5 v_main_~z~0_3 (* (- 1) v_main_~z~0_2))) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= (+ v_main_~z~0_3 v_it_3 1) v_main_~z~0_2)) (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_5 (* v_it_3 4294967295)) 4294967296)))) (< v_main_~z~0_3 v_main_~z~0_2)))) InVars {main_~y~0=v_main_~y~0_5, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {7020#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:42:50,624 INFO L290 TraceCheckUtils]: 10: Hoare triple {7020#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {7020#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:42:50,625 INFO L290 TraceCheckUtils]: 11: Hoare triple {7020#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {7021#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} is VALID [2022-04-07 17:42:50,625 INFO L290 TraceCheckUtils]: 12: Hoare triple {7021#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {7021#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} is VALID [2022-04-07 17:42:50,626 INFO L290 TraceCheckUtils]: 13: Hoare triple {7021#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {7021#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} is VALID [2022-04-07 17:42:50,627 INFO L290 TraceCheckUtils]: 14: Hoare triple {7021#(and (= main_~z~0 0) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {7022#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:42:50,628 INFO L290 TraceCheckUtils]: 15: Hoare triple {7022#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {7022#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:42:50,629 INFO L272 TraceCheckUtils]: 16: Hoare triple {7022#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {7023#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:42:50,629 INFO L290 TraceCheckUtils]: 17: Hoare triple {7023#(not (= |__VERIFIER_assert_#in~cond| 0))} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7024#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:42:50,630 INFO L290 TraceCheckUtils]: 18: Hoare triple {7024#(not (= __VERIFIER_assert_~cond 0))} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {7014#false} is VALID [2022-04-07 17:42:50,630 INFO L290 TraceCheckUtils]: 19: Hoare triple {7014#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7014#false} is VALID [2022-04-07 17:42:50,630 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-07 17:42:50,630 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:42:50,630 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1860947353] [2022-04-07 17:42:50,630 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1860947353] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:42:50,630 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1575493015] [2022-04-07 17:42:50,630 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-07 17:42:50,630 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:42:50,631 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:42:50,631 INFO L229 MonitoredProcess]: Starting monitored process 24 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:42:50,656 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Waiting until timeout for monitored process [2022-04-07 17:42:50,674 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-07 17:42:50,674 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 17:42:50,675 INFO L263 TraceCheckSpWp]: Trace formula consists of 65 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-07 17:42:50,685 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:42:50,689 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:42:51,483 INFO L272 TraceCheckUtils]: 0: Hoare triple {7013#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7013#true} is VALID [2022-04-07 17:42:51,483 INFO L290 TraceCheckUtils]: 1: Hoare triple {7013#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7013#true} is VALID [2022-04-07 17:42:51,483 INFO L290 TraceCheckUtils]: 2: Hoare triple {7013#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7013#true} is VALID [2022-04-07 17:42:51,483 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7013#true} {7013#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7013#true} is VALID [2022-04-07 17:42:51,483 INFO L272 TraceCheckUtils]: 4: Hoare triple {7013#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7013#true} is VALID [2022-04-07 17:42:51,483 INFO L290 TraceCheckUtils]: 5: Hoare triple {7013#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {7044#(= main_~n~0 main_~x~0)} is VALID [2022-04-07 17:42:51,484 INFO L290 TraceCheckUtils]: 6: Hoare triple {7044#(= main_~n~0 main_~x~0)} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {7048#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:42:51,484 INFO L290 TraceCheckUtils]: 7: Hoare triple {7048#(not (< 0 (mod main_~n~0 4294967296)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {7048#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:42:51,484 INFO L290 TraceCheckUtils]: 8: Hoare triple {7048#(not (< 0 (mod main_~n~0 4294967296)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {7048#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:42:51,485 INFO L290 TraceCheckUtils]: 9: Hoare triple {7048#(not (< 0 (mod main_~n~0 4294967296)))} [112] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_5 4294967296))) (or (and (= v_main_~y~0_4 v_main_~y~0_5) (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= |v_main_#t~post9_3| |v_main_#t~post9_1|) (<= .cse0 0)) (and (= v_main_~y~0_4 (+ v_main_~y~0_5 v_main_~z~0_3 (* (- 1) v_main_~z~0_2))) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= (+ v_main_~z~0_3 v_it_3 1) v_main_~z~0_2)) (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_5 (* v_it_3 4294967295)) 4294967296)))) (< v_main_~z~0_3 v_main_~z~0_2)))) InVars {main_~y~0=v_main_~y~0_5, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {7048#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:42:51,485 INFO L290 TraceCheckUtils]: 10: Hoare triple {7048#(not (< 0 (mod main_~n~0 4294967296)))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {7061#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:42:51,485 INFO L290 TraceCheckUtils]: 11: Hoare triple {7061#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {7061#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:42:51,486 INFO L290 TraceCheckUtils]: 12: Hoare triple {7061#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {7068#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:42:51,487 INFO L290 TraceCheckUtils]: 13: Hoare triple {7068#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {7068#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:42:51,488 INFO L290 TraceCheckUtils]: 14: Hoare triple {7068#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {7075#(and (<= (mod main_~n~0 4294967296) 0) (<= (mod main_~z~0 4294967296) 0))} is VALID [2022-04-07 17:42:51,488 INFO L290 TraceCheckUtils]: 15: Hoare triple {7075#(and (<= (mod main_~n~0 4294967296) 0) (<= (mod main_~z~0 4294967296) 0))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {7075#(and (<= (mod main_~n~0 4294967296) 0) (<= (mod main_~z~0 4294967296) 0))} is VALID [2022-04-07 17:42:51,489 INFO L272 TraceCheckUtils]: 16: Hoare triple {7075#(and (<= (mod main_~n~0 4294967296) 0) (<= (mod main_~z~0 4294967296) 0))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {7082#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:42:51,490 INFO L290 TraceCheckUtils]: 17: Hoare triple {7082#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7086#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:42:51,490 INFO L290 TraceCheckUtils]: 18: Hoare triple {7086#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {7014#false} is VALID [2022-04-07 17:42:51,490 INFO L290 TraceCheckUtils]: 19: Hoare triple {7014#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7014#false} is VALID [2022-04-07 17:42:51,490 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-07 17:42:51,490 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 17:45:03,096 INFO L290 TraceCheckUtils]: 19: Hoare triple {7014#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7014#false} is VALID [2022-04-07 17:45:03,097 INFO L290 TraceCheckUtils]: 18: Hoare triple {7086#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {7014#false} is VALID [2022-04-07 17:45:03,097 INFO L290 TraceCheckUtils]: 17: Hoare triple {7082#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7086#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:45:03,098 INFO L272 TraceCheckUtils]: 16: Hoare triple {7102#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {7082#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:45:03,098 INFO L290 TraceCheckUtils]: 15: Hoare triple {7102#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {7102#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} is VALID [2022-04-07 17:45:04,539 INFO L290 TraceCheckUtils]: 14: Hoare triple {7109#(forall ((aux_mod_v_main_~z~0_77_31 Int)) (or (> 0 aux_mod_v_main_~z~0_77_31) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_77_31) (>= aux_mod_v_main_~z~0_77_31 4294967296) (and (or (forall ((aux_div_v_main_~z~0_77_31 Int)) (not (= main_~z~0 (+ aux_mod_v_main_~z~0_77_31 (* 4294967296 aux_div_v_main_~z~0_77_31))))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_77_31 Int)) (or (not (< main_~z~0 (+ aux_mod_v_main_~z~0_77_31 (* 4294967296 aux_div_v_main_~z~0_77_31)))) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_77_31 (* 4294967296 aux_div_v_main_~z~0_77_31))) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296)))))))))))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {7102#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} is VALID [2022-04-07 17:45:06,563 WARN L290 TraceCheckUtils]: 13: Hoare triple {7113#(forall ((aux_mod_v_main_~z~0_77_31 Int)) (or (> 0 aux_mod_v_main_~z~0_77_31) (and (or (forall ((aux_div_v_main_~z~0_77_31 Int)) (not (= main_~z~0 (+ aux_mod_v_main_~z~0_77_31 (* 4294967296 aux_div_v_main_~z~0_77_31))))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (and (or (< 0 (mod (+ (* aux_mod_v_main_~z~0_77_31 4294967295) main_~z~0 main_~y~0) 4294967296)) (forall ((aux_div_v_main_~z~0_77_31 Int)) (or (not (< main_~z~0 (+ aux_mod_v_main_~z~0_77_31 (* 4294967296 aux_div_v_main_~z~0_77_31)))) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_77_31 (* 4294967296 aux_div_v_main_~z~0_77_31))) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296)))))))) (forall ((aux_div_v_main_~z~0_77_31 Int) (aux_mod_v_main_~y~0_77_31 Int) (aux_div_v_main_~y~0_77_31 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (not (< 0 (mod (+ aux_mod_v_main_~y~0_77_31 (* v_it_6 4294967295)) 4294967296))) (<= (+ v_it_6 main_~z~0 main_~y~0 1) (+ aux_mod_v_main_~z~0_77_31 (* 4294967296 aux_div_v_main_~z~0_77_31) aux_mod_v_main_~y~0_77_31 (* aux_div_v_main_~y~0_77_31 4294967296))))) (<= (+ aux_mod_v_main_~z~0_77_31 (* 4294967296 aux_div_v_main_~z~0_77_31) aux_mod_v_main_~y~0_77_31 (* aux_div_v_main_~y~0_77_31 4294967296)) (+ main_~z~0 main_~y~0)) (<= main_~y~0 (+ aux_mod_v_main_~y~0_77_31 (* aux_div_v_main_~y~0_77_31 4294967296))) (<= aux_mod_v_main_~y~0_77_31 0) (<= 4294967296 aux_mod_v_main_~y~0_77_31) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 aux_mod_v_main_~y~0_77_31 (* aux_div_v_main_~y~0_77_31 4294967296) 1) main_~y~0) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296)))))))))) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_77_31) (>= aux_mod_v_main_~z~0_77_31 4294967296)))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {7109#(forall ((aux_mod_v_main_~z~0_77_31 Int)) (or (> 0 aux_mod_v_main_~z~0_77_31) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_77_31) (>= aux_mod_v_main_~z~0_77_31 4294967296) (and (or (forall ((aux_div_v_main_~z~0_77_31 Int)) (not (= main_~z~0 (+ aux_mod_v_main_~z~0_77_31 (* 4294967296 aux_div_v_main_~z~0_77_31))))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_77_31 Int)) (or (not (< main_~z~0 (+ aux_mod_v_main_~z~0_77_31 (* 4294967296 aux_div_v_main_~z~0_77_31)))) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_77_31 (* 4294967296 aux_div_v_main_~z~0_77_31))) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296)))))))))))} is UNKNOWN [2022-04-07 17:45:08,580 WARN L290 TraceCheckUtils]: 12: Hoare triple {7117#(forall ((aux_mod_v_main_~z~0_77_31 Int) (aux_mod_main_~z~0_26 Int)) (or (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_77_31) (< aux_mod_v_main_~z~0_77_31 0) (and (or (forall ((aux_div_v_main_~z~0_77_31 Int) (aux_div_main_~z~0_26 Int)) (not (= (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26)) (+ aux_mod_v_main_~z~0_77_31 (* 4294967296 aux_div_v_main_~z~0_77_31))))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (and (forall ((aux_div_v_main_~z~0_77_31 Int) (aux_div_main_~z~0_26 Int) (aux_mod_v_main_~y~0_77_31 Int) (aux_div_v_main_~y~0_77_31 Int)) (or (<= main_~y~0 (+ aux_mod_v_main_~y~0_77_31 (* aux_div_v_main_~y~0_77_31 4294967296))) (<= aux_mod_v_main_~y~0_77_31 0) (<= 4294967296 aux_mod_v_main_~y~0_77_31) (<= (+ aux_mod_v_main_~z~0_77_31 (* 4294967296 aux_div_v_main_~z~0_77_31) aux_mod_v_main_~y~0_77_31 (* aux_div_v_main_~y~0_77_31 4294967296)) (+ aux_mod_main_~z~0_26 main_~y~0 (* 4294967296 aux_div_main_~z~0_26))) (exists ((v_it_6 Int)) (and (<= (+ aux_mod_main_~z~0_26 v_it_6 main_~y~0 (* 4294967296 aux_div_main_~z~0_26) 1) (+ aux_mod_v_main_~z~0_77_31 (* 4294967296 aux_div_v_main_~z~0_77_31) aux_mod_v_main_~y~0_77_31 (* aux_div_v_main_~y~0_77_31 4294967296))) (<= 1 v_it_6) (not (< 0 (mod (+ aux_mod_v_main_~y~0_77_31 (* v_it_6 4294967295)) 4294967296))))) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 aux_mod_v_main_~y~0_77_31 (* aux_div_v_main_~y~0_77_31 4294967296) 1) main_~y~0) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))))) (or (forall ((aux_div_v_main_~z~0_77_31 Int) (aux_div_main_~z~0_26 Int)) (or (exists ((v_it_6 Int)) (and (<= (+ aux_mod_main_~z~0_26 v_it_6 (* 4294967296 aux_div_main_~z~0_26) 1) (+ aux_mod_v_main_~z~0_77_31 (* 4294967296 aux_div_v_main_~z~0_77_31))) (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26)) (+ aux_mod_v_main_~z~0_77_31 (* 4294967296 aux_div_v_main_~z~0_77_31)))))) (< 0 (mod (+ aux_mod_main_~z~0_26 (* aux_mod_v_main_~z~0_77_31 4294967295) main_~y~0) 4294967296)))))) (< 0 aux_mod_main_~z~0_26) (<= 4294967296 aux_mod_v_main_~z~0_77_31) (< aux_mod_main_~z~0_26 0)))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {7113#(forall ((aux_mod_v_main_~z~0_77_31 Int)) (or (> 0 aux_mod_v_main_~z~0_77_31) (and (or (forall ((aux_div_v_main_~z~0_77_31 Int)) (not (= main_~z~0 (+ aux_mod_v_main_~z~0_77_31 (* 4294967296 aux_div_v_main_~z~0_77_31))))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (and (or (< 0 (mod (+ (* aux_mod_v_main_~z~0_77_31 4294967295) main_~z~0 main_~y~0) 4294967296)) (forall ((aux_div_v_main_~z~0_77_31 Int)) (or (not (< main_~z~0 (+ aux_mod_v_main_~z~0_77_31 (* 4294967296 aux_div_v_main_~z~0_77_31)))) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_77_31 (* 4294967296 aux_div_v_main_~z~0_77_31))) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296)))))))) (forall ((aux_div_v_main_~z~0_77_31 Int) (aux_mod_v_main_~y~0_77_31 Int) (aux_div_v_main_~y~0_77_31 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (not (< 0 (mod (+ aux_mod_v_main_~y~0_77_31 (* v_it_6 4294967295)) 4294967296))) (<= (+ v_it_6 main_~z~0 main_~y~0 1) (+ aux_mod_v_main_~z~0_77_31 (* 4294967296 aux_div_v_main_~z~0_77_31) aux_mod_v_main_~y~0_77_31 (* aux_div_v_main_~y~0_77_31 4294967296))))) (<= (+ aux_mod_v_main_~z~0_77_31 (* 4294967296 aux_div_v_main_~z~0_77_31) aux_mod_v_main_~y~0_77_31 (* aux_div_v_main_~y~0_77_31 4294967296)) (+ main_~z~0 main_~y~0)) (<= main_~y~0 (+ aux_mod_v_main_~y~0_77_31 (* aux_div_v_main_~y~0_77_31 4294967296))) (<= aux_mod_v_main_~y~0_77_31 0) (<= 4294967296 aux_mod_v_main_~y~0_77_31) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 aux_mod_v_main_~y~0_77_31 (* aux_div_v_main_~y~0_77_31 4294967296) 1) main_~y~0) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296)))))))))) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_77_31) (>= aux_mod_v_main_~z~0_77_31 4294967296)))} is UNKNOWN [2022-04-07 17:45:10,599 WARN L290 TraceCheckUtils]: 11: Hoare triple {7117#(forall ((aux_mod_v_main_~z~0_77_31 Int) (aux_mod_main_~z~0_26 Int)) (or (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_77_31) (< aux_mod_v_main_~z~0_77_31 0) (and (or (forall ((aux_div_v_main_~z~0_77_31 Int) (aux_div_main_~z~0_26 Int)) (not (= (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26)) (+ aux_mod_v_main_~z~0_77_31 (* 4294967296 aux_div_v_main_~z~0_77_31))))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (and (forall ((aux_div_v_main_~z~0_77_31 Int) (aux_div_main_~z~0_26 Int) (aux_mod_v_main_~y~0_77_31 Int) (aux_div_v_main_~y~0_77_31 Int)) (or (<= main_~y~0 (+ aux_mod_v_main_~y~0_77_31 (* aux_div_v_main_~y~0_77_31 4294967296))) (<= aux_mod_v_main_~y~0_77_31 0) (<= 4294967296 aux_mod_v_main_~y~0_77_31) (<= (+ aux_mod_v_main_~z~0_77_31 (* 4294967296 aux_div_v_main_~z~0_77_31) aux_mod_v_main_~y~0_77_31 (* aux_div_v_main_~y~0_77_31 4294967296)) (+ aux_mod_main_~z~0_26 main_~y~0 (* 4294967296 aux_div_main_~z~0_26))) (exists ((v_it_6 Int)) (and (<= (+ aux_mod_main_~z~0_26 v_it_6 main_~y~0 (* 4294967296 aux_div_main_~z~0_26) 1) (+ aux_mod_v_main_~z~0_77_31 (* 4294967296 aux_div_v_main_~z~0_77_31) aux_mod_v_main_~y~0_77_31 (* aux_div_v_main_~y~0_77_31 4294967296))) (<= 1 v_it_6) (not (< 0 (mod (+ aux_mod_v_main_~y~0_77_31 (* v_it_6 4294967295)) 4294967296))))) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 aux_mod_v_main_~y~0_77_31 (* aux_div_v_main_~y~0_77_31 4294967296) 1) main_~y~0) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))))) (or (forall ((aux_div_v_main_~z~0_77_31 Int) (aux_div_main_~z~0_26 Int)) (or (exists ((v_it_6 Int)) (and (<= (+ aux_mod_main_~z~0_26 v_it_6 (* 4294967296 aux_div_main_~z~0_26) 1) (+ aux_mod_v_main_~z~0_77_31 (* 4294967296 aux_div_v_main_~z~0_77_31))) (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26)) (+ aux_mod_v_main_~z~0_77_31 (* 4294967296 aux_div_v_main_~z~0_77_31)))))) (< 0 (mod (+ aux_mod_main_~z~0_26 (* aux_mod_v_main_~z~0_77_31 4294967295) main_~y~0) 4294967296)))))) (< 0 aux_mod_main_~z~0_26) (<= 4294967296 aux_mod_v_main_~z~0_77_31) (< aux_mod_main_~z~0_26 0)))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {7117#(forall ((aux_mod_v_main_~z~0_77_31 Int) (aux_mod_main_~z~0_26 Int)) (or (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_77_31) (< aux_mod_v_main_~z~0_77_31 0) (and (or (forall ((aux_div_v_main_~z~0_77_31 Int) (aux_div_main_~z~0_26 Int)) (not (= (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26)) (+ aux_mod_v_main_~z~0_77_31 (* 4294967296 aux_div_v_main_~z~0_77_31))))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (and (forall ((aux_div_v_main_~z~0_77_31 Int) (aux_div_main_~z~0_26 Int) (aux_mod_v_main_~y~0_77_31 Int) (aux_div_v_main_~y~0_77_31 Int)) (or (<= main_~y~0 (+ aux_mod_v_main_~y~0_77_31 (* aux_div_v_main_~y~0_77_31 4294967296))) (<= aux_mod_v_main_~y~0_77_31 0) (<= 4294967296 aux_mod_v_main_~y~0_77_31) (<= (+ aux_mod_v_main_~z~0_77_31 (* 4294967296 aux_div_v_main_~z~0_77_31) aux_mod_v_main_~y~0_77_31 (* aux_div_v_main_~y~0_77_31 4294967296)) (+ aux_mod_main_~z~0_26 main_~y~0 (* 4294967296 aux_div_main_~z~0_26))) (exists ((v_it_6 Int)) (and (<= (+ aux_mod_main_~z~0_26 v_it_6 main_~y~0 (* 4294967296 aux_div_main_~z~0_26) 1) (+ aux_mod_v_main_~z~0_77_31 (* 4294967296 aux_div_v_main_~z~0_77_31) aux_mod_v_main_~y~0_77_31 (* aux_div_v_main_~y~0_77_31 4294967296))) (<= 1 v_it_6) (not (< 0 (mod (+ aux_mod_v_main_~y~0_77_31 (* v_it_6 4294967295)) 4294967296))))) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 aux_mod_v_main_~y~0_77_31 (* aux_div_v_main_~y~0_77_31 4294967296) 1) main_~y~0) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))))) (or (forall ((aux_div_v_main_~z~0_77_31 Int) (aux_div_main_~z~0_26 Int)) (or (exists ((v_it_6 Int)) (and (<= (+ aux_mod_main_~z~0_26 v_it_6 (* 4294967296 aux_div_main_~z~0_26) 1) (+ aux_mod_v_main_~z~0_77_31 (* 4294967296 aux_div_v_main_~z~0_77_31))) (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26)) (+ aux_mod_v_main_~z~0_77_31 (* 4294967296 aux_div_v_main_~z~0_77_31)))))) (< 0 (mod (+ aux_mod_main_~z~0_26 (* aux_mod_v_main_~z~0_77_31 4294967295) main_~y~0) 4294967296)))))) (< 0 aux_mod_main_~z~0_26) (<= 4294967296 aux_mod_v_main_~z~0_77_31) (< aux_mod_main_~z~0_26 0)))} is UNKNOWN [2022-04-07 17:45:10,604 INFO L290 TraceCheckUtils]: 10: Hoare triple {7048#(not (< 0 (mod main_~n~0 4294967296)))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {7117#(forall ((aux_mod_v_main_~z~0_77_31 Int) (aux_mod_main_~z~0_26 Int)) (or (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_77_31) (< aux_mod_v_main_~z~0_77_31 0) (and (or (forall ((aux_div_v_main_~z~0_77_31 Int) (aux_div_main_~z~0_26 Int)) (not (= (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26)) (+ aux_mod_v_main_~z~0_77_31 (* 4294967296 aux_div_v_main_~z~0_77_31))))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (and (forall ((aux_div_v_main_~z~0_77_31 Int) (aux_div_main_~z~0_26 Int) (aux_mod_v_main_~y~0_77_31 Int) (aux_div_v_main_~y~0_77_31 Int)) (or (<= main_~y~0 (+ aux_mod_v_main_~y~0_77_31 (* aux_div_v_main_~y~0_77_31 4294967296))) (<= aux_mod_v_main_~y~0_77_31 0) (<= 4294967296 aux_mod_v_main_~y~0_77_31) (<= (+ aux_mod_v_main_~z~0_77_31 (* 4294967296 aux_div_v_main_~z~0_77_31) aux_mod_v_main_~y~0_77_31 (* aux_div_v_main_~y~0_77_31 4294967296)) (+ aux_mod_main_~z~0_26 main_~y~0 (* 4294967296 aux_div_main_~z~0_26))) (exists ((v_it_6 Int)) (and (<= (+ aux_mod_main_~z~0_26 v_it_6 main_~y~0 (* 4294967296 aux_div_main_~z~0_26) 1) (+ aux_mod_v_main_~z~0_77_31 (* 4294967296 aux_div_v_main_~z~0_77_31) aux_mod_v_main_~y~0_77_31 (* aux_div_v_main_~y~0_77_31 4294967296))) (<= 1 v_it_6) (not (< 0 (mod (+ aux_mod_v_main_~y~0_77_31 (* v_it_6 4294967295)) 4294967296))))) (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 aux_mod_v_main_~y~0_77_31 (* aux_div_v_main_~y~0_77_31 4294967296) 1) main_~y~0) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))))) (or (forall ((aux_div_v_main_~z~0_77_31 Int) (aux_div_main_~z~0_26 Int)) (or (exists ((v_it_6 Int)) (and (<= (+ aux_mod_main_~z~0_26 v_it_6 (* 4294967296 aux_div_main_~z~0_26) 1) (+ aux_mod_v_main_~z~0_77_31 (* 4294967296 aux_div_v_main_~z~0_77_31))) (<= 1 v_it_6) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26)) (+ aux_mod_v_main_~z~0_77_31 (* 4294967296 aux_div_v_main_~z~0_77_31)))))) (< 0 (mod (+ aux_mod_main_~z~0_26 (* aux_mod_v_main_~z~0_77_31 4294967295) main_~y~0) 4294967296)))))) (< 0 aux_mod_main_~z~0_26) (<= 4294967296 aux_mod_v_main_~z~0_77_31) (< aux_mod_main_~z~0_26 0)))} is VALID [2022-04-07 17:45:10,604 INFO L290 TraceCheckUtils]: 9: Hoare triple {7048#(not (< 0 (mod main_~n~0 4294967296)))} [112] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_5 4294967296))) (or (and (= v_main_~y~0_4 v_main_~y~0_5) (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= |v_main_#t~post9_3| |v_main_#t~post9_1|) (<= .cse0 0)) (and (= v_main_~y~0_4 (+ v_main_~y~0_5 v_main_~z~0_3 (* (- 1) v_main_~z~0_2))) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= (+ v_main_~z~0_3 v_it_3 1) v_main_~z~0_2)) (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_5 (* v_it_3 4294967295)) 4294967296)))) (< v_main_~z~0_3 v_main_~z~0_2)))) InVars {main_~y~0=v_main_~y~0_5, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {7048#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:45:10,605 INFO L290 TraceCheckUtils]: 8: Hoare triple {7048#(not (< 0 (mod main_~n~0 4294967296)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {7048#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:45:10,605 INFO L290 TraceCheckUtils]: 7: Hoare triple {7048#(not (< 0 (mod main_~n~0 4294967296)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {7048#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:45:10,605 INFO L290 TraceCheckUtils]: 6: Hoare triple {7136#(or (< 0 (mod main_~x~0 4294967296)) (not (< 0 (mod main_~n~0 4294967296))))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {7048#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:45:10,606 INFO L290 TraceCheckUtils]: 5: Hoare triple {7013#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {7136#(or (< 0 (mod main_~x~0 4294967296)) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:45:10,606 INFO L272 TraceCheckUtils]: 4: Hoare triple {7013#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7013#true} is VALID [2022-04-07 17:45:10,606 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7013#true} {7013#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7013#true} is VALID [2022-04-07 17:45:10,606 INFO L290 TraceCheckUtils]: 2: Hoare triple {7013#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7013#true} is VALID [2022-04-07 17:45:10,606 INFO L290 TraceCheckUtils]: 1: Hoare triple {7013#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7013#true} is VALID [2022-04-07 17:45:10,606 INFO L272 TraceCheckUtils]: 0: Hoare triple {7013#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7013#true} is VALID [2022-04-07 17:45:10,606 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 1 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 17:45:10,606 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1575493015] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 17:45:10,606 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 17:45:10,606 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9, 10] total 22 [2022-04-07 17:45:10,607 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1960768957] [2022-04-07 17:45:10,607 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 17:45:10,607 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 22 states have (on average 1.7272727272727273) internal successors, (38), 19 states have internal predecessors, (38), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 20 [2022-04-07 17:45:10,607 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:45:10,607 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 22 states, 22 states have (on average 1.7272727272727273) internal successors, (38), 19 states have internal predecessors, (38), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:45:18,790 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 45 edges. 41 inductive. 0 not inductive. 4 times theorem prover too weak to decide inductivity. [2022-04-07 17:45:18,790 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 22 states [2022-04-07 17:45:18,790 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:45:18,790 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2022-04-07 17:45:18,790 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=95, Invalid=358, Unknown=9, NotChecked=0, Total=462 [2022-04-07 17:45:18,791 INFO L87 Difference]: Start difference. First operand 53 states and 87 transitions. Second operand has 22 states, 22 states have (on average 1.7272727272727273) internal successors, (38), 19 states have internal predecessors, (38), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:45:29,617 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:45:29,618 INFO L93 Difference]: Finished difference Result 70 states and 114 transitions. [2022-04-07 17:45:29,618 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-04-07 17:45:29,618 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 22 states have (on average 1.7272727272727273) internal successors, (38), 19 states have internal predecessors, (38), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 20 [2022-04-07 17:45:29,618 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:45:29,618 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 1.7272727272727273) internal successors, (38), 19 states have internal predecessors, (38), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:45:29,619 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 52 transitions. [2022-04-07 17:45:29,619 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 1.7272727272727273) internal successors, (38), 19 states have internal predecessors, (38), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:45:29,620 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 52 transitions. [2022-04-07 17:45:29,620 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 11 states and 52 transitions. [2022-04-07 17:45:29,683 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 52 edges. 52 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:45:29,684 INFO L225 Difference]: With dead ends: 70 [2022-04-07 17:45:29,684 INFO L226 Difference]: Without dead ends: 64 [2022-04-07 17:45:29,684 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 59 GetRequests, 29 SyntacticMatches, 4 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 187 ImplicationChecksByTransitivity, 34.0s TimeCoverageRelationStatistics Valid=160, Invalid=586, Unknown=10, NotChecked=0, Total=756 [2022-04-07 17:45:29,685 INFO L913 BasicCegarLoop]: 10 mSDtfsCounter, 29 mSDsluCounter, 102 mSDsCounter, 0 mSdLazyCounter, 169 mSolverCounterSat, 12 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 29 SdHoareTripleChecker+Valid, 112 SdHoareTripleChecker+Invalid, 230 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 12 IncrementalHoareTripleChecker+Valid, 169 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 49 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-07 17:45:29,685 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [29 Valid, 112 Invalid, 230 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [12 Valid, 169 Invalid, 0 Unknown, 49 Unchecked, 0.2s Time] [2022-04-07 17:45:29,685 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64 states. [2022-04-07 17:45:29,686 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64 to 55. [2022-04-07 17:45:29,686 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:45:29,686 INFO L82 GeneralOperation]: Start isEquivalent. First operand 64 states. Second operand has 55 states, 50 states have (on average 1.72) internal successors, (86), 50 states have internal predecessors, (86), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:45:29,686 INFO L74 IsIncluded]: Start isIncluded. First operand 64 states. Second operand has 55 states, 50 states have (on average 1.72) internal successors, (86), 50 states have internal predecessors, (86), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:45:29,687 INFO L87 Difference]: Start difference. First operand 64 states. Second operand has 55 states, 50 states have (on average 1.72) internal successors, (86), 50 states have internal predecessors, (86), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:45:29,687 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:45:29,687 INFO L93 Difference]: Finished difference Result 64 states and 107 transitions. [2022-04-07 17:45:29,687 INFO L276 IsEmpty]: Start isEmpty. Operand 64 states and 107 transitions. [2022-04-07 17:45:29,687 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:45:29,687 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:45:29,688 INFO L74 IsIncluded]: Start isIncluded. First operand has 55 states, 50 states have (on average 1.72) internal successors, (86), 50 states have internal predecessors, (86), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 64 states. [2022-04-07 17:45:29,688 INFO L87 Difference]: Start difference. First operand has 55 states, 50 states have (on average 1.72) internal successors, (86), 50 states have internal predecessors, (86), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 64 states. [2022-04-07 17:45:29,689 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:45:29,689 INFO L93 Difference]: Finished difference Result 64 states and 107 transitions. [2022-04-07 17:45:29,689 INFO L276 IsEmpty]: Start isEmpty. Operand 64 states and 107 transitions. [2022-04-07 17:45:29,689 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:45:29,689 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:45:29,689 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:45:29,689 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:45:29,689 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 55 states, 50 states have (on average 1.72) internal successors, (86), 50 states have internal predecessors, (86), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:45:29,690 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55 states to 55 states and 90 transitions. [2022-04-07 17:45:29,690 INFO L78 Accepts]: Start accepts. Automaton has 55 states and 90 transitions. Word has length 20 [2022-04-07 17:45:29,690 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:45:29,690 INFO L478 AbstractCegarLoop]: Abstraction has 55 states and 90 transitions. [2022-04-07 17:45:29,690 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 22 states, 22 states have (on average 1.7272727272727273) internal successors, (38), 19 states have internal predecessors, (38), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:45:29,690 INFO L276 IsEmpty]: Start isEmpty. Operand 55 states and 90 transitions. [2022-04-07 17:45:29,691 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2022-04-07 17:45:29,691 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:45:29,691 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:45:29,708 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Forceful destruction successful, exit code 0 [2022-04-07 17:45:29,898 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24,24 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:45:29,899 INFO L403 AbstractCegarLoop]: === Iteration 26 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:45:29,899 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:45:29,899 INFO L85 PathProgramCache]: Analyzing trace with hash 2118261262, now seen corresponding path program 1 times [2022-04-07 17:45:29,899 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:45:29,899 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1164471638] [2022-04-07 17:45:29,899 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:45:29,899 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:45:29,908 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.0))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-07 17:45:29,909 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.1))) (+ main_~z~0_9 .cse0 (* (- 4294967296) (div (+ main_~z~0_9 .cse0) 4294967296)))) 0)) [2022-04-07 17:45:29,909 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_6.2))) (+ main_~y~0_9 .cse0 (* (- 4294967296) (div (+ main_~y~0_9 .cse0) 4294967296)))) 0)) [2022-04-07 17:45:29,914 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:45:29,922 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.4))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-07 17:45:29,925 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.5))) (+ main_~z~0_9 .cse0 (* (- 4294967296) (div (+ main_~z~0_9 .cse0) 4294967296)))) 0)) [2022-04-07 17:45:29,927 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_6.6))) (+ main_~y~0_9 .cse0 (* (- 4294967296) (div (+ main_~y~0_9 .cse0) 4294967296)))) 0)) [2022-04-07 17:45:30,159 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:45:30,160 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:45:30,162 INFO L290 TraceCheckUtils]: 0: Hoare triple {7436#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7422#true} is VALID [2022-04-07 17:45:30,163 INFO L290 TraceCheckUtils]: 1: Hoare triple {7422#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7422#true} is VALID [2022-04-07 17:45:30,163 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {7422#true} {7422#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7422#true} is VALID [2022-04-07 17:45:30,163 INFO L272 TraceCheckUtils]: 0: Hoare triple {7422#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7436#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:45:30,163 INFO L290 TraceCheckUtils]: 1: Hoare triple {7436#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7422#true} is VALID [2022-04-07 17:45:30,163 INFO L290 TraceCheckUtils]: 2: Hoare triple {7422#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7422#true} is VALID [2022-04-07 17:45:30,163 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7422#true} {7422#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7422#true} is VALID [2022-04-07 17:45:30,163 INFO L272 TraceCheckUtils]: 4: Hoare triple {7422#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7422#true} is VALID [2022-04-07 17:45:30,164 INFO L290 TraceCheckUtils]: 5: Hoare triple {7422#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {7427#(and (= main_~n~0 main_~x~0) (= main_~y~0 0))} is VALID [2022-04-07 17:45:30,164 INFO L290 TraceCheckUtils]: 6: Hoare triple {7427#(and (= main_~n~0 main_~x~0) (= main_~y~0 0))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {7428#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:45:30,165 INFO L290 TraceCheckUtils]: 7: Hoare triple {7428#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {7429#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 17:45:30,165 INFO L290 TraceCheckUtils]: 8: Hoare triple {7429#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {7429#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 17:45:30,166 INFO L290 TraceCheckUtils]: 9: Hoare triple {7429#(and (= main_~z~0 0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [112] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_5 4294967296))) (or (and (= v_main_~y~0_4 v_main_~y~0_5) (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= |v_main_#t~post9_3| |v_main_#t~post9_1|) (<= .cse0 0)) (and (= v_main_~y~0_4 (+ v_main_~y~0_5 v_main_~z~0_3 (* (- 1) v_main_~z~0_2))) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= (+ v_main_~z~0_3 v_it_3 1) v_main_~z~0_2)) (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_5 (* v_it_3 4294967295)) 4294967296)))) (< v_main_~z~0_3 v_main_~z~0_2)))) InVars {main_~y~0=v_main_~y~0_5, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {7430#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 17:45:30,167 INFO L290 TraceCheckUtils]: 10: Hoare triple {7430#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {7431#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 17:45:30,167 INFO L290 TraceCheckUtils]: 11: Hoare triple {7431#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {7431#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 17:45:30,169 INFO L290 TraceCheckUtils]: 12: Hoare triple {7431#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [118] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_13 4294967296))) (or (and (= v_main_~z~0_12 (+ v_main_~x~0_11 v_main_~z~0_13 (* (- 1) v_main_~x~0_10))) (< v_main_~x~0_11 v_main_~x~0_10) (forall ((v_it_5 Int)) (or (< 0 (mod (+ v_main_~z~0_13 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)) (not (<= (+ v_main_~x~0_11 v_it_5 1) v_main_~x~0_10)))) (< 0 .cse0)) (and (= v_main_~x~0_11 v_main_~x~0_10) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (<= .cse0 0) (= v_main_~z~0_13 v_main_~z~0_12) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_13, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_12, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {7432#(and (<= main_~z~0 0) (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= 0 main_~z~0))} is VALID [2022-04-07 17:45:30,169 INFO L290 TraceCheckUtils]: 13: Hoare triple {7432#(and (<= main_~z~0 0) (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= 0 main_~z~0))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {7432#(and (<= main_~z~0 0) (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= 0 main_~z~0))} is VALID [2022-04-07 17:45:30,171 INFO L290 TraceCheckUtils]: 14: Hoare triple {7432#(and (<= main_~z~0 0) (<= main_~n~0 (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))) (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (<= 0 main_~z~0))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {7433#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))) (<= 0 main_~z~0))} is VALID [2022-04-07 17:45:30,171 INFO L290 TraceCheckUtils]: 15: Hoare triple {7433#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))) (<= 0 main_~z~0))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {7433#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))) (<= 0 main_~z~0))} is VALID [2022-04-07 17:45:30,173 INFO L272 TraceCheckUtils]: 16: Hoare triple {7433#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))) (<= 0 main_~z~0))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {7434#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:45:30,173 INFO L290 TraceCheckUtils]: 17: Hoare triple {7434#(not (= |__VERIFIER_assert_#in~cond| 0))} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7435#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:45:30,173 INFO L290 TraceCheckUtils]: 18: Hoare triple {7435#(not (= __VERIFIER_assert_~cond 0))} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {7423#false} is VALID [2022-04-07 17:45:30,173 INFO L290 TraceCheckUtils]: 19: Hoare triple {7423#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7423#false} is VALID [2022-04-07 17:45:30,173 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:45:30,174 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:45:30,174 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1164471638] [2022-04-07 17:45:30,174 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1164471638] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:45:30,174 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2063856613] [2022-04-07 17:45:30,174 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:45:30,174 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:45:30,174 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:45:30,175 INFO L229 MonitoredProcess]: Starting monitored process 25 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:45:30,175 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Waiting until timeout for monitored process [2022-04-07 17:45:30,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:45:30,209 INFO L263 TraceCheckSpWp]: Trace formula consists of 65 conjuncts, 9 conjunts are in the unsatisfiable core [2022-04-07 17:45:30,216 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:45:30,217 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:45:30,983 INFO L272 TraceCheckUtils]: 0: Hoare triple {7422#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7422#true} is VALID [2022-04-07 17:45:30,983 INFO L290 TraceCheckUtils]: 1: Hoare triple {7422#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7422#true} is VALID [2022-04-07 17:45:30,983 INFO L290 TraceCheckUtils]: 2: Hoare triple {7422#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7422#true} is VALID [2022-04-07 17:45:30,983 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7422#true} {7422#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7422#true} is VALID [2022-04-07 17:45:30,983 INFO L272 TraceCheckUtils]: 4: Hoare triple {7422#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7422#true} is VALID [2022-04-07 17:45:30,983 INFO L290 TraceCheckUtils]: 5: Hoare triple {7422#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {7455#(= main_~n~0 main_~x~0)} is VALID [2022-04-07 17:45:30,984 INFO L290 TraceCheckUtils]: 6: Hoare triple {7455#(= main_~n~0 main_~x~0)} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {7459#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:45:30,984 INFO L290 TraceCheckUtils]: 7: Hoare triple {7459#(not (< 0 (mod main_~n~0 4294967296)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {7459#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:45:30,984 INFO L290 TraceCheckUtils]: 8: Hoare triple {7459#(not (< 0 (mod main_~n~0 4294967296)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {7459#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:45:30,985 INFO L290 TraceCheckUtils]: 9: Hoare triple {7459#(not (< 0 (mod main_~n~0 4294967296)))} [112] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_5 4294967296))) (or (and (= v_main_~y~0_4 v_main_~y~0_5) (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= |v_main_#t~post9_3| |v_main_#t~post9_1|) (<= .cse0 0)) (and (= v_main_~y~0_4 (+ v_main_~y~0_5 v_main_~z~0_3 (* (- 1) v_main_~z~0_2))) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= (+ v_main_~z~0_3 v_it_3 1) v_main_~z~0_2)) (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_5 (* v_it_3 4294967295)) 4294967296)))) (< v_main_~z~0_3 v_main_~z~0_2)))) InVars {main_~y~0=v_main_~y~0_5, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {7459#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:45:30,985 INFO L290 TraceCheckUtils]: 10: Hoare triple {7459#(not (< 0 (mod main_~n~0 4294967296)))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {7472#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:45:30,985 INFO L290 TraceCheckUtils]: 11: Hoare triple {7472#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {7472#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:45:30,986 INFO L290 TraceCheckUtils]: 12: Hoare triple {7472#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [118] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_13 4294967296))) (or (and (= v_main_~z~0_12 (+ v_main_~x~0_11 v_main_~z~0_13 (* (- 1) v_main_~x~0_10))) (< v_main_~x~0_11 v_main_~x~0_10) (forall ((v_it_5 Int)) (or (< 0 (mod (+ v_main_~z~0_13 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)) (not (<= (+ v_main_~x~0_11 v_it_5 1) v_main_~x~0_10)))) (< 0 .cse0)) (and (= v_main_~x~0_11 v_main_~x~0_10) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (<= .cse0 0) (= v_main_~z~0_13 v_main_~z~0_12) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_13, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_12, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {7472#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:45:30,986 INFO L290 TraceCheckUtils]: 13: Hoare triple {7472#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {7482#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:45:30,987 INFO L290 TraceCheckUtils]: 14: Hoare triple {7482#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~z~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {7486#(and (<= (mod main_~n~0 4294967296) 0) (<= (mod main_~z~0 4294967296) 0))} is VALID [2022-04-07 17:45:30,988 INFO L290 TraceCheckUtils]: 15: Hoare triple {7486#(and (<= (mod main_~n~0 4294967296) 0) (<= (mod main_~z~0 4294967296) 0))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {7486#(and (<= (mod main_~n~0 4294967296) 0) (<= (mod main_~z~0 4294967296) 0))} is VALID [2022-04-07 17:45:30,989 INFO L272 TraceCheckUtils]: 16: Hoare triple {7486#(and (<= (mod main_~n~0 4294967296) 0) (<= (mod main_~z~0 4294967296) 0))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {7493#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:45:30,989 INFO L290 TraceCheckUtils]: 17: Hoare triple {7493#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7497#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:45:30,989 INFO L290 TraceCheckUtils]: 18: Hoare triple {7497#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {7423#false} is VALID [2022-04-07 17:45:30,989 INFO L290 TraceCheckUtils]: 19: Hoare triple {7423#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7423#false} is VALID [2022-04-07 17:45:30,990 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-07 17:45:30,990 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 17:45:43,053 INFO L290 TraceCheckUtils]: 19: Hoare triple {7423#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7423#false} is VALID [2022-04-07 17:45:43,053 INFO L290 TraceCheckUtils]: 18: Hoare triple {7497#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {7423#false} is VALID [2022-04-07 17:45:43,054 INFO L290 TraceCheckUtils]: 17: Hoare triple {7493#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7497#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:45:43,054 INFO L272 TraceCheckUtils]: 16: Hoare triple {7513#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {7493#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:45:43,055 INFO L290 TraceCheckUtils]: 15: Hoare triple {7513#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {7513#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} is VALID [2022-04-07 17:45:45,067 WARN L290 TraceCheckUtils]: 14: Hoare triple {7520#(forall ((aux_mod_v_main_~z~0_83_31 Int)) (or (> 0 aux_mod_v_main_~z~0_83_31) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_83_31) (>= aux_mod_v_main_~z~0_83_31 4294967296) (and (or (forall ((aux_div_v_main_~z~0_83_31 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_83_31 (* 4294967296 aux_div_v_main_~z~0_83_31))) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_83_31 (* 4294967296 aux_div_v_main_~z~0_83_31)))))) (not (< 0 (mod main_~y~0 4294967296)))) (or (forall ((aux_div_v_main_~z~0_83_31 Int)) (not (= main_~z~0 (+ aux_mod_v_main_~z~0_83_31 (* 4294967296 aux_div_v_main_~z~0_83_31))))) (< 0 (mod main_~y~0 4294967296))))))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {7513#(= (mod main_~n~0 4294967296) (mod main_~z~0 4294967296))} is UNKNOWN [2022-04-07 17:45:47,090 WARN L290 TraceCheckUtils]: 13: Hoare triple {7524#(forall ((aux_mod_v_main_~z~0_83_31 Int) (aux_mod_main_~z~0_26 Int)) (or (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_83_31) (and (or (forall ((aux_div_v_main_~z~0_83_31 Int) (aux_div_main_~z~0_26 Int)) (not (= (+ aux_mod_v_main_~z~0_83_31 (* 4294967296 aux_div_v_main_~z~0_83_31)) (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26))))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_83_31 Int) (aux_div_main_~z~0_26 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ aux_mod_main_~z~0_26 v_it_6 (* 4294967296 aux_div_main_~z~0_26) 1) (+ aux_mod_v_main_~z~0_83_31 (* 4294967296 aux_div_v_main_~z~0_83_31))) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26)) (+ aux_mod_v_main_~z~0_83_31 (* 4294967296 aux_div_v_main_~z~0_83_31)))))))) (< 0 aux_mod_main_~z~0_26) (< aux_mod_main_~z~0_26 0) (< aux_mod_v_main_~z~0_83_31 0) (<= 4294967296 aux_mod_v_main_~z~0_83_31)))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {7520#(forall ((aux_mod_v_main_~z~0_83_31 Int)) (or (> 0 aux_mod_v_main_~z~0_83_31) (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_83_31) (>= aux_mod_v_main_~z~0_83_31 4294967296) (and (or (forall ((aux_div_v_main_~z~0_83_31 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ v_it_6 main_~z~0 1) (+ aux_mod_v_main_~z~0_83_31 (* 4294967296 aux_div_v_main_~z~0_83_31))) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< main_~z~0 (+ aux_mod_v_main_~z~0_83_31 (* 4294967296 aux_div_v_main_~z~0_83_31)))))) (not (< 0 (mod main_~y~0 4294967296)))) (or (forall ((aux_div_v_main_~z~0_83_31 Int)) (not (= main_~z~0 (+ aux_mod_v_main_~z~0_83_31 (* 4294967296 aux_div_v_main_~z~0_83_31))))) (< 0 (mod main_~y~0 4294967296))))))} is UNKNOWN [2022-04-07 17:45:47,092 INFO L290 TraceCheckUtils]: 12: Hoare triple {7524#(forall ((aux_mod_v_main_~z~0_83_31 Int) (aux_mod_main_~z~0_26 Int)) (or (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_83_31) (and (or (forall ((aux_div_v_main_~z~0_83_31 Int) (aux_div_main_~z~0_26 Int)) (not (= (+ aux_mod_v_main_~z~0_83_31 (* 4294967296 aux_div_v_main_~z~0_83_31)) (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26))))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_83_31 Int) (aux_div_main_~z~0_26 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ aux_mod_main_~z~0_26 v_it_6 (* 4294967296 aux_div_main_~z~0_26) 1) (+ aux_mod_v_main_~z~0_83_31 (* 4294967296 aux_div_v_main_~z~0_83_31))) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26)) (+ aux_mod_v_main_~z~0_83_31 (* 4294967296 aux_div_v_main_~z~0_83_31)))))))) (< 0 aux_mod_main_~z~0_26) (< aux_mod_main_~z~0_26 0) (< aux_mod_v_main_~z~0_83_31 0) (<= 4294967296 aux_mod_v_main_~z~0_83_31)))} [118] L41-1-->L41-1: Formula: (let ((.cse0 (mod v_main_~z~0_13 4294967296))) (or (and (= v_main_~z~0_12 (+ v_main_~x~0_11 v_main_~z~0_13 (* (- 1) v_main_~x~0_10))) (< v_main_~x~0_11 v_main_~x~0_10) (forall ((v_it_5 Int)) (or (< 0 (mod (+ v_main_~z~0_13 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)) (not (<= (+ v_main_~x~0_11 v_it_5 1) v_main_~x~0_10)))) (< 0 .cse0)) (and (= v_main_~x~0_11 v_main_~x~0_10) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (<= .cse0 0) (= v_main_~z~0_13 v_main_~z~0_12) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_13, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_12, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {7524#(forall ((aux_mod_v_main_~z~0_83_31 Int) (aux_mod_main_~z~0_26 Int)) (or (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_83_31) (and (or (forall ((aux_div_v_main_~z~0_83_31 Int) (aux_div_main_~z~0_26 Int)) (not (= (+ aux_mod_v_main_~z~0_83_31 (* 4294967296 aux_div_v_main_~z~0_83_31)) (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26))))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_83_31 Int) (aux_div_main_~z~0_26 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ aux_mod_main_~z~0_26 v_it_6 (* 4294967296 aux_div_main_~z~0_26) 1) (+ aux_mod_v_main_~z~0_83_31 (* 4294967296 aux_div_v_main_~z~0_83_31))) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26)) (+ aux_mod_v_main_~z~0_83_31 (* 4294967296 aux_div_v_main_~z~0_83_31)))))))) (< 0 aux_mod_main_~z~0_26) (< aux_mod_main_~z~0_26 0) (< aux_mod_v_main_~z~0_83_31 0) (<= 4294967296 aux_mod_v_main_~z~0_83_31)))} is VALID [2022-04-07 17:45:47,092 INFO L290 TraceCheckUtils]: 11: Hoare triple {7524#(forall ((aux_mod_v_main_~z~0_83_31 Int) (aux_mod_main_~z~0_26 Int)) (or (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_83_31) (and (or (forall ((aux_div_v_main_~z~0_83_31 Int) (aux_div_main_~z~0_26 Int)) (not (= (+ aux_mod_v_main_~z~0_83_31 (* 4294967296 aux_div_v_main_~z~0_83_31)) (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26))))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_83_31 Int) (aux_div_main_~z~0_26 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ aux_mod_main_~z~0_26 v_it_6 (* 4294967296 aux_div_main_~z~0_26) 1) (+ aux_mod_v_main_~z~0_83_31 (* 4294967296 aux_div_v_main_~z~0_83_31))) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26)) (+ aux_mod_v_main_~z~0_83_31 (* 4294967296 aux_div_v_main_~z~0_83_31)))))))) (< 0 aux_mod_main_~z~0_26) (< aux_mod_main_~z~0_26 0) (< aux_mod_v_main_~z~0_83_31 0) (<= 4294967296 aux_mod_v_main_~z~0_83_31)))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {7524#(forall ((aux_mod_v_main_~z~0_83_31 Int) (aux_mod_main_~z~0_26 Int)) (or (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_83_31) (and (or (forall ((aux_div_v_main_~z~0_83_31 Int) (aux_div_main_~z~0_26 Int)) (not (= (+ aux_mod_v_main_~z~0_83_31 (* 4294967296 aux_div_v_main_~z~0_83_31)) (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26))))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_83_31 Int) (aux_div_main_~z~0_26 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ aux_mod_main_~z~0_26 v_it_6 (* 4294967296 aux_div_main_~z~0_26) 1) (+ aux_mod_v_main_~z~0_83_31 (* 4294967296 aux_div_v_main_~z~0_83_31))) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26)) (+ aux_mod_v_main_~z~0_83_31 (* 4294967296 aux_div_v_main_~z~0_83_31)))))))) (< 0 aux_mod_main_~z~0_26) (< aux_mod_main_~z~0_26 0) (< aux_mod_v_main_~z~0_83_31 0) (<= 4294967296 aux_mod_v_main_~z~0_83_31)))} is VALID [2022-04-07 17:45:47,096 INFO L290 TraceCheckUtils]: 10: Hoare triple {7459#(not (< 0 (mod main_~n~0 4294967296)))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {7524#(forall ((aux_mod_v_main_~z~0_83_31 Int) (aux_mod_main_~z~0_26 Int)) (or (= (mod main_~n~0 4294967296) aux_mod_v_main_~z~0_83_31) (and (or (forall ((aux_div_v_main_~z~0_83_31 Int) (aux_div_main_~z~0_26 Int)) (not (= (+ aux_mod_v_main_~z~0_83_31 (* 4294967296 aux_div_v_main_~z~0_83_31)) (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26))))) (< 0 (mod main_~y~0 4294967296))) (or (not (< 0 (mod main_~y~0 4294967296))) (forall ((aux_div_v_main_~z~0_83_31 Int) (aux_div_main_~z~0_26 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ aux_mod_main_~z~0_26 v_it_6 (* 4294967296 aux_div_main_~z~0_26) 1) (+ aux_mod_v_main_~z~0_83_31 (* 4294967296 aux_div_v_main_~z~0_83_31))) (not (< 0 (mod (+ main_~y~0 (* v_it_6 4294967295)) 4294967296))))) (not (< (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26)) (+ aux_mod_v_main_~z~0_83_31 (* 4294967296 aux_div_v_main_~z~0_83_31)))))))) (< 0 aux_mod_main_~z~0_26) (< aux_mod_main_~z~0_26 0) (< aux_mod_v_main_~z~0_83_31 0) (<= 4294967296 aux_mod_v_main_~z~0_83_31)))} is VALID [2022-04-07 17:45:47,096 INFO L290 TraceCheckUtils]: 9: Hoare triple {7459#(not (< 0 (mod main_~n~0 4294967296)))} [112] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_5 4294967296))) (or (and (= v_main_~y~0_4 v_main_~y~0_5) (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= |v_main_#t~post9_3| |v_main_#t~post9_1|) (<= .cse0 0)) (and (= v_main_~y~0_4 (+ v_main_~y~0_5 v_main_~z~0_3 (* (- 1) v_main_~z~0_2))) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= (+ v_main_~z~0_3 v_it_3 1) v_main_~z~0_2)) (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_5 (* v_it_3 4294967295)) 4294967296)))) (< v_main_~z~0_3 v_main_~z~0_2)))) InVars {main_~y~0=v_main_~y~0_5, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {7459#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:45:47,096 INFO L290 TraceCheckUtils]: 8: Hoare triple {7459#(not (< 0 (mod main_~n~0 4294967296)))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {7459#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:45:47,097 INFO L290 TraceCheckUtils]: 7: Hoare triple {7459#(not (< 0 (mod main_~n~0 4294967296)))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {7459#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:45:47,097 INFO L290 TraceCheckUtils]: 6: Hoare triple {7546#(or (< 0 (mod main_~x~0 4294967296)) (not (< 0 (mod main_~n~0 4294967296))))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {7459#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:45:47,097 INFO L290 TraceCheckUtils]: 5: Hoare triple {7422#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {7546#(or (< 0 (mod main_~x~0 4294967296)) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:45:47,097 INFO L272 TraceCheckUtils]: 4: Hoare triple {7422#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7422#true} is VALID [2022-04-07 17:45:47,098 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7422#true} {7422#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7422#true} is VALID [2022-04-07 17:45:47,098 INFO L290 TraceCheckUtils]: 2: Hoare triple {7422#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7422#true} is VALID [2022-04-07 17:45:47,098 INFO L290 TraceCheckUtils]: 1: Hoare triple {7422#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7422#true} is VALID [2022-04-07 17:45:47,098 INFO L272 TraceCheckUtils]: 0: Hoare triple {7422#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7422#true} is VALID [2022-04-07 17:45:47,098 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-07 17:45:47,098 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2063856613] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 17:45:47,098 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 17:45:47,098 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 9, 9] total 23 [2022-04-07 17:45:47,098 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [903436608] [2022-04-07 17:45:47,098 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 17:45:47,099 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 23 states have (on average 1.6521739130434783) internal successors, (38), 20 states have internal predecessors, (38), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 20 [2022-04-07 17:45:47,099 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:45:47,099 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 23 states, 23 states have (on average 1.6521739130434783) internal successors, (38), 20 states have internal predecessors, (38), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:45:55,278 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 45 edges. 41 inductive. 0 not inductive. 4 times theorem prover too weak to decide inductivity. [2022-04-07 17:45:55,279 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 23 states [2022-04-07 17:45:55,279 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:45:55,279 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2022-04-07 17:45:55,279 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=111, Invalid=393, Unknown=2, NotChecked=0, Total=506 [2022-04-07 17:45:55,279 INFO L87 Difference]: Start difference. First operand 55 states and 90 transitions. Second operand has 23 states, 23 states have (on average 1.6521739130434783) internal successors, (38), 20 states have internal predecessors, (38), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:45:56,084 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:45:56,084 INFO L93 Difference]: Finished difference Result 82 states and 131 transitions. [2022-04-07 17:45:56,084 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2022-04-07 17:45:56,084 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 23 states have (on average 1.6521739130434783) internal successors, (38), 20 states have internal predecessors, (38), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 20 [2022-04-07 17:45:56,085 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:45:56,085 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 23 states have (on average 1.6521739130434783) internal successors, (38), 20 states have internal predecessors, (38), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:45:56,085 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 67 transitions. [2022-04-07 17:45:56,086 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 23 states have (on average 1.6521739130434783) internal successors, (38), 20 states have internal predecessors, (38), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:45:56,086 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 67 transitions. [2022-04-07 17:45:56,086 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 19 states and 67 transitions. [2022-04-07 17:45:56,181 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 67 edges. 67 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:45:56,182 INFO L225 Difference]: With dead ends: 82 [2022-04-07 17:45:56,182 INFO L226 Difference]: Without dead ends: 78 [2022-04-07 17:45:56,182 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 29 SyntacticMatches, 2 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 288 ImplicationChecksByTransitivity, 5.2s TimeCoverageRelationStatistics Valid=252, Invalid=868, Unknown=2, NotChecked=0, Total=1122 [2022-04-07 17:45:56,183 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 44 mSDsluCounter, 80 mSDsCounter, 0 mSdLazyCounter, 136 mSolverCounterSat, 25 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 44 SdHoareTripleChecker+Valid, 92 SdHoareTripleChecker+Invalid, 199 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 25 IncrementalHoareTripleChecker+Valid, 136 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 38 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-07 17:45:56,183 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [44 Valid, 92 Invalid, 199 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [25 Valid, 136 Invalid, 0 Unknown, 38 Unchecked, 0.2s Time] [2022-04-07 17:45:56,184 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 78 states. [2022-04-07 17:45:56,185 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 78 to 54. [2022-04-07 17:45:56,185 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:45:56,185 INFO L82 GeneralOperation]: Start isEquivalent. First operand 78 states. Second operand has 54 states, 49 states have (on average 1.7346938775510203) internal successors, (85), 49 states have internal predecessors, (85), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:45:56,185 INFO L74 IsIncluded]: Start isIncluded. First operand 78 states. Second operand has 54 states, 49 states have (on average 1.7346938775510203) internal successors, (85), 49 states have internal predecessors, (85), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:45:56,185 INFO L87 Difference]: Start difference. First operand 78 states. Second operand has 54 states, 49 states have (on average 1.7346938775510203) internal successors, (85), 49 states have internal predecessors, (85), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:45:56,186 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:45:56,186 INFO L93 Difference]: Finished difference Result 78 states and 126 transitions. [2022-04-07 17:45:56,186 INFO L276 IsEmpty]: Start isEmpty. Operand 78 states and 126 transitions. [2022-04-07 17:45:56,187 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:45:56,187 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:45:56,187 INFO L74 IsIncluded]: Start isIncluded. First operand has 54 states, 49 states have (on average 1.7346938775510203) internal successors, (85), 49 states have internal predecessors, (85), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 78 states. [2022-04-07 17:45:56,187 INFO L87 Difference]: Start difference. First operand has 54 states, 49 states have (on average 1.7346938775510203) internal successors, (85), 49 states have internal predecessors, (85), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 78 states. [2022-04-07 17:45:56,188 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:45:56,188 INFO L93 Difference]: Finished difference Result 78 states and 126 transitions. [2022-04-07 17:45:56,188 INFO L276 IsEmpty]: Start isEmpty. Operand 78 states and 126 transitions. [2022-04-07 17:45:56,188 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:45:56,188 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:45:56,188 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:45:56,189 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:45:56,189 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 54 states, 49 states have (on average 1.7346938775510203) internal successors, (85), 49 states have internal predecessors, (85), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:45:56,189 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 89 transitions. [2022-04-07 17:45:56,189 INFO L78 Accepts]: Start accepts. Automaton has 54 states and 89 transitions. Word has length 20 [2022-04-07 17:45:56,190 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:45:56,190 INFO L478 AbstractCegarLoop]: Abstraction has 54 states and 89 transitions. [2022-04-07 17:45:56,190 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 23 states, 23 states have (on average 1.6521739130434783) internal successors, (38), 20 states have internal predecessors, (38), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:45:56,190 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 89 transitions. [2022-04-07 17:45:56,190 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2022-04-07 17:45:56,190 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:45:56,190 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:45:56,217 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Forceful destruction successful, exit code 0 [2022-04-07 17:45:56,403 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 25 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable25 [2022-04-07 17:45:56,403 INFO L403 AbstractCegarLoop]: === Iteration 27 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:45:56,404 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:45:56,404 INFO L85 PathProgramCache]: Analyzing trace with hash 1929500051, now seen corresponding path program 1 times [2022-04-07 17:45:56,404 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:45:56,404 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2081636781] [2022-04-07 17:45:56,404 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:45:56,404 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:45:56,413 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.0))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-07 17:45:56,414 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.1))) (+ .cse0 main_~x~0_5 (* (- 4294967296) (div (+ .cse0 main_~x~0_5) 4294967296)))) 0)) [2022-04-07 17:45:56,414 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_6.2))) (+ main_~y~0_11 .cse0 (* (- 4294967296) (div (+ main_~y~0_11 .cse0) 4294967296)))) 0)) [2022-04-07 17:45:56,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:45:56,427 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.4))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-04-07 17:45:56,430 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.5))) (+ .cse0 main_~x~0_5 (* (- 4294967296) (div (+ .cse0 main_~x~0_5) 4294967296)))) 0)) [2022-04-07 17:45:56,433 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_6.6))) (+ main_~y~0_11 .cse0 (* (- 4294967296) (div (+ main_~y~0_11 .cse0) 4294967296)))) 0)) [2022-04-07 17:45:56,589 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:45:56,590 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:45:56,594 INFO L290 TraceCheckUtils]: 0: Hoare triple {7893#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7881#true} is VALID [2022-04-07 17:45:56,594 INFO L290 TraceCheckUtils]: 1: Hoare triple {7881#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7881#true} is VALID [2022-04-07 17:45:56,594 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {7881#true} {7881#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7881#true} is VALID [2022-04-07 17:45:56,594 INFO L272 TraceCheckUtils]: 0: Hoare triple {7881#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7893#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:45:56,594 INFO L290 TraceCheckUtils]: 1: Hoare triple {7893#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7881#true} is VALID [2022-04-07 17:45:56,594 INFO L290 TraceCheckUtils]: 2: Hoare triple {7881#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7881#true} is VALID [2022-04-07 17:45:56,594 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7881#true} {7881#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7881#true} is VALID [2022-04-07 17:45:56,594 INFO L272 TraceCheckUtils]: 4: Hoare triple {7881#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7881#true} is VALID [2022-04-07 17:45:56,595 INFO L290 TraceCheckUtils]: 5: Hoare triple {7881#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {7886#(and (= main_~n~0 main_~x~0) (= main_~y~0 0))} is VALID [2022-04-07 17:45:56,595 INFO L290 TraceCheckUtils]: 6: Hoare triple {7886#(and (= main_~n~0 main_~x~0) (= main_~y~0 0))} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {7887#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:45:56,596 INFO L290 TraceCheckUtils]: 7: Hoare triple {7887#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {7888#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:45:56,596 INFO L290 TraceCheckUtils]: 8: Hoare triple {7888#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {7888#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:45:56,597 INFO L290 TraceCheckUtils]: 9: Hoare triple {7888#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [112] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_5 4294967296))) (or (and (= v_main_~y~0_4 v_main_~y~0_5) (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= |v_main_#t~post9_3| |v_main_#t~post9_1|) (<= .cse0 0)) (and (= v_main_~y~0_4 (+ v_main_~y~0_5 v_main_~z~0_3 (* (- 1) v_main_~z~0_2))) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= (+ v_main_~z~0_3 v_it_3 1) v_main_~z~0_2)) (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_5 (* v_it_3 4294967295)) 4294967296)))) (< v_main_~z~0_3 v_main_~z~0_2)))) InVars {main_~y~0=v_main_~y~0_5, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {7888#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:45:56,597 INFO L290 TraceCheckUtils]: 10: Hoare triple {7888#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {7888#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 17:45:56,599 INFO L290 TraceCheckUtils]: 11: Hoare triple {7888#(and (= main_~z~0 0) (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [115] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (= v_main_~y~0_10 (+ (* (- 1) v_main_~x~0_6) v_main_~y~0_11 v_main_~x~0_7)) (< v_main_~x~0_6 v_main_~x~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_11 v_main_~y~0_10) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_11, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_10, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {7889#(and (= main_~z~0 0) (not (<= (+ (div main_~y~0 4294967296) 1) 0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~y~0 0))} is VALID [2022-04-07 17:45:56,599 INFO L290 TraceCheckUtils]: 12: Hoare triple {7889#(and (= main_~z~0 0) (not (<= (+ (div main_~y~0 4294967296) 1) 0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~y~0 0))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {7889#(and (= main_~z~0 0) (not (<= (+ (div main_~y~0 4294967296) 1) 0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~y~0 0))} is VALID [2022-04-07 17:45:56,600 INFO L290 TraceCheckUtils]: 13: Hoare triple {7889#(and (= main_~z~0 0) (not (<= (+ (div main_~y~0 4294967296) 1) 0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~y~0 0))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {7889#(and (= main_~z~0 0) (not (<= (+ (div main_~y~0 4294967296) 1) 0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~y~0 0))} is VALID [2022-04-07 17:45:56,601 INFO L290 TraceCheckUtils]: 14: Hoare triple {7889#(and (= main_~z~0 0) (not (<= (+ (div main_~y~0 4294967296) 1) 0)) (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~y~0 0))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {7890#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:45:56,601 INFO L290 TraceCheckUtils]: 15: Hoare triple {7890#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {7890#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 17:45:56,602 INFO L272 TraceCheckUtils]: 16: Hoare triple {7890#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {7891#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:45:56,603 INFO L290 TraceCheckUtils]: 17: Hoare triple {7891#(not (= |__VERIFIER_assert_#in~cond| 0))} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7892#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:45:56,603 INFO L290 TraceCheckUtils]: 18: Hoare triple {7892#(not (= __VERIFIER_assert_~cond 0))} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {7882#false} is VALID [2022-04-07 17:45:56,603 INFO L290 TraceCheckUtils]: 19: Hoare triple {7882#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7882#false} is VALID [2022-04-07 17:45:56,603 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 17:45:56,603 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:45:56,603 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2081636781] [2022-04-07 17:45:56,603 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2081636781] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:45:56,603 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1681768539] [2022-04-07 17:45:56,604 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:45:56,604 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:45:56,604 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:45:56,604 INFO L229 MonitoredProcess]: Starting monitored process 26 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:45:56,605 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (26)] Waiting until timeout for monitored process [2022-04-07 17:45:56,636 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:45:56,637 INFO L263 TraceCheckSpWp]: Trace formula consists of 65 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-07 17:45:56,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:45:56,647 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:45:57,408 INFO L272 TraceCheckUtils]: 0: Hoare triple {7881#true} [97] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7881#true} is VALID [2022-04-07 17:45:57,408 INFO L290 TraceCheckUtils]: 1: Hoare triple {7881#true} [99] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7881#true} is VALID [2022-04-07 17:45:57,408 INFO L290 TraceCheckUtils]: 2: Hoare triple {7881#true} [102] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7881#true} is VALID [2022-04-07 17:45:57,409 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7881#true} {7881#true} [131] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7881#true} is VALID [2022-04-07 17:45:57,409 INFO L272 TraceCheckUtils]: 4: Hoare triple {7881#true} [98] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7881#true} is VALID [2022-04-07 17:45:57,409 INFO L290 TraceCheckUtils]: 5: Hoare triple {7881#true} [101] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {7912#(= main_~n~0 main_~x~0)} is VALID [2022-04-07 17:45:57,409 INFO L290 TraceCheckUtils]: 6: Hoare triple {7912#(= main_~n~0 main_~x~0)} [104] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {7916#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-07 17:45:57,410 INFO L290 TraceCheckUtils]: 7: Hoare triple {7916#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [106] L16-3-->L23-2: Formula: (= v_main_~y~0_12 v_main_~z~0_7) InVars {main_~y~0=v_main_~y~0_12} OutVars{main_~y~0=v_main_~y~0_12, main_~z~0=v_main_~z~0_7} AuxVars[] AssignedVars[main_~z~0] {7916#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-07 17:45:57,410 INFO L290 TraceCheckUtils]: 8: Hoare triple {7916#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [108] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {7916#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-07 17:45:57,411 INFO L290 TraceCheckUtils]: 9: Hoare triple {7916#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [112] L29-1-->L29-1: Formula: (let ((.cse0 (mod v_main_~y~0_5 4294967296))) (or (and (= v_main_~y~0_4 v_main_~y~0_5) (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= |v_main_#t~post9_3| |v_main_#t~post9_1|) (<= .cse0 0)) (and (= v_main_~y~0_4 (+ v_main_~y~0_5 v_main_~z~0_3 (* (- 1) v_main_~z~0_2))) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= (+ v_main_~z~0_3 v_it_3 1) v_main_~z~0_2)) (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_5 (* v_it_3 4294967295)) 4294967296)))) (< v_main_~z~0_3 v_main_~z~0_2)))) InVars {main_~y~0=v_main_~y~0_5, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {7916#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-07 17:45:57,411 INFO L290 TraceCheckUtils]: 10: Hoare triple {7916#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~x~0 4294967296))))} [111] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {7929#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} is VALID [2022-04-07 17:45:57,412 INFO L290 TraceCheckUtils]: 11: Hoare triple {7929#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~x~0 4294967296))))} [115] L35-1-->L35-1: Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (= v_main_~y~0_10 (+ (* (- 1) v_main_~x~0_6) v_main_~y~0_11 v_main_~x~0_7)) (< v_main_~x~0_6 v_main_~x~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_11 v_main_~y~0_10) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_11, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_10, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {7933#(and (<= (mod main_~y~0 4294967296) 0) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-07 17:45:57,412 INFO L290 TraceCheckUtils]: 12: Hoare triple {7933#(and (<= (mod main_~y~0 4294967296) 0) (<= (mod main_~n~0 4294967296) 0))} [114] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {7933#(and (<= (mod main_~y~0 4294967296) 0) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-07 17:45:57,413 INFO L290 TraceCheckUtils]: 13: Hoare triple {7933#(and (<= (mod main_~y~0 4294967296) 0) (<= (mod main_~n~0 4294967296) 0))} [117] L41-1-->L47-1: Formula: (not (< 0 (mod v_main_~z~0_9 4294967296))) InVars {main_~z~0=v_main_~z~0_9} OutVars{main_~z~0=v_main_~z~0_9} AuxVars[] AssignedVars[] {7940#(and (<= (mod main_~y~0 4294967296) 0) (<= (mod main_~n~0 4294967296) 0) (not (< 0 (mod main_~z~0 4294967296))))} is VALID [2022-04-07 17:45:57,414 INFO L290 TraceCheckUtils]: 14: Hoare triple {7940#(and (<= (mod main_~y~0 4294967296) 0) (<= (mod main_~n~0 4294967296) 0) (not (< 0 (mod main_~z~0 4294967296))))} [121] L47-1-->L47-1: Formula: (let ((.cse0 (mod v_main_~y~0_7 4294967296))) (or (and (= |v_main_#t~post15_3| |v_main_#t~post15_1|) (= |v_main_#t~post16_3| |v_main_#t~post16_1|) (= v_main_~y~0_7 v_main_~y~0_6) (= v_main_~z~0_5 v_main_~z~0_4) (<= .cse0 0)) (and (< 0 .cse0) (< v_main_~z~0_5 v_main_~z~0_4) (forall ((v_it_6 Int)) (or (not (<= 1 v_it_6)) (not (<= (+ v_main_~z~0_5 v_it_6 1) v_main_~z~0_4)) (< 0 (mod (+ v_main_~y~0_7 (* v_it_6 4294967295)) 4294967296)))) (= v_main_~y~0_6 (+ (* (- 1) v_main_~z~0_4) v_main_~y~0_7 v_main_~z~0_5))))) InVars {main_#t~post15=|v_main_#t~post15_3|, main_~y~0=v_main_~y~0_7, main_#t~post16=|v_main_#t~post16_3|, main_~z~0=v_main_~z~0_5} OutVars{main_#t~post15=|v_main_#t~post15_1|, main_#t~post16=|v_main_#t~post16_1|, main_~y~0=v_main_~y~0_6, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0, main_#t~post15, main_#t~post16, main_~y~0] {7944#(and (<= (mod main_~n~0 4294967296) 0) (<= (mod main_~z~0 4294967296) 0))} is VALID [2022-04-07 17:45:57,414 INFO L290 TraceCheckUtils]: 15: Hoare triple {7944#(and (<= (mod main_~n~0 4294967296) 0) (<= (mod main_~z~0 4294967296) 0))} [120] L47-1-->L47-2: Formula: (not (< 0 (mod v_main_~y~0_3 4294967296))) InVars {main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_3} AuxVars[] AssignedVars[] {7944#(and (<= (mod main_~n~0 4294967296) 0) (<= (mod main_~z~0 4294967296) 0))} is VALID [2022-04-07 17:45:57,415 INFO L272 TraceCheckUtils]: 16: Hoare triple {7944#(and (<= (mod main_~n~0 4294967296) 0) (<= (mod main_~z~0 4294967296) 0))} [122] L47-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_14 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~z~0=v_main_~z~0_14, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {7951#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:45:57,415 INFO L290 TraceCheckUtils]: 17: Hoare triple {7951#(<= 1 |__VERIFIER_assert_#in~cond|)} [124] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7955#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:45:57,415 INFO L290 TraceCheckUtils]: 18: Hoare triple {7955#(<= 1 __VERIFIER_assert_~cond)} [126] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {7882#false} is VALID [2022-04-07 17:45:57,415 INFO L290 TraceCheckUtils]: 19: Hoare triple {7882#false} [128] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7882#false} is VALID [2022-04-07 17:45:57,416 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 17:45:57,416 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 17:46:33,377 WARN L833 $PredicateComparison]: unable to prove that (forall ((aux_mod_v_main_~z~0_89_31 Int) (aux_mod_main_~z~0_26 Int)) (or (let ((.cse2 (< 0 (mod c_main_~x~0 4294967296))) (.cse1 (forall ((aux_div_v_main_~z~0_89_31 Int) (aux_div_main_~z~0_26 Int)) (not (= (+ aux_mod_v_main_~z~0_89_31 (* 4294967296 aux_div_v_main_~z~0_89_31)) (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26))))))) (and (or (let ((.cse0 (< 0 (mod c_main_~y~0 4294967296)))) (and (or (forall ((aux_div_v_main_~z~0_89_31 Int) (aux_div_main_~z~0_26 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ aux_mod_main_~z~0_26 v_it_6 (* 4294967296 aux_div_main_~z~0_26) 1) (+ aux_mod_v_main_~z~0_89_31 (* 4294967296 aux_div_v_main_~z~0_89_31))) (not (< 0 (mod (+ (* v_it_6 4294967295) c_main_~y~0) 4294967296))))) (not (< (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26)) (+ aux_mod_v_main_~z~0_89_31 (* 4294967296 aux_div_v_main_~z~0_89_31)))))) (not .cse0)) (or .cse0 .cse1))) .cse2) (or (not .cse2) (and (or .cse1 (forall ((aux_div_v_main_~y~0_87_31 Int) (aux_mod_v_main_~y~0_87_31 Int)) (or (<= (+ aux_mod_v_main_~y~0_87_31 (* aux_div_v_main_~y~0_87_31 4294967296)) c_main_~y~0) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) c_main_~x~0) 4294967296))) (<= (+ v_it_4 c_main_~y~0 1) (+ aux_mod_v_main_~y~0_87_31 (* aux_div_v_main_~y~0_87_31 4294967296))) (<= 1 v_it_4))) (< aux_mod_v_main_~y~0_87_31 0) (< 0 aux_mod_v_main_~y~0_87_31)))) (forall ((aux_div_v_main_~y~0_87_31 Int) (aux_mod_v_main_~y~0_87_31 Int) (aux_div_v_main_~z~0_89_31 Int) (aux_div_main_~z~0_26 Int)) (or (<= (+ aux_mod_v_main_~y~0_87_31 (* aux_div_v_main_~y~0_87_31 4294967296)) c_main_~y~0) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) c_main_~x~0) 4294967296))) (<= (+ v_it_4 c_main_~y~0 1) (+ aux_mod_v_main_~y~0_87_31 (* aux_div_v_main_~y~0_87_31 4294967296))) (<= 1 v_it_4))) (<= 4294967296 aux_mod_v_main_~y~0_87_31) (<= aux_mod_v_main_~y~0_87_31 0) (exists ((v_it_6 Int)) (and (not (< 0 (mod (+ aux_mod_v_main_~y~0_87_31 (* v_it_6 4294967295)) 4294967296))) (<= 1 v_it_6) (<= (+ aux_mod_main_~z~0_26 v_it_6 (* 4294967296 aux_div_main_~z~0_26) 1) (+ aux_mod_v_main_~z~0_89_31 (* 4294967296 aux_div_v_main_~z~0_89_31))))) (<= (+ aux_mod_v_main_~z~0_89_31 (* 4294967296 aux_div_v_main_~z~0_89_31)) (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26))))))))) (<= 4294967296 aux_mod_v_main_~z~0_89_31) (< 0 aux_mod_main_~z~0_26) (< aux_mod_main_~z~0_26 0) (= aux_mod_v_main_~z~0_89_31 (mod c_main_~n~0 4294967296)) (< aux_mod_v_main_~z~0_89_31 0))) is different from false [2022-04-07 17:46:35,413 WARN L855 $PredicateComparison]: unable to prove that (forall ((aux_mod_v_main_~z~0_89_31 Int) (aux_mod_main_~z~0_26 Int)) (or (let ((.cse2 (< 0 (mod c_main_~x~0 4294967296))) (.cse1 (forall ((aux_div_v_main_~z~0_89_31 Int) (aux_div_main_~z~0_26 Int)) (not (= (+ aux_mod_v_main_~z~0_89_31 (* 4294967296 aux_div_v_main_~z~0_89_31)) (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26))))))) (and (or (let ((.cse0 (< 0 (mod c_main_~y~0 4294967296)))) (and (or (forall ((aux_div_v_main_~z~0_89_31 Int) (aux_div_main_~z~0_26 Int)) (or (exists ((v_it_6 Int)) (and (<= 1 v_it_6) (<= (+ aux_mod_main_~z~0_26 v_it_6 (* 4294967296 aux_div_main_~z~0_26) 1) (+ aux_mod_v_main_~z~0_89_31 (* 4294967296 aux_div_v_main_~z~0_89_31))) (not (< 0 (mod (+ (* v_it_6 4294967295) c_main_~y~0) 4294967296))))) (not (< (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26)) (+ aux_mod_v_main_~z~0_89_31 (* 4294967296 aux_div_v_main_~z~0_89_31)))))) (not .cse0)) (or .cse0 .cse1))) .cse2) (or (not .cse2) (and (or .cse1 (forall ((aux_div_v_main_~y~0_87_31 Int) (aux_mod_v_main_~y~0_87_31 Int)) (or (<= (+ aux_mod_v_main_~y~0_87_31 (* aux_div_v_main_~y~0_87_31 4294967296)) c_main_~y~0) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) c_main_~x~0) 4294967296))) (<= (+ v_it_4 c_main_~y~0 1) (+ aux_mod_v_main_~y~0_87_31 (* aux_div_v_main_~y~0_87_31 4294967296))) (<= 1 v_it_4))) (< aux_mod_v_main_~y~0_87_31 0) (< 0 aux_mod_v_main_~y~0_87_31)))) (forall ((aux_div_v_main_~y~0_87_31 Int) (aux_mod_v_main_~y~0_87_31 Int) (aux_div_v_main_~z~0_89_31 Int) (aux_div_main_~z~0_26 Int)) (or (<= (+ aux_mod_v_main_~y~0_87_31 (* aux_div_v_main_~y~0_87_31 4294967296)) c_main_~y~0) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) c_main_~x~0) 4294967296))) (<= (+ v_it_4 c_main_~y~0 1) (+ aux_mod_v_main_~y~0_87_31 (* aux_div_v_main_~y~0_87_31 4294967296))) (<= 1 v_it_4))) (<= 4294967296 aux_mod_v_main_~y~0_87_31) (<= aux_mod_v_main_~y~0_87_31 0) (exists ((v_it_6 Int)) (and (not (< 0 (mod (+ aux_mod_v_main_~y~0_87_31 (* v_it_6 4294967295)) 4294967296))) (<= 1 v_it_6) (<= (+ aux_mod_main_~z~0_26 v_it_6 (* 4294967296 aux_div_main_~z~0_26) 1) (+ aux_mod_v_main_~z~0_89_31 (* 4294967296 aux_div_v_main_~z~0_89_31))))) (<= (+ aux_mod_v_main_~z~0_89_31 (* 4294967296 aux_div_v_main_~z~0_89_31)) (+ aux_mod_main_~z~0_26 (* 4294967296 aux_div_main_~z~0_26))))))))) (<= 4294967296 aux_mod_v_main_~z~0_89_31) (< 0 aux_mod_main_~z~0_26) (< aux_mod_main_~z~0_26 0) (= aux_mod_v_main_~z~0_89_31 (mod c_main_~n~0 4294967296)) (< aux_mod_v_main_~z~0_89_31 0))) is different from true