/usr/bin/java -ea -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --core.log.level.for.class de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN -tc ../../../trunk/examples/toolchains/AutomizerCTransformed.xml -s ../../../trunk/examples/settings/automizer/LoopAccelerationJordanC.epf -i ../../../trunk/examples/svcomp/loops/invert_string-3.c -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-34549b5 [2022-04-07 16:41:49,281 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-04-07 16:41:49,282 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-04-07 16:41:49,317 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-04-07 16:41:49,318 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-04-07 16:41:49,319 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-04-07 16:41:49,321 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-04-07 16:41:49,323 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-04-07 16:41:49,324 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-04-07 16:41:49,327 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-04-07 16:41:49,328 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-04-07 16:41:49,329 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-04-07 16:41:49,329 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-04-07 16:41:49,331 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-04-07 16:41:49,332 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-04-07 16:41:49,336 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-04-07 16:41:49,337 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-04-07 16:41:49,337 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-04-07 16:41:49,339 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-04-07 16:41:49,343 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-04-07 16:41:49,343 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-04-07 16:41:49,345 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-04-07 16:41:49,345 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-04-07 16:41:49,346 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-04-07 16:41:49,346 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-04-07 16:41:49,350 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2022-04-07 16:41:49,358 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-04-07 16:41:49,358 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-04-07 16:41:49,361 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-04-07 16:41:49,361 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/automizer/LoopAccelerationJordanC.epf [2022-04-07 16:41:49,369 INFO L113 SettingsManager]: Loading preferences was successful [2022-04-07 16:41:49,370 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-04-07 16:41:49,371 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-04-07 16:41:49,371 INFO L138 SettingsManager]: * sizeof long=4 [2022-04-07 16:41:49,371 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-04-07 16:41:49,371 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-04-07 16:41:49,371 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-04-07 16:41:49,371 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-04-07 16:41:49,371 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-04-07 16:41:49,372 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-04-07 16:41:49,372 INFO L138 SettingsManager]: * sizeof long double=12 [2022-04-07 16:41:49,372 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-04-07 16:41:49,373 INFO L138 SettingsManager]: * Use constant arrays=true [2022-04-07 16:41:49,373 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-04-07 16:41:49,373 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-04-07 16:41:49,373 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-04-07 16:41:49,373 INFO L138 SettingsManager]: * To the following directory=./dump/ [2022-04-07 16:41:49,373 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-04-07 16:41:49,373 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-07 16:41:49,374 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-04-07 16:41:49,374 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-04-07 16:41:49,374 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-04-07 16:41:49,374 INFO L138 SettingsManager]: * TransformationType=LOOP_ACCELERATION_JORDAN WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.core: Log level for class -> de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN; [2022-04-07 16:41:49,557 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-04-07 16:41:49,570 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-04-07 16:41:49,572 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-04-07 16:41:49,572 INFO L271 PluginConnector]: Initializing CDTParser... [2022-04-07 16:41:49,573 INFO L275 PluginConnector]: CDTParser initialized [2022-04-07 16:41:49,574 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loops/invert_string-3.c [2022-04-07 16:41:49,622 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/85b569324/08c4dfdd44f5436f88e37f672f02fb8d/FLAG07e129283 [2022-04-07 16:41:50,033 INFO L306 CDTParser]: Found 1 translation units. [2022-04-07 16:41:50,034 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loops/invert_string-3.c [2022-04-07 16:41:50,038 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/85b569324/08c4dfdd44f5436f88e37f672f02fb8d/FLAG07e129283 [2022-04-07 16:41:50,464 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/85b569324/08c4dfdd44f5436f88e37f672f02fb8d [2022-04-07 16:41:50,466 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-04-07 16:41:50,467 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2022-04-07 16:41:50,477 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-04-07 16:41:50,477 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-04-07 16:41:50,479 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-04-07 16:41:50,480 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.04 04:41:50" (1/1) ... [2022-04-07 16:41:50,481 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4e3a80fc and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 04:41:50, skipping insertion in model container [2022-04-07 16:41:50,481 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.04 04:41:50" (1/1) ... [2022-04-07 16:41:50,495 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-04-07 16:41:50,504 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-04-07 16:41:50,611 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops/invert_string-3.c[327,340] [2022-04-07 16:41:50,628 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-07 16:41:50,634 INFO L203 MainTranslator]: Completed pre-run [2022-04-07 16:41:50,669 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops/invert_string-3.c[327,340] [2022-04-07 16:41:50,675 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-07 16:41:50,685 INFO L208 MainTranslator]: Completed translation [2022-04-07 16:41:50,686 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 04:41:50 WrapperNode [2022-04-07 16:41:50,686 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-04-07 16:41:50,686 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-04-07 16:41:50,687 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-04-07 16:41:50,687 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-04-07 16:41:50,697 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 04:41:50" (1/1) ... [2022-04-07 16:41:50,697 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 04:41:50" (1/1) ... [2022-04-07 16:41:50,707 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 04:41:50" (1/1) ... [2022-04-07 16:41:50,707 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 04:41:50" (1/1) ... [2022-04-07 16:41:50,715 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 04:41:50" (1/1) ... [2022-04-07 16:41:50,718 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 04:41:50" (1/1) ... [2022-04-07 16:41:50,719 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 04:41:50" (1/1) ... [2022-04-07 16:41:50,720 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-04-07 16:41:50,721 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-04-07 16:41:50,721 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-04-07 16:41:50,721 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-04-07 16:41:50,722 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 04:41:50" (1/1) ... [2022-04-07 16:41:50,727 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-07 16:41:50,734 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 16:41:50,745 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-04-07 16:41:50,748 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-04-07 16:41:50,769 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2022-04-07 16:41:50,769 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-04-07 16:41:50,769 INFO L138 BoogieDeclarations]: Found implementation of procedure reach_error [2022-04-07 16:41:50,770 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2022-04-07 16:41:50,770 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2022-04-07 16:41:50,770 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2022-04-07 16:41:50,770 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_fail [2022-04-07 16:41:50,770 INFO L130 BoogieDeclarations]: Found specification of procedure reach_error [2022-04-07 16:41:50,770 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-04-07 16:41:50,770 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2022-04-07 16:41:50,770 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_char [2022-04-07 16:41:50,770 INFO L130 BoogieDeclarations]: Found specification of procedure main [2022-04-07 16:41:50,771 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-04-07 16:41:50,771 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-04-07 16:41:50,771 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-04-07 16:41:50,771 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-04-07 16:41:50,771 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2022-04-07 16:41:50,771 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-04-07 16:41:50,771 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-04-07 16:41:50,817 INFO L234 CfgBuilder]: Building ICFG [2022-04-07 16:41:50,819 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-04-07 16:41:51,049 INFO L275 CfgBuilder]: Performing block encoding [2022-04-07 16:41:51,054 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-04-07 16:41:51,054 INFO L299 CfgBuilder]: Removed 3 assume(true) statements. [2022-04-07 16:41:51,056 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.04 04:41:51 BoogieIcfgContainer [2022-04-07 16:41:51,056 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-04-07 16:41:51,056 INFO L113 PluginConnector]: ------------------------IcfgTransformer---------------------------- [2022-04-07 16:41:51,056 INFO L271 PluginConnector]: Initializing IcfgTransformer... [2022-04-07 16:41:51,057 INFO L275 PluginConnector]: IcfgTransformer initialized [2022-04-07 16:41:51,060 INFO L185 PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.04 04:41:51" (1/1) ... [2022-04-07 16:41:51,061 INFO L168 ansformationObserver]: Applying ICFG transformation LOOP_ACCELERATION_JORDAN [2022-04-07 16:41:51,098 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 07.04 04:41:51 BasicIcfg [2022-04-07 16:41:51,098 INFO L132 PluginConnector]: ------------------------ END IcfgTransformer---------------------------- [2022-04-07 16:41:51,100 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-04-07 16:41:51,100 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-04-07 16:41:51,102 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-04-07 16:41:51,102 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.04 04:41:50" (1/4) ... [2022-04-07 16:41:51,103 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6c89eb69 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.04 04:41:51, skipping insertion in model container [2022-04-07 16:41:51,103 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 04:41:50" (2/4) ... [2022-04-07 16:41:51,103 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6c89eb69 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.04 04:41:51, skipping insertion in model container [2022-04-07 16:41:51,103 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.04 04:41:51" (3/4) ... [2022-04-07 16:41:51,103 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6c89eb69 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.04 04:41:51, skipping insertion in model container [2022-04-07 16:41:51,104 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 07.04 04:41:51" (4/4) ... [2022-04-07 16:41:51,104 INFO L111 eAbstractionObserver]: Analyzing ICFG invert_string-3.cJordan [2022-04-07 16:41:51,108 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:ForwardPredicates Determinization: PREDICATE_ABSTRACTION [2022-04-07 16:41:51,108 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-04-07 16:41:51,140 INFO L339 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-04-07 16:41:51,148 INFO L340 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=ForwardPredicates, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=false, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=All, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP [2022-04-07 16:41:51,149 INFO L341 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-04-07 16:41:51,166 INFO L276 IsEmpty]: Start isEmpty. Operand has 27 states, 19 states have (on average 1.4210526315789473) internal successors, (27), 20 states have internal predecessors, (27), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 16:41:51,172 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2022-04-07 16:41:51,172 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 16:41:51,172 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 16:41:51,173 INFO L403 AbstractCegarLoop]: === Iteration 1 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 16:41:51,181 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 16:41:51,181 INFO L85 PathProgramCache]: Analyzing trace with hash 677474136, now seen corresponding path program 1 times [2022-04-07 16:41:51,188 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 16:41:51,189 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1102866923] [2022-04-07 16:41:51,190 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 16:41:51,191 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 16:41:51,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 16:41:51,361 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 16:41:51,372 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 16:41:51,396 INFO L290 TraceCheckUtils]: 0: Hoare triple {35#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {30#true} is VALID [2022-04-07 16:41:51,396 INFO L290 TraceCheckUtils]: 1: Hoare triple {30#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30#true} is VALID [2022-04-07 16:41:51,397 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {30#true} {30#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30#true} is VALID [2022-04-07 16:41:51,402 INFO L272 TraceCheckUtils]: 0: Hoare triple {30#true} [70] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {35#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 16:41:51,404 INFO L290 TraceCheckUtils]: 1: Hoare triple {35#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {30#true} is VALID [2022-04-07 16:41:51,404 INFO L290 TraceCheckUtils]: 2: Hoare triple {30#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30#true} is VALID [2022-04-07 16:41:51,405 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {30#true} {30#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30#true} is VALID [2022-04-07 16:41:51,405 INFO L272 TraceCheckUtils]: 4: Hoare triple {30#true} [71] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30#true} is VALID [2022-04-07 16:41:51,406 INFO L290 TraceCheckUtils]: 5: Hoare triple {30#true} [74] mainENTRY-->L18-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (= 5 v_main_~max~0_1) (= v_main_~i~0_1 0) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= (let ((.cse1 (let ((.cse2 (mod v_main_~max~0_1 4294967296))) (ite (<= .cse2 2147483647) .cse2 (+ .cse2 (- 4294967296)))))) (store (store |v_#length_3| |v_main_~#str1~0.base_1| .cse1) |v_main_~#str2~0.base_1| .cse1)) |v_#length_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, main_~max~0=v_main_~max~0_1, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_1, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~#str1~0.base=|v_main_~#str1~0.base_1|, #length=|v_#length_1|} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~max~0, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, #length] {30#true} is VALID [2022-04-07 16:41:51,407 INFO L290 TraceCheckUtils]: 6: Hoare triple {30#true} [76] L18-3-->L18-4: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {31#false} is VALID [2022-04-07 16:41:51,408 INFO L290 TraceCheckUtils]: 7: Hoare triple {31#false} [79] L18-4-->L26-3: Formula: (let ((.cse0 (let ((.cse1 (mod (+ 4294967295 v_main_~max~0_6) 4294967296))) (ite (<= .cse1 2147483647) .cse1 (+ .cse1 (- 4294967296)))))) (and (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ .cse0 |v_main_~#str1~0.offset_6|) 0)) |v_#memory_int_4|) (= v_main_~j~0_5 0) (= .cse0 v_main_~i~0_11))) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|} OutVars{main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_5, main_~i~0=v_main_~i~0_11, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {31#false} is VALID [2022-04-07 16:41:51,409 INFO L290 TraceCheckUtils]: 8: Hoare triple {31#false} [81] L26-3-->L26-4: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {31#false} is VALID [2022-04-07 16:41:51,409 INFO L290 TraceCheckUtils]: 9: Hoare triple {31#false} [84] L26-4-->L32-3: Formula: (and (= v_main_~j~0_8 (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_7) 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))))) (= v_main_~i~0_16 0)) InVars {main_~max~0=v_main_~max~0_7} OutVars{main_~i~0=v_main_~i~0_16, main_~max~0=v_main_~max~0_7, main_~j~0=v_main_~j~0_8} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {31#false} is VALID [2022-04-07 16:41:51,410 INFO L290 TraceCheckUtils]: 10: Hoare triple {31#false} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {31#false} is VALID [2022-04-07 16:41:51,411 INFO L272 TraceCheckUtils]: 11: Hoare triple {31#false} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {31#false} is VALID [2022-04-07 16:41:51,412 INFO L290 TraceCheckUtils]: 12: Hoare triple {31#false} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {31#false} is VALID [2022-04-07 16:41:51,413 INFO L290 TraceCheckUtils]: 13: Hoare triple {31#false} [95] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {31#false} is VALID [2022-04-07 16:41:51,413 INFO L290 TraceCheckUtils]: 14: Hoare triple {31#false} [97] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31#false} is VALID [2022-04-07 16:41:51,413 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 16:41:51,414 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 16:41:51,415 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1102866923] [2022-04-07 16:41:51,415 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1102866923] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 16:41:51,416 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 16:41:51,416 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-07 16:41:51,417 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [444730627] [2022-04-07 16:41:51,417 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 16:41:51,423 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-07 16:41:51,424 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 16:41:51,427 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:41:51,450 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 15 edges. 15 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 16:41:51,451 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-07 16:41:51,451 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 16:41:51,471 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-07 16:41:51,472 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-07 16:41:51,475 INFO L87 Difference]: Start difference. First operand has 27 states, 19 states have (on average 1.4210526315789473) internal successors, (27), 20 states have internal predecessors, (27), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:41:51,550 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 16:41:51,551 INFO L93 Difference]: Finished difference Result 27 states and 29 transitions. [2022-04-07 16:41:51,551 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-07 16:41:51,551 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-07 16:41:51,552 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 16:41:51,553 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:41:51,563 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 33 transitions. [2022-04-07 16:41:51,564 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:41:51,570 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 33 transitions. [2022-04-07 16:41:51,570 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 33 transitions. [2022-04-07 16:41:51,633 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 33 edges. 33 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 16:41:51,643 INFO L225 Difference]: With dead ends: 27 [2022-04-07 16:41:51,644 INFO L226 Difference]: Without dead ends: 22 [2022-04-07 16:41:51,647 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-07 16:41:51,652 INFO L913 BasicCegarLoop]: 28 mSDtfsCounter, 20 mSDsluCounter, 3 mSDsCounter, 0 mSdLazyCounter, 3 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 21 SdHoareTripleChecker+Valid, 31 SdHoareTripleChecker+Invalid, 5 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 3 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 16:41:51,654 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [21 Valid, 31 Invalid, 5 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 3 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 16:41:51,693 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2022-04-07 16:41:51,703 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 22. [2022-04-07 16:41:51,703 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 16:41:51,704 INFO L82 GeneralOperation]: Start isEquivalent. First operand 22 states. Second operand has 22 states, 16 states have (on average 1.1875) internal successors, (19), 16 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 16:41:51,705 INFO L74 IsIncluded]: Start isIncluded. First operand 22 states. Second operand has 22 states, 16 states have (on average 1.1875) internal successors, (19), 16 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 16:41:51,705 INFO L87 Difference]: Start difference. First operand 22 states. Second operand has 22 states, 16 states have (on average 1.1875) internal successors, (19), 16 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 16:41:51,710 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 16:41:51,711 INFO L93 Difference]: Finished difference Result 22 states and 24 transitions. [2022-04-07 16:41:51,711 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 24 transitions. [2022-04-07 16:41:51,711 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 16:41:51,712 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 16:41:51,713 INFO L74 IsIncluded]: Start isIncluded. First operand has 22 states, 16 states have (on average 1.1875) internal successors, (19), 16 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 22 states. [2022-04-07 16:41:51,713 INFO L87 Difference]: Start difference. First operand has 22 states, 16 states have (on average 1.1875) internal successors, (19), 16 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 22 states. [2022-04-07 16:41:51,715 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 16:41:51,715 INFO L93 Difference]: Finished difference Result 22 states and 24 transitions. [2022-04-07 16:41:51,716 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 24 transitions. [2022-04-07 16:41:51,716 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 16:41:51,716 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 16:41:51,716 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 16:41:51,716 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 16:41:51,717 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 16 states have (on average 1.1875) internal successors, (19), 16 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 16:41:51,723 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 24 transitions. [2022-04-07 16:41:51,724 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 24 transitions. Word has length 15 [2022-04-07 16:41:51,725 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 16:41:51,725 INFO L478 AbstractCegarLoop]: Abstraction has 22 states and 24 transitions. [2022-04-07 16:41:51,726 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:41:51,727 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 24 transitions. [2022-04-07 16:41:51,728 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2022-04-07 16:41:51,729 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 16:41:51,732 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 16:41:51,733 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-04-07 16:41:51,733 INFO L403 AbstractCegarLoop]: === Iteration 2 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 16:41:51,735 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 16:41:51,735 INFO L85 PathProgramCache]: Analyzing trace with hash -242476646, now seen corresponding path program 1 times [2022-04-07 16:41:51,735 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 16:41:51,735 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [703412298] [2022-04-07 16:41:51,736 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 16:41:51,736 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 16:41:51,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 16:41:51,968 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 16:41:51,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 16:41:51,986 INFO L290 TraceCheckUtils]: 0: Hoare triple {138#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {131#true} is VALID [2022-04-07 16:41:51,987 INFO L290 TraceCheckUtils]: 1: Hoare triple {131#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {131#true} is VALID [2022-04-07 16:41:51,987 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {131#true} {131#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {131#true} is VALID [2022-04-07 16:41:51,988 INFO L272 TraceCheckUtils]: 0: Hoare triple {131#true} [70] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {138#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 16:41:51,988 INFO L290 TraceCheckUtils]: 1: Hoare triple {138#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {131#true} is VALID [2022-04-07 16:41:51,988 INFO L290 TraceCheckUtils]: 2: Hoare triple {131#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {131#true} is VALID [2022-04-07 16:41:51,988 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {131#true} {131#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {131#true} is VALID [2022-04-07 16:41:51,988 INFO L272 TraceCheckUtils]: 4: Hoare triple {131#true} [71] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {131#true} is VALID [2022-04-07 16:41:51,990 INFO L290 TraceCheckUtils]: 5: Hoare triple {131#true} [74] mainENTRY-->L18-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (= 5 v_main_~max~0_1) (= v_main_~i~0_1 0) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= (let ((.cse1 (let ((.cse2 (mod v_main_~max~0_1 4294967296))) (ite (<= .cse2 2147483647) .cse2 (+ .cse2 (- 4294967296)))))) (store (store |v_#length_3| |v_main_~#str1~0.base_1| .cse1) |v_main_~#str2~0.base_1| .cse1)) |v_#length_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, main_~max~0=v_main_~max~0_1, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_1, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~#str1~0.base=|v_main_~#str1~0.base_1|, #length=|v_#length_1|} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~max~0, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, #length] {136#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} is VALID [2022-04-07 16:41:51,990 INFO L290 TraceCheckUtils]: 6: Hoare triple {136#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} [77] L18-3-->L18-4: Formula: (not (< (mod v_main_~i~0_5 4294967296) (mod v_main_~max~0_4 4294967296))) InVars {main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} OutVars{main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} AuxVars[] AssignedVars[] {136#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} is VALID [2022-04-07 16:41:51,992 INFO L290 TraceCheckUtils]: 7: Hoare triple {136#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} [79] L18-4-->L26-3: Formula: (let ((.cse0 (let ((.cse1 (mod (+ 4294967295 v_main_~max~0_6) 4294967296))) (ite (<= .cse1 2147483647) .cse1 (+ .cse1 (- 4294967296)))))) (and (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ .cse0 |v_main_~#str1~0.offset_6|) 0)) |v_#memory_int_4|) (= v_main_~j~0_5 0) (= .cse0 v_main_~i~0_11))) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|} OutVars{main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_5, main_~i~0=v_main_~i~0_11, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {137#(and (< 0 (div (+ main_~max~0 4294967295) 4294967296)) (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ main_~max~0 4294967295) (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))))} is VALID [2022-04-07 16:41:51,993 INFO L290 TraceCheckUtils]: 8: Hoare triple {137#(and (< 0 (div (+ main_~max~0 4294967295) 4294967296)) (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ main_~max~0 4294967295) (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))))} [82] L26-3-->L26-4: Formula: (not (<= 0 v_main_~i~0_12)) InVars {main_~i~0=v_main_~i~0_12} OutVars{main_~i~0=v_main_~i~0_12} AuxVars[] AssignedVars[] {132#false} is VALID [2022-04-07 16:41:51,993 INFO L290 TraceCheckUtils]: 9: Hoare triple {132#false} [84] L26-4-->L32-3: Formula: (and (= v_main_~j~0_8 (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_7) 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))))) (= v_main_~i~0_16 0)) InVars {main_~max~0=v_main_~max~0_7} OutVars{main_~i~0=v_main_~i~0_16, main_~max~0=v_main_~max~0_7, main_~j~0=v_main_~j~0_8} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {132#false} is VALID [2022-04-07 16:41:51,993 INFO L290 TraceCheckUtils]: 10: Hoare triple {132#false} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {132#false} is VALID [2022-04-07 16:41:51,994 INFO L272 TraceCheckUtils]: 11: Hoare triple {132#false} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {132#false} is VALID [2022-04-07 16:41:51,994 INFO L290 TraceCheckUtils]: 12: Hoare triple {132#false} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {132#false} is VALID [2022-04-07 16:41:51,994 INFO L290 TraceCheckUtils]: 13: Hoare triple {132#false} [95] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {132#false} is VALID [2022-04-07 16:41:51,995 INFO L290 TraceCheckUtils]: 14: Hoare triple {132#false} [97] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {132#false} is VALID [2022-04-07 16:41:51,995 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 16:41:51,995 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 16:41:51,996 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [703412298] [2022-04-07 16:41:51,996 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [703412298] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 16:41:51,996 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 16:41:51,996 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-04-07 16:41:51,996 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [431914621] [2022-04-07 16:41:51,996 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 16:41:51,998 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 2.2) internal successors, (11), 4 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-07 16:41:51,999 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 16:41:51,999 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 2.2) internal successors, (11), 4 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:41:52,015 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 15 edges. 15 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 16:41:52,015 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-04-07 16:41:52,015 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 16:41:52,016 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-04-07 16:41:52,017 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-04-07 16:41:52,017 INFO L87 Difference]: Start difference. First operand 22 states and 24 transitions. Second operand has 5 states, 5 states have (on average 2.2) internal successors, (11), 4 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:41:52,187 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 16:41:52,188 INFO L93 Difference]: Finished difference Result 24 states and 26 transitions. [2022-04-07 16:41:52,188 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-04-07 16:41:52,188 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 2.2) internal successors, (11), 4 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-07 16:41:52,188 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 16:41:52,189 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 2.2) internal successors, (11), 4 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:41:52,191 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 27 transitions. [2022-04-07 16:41:52,191 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 2.2) internal successors, (11), 4 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:41:52,192 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 27 transitions. [2022-04-07 16:41:52,192 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 5 states and 27 transitions. [2022-04-07 16:41:52,218 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 27 edges. 27 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 16:41:52,220 INFO L225 Difference]: With dead ends: 24 [2022-04-07 16:41:52,220 INFO L226 Difference]: Without dead ends: 24 [2022-04-07 16:41:52,223 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2022-04-07 16:41:52,224 INFO L913 BasicCegarLoop]: 16 mSDtfsCounter, 30 mSDsluCounter, 12 mSDsCounter, 0 mSdLazyCounter, 33 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 30 SdHoareTripleChecker+Valid, 28 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 33 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 16:41:52,225 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [30 Valid, 28 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 33 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 16:41:52,227 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24 states. [2022-04-07 16:41:52,231 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24 to 23. [2022-04-07 16:41:52,231 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 16:41:52,231 INFO L82 GeneralOperation]: Start isEquivalent. First operand 24 states. Second operand has 23 states, 17 states have (on average 1.1764705882352942) internal successors, (20), 17 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 16:41:52,232 INFO L74 IsIncluded]: Start isIncluded. First operand 24 states. Second operand has 23 states, 17 states have (on average 1.1764705882352942) internal successors, (20), 17 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 16:41:52,232 INFO L87 Difference]: Start difference. First operand 24 states. Second operand has 23 states, 17 states have (on average 1.1764705882352942) internal successors, (20), 17 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 16:41:52,234 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 16:41:52,234 INFO L93 Difference]: Finished difference Result 24 states and 26 transitions. [2022-04-07 16:41:52,234 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 26 transitions. [2022-04-07 16:41:52,234 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 16:41:52,234 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 16:41:52,235 INFO L74 IsIncluded]: Start isIncluded. First operand has 23 states, 17 states have (on average 1.1764705882352942) internal successors, (20), 17 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 24 states. [2022-04-07 16:41:52,237 INFO L87 Difference]: Start difference. First operand has 23 states, 17 states have (on average 1.1764705882352942) internal successors, (20), 17 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 24 states. [2022-04-07 16:41:52,240 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 16:41:52,240 INFO L93 Difference]: Finished difference Result 24 states and 26 transitions. [2022-04-07 16:41:52,240 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 26 transitions. [2022-04-07 16:41:52,240 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 16:41:52,240 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 16:41:52,240 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 16:41:52,240 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 16:41:52,241 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 17 states have (on average 1.1764705882352942) internal successors, (20), 17 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 16:41:52,241 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 25 transitions. [2022-04-07 16:41:52,242 INFO L78 Accepts]: Start accepts. Automaton has 23 states and 25 transitions. Word has length 15 [2022-04-07 16:41:52,242 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 16:41:52,242 INFO L478 AbstractCegarLoop]: Abstraction has 23 states and 25 transitions. [2022-04-07 16:41:52,242 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 2.2) internal successors, (11), 4 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:41:52,242 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 25 transitions. [2022-04-07 16:41:52,242 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-04-07 16:41:52,242 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 16:41:52,242 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 16:41:52,243 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-04-07 16:41:52,243 INFO L403 AbstractCegarLoop]: === Iteration 3 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 16:41:52,243 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 16:41:52,243 INFO L85 PathProgramCache]: Analyzing trace with hash 1931903288, now seen corresponding path program 1 times [2022-04-07 16:41:52,243 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 16:41:52,243 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1352005446] [2022-04-07 16:41:52,244 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 16:41:52,244 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 16:41:52,294 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 16:41:52,354 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 16:41:52,356 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 16:41:52,359 INFO L290 TraceCheckUtils]: 0: Hoare triple {246#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {240#true} is VALID [2022-04-07 16:41:52,360 INFO L290 TraceCheckUtils]: 1: Hoare triple {240#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {240#true} is VALID [2022-04-07 16:41:52,360 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {240#true} {240#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {240#true} is VALID [2022-04-07 16:41:52,360 INFO L272 TraceCheckUtils]: 0: Hoare triple {240#true} [70] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {246#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 16:41:52,361 INFO L290 TraceCheckUtils]: 1: Hoare triple {246#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {240#true} is VALID [2022-04-07 16:41:52,361 INFO L290 TraceCheckUtils]: 2: Hoare triple {240#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {240#true} is VALID [2022-04-07 16:41:52,361 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {240#true} {240#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {240#true} is VALID [2022-04-07 16:41:52,361 INFO L272 TraceCheckUtils]: 4: Hoare triple {240#true} [71] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {240#true} is VALID [2022-04-07 16:41:52,362 INFO L290 TraceCheckUtils]: 5: Hoare triple {240#true} [74] mainENTRY-->L18-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (= 5 v_main_~max~0_1) (= v_main_~i~0_1 0) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= (let ((.cse1 (let ((.cse2 (mod v_main_~max~0_1 4294967296))) (ite (<= .cse2 2147483647) .cse2 (+ .cse2 (- 4294967296)))))) (store (store |v_#length_3| |v_main_~#str1~0.base_1| .cse1) |v_main_~#str2~0.base_1| .cse1)) |v_#length_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, main_~max~0=v_main_~max~0_1, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_1, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~#str1~0.base=|v_main_~#str1~0.base_1|, #length=|v_#length_1|} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~max~0, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, #length] {245#(and (<= 5 main_~max~0) (<= (div main_~max~0 4294967296) (div main_~i~0 4294967296)) (= main_~i~0 0))} is VALID [2022-04-07 16:41:52,363 INFO L290 TraceCheckUtils]: 6: Hoare triple {245#(and (<= 5 main_~max~0) (<= (div main_~max~0 4294967296) (div main_~i~0 4294967296)) (= main_~i~0 0))} [77] L18-3-->L18-4: Formula: (not (< (mod v_main_~i~0_5 4294967296) (mod v_main_~max~0_4 4294967296))) InVars {main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} OutVars{main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} AuxVars[] AssignedVars[] {241#false} is VALID [2022-04-07 16:41:52,363 INFO L290 TraceCheckUtils]: 7: Hoare triple {241#false} [79] L18-4-->L26-3: Formula: (let ((.cse0 (let ((.cse1 (mod (+ 4294967295 v_main_~max~0_6) 4294967296))) (ite (<= .cse1 2147483647) .cse1 (+ .cse1 (- 4294967296)))))) (and (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ .cse0 |v_main_~#str1~0.offset_6|) 0)) |v_#memory_int_4|) (= v_main_~j~0_5 0) (= .cse0 v_main_~i~0_11))) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|} OutVars{main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_5, main_~i~0=v_main_~i~0_11, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {241#false} is VALID [2022-04-07 16:41:52,363 INFO L290 TraceCheckUtils]: 8: Hoare triple {241#false} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {241#false} is VALID [2022-04-07 16:41:52,363 INFO L290 TraceCheckUtils]: 9: Hoare triple {241#false} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {241#false} is VALID [2022-04-07 16:41:52,363 INFO L290 TraceCheckUtils]: 10: Hoare triple {241#false} [82] L26-3-->L26-4: Formula: (not (<= 0 v_main_~i~0_12)) InVars {main_~i~0=v_main_~i~0_12} OutVars{main_~i~0=v_main_~i~0_12} AuxVars[] AssignedVars[] {241#false} is VALID [2022-04-07 16:41:52,379 INFO L290 TraceCheckUtils]: 11: Hoare triple {241#false} [84] L26-4-->L32-3: Formula: (and (= v_main_~j~0_8 (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_7) 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))))) (= v_main_~i~0_16 0)) InVars {main_~max~0=v_main_~max~0_7} OutVars{main_~i~0=v_main_~i~0_16, main_~max~0=v_main_~max~0_7, main_~j~0=v_main_~j~0_8} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {241#false} is VALID [2022-04-07 16:41:52,379 INFO L290 TraceCheckUtils]: 12: Hoare triple {241#false} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {241#false} is VALID [2022-04-07 16:41:52,380 INFO L272 TraceCheckUtils]: 13: Hoare triple {241#false} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {241#false} is VALID [2022-04-07 16:41:52,380 INFO L290 TraceCheckUtils]: 14: Hoare triple {241#false} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {241#false} is VALID [2022-04-07 16:41:52,380 INFO L290 TraceCheckUtils]: 15: Hoare triple {241#false} [95] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {241#false} is VALID [2022-04-07 16:41:52,380 INFO L290 TraceCheckUtils]: 16: Hoare triple {241#false} [97] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {241#false} is VALID [2022-04-07 16:41:52,380 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 16:41:52,381 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 16:41:52,381 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1352005446] [2022-04-07 16:41:52,381 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1352005446] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 16:41:52,381 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 16:41:52,381 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-07 16:41:52,381 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1101183964] [2022-04-07 16:41:52,381 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 16:41:52,382 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-07 16:41:52,382 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 16:41:52,382 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:41:52,394 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 17 edges. 17 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 16:41:52,394 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-07 16:41:52,394 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 16:41:52,395 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-07 16:41:52,395 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-07 16:41:52,395 INFO L87 Difference]: Start difference. First operand 23 states and 25 transitions. Second operand has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:41:52,471 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 16:41:52,471 INFO L93 Difference]: Finished difference Result 25 states and 27 transitions. [2022-04-07 16:41:52,471 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-07 16:41:52,471 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-07 16:41:52,471 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 16:41:52,471 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:41:52,472 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 27 transitions. [2022-04-07 16:41:52,473 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:41:52,473 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 27 transitions. [2022-04-07 16:41:52,473 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 27 transitions. [2022-04-07 16:41:52,505 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 27 edges. 27 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 16:41:52,506 INFO L225 Difference]: With dead ends: 25 [2022-04-07 16:41:52,506 INFO L226 Difference]: Without dead ends: 25 [2022-04-07 16:41:52,506 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-07 16:41:52,507 INFO L913 BasicCegarLoop]: 21 mSDtfsCounter, 19 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 22 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 20 SdHoareTripleChecker+Valid, 28 SdHoareTripleChecker+Invalid, 25 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 22 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 16:41:52,507 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [20 Valid, 28 Invalid, 25 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 22 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 16:41:52,508 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2022-04-07 16:41:52,509 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 24. [2022-04-07 16:41:52,509 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 16:41:52,509 INFO L82 GeneralOperation]: Start isEquivalent. First operand 25 states. Second operand has 24 states, 18 states have (on average 1.1666666666666667) internal successors, (21), 18 states have internal predecessors, (21), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 16:41:52,509 INFO L74 IsIncluded]: Start isIncluded. First operand 25 states. Second operand has 24 states, 18 states have (on average 1.1666666666666667) internal successors, (21), 18 states have internal predecessors, (21), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 16:41:52,510 INFO L87 Difference]: Start difference. First operand 25 states. Second operand has 24 states, 18 states have (on average 1.1666666666666667) internal successors, (21), 18 states have internal predecessors, (21), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 16:41:52,510 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 16:41:52,511 INFO L93 Difference]: Finished difference Result 25 states and 27 transitions. [2022-04-07 16:41:52,511 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 27 transitions. [2022-04-07 16:41:52,511 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 16:41:52,511 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 16:41:52,511 INFO L74 IsIncluded]: Start isIncluded. First operand has 24 states, 18 states have (on average 1.1666666666666667) internal successors, (21), 18 states have internal predecessors, (21), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 25 states. [2022-04-07 16:41:52,511 INFO L87 Difference]: Start difference. First operand has 24 states, 18 states have (on average 1.1666666666666667) internal successors, (21), 18 states have internal predecessors, (21), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 25 states. [2022-04-07 16:41:52,512 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 16:41:52,513 INFO L93 Difference]: Finished difference Result 25 states and 27 transitions. [2022-04-07 16:41:52,513 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 27 transitions. [2022-04-07 16:41:52,513 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 16:41:52,513 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 16:41:52,513 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 16:41:52,513 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 16:41:52,513 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 18 states have (on average 1.1666666666666667) internal successors, (21), 18 states have internal predecessors, (21), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 16:41:52,514 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 26 transitions. [2022-04-07 16:41:52,514 INFO L78 Accepts]: Start accepts. Automaton has 24 states and 26 transitions. Word has length 17 [2022-04-07 16:41:52,514 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 16:41:52,514 INFO L478 AbstractCegarLoop]: Abstraction has 24 states and 26 transitions. [2022-04-07 16:41:52,515 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:41:52,515 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 26 transitions. [2022-04-07 16:41:52,515 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-07 16:41:52,515 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 16:41:52,515 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 16:41:52,515 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2022-04-07 16:41:52,515 INFO L403 AbstractCegarLoop]: === Iteration 4 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 16:41:52,516 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 16:41:52,516 INFO L85 PathProgramCache]: Analyzing trace with hash -1226486282, now seen corresponding path program 1 times [2022-04-07 16:41:52,516 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 16:41:52,516 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [857242775] [2022-04-07 16:41:52,516 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 16:41:52,516 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 16:41:52,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 16:41:52,620 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 16:41:52,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 16:41:52,625 INFO L290 TraceCheckUtils]: 0: Hoare triple {358#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {350#true} is VALID [2022-04-07 16:41:52,633 INFO L290 TraceCheckUtils]: 1: Hoare triple {350#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {350#true} is VALID [2022-04-07 16:41:52,633 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {350#true} {350#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {350#true} is VALID [2022-04-07 16:41:52,635 INFO L272 TraceCheckUtils]: 0: Hoare triple {350#true} [70] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {358#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 16:41:52,635 INFO L290 TraceCheckUtils]: 1: Hoare triple {358#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {350#true} is VALID [2022-04-07 16:41:52,635 INFO L290 TraceCheckUtils]: 2: Hoare triple {350#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {350#true} is VALID [2022-04-07 16:41:52,636 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {350#true} {350#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {350#true} is VALID [2022-04-07 16:41:52,636 INFO L272 TraceCheckUtils]: 4: Hoare triple {350#true} [71] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {350#true} is VALID [2022-04-07 16:41:52,638 INFO L290 TraceCheckUtils]: 5: Hoare triple {350#true} [74] mainENTRY-->L18-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (= 5 v_main_~max~0_1) (= v_main_~i~0_1 0) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= (let ((.cse1 (let ((.cse2 (mod v_main_~max~0_1 4294967296))) (ite (<= .cse2 2147483647) .cse2 (+ .cse2 (- 4294967296)))))) (store (store |v_#length_3| |v_main_~#str1~0.base_1| .cse1) |v_main_~#str2~0.base_1| .cse1)) |v_#length_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, main_~max~0=v_main_~max~0_1, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_1, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~#str1~0.base=|v_main_~#str1~0.base_1|, #length=|v_#length_1|} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~max~0, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, #length] {355#(and (<= 5 main_~max~0) (<= main_~max~0 5) (= main_~i~0 0))} is VALID [2022-04-07 16:41:52,640 INFO L290 TraceCheckUtils]: 6: Hoare triple {355#(and (<= 5 main_~max~0) (<= main_~max~0 5) (= main_~i~0 0))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {356#(and (<= 5 main_~max~0) (<= (div main_~max~0 4294967296) 0) (= main_~i~0 0))} is VALID [2022-04-07 16:41:52,640 INFO L290 TraceCheckUtils]: 7: Hoare triple {356#(and (<= 5 main_~max~0) (<= (div main_~max~0 4294967296) 0) (= main_~i~0 0))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {357#(and (<= (+ main_~i~0 4) main_~max~0) (<= (div main_~max~0 4294967296) (div main_~i~0 4294967296)))} is VALID [2022-04-07 16:41:52,641 INFO L290 TraceCheckUtils]: 8: Hoare triple {357#(and (<= (+ main_~i~0 4) main_~max~0) (<= (div main_~max~0 4294967296) (div main_~i~0 4294967296)))} [77] L18-3-->L18-4: Formula: (not (< (mod v_main_~i~0_5 4294967296) (mod v_main_~max~0_4 4294967296))) InVars {main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} OutVars{main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} AuxVars[] AssignedVars[] {351#false} is VALID [2022-04-07 16:41:52,641 INFO L290 TraceCheckUtils]: 9: Hoare triple {351#false} [79] L18-4-->L26-3: Formula: (let ((.cse0 (let ((.cse1 (mod (+ 4294967295 v_main_~max~0_6) 4294967296))) (ite (<= .cse1 2147483647) .cse1 (+ .cse1 (- 4294967296)))))) (and (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ .cse0 |v_main_~#str1~0.offset_6|) 0)) |v_#memory_int_4|) (= v_main_~j~0_5 0) (= .cse0 v_main_~i~0_11))) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|} OutVars{main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_5, main_~i~0=v_main_~i~0_11, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {351#false} is VALID [2022-04-07 16:41:52,641 INFO L290 TraceCheckUtils]: 10: Hoare triple {351#false} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {351#false} is VALID [2022-04-07 16:41:52,642 INFO L290 TraceCheckUtils]: 11: Hoare triple {351#false} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {351#false} is VALID [2022-04-07 16:41:52,642 INFO L290 TraceCheckUtils]: 12: Hoare triple {351#false} [82] L26-3-->L26-4: Formula: (not (<= 0 v_main_~i~0_12)) InVars {main_~i~0=v_main_~i~0_12} OutVars{main_~i~0=v_main_~i~0_12} AuxVars[] AssignedVars[] {351#false} is VALID [2022-04-07 16:41:52,642 INFO L290 TraceCheckUtils]: 13: Hoare triple {351#false} [84] L26-4-->L32-3: Formula: (and (= v_main_~j~0_8 (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_7) 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))))) (= v_main_~i~0_16 0)) InVars {main_~max~0=v_main_~max~0_7} OutVars{main_~i~0=v_main_~i~0_16, main_~max~0=v_main_~max~0_7, main_~j~0=v_main_~j~0_8} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {351#false} is VALID [2022-04-07 16:41:52,647 INFO L290 TraceCheckUtils]: 14: Hoare triple {351#false} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {351#false} is VALID [2022-04-07 16:41:52,648 INFO L272 TraceCheckUtils]: 15: Hoare triple {351#false} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {351#false} is VALID [2022-04-07 16:41:52,648 INFO L290 TraceCheckUtils]: 16: Hoare triple {351#false} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {351#false} is VALID [2022-04-07 16:41:52,648 INFO L290 TraceCheckUtils]: 17: Hoare triple {351#false} [95] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {351#false} is VALID [2022-04-07 16:41:52,648 INFO L290 TraceCheckUtils]: 18: Hoare triple {351#false} [97] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {351#false} is VALID [2022-04-07 16:41:52,648 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 16:41:52,649 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 16:41:52,649 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [857242775] [2022-04-07 16:41:52,649 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [857242775] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 16:41:52,649 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2007879244] [2022-04-07 16:41:52,649 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 16:41:52,649 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 16:41:52,650 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 16:41:52,652 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 16:41:52,660 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-04-07 16:41:52,713 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 16:41:52,725 INFO L263 TraceCheckSpWp]: Trace formula consists of 117 conjuncts, 32 conjunts are in the unsatisfiable core [2022-04-07 16:41:52,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 16:41:52,742 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 16:41:52,816 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 8 [2022-04-07 16:41:52,953 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 49 [2022-04-07 16:41:52,963 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 13 [2022-04-07 16:41:52,973 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 14 [2022-04-07 16:41:53,061 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 17 [2022-04-07 16:41:53,680 INFO L173 IndexEqualityManager]: detected equality via solver [2022-04-07 16:41:53,681 INFO L173 IndexEqualityManager]: detected equality via solver [2022-04-07 16:41:53,682 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 1 disjoint index pairs (out of 6 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 10 [2022-04-07 16:41:53,796 INFO L272 TraceCheckUtils]: 0: Hoare triple {350#true} [70] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {350#true} is VALID [2022-04-07 16:41:53,797 INFO L290 TraceCheckUtils]: 1: Hoare triple {350#true} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {350#true} is VALID [2022-04-07 16:41:53,797 INFO L290 TraceCheckUtils]: 2: Hoare triple {350#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {350#true} is VALID [2022-04-07 16:41:53,797 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {350#true} {350#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {350#true} is VALID [2022-04-07 16:41:53,797 INFO L272 TraceCheckUtils]: 4: Hoare triple {350#true} [71] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {350#true} is VALID [2022-04-07 16:41:53,798 INFO L290 TraceCheckUtils]: 5: Hoare triple {350#true} [74] mainENTRY-->L18-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (= 5 v_main_~max~0_1) (= v_main_~i~0_1 0) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= (let ((.cse1 (let ((.cse2 (mod v_main_~max~0_1 4294967296))) (ite (<= .cse2 2147483647) .cse2 (+ .cse2 (- 4294967296)))))) (store (store |v_#length_3| |v_main_~#str1~0.base_1| .cse1) |v_main_~#str2~0.base_1| .cse1)) |v_#length_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, main_~max~0=v_main_~max~0_1, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_1, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~#str1~0.base=|v_main_~#str1~0.base_1|, #length=|v_#length_1|} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~max~0, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, #length] {377#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:41:53,798 INFO L290 TraceCheckUtils]: 6: Hoare triple {377#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {377#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:41:53,799 INFO L290 TraceCheckUtils]: 7: Hoare triple {377#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {377#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:41:53,799 INFO L290 TraceCheckUtils]: 8: Hoare triple {377#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [77] L18-3-->L18-4: Formula: (not (< (mod v_main_~i~0_5 4294967296) (mod v_main_~max~0_4 4294967296))) InVars {main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} OutVars{main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} AuxVars[] AssignedVars[] {377#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:41:53,800 INFO L290 TraceCheckUtils]: 9: Hoare triple {377#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [79] L18-4-->L26-3: Formula: (let ((.cse0 (let ((.cse1 (mod (+ 4294967295 v_main_~max~0_6) 4294967296))) (ite (<= .cse1 2147483647) .cse1 (+ .cse1 (- 4294967296)))))) (and (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ .cse0 |v_main_~#str1~0.offset_6|) 0)) |v_#memory_int_4|) (= v_main_~j~0_5 0) (= .cse0 v_main_~i~0_11))) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|} OutVars{main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_5, main_~i~0=v_main_~i~0_11, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {390#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (= main_~j~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~i~0)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= main_~i~0 (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} is VALID [2022-04-07 16:41:53,802 INFO L290 TraceCheckUtils]: 10: Hoare triple {390#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (= main_~j~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~i~0)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= main_~i~0 (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {394#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) |main_~#str2~0.offset|) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= |main_~#str1~0.offset| 0) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~i~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:41:53,805 INFO L290 TraceCheckUtils]: 11: Hoare triple {394#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) |main_~#str2~0.offset|) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= |main_~#str1~0.offset| 0) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~i~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {398#(and (= |main_~#str2~0.offset| 0) (<= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 1)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= |main_~#str1~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) |main_~#str2~0.offset|) (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str1~0.offset|))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:41:53,806 INFO L290 TraceCheckUtils]: 12: Hoare triple {398#(and (= |main_~#str2~0.offset| 0) (<= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 1)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= |main_~#str1~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) |main_~#str2~0.offset|) (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str1~0.offset|))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [82] L26-3-->L26-4: Formula: (not (<= 0 v_main_~i~0_12)) InVars {main_~i~0=v_main_~i~0_12} OutVars{main_~i~0=v_main_~i~0_12} AuxVars[] AssignedVars[] {402#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) |main_~#str2~0.offset|) (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str1~0.offset|))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (< (mod (+ main_~max~0 4294967295) 4294967296) 1))} is VALID [2022-04-07 16:41:53,808 INFO L290 TraceCheckUtils]: 13: Hoare triple {402#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) |main_~#str2~0.offset|) (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str1~0.offset|))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (< (mod (+ main_~max~0 4294967295) 4294967296) 1))} [84] L26-4-->L32-3: Formula: (and (= v_main_~j~0_8 (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_7) 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))))) (= v_main_~i~0_16 0)) InVars {main_~max~0=v_main_~max~0_7} OutVars{main_~i~0=v_main_~i~0_16, main_~max~0=v_main_~max~0_7, main_~j~0=v_main_~j~0_8} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {406#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< (mod main_~j~0 4294967296) 1) (< main_~j~0 4294967296) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod main_~j~0 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) |main_~#str2~0.offset|)))} is VALID [2022-04-07 16:41:53,809 INFO L290 TraceCheckUtils]: 14: Hoare triple {406#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< (mod main_~j~0 4294967296) 1) (< main_~j~0 4294967296) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod main_~j~0 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) |main_~#str2~0.offset|)))} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {410#(= |main_#t~mem11| |main_#t~mem10|)} is VALID [2022-04-07 16:41:53,810 INFO L272 TraceCheckUtils]: 15: Hoare triple {410#(= |main_#t~mem11| |main_#t~mem10|)} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {414#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 16:41:53,810 INFO L290 TraceCheckUtils]: 16: Hoare triple {414#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {418#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 16:41:53,810 INFO L290 TraceCheckUtils]: 17: Hoare triple {418#(<= 1 __VERIFIER_assert_~cond)} [95] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {351#false} is VALID [2022-04-07 16:41:53,810 INFO L290 TraceCheckUtils]: 18: Hoare triple {351#false} [97] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {351#false} is VALID [2022-04-07 16:41:53,811 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 16:41:53,811 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 16:41:54,247 INFO L356 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2022-04-07 16:41:54,247 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 330 treesize of output 1 [2022-04-07 16:41:54,298 INFO L290 TraceCheckUtils]: 18: Hoare triple {351#false} [97] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {351#false} is VALID [2022-04-07 16:41:54,298 INFO L290 TraceCheckUtils]: 17: Hoare triple {418#(<= 1 __VERIFIER_assert_~cond)} [95] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {351#false} is VALID [2022-04-07 16:41:54,299 INFO L290 TraceCheckUtils]: 16: Hoare triple {414#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {418#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 16:41:54,299 INFO L272 TraceCheckUtils]: 15: Hoare triple {410#(= |main_#t~mem11| |main_#t~mem10|)} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {414#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 16:41:54,300 INFO L290 TraceCheckUtils]: 14: Hoare triple {437#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|)))} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {410#(= |main_#t~mem11| |main_#t~mem10|)} is VALID [2022-04-07 16:41:54,301 INFO L290 TraceCheckUtils]: 13: Hoare triple {441#(and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967296))) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))))} [84] L26-4-->L32-3: Formula: (and (= v_main_~j~0_8 (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_7) 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))))) (= v_main_~i~0_16 0)) InVars {main_~max~0=v_main_~max~0_7} OutVars{main_~i~0=v_main_~i~0_16, main_~max~0=v_main_~max~0_7, main_~j~0=v_main_~j~0_8} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {437#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|)))} is VALID [2022-04-07 16:41:54,302 INFO L290 TraceCheckUtils]: 12: Hoare triple {445#(or (and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967296))) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)))) (<= 0 main_~i~0))} [82] L26-3-->L26-4: Formula: (not (<= 0 v_main_~i~0_12)) InVars {main_~i~0=v_main_~i~0_12} OutVars{main_~i~0=v_main_~i~0_12} AuxVars[] AssignedVars[] {441#(and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967296))) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))))} is VALID [2022-04-07 16:41:54,305 INFO L290 TraceCheckUtils]: 11: Hoare triple {449#(or (and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967296))) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)))) (<= 1 main_~i~0))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {445#(or (and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967296))) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)))) (<= 0 main_~i~0))} is VALID [2022-04-07 16:41:54,306 INFO L290 TraceCheckUtils]: 10: Hoare triple {453#(or (not (<= 0 main_~i~0)) (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select (store |#memory_int| |main_~#str2~0.base| (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|)))) |main_~#str1~0.base|) |main_~#str1~0.offset|))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967296))) (select (select (store |#memory_int| |main_~#str2~0.base| (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|)))) |main_~#str1~0.base|) |main_~#str1~0.offset|)))) (<= 1 main_~i~0))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {449#(or (and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967296))) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)))) (<= 1 main_~i~0))} is VALID [2022-04-07 16:41:54,308 INFO L290 TraceCheckUtils]: 9: Hoare triple {350#true} [79] L18-4-->L26-3: Formula: (let ((.cse0 (let ((.cse1 (mod (+ 4294967295 v_main_~max~0_6) 4294967296))) (ite (<= .cse1 2147483647) .cse1 (+ .cse1 (- 4294967296)))))) (and (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ .cse0 |v_main_~#str1~0.offset_6|) 0)) |v_#memory_int_4|) (= v_main_~j~0_5 0) (= .cse0 v_main_~i~0_11))) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|} OutVars{main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_5, main_~i~0=v_main_~i~0_11, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {453#(or (not (<= 0 main_~i~0)) (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select (store |#memory_int| |main_~#str2~0.base| (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|)))) |main_~#str1~0.base|) |main_~#str1~0.offset|))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967296))) (select (select (store |#memory_int| |main_~#str2~0.base| (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|)))) |main_~#str1~0.base|) |main_~#str1~0.offset|)))) (<= 1 main_~i~0))} is VALID [2022-04-07 16:41:54,308 INFO L290 TraceCheckUtils]: 8: Hoare triple {350#true} [77] L18-3-->L18-4: Formula: (not (< (mod v_main_~i~0_5 4294967296) (mod v_main_~max~0_4 4294967296))) InVars {main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} OutVars{main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} AuxVars[] AssignedVars[] {350#true} is VALID [2022-04-07 16:41:54,308 INFO L290 TraceCheckUtils]: 7: Hoare triple {350#true} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {350#true} is VALID [2022-04-07 16:41:54,308 INFO L290 TraceCheckUtils]: 6: Hoare triple {350#true} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {350#true} is VALID [2022-04-07 16:41:54,308 INFO L290 TraceCheckUtils]: 5: Hoare triple {350#true} [74] mainENTRY-->L18-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (= 5 v_main_~max~0_1) (= v_main_~i~0_1 0) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= (let ((.cse1 (let ((.cse2 (mod v_main_~max~0_1 4294967296))) (ite (<= .cse2 2147483647) .cse2 (+ .cse2 (- 4294967296)))))) (store (store |v_#length_3| |v_main_~#str1~0.base_1| .cse1) |v_main_~#str2~0.base_1| .cse1)) |v_#length_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, main_~max~0=v_main_~max~0_1, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_1, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~#str1~0.base=|v_main_~#str1~0.base_1|, #length=|v_#length_1|} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~max~0, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, #length] {350#true} is VALID [2022-04-07 16:41:54,309 INFO L272 TraceCheckUtils]: 4: Hoare triple {350#true} [71] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {350#true} is VALID [2022-04-07 16:41:54,309 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {350#true} {350#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {350#true} is VALID [2022-04-07 16:41:54,309 INFO L290 TraceCheckUtils]: 2: Hoare triple {350#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {350#true} is VALID [2022-04-07 16:41:54,309 INFO L290 TraceCheckUtils]: 1: Hoare triple {350#true} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {350#true} is VALID [2022-04-07 16:41:54,309 INFO L272 TraceCheckUtils]: 0: Hoare triple {350#true} [70] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {350#true} is VALID [2022-04-07 16:41:54,309 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 16:41:54,309 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2007879244] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 16:41:54,310 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 16:41:54,310 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 11, 10] total 20 [2022-04-07 16:41:54,310 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [292221154] [2022-04-07 16:41:54,310 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 16:41:54,310 INFO L78 Accepts]: Start accepts. Automaton has has 20 states, 19 states have (on average 2.0) internal successors, (38), 18 states have internal predecessors, (38), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-07 16:41:54,311 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 16:41:54,311 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 20 states, 19 states have (on average 2.0) internal successors, (38), 18 states have internal predecessors, (38), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:41:54,344 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 44 edges. 44 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 16:41:54,344 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 20 states [2022-04-07 16:41:54,344 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 16:41:54,344 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2022-04-07 16:41:54,345 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=64, Invalid=316, Unknown=0, NotChecked=0, Total=380 [2022-04-07 16:41:54,345 INFO L87 Difference]: Start difference. First operand 24 states and 26 transitions. Second operand has 20 states, 19 states have (on average 2.0) internal successors, (38), 18 states have internal predecessors, (38), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:41:55,932 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 16:41:55,932 INFO L93 Difference]: Finished difference Result 46 states and 51 transitions. [2022-04-07 16:41:55,932 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2022-04-07 16:41:55,933 INFO L78 Accepts]: Start accepts. Automaton has has 20 states, 19 states have (on average 2.0) internal successors, (38), 18 states have internal predecessors, (38), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-07 16:41:55,933 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 16:41:55,933 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 19 states have (on average 2.0) internal successors, (38), 18 states have internal predecessors, (38), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:41:55,935 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 53 transitions. [2022-04-07 16:41:55,935 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 19 states have (on average 2.0) internal successors, (38), 18 states have internal predecessors, (38), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:41:55,937 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 53 transitions. [2022-04-07 16:41:55,937 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 20 states and 53 transitions. [2022-04-07 16:41:55,998 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 53 edges. 53 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 16:41:55,999 INFO L225 Difference]: With dead ends: 46 [2022-04-07 16:41:55,999 INFO L226 Difference]: Without dead ends: 46 [2022-04-07 16:41:56,000 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 27 SyntacticMatches, 1 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 233 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=259, Invalid=1073, Unknown=0, NotChecked=0, Total=1332 [2022-04-07 16:41:56,000 INFO L913 BasicCegarLoop]: 10 mSDtfsCounter, 43 mSDsluCounter, 56 mSDsCounter, 0 mSdLazyCounter, 292 mSolverCounterSat, 72 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 43 SdHoareTripleChecker+Valid, 66 SdHoareTripleChecker+Invalid, 364 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 72 IncrementalHoareTripleChecker+Valid, 292 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-04-07 16:41:56,001 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [43 Valid, 66 Invalid, 364 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [72 Valid, 292 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2022-04-07 16:41:56,001 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states. [2022-04-07 16:41:56,003 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 35. [2022-04-07 16:41:56,004 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 16:41:56,004 INFO L82 GeneralOperation]: Start isEquivalent. First operand 46 states. Second operand has 35 states, 27 states have (on average 1.1481481481481481) internal successors, (31), 28 states have internal predecessors, (31), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 16:41:56,004 INFO L74 IsIncluded]: Start isIncluded. First operand 46 states. Second operand has 35 states, 27 states have (on average 1.1481481481481481) internal successors, (31), 28 states have internal predecessors, (31), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 16:41:56,004 INFO L87 Difference]: Start difference. First operand 46 states. Second operand has 35 states, 27 states have (on average 1.1481481481481481) internal successors, (31), 28 states have internal predecessors, (31), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 16:41:56,006 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 16:41:56,006 INFO L93 Difference]: Finished difference Result 46 states and 51 transitions. [2022-04-07 16:41:56,006 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 51 transitions. [2022-04-07 16:41:56,007 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 16:41:56,007 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 16:41:56,007 INFO L74 IsIncluded]: Start isIncluded. First operand has 35 states, 27 states have (on average 1.1481481481481481) internal successors, (31), 28 states have internal predecessors, (31), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) Second operand 46 states. [2022-04-07 16:41:56,007 INFO L87 Difference]: Start difference. First operand has 35 states, 27 states have (on average 1.1481481481481481) internal successors, (31), 28 states have internal predecessors, (31), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) Second operand 46 states. [2022-04-07 16:41:56,009 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 16:41:56,009 INFO L93 Difference]: Finished difference Result 46 states and 51 transitions. [2022-04-07 16:41:56,009 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 51 transitions. [2022-04-07 16:41:56,009 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 16:41:56,009 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 16:41:56,009 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 16:41:56,009 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 16:41:56,010 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 35 states, 27 states have (on average 1.1481481481481481) internal successors, (31), 28 states have internal predecessors, (31), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 16:41:56,010 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35 states to 35 states and 38 transitions. [2022-04-07 16:41:56,011 INFO L78 Accepts]: Start accepts. Automaton has 35 states and 38 transitions. Word has length 19 [2022-04-07 16:41:56,011 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 16:41:56,011 INFO L478 AbstractCegarLoop]: Abstraction has 35 states and 38 transitions. [2022-04-07 16:41:56,011 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 20 states, 19 states have (on average 2.0) internal successors, (38), 18 states have internal predecessors, (38), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:41:56,011 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 38 transitions. [2022-04-07 16:41:56,011 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2022-04-07 16:41:56,011 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 16:41:56,012 INFO L499 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 16:41:56,033 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2022-04-07 16:41:56,227 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3,2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 16:41:56,227 INFO L403 AbstractCegarLoop]: === Iteration 5 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 16:41:56,228 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 16:41:56,228 INFO L85 PathProgramCache]: Analyzing trace with hash -1057862574, now seen corresponding path program 2 times [2022-04-07 16:41:56,228 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 16:41:56,228 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [784732819] [2022-04-07 16:41:56,228 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 16:41:56,228 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 16:41:56,259 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 16:41:56,399 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 16:41:56,401 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 16:41:56,404 INFO L290 TraceCheckUtils]: 0: Hoare triple {705#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {695#true} is VALID [2022-04-07 16:41:56,404 INFO L290 TraceCheckUtils]: 1: Hoare triple {695#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {695#true} is VALID [2022-04-07 16:41:56,404 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {695#true} {695#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {695#true} is VALID [2022-04-07 16:41:56,416 INFO L272 TraceCheckUtils]: 0: Hoare triple {695#true} [70] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {705#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 16:41:56,416 INFO L290 TraceCheckUtils]: 1: Hoare triple {705#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {695#true} is VALID [2022-04-07 16:41:56,416 INFO L290 TraceCheckUtils]: 2: Hoare triple {695#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {695#true} is VALID [2022-04-07 16:41:56,416 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {695#true} {695#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {695#true} is VALID [2022-04-07 16:41:56,416 INFO L272 TraceCheckUtils]: 4: Hoare triple {695#true} [71] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {695#true} is VALID [2022-04-07 16:41:56,417 INFO L290 TraceCheckUtils]: 5: Hoare triple {695#true} [74] mainENTRY-->L18-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (= 5 v_main_~max~0_1) (= v_main_~i~0_1 0) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= (let ((.cse1 (let ((.cse2 (mod v_main_~max~0_1 4294967296))) (ite (<= .cse2 2147483647) .cse2 (+ .cse2 (- 4294967296)))))) (store (store |v_#length_3| |v_main_~#str1~0.base_1| .cse1) |v_main_~#str2~0.base_1| .cse1)) |v_#length_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, main_~max~0=v_main_~max~0_1, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_1, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~#str1~0.base=|v_main_~#str1~0.base_1|, #length=|v_#length_1|} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~max~0, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, #length] {700#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} is VALID [2022-04-07 16:41:56,418 INFO L290 TraceCheckUtils]: 6: Hoare triple {700#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {700#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} is VALID [2022-04-07 16:41:56,418 INFO L290 TraceCheckUtils]: 7: Hoare triple {700#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {700#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} is VALID [2022-04-07 16:41:56,419 INFO L290 TraceCheckUtils]: 8: Hoare triple {700#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {700#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} is VALID [2022-04-07 16:41:56,419 INFO L290 TraceCheckUtils]: 9: Hoare triple {700#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {700#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} is VALID [2022-04-07 16:41:56,419 INFO L290 TraceCheckUtils]: 10: Hoare triple {700#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} [77] L18-3-->L18-4: Formula: (not (< (mod v_main_~i~0_5 4294967296) (mod v_main_~max~0_4 4294967296))) InVars {main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} OutVars{main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} AuxVars[] AssignedVars[] {700#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} is VALID [2022-04-07 16:41:56,421 INFO L290 TraceCheckUtils]: 11: Hoare triple {700#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} [79] L18-4-->L26-3: Formula: (let ((.cse0 (let ((.cse1 (mod (+ 4294967295 v_main_~max~0_6) 4294967296))) (ite (<= .cse1 2147483647) .cse1 (+ .cse1 (- 4294967296)))))) (and (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ .cse0 |v_main_~#str1~0.offset_6|) 0)) |v_#memory_int_4|) (= v_main_~j~0_5 0) (= .cse0 v_main_~i~0_11))) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|} OutVars{main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_5, main_~i~0=v_main_~i~0_11, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {701#(and (or (and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1)) (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (- 1) (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0) 0)) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295) 0))))} is VALID [2022-04-07 16:41:56,422 INFO L290 TraceCheckUtils]: 12: Hoare triple {701#(and (or (and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1)) (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (- 1) (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0) 0)) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295) 0))))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {701#(and (or (and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1)) (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (- 1) (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0) 0)) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295) 0))))} is VALID [2022-04-07 16:41:56,422 INFO L290 TraceCheckUtils]: 13: Hoare triple {701#(and (or (and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1)) (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (- 1) (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0) 0)) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295) 0))))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {702#(or (<= (+ main_~i~0 2) 0) (and (<= (div (+ main_~max~0 4294967295) 4294967296) 1) (<= 4294967299 (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))))} is VALID [2022-04-07 16:41:56,423 INFO L290 TraceCheckUtils]: 14: Hoare triple {702#(or (<= (+ main_~i~0 2) 0) (and (<= (div (+ main_~max~0 4294967295) 4294967296) 1) (<= 4294967299 (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {703#(and (<= (div (+ main_~max~0 4294967295) 4294967296) 1) (<= 4294967299 (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))))} is VALID [2022-04-07 16:41:56,424 INFO L290 TraceCheckUtils]: 15: Hoare triple {703#(and (<= (div (+ main_~max~0 4294967295) 4294967296) 1) (<= 4294967299 (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {704#(and (<= (div (+ main_~max~0 4294967295) 4294967296) 1) (<= 4294967298 (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))))} is VALID [2022-04-07 16:41:56,424 INFO L290 TraceCheckUtils]: 16: Hoare triple {704#(and (<= (div (+ main_~max~0 4294967295) 4294967296) 1) (<= 4294967298 (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))))} [82] L26-3-->L26-4: Formula: (not (<= 0 v_main_~i~0_12)) InVars {main_~i~0=v_main_~i~0_12} OutVars{main_~i~0=v_main_~i~0_12} AuxVars[] AssignedVars[] {696#false} is VALID [2022-04-07 16:41:56,425 INFO L290 TraceCheckUtils]: 17: Hoare triple {696#false} [84] L26-4-->L32-3: Formula: (and (= v_main_~j~0_8 (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_7) 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))))) (= v_main_~i~0_16 0)) InVars {main_~max~0=v_main_~max~0_7} OutVars{main_~i~0=v_main_~i~0_16, main_~max~0=v_main_~max~0_7, main_~j~0=v_main_~j~0_8} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {696#false} is VALID [2022-04-07 16:41:56,425 INFO L290 TraceCheckUtils]: 18: Hoare triple {696#false} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {696#false} is VALID [2022-04-07 16:41:56,425 INFO L272 TraceCheckUtils]: 19: Hoare triple {696#false} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {696#false} is VALID [2022-04-07 16:41:56,425 INFO L290 TraceCheckUtils]: 20: Hoare triple {696#false} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {696#false} is VALID [2022-04-07 16:41:56,425 INFO L290 TraceCheckUtils]: 21: Hoare triple {696#false} [95] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {696#false} is VALID [2022-04-07 16:41:56,425 INFO L290 TraceCheckUtils]: 22: Hoare triple {696#false} [97] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {696#false} is VALID [2022-04-07 16:41:56,426 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-07 16:41:56,426 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 16:41:56,426 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [784732819] [2022-04-07 16:41:56,426 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [784732819] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 16:41:56,426 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1635236080] [2022-04-07 16:41:56,426 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-07 16:41:56,426 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 16:41:56,426 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 16:41:56,427 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 16:41:56,431 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-04-07 16:41:56,483 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-07 16:41:56,483 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 16:41:56,484 INFO L263 TraceCheckSpWp]: Trace formula consists of 135 conjuncts, 34 conjunts are in the unsatisfiable core [2022-04-07 16:41:56,496 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 16:41:56,497 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 16:41:56,514 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 8 [2022-04-07 16:41:56,725 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 19 [2022-04-07 16:41:58,644 INFO L173 IndexEqualityManager]: detected equality via solver [2022-04-07 16:41:58,652 INFO L356 Elim1Store]: treesize reduction 12, result has 20.0 percent of original size [2022-04-07 16:41:58,652 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 1 disjoint index pairs (out of 6 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 37 treesize of output 13 [2022-04-07 16:41:59,147 INFO L272 TraceCheckUtils]: 0: Hoare triple {695#true} [70] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {695#true} is VALID [2022-04-07 16:41:59,148 INFO L290 TraceCheckUtils]: 1: Hoare triple {695#true} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {695#true} is VALID [2022-04-07 16:41:59,148 INFO L290 TraceCheckUtils]: 2: Hoare triple {695#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {695#true} is VALID [2022-04-07 16:41:59,148 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {695#true} {695#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {695#true} is VALID [2022-04-07 16:41:59,148 INFO L272 TraceCheckUtils]: 4: Hoare triple {695#true} [71] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {695#true} is VALID [2022-04-07 16:41:59,149 INFO L290 TraceCheckUtils]: 5: Hoare triple {695#true} [74] mainENTRY-->L18-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (= 5 v_main_~max~0_1) (= v_main_~i~0_1 0) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= (let ((.cse1 (let ((.cse2 (mod v_main_~max~0_1 4294967296))) (ite (<= .cse2 2147483647) .cse2 (+ .cse2 (- 4294967296)))))) (store (store |v_#length_3| |v_main_~#str1~0.base_1| .cse1) |v_main_~#str2~0.base_1| .cse1)) |v_#length_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, main_~max~0=v_main_~max~0_1, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_1, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~#str1~0.base=|v_main_~#str1~0.base_1|, #length=|v_#length_1|} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~max~0, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, #length] {724#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:41:59,149 INFO L290 TraceCheckUtils]: 6: Hoare triple {724#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {724#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:41:59,150 INFO L290 TraceCheckUtils]: 7: Hoare triple {724#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {724#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:41:59,150 INFO L290 TraceCheckUtils]: 8: Hoare triple {724#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {724#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:41:59,151 INFO L290 TraceCheckUtils]: 9: Hoare triple {724#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {724#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:41:59,151 INFO L290 TraceCheckUtils]: 10: Hoare triple {724#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [77] L18-3-->L18-4: Formula: (not (< (mod v_main_~i~0_5 4294967296) (mod v_main_~max~0_4 4294967296))) InVars {main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} OutVars{main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} AuxVars[] AssignedVars[] {724#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:41:59,152 INFO L290 TraceCheckUtils]: 11: Hoare triple {724#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [79] L18-4-->L26-3: Formula: (let ((.cse0 (let ((.cse1 (mod (+ 4294967295 v_main_~max~0_6) 4294967296))) (ite (<= .cse1 2147483647) .cse1 (+ .cse1 (- 4294967296)))))) (and (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ .cse0 |v_main_~#str1~0.offset_6|) 0)) |v_#memory_int_4|) (= v_main_~j~0_5 0) (= .cse0 v_main_~i~0_11))) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|} OutVars{main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_5, main_~i~0=v_main_~i~0_11, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {743#(and (= |main_~#str1~0.offset| 0) (= main_~j~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~i~0)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= main_~i~0 (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} is VALID [2022-04-07 16:41:59,153 INFO L290 TraceCheckUtils]: 12: Hoare triple {743#(and (= |main_~#str1~0.offset| 0) (= main_~j~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~i~0)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= main_~i~0 (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {747#(and (= main_~j~0 1) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~i~0)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= main_~i~0 (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} is VALID [2022-04-07 16:41:59,154 INFO L290 TraceCheckUtils]: 13: Hoare triple {747#(and (= main_~j~0 1) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~i~0)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= main_~i~0 (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {751#(and (or (and (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 1)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) (+ main_~i~0 1)))) (= main_~j~0 1) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:41:59,155 INFO L290 TraceCheckUtils]: 14: Hoare triple {751#(and (or (and (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 1)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) (+ main_~i~0 1)))) (= main_~j~0 1) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {755#(and (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 1)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= |main_~#str1~0.offset| 0) (<= 0 main_~i~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))))} is VALID [2022-04-07 16:41:59,156 INFO L290 TraceCheckUtils]: 15: Hoare triple {755#(and (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 1)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= |main_~#str1~0.offset| 0) (<= 0 main_~i~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {759#(and (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= |main_~#str1~0.offset| 0) (<= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 2)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 1 (mod (+ main_~max~0 4294967295) 4294967296)))} is VALID [2022-04-07 16:41:59,157 INFO L290 TraceCheckUtils]: 16: Hoare triple {759#(and (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= |main_~#str1~0.offset| 0) (<= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 2)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 1 (mod (+ main_~max~0 4294967295) 4294967296)))} [82] L26-3-->L26-4: Formula: (not (<= 0 v_main_~i~0_12)) InVars {main_~i~0=v_main_~i~0_12} OutVars{main_~i~0=v_main_~i~0_12} AuxVars[] AssignedVars[] {763#(and (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (= |main_~#str1~0.offset| 0) (< (mod (+ main_~max~0 4294967295) 4294967296) 2) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 1 (mod (+ main_~max~0 4294967295) 4294967296)))} is VALID [2022-04-07 16:41:59,159 INFO L290 TraceCheckUtils]: 17: Hoare triple {763#(and (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (= |main_~#str1~0.offset| 0) (< (mod (+ main_~max~0 4294967295) 4294967296) 2) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 1 (mod (+ main_~max~0 4294967295) 4294967296)))} [84] L26-4-->L32-3: Formula: (and (= v_main_~j~0_8 (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_7) 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))))) (= v_main_~i~0_16 0)) InVars {main_~max~0=v_main_~max~0_7} OutVars{main_~i~0=v_main_~i~0_16, main_~max~0=v_main_~max~0_7, main_~j~0=v_main_~j~0_8} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {767#(and (< (div (+ (- 1) main_~j~0) (- 4294967296)) (+ (div (+ 4294967295 (* (- 1) main_~j~0)) 4294967296) 1)) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< main_~j~0 4294967296) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (< (div main_~j~0 (- 4294967296)) (+ (div (+ (* (- 1) main_~j~0) 1) 4294967296) 1)) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod main_~j~0 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))))} is VALID [2022-04-07 16:41:59,161 INFO L290 TraceCheckUtils]: 18: Hoare triple {767#(and (< (div (+ (- 1) main_~j~0) (- 4294967296)) (+ (div (+ 4294967295 (* (- 1) main_~j~0)) 4294967296) 1)) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< main_~j~0 4294967296) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (< (div main_~j~0 (- 4294967296)) (+ (div (+ (* (- 1) main_~j~0) 1) 4294967296) 1)) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod main_~j~0 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))))} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {771#(= |main_#t~mem11| |main_#t~mem10|)} is VALID [2022-04-07 16:41:59,161 INFO L272 TraceCheckUtils]: 19: Hoare triple {771#(= |main_#t~mem11| |main_#t~mem10|)} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {775#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 16:41:59,162 INFO L290 TraceCheckUtils]: 20: Hoare triple {775#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {779#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 16:41:59,162 INFO L290 TraceCheckUtils]: 21: Hoare triple {779#(<= 1 __VERIFIER_assert_~cond)} [95] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {696#false} is VALID [2022-04-07 16:41:59,162 INFO L290 TraceCheckUtils]: 22: Hoare triple {696#false} [97] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {696#false} is VALID [2022-04-07 16:41:59,163 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-07 16:41:59,163 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 16:41:59,457 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-04-07 16:41:59,458 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 80 treesize of output 76 [2022-04-07 16:41:59,559 INFO L356 Elim1Store]: treesize reduction 6, result has 40.0 percent of original size [2022-04-07 16:41:59,559 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 22 treesize of output 21 [2022-04-07 16:41:59,571 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 28 [2022-04-07 16:41:59,602 INFO L356 Elim1Store]: treesize reduction 27, result has 34.1 percent of original size [2022-04-07 16:41:59,602 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 48 treesize of output 45 [2022-04-07 16:41:59,648 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-04-07 16:41:59,648 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 82 treesize of output 78 [2022-04-07 16:41:59,749 INFO L356 Elim1Store]: treesize reduction 6, result has 40.0 percent of original size [2022-04-07 16:41:59,750 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 22 [2022-04-07 16:41:59,760 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 30 [2022-04-07 16:41:59,813 INFO L356 Elim1Store]: treesize reduction 27, result has 37.2 percent of original size [2022-04-07 16:41:59,813 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 51 treesize of output 49 [2022-04-07 16:42:00,216 INFO L290 TraceCheckUtils]: 22: Hoare triple {696#false} [97] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {696#false} is VALID [2022-04-07 16:42:00,216 INFO L290 TraceCheckUtils]: 21: Hoare triple {779#(<= 1 __VERIFIER_assert_~cond)} [95] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {696#false} is VALID [2022-04-07 16:42:00,217 INFO L290 TraceCheckUtils]: 20: Hoare triple {775#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {779#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 16:42:00,217 INFO L272 TraceCheckUtils]: 19: Hoare triple {771#(= |main_#t~mem11| |main_#t~mem10|)} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {775#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 16:42:00,218 INFO L290 TraceCheckUtils]: 18: Hoare triple {798#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|)))} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {771#(= |main_#t~mem11| |main_#t~mem10|)} is VALID [2022-04-07 16:42:00,219 INFO L290 TraceCheckUtils]: 17: Hoare triple {802#(and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967296))) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))))} [84] L26-4-->L32-3: Formula: (and (= v_main_~j~0_8 (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_7) 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))))) (= v_main_~i~0_16 0)) InVars {main_~max~0=v_main_~max~0_7} OutVars{main_~i~0=v_main_~i~0_16, main_~max~0=v_main_~max~0_7, main_~j~0=v_main_~j~0_8} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {798#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|)))} is VALID [2022-04-07 16:42:00,220 INFO L290 TraceCheckUtils]: 16: Hoare triple {806#(or (and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967296))) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)))) (<= 0 main_~i~0))} [82] L26-3-->L26-4: Formula: (not (<= 0 v_main_~i~0_12)) InVars {main_~i~0=v_main_~i~0_12} OutVars{main_~i~0=v_main_~i~0_12} AuxVars[] AssignedVars[] {802#(and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967296))) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))))} is VALID [2022-04-07 16:42:00,221 INFO L290 TraceCheckUtils]: 15: Hoare triple {810#(or (and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967296))) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)))) (<= 1 main_~i~0))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {806#(or (and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967296))) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)))) (<= 0 main_~i~0))} is VALID [2022-04-07 16:42:00,223 INFO L290 TraceCheckUtils]: 14: Hoare triple {814#(or (not (<= 0 main_~i~0)) (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~j~0)) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967296)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647))) (<= 1 main_~i~0))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {810#(or (and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967296))) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)))) (<= 1 main_~i~0))} is VALID [2022-04-07 16:42:00,224 INFO L290 TraceCheckUtils]: 13: Hoare triple {818#(or (<= 2 main_~i~0) (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~j~0)) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967296)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647))) (not (<= 1 main_~i~0)))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {814#(or (not (<= 0 main_~i~0)) (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~j~0)) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967296)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647))) (<= 1 main_~i~0))} is VALID [2022-04-07 16:42:00,225 INFO L290 TraceCheckUtils]: 12: Hoare triple {822#(or (<= 2 main_~i~0) (and (or (= (+ main_~j~0 4294967297) (mod (+ main_~max~0 4294967295) 4294967296)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 1)))) (not (<= 1 main_~i~0)))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {818#(or (<= 2 main_~i~0) (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~j~0)) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967296)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647))) (not (<= 1 main_~i~0)))} is VALID [2022-04-07 16:42:00,225 INFO L290 TraceCheckUtils]: 11: Hoare triple {695#true} [79] L18-4-->L26-3: Formula: (let ((.cse0 (let ((.cse1 (mod (+ 4294967295 v_main_~max~0_6) 4294967296))) (ite (<= .cse1 2147483647) .cse1 (+ .cse1 (- 4294967296)))))) (and (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ .cse0 |v_main_~#str1~0.offset_6|) 0)) |v_#memory_int_4|) (= v_main_~j~0_5 0) (= .cse0 v_main_~i~0_11))) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|} OutVars{main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_5, main_~i~0=v_main_~i~0_11, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {822#(or (<= 2 main_~i~0) (and (or (= (+ main_~j~0 4294967297) (mod (+ main_~max~0 4294967295) 4294967296)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 1)))) (not (<= 1 main_~i~0)))} is VALID [2022-04-07 16:42:00,226 INFO L290 TraceCheckUtils]: 10: Hoare triple {695#true} [77] L18-3-->L18-4: Formula: (not (< (mod v_main_~i~0_5 4294967296) (mod v_main_~max~0_4 4294967296))) InVars {main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} OutVars{main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} AuxVars[] AssignedVars[] {695#true} is VALID [2022-04-07 16:42:00,226 INFO L290 TraceCheckUtils]: 9: Hoare triple {695#true} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {695#true} is VALID [2022-04-07 16:42:00,226 INFO L290 TraceCheckUtils]: 8: Hoare triple {695#true} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {695#true} is VALID [2022-04-07 16:42:00,226 INFO L290 TraceCheckUtils]: 7: Hoare triple {695#true} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {695#true} is VALID [2022-04-07 16:42:00,226 INFO L290 TraceCheckUtils]: 6: Hoare triple {695#true} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {695#true} is VALID [2022-04-07 16:42:00,226 INFO L290 TraceCheckUtils]: 5: Hoare triple {695#true} [74] mainENTRY-->L18-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (= 5 v_main_~max~0_1) (= v_main_~i~0_1 0) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= (let ((.cse1 (let ((.cse2 (mod v_main_~max~0_1 4294967296))) (ite (<= .cse2 2147483647) .cse2 (+ .cse2 (- 4294967296)))))) (store (store |v_#length_3| |v_main_~#str1~0.base_1| .cse1) |v_main_~#str2~0.base_1| .cse1)) |v_#length_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, main_~max~0=v_main_~max~0_1, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_1, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~#str1~0.base=|v_main_~#str1~0.base_1|, #length=|v_#length_1|} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~max~0, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, #length] {695#true} is VALID [2022-04-07 16:42:00,226 INFO L272 TraceCheckUtils]: 4: Hoare triple {695#true} [71] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {695#true} is VALID [2022-04-07 16:42:00,226 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {695#true} {695#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {695#true} is VALID [2022-04-07 16:42:00,227 INFO L290 TraceCheckUtils]: 2: Hoare triple {695#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {695#true} is VALID [2022-04-07 16:42:00,227 INFO L290 TraceCheckUtils]: 1: Hoare triple {695#true} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {695#true} is VALID [2022-04-07 16:42:00,227 INFO L272 TraceCheckUtils]: 0: Hoare triple {695#true} [70] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {695#true} is VALID [2022-04-07 16:42:00,227 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-07 16:42:00,227 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1635236080] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 16:42:00,227 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 16:42:00,227 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 13, 12] total 26 [2022-04-07 16:42:00,228 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [464931258] [2022-04-07 16:42:00,228 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 16:42:00,228 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 25 states have (on average 1.76) internal successors, (44), 24 states have internal predecessors, (44), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 23 [2022-04-07 16:42:00,229 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 16:42:00,229 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 26 states, 25 states have (on average 1.76) internal successors, (44), 24 states have internal predecessors, (44), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:42:00,315 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 50 edges. 50 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 16:42:00,315 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 26 states [2022-04-07 16:42:00,315 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 16:42:00,316 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2022-04-07 16:42:00,316 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=557, Unknown=0, NotChecked=0, Total=650 [2022-04-07 16:42:00,316 INFO L87 Difference]: Start difference. First operand 35 states and 38 transitions. Second operand has 26 states, 25 states have (on average 1.76) internal successors, (44), 24 states have internal predecessors, (44), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:42:02,889 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 16:42:02,889 INFO L93 Difference]: Finished difference Result 51 states and 57 transitions. [2022-04-07 16:42:02,889 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2022-04-07 16:42:02,889 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 25 states have (on average 1.76) internal successors, (44), 24 states have internal predecessors, (44), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 23 [2022-04-07 16:42:02,890 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 16:42:02,890 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 25 states have (on average 1.76) internal successors, (44), 24 states have internal predecessors, (44), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:42:02,891 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 59 transitions. [2022-04-07 16:42:02,892 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 25 states have (on average 1.76) internal successors, (44), 24 states have internal predecessors, (44), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:42:02,893 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 59 transitions. [2022-04-07 16:42:02,893 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 23 states and 59 transitions. [2022-04-07 16:42:02,975 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 59 edges. 59 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 16:42:02,976 INFO L225 Difference]: With dead ends: 51 [2022-04-07 16:42:02,976 INFO L226 Difference]: Without dead ends: 51 [2022-04-07 16:42:02,977 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 78 GetRequests, 33 SyntacticMatches, 1 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 358 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=378, Invalid=1692, Unknown=0, NotChecked=0, Total=2070 [2022-04-07 16:42:02,978 INFO L913 BasicCegarLoop]: 10 mSDtfsCounter, 68 mSDsluCounter, 50 mSDsCounter, 0 mSdLazyCounter, 349 mSolverCounterSat, 162 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 68 SdHoareTripleChecker+Valid, 60 SdHoareTripleChecker+Invalid, 511 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 162 IncrementalHoareTripleChecker+Valid, 349 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2022-04-07 16:42:02,978 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [68 Valid, 60 Invalid, 511 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [162 Valid, 349 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2022-04-07 16:42:02,979 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states. [2022-04-07 16:42:02,981 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 41. [2022-04-07 16:42:02,981 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 16:42:02,981 INFO L82 GeneralOperation]: Start isEquivalent. First operand 51 states. Second operand has 41 states, 33 states have (on average 1.1515151515151516) internal successors, (38), 34 states have internal predecessors, (38), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 16:42:02,982 INFO L74 IsIncluded]: Start isIncluded. First operand 51 states. Second operand has 41 states, 33 states have (on average 1.1515151515151516) internal successors, (38), 34 states have internal predecessors, (38), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 16:42:02,982 INFO L87 Difference]: Start difference. First operand 51 states. Second operand has 41 states, 33 states have (on average 1.1515151515151516) internal successors, (38), 34 states have internal predecessors, (38), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 16:42:02,983 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 16:42:02,983 INFO L93 Difference]: Finished difference Result 51 states and 57 transitions. [2022-04-07 16:42:02,983 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 57 transitions. [2022-04-07 16:42:02,984 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 16:42:02,984 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 16:42:02,984 INFO L74 IsIncluded]: Start isIncluded. First operand has 41 states, 33 states have (on average 1.1515151515151516) internal successors, (38), 34 states have internal predecessors, (38), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) Second operand 51 states. [2022-04-07 16:42:02,984 INFO L87 Difference]: Start difference. First operand has 41 states, 33 states have (on average 1.1515151515151516) internal successors, (38), 34 states have internal predecessors, (38), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) Second operand 51 states. [2022-04-07 16:42:02,985 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 16:42:02,985 INFO L93 Difference]: Finished difference Result 51 states and 57 transitions. [2022-04-07 16:42:02,986 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 57 transitions. [2022-04-07 16:42:02,986 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 16:42:02,986 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 16:42:02,986 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 16:42:02,986 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 16:42:02,986 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 41 states, 33 states have (on average 1.1515151515151516) internal successors, (38), 34 states have internal predecessors, (38), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 16:42:02,987 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 45 transitions. [2022-04-07 16:42:02,987 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 45 transitions. Word has length 23 [2022-04-07 16:42:02,987 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 16:42:02,987 INFO L478 AbstractCegarLoop]: Abstraction has 41 states and 45 transitions. [2022-04-07 16:42:02,987 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 26 states, 25 states have (on average 1.76) internal successors, (44), 24 states have internal predecessors, (44), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:42:02,988 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 45 transitions. [2022-04-07 16:42:02,988 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2022-04-07 16:42:02,988 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 16:42:02,988 INFO L499 BasicCegarLoop]: trace histogram [5, 5, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 16:42:03,009 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2022-04-07 16:42:03,209 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 16:42:03,209 INFO L403 AbstractCegarLoop]: === Iteration 6 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 16:42:03,210 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 16:42:03,210 INFO L85 PathProgramCache]: Analyzing trace with hash -126211412, now seen corresponding path program 3 times [2022-04-07 16:42:03,210 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 16:42:03,210 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1820505293] [2022-04-07 16:42:03,210 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 16:42:03,210 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 16:42:03,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 16:42:03,336 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 16:42:03,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 16:42:03,352 INFO L290 TraceCheckUtils]: 0: Hoare triple {1107#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1098#true} is VALID [2022-04-07 16:42:03,352 INFO L290 TraceCheckUtils]: 1: Hoare triple {1098#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1098#true} is VALID [2022-04-07 16:42:03,352 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1098#true} {1098#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1098#true} is VALID [2022-04-07 16:42:03,353 INFO L272 TraceCheckUtils]: 0: Hoare triple {1098#true} [70] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1107#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 16:42:03,353 INFO L290 TraceCheckUtils]: 1: Hoare triple {1107#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1098#true} is VALID [2022-04-07 16:42:03,353 INFO L290 TraceCheckUtils]: 2: Hoare triple {1098#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1098#true} is VALID [2022-04-07 16:42:03,353 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1098#true} {1098#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1098#true} is VALID [2022-04-07 16:42:03,353 INFO L272 TraceCheckUtils]: 4: Hoare triple {1098#true} [71] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1098#true} is VALID [2022-04-07 16:42:03,354 INFO L290 TraceCheckUtils]: 5: Hoare triple {1098#true} [74] mainENTRY-->L18-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (= 5 v_main_~max~0_1) (= v_main_~i~0_1 0) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= (let ((.cse1 (let ((.cse2 (mod v_main_~max~0_1 4294967296))) (ite (<= .cse2 2147483647) .cse2 (+ .cse2 (- 4294967296)))))) (store (store |v_#length_3| |v_main_~#str1~0.base_1| .cse1) |v_main_~#str2~0.base_1| .cse1)) |v_#length_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, main_~max~0=v_main_~max~0_1, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_1, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~#str1~0.base=|v_main_~#str1~0.base_1|, #length=|v_#length_1|} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~max~0, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, #length] {1103#(and (<= 5 main_~max~0) (<= main_~max~0 5) (= main_~i~0 0))} is VALID [2022-04-07 16:42:03,355 INFO L290 TraceCheckUtils]: 6: Hoare triple {1103#(and (<= 5 main_~max~0) (<= main_~max~0 5) (= main_~i~0 0))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {1104#(and (<= 5 main_~max~0) (<= (div main_~max~0 4294967296) 0) (= main_~i~0 0))} is VALID [2022-04-07 16:42:03,356 INFO L290 TraceCheckUtils]: 7: Hoare triple {1104#(and (<= 5 main_~max~0) (<= (div main_~max~0 4294967296) 0) (= main_~i~0 0))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {1105#(and (<= (div main_~max~0 4294967296) 0) (<= (+ main_~i~0 4) main_~max~0) (<= 1 main_~i~0))} is VALID [2022-04-07 16:42:03,356 INFO L290 TraceCheckUtils]: 8: Hoare triple {1105#(and (<= (div main_~max~0 4294967296) 0) (<= (+ main_~i~0 4) main_~max~0) (<= 1 main_~i~0))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {1105#(and (<= (div main_~max~0 4294967296) 0) (<= (+ main_~i~0 4) main_~max~0) (<= 1 main_~i~0))} is VALID [2022-04-07 16:42:03,364 INFO L290 TraceCheckUtils]: 9: Hoare triple {1105#(and (<= (div main_~max~0 4294967296) 0) (<= (+ main_~i~0 4) main_~max~0) (<= 1 main_~i~0))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {1106#(and (<= (+ main_~i~0 3) main_~max~0) (<= (div main_~max~0 4294967296) (div main_~i~0 4294967296)))} is VALID [2022-04-07 16:42:03,366 INFO L290 TraceCheckUtils]: 10: Hoare triple {1106#(and (<= (+ main_~i~0 3) main_~max~0) (<= (div main_~max~0 4294967296) (div main_~i~0 4294967296)))} [77] L18-3-->L18-4: Formula: (not (< (mod v_main_~i~0_5 4294967296) (mod v_main_~max~0_4 4294967296))) InVars {main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} OutVars{main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} AuxVars[] AssignedVars[] {1099#false} is VALID [2022-04-07 16:42:03,366 INFO L290 TraceCheckUtils]: 11: Hoare triple {1099#false} [79] L18-4-->L26-3: Formula: (let ((.cse0 (let ((.cse1 (mod (+ 4294967295 v_main_~max~0_6) 4294967296))) (ite (<= .cse1 2147483647) .cse1 (+ .cse1 (- 4294967296)))))) (and (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ .cse0 |v_main_~#str1~0.offset_6|) 0)) |v_#memory_int_4|) (= v_main_~j~0_5 0) (= .cse0 v_main_~i~0_11))) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|} OutVars{main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_5, main_~i~0=v_main_~i~0_11, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {1099#false} is VALID [2022-04-07 16:42:03,366 INFO L290 TraceCheckUtils]: 12: Hoare triple {1099#false} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1099#false} is VALID [2022-04-07 16:42:03,366 INFO L290 TraceCheckUtils]: 13: Hoare triple {1099#false} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1099#false} is VALID [2022-04-07 16:42:03,366 INFO L290 TraceCheckUtils]: 14: Hoare triple {1099#false} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1099#false} is VALID [2022-04-07 16:42:03,367 INFO L290 TraceCheckUtils]: 15: Hoare triple {1099#false} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1099#false} is VALID [2022-04-07 16:42:03,367 INFO L290 TraceCheckUtils]: 16: Hoare triple {1099#false} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1099#false} is VALID [2022-04-07 16:42:03,367 INFO L290 TraceCheckUtils]: 17: Hoare triple {1099#false} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1099#false} is VALID [2022-04-07 16:42:03,367 INFO L290 TraceCheckUtils]: 18: Hoare triple {1099#false} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1099#false} is VALID [2022-04-07 16:42:03,367 INFO L290 TraceCheckUtils]: 19: Hoare triple {1099#false} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1099#false} is VALID [2022-04-07 16:42:03,367 INFO L290 TraceCheckUtils]: 20: Hoare triple {1099#false} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1099#false} is VALID [2022-04-07 16:42:03,367 INFO L290 TraceCheckUtils]: 21: Hoare triple {1099#false} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1099#false} is VALID [2022-04-07 16:42:03,368 INFO L290 TraceCheckUtils]: 22: Hoare triple {1099#false} [82] L26-3-->L26-4: Formula: (not (<= 0 v_main_~i~0_12)) InVars {main_~i~0=v_main_~i~0_12} OutVars{main_~i~0=v_main_~i~0_12} AuxVars[] AssignedVars[] {1099#false} is VALID [2022-04-07 16:42:03,368 INFO L290 TraceCheckUtils]: 23: Hoare triple {1099#false} [84] L26-4-->L32-3: Formula: (and (= v_main_~j~0_8 (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_7) 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))))) (= v_main_~i~0_16 0)) InVars {main_~max~0=v_main_~max~0_7} OutVars{main_~i~0=v_main_~i~0_16, main_~max~0=v_main_~max~0_7, main_~j~0=v_main_~j~0_8} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {1099#false} is VALID [2022-04-07 16:42:03,368 INFO L290 TraceCheckUtils]: 24: Hoare triple {1099#false} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {1099#false} is VALID [2022-04-07 16:42:03,368 INFO L272 TraceCheckUtils]: 25: Hoare triple {1099#false} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {1099#false} is VALID [2022-04-07 16:42:03,368 INFO L290 TraceCheckUtils]: 26: Hoare triple {1099#false} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1099#false} is VALID [2022-04-07 16:42:03,368 INFO L290 TraceCheckUtils]: 27: Hoare triple {1099#false} [95] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1099#false} is VALID [2022-04-07 16:42:03,368 INFO L290 TraceCheckUtils]: 28: Hoare triple {1099#false} [97] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1099#false} is VALID [2022-04-07 16:42:03,369 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2022-04-07 16:42:03,369 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 16:42:03,369 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1820505293] [2022-04-07 16:42:03,369 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1820505293] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 16:42:03,369 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1038072252] [2022-04-07 16:42:03,369 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-07 16:42:03,369 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 16:42:03,369 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 16:42:03,371 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 16:42:03,372 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-04-07 16:42:03,460 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2022-04-07 16:42:03,460 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 16:42:03,461 INFO L263 TraceCheckSpWp]: Trace formula consists of 135 conjuncts, 9 conjunts are in the unsatisfiable core [2022-04-07 16:42:03,475 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 16:42:03,475 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 16:42:03,750 INFO L272 TraceCheckUtils]: 0: Hoare triple {1098#true} [70] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1098#true} is VALID [2022-04-07 16:42:03,750 INFO L290 TraceCheckUtils]: 1: Hoare triple {1098#true} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1098#true} is VALID [2022-04-07 16:42:03,750 INFO L290 TraceCheckUtils]: 2: Hoare triple {1098#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1098#true} is VALID [2022-04-07 16:42:03,751 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1098#true} {1098#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1098#true} is VALID [2022-04-07 16:42:03,751 INFO L272 TraceCheckUtils]: 4: Hoare triple {1098#true} [71] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1098#true} is VALID [2022-04-07 16:42:03,751 INFO L290 TraceCheckUtils]: 5: Hoare triple {1098#true} [74] mainENTRY-->L18-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (= 5 v_main_~max~0_1) (= v_main_~i~0_1 0) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= (let ((.cse1 (let ((.cse2 (mod v_main_~max~0_1 4294967296))) (ite (<= .cse2 2147483647) .cse2 (+ .cse2 (- 4294967296)))))) (store (store |v_#length_3| |v_main_~#str1~0.base_1| .cse1) |v_main_~#str2~0.base_1| .cse1)) |v_#length_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, main_~max~0=v_main_~max~0_1, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_1, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~#str1~0.base=|v_main_~#str1~0.base_1|, #length=|v_#length_1|} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~max~0, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, #length] {1103#(and (<= 5 main_~max~0) (<= main_~max~0 5) (= main_~i~0 0))} is VALID [2022-04-07 16:42:03,752 INFO L290 TraceCheckUtils]: 6: Hoare triple {1103#(and (<= 5 main_~max~0) (<= main_~max~0 5) (= main_~i~0 0))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {1103#(and (<= 5 main_~max~0) (<= main_~max~0 5) (= main_~i~0 0))} is VALID [2022-04-07 16:42:03,752 INFO L290 TraceCheckUtils]: 7: Hoare triple {1103#(and (<= 5 main_~max~0) (<= main_~max~0 5) (= main_~i~0 0))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {1132#(and (<= 5 main_~max~0) (<= main_~max~0 5) (= (+ (- 1) main_~i~0) 0))} is VALID [2022-04-07 16:42:03,753 INFO L290 TraceCheckUtils]: 8: Hoare triple {1132#(and (<= 5 main_~max~0) (<= main_~max~0 5) (= (+ (- 1) main_~i~0) 0))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {1132#(and (<= 5 main_~max~0) (<= main_~max~0 5) (= (+ (- 1) main_~i~0) 0))} is VALID [2022-04-07 16:42:03,753 INFO L290 TraceCheckUtils]: 9: Hoare triple {1132#(and (<= 5 main_~max~0) (<= main_~max~0 5) (= (+ (- 1) main_~i~0) 0))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {1139#(and (= (+ (- 2) main_~i~0) 0) (<= 5 main_~max~0) (<= main_~max~0 5))} is VALID [2022-04-07 16:42:03,764 INFO L290 TraceCheckUtils]: 10: Hoare triple {1139#(and (= (+ (- 2) main_~i~0) 0) (<= 5 main_~max~0) (<= main_~max~0 5))} [77] L18-3-->L18-4: Formula: (not (< (mod v_main_~i~0_5 4294967296) (mod v_main_~max~0_4 4294967296))) InVars {main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} OutVars{main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} AuxVars[] AssignedVars[] {1099#false} is VALID [2022-04-07 16:42:03,764 INFO L290 TraceCheckUtils]: 11: Hoare triple {1099#false} [79] L18-4-->L26-3: Formula: (let ((.cse0 (let ((.cse1 (mod (+ 4294967295 v_main_~max~0_6) 4294967296))) (ite (<= .cse1 2147483647) .cse1 (+ .cse1 (- 4294967296)))))) (and (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ .cse0 |v_main_~#str1~0.offset_6|) 0)) |v_#memory_int_4|) (= v_main_~j~0_5 0) (= .cse0 v_main_~i~0_11))) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|} OutVars{main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_5, main_~i~0=v_main_~i~0_11, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {1099#false} is VALID [2022-04-07 16:42:03,764 INFO L290 TraceCheckUtils]: 12: Hoare triple {1099#false} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1099#false} is VALID [2022-04-07 16:42:03,764 INFO L290 TraceCheckUtils]: 13: Hoare triple {1099#false} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1099#false} is VALID [2022-04-07 16:42:03,764 INFO L290 TraceCheckUtils]: 14: Hoare triple {1099#false} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1099#false} is VALID [2022-04-07 16:42:03,765 INFO L290 TraceCheckUtils]: 15: Hoare triple {1099#false} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1099#false} is VALID [2022-04-07 16:42:03,765 INFO L290 TraceCheckUtils]: 16: Hoare triple {1099#false} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1099#false} is VALID [2022-04-07 16:42:03,765 INFO L290 TraceCheckUtils]: 17: Hoare triple {1099#false} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1099#false} is VALID [2022-04-07 16:42:03,765 INFO L290 TraceCheckUtils]: 18: Hoare triple {1099#false} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1099#false} is VALID [2022-04-07 16:42:03,765 INFO L290 TraceCheckUtils]: 19: Hoare triple {1099#false} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1099#false} is VALID [2022-04-07 16:42:03,765 INFO L290 TraceCheckUtils]: 20: Hoare triple {1099#false} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1099#false} is VALID [2022-04-07 16:42:03,765 INFO L290 TraceCheckUtils]: 21: Hoare triple {1099#false} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1099#false} is VALID [2022-04-07 16:42:03,765 INFO L290 TraceCheckUtils]: 22: Hoare triple {1099#false} [82] L26-3-->L26-4: Formula: (not (<= 0 v_main_~i~0_12)) InVars {main_~i~0=v_main_~i~0_12} OutVars{main_~i~0=v_main_~i~0_12} AuxVars[] AssignedVars[] {1099#false} is VALID [2022-04-07 16:42:03,765 INFO L290 TraceCheckUtils]: 23: Hoare triple {1099#false} [84] L26-4-->L32-3: Formula: (and (= v_main_~j~0_8 (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_7) 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))))) (= v_main_~i~0_16 0)) InVars {main_~max~0=v_main_~max~0_7} OutVars{main_~i~0=v_main_~i~0_16, main_~max~0=v_main_~max~0_7, main_~j~0=v_main_~j~0_8} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {1099#false} is VALID [2022-04-07 16:42:03,765 INFO L290 TraceCheckUtils]: 24: Hoare triple {1099#false} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {1099#false} is VALID [2022-04-07 16:42:03,766 INFO L272 TraceCheckUtils]: 25: Hoare triple {1099#false} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {1099#false} is VALID [2022-04-07 16:42:03,766 INFO L290 TraceCheckUtils]: 26: Hoare triple {1099#false} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1099#false} is VALID [2022-04-07 16:42:03,766 INFO L290 TraceCheckUtils]: 27: Hoare triple {1099#false} [95] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1099#false} is VALID [2022-04-07 16:42:03,766 INFO L290 TraceCheckUtils]: 28: Hoare triple {1099#false} [97] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1099#false} is VALID [2022-04-07 16:42:03,766 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2022-04-07 16:42:03,766 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 16:42:03,881 INFO L290 TraceCheckUtils]: 28: Hoare triple {1099#false} [97] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1099#false} is VALID [2022-04-07 16:42:03,882 INFO L290 TraceCheckUtils]: 27: Hoare triple {1099#false} [95] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1099#false} is VALID [2022-04-07 16:42:03,882 INFO L290 TraceCheckUtils]: 26: Hoare triple {1099#false} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1099#false} is VALID [2022-04-07 16:42:03,882 INFO L272 TraceCheckUtils]: 25: Hoare triple {1099#false} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {1099#false} is VALID [2022-04-07 16:42:03,882 INFO L290 TraceCheckUtils]: 24: Hoare triple {1099#false} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {1099#false} is VALID [2022-04-07 16:42:03,882 INFO L290 TraceCheckUtils]: 23: Hoare triple {1099#false} [84] L26-4-->L32-3: Formula: (and (= v_main_~j~0_8 (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_7) 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))))) (= v_main_~i~0_16 0)) InVars {main_~max~0=v_main_~max~0_7} OutVars{main_~i~0=v_main_~i~0_16, main_~max~0=v_main_~max~0_7, main_~j~0=v_main_~j~0_8} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {1099#false} is VALID [2022-04-07 16:42:03,882 INFO L290 TraceCheckUtils]: 22: Hoare triple {1099#false} [82] L26-3-->L26-4: Formula: (not (<= 0 v_main_~i~0_12)) InVars {main_~i~0=v_main_~i~0_12} OutVars{main_~i~0=v_main_~i~0_12} AuxVars[] AssignedVars[] {1099#false} is VALID [2022-04-07 16:42:03,882 INFO L290 TraceCheckUtils]: 21: Hoare triple {1099#false} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1099#false} is VALID [2022-04-07 16:42:03,883 INFO L290 TraceCheckUtils]: 20: Hoare triple {1099#false} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1099#false} is VALID [2022-04-07 16:42:03,883 INFO L290 TraceCheckUtils]: 19: Hoare triple {1099#false} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1099#false} is VALID [2022-04-07 16:42:03,883 INFO L290 TraceCheckUtils]: 18: Hoare triple {1099#false} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1099#false} is VALID [2022-04-07 16:42:03,883 INFO L290 TraceCheckUtils]: 17: Hoare triple {1099#false} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1099#false} is VALID [2022-04-07 16:42:03,883 INFO L290 TraceCheckUtils]: 16: Hoare triple {1099#false} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1099#false} is VALID [2022-04-07 16:42:03,883 INFO L290 TraceCheckUtils]: 15: Hoare triple {1099#false} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1099#false} is VALID [2022-04-07 16:42:03,883 INFO L290 TraceCheckUtils]: 14: Hoare triple {1099#false} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1099#false} is VALID [2022-04-07 16:42:03,883 INFO L290 TraceCheckUtils]: 13: Hoare triple {1099#false} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1099#false} is VALID [2022-04-07 16:42:03,883 INFO L290 TraceCheckUtils]: 12: Hoare triple {1099#false} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1099#false} is VALID [2022-04-07 16:42:03,884 INFO L290 TraceCheckUtils]: 11: Hoare triple {1099#false} [79] L18-4-->L26-3: Formula: (let ((.cse0 (let ((.cse1 (mod (+ 4294967295 v_main_~max~0_6) 4294967296))) (ite (<= .cse1 2147483647) .cse1 (+ .cse1 (- 4294967296)))))) (and (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ .cse0 |v_main_~#str1~0.offset_6|) 0)) |v_#memory_int_4|) (= v_main_~j~0_5 0) (= .cse0 v_main_~i~0_11))) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|} OutVars{main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_5, main_~i~0=v_main_~i~0_11, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {1099#false} is VALID [2022-04-07 16:42:03,895 INFO L290 TraceCheckUtils]: 10: Hoare triple {1251#(< (mod main_~i~0 4294967296) (mod main_~max~0 4294967296))} [77] L18-3-->L18-4: Formula: (not (< (mod v_main_~i~0_5 4294967296) (mod v_main_~max~0_4 4294967296))) InVars {main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} OutVars{main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} AuxVars[] AssignedVars[] {1099#false} is VALID [2022-04-07 16:42:03,896 INFO L290 TraceCheckUtils]: 9: Hoare triple {1255#(< (mod (+ main_~i~0 1) 4294967296) (mod main_~max~0 4294967296))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {1251#(< (mod main_~i~0 4294967296) (mod main_~max~0 4294967296))} is VALID [2022-04-07 16:42:03,896 INFO L290 TraceCheckUtils]: 8: Hoare triple {1255#(< (mod (+ main_~i~0 1) 4294967296) (mod main_~max~0 4294967296))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {1255#(< (mod (+ main_~i~0 1) 4294967296) (mod main_~max~0 4294967296))} is VALID [2022-04-07 16:42:03,897 INFO L290 TraceCheckUtils]: 7: Hoare triple {1262#(< (mod (+ main_~i~0 2) 4294967296) (mod main_~max~0 4294967296))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {1255#(< (mod (+ main_~i~0 1) 4294967296) (mod main_~max~0 4294967296))} is VALID [2022-04-07 16:42:03,897 INFO L290 TraceCheckUtils]: 6: Hoare triple {1262#(< (mod (+ main_~i~0 2) 4294967296) (mod main_~max~0 4294967296))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {1262#(< (mod (+ main_~i~0 2) 4294967296) (mod main_~max~0 4294967296))} is VALID [2022-04-07 16:42:03,898 INFO L290 TraceCheckUtils]: 5: Hoare triple {1098#true} [74] mainENTRY-->L18-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (= 5 v_main_~max~0_1) (= v_main_~i~0_1 0) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= (let ((.cse1 (let ((.cse2 (mod v_main_~max~0_1 4294967296))) (ite (<= .cse2 2147483647) .cse2 (+ .cse2 (- 4294967296)))))) (store (store |v_#length_3| |v_main_~#str1~0.base_1| .cse1) |v_main_~#str2~0.base_1| .cse1)) |v_#length_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, main_~max~0=v_main_~max~0_1, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_1, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~#str1~0.base=|v_main_~#str1~0.base_1|, #length=|v_#length_1|} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~max~0, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, #length] {1262#(< (mod (+ main_~i~0 2) 4294967296) (mod main_~max~0 4294967296))} is VALID [2022-04-07 16:42:03,899 INFO L272 TraceCheckUtils]: 4: Hoare triple {1098#true} [71] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1098#true} is VALID [2022-04-07 16:42:03,899 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1098#true} {1098#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1098#true} is VALID [2022-04-07 16:42:03,899 INFO L290 TraceCheckUtils]: 2: Hoare triple {1098#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1098#true} is VALID [2022-04-07 16:42:03,899 INFO L290 TraceCheckUtils]: 1: Hoare triple {1098#true} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1098#true} is VALID [2022-04-07 16:42:03,899 INFO L272 TraceCheckUtils]: 0: Hoare triple {1098#true} [70] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1098#true} is VALID [2022-04-07 16:42:03,899 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2022-04-07 16:42:03,899 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1038072252] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 16:42:03,899 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 16:42:03,900 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 5, 5] total 12 [2022-04-07 16:42:03,900 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1825213267] [2022-04-07 16:42:03,900 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 16:42:03,900 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 2.4166666666666665) internal successors, (29), 11 states have internal predecessors, (29), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-07 16:42:03,900 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 16:42:03,901 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 12 states, 12 states have (on average 2.4166666666666665) internal successors, (29), 11 states have internal predecessors, (29), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:42:03,924 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 34 edges. 34 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 16:42:03,924 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2022-04-07 16:42:03,924 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 16:42:03,924 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2022-04-07 16:42:03,925 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=86, Unknown=0, NotChecked=0, Total=132 [2022-04-07 16:42:03,925 INFO L87 Difference]: Start difference. First operand 41 states and 45 transitions. Second operand has 12 states, 12 states have (on average 2.4166666666666665) internal successors, (29), 11 states have internal predecessors, (29), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:42:04,178 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 16:42:04,178 INFO L93 Difference]: Finished difference Result 47 states and 51 transitions. [2022-04-07 16:42:04,178 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-04-07 16:42:04,178 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 2.4166666666666665) internal successors, (29), 11 states have internal predecessors, (29), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-07 16:42:04,178 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 16:42:04,178 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 2.4166666666666665) internal successors, (29), 11 states have internal predecessors, (29), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:42:04,179 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 36 transitions. [2022-04-07 16:42:04,179 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 2.4166666666666665) internal successors, (29), 11 states have internal predecessors, (29), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:42:04,181 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 36 transitions. [2022-04-07 16:42:04,182 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 8 states and 36 transitions. [2022-04-07 16:42:04,215 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 36 edges. 36 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 16:42:04,216 INFO L225 Difference]: With dead ends: 47 [2022-04-07 16:42:04,216 INFO L226 Difference]: Without dead ends: 47 [2022-04-07 16:42:04,216 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 70 GetRequests, 54 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=88, Invalid=184, Unknown=0, NotChecked=0, Total=272 [2022-04-07 16:42:04,217 INFO L913 BasicCegarLoop]: 20 mSDtfsCounter, 26 mSDsluCounter, 22 mSDsCounter, 0 mSdLazyCounter, 92 mSolverCounterSat, 17 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 26 SdHoareTripleChecker+Valid, 42 SdHoareTripleChecker+Invalid, 109 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 17 IncrementalHoareTripleChecker+Valid, 92 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 16:42:04,217 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [26 Valid, 42 Invalid, 109 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [17 Valid, 92 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-07 16:42:04,218 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47 states. [2022-04-07 16:42:04,219 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47 to 47. [2022-04-07 16:42:04,219 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 16:42:04,220 INFO L82 GeneralOperation]: Start isEquivalent. First operand 47 states. Second operand has 47 states, 39 states have (on average 1.1282051282051282) internal successors, (44), 40 states have internal predecessors, (44), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 16:42:04,220 INFO L74 IsIncluded]: Start isIncluded. First operand 47 states. Second operand has 47 states, 39 states have (on average 1.1282051282051282) internal successors, (44), 40 states have internal predecessors, (44), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 16:42:04,220 INFO L87 Difference]: Start difference. First operand 47 states. Second operand has 47 states, 39 states have (on average 1.1282051282051282) internal successors, (44), 40 states have internal predecessors, (44), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 16:42:04,221 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 16:42:04,221 INFO L93 Difference]: Finished difference Result 47 states and 51 transitions. [2022-04-07 16:42:04,221 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 51 transitions. [2022-04-07 16:42:04,221 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 16:42:04,221 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 16:42:04,222 INFO L74 IsIncluded]: Start isIncluded. First operand has 47 states, 39 states have (on average 1.1282051282051282) internal successors, (44), 40 states have internal predecessors, (44), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) Second operand 47 states. [2022-04-07 16:42:04,222 INFO L87 Difference]: Start difference. First operand has 47 states, 39 states have (on average 1.1282051282051282) internal successors, (44), 40 states have internal predecessors, (44), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) Second operand 47 states. [2022-04-07 16:42:04,223 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 16:42:04,223 INFO L93 Difference]: Finished difference Result 47 states and 51 transitions. [2022-04-07 16:42:04,223 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 51 transitions. [2022-04-07 16:42:04,223 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 16:42:04,223 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 16:42:04,223 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 16:42:04,223 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 16:42:04,223 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 47 states, 39 states have (on average 1.1282051282051282) internal successors, (44), 40 states have internal predecessors, (44), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 16:42:04,224 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47 states to 47 states and 51 transitions. [2022-04-07 16:42:04,224 INFO L78 Accepts]: Start accepts. Automaton has 47 states and 51 transitions. Word has length 29 [2022-04-07 16:42:04,225 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 16:42:04,225 INFO L478 AbstractCegarLoop]: Abstraction has 47 states and 51 transitions. [2022-04-07 16:42:04,225 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 12 states have (on average 2.4166666666666665) internal successors, (29), 11 states have internal predecessors, (29), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:42:04,225 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 51 transitions. [2022-04-07 16:42:04,225 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2022-04-07 16:42:04,225 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 16:42:04,225 INFO L499 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 16:42:04,244 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-04-07 16:42:04,439 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 16:42:04,439 INFO L403 AbstractCegarLoop]: === Iteration 7 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 16:42:04,440 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 16:42:04,440 INFO L85 PathProgramCache]: Analyzing trace with hash -1457388698, now seen corresponding path program 4 times [2022-04-07 16:42:04,440 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 16:42:04,440 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1501820602] [2022-04-07 16:42:04,440 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 16:42:04,440 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 16:42:04,498 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 16:42:05,343 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 16:42:05,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 16:42:05,348 INFO L290 TraceCheckUtils]: 0: Hoare triple {1507#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1484#true} is VALID [2022-04-07 16:42:05,348 INFO L290 TraceCheckUtils]: 1: Hoare triple {1484#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1484#true} is VALID [2022-04-07 16:42:05,348 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1484#true} {1484#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1484#true} is VALID [2022-04-07 16:42:05,349 INFO L272 TraceCheckUtils]: 0: Hoare triple {1484#true} [70] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1507#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 16:42:05,349 INFO L290 TraceCheckUtils]: 1: Hoare triple {1507#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1484#true} is VALID [2022-04-07 16:42:05,349 INFO L290 TraceCheckUtils]: 2: Hoare triple {1484#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1484#true} is VALID [2022-04-07 16:42:05,349 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1484#true} {1484#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1484#true} is VALID [2022-04-07 16:42:05,349 INFO L272 TraceCheckUtils]: 4: Hoare triple {1484#true} [71] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1484#true} is VALID [2022-04-07 16:42:05,350 INFO L290 TraceCheckUtils]: 5: Hoare triple {1484#true} [74] mainENTRY-->L18-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (= 5 v_main_~max~0_1) (= v_main_~i~0_1 0) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= (let ((.cse1 (let ((.cse2 (mod v_main_~max~0_1 4294967296))) (ite (<= .cse2 2147483647) .cse2 (+ .cse2 (- 4294967296)))))) (store (store |v_#length_3| |v_main_~#str1~0.base_1| .cse1) |v_main_~#str2~0.base_1| .cse1)) |v_#length_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, main_~max~0=v_main_~max~0_1, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_1, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~#str1~0.base=|v_main_~#str1~0.base_1|, #length=|v_#length_1|} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~max~0, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, #length] {1489#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:42:05,350 INFO L290 TraceCheckUtils]: 6: Hoare triple {1489#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {1489#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:42:05,351 INFO L290 TraceCheckUtils]: 7: Hoare triple {1489#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {1490#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (<= main_~i~0 1) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 1 main_~i~0))} is VALID [2022-04-07 16:42:05,351 INFO L290 TraceCheckUtils]: 8: Hoare triple {1490#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (<= main_~i~0 1) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 1 main_~i~0))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {1490#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (<= main_~i~0 1) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 1 main_~i~0))} is VALID [2022-04-07 16:42:05,352 INFO L290 TraceCheckUtils]: 9: Hoare triple {1490#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (<= main_~i~0 1) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 1 main_~i~0))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {1491#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~i~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~i~0 2))} is VALID [2022-04-07 16:42:05,352 INFO L290 TraceCheckUtils]: 10: Hoare triple {1491#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~i~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~i~0 2))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {1491#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~i~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~i~0 2))} is VALID [2022-04-07 16:42:05,353 INFO L290 TraceCheckUtils]: 11: Hoare triple {1491#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~i~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~i~0 2))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {1492#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 16:42:05,353 INFO L290 TraceCheckUtils]: 12: Hoare triple {1492#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 3 main_~i~0) (<= main_~i~0 3))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {1492#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 16:42:05,354 INFO L290 TraceCheckUtils]: 13: Hoare triple {1492#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 3 main_~i~0) (<= main_~i~0 3))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {1493#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (<= main_~i~0 4) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 4 main_~i~0))} is VALID [2022-04-07 16:42:05,354 INFO L290 TraceCheckUtils]: 14: Hoare triple {1493#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (<= main_~i~0 4) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 4 main_~i~0))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {1493#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (<= main_~i~0 4) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 4 main_~i~0))} is VALID [2022-04-07 16:42:05,355 INFO L290 TraceCheckUtils]: 15: Hoare triple {1493#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (<= main_~i~0 4) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 4 main_~i~0))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {1494#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:42:05,355 INFO L290 TraceCheckUtils]: 16: Hoare triple {1494#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [77] L18-3-->L18-4: Formula: (not (< (mod v_main_~i~0_5 4294967296) (mod v_main_~max~0_4 4294967296))) InVars {main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} OutVars{main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} AuxVars[] AssignedVars[] {1494#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:42:05,356 INFO L290 TraceCheckUtils]: 17: Hoare triple {1494#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [79] L18-4-->L26-3: Formula: (let ((.cse0 (let ((.cse1 (mod (+ 4294967295 v_main_~max~0_6) 4294967296))) (ite (<= .cse1 2147483647) .cse1 (+ .cse1 (- 4294967296)))))) (and (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ .cse0 |v_main_~#str1~0.offset_6|) 0)) |v_#memory_int_4|) (= v_main_~j~0_5 0) (= .cse0 v_main_~i~0_11))) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|} OutVars{main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_5, main_~i~0=v_main_~i~0_11, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {1495#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (= main_~j~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (- 1) (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0) 0)) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295) 0))))} is VALID [2022-04-07 16:42:05,357 INFO L290 TraceCheckUtils]: 18: Hoare triple {1495#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (= main_~j~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (- 1) (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0) 0)) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295) 0))))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1496#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ main_~j~0 3 |main_~#str1~0.offset|) (+ |main_~#str1~0.offset| 4)) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (- 1) (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0) 0)) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295) 0))))} is VALID [2022-04-07 16:42:05,358 INFO L290 TraceCheckUtils]: 19: Hoare triple {1496#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ main_~j~0 3 |main_~#str1~0.offset|) (+ |main_~#str1~0.offset| 4)) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (- 1) (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0) 0)) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295) 0))))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1497#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (or (and (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 2 |main_~#str1~0.offset|) (+ main_~j~0 3 |main_~#str1~0.offset|)) (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (and (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 |main_~#str1~0.offset| 4294967298) (+ main_~j~0 3 |main_~#str1~0.offset|)) (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:42:05,359 INFO L290 TraceCheckUtils]: 20: Hoare triple {1497#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (or (and (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 2 |main_~#str1~0.offset|) (+ main_~j~0 3 |main_~#str1~0.offset|)) (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (and (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 |main_~#str1~0.offset| 4294967298) (+ main_~j~0 3 |main_~#str1~0.offset|)) (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1498#(and (= |main_~#str2~0.offset| 0) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 2 |main_~#str1~0.offset|) (+ main_~j~0 2 |main_~#str1~0.offset|))) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 |main_~#str1~0.offset| 4294967298) (+ main_~j~0 2 |main_~#str1~0.offset|)))) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:42:05,361 INFO L290 TraceCheckUtils]: 21: Hoare triple {1498#(and (= |main_~#str2~0.offset| 0) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 2 |main_~#str1~0.offset|) (+ main_~j~0 2 |main_~#str1~0.offset|))) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 |main_~#str1~0.offset| 4294967298) (+ main_~j~0 2 |main_~#str1~0.offset|)))) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1497#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (or (and (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 2 |main_~#str1~0.offset|) (+ main_~j~0 3 |main_~#str1~0.offset|)) (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (and (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 |main_~#str1~0.offset| 4294967298) (+ main_~j~0 3 |main_~#str1~0.offset|)) (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:42:05,362 INFO L290 TraceCheckUtils]: 22: Hoare triple {1497#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (or (and (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 2 |main_~#str1~0.offset|) (+ main_~j~0 3 |main_~#str1~0.offset|)) (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (and (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 |main_~#str1~0.offset| 4294967298) (+ main_~j~0 3 |main_~#str1~0.offset|)) (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1498#(and (= |main_~#str2~0.offset| 0) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 2 |main_~#str1~0.offset|) (+ main_~j~0 2 |main_~#str1~0.offset|))) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 |main_~#str1~0.offset| 4294967298) (+ main_~j~0 2 |main_~#str1~0.offset|)))) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:42:05,363 INFO L290 TraceCheckUtils]: 23: Hoare triple {1498#(and (= |main_~#str2~0.offset| 0) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 2 |main_~#str1~0.offset|) (+ main_~j~0 2 |main_~#str1~0.offset|))) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 |main_~#str1~0.offset| 4294967298) (+ main_~j~0 2 |main_~#str1~0.offset|)))) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1497#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (or (and (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 2 |main_~#str1~0.offset|) (+ main_~j~0 3 |main_~#str1~0.offset|)) (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (and (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 |main_~#str1~0.offset| 4294967298) (+ main_~j~0 3 |main_~#str1~0.offset|)) (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:42:05,364 INFO L290 TraceCheckUtils]: 24: Hoare triple {1497#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (or (and (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 2 |main_~#str1~0.offset|) (+ main_~j~0 3 |main_~#str1~0.offset|)) (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (and (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 |main_~#str1~0.offset| 4294967298) (+ main_~j~0 3 |main_~#str1~0.offset|)) (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1498#(and (= |main_~#str2~0.offset| 0) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 2 |main_~#str1~0.offset|) (+ main_~j~0 2 |main_~#str1~0.offset|))) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 |main_~#str1~0.offset| 4294967298) (+ main_~j~0 2 |main_~#str1~0.offset|)))) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:42:05,365 INFO L290 TraceCheckUtils]: 25: Hoare triple {1498#(and (= |main_~#str2~0.offset| 0) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 2 |main_~#str1~0.offset|) (+ main_~j~0 2 |main_~#str1~0.offset|))) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 |main_~#str1~0.offset| 4294967298) (+ main_~j~0 2 |main_~#str1~0.offset|)))) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1499#(and (= |main_~#str2~0.offset| 0) (or (not (= (+ main_~i~0 |main_~#str1~0.offset|) 0)) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ main_~j~0 |main_~#str2~0.offset|) (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295 |main_~#str1~0.offset|))) (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ main_~j~0 |main_~#str2~0.offset|) (+ (- 1) (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 |main_~#str1~0.offset|)))) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:42:05,366 INFO L290 TraceCheckUtils]: 26: Hoare triple {1499#(and (= |main_~#str2~0.offset| 0) (or (not (= (+ main_~i~0 |main_~#str1~0.offset|) 0)) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ main_~j~0 |main_~#str2~0.offset|) (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295 |main_~#str1~0.offset|))) (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ main_~j~0 |main_~#str2~0.offset|) (+ (- 1) (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 |main_~#str1~0.offset|)))) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1500#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (or (and (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295 |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))) (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (not (= (+ main_~i~0 |main_~#str1~0.offset|) 0)) (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))))) (<= 0 main_~i~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:42:05,367 INFO L290 TraceCheckUtils]: 27: Hoare triple {1500#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (or (and (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295 |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))) (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (not (= (+ main_~i~0 |main_~#str1~0.offset|) 0)) (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))))) (<= 0 main_~i~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1501#(and (= |main_~#str2~0.offset| 0) (or (<= 0 (+ main_~i~0 |main_~#str1~0.offset|)) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (select (select |#memory_int| |main_~#str1~0.base|) 0) (select (select |#memory_int| |main_~#str2~0.base|) (+ (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295 |main_~#str1~0.offset|)))) (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (select (select |#memory_int| |main_~#str1~0.base|) 0) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 |main_~#str1~0.offset|))))) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 0 (+ main_~i~0 1)))} is VALID [2022-04-07 16:42:05,368 INFO L290 TraceCheckUtils]: 28: Hoare triple {1501#(and (= |main_~#str2~0.offset| 0) (or (<= 0 (+ main_~i~0 |main_~#str1~0.offset|)) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (select (select |#memory_int| |main_~#str1~0.base|) 0) (select (select |#memory_int| |main_~#str2~0.base|) (+ (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295 |main_~#str1~0.offset|)))) (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (select (select |#memory_int| |main_~#str1~0.base|) 0) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 |main_~#str1~0.offset|))))) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 0 (+ main_~i~0 1)))} [82] L26-3-->L26-4: Formula: (not (<= 0 v_main_~i~0_12)) InVars {main_~i~0=v_main_~i~0_12} OutVars{main_~i~0=v_main_~i~0_12} AuxVars[] AssignedVars[] {1502#(and (= |main_~#str2~0.offset| 0) (or (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (select (select |#memory_int| |main_~#str1~0.base|) 0) (select (select |#memory_int| |main_~#str2~0.base|) (+ (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295 |main_~#str1~0.offset|)))) (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (select (select |#memory_int| |main_~#str1~0.base|) 0) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 |main_~#str1~0.offset|))))) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:42:05,369 INFO L290 TraceCheckUtils]: 29: Hoare triple {1502#(and (= |main_~#str2~0.offset| 0) (or (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (select (select |#memory_int| |main_~#str1~0.base|) 0) (select (select |#memory_int| |main_~#str2~0.base|) (+ (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295 |main_~#str1~0.offset|)))) (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (select (select |#memory_int| |main_~#str1~0.base|) 0) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 |main_~#str1~0.offset|))))) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [84] L26-4-->L32-3: Formula: (and (= v_main_~j~0_8 (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_7) 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))))) (= v_main_~i~0_16 0)) InVars {main_~max~0=v_main_~max~0_7} OutVars{main_~i~0=v_main_~i~0_16, main_~max~0=v_main_~max~0_7, main_~j~0=v_main_~j~0_8} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {1503#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))) (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:42:05,369 INFO L290 TraceCheckUtils]: 30: Hoare triple {1503#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))) (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {1504#(= |main_#t~mem11| |main_#t~mem10|)} is VALID [2022-04-07 16:42:05,370 INFO L272 TraceCheckUtils]: 31: Hoare triple {1504#(= |main_#t~mem11| |main_#t~mem10|)} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {1505#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 16:42:05,370 INFO L290 TraceCheckUtils]: 32: Hoare triple {1505#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1506#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 16:42:05,371 INFO L290 TraceCheckUtils]: 33: Hoare triple {1506#(not (= __VERIFIER_assert_~cond 0))} [95] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1485#false} is VALID [2022-04-07 16:42:05,371 INFO L290 TraceCheckUtils]: 34: Hoare triple {1485#false} [97] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1485#false} is VALID [2022-04-07 16:42:05,371 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 0 proven. 44 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-04-07 16:42:05,371 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 16:42:05,381 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1501820602] [2022-04-07 16:42:05,381 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1501820602] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 16:42:05,381 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2107905431] [2022-04-07 16:42:05,381 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-07 16:42:05,381 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 16:42:05,381 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 16:42:05,382 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 16:42:05,386 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-04-07 16:42:05,453 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-07 16:42:05,453 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 16:42:05,455 INFO L263 TraceCheckSpWp]: Trace formula consists of 189 conjuncts, 47 conjunts are in the unsatisfiable core [2022-04-07 16:42:05,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 16:42:05,467 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 16:42:05,483 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 8 [2022-04-07 16:42:06,042 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 19 [2022-04-07 16:42:07,862 INFO L173 IndexEqualityManager]: detected equality via solver [2022-04-07 16:42:07,868 INFO L356 Elim1Store]: treesize reduction 15, result has 16.7 percent of original size [2022-04-07 16:42:07,868 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 1 disjoint index pairs (out of 6 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 13 [2022-04-07 16:42:08,326 INFO L272 TraceCheckUtils]: 0: Hoare triple {1484#true} [70] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1484#true} is VALID [2022-04-07 16:42:08,327 INFO L290 TraceCheckUtils]: 1: Hoare triple {1484#true} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1484#true} is VALID [2022-04-07 16:42:08,327 INFO L290 TraceCheckUtils]: 2: Hoare triple {1484#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1484#true} is VALID [2022-04-07 16:42:08,327 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1484#true} {1484#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1484#true} is VALID [2022-04-07 16:42:08,327 INFO L272 TraceCheckUtils]: 4: Hoare triple {1484#true} [71] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1484#true} is VALID [2022-04-07 16:42:08,340 INFO L290 TraceCheckUtils]: 5: Hoare triple {1484#true} [74] mainENTRY-->L18-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (= 5 v_main_~max~0_1) (= v_main_~i~0_1 0) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= (let ((.cse1 (let ((.cse2 (mod v_main_~max~0_1 4294967296))) (ite (<= .cse2 2147483647) .cse2 (+ .cse2 (- 4294967296)))))) (store (store |v_#length_3| |v_main_~#str1~0.base_1| .cse1) |v_main_~#str2~0.base_1| .cse1)) |v_#length_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, main_~max~0=v_main_~max~0_1, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_1, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~#str1~0.base=|v_main_~#str1~0.base_1|, #length=|v_#length_1|} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~max~0, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, #length] {1526#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:42:08,340 INFO L290 TraceCheckUtils]: 6: Hoare triple {1526#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {1526#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:42:08,341 INFO L290 TraceCheckUtils]: 7: Hoare triple {1526#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {1526#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:42:08,341 INFO L290 TraceCheckUtils]: 8: Hoare triple {1526#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {1526#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:42:08,342 INFO L290 TraceCheckUtils]: 9: Hoare triple {1526#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {1526#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:42:08,342 INFO L290 TraceCheckUtils]: 10: Hoare triple {1526#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {1526#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:42:08,343 INFO L290 TraceCheckUtils]: 11: Hoare triple {1526#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {1526#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:42:08,343 INFO L290 TraceCheckUtils]: 12: Hoare triple {1526#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {1526#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:42:08,344 INFO L290 TraceCheckUtils]: 13: Hoare triple {1526#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {1526#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:42:08,344 INFO L290 TraceCheckUtils]: 14: Hoare triple {1526#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {1526#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:42:08,345 INFO L290 TraceCheckUtils]: 15: Hoare triple {1526#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {1526#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:42:08,345 INFO L290 TraceCheckUtils]: 16: Hoare triple {1526#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [77] L18-3-->L18-4: Formula: (not (< (mod v_main_~i~0_5 4294967296) (mod v_main_~max~0_4 4294967296))) InVars {main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} OutVars{main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} AuxVars[] AssignedVars[] {1526#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:42:08,346 INFO L290 TraceCheckUtils]: 17: Hoare triple {1526#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [79] L18-4-->L26-3: Formula: (let ((.cse0 (let ((.cse1 (mod (+ 4294967295 v_main_~max~0_6) 4294967296))) (ite (<= .cse1 2147483647) .cse1 (+ .cse1 (- 4294967296)))))) (and (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ .cse0 |v_main_~#str1~0.offset_6|) 0)) |v_#memory_int_4|) (= v_main_~j~0_5 0) (= .cse0 v_main_~i~0_11))) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|} OutVars{main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_5, main_~i~0=v_main_~i~0_11, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {1563#(and (= |main_~#str1~0.offset| 0) (= main_~j~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~i~0)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= main_~i~0 (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} is VALID [2022-04-07 16:42:08,350 INFO L290 TraceCheckUtils]: 18: Hoare triple {1563#(and (= |main_~#str1~0.offset| 0) (= main_~j~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~i~0)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= main_~i~0 (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1567#(and (= (+ (- 1) main_~j~0) 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~i~0)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= main_~i~0 (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} is VALID [2022-04-07 16:42:08,351 INFO L290 TraceCheckUtils]: 19: Hoare triple {1567#(and (= (+ (- 1) main_~j~0) 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~i~0)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= main_~i~0 (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1571#(and (or (and (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 1)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) (+ main_~i~0 1)))) (= (+ (- 1) main_~j~0) 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:42:08,352 INFO L290 TraceCheckUtils]: 20: Hoare triple {1571#(and (or (and (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 1)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) (+ main_~i~0 1)))) (= (+ (- 1) main_~j~0) 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1575#(and (= (+ (- 2) main_~j~0) 0) (or (and (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 1)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) (+ main_~i~0 1)))) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:42:08,353 INFO L290 TraceCheckUtils]: 21: Hoare triple {1575#(and (= (+ (- 2) main_~j~0) 0) (or (and (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 1)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) (+ main_~i~0 1)))) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1579#(and (= (+ (- 2) main_~j~0) 0) (or (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ main_~i~0 2) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)))) (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 2)))) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:42:08,353 INFO L290 TraceCheckUtils]: 22: Hoare triple {1579#(and (= (+ (- 2) main_~j~0) 0) (or (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ main_~i~0 2) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)))) (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 2)))) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1583#(and (= (+ main_~j~0 (- 3)) 0) (or (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ main_~i~0 2) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)))) (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 2)))) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:42:08,354 INFO L290 TraceCheckUtils]: 23: Hoare triple {1583#(and (= (+ main_~j~0 (- 3)) 0) (or (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ main_~i~0 2) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)))) (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 2)))) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1587#(and (= (+ main_~j~0 (- 3)) 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 3))) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ main_~i~0 3) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} is VALID [2022-04-07 16:42:08,355 INFO L290 TraceCheckUtils]: 24: Hoare triple {1587#(and (= (+ main_~j~0 (- 3)) 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 3))) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ main_~i~0 3) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1591#(and (= |main_~#str1~0.offset| 0) (= main_~j~0 4) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 3))) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ main_~i~0 3) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} is VALID [2022-04-07 16:42:08,356 INFO L290 TraceCheckUtils]: 25: Hoare triple {1591#(and (= |main_~#str1~0.offset| 0) (= main_~j~0 4) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 3))) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ main_~i~0 3) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1595#(and (= |main_~#str1~0.offset| 0) (= main_~j~0 4) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (+ main_~i~0 4) (mod (+ main_~max~0 4294967295) 4294967296))) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ main_~i~0 4) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:42:08,357 INFO L290 TraceCheckUtils]: 26: Hoare triple {1595#(and (= |main_~#str1~0.offset| 0) (= main_~j~0 4) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (+ main_~i~0 4) (mod (+ main_~max~0 4294967295) 4294967296))) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ main_~i~0 4) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1599#(and (= (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= |main_~#str1~0.offset| 0) (<= 0 main_~i~0) (= (+ main_~i~0 4) (mod (+ main_~max~0 4294967295) 4294967296)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:42:08,357 INFO L290 TraceCheckUtils]: 27: Hoare triple {1599#(and (= (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= |main_~#str1~0.offset| 0) (<= 0 main_~i~0) (= (+ main_~i~0 4) (mod (+ main_~max~0 4294967295) 4294967296)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1603#(and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4))) (= (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4)) (+ main_~i~0 1)) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 4 (mod (+ main_~max~0 4294967295) 4294967296)))} is VALID [2022-04-07 16:42:08,358 INFO L290 TraceCheckUtils]: 28: Hoare triple {1603#(and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4))) (= (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4)) (+ main_~i~0 1)) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 4 (mod (+ main_~max~0 4294967295) 4294967296)))} [82] L26-3-->L26-4: Formula: (not (<= 0 v_main_~i~0_12)) InVars {main_~i~0=v_main_~i~0_12} OutVars{main_~i~0=v_main_~i~0_12} AuxVars[] AssignedVars[] {1607#(and (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4))) (= |main_~#str1~0.offset| 0) (< (mod (+ main_~max~0 4294967295) 4294967296) 5) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 4 (mod (+ main_~max~0 4294967295) 4294967296)))} is VALID [2022-04-07 16:42:08,360 INFO L290 TraceCheckUtils]: 29: Hoare triple {1607#(and (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4))) (= |main_~#str1~0.offset| 0) (< (mod (+ main_~max~0 4294967295) 4294967296) 5) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 4 (mod (+ main_~max~0 4294967295) 4294967296)))} [84] L26-4-->L32-3: Formula: (and (= v_main_~j~0_8 (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_7) 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))))) (= v_main_~i~0_16 0)) InVars {main_~max~0=v_main_~max~0_7} OutVars{main_~i~0=v_main_~i~0_16, main_~max~0=v_main_~max~0_7, main_~j~0=v_main_~j~0_8} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {1611#(and (< (div main_~j~0 (- 4294967296)) (+ (div (+ (* (- 1) main_~j~0) 4) 4294967296) 1)) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< main_~j~0 4294967296) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4)) (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod main_~j~0 4294967296) (- 4) |main_~#str1~0.offset|))) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (< (div (+ main_~j~0 (- 4)) (- 4294967296)) (+ (div (+ 4294967295 (* (- 1) main_~j~0)) 4294967296) 1)))} is VALID [2022-04-07 16:42:08,362 INFO L290 TraceCheckUtils]: 30: Hoare triple {1611#(and (< (div main_~j~0 (- 4294967296)) (+ (div (+ (* (- 1) main_~j~0) 4) 4294967296) 1)) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< main_~j~0 4294967296) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4)) (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod main_~j~0 4294967296) (- 4) |main_~#str1~0.offset|))) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (< (div (+ main_~j~0 (- 4)) (- 4294967296)) (+ (div (+ 4294967295 (* (- 1) main_~j~0)) 4294967296) 1)))} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {1504#(= |main_#t~mem11| |main_#t~mem10|)} is VALID [2022-04-07 16:42:08,362 INFO L272 TraceCheckUtils]: 31: Hoare triple {1504#(= |main_#t~mem11| |main_#t~mem10|)} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {1618#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 16:42:08,363 INFO L290 TraceCheckUtils]: 32: Hoare triple {1618#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1622#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 16:42:08,363 INFO L290 TraceCheckUtils]: 33: Hoare triple {1622#(<= 1 __VERIFIER_assert_~cond)} [95] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1485#false} is VALID [2022-04-07 16:42:08,363 INFO L290 TraceCheckUtils]: 34: Hoare triple {1485#false} [97] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1485#false} is VALID [2022-04-07 16:42:08,364 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2022-04-07 16:42:08,364 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 16:42:08,671 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-04-07 16:42:08,671 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 80 treesize of output 76 [2022-04-07 16:42:08,751 INFO L356 Elim1Store]: treesize reduction 27, result has 34.1 percent of original size [2022-04-07 16:42:08,751 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 48 treesize of output 45 [2022-04-07 16:42:08,780 INFO L356 Elim1Store]: treesize reduction 9, result has 10.0 percent of original size [2022-04-07 16:42:08,780 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 22 treesize of output 1 [2022-04-07 16:42:08,806 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-04-07 16:42:08,806 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 82 treesize of output 78 [2022-04-07 16:42:08,897 INFO L356 Elim1Store]: treesize reduction 5, result has 70.6 percent of original size [2022-04-07 16:42:08,897 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 43 treesize of output 42 [2022-04-07 16:42:08,916 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 17 [2022-04-07 16:42:08,925 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 30 [2022-04-07 16:42:09,606 INFO L290 TraceCheckUtils]: 34: Hoare triple {1485#false} [97] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1485#false} is VALID [2022-04-07 16:42:09,607 INFO L290 TraceCheckUtils]: 33: Hoare triple {1622#(<= 1 __VERIFIER_assert_~cond)} [95] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1485#false} is VALID [2022-04-07 16:42:09,607 INFO L290 TraceCheckUtils]: 32: Hoare triple {1618#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1622#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 16:42:09,607 INFO L272 TraceCheckUtils]: 31: Hoare triple {1504#(= |main_#t~mem11| |main_#t~mem10|)} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {1618#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 16:42:09,608 INFO L290 TraceCheckUtils]: 30: Hoare triple {1641#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|)))} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {1504#(= |main_#t~mem11| |main_#t~mem10|)} is VALID [2022-04-07 16:42:09,609 INFO L290 TraceCheckUtils]: 29: Hoare triple {1645#(and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967296))) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))))} [84] L26-4-->L32-3: Formula: (and (= v_main_~j~0_8 (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_7) 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))))) (= v_main_~i~0_16 0)) InVars {main_~max~0=v_main_~max~0_7} OutVars{main_~i~0=v_main_~i~0_16, main_~max~0=v_main_~max~0_7, main_~j~0=v_main_~j~0_8} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {1641#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|)))} is VALID [2022-04-07 16:42:09,610 INFO L290 TraceCheckUtils]: 28: Hoare triple {1649#(or (and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967296))) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)))) (<= 0 main_~i~0))} [82] L26-3-->L26-4: Formula: (not (<= 0 v_main_~i~0_12)) InVars {main_~i~0=v_main_~i~0_12} OutVars{main_~i~0=v_main_~i~0_12} AuxVars[] AssignedVars[] {1645#(and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967296))) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))))} is VALID [2022-04-07 16:42:09,610 INFO L290 TraceCheckUtils]: 27: Hoare triple {1653#(or (and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967296))) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)))) (<= 1 main_~i~0))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1649#(or (and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967296))) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)))) (<= 0 main_~i~0))} is VALID [2022-04-07 16:42:09,612 INFO L290 TraceCheckUtils]: 26: Hoare triple {1657#(or (not (<= 0 main_~i~0)) (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~j~0)) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967296)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647))) (<= 1 main_~i~0))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1653#(or (and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967296))) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)))) (<= 1 main_~i~0))} is VALID [2022-04-07 16:42:09,612 INFO L290 TraceCheckUtils]: 25: Hoare triple {1661#(or (<= 2 main_~i~0) (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~j~0)) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967296)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647))) (not (<= 1 main_~i~0)))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1657#(or (not (<= 0 main_~i~0)) (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~j~0)) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967296)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647))) (<= 1 main_~i~0))} is VALID [2022-04-07 16:42:09,613 INFO L290 TraceCheckUtils]: 24: Hoare triple {1665#(or (<= 2 main_~i~0) (and (or (= (+ main_~j~0 4294967297) (mod (+ main_~max~0 4294967295) 4294967296)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 1)))) (not (<= 1 main_~i~0)))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1661#(or (<= 2 main_~i~0) (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~j~0)) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967296)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647))) (not (<= 1 main_~i~0)))} is VALID [2022-04-07 16:42:09,614 INFO L290 TraceCheckUtils]: 23: Hoare triple {1669#(or (not (<= 2 main_~i~0)) (and (or (= (+ main_~j~0 4294967297) (mod (+ main_~max~0 4294967295) 4294967296)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 1)))) (<= 3 main_~i~0))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1665#(or (<= 2 main_~i~0) (and (or (= (+ main_~j~0 4294967297) (mod (+ main_~max~0 4294967295) 4294967296)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 1)))) (not (<= 1 main_~i~0)))} is VALID [2022-04-07 16:42:09,615 INFO L290 TraceCheckUtils]: 22: Hoare triple {1673#(or (not (<= 2 main_~i~0)) (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 2))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967298)))) (<= 3 main_~i~0))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1669#(or (not (<= 2 main_~i~0)) (and (or (= (+ main_~j~0 4294967297) (mod (+ main_~max~0 4294967295) 4294967296)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 1)))) (<= 3 main_~i~0))} is VALID [2022-04-07 16:42:09,616 INFO L290 TraceCheckUtils]: 21: Hoare triple {1677#(or (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 2))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967298)))) (not (<= 3 main_~i~0)) (<= 4 main_~i~0))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1673#(or (not (<= 2 main_~i~0)) (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 2))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967298)))) (<= 3 main_~i~0))} is VALID [2022-04-07 16:42:09,617 INFO L290 TraceCheckUtils]: 20: Hoare triple {1681#(or (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 3))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967299)))) (not (<= 3 main_~i~0)) (<= 4 main_~i~0))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1677#(or (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 2))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967298)))) (not (<= 3 main_~i~0)) (<= 4 main_~i~0))} is VALID [2022-04-07 16:42:09,617 INFO L290 TraceCheckUtils]: 19: Hoare triple {1685#(or (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 3))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967299)))) (not (<= 4 main_~i~0)) (<= 5 main_~i~0))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1681#(or (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 3))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967299)))) (not (<= 3 main_~i~0)) (<= 4 main_~i~0))} is VALID [2022-04-07 16:42:09,618 INFO L290 TraceCheckUtils]: 18: Hoare triple {1689#(or (not (<= 4 main_~i~0)) (and (or (= (+ main_~j~0 4294967300) (mod (+ main_~max~0 4294967295) 4294967296)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4)))) (<= 5 main_~i~0))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1685#(or (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 3))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967299)))) (not (<= 4 main_~i~0)) (<= 5 main_~i~0))} is VALID [2022-04-07 16:42:09,619 INFO L290 TraceCheckUtils]: 17: Hoare triple {1484#true} [79] L18-4-->L26-3: Formula: (let ((.cse0 (let ((.cse1 (mod (+ 4294967295 v_main_~max~0_6) 4294967296))) (ite (<= .cse1 2147483647) .cse1 (+ .cse1 (- 4294967296)))))) (and (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ .cse0 |v_main_~#str1~0.offset_6|) 0)) |v_#memory_int_4|) (= v_main_~j~0_5 0) (= .cse0 v_main_~i~0_11))) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|} OutVars{main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_5, main_~i~0=v_main_~i~0_11, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {1689#(or (not (<= 4 main_~i~0)) (and (or (= (+ main_~j~0 4294967300) (mod (+ main_~max~0 4294967295) 4294967296)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4)))) (<= 5 main_~i~0))} is VALID [2022-04-07 16:42:09,619 INFO L290 TraceCheckUtils]: 16: Hoare triple {1484#true} [77] L18-3-->L18-4: Formula: (not (< (mod v_main_~i~0_5 4294967296) (mod v_main_~max~0_4 4294967296))) InVars {main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} OutVars{main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} AuxVars[] AssignedVars[] {1484#true} is VALID [2022-04-07 16:42:09,619 INFO L290 TraceCheckUtils]: 15: Hoare triple {1484#true} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {1484#true} is VALID [2022-04-07 16:42:09,620 INFO L290 TraceCheckUtils]: 14: Hoare triple {1484#true} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {1484#true} is VALID [2022-04-07 16:42:09,620 INFO L290 TraceCheckUtils]: 13: Hoare triple {1484#true} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {1484#true} is VALID [2022-04-07 16:42:09,620 INFO L290 TraceCheckUtils]: 12: Hoare triple {1484#true} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {1484#true} is VALID [2022-04-07 16:42:09,620 INFO L290 TraceCheckUtils]: 11: Hoare triple {1484#true} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {1484#true} is VALID [2022-04-07 16:42:09,620 INFO L290 TraceCheckUtils]: 10: Hoare triple {1484#true} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {1484#true} is VALID [2022-04-07 16:42:09,620 INFO L290 TraceCheckUtils]: 9: Hoare triple {1484#true} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {1484#true} is VALID [2022-04-07 16:42:09,620 INFO L290 TraceCheckUtils]: 8: Hoare triple {1484#true} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {1484#true} is VALID [2022-04-07 16:42:09,620 INFO L290 TraceCheckUtils]: 7: Hoare triple {1484#true} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {1484#true} is VALID [2022-04-07 16:42:09,620 INFO L290 TraceCheckUtils]: 6: Hoare triple {1484#true} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {1484#true} is VALID [2022-04-07 16:42:09,620 INFO L290 TraceCheckUtils]: 5: Hoare triple {1484#true} [74] mainENTRY-->L18-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (= 5 v_main_~max~0_1) (= v_main_~i~0_1 0) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= (let ((.cse1 (let ((.cse2 (mod v_main_~max~0_1 4294967296))) (ite (<= .cse2 2147483647) .cse2 (+ .cse2 (- 4294967296)))))) (store (store |v_#length_3| |v_main_~#str1~0.base_1| .cse1) |v_main_~#str2~0.base_1| .cse1)) |v_#length_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, main_~max~0=v_main_~max~0_1, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_1, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~#str1~0.base=|v_main_~#str1~0.base_1|, #length=|v_#length_1|} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~max~0, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, #length] {1484#true} is VALID [2022-04-07 16:42:09,621 INFO L272 TraceCheckUtils]: 4: Hoare triple {1484#true} [71] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1484#true} is VALID [2022-04-07 16:42:09,621 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1484#true} {1484#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1484#true} is VALID [2022-04-07 16:42:09,621 INFO L290 TraceCheckUtils]: 2: Hoare triple {1484#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1484#true} is VALID [2022-04-07 16:42:09,621 INFO L290 TraceCheckUtils]: 1: Hoare triple {1484#true} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1484#true} is VALID [2022-04-07 16:42:09,621 INFO L272 TraceCheckUtils]: 0: Hoare triple {1484#true} [70] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1484#true} is VALID [2022-04-07 16:42:09,621 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2022-04-07 16:42:09,621 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2107905431] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 16:42:09,621 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 16:42:09,622 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 19, 18] total 50 [2022-04-07 16:42:09,622 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2108296266] [2022-04-07 16:42:09,622 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 16:42:09,622 INFO L78 Accepts]: Start accepts. Automaton has has 50 states, 49 states have (on average 1.3673469387755102) internal successors, (67), 47 states have internal predecessors, (67), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 35 [2022-04-07 16:42:09,623 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 16:42:09,624 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 50 states, 49 states have (on average 1.3673469387755102) internal successors, (67), 47 states have internal predecessors, (67), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:42:09,705 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 73 edges. 73 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 16:42:09,705 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 50 states [2022-04-07 16:42:09,706 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 16:42:09,706 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 50 interpolants. [2022-04-07 16:42:09,707 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=303, Invalid=2147, Unknown=0, NotChecked=0, Total=2450 [2022-04-07 16:42:09,707 INFO L87 Difference]: Start difference. First operand 47 states and 51 transitions. Second operand has 50 states, 49 states have (on average 1.3673469387755102) internal successors, (67), 47 states have internal predecessors, (67), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:42:24,800 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 16:42:24,800 INFO L93 Difference]: Finished difference Result 145 states and 172 transitions. [2022-04-07 16:42:24,800 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 73 states. [2022-04-07 16:42:24,801 INFO L78 Accepts]: Start accepts. Automaton has has 50 states, 49 states have (on average 1.3673469387755102) internal successors, (67), 47 states have internal predecessors, (67), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 35 [2022-04-07 16:42:24,801 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 16:42:24,801 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 50 states, 49 states have (on average 1.3673469387755102) internal successors, (67), 47 states have internal predecessors, (67), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:42:24,807 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 73 states to 73 states and 167 transitions. [2022-04-07 16:42:24,807 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 50 states, 49 states have (on average 1.3673469387755102) internal successors, (67), 47 states have internal predecessors, (67), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:42:24,812 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 73 states to 73 states and 167 transitions. [2022-04-07 16:42:24,812 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 73 states and 167 transitions. [2022-04-07 16:42:25,045 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 167 edges. 167 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 16:42:25,047 INFO L225 Difference]: With dead ends: 145 [2022-04-07 16:42:25,047 INFO L226 Difference]: Without dead ends: 145 [2022-04-07 16:42:25,050 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 165 GetRequests, 42 SyntacticMatches, 5 SemanticMatches, 118 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3638 ImplicationChecksByTransitivity, 8.0s TimeCoverageRelationStatistics Valid=2087, Invalid=12193, Unknown=0, NotChecked=0, Total=14280 [2022-04-07 16:42:25,051 INFO L913 BasicCegarLoop]: 27 mSDtfsCounter, 343 mSDsluCounter, 98 mSDsCounter, 0 mSdLazyCounter, 2028 mSolverCounterSat, 785 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 4.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 343 SdHoareTripleChecker+Valid, 125 SdHoareTripleChecker+Invalid, 2813 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 785 IncrementalHoareTripleChecker+Valid, 2028 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 4.1s IncrementalHoareTripleChecker+Time [2022-04-07 16:42:25,051 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [343 Valid, 125 Invalid, 2813 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [785 Valid, 2028 Invalid, 0 Unknown, 0 Unchecked, 4.1s Time] [2022-04-07 16:42:25,051 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 145 states. [2022-04-07 16:42:25,056 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 145 to 42. [2022-04-07 16:42:25,056 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 16:42:25,056 INFO L82 GeneralOperation]: Start isEquivalent. First operand 145 states. Second operand has 42 states, 34 states have (on average 1.088235294117647) internal successors, (37), 35 states have internal predecessors, (37), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 16:42:25,057 INFO L74 IsIncluded]: Start isIncluded. First operand 145 states. Second operand has 42 states, 34 states have (on average 1.088235294117647) internal successors, (37), 35 states have internal predecessors, (37), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 16:42:25,057 INFO L87 Difference]: Start difference. First operand 145 states. Second operand has 42 states, 34 states have (on average 1.088235294117647) internal successors, (37), 35 states have internal predecessors, (37), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 16:42:25,068 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 16:42:25,068 INFO L93 Difference]: Finished difference Result 145 states and 172 transitions. [2022-04-07 16:42:25,068 INFO L276 IsEmpty]: Start isEmpty. Operand 145 states and 172 transitions. [2022-04-07 16:42:25,069 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 16:42:25,069 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 16:42:25,069 INFO L74 IsIncluded]: Start isIncluded. First operand has 42 states, 34 states have (on average 1.088235294117647) internal successors, (37), 35 states have internal predecessors, (37), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) Second operand 145 states. [2022-04-07 16:42:25,069 INFO L87 Difference]: Start difference. First operand has 42 states, 34 states have (on average 1.088235294117647) internal successors, (37), 35 states have internal predecessors, (37), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) Second operand 145 states. [2022-04-07 16:42:25,073 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 16:42:25,073 INFO L93 Difference]: Finished difference Result 145 states and 172 transitions. [2022-04-07 16:42:25,074 INFO L276 IsEmpty]: Start isEmpty. Operand 145 states and 172 transitions. [2022-04-07 16:42:25,074 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 16:42:25,074 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 16:42:25,074 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 16:42:25,074 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 16:42:25,074 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 42 states, 34 states have (on average 1.088235294117647) internal successors, (37), 35 states have internal predecessors, (37), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 16:42:25,075 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 44 transitions. [2022-04-07 16:42:25,075 INFO L78 Accepts]: Start accepts. Automaton has 42 states and 44 transitions. Word has length 35 [2022-04-07 16:42:25,075 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 16:42:25,076 INFO L478 AbstractCegarLoop]: Abstraction has 42 states and 44 transitions. [2022-04-07 16:42:25,076 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 50 states, 49 states have (on average 1.3673469387755102) internal successors, (67), 47 states have internal predecessors, (67), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 16:42:25,076 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 44 transitions. [2022-04-07 16:42:25,076 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2022-04-07 16:42:25,076 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 16:42:25,076 INFO L499 BasicCegarLoop]: trace histogram [5, 5, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 16:42:25,098 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2022-04-07 16:42:25,296 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6,5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 16:42:25,296 INFO L403 AbstractCegarLoop]: === Iteration 8 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 16:42:25,296 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 16:42:25,296 INFO L85 PathProgramCache]: Analyzing trace with hash -349680096, now seen corresponding path program 1 times [2022-04-07 16:42:25,296 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 16:42:25,296 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1848589247] [2022-04-07 16:42:25,297 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 16:42:25,297 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 16:42:25,332 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 16:42:25,470 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 16:42:25,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 16:42:25,475 INFO L290 TraceCheckUtils]: 0: Hoare triple {2378#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2363#true} is VALID [2022-04-07 16:42:25,475 INFO L290 TraceCheckUtils]: 1: Hoare triple {2363#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2363#true} is VALID [2022-04-07 16:42:25,476 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2363#true} {2363#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2363#true} is VALID [2022-04-07 16:42:25,476 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 27 [2022-04-07 16:42:25,476 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 16:42:25,478 INFO L290 TraceCheckUtils]: 0: Hoare triple {2363#true} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2363#true} is VALID [2022-04-07 16:42:25,478 INFO L290 TraceCheckUtils]: 1: Hoare triple {2363#true} [96] L6-->L6-2: Formula: (not (= v___VERIFIER_assert_~cond_3 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2363#true} is VALID [2022-04-07 16:42:25,478 INFO L290 TraceCheckUtils]: 2: Hoare triple {2363#true} [99] L6-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2363#true} is VALID [2022-04-07 16:42:25,479 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2363#true} {2364#false} [102] __VERIFIER_assertEXIT-->L33-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {2364#false} is VALID [2022-04-07 16:42:25,479 INFO L272 TraceCheckUtils]: 0: Hoare triple {2363#true} [70] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2378#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 16:42:25,479 INFO L290 TraceCheckUtils]: 1: Hoare triple {2378#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2363#true} is VALID [2022-04-07 16:42:25,479 INFO L290 TraceCheckUtils]: 2: Hoare triple {2363#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2363#true} is VALID [2022-04-07 16:42:25,479 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2363#true} {2363#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2363#true} is VALID [2022-04-07 16:42:25,480 INFO L272 TraceCheckUtils]: 4: Hoare triple {2363#true} [71] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2363#true} is VALID [2022-04-07 16:42:25,480 INFO L290 TraceCheckUtils]: 5: Hoare triple {2363#true} [74] mainENTRY-->L18-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (= 5 v_main_~max~0_1) (= v_main_~i~0_1 0) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= (let ((.cse1 (let ((.cse2 (mod v_main_~max~0_1 4294967296))) (ite (<= .cse2 2147483647) .cse2 (+ .cse2 (- 4294967296)))))) (store (store |v_#length_3| |v_main_~#str1~0.base_1| .cse1) |v_main_~#str2~0.base_1| .cse1)) |v_#length_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, main_~max~0=v_main_~max~0_1, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_1, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~#str1~0.base=|v_main_~#str1~0.base_1|, #length=|v_#length_1|} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~max~0, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, #length] {2368#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} is VALID [2022-04-07 16:42:25,481 INFO L290 TraceCheckUtils]: 6: Hoare triple {2368#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {2368#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} is VALID [2022-04-07 16:42:25,481 INFO L290 TraceCheckUtils]: 7: Hoare triple {2368#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {2368#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} is VALID [2022-04-07 16:42:25,481 INFO L290 TraceCheckUtils]: 8: Hoare triple {2368#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {2368#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} is VALID [2022-04-07 16:42:25,482 INFO L290 TraceCheckUtils]: 9: Hoare triple {2368#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {2368#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} is VALID [2022-04-07 16:42:25,482 INFO L290 TraceCheckUtils]: 10: Hoare triple {2368#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {2368#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} is VALID [2022-04-07 16:42:25,483 INFO L290 TraceCheckUtils]: 11: Hoare triple {2368#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {2368#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} is VALID [2022-04-07 16:42:25,483 INFO L290 TraceCheckUtils]: 12: Hoare triple {2368#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {2368#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} is VALID [2022-04-07 16:42:25,484 INFO L290 TraceCheckUtils]: 13: Hoare triple {2368#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {2368#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} is VALID [2022-04-07 16:42:25,484 INFO L290 TraceCheckUtils]: 14: Hoare triple {2368#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {2368#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} is VALID [2022-04-07 16:42:25,485 INFO L290 TraceCheckUtils]: 15: Hoare triple {2368#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {2368#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} is VALID [2022-04-07 16:42:25,485 INFO L290 TraceCheckUtils]: 16: Hoare triple {2368#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} [77] L18-3-->L18-4: Formula: (not (< (mod v_main_~i~0_5 4294967296) (mod v_main_~max~0_4 4294967296))) InVars {main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} OutVars{main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} AuxVars[] AssignedVars[] {2368#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} is VALID [2022-04-07 16:42:25,495 INFO L290 TraceCheckUtils]: 17: Hoare triple {2368#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} [79] L18-4-->L26-3: Formula: (let ((.cse0 (let ((.cse1 (mod (+ 4294967295 v_main_~max~0_6) 4294967296))) (ite (<= .cse1 2147483647) .cse1 (+ .cse1 (- 4294967296)))))) (and (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ .cse0 |v_main_~#str1~0.offset_6|) 0)) |v_#memory_int_4|) (= v_main_~j~0_5 0) (= .cse0 v_main_~i~0_11))) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|} OutVars{main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_5, main_~i~0=v_main_~i~0_11, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {2369#(and (or (and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1)) (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (- 1) (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0) 0)) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295) 0))))} is VALID [2022-04-07 16:42:25,496 INFO L290 TraceCheckUtils]: 18: Hoare triple {2369#(and (or (and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1)) (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (- 1) (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0) 0)) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295) 0))))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {2369#(and (or (and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1)) (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (- 1) (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0) 0)) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295) 0))))} is VALID [2022-04-07 16:42:25,497 INFO L290 TraceCheckUtils]: 19: Hoare triple {2369#(and (or (and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1)) (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (- 1) (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0) 0)) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295) 0))))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {2370#(or (<= (+ main_~i~0 2) 0) (and (<= (div (+ main_~max~0 4294967295) 4294967296) 1) (<= 4294967299 (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))))} is VALID [2022-04-07 16:42:25,498 INFO L290 TraceCheckUtils]: 20: Hoare triple {2370#(or (<= (+ main_~i~0 2) 0) (and (<= (div (+ main_~max~0 4294967295) 4294967296) 1) (<= 4294967299 (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {2370#(or (<= (+ main_~i~0 2) 0) (and (<= (div (+ main_~max~0 4294967295) 4294967296) 1) (<= 4294967299 (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))))} is VALID [2022-04-07 16:42:25,498 INFO L290 TraceCheckUtils]: 21: Hoare triple {2370#(or (<= (+ main_~i~0 2) 0) (and (<= (div (+ main_~max~0 4294967295) 4294967296) 1) (<= 4294967299 (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {2371#(or (and (<= (div (+ main_~max~0 4294967295) 4294967296) 1) (<= 4294967298 (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (<= (+ main_~i~0 3) 0))} is VALID [2022-04-07 16:42:25,499 INFO L290 TraceCheckUtils]: 22: Hoare triple {2371#(or (and (<= (div (+ main_~max~0 4294967295) 4294967296) 1) (<= 4294967298 (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (<= (+ main_~i~0 3) 0))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {2372#(and (<= (div (+ main_~max~0 4294967295) 4294967296) 1) (<= 4294967298 (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))))} is VALID [2022-04-07 16:42:25,499 INFO L290 TraceCheckUtils]: 23: Hoare triple {2372#(and (<= (div (+ main_~max~0 4294967295) 4294967296) 1) (<= 4294967298 (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {2373#(and (<= (div (+ main_~max~0 4294967295) 4294967296) 1) (<= 4294967297 (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))))} is VALID [2022-04-07 16:42:25,500 INFO L290 TraceCheckUtils]: 24: Hoare triple {2373#(and (<= (div (+ main_~max~0 4294967295) 4294967296) 1) (<= 4294967297 (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))))} [82] L26-3-->L26-4: Formula: (not (<= 0 v_main_~i~0_12)) InVars {main_~i~0=v_main_~i~0_12} OutVars{main_~i~0=v_main_~i~0_12} AuxVars[] AssignedVars[] {2364#false} is VALID [2022-04-07 16:42:25,500 INFO L290 TraceCheckUtils]: 25: Hoare triple {2364#false} [84] L26-4-->L32-3: Formula: (and (= v_main_~j~0_8 (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_7) 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))))) (= v_main_~i~0_16 0)) InVars {main_~max~0=v_main_~max~0_7} OutVars{main_~i~0=v_main_~i~0_16, main_~max~0=v_main_~max~0_7, main_~j~0=v_main_~j~0_8} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {2364#false} is VALID [2022-04-07 16:42:25,500 INFO L290 TraceCheckUtils]: 26: Hoare triple {2364#false} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {2364#false} is VALID [2022-04-07 16:42:25,500 INFO L272 TraceCheckUtils]: 27: Hoare triple {2364#false} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {2363#true} is VALID [2022-04-07 16:42:25,500 INFO L290 TraceCheckUtils]: 28: Hoare triple {2363#true} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2363#true} is VALID [2022-04-07 16:42:25,500 INFO L290 TraceCheckUtils]: 29: Hoare triple {2363#true} [96] L6-->L6-2: Formula: (not (= v___VERIFIER_assert_~cond_3 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2363#true} is VALID [2022-04-07 16:42:25,500 INFO L290 TraceCheckUtils]: 30: Hoare triple {2363#true} [99] L6-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2363#true} is VALID [2022-04-07 16:42:25,501 INFO L284 TraceCheckUtils]: 31: Hoare quadruple {2363#true} {2364#false} [102] __VERIFIER_assertEXIT-->L33-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {2364#false} is VALID [2022-04-07 16:42:25,501 INFO L290 TraceCheckUtils]: 32: Hoare triple {2364#false} [92] L33-1-->L32-2: Formula: (= (+ v_main_~j~0_3 1) v_main_~j~0_4) InVars {main_~j~0=v_main_~j~0_4} OutVars{main_#t~post12=|v_main_#t~post12_1|, main_#t~mem10=|v_main_#t~mem10_3|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_3|} AuxVars[] AssignedVars[main_#t~mem10, main_~j~0, main_#t~mem11, main_#t~post12] {2364#false} is VALID [2022-04-07 16:42:25,501 INFO L290 TraceCheckUtils]: 33: Hoare triple {2364#false} [94] L32-2-->L32-3: Formula: (= v_main_~i~0_7 (+ v_main_~i~0_8 1)) InVars {main_~i~0=v_main_~i~0_8} OutVars{main_~i~0=v_main_~i~0_7, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post9] {2364#false} is VALID [2022-04-07 16:42:25,501 INFO L290 TraceCheckUtils]: 34: Hoare triple {2364#false} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {2364#false} is VALID [2022-04-07 16:42:25,501 INFO L272 TraceCheckUtils]: 35: Hoare triple {2364#false} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {2364#false} is VALID [2022-04-07 16:42:25,501 INFO L290 TraceCheckUtils]: 36: Hoare triple {2364#false} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2364#false} is VALID [2022-04-07 16:42:25,501 INFO L290 TraceCheckUtils]: 37: Hoare triple {2364#false} [95] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2364#false} is VALID [2022-04-07 16:42:25,501 INFO L290 TraceCheckUtils]: 38: Hoare triple {2364#false} [97] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2364#false} is VALID [2022-04-07 16:42:25,501 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2022-04-07 16:42:25,502 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 16:42:25,502 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1848589247] [2022-04-07 16:42:25,502 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1848589247] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 16:42:25,502 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [327601030] [2022-04-07 16:42:25,502 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 16:42:25,502 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 16:42:25,502 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 16:42:25,503 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 16:42:25,503 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-04-07 16:42:25,558 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 16:42:25,559 INFO L263 TraceCheckSpWp]: Trace formula consists of 189 conjuncts, 44 conjunts are in the unsatisfiable core [2022-04-07 16:42:25,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 16:42:25,572 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 16:42:25,589 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 8 [2022-04-07 16:42:25,845 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 20 [2022-04-07 16:42:26,007 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-04-07 16:42:26,009 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 32 [2022-04-07 16:42:30,425 WARN L855 $PredicateComparison]: unable to prove that (exists ((aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 Int) (aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 Int) (|v_main_~#str2~0.base_BEFORE_CALL_1| Int) (aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 Int) (aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 Int) (aux_div_v_main_~j~0_BEFORE_CALL_1_46 Int) (|v_main_~#str1~0.base_BEFORE_CALL_1| Int)) (let ((.cse1 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296))) (let ((.cse0 (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 .cse1))) (and (= (select (select |c_#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_1|) 1) (select (select |c_#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_1|) (+ (- 1) (mod (+ 4294967295 (* 4294967295 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168)) 4294967296)))) (<= 0 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168) (< aux_div_v_main_~j~0_BEFORE_CALL_1_46 (+ aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 1)) (<= .cse0 4294967295) (< 0 (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 1 .cse1)) (<= .cse0 (+ (* aux_div_v_main_~j~0_BEFORE_CALL_1_46 4294967296) 4294967295)) (<= .cse0 (+ (* aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 4294967296) 4294967293)) (< aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 (+ aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 1)) (<= (+ (* aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 4294967296) 4294967293) .cse0) (not (= |v_main_~#str2~0.base_BEFORE_CALL_1| |v_main_~#str1~0.base_BEFORE_CALL_1|)))))) is different from true [2022-04-07 16:42:37,887 INFO L173 IndexEqualityManager]: detected equality via solver [2022-04-07 16:42:37,889 INFO L173 IndexEqualityManager]: detected equality via solver [2022-04-07 16:42:37,890 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 1 disjoint index pairs (out of 6 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 10 [2022-04-07 16:42:38,398 INFO L272 TraceCheckUtils]: 0: Hoare triple {2363#true} [70] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2363#true} is VALID [2022-04-07 16:42:38,398 INFO L290 TraceCheckUtils]: 1: Hoare triple {2363#true} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2363#true} is VALID [2022-04-07 16:42:38,398 INFO L290 TraceCheckUtils]: 2: Hoare triple {2363#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2363#true} is VALID [2022-04-07 16:42:38,398 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2363#true} {2363#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2363#true} is VALID [2022-04-07 16:42:38,398 INFO L272 TraceCheckUtils]: 4: Hoare triple {2363#true} [71] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2363#true} is VALID [2022-04-07 16:42:38,399 INFO L290 TraceCheckUtils]: 5: Hoare triple {2363#true} [74] mainENTRY-->L18-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (= 5 v_main_~max~0_1) (= v_main_~i~0_1 0) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= (let ((.cse1 (let ((.cse2 (mod v_main_~max~0_1 4294967296))) (ite (<= .cse2 2147483647) .cse2 (+ .cse2 (- 4294967296)))))) (store (store |v_#length_3| |v_main_~#str1~0.base_1| .cse1) |v_main_~#str2~0.base_1| .cse1)) |v_#length_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, main_~max~0=v_main_~max~0_1, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_1, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~#str1~0.base=|v_main_~#str1~0.base_1|, #length=|v_#length_1|} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~max~0, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, #length] {2397#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:42:38,399 INFO L290 TraceCheckUtils]: 6: Hoare triple {2397#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {2397#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:42:38,400 INFO L290 TraceCheckUtils]: 7: Hoare triple {2397#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {2397#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:42:38,400 INFO L290 TraceCheckUtils]: 8: Hoare triple {2397#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {2397#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:42:38,401 INFO L290 TraceCheckUtils]: 9: Hoare triple {2397#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {2397#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:42:38,401 INFO L290 TraceCheckUtils]: 10: Hoare triple {2397#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {2397#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:42:38,401 INFO L290 TraceCheckUtils]: 11: Hoare triple {2397#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {2397#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:42:38,402 INFO L290 TraceCheckUtils]: 12: Hoare triple {2397#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {2397#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:42:38,403 INFO L290 TraceCheckUtils]: 13: Hoare triple {2397#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {2397#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:42:38,403 INFO L290 TraceCheckUtils]: 14: Hoare triple {2397#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {2397#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:42:38,404 INFO L290 TraceCheckUtils]: 15: Hoare triple {2397#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {2397#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:42:38,404 INFO L290 TraceCheckUtils]: 16: Hoare triple {2397#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [77] L18-3-->L18-4: Formula: (not (< (mod v_main_~i~0_5 4294967296) (mod v_main_~max~0_4 4294967296))) InVars {main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} OutVars{main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} AuxVars[] AssignedVars[] {2397#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:42:38,405 INFO L290 TraceCheckUtils]: 17: Hoare triple {2397#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [79] L18-4-->L26-3: Formula: (let ((.cse0 (let ((.cse1 (mod (+ 4294967295 v_main_~max~0_6) 4294967296))) (ite (<= .cse1 2147483647) .cse1 (+ .cse1 (- 4294967296)))))) (and (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ .cse0 |v_main_~#str1~0.offset_6|) 0)) |v_#memory_int_4|) (= v_main_~j~0_5 0) (= .cse0 v_main_~i~0_11))) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|} OutVars{main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_5, main_~i~0=v_main_~i~0_11, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {2434#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (= main_~j~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~i~0)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= main_~i~0 (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} is VALID [2022-04-07 16:42:38,406 INFO L290 TraceCheckUtils]: 18: Hoare triple {2434#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (= main_~j~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~i~0)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= main_~i~0 (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {2438#(and (= |main_~#str2~0.offset| 0) (= main_~j~0 1) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~i~0)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= main_~i~0 (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} is VALID [2022-04-07 16:42:38,407 INFO L290 TraceCheckUtils]: 19: Hoare triple {2438#(and (= |main_~#str2~0.offset| 0) (= main_~j~0 1) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~i~0)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= main_~i~0 (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {2442#(and (= |main_~#str2~0.offset| 0) (or (and (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 1)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) (+ main_~i~0 1)))) (= main_~j~0 1) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:42:38,408 INFO L290 TraceCheckUtils]: 20: Hoare triple {2442#(and (= |main_~#str2~0.offset| 0) (or (and (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 1)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) (+ main_~i~0 1)))) (= main_~j~0 1) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {2446#(and (= |main_~#str2~0.offset| 0) (or (and (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 1)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) (+ main_~i~0 1)))) (= |main_~#str1~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ (- 1) main_~j~0) 1))} is VALID [2022-04-07 16:42:38,409 INFO L290 TraceCheckUtils]: 21: Hoare triple {2446#(and (= |main_~#str2~0.offset| 0) (or (and (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 1)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) (+ main_~i~0 1)))) (= |main_~#str1~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ (- 1) main_~j~0) 1))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {2450#(and (= |main_~#str2~0.offset| 0) (or (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ main_~i~0 2) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)))) (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 2)))) (= |main_~#str1~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ (- 1) main_~j~0) 1))} is VALID [2022-04-07 16:42:38,410 INFO L290 TraceCheckUtils]: 22: Hoare triple {2450#(and (= |main_~#str2~0.offset| 0) (or (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ main_~i~0 2) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)))) (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 2)))) (= |main_~#str1~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ (- 1) main_~j~0) 1))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {2454#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= |main_~#str1~0.offset| 0) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 2)) (<= 0 main_~i~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:42:38,410 INFO L290 TraceCheckUtils]: 23: Hoare triple {2454#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= |main_~#str1~0.offset| 0) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 2)) (<= 0 main_~i~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {2458#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (<= 2 (mod (+ main_~max~0 4294967295) 4294967296)) (<= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 3)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:42:38,411 INFO L290 TraceCheckUtils]: 24: Hoare triple {2458#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (<= 2 (mod (+ main_~max~0 4294967295) 4294967296)) (<= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 3)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [82] L26-3-->L26-4: Formula: (not (<= 0 v_main_~i~0_12)) InVars {main_~i~0=v_main_~i~0_12} OutVars{main_~i~0=v_main_~i~0_12} AuxVars[] AssignedVars[] {2462#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (< (mod (+ main_~max~0 4294967295) 4294967296) 3) (<= 2 (mod (+ main_~max~0 4294967295) 4294967296)) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:42:38,413 INFO L290 TraceCheckUtils]: 25: Hoare triple {2462#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (< (mod (+ main_~max~0 4294967295) 4294967296) 3) (<= 2 (mod (+ main_~max~0 4294967295) 4294967296)) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [84] L26-4-->L32-3: Formula: (and (= v_main_~j~0_8 (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_7) 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))))) (= v_main_~i~0_16 0)) InVars {main_~max~0=v_main_~max~0_7} OutVars{main_~i~0=v_main_~i~0_16, main_~max~0=v_main_~max~0_7, main_~j~0=v_main_~j~0_8} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {2466#(and (= |main_~#str2~0.offset| 0) (< (div (+ (- 2) main_~j~0) (- 4294967296)) (+ (div (+ 4294967295 (* (- 1) main_~j~0)) 4294967296) 1)) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< main_~j~0 4294967296) (< (div main_~j~0 (- 4294967296)) (+ (div (+ 2 (* (- 1) main_~j~0)) 4294967296) 1)) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod main_~j~0 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))))} is VALID [2022-04-07 16:42:38,414 INFO L290 TraceCheckUtils]: 26: Hoare triple {2466#(and (= |main_~#str2~0.offset| 0) (< (div (+ (- 2) main_~j~0) (- 4294967296)) (+ (div (+ 4294967295 (* (- 1) main_~j~0)) 4294967296) 1)) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< main_~j~0 4294967296) (< (div main_~j~0 (- 4294967296)) (+ (div (+ 2 (* (- 1) main_~j~0)) 4294967296) 1)) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod main_~j~0 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))))} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {2466#(and (= |main_~#str2~0.offset| 0) (< (div (+ (- 2) main_~j~0) (- 4294967296)) (+ (div (+ 4294967295 (* (- 1) main_~j~0)) 4294967296) 1)) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< main_~j~0 4294967296) (< (div main_~j~0 (- 4294967296)) (+ (div (+ 2 (* (- 1) main_~j~0)) 4294967296) 1)) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod main_~j~0 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))))} is VALID [2022-04-07 16:42:39,059 INFO L272 TraceCheckUtils]: 27: Hoare triple {2466#(and (= |main_~#str2~0.offset| 0) (< (div (+ (- 2) main_~j~0) (- 4294967296)) (+ (div (+ 4294967295 (* (- 1) main_~j~0)) 4294967296) 1)) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< main_~j~0 4294967296) (< (div main_~j~0 (- 4294967296)) (+ (div (+ 2 (* (- 1) main_~j~0)) 4294967296) 1)) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod main_~j~0 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))))} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {2473#(exists ((aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 Int) (aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 Int) (|v_main_~#str2~0.base_BEFORE_CALL_1| Int) (aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 Int) (aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 Int) (aux_div_v_main_~j~0_BEFORE_CALL_1_46 Int) (|v_main_~#str1~0.base_BEFORE_CALL_1| Int)) (and (<= 0 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168) (< aux_div_v_main_~j~0_BEFORE_CALL_1_46 (+ aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 1)) (<= (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296)) 4294967295) (< 0 (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 1 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296))) (<= (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296)) (+ (* aux_div_v_main_~j~0_BEFORE_CALL_1_46 4294967296) 4294967295)) (= (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_1|) (+ (- 1) (mod (+ 4294967295 (* 4294967295 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168)) 4294967296))) (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_1|) 1)) (<= (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296)) (+ (* aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 4294967296) 4294967293)) (< aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 (+ aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 1)) (<= (+ (* aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 4294967296) 4294967293) (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296))) (not (= |v_main_~#str2~0.base_BEFORE_CALL_1| |v_main_~#str1~0.base_BEFORE_CALL_1|))))} is VALID [2022-04-07 16:42:39,065 INFO L290 TraceCheckUtils]: 28: Hoare triple {2473#(exists ((aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 Int) (aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 Int) (|v_main_~#str2~0.base_BEFORE_CALL_1| Int) (aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 Int) (aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 Int) (aux_div_v_main_~j~0_BEFORE_CALL_1_46 Int) (|v_main_~#str1~0.base_BEFORE_CALL_1| Int)) (and (<= 0 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168) (< aux_div_v_main_~j~0_BEFORE_CALL_1_46 (+ aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 1)) (<= (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296)) 4294967295) (< 0 (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 1 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296))) (<= (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296)) (+ (* aux_div_v_main_~j~0_BEFORE_CALL_1_46 4294967296) 4294967295)) (= (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_1|) (+ (- 1) (mod (+ 4294967295 (* 4294967295 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168)) 4294967296))) (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_1|) 1)) (<= (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296)) (+ (* aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 4294967296) 4294967293)) (< aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 (+ aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 1)) (<= (+ (* aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 4294967296) 4294967293) (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296))) (not (= |v_main_~#str2~0.base_BEFORE_CALL_1| |v_main_~#str1~0.base_BEFORE_CALL_1|))))} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2473#(exists ((aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 Int) (aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 Int) (|v_main_~#str2~0.base_BEFORE_CALL_1| Int) (aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 Int) (aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 Int) (aux_div_v_main_~j~0_BEFORE_CALL_1_46 Int) (|v_main_~#str1~0.base_BEFORE_CALL_1| Int)) (and (<= 0 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168) (< aux_div_v_main_~j~0_BEFORE_CALL_1_46 (+ aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 1)) (<= (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296)) 4294967295) (< 0 (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 1 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296))) (<= (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296)) (+ (* aux_div_v_main_~j~0_BEFORE_CALL_1_46 4294967296) 4294967295)) (= (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_1|) (+ (- 1) (mod (+ 4294967295 (* 4294967295 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168)) 4294967296))) (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_1|) 1)) (<= (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296)) (+ (* aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 4294967296) 4294967293)) (< aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 (+ aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 1)) (<= (+ (* aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 4294967296) 4294967293) (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296))) (not (= |v_main_~#str2~0.base_BEFORE_CALL_1| |v_main_~#str1~0.base_BEFORE_CALL_1|))))} is VALID [2022-04-07 16:42:39,069 INFO L290 TraceCheckUtils]: 29: Hoare triple {2473#(exists ((aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 Int) (aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 Int) (|v_main_~#str2~0.base_BEFORE_CALL_1| Int) (aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 Int) (aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 Int) (aux_div_v_main_~j~0_BEFORE_CALL_1_46 Int) (|v_main_~#str1~0.base_BEFORE_CALL_1| Int)) (and (<= 0 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168) (< aux_div_v_main_~j~0_BEFORE_CALL_1_46 (+ aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 1)) (<= (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296)) 4294967295) (< 0 (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 1 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296))) (<= (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296)) (+ (* aux_div_v_main_~j~0_BEFORE_CALL_1_46 4294967296) 4294967295)) (= (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_1|) (+ (- 1) (mod (+ 4294967295 (* 4294967295 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168)) 4294967296))) (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_1|) 1)) (<= (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296)) (+ (* aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 4294967296) 4294967293)) (< aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 (+ aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 1)) (<= (+ (* aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 4294967296) 4294967293) (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296))) (not (= |v_main_~#str2~0.base_BEFORE_CALL_1| |v_main_~#str1~0.base_BEFORE_CALL_1|))))} [96] L6-->L6-2: Formula: (not (= v___VERIFIER_assert_~cond_3 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2473#(exists ((aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 Int) (aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 Int) (|v_main_~#str2~0.base_BEFORE_CALL_1| Int) (aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 Int) (aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 Int) (aux_div_v_main_~j~0_BEFORE_CALL_1_46 Int) (|v_main_~#str1~0.base_BEFORE_CALL_1| Int)) (and (<= 0 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168) (< aux_div_v_main_~j~0_BEFORE_CALL_1_46 (+ aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 1)) (<= (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296)) 4294967295) (< 0 (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 1 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296))) (<= (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296)) (+ (* aux_div_v_main_~j~0_BEFORE_CALL_1_46 4294967296) 4294967295)) (= (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_1|) (+ (- 1) (mod (+ 4294967295 (* 4294967295 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168)) 4294967296))) (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_1|) 1)) (<= (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296)) (+ (* aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 4294967296) 4294967293)) (< aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 (+ aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 1)) (<= (+ (* aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 4294967296) 4294967293) (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296))) (not (= |v_main_~#str2~0.base_BEFORE_CALL_1| |v_main_~#str1~0.base_BEFORE_CALL_1|))))} is VALID [2022-04-07 16:42:39,071 INFO L290 TraceCheckUtils]: 30: Hoare triple {2473#(exists ((aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 Int) (aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 Int) (|v_main_~#str2~0.base_BEFORE_CALL_1| Int) (aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 Int) (aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 Int) (aux_div_v_main_~j~0_BEFORE_CALL_1_46 Int) (|v_main_~#str1~0.base_BEFORE_CALL_1| Int)) (and (<= 0 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168) (< aux_div_v_main_~j~0_BEFORE_CALL_1_46 (+ aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 1)) (<= (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296)) 4294967295) (< 0 (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 1 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296))) (<= (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296)) (+ (* aux_div_v_main_~j~0_BEFORE_CALL_1_46 4294967296) 4294967295)) (= (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_1|) (+ (- 1) (mod (+ 4294967295 (* 4294967295 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168)) 4294967296))) (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_1|) 1)) (<= (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296)) (+ (* aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 4294967296) 4294967293)) (< aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 (+ aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 1)) (<= (+ (* aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 4294967296) 4294967293) (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296))) (not (= |v_main_~#str2~0.base_BEFORE_CALL_1| |v_main_~#str1~0.base_BEFORE_CALL_1|))))} [99] L6-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2473#(exists ((aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 Int) (aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 Int) (|v_main_~#str2~0.base_BEFORE_CALL_1| Int) (aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 Int) (aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 Int) (aux_div_v_main_~j~0_BEFORE_CALL_1_46 Int) (|v_main_~#str1~0.base_BEFORE_CALL_1| Int)) (and (<= 0 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168) (< aux_div_v_main_~j~0_BEFORE_CALL_1_46 (+ aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 1)) (<= (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296)) 4294967295) (< 0 (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 1 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296))) (<= (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296)) (+ (* aux_div_v_main_~j~0_BEFORE_CALL_1_46 4294967296) 4294967295)) (= (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_1|) (+ (- 1) (mod (+ 4294967295 (* 4294967295 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168)) 4294967296))) (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_1|) 1)) (<= (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296)) (+ (* aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 4294967296) 4294967293)) (< aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 (+ aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 1)) (<= (+ (* aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 4294967296) 4294967293) (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296))) (not (= |v_main_~#str2~0.base_BEFORE_CALL_1| |v_main_~#str1~0.base_BEFORE_CALL_1|))))} is VALID [2022-04-07 16:42:39,073 INFO L284 TraceCheckUtils]: 31: Hoare quadruple {2473#(exists ((aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 Int) (aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 Int) (|v_main_~#str2~0.base_BEFORE_CALL_1| Int) (aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 Int) (aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 Int) (aux_div_v_main_~j~0_BEFORE_CALL_1_46 Int) (|v_main_~#str1~0.base_BEFORE_CALL_1| Int)) (and (<= 0 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168) (< aux_div_v_main_~j~0_BEFORE_CALL_1_46 (+ aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 1)) (<= (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296)) 4294967295) (< 0 (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 1 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296))) (<= (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296)) (+ (* aux_div_v_main_~j~0_BEFORE_CALL_1_46 4294967296) 4294967295)) (= (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_1|) (+ (- 1) (mod (+ 4294967295 (* 4294967295 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168)) 4294967296))) (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_1|) 1)) (<= (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296)) (+ (* aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 4294967296) 4294967293)) (< aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 (+ aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 1)) (<= (+ (* aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 4294967296) 4294967293) (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296))) (not (= |v_main_~#str2~0.base_BEFORE_CALL_1| |v_main_~#str1~0.base_BEFORE_CALL_1|))))} {2466#(and (= |main_~#str2~0.offset| 0) (< (div (+ (- 2) main_~j~0) (- 4294967296)) (+ (div (+ 4294967295 (* (- 1) main_~j~0)) 4294967296) 1)) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< main_~j~0 4294967296) (< (div main_~j~0 (- 4294967296)) (+ (div (+ 2 (* (- 1) main_~j~0)) 4294967296) 1)) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod main_~j~0 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))))} [102] __VERIFIER_assertEXIT-->L33-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {2466#(and (= |main_~#str2~0.offset| 0) (< (div (+ (- 2) main_~j~0) (- 4294967296)) (+ (div (+ 4294967295 (* (- 1) main_~j~0)) 4294967296) 1)) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< main_~j~0 4294967296) (< (div main_~j~0 (- 4294967296)) (+ (div (+ 2 (* (- 1) main_~j~0)) 4294967296) 1)) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod main_~j~0 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))))} is VALID [2022-04-07 16:42:39,075 INFO L290 TraceCheckUtils]: 32: Hoare triple {2466#(and (= |main_~#str2~0.offset| 0) (< (div (+ (- 2) main_~j~0) (- 4294967296)) (+ (div (+ 4294967295 (* (- 1) main_~j~0)) 4294967296) 1)) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< main_~j~0 4294967296) (< (div main_~j~0 (- 4294967296)) (+ (div (+ 2 (* (- 1) main_~j~0)) 4294967296) 1)) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod main_~j~0 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))))} [92] L33-1-->L32-2: Formula: (= (+ v_main_~j~0_3 1) v_main_~j~0_4) InVars {main_~j~0=v_main_~j~0_4} OutVars{main_#t~post12=|v_main_#t~post12_1|, main_#t~mem10=|v_main_#t~mem10_3|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_3|} AuxVars[] AssignedVars[main_#t~mem10, main_~j~0, main_#t~mem11, main_#t~post12] {2489#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod (+ main_~j~0 1) 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (< (div (+ main_~j~0 1) (- 4294967296)) (+ (div (+ (* (- 1) main_~j~0) 1) 4294967296) 1)) (<= 0 (+ main_~j~0 1)) (= |main_~#str1~0.offset| 0) (< main_~j~0 4294967295) (< (div (+ (- 1) main_~j~0) (- 4294967296)) (+ (div (+ 4294967294 (* (- 1) main_~j~0)) 4294967296) 1)) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:42:39,076 INFO L290 TraceCheckUtils]: 33: Hoare triple {2489#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod (+ main_~j~0 1) 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (< (div (+ main_~j~0 1) (- 4294967296)) (+ (div (+ (* (- 1) main_~j~0) 1) 4294967296) 1)) (<= 0 (+ main_~j~0 1)) (= |main_~#str1~0.offset| 0) (< main_~j~0 4294967295) (< (div (+ (- 1) main_~j~0) (- 4294967296)) (+ (div (+ 4294967294 (* (- 1) main_~j~0)) 4294967296) 1)) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [94] L32-2-->L32-3: Formula: (= v_main_~i~0_7 (+ v_main_~i~0_8 1)) InVars {main_~i~0=v_main_~i~0_8} OutVars{main_~i~0=v_main_~i~0_7, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post9] {2493#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod (+ main_~j~0 1) 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (< (div (+ main_~j~0 1) (- 4294967296)) (+ (div (+ (* (- 1) main_~j~0) 1) 4294967296) 1)) (<= 0 (+ main_~j~0 1)) (= |main_~#str1~0.offset| 0) (< main_~j~0 4294967295) (< (div (+ (- 1) main_~j~0) (- 4294967296)) (+ (div (+ 4294967294 (* (- 1) main_~j~0)) 4294967296) 1)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ (- 1) main_~i~0) 0))} is VALID [2022-04-07 16:42:39,080 INFO L290 TraceCheckUtils]: 34: Hoare triple {2493#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod (+ main_~j~0 1) 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (< (div (+ main_~j~0 1) (- 4294967296)) (+ (div (+ (* (- 1) main_~j~0) 1) 4294967296) 1)) (<= 0 (+ main_~j~0 1)) (= |main_~#str1~0.offset| 0) (< main_~j~0 4294967295) (< (div (+ (- 1) main_~j~0) (- 4294967296)) (+ (div (+ 4294967294 (* (- 1) main_~j~0)) 4294967296) 1)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ (- 1) main_~i~0) 0))} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {2497#(= |main_#t~mem11| |main_#t~mem10|)} is VALID [2022-04-07 16:42:39,080 INFO L272 TraceCheckUtils]: 35: Hoare triple {2497#(= |main_#t~mem11| |main_#t~mem10|)} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {2501#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 16:42:39,081 INFO L290 TraceCheckUtils]: 36: Hoare triple {2501#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2505#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 16:42:39,081 INFO L290 TraceCheckUtils]: 37: Hoare triple {2505#(<= 1 __VERIFIER_assert_~cond)} [95] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2364#false} is VALID [2022-04-07 16:42:39,081 INFO L290 TraceCheckUtils]: 38: Hoare triple {2364#false} [97] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2364#false} is VALID [2022-04-07 16:42:39,082 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 25 trivial. 2 not checked. [2022-04-07 16:42:39,082 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 16:42:39,693 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-04-07 16:42:39,693 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 218 treesize of output 206 [2022-04-07 16:42:40,150 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-04-07 16:42:40,154 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-04-07 16:42:40,155 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 256 treesize of output 227 [2022-04-07 16:42:40,323 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-04-07 16:42:40,324 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 23 [2022-04-07 16:42:40,332 INFO L173 IndexEqualityManager]: detected equality via solver [2022-04-07 16:42:40,336 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 30 [2022-04-07 16:42:40,515 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-04-07 16:42:40,516 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 23 [2022-04-07 16:42:40,527 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 105 treesize of output 96 [2022-04-07 16:42:40,559 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-04-07 16:42:40,564 INFO L356 Elim1Store]: treesize reduction 5, result has 70.6 percent of original size [2022-04-07 16:42:40,564 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 129 treesize of output 108 [2022-04-07 16:42:40,634 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-04-07 16:42:40,634 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 218 treesize of output 206 [2022-04-07 16:42:41,094 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 23 [2022-04-07 16:42:41,106 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 105 treesize of output 96 [2022-04-07 16:42:41,154 INFO L356 Elim1Store]: treesize reduction 5, result has 70.6 percent of original size [2022-04-07 16:42:41,155 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 231 treesize of output 209 [2022-04-07 16:42:41,343 INFO L356 Elim1Store]: treesize reduction 16, result has 5.9 percent of original size [2022-04-07 16:42:41,343 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 105 treesize of output 92 [2022-04-07 16:42:42,085 INFO L290 TraceCheckUtils]: 38: Hoare triple {2364#false} [97] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2364#false} is VALID [2022-04-07 16:42:42,085 INFO L290 TraceCheckUtils]: 37: Hoare triple {2505#(<= 1 __VERIFIER_assert_~cond)} [95] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2364#false} is VALID [2022-04-07 16:42:42,086 INFO L290 TraceCheckUtils]: 36: Hoare triple {2501#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2505#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 16:42:42,086 INFO L272 TraceCheckUtils]: 35: Hoare triple {2497#(= |main_#t~mem11| |main_#t~mem10|)} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {2501#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 16:42:42,087 INFO L290 TraceCheckUtils]: 34: Hoare triple {2524#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|)))} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {2497#(= |main_#t~mem11| |main_#t~mem10|)} is VALID [2022-04-07 16:42:42,087 INFO L290 TraceCheckUtils]: 33: Hoare triple {2528#(= (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1)) (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)))} [94] L32-2-->L32-3: Formula: (= v_main_~i~0_7 (+ v_main_~i~0_8 1)) InVars {main_~i~0=v_main_~i~0_8} OutVars{main_~i~0=v_main_~i~0_7, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post9] {2524#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|)))} is VALID [2022-04-07 16:42:42,088 INFO L290 TraceCheckUtils]: 32: Hoare triple {2532#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1)))} [92] L33-1-->L32-2: Formula: (= (+ v_main_~j~0_3 1) v_main_~j~0_4) InVars {main_~j~0=v_main_~j~0_4} OutVars{main_#t~post12=|v_main_#t~post12_1|, main_#t~mem10=|v_main_#t~mem10_3|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_3|} AuxVars[] AssignedVars[main_#t~mem10, main_~j~0, main_#t~mem11, main_#t~post12] {2528#(= (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1)) (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)))} is VALID [2022-04-07 16:42:42,089 INFO L284 TraceCheckUtils]: 31: Hoare quadruple {2363#true} {2532#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1)))} [102] __VERIFIER_assertEXIT-->L33-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {2532#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1)))} is VALID [2022-04-07 16:42:42,089 INFO L290 TraceCheckUtils]: 30: Hoare triple {2363#true} [99] L6-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2363#true} is VALID [2022-04-07 16:42:42,089 INFO L290 TraceCheckUtils]: 29: Hoare triple {2363#true} [96] L6-->L6-2: Formula: (not (= v___VERIFIER_assert_~cond_3 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2363#true} is VALID [2022-04-07 16:42:42,089 INFO L290 TraceCheckUtils]: 28: Hoare triple {2363#true} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2363#true} is VALID [2022-04-07 16:42:42,089 INFO L272 TraceCheckUtils]: 27: Hoare triple {2532#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1)))} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {2363#true} is VALID [2022-04-07 16:42:42,090 INFO L290 TraceCheckUtils]: 26: Hoare triple {2532#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1)))} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {2532#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1)))} is VALID [2022-04-07 16:42:42,091 INFO L290 TraceCheckUtils]: 25: Hoare triple {2554#(and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1)))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967297))) (select (select |#memory_int| |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1)))))} [84] L26-4-->L32-3: Formula: (and (= v_main_~j~0_8 (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_7) 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))))) (= v_main_~i~0_16 0)) InVars {main_~max~0=v_main_~max~0_7} OutVars{main_~i~0=v_main_~i~0_16, main_~max~0=v_main_~max~0_7, main_~j~0=v_main_~j~0_8} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {2532#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1)))} is VALID [2022-04-07 16:42:42,091 INFO L290 TraceCheckUtils]: 24: Hoare triple {2558#(or (<= 0 main_~i~0) (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1)))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967297))) (select (select |#memory_int| |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1))))))} [82] L26-3-->L26-4: Formula: (not (<= 0 v_main_~i~0_12)) InVars {main_~i~0=v_main_~i~0_12} OutVars{main_~i~0=v_main_~i~0_12} AuxVars[] AssignedVars[] {2554#(and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1)))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967297))) (select (select |#memory_int| |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1)))))} is VALID [2022-04-07 16:42:42,092 INFO L290 TraceCheckUtils]: 23: Hoare triple {2562#(or (<= 1 main_~i~0) (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1)))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967297))) (select (select |#memory_int| |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1))))))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {2558#(or (<= 0 main_~i~0) (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1)))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967297))) (select (select |#memory_int| |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1))))))} is VALID [2022-04-07 16:42:42,094 INFO L290 TraceCheckUtils]: 22: Hoare triple {2566#(or (not (<= 0 main_~i~0)) (and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (forall ((v_ArrVal_234 Int)) (= (select (select (store |#memory_int| |main_~#str2~0.base| (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_234)) |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1)) (select (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_234) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967297)))))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (forall ((v_ArrVal_234 Int)) (= (select (select (store |#memory_int| |main_~#str2~0.base| (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_234)) |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1)) (select (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_234) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)))))) (<= 1 main_~i~0))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {2562#(or (<= 1 main_~i~0) (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1)))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967297))) (select (select |#memory_int| |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1))))))} is VALID [2022-04-07 16:42:42,095 INFO L290 TraceCheckUtils]: 21: Hoare triple {2570#(or (<= 2 main_~i~0) (and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (forall ((v_ArrVal_234 Int)) (= (select (select (store |#memory_int| |main_~#str2~0.base| (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_234)) |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1)) (select (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_234) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967297)))))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (forall ((v_ArrVal_234 Int)) (= (select (select (store |#memory_int| |main_~#str2~0.base| (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_234)) |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1)) (select (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_234) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)))))) (not (<= 1 main_~i~0)))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {2566#(or (not (<= 0 main_~i~0)) (and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (forall ((v_ArrVal_234 Int)) (= (select (select (store |#memory_int| |main_~#str2~0.base| (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_234)) |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1)) (select (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_234) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967297)))))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (forall ((v_ArrVal_234 Int)) (= (select (select (store |#memory_int| |main_~#str2~0.base| (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_234)) |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1)) (select (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_234) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)))))) (<= 1 main_~i~0))} is VALID [2022-04-07 16:42:42,098 INFO L290 TraceCheckUtils]: 20: Hoare triple {2574#(or (<= 2 main_~i~0) (not (<= 1 main_~i~0)) (and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (and (or (not (= (+ main_~j~0 4294967297) (mod (+ main_~max~0 4294967295) 4294967296))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= (+ main_~j~0 |main_~#str2~0.offset| 1) (+ |main_~#str1~0.offset| 1)))) (or (= (+ main_~j~0 4294967297) (mod (+ main_~max~0 4294967295) 4294967296)) (= (+ main_~i~0 |main_~#str1~0.offset| 4294967297) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|))) (or (= (+ main_~j~0 4294967297) (mod (+ main_~max~0 4294967295) 4294967296)) (= |main_~#str1~0.base| |main_~#str2~0.base|)))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 1)) (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 2)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= (+ main_~j~0 |main_~#str2~0.offset|) |main_~#str1~0.offset|))) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 1)) (= (+ main_~i~0 |main_~#str1~0.offset| 1) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)))))))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {2570#(or (<= 2 main_~i~0) (and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (forall ((v_ArrVal_234 Int)) (= (select (select (store |#memory_int| |main_~#str2~0.base| (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_234)) |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1)) (select (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_234) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967297)))))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (forall ((v_ArrVal_234 Int)) (= (select (select (store |#memory_int| |main_~#str2~0.base| (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_234)) |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1)) (select (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_234) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)))))) (not (<= 1 main_~i~0)))} is VALID [2022-04-07 16:42:42,100 INFO L290 TraceCheckUtils]: 19: Hoare triple {2578#(or (not (<= 2 main_~i~0)) (<= 3 main_~i~0) (and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (and (or (not (= (+ main_~j~0 4294967297) (mod (+ main_~max~0 4294967295) 4294967296))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= (+ main_~j~0 |main_~#str2~0.offset| 1) (+ |main_~#str1~0.offset| 1)))) (or (= (+ main_~j~0 4294967297) (mod (+ main_~max~0 4294967295) 4294967296)) (= (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|) (+ main_~i~0 |main_~#str1~0.offset| 4294967296))) (or (= (+ main_~j~0 4294967297) (mod (+ main_~max~0 4294967295) 4294967296)) (= |main_~#str1~0.base| |main_~#str2~0.base|)))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 1)) (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 2)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= (+ main_~j~0 |main_~#str2~0.offset|) |main_~#str1~0.offset|))) (or (= (+ main_~i~0 |main_~#str1~0.offset|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 1)))))))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {2574#(or (<= 2 main_~i~0) (not (<= 1 main_~i~0)) (and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (and (or (not (= (+ main_~j~0 4294967297) (mod (+ main_~max~0 4294967295) 4294967296))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= (+ main_~j~0 |main_~#str2~0.offset| 1) (+ |main_~#str1~0.offset| 1)))) (or (= (+ main_~j~0 4294967297) (mod (+ main_~max~0 4294967295) 4294967296)) (= (+ main_~i~0 |main_~#str1~0.offset| 4294967297) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|))) (or (= (+ main_~j~0 4294967297) (mod (+ main_~max~0 4294967295) 4294967296)) (= |main_~#str1~0.base| |main_~#str2~0.base|)))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 1)) (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 2)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= (+ main_~j~0 |main_~#str2~0.offset|) |main_~#str1~0.offset|))) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 1)) (= (+ main_~i~0 |main_~#str1~0.offset| 1) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)))))))} is VALID [2022-04-07 16:42:42,102 INFO L290 TraceCheckUtils]: 18: Hoare triple {2582#(or (not (<= 2 main_~i~0)) (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 2)) (= (+ main_~i~0 |main_~#str1~0.offset|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|))) (or (not (= (+ main_~j~0 |main_~#str2~0.offset| 1) |main_~#str1~0.offset|)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 3)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|))) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 2)) (= |main_~#str1~0.base| |main_~#str2~0.base|)))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (and (or (not (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967298))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= (+ main_~j~0 2 |main_~#str2~0.offset|) (+ |main_~#str1~0.offset| 1)))) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967298)) (= (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|) (+ main_~i~0 |main_~#str1~0.offset| 4294967296))) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967298)) (= |main_~#str1~0.base| |main_~#str2~0.base|))))) (<= 3 main_~i~0))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {2578#(or (not (<= 2 main_~i~0)) (<= 3 main_~i~0) (and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (and (or (not (= (+ main_~j~0 4294967297) (mod (+ main_~max~0 4294967295) 4294967296))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= (+ main_~j~0 |main_~#str2~0.offset| 1) (+ |main_~#str1~0.offset| 1)))) (or (= (+ main_~j~0 4294967297) (mod (+ main_~max~0 4294967295) 4294967296)) (= (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|) (+ main_~i~0 |main_~#str1~0.offset| 4294967296))) (or (= (+ main_~j~0 4294967297) (mod (+ main_~max~0 4294967295) 4294967296)) (= |main_~#str1~0.base| |main_~#str2~0.base|)))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 1)) (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 2)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= (+ main_~j~0 |main_~#str2~0.offset|) |main_~#str1~0.offset|))) (or (= (+ main_~i~0 |main_~#str1~0.offset|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 1)))))))} is VALID [2022-04-07 16:42:42,103 INFO L290 TraceCheckUtils]: 17: Hoare triple {2586#(or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1))))} [79] L18-4-->L26-3: Formula: (let ((.cse0 (let ((.cse1 (mod (+ 4294967295 v_main_~max~0_6) 4294967296))) (ite (<= .cse1 2147483647) .cse1 (+ .cse1 (- 4294967296)))))) (and (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ .cse0 |v_main_~#str1~0.offset_6|) 0)) |v_#memory_int_4|) (= v_main_~j~0_5 0) (= .cse0 v_main_~i~0_11))) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|} OutVars{main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_5, main_~i~0=v_main_~i~0_11, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {2582#(or (not (<= 2 main_~i~0)) (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 2)) (= (+ main_~i~0 |main_~#str1~0.offset|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|))) (or (not (= (+ main_~j~0 |main_~#str2~0.offset| 1) |main_~#str1~0.offset|)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 3)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|))) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 2)) (= |main_~#str1~0.base| |main_~#str2~0.base|)))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (and (or (not (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967298))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= (+ main_~j~0 2 |main_~#str2~0.offset|) (+ |main_~#str1~0.offset| 1)))) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967298)) (= (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|) (+ main_~i~0 |main_~#str1~0.offset| 4294967296))) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967298)) (= |main_~#str1~0.base| |main_~#str2~0.base|))))) (<= 3 main_~i~0))} is VALID [2022-04-07 16:42:42,104 INFO L290 TraceCheckUtils]: 16: Hoare triple {2586#(or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1))))} [77] L18-3-->L18-4: Formula: (not (< (mod v_main_~i~0_5 4294967296) (mod v_main_~max~0_4 4294967296))) InVars {main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} OutVars{main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} AuxVars[] AssignedVars[] {2586#(or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1))))} is VALID [2022-04-07 16:42:42,104 INFO L290 TraceCheckUtils]: 15: Hoare triple {2586#(or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1))))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {2586#(or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1))))} is VALID [2022-04-07 16:42:42,105 INFO L290 TraceCheckUtils]: 14: Hoare triple {2586#(or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1))))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {2586#(or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1))))} is VALID [2022-04-07 16:42:42,105 INFO L290 TraceCheckUtils]: 13: Hoare triple {2586#(or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1))))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {2586#(or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1))))} is VALID [2022-04-07 16:42:42,106 INFO L290 TraceCheckUtils]: 12: Hoare triple {2586#(or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1))))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {2586#(or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1))))} is VALID [2022-04-07 16:42:42,106 INFO L290 TraceCheckUtils]: 11: Hoare triple {2586#(or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1))))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {2586#(or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1))))} is VALID [2022-04-07 16:42:42,108 INFO L290 TraceCheckUtils]: 10: Hoare triple {2586#(or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1))))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {2586#(or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1))))} is VALID [2022-04-07 16:42:42,109 INFO L290 TraceCheckUtils]: 9: Hoare triple {2586#(or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1))))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {2586#(or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1))))} is VALID [2022-04-07 16:42:42,110 INFO L290 TraceCheckUtils]: 8: Hoare triple {2586#(or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1))))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {2586#(or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1))))} is VALID [2022-04-07 16:42:42,111 INFO L290 TraceCheckUtils]: 7: Hoare triple {2586#(or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1))))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {2586#(or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1))))} is VALID [2022-04-07 16:42:42,113 INFO L290 TraceCheckUtils]: 6: Hoare triple {2586#(or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1))))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {2586#(or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1))))} is VALID [2022-04-07 16:42:42,114 INFO L290 TraceCheckUtils]: 5: Hoare triple {2363#true} [74] mainENTRY-->L18-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (= 5 v_main_~max~0_1) (= v_main_~i~0_1 0) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= (let ((.cse1 (let ((.cse2 (mod v_main_~max~0_1 4294967296))) (ite (<= .cse2 2147483647) .cse2 (+ .cse2 (- 4294967296)))))) (store (store |v_#length_3| |v_main_~#str1~0.base_1| .cse1) |v_main_~#str2~0.base_1| .cse1)) |v_#length_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, main_~max~0=v_main_~max~0_1, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_1, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~#str1~0.base=|v_main_~#str1~0.base_1|, #length=|v_#length_1|} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~max~0, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, #length] {2586#(or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1))))} is VALID [2022-04-07 16:42:42,114 INFO L272 TraceCheckUtils]: 4: Hoare triple {2363#true} [71] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2363#true} is VALID [2022-04-07 16:42:42,114 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2363#true} {2363#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2363#true} is VALID [2022-04-07 16:42:42,114 INFO L290 TraceCheckUtils]: 2: Hoare triple {2363#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2363#true} is VALID [2022-04-07 16:42:42,114 INFO L290 TraceCheckUtils]: 1: Hoare triple {2363#true} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2363#true} is VALID [2022-04-07 16:42:42,114 INFO L272 TraceCheckUtils]: 0: Hoare triple {2363#true} [70] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2363#true} is VALID [2022-04-07 16:42:42,115 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2022-04-07 16:42:42,115 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [327601030] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 16:42:42,115 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 16:42:42,115 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 18, 17] total 37 [2022-04-07 16:42:42,115 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2029919446] [2022-04-07 16:42:42,115 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 16:42:42,116 INFO L78 Accepts]: Start accepts. Automaton has has 37 states, 36 states have (on average 1.7777777777777777) internal successors, (64), 35 states have internal predecessors, (64), 5 states have call successors, (8), 5 states have call predecessors, (8), 2 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) Word has length 39 [2022-04-07 16:42:42,116 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 16:42:42,116 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 37 states, 36 states have (on average 1.7777777777777777) internal successors, (64), 35 states have internal predecessors, (64), 5 states have call successors, (8), 5 states have call predecessors, (8), 2 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-07 16:42:42,330 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 76 edges. 76 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 16:42:42,330 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 37 states [2022-04-07 16:42:42,331 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 16:42:42,331 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2022-04-07 16:42:42,331 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=156, Invalid=1107, Unknown=1, NotChecked=68, Total=1332 [2022-04-07 16:42:42,332 INFO L87 Difference]: Start difference. First operand 42 states and 44 transitions. Second operand has 37 states, 36 states have (on average 1.7777777777777777) internal successors, (64), 35 states have internal predecessors, (64), 5 states have call successors, (8), 5 states have call predecessors, (8), 2 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-07 16:42:46,287 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 16:42:46,288 INFO L93 Difference]: Finished difference Result 67 states and 73 transitions. [2022-04-07 16:42:46,288 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2022-04-07 16:42:46,288 INFO L78 Accepts]: Start accepts. Automaton has has 37 states, 36 states have (on average 1.7777777777777777) internal successors, (64), 35 states have internal predecessors, (64), 5 states have call successors, (8), 5 states have call predecessors, (8), 2 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) Word has length 39 [2022-04-07 16:42:46,288 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 16:42:46,288 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 37 states, 36 states have (on average 1.7777777777777777) internal successors, (64), 35 states have internal predecessors, (64), 5 states have call successors, (8), 5 states have call predecessors, (8), 2 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-07 16:42:46,290 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 67 transitions. [2022-04-07 16:42:46,290 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 37 states, 36 states have (on average 1.7777777777777777) internal successors, (64), 35 states have internal predecessors, (64), 5 states have call successors, (8), 5 states have call predecessors, (8), 2 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-07 16:42:46,291 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 67 transitions. [2022-04-07 16:42:46,291 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 30 states and 67 transitions. [2022-04-07 16:42:46,388 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 67 edges. 67 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 16:42:46,389 INFO L225 Difference]: With dead ends: 67 [2022-04-07 16:42:46,390 INFO L226 Difference]: Without dead ends: 67 [2022-04-07 16:42:46,390 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 115 GetRequests, 53 SyntacticMatches, 2 SemanticMatches, 60 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 806 ImplicationChecksByTransitivity, 6.1s TimeCoverageRelationStatistics Valid=496, Invalid=3167, Unknown=1, NotChecked=118, Total=3782 [2022-04-07 16:42:46,391 INFO L913 BasicCegarLoop]: 14 mSDtfsCounter, 56 mSDsluCounter, 76 mSDsCounter, 0 mSdLazyCounter, 545 mSolverCounterSat, 148 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 56 SdHoareTripleChecker+Valid, 90 SdHoareTripleChecker+Invalid, 838 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 148 IncrementalHoareTripleChecker+Valid, 545 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 145 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2022-04-07 16:42:46,391 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [56 Valid, 90 Invalid, 838 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [148 Valid, 545 Invalid, 0 Unknown, 145 Unchecked, 0.9s Time] [2022-04-07 16:42:46,391 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 67 states. [2022-04-07 16:42:46,401 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 67 to 59. [2022-04-07 16:42:46,401 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 16:42:46,401 INFO L82 GeneralOperation]: Start isEquivalent. First operand 67 states. Second operand has 59 states, 48 states have (on average 1.1041666666666667) internal successors, (53), 50 states have internal predecessors, (53), 6 states have call successors, (6), 5 states have call predecessors, (6), 4 states have return successors, (5), 3 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-07 16:42:46,401 INFO L74 IsIncluded]: Start isIncluded. First operand 67 states. Second operand has 59 states, 48 states have (on average 1.1041666666666667) internal successors, (53), 50 states have internal predecessors, (53), 6 states have call successors, (6), 5 states have call predecessors, (6), 4 states have return successors, (5), 3 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-07 16:42:46,402 INFO L87 Difference]: Start difference. First operand 67 states. Second operand has 59 states, 48 states have (on average 1.1041666666666667) internal successors, (53), 50 states have internal predecessors, (53), 6 states have call successors, (6), 5 states have call predecessors, (6), 4 states have return successors, (5), 3 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-07 16:42:46,403 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 16:42:46,403 INFO L93 Difference]: Finished difference Result 67 states and 73 transitions. [2022-04-07 16:42:46,403 INFO L276 IsEmpty]: Start isEmpty. Operand 67 states and 73 transitions. [2022-04-07 16:42:46,404 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 16:42:46,404 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 16:42:46,404 INFO L74 IsIncluded]: Start isIncluded. First operand has 59 states, 48 states have (on average 1.1041666666666667) internal successors, (53), 50 states have internal predecessors, (53), 6 states have call successors, (6), 5 states have call predecessors, (6), 4 states have return successors, (5), 3 states have call predecessors, (5), 5 states have call successors, (5) Second operand 67 states. [2022-04-07 16:42:46,404 INFO L87 Difference]: Start difference. First operand has 59 states, 48 states have (on average 1.1041666666666667) internal successors, (53), 50 states have internal predecessors, (53), 6 states have call successors, (6), 5 states have call predecessors, (6), 4 states have return successors, (5), 3 states have call predecessors, (5), 5 states have call successors, (5) Second operand 67 states. [2022-04-07 16:42:46,406 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 16:42:46,406 INFO L93 Difference]: Finished difference Result 67 states and 73 transitions. [2022-04-07 16:42:46,406 INFO L276 IsEmpty]: Start isEmpty. Operand 67 states and 73 transitions. [2022-04-07 16:42:46,406 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 16:42:46,406 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 16:42:46,406 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 16:42:46,406 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 16:42:46,406 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 59 states, 48 states have (on average 1.1041666666666667) internal successors, (53), 50 states have internal predecessors, (53), 6 states have call successors, (6), 5 states have call predecessors, (6), 4 states have return successors, (5), 3 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-07 16:42:46,408 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59 states to 59 states and 64 transitions. [2022-04-07 16:42:46,408 INFO L78 Accepts]: Start accepts. Automaton has 59 states and 64 transitions. Word has length 39 [2022-04-07 16:42:46,408 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 16:42:46,408 INFO L478 AbstractCegarLoop]: Abstraction has 59 states and 64 transitions. [2022-04-07 16:42:46,408 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 37 states, 36 states have (on average 1.7777777777777777) internal successors, (64), 35 states have internal predecessors, (64), 5 states have call successors, (8), 5 states have call predecessors, (8), 2 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-07 16:42:46,408 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 64 transitions. [2022-04-07 16:42:46,409 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2022-04-07 16:42:46,409 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 16:42:46,409 INFO L499 BasicCegarLoop]: trace histogram [6, 6, 5, 5, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 16:42:46,425 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2022-04-07 16:42:46,615 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7,6 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 16:42:46,616 INFO L403 AbstractCegarLoop]: === Iteration 9 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 16:42:46,617 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 16:42:46,617 INFO L85 PathProgramCache]: Analyzing trace with hash -821800838, now seen corresponding path program 2 times [2022-04-07 16:42:46,617 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 16:42:46,617 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [167287019] [2022-04-07 16:42:46,617 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 16:42:46,617 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 16:42:46,641 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 16:42:46,791 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 16:42:46,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 16:42:46,798 INFO L290 TraceCheckUtils]: 0: Hoare triple {2966#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2950#true} is VALID [2022-04-07 16:42:46,798 INFO L290 TraceCheckUtils]: 1: Hoare triple {2950#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2950#true} is VALID [2022-04-07 16:42:46,798 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2950#true} {2950#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2950#true} is VALID [2022-04-07 16:42:46,798 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 33 [2022-04-07 16:42:46,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 16:42:46,801 INFO L290 TraceCheckUtils]: 0: Hoare triple {2950#true} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2950#true} is VALID [2022-04-07 16:42:46,802 INFO L290 TraceCheckUtils]: 1: Hoare triple {2950#true} [96] L6-->L6-2: Formula: (not (= v___VERIFIER_assert_~cond_3 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2950#true} is VALID [2022-04-07 16:42:46,802 INFO L290 TraceCheckUtils]: 2: Hoare triple {2950#true} [99] L6-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2950#true} is VALID [2022-04-07 16:42:46,802 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2950#true} {2951#false} [102] __VERIFIER_assertEXIT-->L33-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {2951#false} is VALID [2022-04-07 16:42:46,802 INFO L272 TraceCheckUtils]: 0: Hoare triple {2950#true} [70] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2966#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 16:42:46,802 INFO L290 TraceCheckUtils]: 1: Hoare triple {2966#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2950#true} is VALID [2022-04-07 16:42:46,802 INFO L290 TraceCheckUtils]: 2: Hoare triple {2950#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2950#true} is VALID [2022-04-07 16:42:46,802 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2950#true} {2950#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2950#true} is VALID [2022-04-07 16:42:46,803 INFO L272 TraceCheckUtils]: 4: Hoare triple {2950#true} [71] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2950#true} is VALID [2022-04-07 16:42:46,803 INFO L290 TraceCheckUtils]: 5: Hoare triple {2950#true} [74] mainENTRY-->L18-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (= 5 v_main_~max~0_1) (= v_main_~i~0_1 0) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= (let ((.cse1 (let ((.cse2 (mod v_main_~max~0_1 4294967296))) (ite (<= .cse2 2147483647) .cse2 (+ .cse2 (- 4294967296)))))) (store (store |v_#length_3| |v_main_~#str1~0.base_1| .cse1) |v_main_~#str2~0.base_1| .cse1)) |v_#length_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, main_~max~0=v_main_~max~0_1, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_1, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~#str1~0.base=|v_main_~#str1~0.base_1|, #length=|v_#length_1|} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~max~0, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, #length] {2955#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} is VALID [2022-04-07 16:42:46,804 INFO L290 TraceCheckUtils]: 6: Hoare triple {2955#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {2955#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} is VALID [2022-04-07 16:42:46,804 INFO L290 TraceCheckUtils]: 7: Hoare triple {2955#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {2955#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} is VALID [2022-04-07 16:42:46,804 INFO L290 TraceCheckUtils]: 8: Hoare triple {2955#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {2955#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} is VALID [2022-04-07 16:42:46,805 INFO L290 TraceCheckUtils]: 9: Hoare triple {2955#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {2955#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} is VALID [2022-04-07 16:42:46,805 INFO L290 TraceCheckUtils]: 10: Hoare triple {2955#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {2955#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} is VALID [2022-04-07 16:42:46,806 INFO L290 TraceCheckUtils]: 11: Hoare triple {2955#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {2955#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} is VALID [2022-04-07 16:42:46,806 INFO L290 TraceCheckUtils]: 12: Hoare triple {2955#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {2955#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} is VALID [2022-04-07 16:42:46,806 INFO L290 TraceCheckUtils]: 13: Hoare triple {2955#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {2955#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} is VALID [2022-04-07 16:42:46,807 INFO L290 TraceCheckUtils]: 14: Hoare triple {2955#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {2955#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} is VALID [2022-04-07 16:42:46,807 INFO L290 TraceCheckUtils]: 15: Hoare triple {2955#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {2955#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} is VALID [2022-04-07 16:42:46,808 INFO L290 TraceCheckUtils]: 16: Hoare triple {2955#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} [77] L18-3-->L18-4: Formula: (not (< (mod v_main_~i~0_5 4294967296) (mod v_main_~max~0_4 4294967296))) InVars {main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} OutVars{main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} AuxVars[] AssignedVars[] {2955#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} is VALID [2022-04-07 16:42:46,809 INFO L290 TraceCheckUtils]: 17: Hoare triple {2955#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} [79] L18-4-->L26-3: Formula: (let ((.cse0 (let ((.cse1 (mod (+ 4294967295 v_main_~max~0_6) 4294967296))) (ite (<= .cse1 2147483647) .cse1 (+ .cse1 (- 4294967296)))))) (and (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ .cse0 |v_main_~#str1~0.offset_6|) 0)) |v_#memory_int_4|) (= v_main_~j~0_5 0) (= .cse0 v_main_~i~0_11))) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|} OutVars{main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_5, main_~i~0=v_main_~i~0_11, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {2956#(and (< 0 (div (+ main_~max~0 4294967295) 4294967296)) (or (<= main_~max~0 5) (and (<= main_~max~0 4294967301) (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))))) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (- 1) (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0) 0)) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295) 0))))} is VALID [2022-04-07 16:42:46,810 INFO L290 TraceCheckUtils]: 18: Hoare triple {2956#(and (< 0 (div (+ main_~max~0 4294967295) 4294967296)) (or (<= main_~max~0 5) (and (<= main_~max~0 4294967301) (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))))) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (- 1) (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0) 0)) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295) 0))))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {2956#(and (< 0 (div (+ main_~max~0 4294967295) 4294967296)) (or (<= main_~max~0 5) (and (<= main_~max~0 4294967301) (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))))) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (- 1) (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0) 0)) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295) 0))))} is VALID [2022-04-07 16:42:46,810 INFO L290 TraceCheckUtils]: 19: Hoare triple {2956#(and (< 0 (div (+ main_~max~0 4294967295) 4294967296)) (or (<= main_~max~0 5) (and (<= main_~max~0 4294967301) (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))))) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (- 1) (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0) 0)) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295) 0))))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {2957#(and (<= (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) 4294967299) (< 0 (div (+ main_~max~0 4294967295) 4294967296)))} is VALID [2022-04-07 16:42:46,811 INFO L290 TraceCheckUtils]: 20: Hoare triple {2957#(and (<= (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) 4294967299) (< 0 (div (+ main_~max~0 4294967295) 4294967296)))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {2957#(and (<= (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) 4294967299) (< 0 (div (+ main_~max~0 4294967295) 4294967296)))} is VALID [2022-04-07 16:42:46,811 INFO L290 TraceCheckUtils]: 21: Hoare triple {2957#(and (<= (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) 4294967299) (< 0 (div (+ main_~max~0 4294967295) 4294967296)))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {2958#(and (< 0 (div (+ main_~max~0 4294967295) 4294967296)) (<= (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) 4294967298))} is VALID [2022-04-07 16:42:46,812 INFO L290 TraceCheckUtils]: 22: Hoare triple {2958#(and (< 0 (div (+ main_~max~0 4294967295) 4294967296)) (<= (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) 4294967298))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {2958#(and (< 0 (div (+ main_~max~0 4294967295) 4294967296)) (<= (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) 4294967298))} is VALID [2022-04-07 16:42:46,812 INFO L290 TraceCheckUtils]: 23: Hoare triple {2958#(and (< 0 (div (+ main_~max~0 4294967295) 4294967296)) (<= (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) 4294967298))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {2959#(and (< 0 (div (+ main_~max~0 4294967295) 4294967296)) (<= (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) 4294967297))} is VALID [2022-04-07 16:42:46,813 INFO L290 TraceCheckUtils]: 24: Hoare triple {2959#(and (< 0 (div (+ main_~max~0 4294967295) 4294967296)) (<= (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) 4294967297))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {2959#(and (< 0 (div (+ main_~max~0 4294967295) 4294967296)) (<= (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) 4294967297))} is VALID [2022-04-07 16:42:46,813 INFO L290 TraceCheckUtils]: 25: Hoare triple {2959#(and (< 0 (div (+ main_~max~0 4294967295) 4294967296)) (<= (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) 4294967297))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {2960#(and (<= (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) 4294967296) (< 0 (div (+ main_~max~0 4294967295) 4294967296)))} is VALID [2022-04-07 16:42:46,814 INFO L290 TraceCheckUtils]: 26: Hoare triple {2960#(and (<= (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) 4294967296) (< 0 (div (+ main_~max~0 4294967295) 4294967296)))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {2960#(and (<= (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) 4294967296) (< 0 (div (+ main_~max~0 4294967295) 4294967296)))} is VALID [2022-04-07 16:42:46,814 INFO L290 TraceCheckUtils]: 27: Hoare triple {2960#(and (<= (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) 4294967296) (< 0 (div (+ main_~max~0 4294967295) 4294967296)))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {2961#(and (<= (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) 4294967295) (< 0 (div (+ main_~max~0 4294967295) 4294967296)))} is VALID [2022-04-07 16:42:46,815 INFO L290 TraceCheckUtils]: 28: Hoare triple {2961#(and (<= (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) 4294967295) (< 0 (div (+ main_~max~0 4294967295) 4294967296)))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {2951#false} is VALID [2022-04-07 16:42:46,815 INFO L290 TraceCheckUtils]: 29: Hoare triple {2951#false} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {2951#false} is VALID [2022-04-07 16:42:46,815 INFO L290 TraceCheckUtils]: 30: Hoare triple {2951#false} [82] L26-3-->L26-4: Formula: (not (<= 0 v_main_~i~0_12)) InVars {main_~i~0=v_main_~i~0_12} OutVars{main_~i~0=v_main_~i~0_12} AuxVars[] AssignedVars[] {2951#false} is VALID [2022-04-07 16:42:46,815 INFO L290 TraceCheckUtils]: 31: Hoare triple {2951#false} [84] L26-4-->L32-3: Formula: (and (= v_main_~j~0_8 (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_7) 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))))) (= v_main_~i~0_16 0)) InVars {main_~max~0=v_main_~max~0_7} OutVars{main_~i~0=v_main_~i~0_16, main_~max~0=v_main_~max~0_7, main_~j~0=v_main_~j~0_8} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {2951#false} is VALID [2022-04-07 16:42:46,815 INFO L290 TraceCheckUtils]: 32: Hoare triple {2951#false} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {2951#false} is VALID [2022-04-07 16:42:46,815 INFO L272 TraceCheckUtils]: 33: Hoare triple {2951#false} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {2950#true} is VALID [2022-04-07 16:42:46,816 INFO L290 TraceCheckUtils]: 34: Hoare triple {2950#true} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2950#true} is VALID [2022-04-07 16:42:46,816 INFO L290 TraceCheckUtils]: 35: Hoare triple {2950#true} [96] L6-->L6-2: Formula: (not (= v___VERIFIER_assert_~cond_3 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2950#true} is VALID [2022-04-07 16:42:46,816 INFO L290 TraceCheckUtils]: 36: Hoare triple {2950#true} [99] L6-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2950#true} is VALID [2022-04-07 16:42:46,816 INFO L284 TraceCheckUtils]: 37: Hoare quadruple {2950#true} {2951#false} [102] __VERIFIER_assertEXIT-->L33-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {2951#false} is VALID [2022-04-07 16:42:46,816 INFO L290 TraceCheckUtils]: 38: Hoare triple {2951#false} [92] L33-1-->L32-2: Formula: (= (+ v_main_~j~0_3 1) v_main_~j~0_4) InVars {main_~j~0=v_main_~j~0_4} OutVars{main_#t~post12=|v_main_#t~post12_1|, main_#t~mem10=|v_main_#t~mem10_3|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_3|} AuxVars[] AssignedVars[main_#t~mem10, main_~j~0, main_#t~mem11, main_#t~post12] {2951#false} is VALID [2022-04-07 16:42:46,816 INFO L290 TraceCheckUtils]: 39: Hoare triple {2951#false} [94] L32-2-->L32-3: Formula: (= v_main_~i~0_7 (+ v_main_~i~0_8 1)) InVars {main_~i~0=v_main_~i~0_8} OutVars{main_~i~0=v_main_~i~0_7, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post9] {2951#false} is VALID [2022-04-07 16:42:46,816 INFO L290 TraceCheckUtils]: 40: Hoare triple {2951#false} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {2951#false} is VALID [2022-04-07 16:42:46,816 INFO L272 TraceCheckUtils]: 41: Hoare triple {2951#false} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {2951#false} is VALID [2022-04-07 16:42:46,816 INFO L290 TraceCheckUtils]: 42: Hoare triple {2951#false} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2951#false} is VALID [2022-04-07 16:42:46,816 INFO L290 TraceCheckUtils]: 43: Hoare triple {2951#false} [95] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2951#false} is VALID [2022-04-07 16:42:46,816 INFO L290 TraceCheckUtils]: 44: Hoare triple {2951#false} [97] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2951#false} is VALID [2022-04-07 16:42:46,817 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 29 proven. 9 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2022-04-07 16:42:46,817 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 16:42:46,817 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [167287019] [2022-04-07 16:42:46,817 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [167287019] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 16:42:46,817 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1671406882] [2022-04-07 16:42:46,817 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-07 16:42:46,817 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 16:42:46,817 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 16:42:46,818 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 16:42:46,818 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-04-07 16:42:46,887 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-07 16:42:46,887 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 16:42:46,889 INFO L263 TraceCheckSpWp]: Trace formula consists of 216 conjuncts, 75 conjunts are in the unsatisfiable core [2022-04-07 16:42:46,908 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 16:42:46,909 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 16:42:46,924 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 8 [2022-04-07 16:42:46,972 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2022-04-07 16:42:47,015 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2022-04-07 16:42:47,056 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2022-04-07 16:42:47,105 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2022-04-07 16:42:47,172 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 49 [2022-04-07 16:42:47,177 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 13 [2022-04-07 16:42:47,182 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 14 [2022-04-07 16:42:47,238 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-04-07 16:42:47,348 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-04-07 16:42:47,465 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-04-07 16:42:47,584 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-04-07 16:42:47,718 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 20 [2022-04-07 16:42:47,883 INFO L356 Elim1Store]: treesize reduction 27, result has 25.0 percent of original size [2022-04-07 16:42:47,884 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 30 treesize of output 32 [2022-04-07 16:42:52,416 WARN L855 $PredicateComparison]: unable to prove that (exists ((aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 Int) (|v_main_~#str2~0.base_BEFORE_CALL_3| Int) (aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 Int) (aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119 Int) (aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 Int) (|v_main_~#str2~0.offset_BEFORE_CALL_3| Int) (|v_main_~#str1~0.base_BEFORE_CALL_3| Int) (aux_div_v_main_~j~0_BEFORE_CALL_3_56 Int)) (let ((.cse1 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296))) (let ((.cse0 (+ .cse1 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172))) (and (<= .cse0 (+ (* 4294967296 aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119) 5)) (<= .cse0 (* aux_div_v_main_~j~0_BEFORE_CALL_3_56 4294967296)) (< 0 (+ 4294967291 .cse1 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172)) (< aux_div_v_main_~j~0_BEFORE_CALL_3_56 (+ aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 1)) (= (select (select |c_#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_3|) (+ (mod (+ (* 4294967295 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) 5) 4294967296) (- 4))) (select (select |c_#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_3|) (+ |v_main_~#str2~0.offset_BEFORE_CALL_3| 4))) (<= .cse0 5) (not (= |v_main_~#str2~0.base_BEFORE_CALL_3| |v_main_~#str1~0.base_BEFORE_CALL_3|)) (< aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119 (+ aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 1)) (<= 0 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (<= (* aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 4294967296) (+ 4294967290 .cse1 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172)))))) is different from true [2022-04-07 16:42:59,803 INFO L173 IndexEqualityManager]: detected equality via solver [2022-04-07 16:42:59,809 INFO L356 Elim1Store]: treesize reduction 15, result has 16.7 percent of original size [2022-04-07 16:42:59,809 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 1 disjoint index pairs (out of 6 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 13 [2022-04-07 16:43:00,303 INFO L272 TraceCheckUtils]: 0: Hoare triple {2950#true} [70] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2950#true} is VALID [2022-04-07 16:43:00,303 INFO L290 TraceCheckUtils]: 1: Hoare triple {2950#true} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2950#true} is VALID [2022-04-07 16:43:00,303 INFO L290 TraceCheckUtils]: 2: Hoare triple {2950#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2950#true} is VALID [2022-04-07 16:43:00,304 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2950#true} {2950#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2950#true} is VALID [2022-04-07 16:43:00,304 INFO L272 TraceCheckUtils]: 4: Hoare triple {2950#true} [71] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2950#true} is VALID [2022-04-07 16:43:00,304 INFO L290 TraceCheckUtils]: 5: Hoare triple {2950#true} [74] mainENTRY-->L18-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (= 5 v_main_~max~0_1) (= v_main_~i~0_1 0) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (= (let ((.cse1 (let ((.cse2 (mod v_main_~max~0_1 4294967296))) (ite (<= .cse2 2147483647) .cse2 (+ .cse2 (- 4294967296)))))) (store (store |v_#length_3| |v_main_~#str1~0.base_1| .cse1) |v_main_~#str2~0.base_1| .cse1)) |v_#length_1|) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, main_~max~0=v_main_~max~0_1, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_1, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~#str1~0.base=|v_main_~#str1~0.base_1|, #length=|v_#length_1|} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~max~0, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, #length] {2985#(and (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:43:00,305 INFO L290 TraceCheckUtils]: 6: Hoare triple {2985#(and (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {2985#(and (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:43:00,305 INFO L290 TraceCheckUtils]: 7: Hoare triple {2985#(and (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {2992#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ (- 1) main_~i~0) 0))} is VALID [2022-04-07 16:43:00,306 INFO L290 TraceCheckUtils]: 8: Hoare triple {2992#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ (- 1) main_~i~0) 0))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {2992#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ (- 1) main_~i~0) 0))} is VALID [2022-04-07 16:43:00,306 INFO L290 TraceCheckUtils]: 9: Hoare triple {2992#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ (- 1) main_~i~0) 0))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {2999#(and (<= 2 main_~i~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:43:00,307 INFO L290 TraceCheckUtils]: 10: Hoare triple {2999#(and (<= 2 main_~i~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {2999#(and (<= 2 main_~i~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:43:00,307 INFO L290 TraceCheckUtils]: 11: Hoare triple {2999#(and (<= 2 main_~i~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {3006#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 3 main_~i~0))} is VALID [2022-04-07 16:43:00,307 INFO L290 TraceCheckUtils]: 12: Hoare triple {3006#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 3 main_~i~0))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {3006#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 3 main_~i~0))} is VALID [2022-04-07 16:43:00,308 INFO L290 TraceCheckUtils]: 13: Hoare triple {3006#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 3 main_~i~0))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {3013#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 4 main_~i~0))} is VALID [2022-04-07 16:43:00,308 INFO L290 TraceCheckUtils]: 14: Hoare triple {3013#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 4 main_~i~0))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {3017#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:43:00,309 INFO L290 TraceCheckUtils]: 15: Hoare triple {3017#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {3017#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:43:00,309 INFO L290 TraceCheckUtils]: 16: Hoare triple {3017#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [77] L18-3-->L18-4: Formula: (not (< (mod v_main_~i~0_5 4294967296) (mod v_main_~max~0_4 4294967296))) InVars {main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} OutVars{main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} AuxVars[] AssignedVars[] {3017#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:43:00,310 INFO L290 TraceCheckUtils]: 17: Hoare triple {3017#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [79] L18-4-->L26-3: Formula: (let ((.cse0 (let ((.cse1 (mod (+ 4294967295 v_main_~max~0_6) 4294967296))) (ite (<= .cse1 2147483647) .cse1 (+ .cse1 (- 4294967296)))))) (and (= (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ .cse0 |v_main_~#str1~0.offset_6|) 0)) |v_#memory_int_4|) (= v_main_~j~0_5 0) (= .cse0 v_main_~i~0_11))) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|} OutVars{main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_5, main_~i~0=v_main_~i~0_11, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {3027#(and (= |main_~#str1~0.offset| 0) (= main_~j~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~i~0)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= main_~i~0 (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} is VALID [2022-04-07 16:43:00,311 INFO L290 TraceCheckUtils]: 18: Hoare triple {3027#(and (= |main_~#str1~0.offset| 0) (= main_~j~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~i~0)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= main_~i~0 (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {3031#(and (= main_~j~0 1) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~i~0)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= main_~i~0 (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} is VALID [2022-04-07 16:43:00,311 INFO L290 TraceCheckUtils]: 19: Hoare triple {3031#(and (= main_~j~0 1) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~i~0)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= main_~i~0 (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {3035#(and (or (and (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 1)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) (+ main_~i~0 1)))) (= main_~j~0 1) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:43:00,312 INFO L290 TraceCheckUtils]: 20: Hoare triple {3035#(and (or (and (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 1)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) (+ main_~i~0 1)))) (= main_~j~0 1) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {3039#(and (or (and (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 1)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) (+ main_~i~0 1)))) (= |main_~#str1~0.offset| 0) (= main_~j~0 2) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:43:00,313 INFO L290 TraceCheckUtils]: 21: Hoare triple {3039#(and (or (and (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 1)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) (+ main_~i~0 1)))) (= |main_~#str1~0.offset| 0) (= main_~j~0 2) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {3043#(and (or (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ main_~i~0 2) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)))) (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 2)))) (= |main_~#str1~0.offset| 0) (= main_~j~0 2) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:43:00,314 INFO L290 TraceCheckUtils]: 22: Hoare triple {3043#(and (or (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ main_~i~0 2) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)))) (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 2)))) (= |main_~#str1~0.offset| 0) (= main_~j~0 2) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {3047#(and (= main_~j~0 3) (or (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ main_~i~0 2) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)))) (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 2)))) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:43:00,314 INFO L290 TraceCheckUtils]: 23: Hoare triple {3047#(and (= main_~j~0 3) (or (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ main_~i~0 2) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)))) (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 2)))) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {3051#(and (= main_~j~0 3) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 3))) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ main_~i~0 3) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} is VALID [2022-04-07 16:43:00,315 INFO L290 TraceCheckUtils]: 24: Hoare triple {3051#(and (= main_~j~0 3) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 3))) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ main_~i~0 3) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {3055#(and (= |main_~#str1~0.offset| 0) (= main_~j~0 4) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 3))) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ main_~i~0 3) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} is VALID [2022-04-07 16:43:00,316 INFO L290 TraceCheckUtils]: 25: Hoare triple {3055#(and (= |main_~#str1~0.offset| 0) (= main_~j~0 4) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 3))) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ main_~i~0 3) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {3059#(and (= |main_~#str1~0.offset| 0) (= main_~j~0 4) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (+ main_~i~0 4) (mod (+ main_~max~0 4294967295) 4294967296))) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ main_~i~0 4) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:43:00,320 INFO L290 TraceCheckUtils]: 26: Hoare triple {3059#(and (= |main_~#str1~0.offset| 0) (= main_~j~0 4) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (+ main_~i~0 4) (mod (+ main_~max~0 4294967295) 4294967296))) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ main_~i~0 4) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {3063#(and (= |main_~#str1~0.offset| 0) (= (+ (- 1) main_~j~0) 4) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (+ main_~i~0 4) (mod (+ main_~max~0 4294967295) 4294967296))) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ main_~i~0 4) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:43:00,321 INFO L290 TraceCheckUtils]: 27: Hoare triple {3063#(and (= |main_~#str1~0.offset| 0) (= (+ (- 1) main_~j~0) 4) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (+ main_~i~0 4) (mod (+ main_~max~0 4294967295) 4294967296))) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ main_~i~0 4) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {3067#(and (or (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ 5 main_~i~0) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)))) (and (= (+ 5 main_~i~0) (mod (+ main_~max~0 4294967295) 4294967296)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647))) (= |main_~#str1~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1))) (= (+ (- 1) main_~j~0) 4) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:43:00,322 INFO L290 TraceCheckUtils]: 28: Hoare triple {3067#(and (or (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ 5 main_~i~0) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)))) (and (= (+ 5 main_~i~0) (mod (+ main_~max~0 4294967295) 4294967296)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647))) (= |main_~#str1~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1))) (= (+ (- 1) main_~j~0) 4) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {3071#(and (= (+ 5 main_~i~0) (mod (+ main_~max~0 4294967295) 4294967296)) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4))) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= |main_~#str1~0.offset| 0) (<= 0 main_~i~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:43:00,323 INFO L290 TraceCheckUtils]: 29: Hoare triple {3071#(and (= (+ 5 main_~i~0) (mod (+ main_~max~0 4294967295) 4294967296)) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4))) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= |main_~#str1~0.offset| 0) (<= 0 main_~i~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {3075#(and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4))) (= |main_~#str1~0.offset| 0) (<= 5 (mod (+ main_~max~0 4294967295) 4294967296)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 6)))} is VALID [2022-04-07 16:43:00,324 INFO L290 TraceCheckUtils]: 30: Hoare triple {3075#(and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4))) (= |main_~#str1~0.offset| 0) (<= 5 (mod (+ main_~max~0 4294967295) 4294967296)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 6)))} [82] L26-3-->L26-4: Formula: (not (<= 0 v_main_~i~0_12)) InVars {main_~i~0=v_main_~i~0_12} OutVars{main_~i~0=v_main_~i~0_12} AuxVars[] AssignedVars[] {3079#(and (< (mod (+ main_~max~0 4294967295) 4294967296) 6) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4))) (= |main_~#str1~0.offset| 0) (<= 5 (mod (+ main_~max~0 4294967295) 4294967296)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 16:43:00,326 INFO L290 TraceCheckUtils]: 31: Hoare triple {3079#(and (< (mod (+ main_~max~0 4294967295) 4294967296) 6) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4))) (= |main_~#str1~0.offset| 0) (<= 5 (mod (+ main_~max~0 4294967295) 4294967296)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [84] L26-4-->L32-3: Formula: (and (= v_main_~j~0_8 (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_7) 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))))) (= v_main_~i~0_16 0)) InVars {main_~max~0=v_main_~max~0_7} OutVars{main_~i~0=v_main_~i~0_16, main_~max~0=v_main_~max~0_7, main_~j~0=v_main_~j~0_8} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {3083#(and (< (div (+ main_~j~0 (- 5)) (- 4294967296)) (+ (div (+ 4294967295 (* (- 1) main_~j~0)) 4294967296) 1)) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< main_~j~0 4294967296) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4)) (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod main_~j~0 4294967296) (- 4) |main_~#str1~0.offset|))) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (< (div main_~j~0 (- 4294967296)) (+ (div (+ 5 (* (- 1) main_~j~0)) 4294967296) 1)))} is VALID [2022-04-07 16:43:00,326 INFO L290 TraceCheckUtils]: 32: Hoare triple {3083#(and (< (div (+ main_~j~0 (- 5)) (- 4294967296)) (+ (div (+ 4294967295 (* (- 1) main_~j~0)) 4294967296) 1)) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< main_~j~0 4294967296) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4)) (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod main_~j~0 4294967296) (- 4) |main_~#str1~0.offset|))) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (< (div main_~j~0 (- 4294967296)) (+ (div (+ 5 (* (- 1) main_~j~0)) 4294967296) 1)))} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {3083#(and (< (div (+ main_~j~0 (- 5)) (- 4294967296)) (+ (div (+ 4294967295 (* (- 1) main_~j~0)) 4294967296) 1)) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< main_~j~0 4294967296) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4)) (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod main_~j~0 4294967296) (- 4) |main_~#str1~0.offset|))) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (< (div main_~j~0 (- 4294967296)) (+ (div (+ 5 (* (- 1) main_~j~0)) 4294967296) 1)))} is VALID [2022-04-07 16:43:00,443 INFO L272 TraceCheckUtils]: 33: Hoare triple {3083#(and (< (div (+ main_~j~0 (- 5)) (- 4294967296)) (+ (div (+ 4294967295 (* (- 1) main_~j~0)) 4294967296) 1)) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< main_~j~0 4294967296) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4)) (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod main_~j~0 4294967296) (- 4) |main_~#str1~0.offset|))) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (< (div main_~j~0 (- 4294967296)) (+ (div (+ 5 (* (- 1) main_~j~0)) 4294967296) 1)))} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {3090#(exists ((aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 Int) (|v_main_~#str2~0.base_BEFORE_CALL_3| Int) (aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 Int) (aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119 Int) (aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 Int) (|v_main_~#str2~0.offset_BEFORE_CALL_3| Int) (|v_main_~#str1~0.base_BEFORE_CALL_3| Int) (aux_div_v_main_~j~0_BEFORE_CALL_3_56 Int)) (and (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (+ (* 4294967296 aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119) 5)) (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (* aux_div_v_main_~j~0_BEFORE_CALL_3_56 4294967296)) (< 0 (+ 4294967291 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172)) (< aux_div_v_main_~j~0_BEFORE_CALL_3_56 (+ aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 1)) (= (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_3|) (+ |v_main_~#str2~0.offset_BEFORE_CALL_3| 4)) (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_3|) (+ (mod (+ (* 4294967295 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) 5) 4294967296) (- 4)))) (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) 5) (not (= |v_main_~#str2~0.base_BEFORE_CALL_3| |v_main_~#str1~0.base_BEFORE_CALL_3|)) (< aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119 (+ aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 1)) (<= 0 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (<= (* aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 4294967296) (+ 4294967290 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172))))} is VALID [2022-04-07 16:43:00,448 INFO L290 TraceCheckUtils]: 34: Hoare triple {3090#(exists ((aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 Int) (|v_main_~#str2~0.base_BEFORE_CALL_3| Int) (aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 Int) (aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119 Int) (aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 Int) (|v_main_~#str2~0.offset_BEFORE_CALL_3| Int) (|v_main_~#str1~0.base_BEFORE_CALL_3| Int) (aux_div_v_main_~j~0_BEFORE_CALL_3_56 Int)) (and (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (+ (* 4294967296 aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119) 5)) (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (* aux_div_v_main_~j~0_BEFORE_CALL_3_56 4294967296)) (< 0 (+ 4294967291 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172)) (< aux_div_v_main_~j~0_BEFORE_CALL_3_56 (+ aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 1)) (= (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_3|) (+ |v_main_~#str2~0.offset_BEFORE_CALL_3| 4)) (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_3|) (+ (mod (+ (* 4294967295 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) 5) 4294967296) (- 4)))) (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) 5) (not (= |v_main_~#str2~0.base_BEFORE_CALL_3| |v_main_~#str1~0.base_BEFORE_CALL_3|)) (< aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119 (+ aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 1)) (<= 0 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (<= (* aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 4294967296) (+ 4294967290 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172))))} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3090#(exists ((aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 Int) (|v_main_~#str2~0.base_BEFORE_CALL_3| Int) (aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 Int) (aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119 Int) (aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 Int) (|v_main_~#str2~0.offset_BEFORE_CALL_3| Int) (|v_main_~#str1~0.base_BEFORE_CALL_3| Int) (aux_div_v_main_~j~0_BEFORE_CALL_3_56 Int)) (and (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (+ (* 4294967296 aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119) 5)) (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (* aux_div_v_main_~j~0_BEFORE_CALL_3_56 4294967296)) (< 0 (+ 4294967291 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172)) (< aux_div_v_main_~j~0_BEFORE_CALL_3_56 (+ aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 1)) (= (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_3|) (+ |v_main_~#str2~0.offset_BEFORE_CALL_3| 4)) (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_3|) (+ (mod (+ (* 4294967295 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) 5) 4294967296) (- 4)))) (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) 5) (not (= |v_main_~#str2~0.base_BEFORE_CALL_3| |v_main_~#str1~0.base_BEFORE_CALL_3|)) (< aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119 (+ aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 1)) (<= 0 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (<= (* aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 4294967296) (+ 4294967290 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172))))} is VALID [2022-04-07 16:43:00,452 INFO L290 TraceCheckUtils]: 35: Hoare triple {3090#(exists ((aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 Int) (|v_main_~#str2~0.base_BEFORE_CALL_3| Int) (aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 Int) (aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119 Int) (aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 Int) (|v_main_~#str2~0.offset_BEFORE_CALL_3| Int) (|v_main_~#str1~0.base_BEFORE_CALL_3| Int) (aux_div_v_main_~j~0_BEFORE_CALL_3_56 Int)) (and (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (+ (* 4294967296 aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119) 5)) (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (* aux_div_v_main_~j~0_BEFORE_CALL_3_56 4294967296)) (< 0 (+ 4294967291 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172)) (< aux_div_v_main_~j~0_BEFORE_CALL_3_56 (+ aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 1)) (= (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_3|) (+ |v_main_~#str2~0.offset_BEFORE_CALL_3| 4)) (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_3|) (+ (mod (+ (* 4294967295 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) 5) 4294967296) (- 4)))) (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) 5) (not (= |v_main_~#str2~0.base_BEFORE_CALL_3| |v_main_~#str1~0.base_BEFORE_CALL_3|)) (< aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119 (+ aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 1)) (<= 0 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (<= (* aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 4294967296) (+ 4294967290 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172))))} [96] L6-->L6-2: Formula: (not (= v___VERIFIER_assert_~cond_3 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {3090#(exists ((aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 Int) (|v_main_~#str2~0.base_BEFORE_CALL_3| Int) (aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 Int) (aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119 Int) (aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 Int) (|v_main_~#str2~0.offset_BEFORE_CALL_3| Int) (|v_main_~#str1~0.base_BEFORE_CALL_3| Int) (aux_div_v_main_~j~0_BEFORE_CALL_3_56 Int)) (and (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (+ (* 4294967296 aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119) 5)) (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (* aux_div_v_main_~j~0_BEFORE_CALL_3_56 4294967296)) (< 0 (+ 4294967291 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172)) (< aux_div_v_main_~j~0_BEFORE_CALL_3_56 (+ aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 1)) (= (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_3|) (+ |v_main_~#str2~0.offset_BEFORE_CALL_3| 4)) (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_3|) (+ (mod (+ (* 4294967295 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) 5) 4294967296) (- 4)))) (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) 5) (not (= |v_main_~#str2~0.base_BEFORE_CALL_3| |v_main_~#str1~0.base_BEFORE_CALL_3|)) (< aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119 (+ aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 1)) (<= 0 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (<= (* aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 4294967296) (+ 4294967290 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172))))} is VALID [2022-04-07 16:43:00,456 INFO L290 TraceCheckUtils]: 36: Hoare triple {3090#(exists ((aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 Int) (|v_main_~#str2~0.base_BEFORE_CALL_3| Int) (aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 Int) (aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119 Int) (aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 Int) (|v_main_~#str2~0.offset_BEFORE_CALL_3| Int) (|v_main_~#str1~0.base_BEFORE_CALL_3| Int) (aux_div_v_main_~j~0_BEFORE_CALL_3_56 Int)) (and (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (+ (* 4294967296 aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119) 5)) (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (* aux_div_v_main_~j~0_BEFORE_CALL_3_56 4294967296)) (< 0 (+ 4294967291 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172)) (< aux_div_v_main_~j~0_BEFORE_CALL_3_56 (+ aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 1)) (= (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_3|) (+ |v_main_~#str2~0.offset_BEFORE_CALL_3| 4)) (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_3|) (+ (mod (+ (* 4294967295 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) 5) 4294967296) (- 4)))) (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) 5) (not (= |v_main_~#str2~0.base_BEFORE_CALL_3| |v_main_~#str1~0.base_BEFORE_CALL_3|)) (< aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119 (+ aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 1)) (<= 0 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (<= (* aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 4294967296) (+ 4294967290 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172))))} [99] L6-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3090#(exists ((aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 Int) (|v_main_~#str2~0.base_BEFORE_CALL_3| Int) (aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 Int) (aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119 Int) (aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 Int) (|v_main_~#str2~0.offset_BEFORE_CALL_3| Int) (|v_main_~#str1~0.base_BEFORE_CALL_3| Int) (aux_div_v_main_~j~0_BEFORE_CALL_3_56 Int)) (and (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (+ (* 4294967296 aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119) 5)) (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (* aux_div_v_main_~j~0_BEFORE_CALL_3_56 4294967296)) (< 0 (+ 4294967291 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172)) (< aux_div_v_main_~j~0_BEFORE_CALL_3_56 (+ aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 1)) (= (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_3|) (+ |v_main_~#str2~0.offset_BEFORE_CALL_3| 4)) (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_3|) (+ (mod (+ (* 4294967295 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) 5) 4294967296) (- 4)))) (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) 5) (not (= |v_main_~#str2~0.base_BEFORE_CALL_3| |v_main_~#str1~0.base_BEFORE_CALL_3|)) (< aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119 (+ aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 1)) (<= 0 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (<= (* aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 4294967296) (+ 4294967290 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172))))} is VALID [2022-04-07 16:43:00,457 INFO L284 TraceCheckUtils]: 37: Hoare quadruple {3090#(exists ((aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 Int) (|v_main_~#str2~0.base_BEFORE_CALL_3| Int) (aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 Int) (aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119 Int) (aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 Int) (|v_main_~#str2~0.offset_BEFORE_CALL_3| Int) (|v_main_~#str1~0.base_BEFORE_CALL_3| Int) (aux_div_v_main_~j~0_BEFORE_CALL_3_56 Int)) (and (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (+ (* 4294967296 aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119) 5)) (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (* aux_div_v_main_~j~0_BEFORE_CALL_3_56 4294967296)) (< 0 (+ 4294967291 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172)) (< aux_div_v_main_~j~0_BEFORE_CALL_3_56 (+ aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 1)) (= (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_3|) (+ |v_main_~#str2~0.offset_BEFORE_CALL_3| 4)) (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_3|) (+ (mod (+ (* 4294967295 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) 5) 4294967296) (- 4)))) (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) 5) (not (= |v_main_~#str2~0.base_BEFORE_CALL_3| |v_main_~#str1~0.base_BEFORE_CALL_3|)) (< aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119 (+ aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 1)) (<= 0 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (<= (* aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 4294967296) (+ 4294967290 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172))))} {3083#(and (< (div (+ main_~j~0 (- 5)) (- 4294967296)) (+ (div (+ 4294967295 (* (- 1) main_~j~0)) 4294967296) 1)) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< main_~j~0 4294967296) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4)) (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod main_~j~0 4294967296) (- 4) |main_~#str1~0.offset|))) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (< (div main_~j~0 (- 4294967296)) (+ (div (+ 5 (* (- 1) main_~j~0)) 4294967296) 1)))} [102] __VERIFIER_assertEXIT-->L33-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {3083#(and (< (div (+ main_~j~0 (- 5)) (- 4294967296)) (+ (div (+ 4294967295 (* (- 1) main_~j~0)) 4294967296) 1)) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< main_~j~0 4294967296) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4)) (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod main_~j~0 4294967296) (- 4) |main_~#str1~0.offset|))) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (< (div main_~j~0 (- 4294967296)) (+ (div (+ 5 (* (- 1) main_~j~0)) 4294967296) 1)))} is VALID [2022-04-07 16:43:00,458 INFO L290 TraceCheckUtils]: 38: Hoare triple {3083#(and (< (div (+ main_~j~0 (- 5)) (- 4294967296)) (+ (div (+ 4294967295 (* (- 1) main_~j~0)) 4294967296) 1)) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< main_~j~0 4294967296) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4)) (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod main_~j~0 4294967296) (- 4) |main_~#str1~0.offset|))) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (< (div main_~j~0 (- 4294967296)) (+ (div (+ 5 (* (- 1) main_~j~0)) 4294967296) 1)))} [92] L33-1-->L32-2: Formula: (= (+ v_main_~j~0_3 1) v_main_~j~0_4) InVars {main_~j~0=v_main_~j~0_4} OutVars{main_#t~post12=|v_main_#t~post12_1|, main_#t~mem10=|v_main_#t~mem10_3|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_3|} AuxVars[] AssignedVars[main_#t~mem10, main_~j~0, main_#t~mem11, main_#t~post12] {3106#(and (= (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4)) (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod (+ main_~j~0 1) 4294967296) (- 4) |main_~#str1~0.offset|))) (<= 0 (+ main_~j~0 1)) (= |main_~#str1~0.offset| 0) (< main_~j~0 4294967295) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (< (div (+ main_~j~0 (- 4)) (- 4294967296)) (+ (div (+ 4294967294 (* (- 1) main_~j~0)) 4294967296) 1)) (< (div (+ main_~j~0 1) (- 4294967296)) (+ (div (+ (* (- 1) main_~j~0) 4) 4294967296) 1)))} is VALID [2022-04-07 16:43:00,466 INFO L290 TraceCheckUtils]: 39: Hoare triple {3106#(and (= (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4)) (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod (+ main_~j~0 1) 4294967296) (- 4) |main_~#str1~0.offset|))) (<= 0 (+ main_~j~0 1)) (= |main_~#str1~0.offset| 0) (< main_~j~0 4294967295) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (< (div (+ main_~j~0 (- 4)) (- 4294967296)) (+ (div (+ 4294967294 (* (- 1) main_~j~0)) 4294967296) 1)) (< (div (+ main_~j~0 1) (- 4294967296)) (+ (div (+ (* (- 1) main_~j~0) 4) 4294967296) 1)))} [94] L32-2-->L32-3: Formula: (= v_main_~i~0_7 (+ v_main_~i~0_8 1)) InVars {main_~i~0=v_main_~i~0_8} OutVars{main_~i~0=v_main_~i~0_7, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post9] {3110#(and (= (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4)) (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod (+ main_~j~0 1) 4294967296) (- 4) |main_~#str1~0.offset|))) (<= 0 (+ main_~j~0 1)) (= |main_~#str1~0.offset| 0) (= main_~i~0 1) (< main_~j~0 4294967295) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (< (div (+ main_~j~0 (- 4)) (- 4294967296)) (+ (div (+ 4294967294 (* (- 1) main_~j~0)) 4294967296) 1)) (< (div (+ main_~j~0 1) (- 4294967296)) (+ (div (+ (* (- 1) main_~j~0) 4) 4294967296) 1)))} is VALID [2022-04-07 16:43:00,471 INFO L290 TraceCheckUtils]: 40: Hoare triple {3110#(and (= (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4)) (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod (+ main_~j~0 1) 4294967296) (- 4) |main_~#str1~0.offset|))) (<= 0 (+ main_~j~0 1)) (= |main_~#str1~0.offset| 0) (= main_~i~0 1) (< main_~j~0 4294967295) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (< (div (+ main_~j~0 (- 4)) (- 4294967296)) (+ (div (+ 4294967294 (* (- 1) main_~j~0)) 4294967296) 1)) (< (div (+ main_~j~0 1) (- 4294967296)) (+ (div (+ (* (- 1) main_~j~0) 4) 4294967296) 1)))} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {3114#(= |main_#t~mem11| |main_#t~mem10|)} is VALID [2022-04-07 16:43:00,472 INFO L272 TraceCheckUtils]: 41: Hoare triple {3114#(= |main_#t~mem11| |main_#t~mem10|)} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {3118#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 16:43:00,472 INFO L290 TraceCheckUtils]: 42: Hoare triple {3118#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3122#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 16:43:00,472 INFO L290 TraceCheckUtils]: 43: Hoare triple {3122#(<= 1 __VERIFIER_assert_~cond)} [95] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2951#false} is VALID [2022-04-07 16:43:00,473 INFO L290 TraceCheckUtils]: 44: Hoare triple {2951#false} [97] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2951#false} is VALID [2022-04-07 16:43:00,473 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 4 proven. 59 refuted. 0 times theorem prover too weak. 0 trivial. 2 not checked. [2022-04-07 16:43:00,473 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 16:43:11,723 WARN L232 SmtUtils]: Spent 10.48s on a formula simplification that was a NOOP. DAG size: 47 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 16:43:22,253 WARN L232 SmtUtils]: Spent 10.37s on a formula simplification that was a NOOP. DAG size: 48 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 16:43:22,574 WARN L833 $PredicateComparison]: unable to prove that (or (<= 4 c_main_~i~0) (not (<= 3 c_main_~i~0)) (let ((.cse1 (<= (mod (+ 4294967295 c_main_~max~0) 4294967296) 2147483647))) (and (or (forall ((v_ArrVal_311 Int) (v_ArrVal_307 (Array Int Int)) (|main_~#str2~0.offset| Int)) (let ((.cse0 (store (store v_ArrVal_307 (+ |main_~#str2~0.offset| c_main_~j~0 1) (select (select (store |c_#memory_int| |c_main_~#str2~0.base| v_ArrVal_307) |c_main_~#str1~0.base|) (+ |c_main_~#str1~0.offset| c_main_~i~0 (- 2)))) (+ 2 |main_~#str2~0.offset| c_main_~j~0) v_ArrVal_311))) (= (select (select (store |c_#memory_int| |c_main_~#str2~0.base| .cse0) |c_main_~#str1~0.base|) (+ |c_main_~#str1~0.offset| 1)) (select .cse0 (+ |main_~#str2~0.offset| (- 4294967297) (mod (+ 4294967295 c_main_~max~0) 4294967296)))))) .cse1) (or (not .cse1) (forall ((v_ArrVal_311 Int) (v_ArrVal_307 (Array Int Int)) (|main_~#str2~0.offset| Int)) (let ((.cse2 (store (store v_ArrVal_307 (+ |main_~#str2~0.offset| c_main_~j~0 1) (select (select (store |c_#memory_int| |c_main_~#str2~0.base| v_ArrVal_307) |c_main_~#str1~0.base|) (+ |c_main_~#str1~0.offset| c_main_~i~0 (- 2)))) (+ 2 |main_~#str2~0.offset| c_main_~j~0) v_ArrVal_311))) (= (select .cse2 (+ (- 1) |main_~#str2~0.offset| (mod (+ 4294967295 c_main_~max~0) 4294967296))) (select (select (store |c_#memory_int| |c_main_~#str2~0.base| .cse2) |c_main_~#str1~0.base|) (+ |c_main_~#str1~0.offset| 1))))))))) is different from false [2022-04-07 16:43:22,690 WARN L833 $PredicateComparison]: unable to prove that (or (<= 4 c_main_~i~0) (not (<= 3 c_main_~i~0)) (let ((.cse1 (<= (mod (+ 4294967295 c_main_~max~0) 4294967296) 2147483647))) (and (or (forall ((v_ArrVal_311 Int) (v_ArrVal_307 (Array Int Int)) (|main_~#str2~0.offset| Int)) (let ((.cse0 (store (store v_ArrVal_307 (+ 2 |main_~#str2~0.offset| c_main_~j~0) (select (select (store |c_#memory_int| |c_main_~#str2~0.base| v_ArrVal_307) |c_main_~#str1~0.base|) (+ |c_main_~#str1~0.offset| c_main_~i~0 (- 2)))) (+ 3 |main_~#str2~0.offset| c_main_~j~0) v_ArrVal_311))) (= (select .cse0 (+ |main_~#str2~0.offset| (- 4294967297) (mod (+ 4294967295 c_main_~max~0) 4294967296))) (select (select (store |c_#memory_int| |c_main_~#str2~0.base| .cse0) |c_main_~#str1~0.base|) (+ |c_main_~#str1~0.offset| 1))))) .cse1) (or (not .cse1) (forall ((v_ArrVal_311 Int) (v_ArrVal_307 (Array Int Int)) (|main_~#str2~0.offset| Int)) (let ((.cse2 (store (store v_ArrVal_307 (+ 2 |main_~#str2~0.offset| c_main_~j~0) (select (select (store |c_#memory_int| |c_main_~#str2~0.base| v_ArrVal_307) |c_main_~#str1~0.base|) (+ |c_main_~#str1~0.offset| c_main_~i~0 (- 2)))) (+ 3 |main_~#str2~0.offset| c_main_~j~0) v_ArrVal_311))) (= (select .cse2 (+ (- 1) |main_~#str2~0.offset| (mod (+ 4294967295 c_main_~max~0) 4294967296))) (select (select (store |c_#memory_int| |c_main_~#str2~0.base| .cse2) |c_main_~#str1~0.base|) (+ |c_main_~#str1~0.offset| 1))))))))) is different from false