/usr/bin/java -ea -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --core.log.level.for.class de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN -tc ../../../trunk/examples/toolchains/AutomizerCTransformed.xml -s ../../../trunk/examples/settings/automizer/LoopAccelerationJordanC.epf -i ../../../trunk/examples/svcomp/loop-lit/mcmillan2006.i -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-34549b5 [2022-04-07 17:09:19,675 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-04-07 17:09:19,676 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-04-07 17:09:19,720 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-04-07 17:09:19,720 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-04-07 17:09:19,721 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-04-07 17:09:19,724 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-04-07 17:09:19,726 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-04-07 17:09:19,727 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-04-07 17:09:19,731 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-04-07 17:09:19,732 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-04-07 17:09:19,733 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... 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[2022-04-07 17:09:19,765 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-04-07 17:09:19,766 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-04-07 17:09:19,769 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-04-07 17:09:19,769 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/automizer/LoopAccelerationJordanC.epf [2022-04-07 17:09:19,784 INFO L113 SettingsManager]: Loading preferences was successful [2022-04-07 17:09:19,784 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-04-07 17:09:19,785 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-04-07 17:09:19,785 INFO L138 SettingsManager]: * sizeof long=4 [2022-04-07 17:09:19,786 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-04-07 17:09:19,786 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-04-07 17:09:19,786 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-04-07 17:09:19,786 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-04-07 17:09:19,786 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-04-07 17:09:19,787 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-04-07 17:09:19,787 INFO L138 SettingsManager]: * sizeof long double=12 [2022-04-07 17:09:19,787 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-04-07 17:09:19,787 INFO L138 SettingsManager]: * Use constant arrays=true [2022-04-07 17:09:19,787 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-04-07 17:09:19,787 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-04-07 17:09:19,788 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-04-07 17:09:19,788 INFO L138 SettingsManager]: * To the following directory=./dump/ [2022-04-07 17:09:19,788 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-04-07 17:09:19,788 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-07 17:09:19,788 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-04-07 17:09:19,788 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-04-07 17:09:19,789 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-04-07 17:09:19,789 INFO L138 SettingsManager]: * TransformationType=LOOP_ACCELERATION_JORDAN WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.core: Log level for class -> de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN; [2022-04-07 17:09:20,014 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-04-07 17:09:20,036 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-04-07 17:09:20,038 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-04-07 17:09:20,039 INFO L271 PluginConnector]: Initializing CDTParser... [2022-04-07 17:09:20,039 INFO L275 PluginConnector]: CDTParser initialized [2022-04-07 17:09:20,040 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loop-lit/mcmillan2006.i [2022-04-07 17:09:20,103 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/8caf7162e/9ac076b67fc6444d971079889d5fca6e/FLAG45139f878 [2022-04-07 17:09:20,453 INFO L306 CDTParser]: Found 1 translation units. [2022-04-07 17:09:20,453 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loop-lit/mcmillan2006.i [2022-04-07 17:09:20,457 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/8caf7162e/9ac076b67fc6444d971079889d5fca6e/FLAG45139f878 [2022-04-07 17:09:20,879 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/8caf7162e/9ac076b67fc6444d971079889d5fca6e [2022-04-07 17:09:20,881 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-04-07 17:09:20,882 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2022-04-07 17:09:20,886 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-04-07 17:09:20,886 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-04-07 17:09:20,889 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-04-07 17:09:20,890 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.04 05:09:20" (1/1) ... [2022-04-07 17:09:20,891 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6869a85a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:09:20, skipping insertion in model container [2022-04-07 17:09:20,891 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.04 05:09:20" (1/1) ... [2022-04-07 17:09:20,896 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-04-07 17:09:20,910 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-04-07 17:09:21,046 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loop-lit/mcmillan2006.i[1009,1022] [2022-04-07 17:09:21,060 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-07 17:09:21,071 INFO L203 MainTranslator]: Completed pre-run [2022-04-07 17:09:21,082 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loop-lit/mcmillan2006.i[1009,1022] [2022-04-07 17:09:21,086 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-07 17:09:21,096 INFO L208 MainTranslator]: Completed translation [2022-04-07 17:09:21,097 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:09:21 WrapperNode [2022-04-07 17:09:21,097 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-04-07 17:09:21,098 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-04-07 17:09:21,098 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-04-07 17:09:21,098 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-04-07 17:09:21,106 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:09:21" (1/1) ... [2022-04-07 17:09:21,106 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:09:21" (1/1) ... [2022-04-07 17:09:21,111 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:09:21" (1/1) ... [2022-04-07 17:09:21,111 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:09:21" (1/1) ... [2022-04-07 17:09:21,117 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:09:21" (1/1) ... [2022-04-07 17:09:21,121 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:09:21" (1/1) ... [2022-04-07 17:09:21,122 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:09:21" (1/1) ... [2022-04-07 17:09:21,124 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-04-07 17:09:21,124 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-04-07 17:09:21,125 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-04-07 17:09:21,125 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-04-07 17:09:21,125 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:09:21" (1/1) ... [2022-04-07 17:09:21,135 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-07 17:09:21,143 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:09:21,151 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-04-07 17:09:21,157 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-04-07 17:09:21,177 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2022-04-07 17:09:21,177 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-04-07 17:09:21,177 INFO L138 BoogieDeclarations]: Found implementation of procedure reach_error [2022-04-07 17:09:21,177 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2022-04-07 17:09:21,177 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2022-04-07 17:09:21,178 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2022-04-07 17:09:21,178 INFO L130 BoogieDeclarations]: Found specification of procedure malloc [2022-04-07 17:09:21,178 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2022-04-07 17:09:21,178 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_fail [2022-04-07 17:09:21,178 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_perror_fail [2022-04-07 17:09:21,178 INFO L130 BoogieDeclarations]: Found specification of procedure __assert [2022-04-07 17:09:21,178 INFO L130 BoogieDeclarations]: Found specification of procedure reach_error [2022-04-07 17:09:21,178 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-04-07 17:09:21,179 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2022-04-07 17:09:21,179 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2022-04-07 17:09:21,179 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2022-04-07 17:09:21,179 INFO L130 BoogieDeclarations]: Found specification of procedure main [2022-04-07 17:09:21,179 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2022-04-07 17:09:21,179 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-04-07 17:09:21,179 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-04-07 17:09:21,180 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2022-04-07 17:09:21,180 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-04-07 17:09:21,180 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-04-07 17:09:21,180 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-04-07 17:09:21,231 INFO L234 CfgBuilder]: Building ICFG [2022-04-07 17:09:21,232 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-04-07 17:09:21,373 INFO L275 CfgBuilder]: Performing block encoding [2022-04-07 17:09:21,379 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-04-07 17:09:21,379 INFO L299 CfgBuilder]: Removed 2 assume(true) statements. [2022-04-07 17:09:21,381 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.04 05:09:21 BoogieIcfgContainer [2022-04-07 17:09:21,381 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-04-07 17:09:21,382 INFO L113 PluginConnector]: ------------------------IcfgTransformer---------------------------- [2022-04-07 17:09:21,382 INFO L271 PluginConnector]: Initializing IcfgTransformer... [2022-04-07 17:09:21,382 INFO L275 PluginConnector]: IcfgTransformer initialized [2022-04-07 17:09:21,385 INFO L185 PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.04 05:09:21" (1/1) ... [2022-04-07 17:09:21,386 INFO L168 ansformationObserver]: Applying ICFG transformation LOOP_ACCELERATION_JORDAN [2022-04-07 17:09:21,408 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 07.04 05:09:21 BasicIcfg [2022-04-07 17:09:21,408 INFO L132 PluginConnector]: ------------------------ END IcfgTransformer---------------------------- [2022-04-07 17:09:21,410 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-04-07 17:09:21,410 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-04-07 17:09:21,433 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-04-07 17:09:21,433 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.04 05:09:20" (1/4) ... [2022-04-07 17:09:21,434 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1d38c98f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.04 05:09:21, skipping insertion in model container [2022-04-07 17:09:21,434 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:09:21" (2/4) ... [2022-04-07 17:09:21,434 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1d38c98f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.04 05:09:21, skipping insertion in model container [2022-04-07 17:09:21,434 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.04 05:09:21" (3/4) ... [2022-04-07 17:09:21,435 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1d38c98f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.04 05:09:21, skipping insertion in model container [2022-04-07 17:09:21,435 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 07.04 05:09:21" (4/4) ... [2022-04-07 17:09:21,436 INFO L111 eAbstractionObserver]: Analyzing ICFG mcmillan2006.iJordan [2022-04-07 17:09:21,440 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:ForwardPredicates Determinization: PREDICATE_ABSTRACTION [2022-04-07 17:09:21,440 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-04-07 17:09:21,484 INFO L339 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-04-07 17:09:21,490 INFO L340 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=ForwardPredicates, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=false, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=All, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP [2022-04-07 17:09:21,491 INFO L341 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-04-07 17:09:21,504 INFO L276 IsEmpty]: Start isEmpty. Operand has 25 states, 17 states have (on average 1.411764705882353) internal successors, (24), 18 states have internal predecessors, (24), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 17:09:21,510 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2022-04-07 17:09:21,510 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:09:21,511 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:09:21,511 INFO L403 AbstractCegarLoop]: === Iteration 1 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:09:21,515 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:09:21,515 INFO L85 PathProgramCache]: Analyzing trace with hash 1476197606, now seen corresponding path program 1 times [2022-04-07 17:09:21,524 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:09:21,524 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1778431991] [2022-04-07 17:09:21,524 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:09:21,525 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:09:21,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:09:21,663 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:09:21,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:09:21,690 INFO L290 TraceCheckUtils]: 0: Hoare triple {33#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {28#true} is VALID [2022-04-07 17:09:21,690 INFO L290 TraceCheckUtils]: 1: Hoare triple {28#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28#true} is VALID [2022-04-07 17:09:21,690 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {28#true} {28#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28#true} is VALID [2022-04-07 17:09:21,695 INFO L272 TraceCheckUtils]: 0: Hoare triple {28#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {33#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:09:21,696 INFO L290 TraceCheckUtils]: 1: Hoare triple {33#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {28#true} is VALID [2022-04-07 17:09:21,696 INFO L290 TraceCheckUtils]: 2: Hoare triple {28#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28#true} is VALID [2022-04-07 17:09:21,697 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {28#true} {28#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28#true} is VALID [2022-04-07 17:09:21,697 INFO L272 TraceCheckUtils]: 4: Hoare triple {28#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28#true} is VALID [2022-04-07 17:09:21,697 INFO L290 TraceCheckUtils]: 5: Hoare triple {28#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {28#true} is VALID [2022-04-07 17:09:21,698 INFO L290 TraceCheckUtils]: 6: Hoare triple {28#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {28#true} is VALID [2022-04-07 17:09:21,700 INFO L290 TraceCheckUtils]: 7: Hoare triple {28#true} [82] L30-3-->L30-4: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {29#false} is VALID [2022-04-07 17:09:21,701 INFO L290 TraceCheckUtils]: 8: Hoare triple {29#false} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {29#false} is VALID [2022-04-07 17:09:21,701 INFO L290 TraceCheckUtils]: 9: Hoare triple {29#false} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {29#false} is VALID [2022-04-07 17:09:21,701 INFO L272 TraceCheckUtils]: 10: Hoare triple {29#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {29#false} is VALID [2022-04-07 17:09:21,701 INFO L290 TraceCheckUtils]: 11: Hoare triple {29#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {29#false} is VALID [2022-04-07 17:09:21,702 INFO L290 TraceCheckUtils]: 12: Hoare triple {29#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {29#false} is VALID [2022-04-07 17:09:21,702 INFO L290 TraceCheckUtils]: 13: Hoare triple {29#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {29#false} is VALID [2022-04-07 17:09:21,702 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:09:21,703 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:09:21,703 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1778431991] [2022-04-07 17:09:21,704 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1778431991] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 17:09:21,704 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 17:09:21,704 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-07 17:09:21,705 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [419913913] [2022-04-07 17:09:21,706 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 17:09:21,710 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 14 [2022-04-07 17:09:21,716 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:09:21,719 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:09:21,748 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 14 edges. 14 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:09:21,748 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-07 17:09:21,749 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:09:21,777 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-07 17:09:21,778 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-07 17:09:21,781 INFO L87 Difference]: Start difference. First operand has 25 states, 17 states have (on average 1.411764705882353) internal successors, (24), 18 states have internal predecessors, (24), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:09:21,865 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:09:21,865 INFO L93 Difference]: Finished difference Result 25 states and 27 transitions. [2022-04-07 17:09:21,865 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-07 17:09:21,866 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 14 [2022-04-07 17:09:21,866 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:09:21,867 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:09:21,879 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 30 transitions. [2022-04-07 17:09:21,880 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:09:21,885 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 30 transitions. [2022-04-07 17:09:21,885 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 30 transitions. [2022-04-07 17:09:21,949 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 30 edges. 30 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:09:21,956 INFO L225 Difference]: With dead ends: 25 [2022-04-07 17:09:21,956 INFO L226 Difference]: Without dead ends: 20 [2022-04-07 17:09:21,957 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-07 17:09:21,960 INFO L913 BasicCegarLoop]: 26 mSDtfsCounter, 18 mSDsluCounter, 3 mSDsCounter, 0 mSdLazyCounter, 3 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 19 SdHoareTripleChecker+Valid, 29 SdHoareTripleChecker+Invalid, 5 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 3 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 17:09:21,960 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [19 Valid, 29 Invalid, 5 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 3 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 17:09:21,979 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20 states. [2022-04-07 17:09:21,990 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20 to 20. [2022-04-07 17:09:21,990 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:09:21,991 INFO L82 GeneralOperation]: Start isEquivalent. First operand 20 states. Second operand has 20 states, 14 states have (on average 1.1428571428571428) internal successors, (16), 14 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 17:09:21,992 INFO L74 IsIncluded]: Start isIncluded. First operand 20 states. Second operand has 20 states, 14 states have (on average 1.1428571428571428) internal successors, (16), 14 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 17:09:21,992 INFO L87 Difference]: Start difference. First operand 20 states. Second operand has 20 states, 14 states have (on average 1.1428571428571428) internal successors, (16), 14 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 17:09:22,000 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:09:22,000 INFO L93 Difference]: Finished difference Result 20 states and 21 transitions. [2022-04-07 17:09:22,000 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 21 transitions. [2022-04-07 17:09:22,000 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:09:22,001 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:09:22,001 INFO L74 IsIncluded]: Start isIncluded. First operand has 20 states, 14 states have (on average 1.1428571428571428) internal successors, (16), 14 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 20 states. [2022-04-07 17:09:22,002 INFO L87 Difference]: Start difference. First operand has 20 states, 14 states have (on average 1.1428571428571428) internal successors, (16), 14 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 20 states. [2022-04-07 17:09:22,004 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:09:22,004 INFO L93 Difference]: Finished difference Result 20 states and 21 transitions. [2022-04-07 17:09:22,004 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 21 transitions. [2022-04-07 17:09:22,005 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:09:22,005 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:09:22,005 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:09:22,005 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:09:22,006 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 14 states have (on average 1.1428571428571428) internal successors, (16), 14 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 17:09:22,010 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 21 transitions. [2022-04-07 17:09:22,011 INFO L78 Accepts]: Start accepts. Automaton has 20 states and 21 transitions. Word has length 14 [2022-04-07 17:09:22,011 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:09:22,011 INFO L478 AbstractCegarLoop]: Abstraction has 20 states and 21 transitions. [2022-04-07 17:09:22,012 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:09:22,012 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 21 transitions. [2022-04-07 17:09:22,013 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2022-04-07 17:09:22,013 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:09:22,014 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:09:22,014 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-04-07 17:09:22,014 INFO L403 AbstractCegarLoop]: === Iteration 2 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:09:22,017 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:09:22,018 INFO L85 PathProgramCache]: Analyzing trace with hash -1931266009, now seen corresponding path program 1 times [2022-04-07 17:09:22,018 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:09:22,018 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [120433514] [2022-04-07 17:09:22,018 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:09:22,018 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:09:22,065 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:09:22,145 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:09:22,154 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:09:22,164 INFO L290 TraceCheckUtils]: 0: Hoare triple {129#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {121#true} is VALID [2022-04-07 17:09:22,164 INFO L290 TraceCheckUtils]: 1: Hoare triple {121#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {121#true} is VALID [2022-04-07 17:09:22,165 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {121#true} {121#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {121#true} is VALID [2022-04-07 17:09:22,166 INFO L272 TraceCheckUtils]: 0: Hoare triple {121#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {129#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:09:22,166 INFO L290 TraceCheckUtils]: 1: Hoare triple {129#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {121#true} is VALID [2022-04-07 17:09:22,167 INFO L290 TraceCheckUtils]: 2: Hoare triple {121#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {121#true} is VALID [2022-04-07 17:09:22,167 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {121#true} {121#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {121#true} is VALID [2022-04-07 17:09:22,167 INFO L272 TraceCheckUtils]: 4: Hoare triple {121#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {121#true} is VALID [2022-04-07 17:09:22,168 INFO L290 TraceCheckUtils]: 5: Hoare triple {121#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {121#true} is VALID [2022-04-07 17:09:22,168 INFO L290 TraceCheckUtils]: 6: Hoare triple {121#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {126#(= main_~i~0 0)} is VALID [2022-04-07 17:09:22,169 INFO L290 TraceCheckUtils]: 7: Hoare triple {126#(= main_~i~0 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {127#(<= main_~n~0 0)} is VALID [2022-04-07 17:09:22,169 INFO L290 TraceCheckUtils]: 8: Hoare triple {127#(<= main_~n~0 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {128#(and (<= main_~n~0 0) (= main_~i~1 0))} is VALID [2022-04-07 17:09:22,170 INFO L290 TraceCheckUtils]: 9: Hoare triple {128#(and (<= main_~n~0 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {122#false} is VALID [2022-04-07 17:09:22,170 INFO L272 TraceCheckUtils]: 10: Hoare triple {122#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {122#false} is VALID [2022-04-07 17:09:22,171 INFO L290 TraceCheckUtils]: 11: Hoare triple {122#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {122#false} is VALID [2022-04-07 17:09:22,171 INFO L290 TraceCheckUtils]: 12: Hoare triple {122#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {122#false} is VALID [2022-04-07 17:09:22,171 INFO L290 TraceCheckUtils]: 13: Hoare triple {122#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {122#false} is VALID [2022-04-07 17:09:22,172 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:09:22,172 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:09:22,173 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [120433514] [2022-04-07 17:09:22,173 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [120433514] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 17:09:22,173 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 17:09:22,173 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-04-07 17:09:22,173 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1422493601] [2022-04-07 17:09:22,173 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 17:09:22,175 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 5 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 14 [2022-04-07 17:09:22,175 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:09:22,176 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 5 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:09:22,194 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 14 edges. 14 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:09:22,195 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-04-07 17:09:22,196 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:09:22,196 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-04-07 17:09:22,197 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2022-04-07 17:09:22,198 INFO L87 Difference]: Start difference. First operand 20 states and 21 transitions. Second operand has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 5 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:09:22,376 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:09:22,376 INFO L93 Difference]: Finished difference Result 24 states and 25 transitions. [2022-04-07 17:09:22,376 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-04-07 17:09:22,377 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 5 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 14 [2022-04-07 17:09:22,377 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:09:22,377 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 5 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:09:22,379 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 26 transitions. [2022-04-07 17:09:22,379 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 5 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:09:22,380 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 26 transitions. [2022-04-07 17:09:22,381 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 6 states and 26 transitions. [2022-04-07 17:09:22,405 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 26 edges. 26 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:09:22,408 INFO L225 Difference]: With dead ends: 24 [2022-04-07 17:09:22,408 INFO L226 Difference]: Without dead ends: 22 [2022-04-07 17:09:22,412 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=44, Unknown=0, NotChecked=0, Total=72 [2022-04-07 17:09:22,415 INFO L913 BasicCegarLoop]: 17 mSDtfsCounter, 21 mSDsluCounter, 17 mSDsCounter, 0 mSdLazyCounter, 52 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 22 SdHoareTripleChecker+Valid, 34 SdHoareTripleChecker+Invalid, 55 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 52 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 17:09:22,416 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [22 Valid, 34 Invalid, 55 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 52 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-07 17:09:22,417 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2022-04-07 17:09:22,418 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 21. [2022-04-07 17:09:22,418 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:09:22,419 INFO L82 GeneralOperation]: Start isEquivalent. First operand 22 states. Second operand has 21 states, 15 states have (on average 1.1333333333333333) internal successors, (17), 15 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 17:09:22,419 INFO L74 IsIncluded]: Start isIncluded. First operand 22 states. Second operand has 21 states, 15 states have (on average 1.1333333333333333) internal successors, (17), 15 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 17:09:22,419 INFO L87 Difference]: Start difference. First operand 22 states. Second operand has 21 states, 15 states have (on average 1.1333333333333333) internal successors, (17), 15 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 17:09:22,421 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:09:22,421 INFO L93 Difference]: Finished difference Result 22 states and 23 transitions. [2022-04-07 17:09:22,421 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 23 transitions. [2022-04-07 17:09:22,421 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:09:22,421 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:09:22,422 INFO L74 IsIncluded]: Start isIncluded. First operand has 21 states, 15 states have (on average 1.1333333333333333) internal successors, (17), 15 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 22 states. [2022-04-07 17:09:22,422 INFO L87 Difference]: Start difference. First operand has 21 states, 15 states have (on average 1.1333333333333333) internal successors, (17), 15 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 22 states. [2022-04-07 17:09:22,423 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:09:22,424 INFO L93 Difference]: Finished difference Result 22 states and 23 transitions. [2022-04-07 17:09:22,424 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 23 transitions. [2022-04-07 17:09:22,424 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:09:22,424 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:09:22,424 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:09:22,425 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:09:22,425 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 15 states have (on average 1.1333333333333333) internal successors, (17), 15 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 17:09:22,426 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 22 transitions. [2022-04-07 17:09:22,426 INFO L78 Accepts]: Start accepts. Automaton has 21 states and 22 transitions. Word has length 14 [2022-04-07 17:09:22,426 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:09:22,426 INFO L478 AbstractCegarLoop]: Abstraction has 21 states and 22 transitions. [2022-04-07 17:09:22,427 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 5 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:09:22,427 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 22 transitions. [2022-04-07 17:09:22,427 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-04-07 17:09:22,427 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:09:22,427 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:09:22,428 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-04-07 17:09:22,428 INFO L403 AbstractCegarLoop]: === Iteration 3 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:09:22,428 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:09:22,429 INFO L85 PathProgramCache]: Analyzing trace with hash -1791050651, now seen corresponding path program 1 times [2022-04-07 17:09:22,429 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:09:22,429 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [550601426] [2022-04-07 17:09:22,429 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:09:22,429 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:09:22,462 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:09:22,620 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:09:22,623 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:09:22,628 INFO L290 TraceCheckUtils]: 0: Hoare triple {239#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {227#true} is VALID [2022-04-07 17:09:22,628 INFO L290 TraceCheckUtils]: 1: Hoare triple {227#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {227#true} is VALID [2022-04-07 17:09:22,628 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {227#true} {227#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {227#true} is VALID [2022-04-07 17:09:22,629 INFO L272 TraceCheckUtils]: 0: Hoare triple {227#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {239#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:09:22,629 INFO L290 TraceCheckUtils]: 1: Hoare triple {239#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {227#true} is VALID [2022-04-07 17:09:22,629 INFO L290 TraceCheckUtils]: 2: Hoare triple {227#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {227#true} is VALID [2022-04-07 17:09:22,630 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {227#true} {227#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {227#true} is VALID [2022-04-07 17:09:22,630 INFO L272 TraceCheckUtils]: 4: Hoare triple {227#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {227#true} is VALID [2022-04-07 17:09:22,630 INFO L290 TraceCheckUtils]: 5: Hoare triple {227#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {227#true} is VALID [2022-04-07 17:09:22,631 INFO L290 TraceCheckUtils]: 6: Hoare triple {227#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {232#(and (= main_~x~0.offset 0) (= main_~i~0 0))} is VALID [2022-04-07 17:09:22,632 INFO L290 TraceCheckUtils]: 7: Hoare triple {232#(and (= main_~x~0.offset 0) (= main_~i~0 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {233#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (= main_~x~0.offset 0) (= main_~i~0 0))} is VALID [2022-04-07 17:09:22,632 INFO L290 TraceCheckUtils]: 8: Hoare triple {233#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (= main_~x~0.offset 0) (= main_~i~0 0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {234#(and (= (select (select |#memory_int| main_~x~0.base) 0) 0) (= main_~x~0.offset 0))} is VALID [2022-04-07 17:09:22,633 INFO L290 TraceCheckUtils]: 9: Hoare triple {234#(and (= (select (select |#memory_int| main_~x~0.base) 0) 0) (= main_~x~0.offset 0))} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {234#(and (= (select (select |#memory_int| main_~x~0.base) 0) 0) (= main_~x~0.offset 0))} is VALID [2022-04-07 17:09:22,633 INFO L290 TraceCheckUtils]: 10: Hoare triple {234#(and (= (select (select |#memory_int| main_~x~0.base) 0) 0) (= main_~x~0.offset 0))} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {235#(and (= main_~x~0.offset 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:09:22,634 INFO L290 TraceCheckUtils]: 11: Hoare triple {235#(and (= main_~x~0.offset 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {236#(= |main_#t~mem5| 0)} is VALID [2022-04-07 17:09:22,635 INFO L272 TraceCheckUtils]: 12: Hoare triple {236#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {237#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:09:22,635 INFO L290 TraceCheckUtils]: 13: Hoare triple {237#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {238#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:09:22,636 INFO L290 TraceCheckUtils]: 14: Hoare triple {238#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {228#false} is VALID [2022-04-07 17:09:22,636 INFO L290 TraceCheckUtils]: 15: Hoare triple {228#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {228#false} is VALID [2022-04-07 17:09:22,636 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:09:22,637 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:09:22,637 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [550601426] [2022-04-07 17:09:22,637 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [550601426] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:09:22,637 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [227008160] [2022-04-07 17:09:22,637 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:09:22,637 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:09:22,638 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:09:22,639 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:09:22,675 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-04-07 17:09:22,705 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:09:22,707 INFO L263 TraceCheckSpWp]: Trace formula consists of 81 conjuncts, 15 conjunts are in the unsatisfiable core [2022-04-07 17:09:22,732 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:09:22,735 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:09:22,847 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-04-07 17:09:22,927 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2022-04-07 17:09:22,980 INFO L272 TraceCheckUtils]: 0: Hoare triple {227#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {227#true} is VALID [2022-04-07 17:09:22,981 INFO L290 TraceCheckUtils]: 1: Hoare triple {227#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {227#true} is VALID [2022-04-07 17:09:22,983 INFO L290 TraceCheckUtils]: 2: Hoare triple {227#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {227#true} is VALID [2022-04-07 17:09:22,983 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {227#true} {227#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {227#true} is VALID [2022-04-07 17:09:22,984 INFO L272 TraceCheckUtils]: 4: Hoare triple {227#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {227#true} is VALID [2022-04-07 17:09:22,984 INFO L290 TraceCheckUtils]: 5: Hoare triple {227#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {227#true} is VALID [2022-04-07 17:09:22,985 INFO L290 TraceCheckUtils]: 6: Hoare triple {227#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {232#(and (= main_~x~0.offset 0) (= main_~i~0 0))} is VALID [2022-04-07 17:09:22,986 INFO L290 TraceCheckUtils]: 7: Hoare triple {232#(and (= main_~x~0.offset 0) (= main_~i~0 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {234#(and (= (select (select |#memory_int| main_~x~0.base) 0) 0) (= main_~x~0.offset 0))} is VALID [2022-04-07 17:09:22,986 INFO L290 TraceCheckUtils]: 8: Hoare triple {234#(and (= (select (select |#memory_int| main_~x~0.base) 0) 0) (= main_~x~0.offset 0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {234#(and (= (select (select |#memory_int| main_~x~0.base) 0) 0) (= main_~x~0.offset 0))} is VALID [2022-04-07 17:09:22,987 INFO L290 TraceCheckUtils]: 9: Hoare triple {234#(and (= (select (select |#memory_int| main_~x~0.base) 0) 0) (= main_~x~0.offset 0))} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {234#(and (= (select (select |#memory_int| main_~x~0.base) 0) 0) (= main_~x~0.offset 0))} is VALID [2022-04-07 17:09:22,988 INFO L290 TraceCheckUtils]: 10: Hoare triple {234#(and (= (select (select |#memory_int| main_~x~0.base) 0) 0) (= main_~x~0.offset 0))} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {235#(and (= main_~x~0.offset 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:09:22,989 INFO L290 TraceCheckUtils]: 11: Hoare triple {235#(and (= main_~x~0.offset 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {236#(= |main_#t~mem5| 0)} is VALID [2022-04-07 17:09:22,989 INFO L272 TraceCheckUtils]: 12: Hoare triple {236#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {279#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:09:22,990 INFO L290 TraceCheckUtils]: 13: Hoare triple {279#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {283#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:09:22,990 INFO L290 TraceCheckUtils]: 14: Hoare triple {283#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {228#false} is VALID [2022-04-07 17:09:22,991 INFO L290 TraceCheckUtils]: 15: Hoare triple {228#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {228#false} is VALID [2022-04-07 17:09:22,991 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:09:22,991 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 17:09:23,121 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2022-04-07 17:09:23,126 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 20 [2022-04-07 17:09:23,168 INFO L290 TraceCheckUtils]: 15: Hoare triple {228#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {228#false} is VALID [2022-04-07 17:09:23,169 INFO L290 TraceCheckUtils]: 14: Hoare triple {283#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {228#false} is VALID [2022-04-07 17:09:23,170 INFO L290 TraceCheckUtils]: 13: Hoare triple {279#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {283#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:09:23,170 INFO L272 TraceCheckUtils]: 12: Hoare triple {236#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {279#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:09:23,171 INFO L290 TraceCheckUtils]: 11: Hoare triple {302#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {236#(= |main_#t~mem5| 0)} is VALID [2022-04-07 17:09:23,172 INFO L290 TraceCheckUtils]: 10: Hoare triple {306#(= (select (select |#memory_int| main_~x~0.base) main_~x~0.offset) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {302#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:09:23,172 INFO L290 TraceCheckUtils]: 9: Hoare triple {306#(= (select (select |#memory_int| main_~x~0.base) main_~x~0.offset) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {306#(= (select (select |#memory_int| main_~x~0.base) main_~x~0.offset) 0)} is VALID [2022-04-07 17:09:23,173 INFO L290 TraceCheckUtils]: 8: Hoare triple {306#(= (select (select |#memory_int| main_~x~0.base) main_~x~0.offset) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {306#(= (select (select |#memory_int| main_~x~0.base) main_~x~0.offset) 0)} is VALID [2022-04-07 17:09:23,174 INFO L290 TraceCheckUtils]: 7: Hoare triple {316#(= 0 (* main_~i~0 4))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {306#(= (select (select |#memory_int| main_~x~0.base) main_~x~0.offset) 0)} is VALID [2022-04-07 17:09:23,174 INFO L290 TraceCheckUtils]: 6: Hoare triple {227#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {316#(= 0 (* main_~i~0 4))} is VALID [2022-04-07 17:09:23,175 INFO L290 TraceCheckUtils]: 5: Hoare triple {227#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {227#true} is VALID [2022-04-07 17:09:23,175 INFO L272 TraceCheckUtils]: 4: Hoare triple {227#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {227#true} is VALID [2022-04-07 17:09:23,175 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {227#true} {227#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {227#true} is VALID [2022-04-07 17:09:23,175 INFO L290 TraceCheckUtils]: 2: Hoare triple {227#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {227#true} is VALID [2022-04-07 17:09:23,176 INFO L290 TraceCheckUtils]: 1: Hoare triple {227#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {227#true} is VALID [2022-04-07 17:09:23,176 INFO L272 TraceCheckUtils]: 0: Hoare triple {227#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {227#true} is VALID [2022-04-07 17:09:23,176 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:09:23,176 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [227008160] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 17:09:23,177 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 17:09:23,177 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 8, 8] total 15 [2022-04-07 17:09:23,177 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2015482535] [2022-04-07 17:09:23,177 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 17:09:23,178 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 14 states have (on average 1.6428571428571428) internal successors, (23), 12 states have internal predecessors, (23), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-07 17:09:23,179 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:09:23,179 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 15 states, 14 states have (on average 1.6428571428571428) internal successors, (23), 12 states have internal predecessors, (23), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:09:23,200 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 29 edges. 29 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:09:23,202 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 15 states [2022-04-07 17:09:23,202 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:09:23,203 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2022-04-07 17:09:23,203 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=172, Unknown=0, NotChecked=0, Total=210 [2022-04-07 17:09:23,204 INFO L87 Difference]: Start difference. First operand 21 states and 22 transitions. Second operand has 15 states, 14 states have (on average 1.6428571428571428) internal successors, (23), 12 states have internal predecessors, (23), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:09:23,643 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:09:23,644 INFO L93 Difference]: Finished difference Result 30 states and 31 transitions. [2022-04-07 17:09:23,644 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-04-07 17:09:23,644 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 14 states have (on average 1.6428571428571428) internal successors, (23), 12 states have internal predecessors, (23), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-07 17:09:23,644 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:09:23,645 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 14 states have (on average 1.6428571428571428) internal successors, (23), 12 states have internal predecessors, (23), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:09:23,646 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 32 transitions. [2022-04-07 17:09:23,647 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 14 states have (on average 1.6428571428571428) internal successors, (23), 12 states have internal predecessors, (23), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:09:23,648 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 32 transitions. [2022-04-07 17:09:23,648 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 11 states and 32 transitions. [2022-04-07 17:09:23,680 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 32 edges. 32 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:09:23,681 INFO L225 Difference]: With dead ends: 30 [2022-04-07 17:09:23,681 INFO L226 Difference]: Without dead ends: 30 [2022-04-07 17:09:23,682 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 50 GetRequests, 26 SyntacticMatches, 3 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 92 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=94, Invalid=412, Unknown=0, NotChecked=0, Total=506 [2022-04-07 17:09:23,683 INFO L913 BasicCegarLoop]: 14 mSDtfsCounter, 36 mSDsluCounter, 43 mSDsCounter, 0 mSdLazyCounter, 148 mSolverCounterSat, 14 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 36 SdHoareTripleChecker+Valid, 57 SdHoareTripleChecker+Invalid, 162 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 14 IncrementalHoareTripleChecker+Valid, 148 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-07 17:09:23,683 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [36 Valid, 57 Invalid, 162 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [14 Valid, 148 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-07 17:09:23,684 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states. [2022-04-07 17:09:23,686 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 27. [2022-04-07 17:09:23,686 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:09:23,686 INFO L82 GeneralOperation]: Start isEquivalent. First operand 30 states. Second operand has 27 states, 19 states have (on average 1.105263157894737) internal successors, (21), 20 states have internal predecessors, (21), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 17:09:23,687 INFO L74 IsIncluded]: Start isIncluded. First operand 30 states. Second operand has 27 states, 19 states have (on average 1.105263157894737) internal successors, (21), 20 states have internal predecessors, (21), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 17:09:23,687 INFO L87 Difference]: Start difference. First operand 30 states. Second operand has 27 states, 19 states have (on average 1.105263157894737) internal successors, (21), 20 states have internal predecessors, (21), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 17:09:23,689 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:09:23,689 INFO L93 Difference]: Finished difference Result 30 states and 31 transitions. [2022-04-07 17:09:23,689 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 31 transitions. [2022-04-07 17:09:23,690 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:09:23,690 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:09:23,690 INFO L74 IsIncluded]: Start isIncluded. First operand has 27 states, 19 states have (on average 1.105263157894737) internal successors, (21), 20 states have internal predecessors, (21), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) Second operand 30 states. [2022-04-07 17:09:23,690 INFO L87 Difference]: Start difference. First operand has 27 states, 19 states have (on average 1.105263157894737) internal successors, (21), 20 states have internal predecessors, (21), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) Second operand 30 states. [2022-04-07 17:09:23,692 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:09:23,692 INFO L93 Difference]: Finished difference Result 30 states and 31 transitions. [2022-04-07 17:09:23,692 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 31 transitions. [2022-04-07 17:09:23,693 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:09:23,693 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:09:23,693 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:09:23,693 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:09:23,693 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27 states, 19 states have (on average 1.105263157894737) internal successors, (21), 20 states have internal predecessors, (21), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 17:09:23,695 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 28 transitions. [2022-04-07 17:09:23,695 INFO L78 Accepts]: Start accepts. Automaton has 27 states and 28 transitions. Word has length 16 [2022-04-07 17:09:23,695 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:09:23,695 INFO L478 AbstractCegarLoop]: Abstraction has 27 states and 28 transitions. [2022-04-07 17:09:23,695 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 15 states, 14 states have (on average 1.6428571428571428) internal successors, (23), 12 states have internal predecessors, (23), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:09:23,695 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 28 transitions. [2022-04-07 17:09:23,696 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2022-04-07 17:09:23,696 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:09:23,696 INFO L499 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:09:23,726 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2022-04-07 17:09:23,916 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2,2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:09:23,916 INFO L403 AbstractCegarLoop]: === Iteration 4 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:09:23,917 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:09:23,917 INFO L85 PathProgramCache]: Analyzing trace with hash 1619165115, now seen corresponding path program 1 times [2022-04-07 17:09:23,917 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:09:23,918 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [133706764] [2022-04-07 17:09:23,918 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:09:23,918 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:09:23,937 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:09:23,995 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:09:23,997 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:09:24,009 INFO L290 TraceCheckUtils]: 0: Hoare triple {487#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {473#true} is VALID [2022-04-07 17:09:24,009 INFO L290 TraceCheckUtils]: 1: Hoare triple {473#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {473#true} is VALID [2022-04-07 17:09:24,010 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {473#true} {473#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {473#true} is VALID [2022-04-07 17:09:24,010 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 12 [2022-04-07 17:09:24,012 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:09:24,021 INFO L290 TraceCheckUtils]: 0: Hoare triple {473#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {473#true} is VALID [2022-04-07 17:09:24,021 INFO L290 TraceCheckUtils]: 1: Hoare triple {473#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {473#true} is VALID [2022-04-07 17:09:24,021 INFO L290 TraceCheckUtils]: 2: Hoare triple {473#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {473#true} is VALID [2022-04-07 17:09:24,027 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {473#true} {481#(and (<= main_~n~0 1) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {481#(and (<= main_~n~0 1) (= main_~i~1 0))} is VALID [2022-04-07 17:09:24,028 INFO L272 TraceCheckUtils]: 0: Hoare triple {473#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {487#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:09:24,028 INFO L290 TraceCheckUtils]: 1: Hoare triple {487#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {473#true} is VALID [2022-04-07 17:09:24,029 INFO L290 TraceCheckUtils]: 2: Hoare triple {473#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {473#true} is VALID [2022-04-07 17:09:24,029 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {473#true} {473#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {473#true} is VALID [2022-04-07 17:09:24,029 INFO L272 TraceCheckUtils]: 4: Hoare triple {473#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {473#true} is VALID [2022-04-07 17:09:24,029 INFO L290 TraceCheckUtils]: 5: Hoare triple {473#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {473#true} is VALID [2022-04-07 17:09:24,030 INFO L290 TraceCheckUtils]: 6: Hoare triple {473#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {478#(= main_~i~0 0)} is VALID [2022-04-07 17:09:24,030 INFO L290 TraceCheckUtils]: 7: Hoare triple {478#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {478#(= main_~i~0 0)} is VALID [2022-04-07 17:09:24,031 INFO L290 TraceCheckUtils]: 8: Hoare triple {478#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {479#(<= main_~i~0 1)} is VALID [2022-04-07 17:09:24,031 INFO L290 TraceCheckUtils]: 9: Hoare triple {479#(<= main_~i~0 1)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {480#(<= main_~n~0 1)} is VALID [2022-04-07 17:09:24,032 INFO L290 TraceCheckUtils]: 10: Hoare triple {480#(<= main_~n~0 1)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {481#(and (<= main_~n~0 1) (= main_~i~1 0))} is VALID [2022-04-07 17:09:24,032 INFO L290 TraceCheckUtils]: 11: Hoare triple {481#(and (<= main_~n~0 1) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {481#(and (<= main_~n~0 1) (= main_~i~1 0))} is VALID [2022-04-07 17:09:24,033 INFO L272 TraceCheckUtils]: 12: Hoare triple {481#(and (<= main_~n~0 1) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {473#true} is VALID [2022-04-07 17:09:24,033 INFO L290 TraceCheckUtils]: 13: Hoare triple {473#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {473#true} is VALID [2022-04-07 17:09:24,033 INFO L290 TraceCheckUtils]: 14: Hoare triple {473#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {473#true} is VALID [2022-04-07 17:09:24,033 INFO L290 TraceCheckUtils]: 15: Hoare triple {473#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {473#true} is VALID [2022-04-07 17:09:24,034 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {473#true} {481#(and (<= main_~n~0 1) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {481#(and (<= main_~n~0 1) (= main_~i~1 0))} is VALID [2022-04-07 17:09:24,034 INFO L290 TraceCheckUtils]: 17: Hoare triple {481#(and (<= main_~n~0 1) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {481#(and (<= main_~n~0 1) (= main_~i~1 0))} is VALID [2022-04-07 17:09:24,035 INFO L290 TraceCheckUtils]: 18: Hoare triple {481#(and (<= main_~n~0 1) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {486#(<= main_~n~0 main_~i~1)} is VALID [2022-04-07 17:09:24,039 INFO L290 TraceCheckUtils]: 19: Hoare triple {486#(<= main_~n~0 main_~i~1)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {474#false} is VALID [2022-04-07 17:09:24,039 INFO L272 TraceCheckUtils]: 20: Hoare triple {474#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {474#false} is VALID [2022-04-07 17:09:24,039 INFO L290 TraceCheckUtils]: 21: Hoare triple {474#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {474#false} is VALID [2022-04-07 17:09:24,040 INFO L290 TraceCheckUtils]: 22: Hoare triple {474#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {474#false} is VALID [2022-04-07 17:09:24,040 INFO L290 TraceCheckUtils]: 23: Hoare triple {474#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {474#false} is VALID [2022-04-07 17:09:24,040 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:09:24,040 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:09:24,040 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [133706764] [2022-04-07 17:09:24,041 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [133706764] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:09:24,041 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [833593054] [2022-04-07 17:09:24,041 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:09:24,041 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:09:24,041 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:09:24,043 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:09:24,044 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-04-07 17:09:24,084 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:09:24,085 INFO L263 TraceCheckSpWp]: Trace formula consists of 96 conjuncts, 6 conjunts are in the unsatisfiable core [2022-04-07 17:09:24,100 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:09:24,101 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:09:24,293 INFO L272 TraceCheckUtils]: 0: Hoare triple {473#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {473#true} is VALID [2022-04-07 17:09:24,295 INFO L290 TraceCheckUtils]: 1: Hoare triple {473#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {473#true} is VALID [2022-04-07 17:09:24,295 INFO L290 TraceCheckUtils]: 2: Hoare triple {473#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {473#true} is VALID [2022-04-07 17:09:24,295 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {473#true} {473#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {473#true} is VALID [2022-04-07 17:09:24,295 INFO L272 TraceCheckUtils]: 4: Hoare triple {473#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {473#true} is VALID [2022-04-07 17:09:24,296 INFO L290 TraceCheckUtils]: 5: Hoare triple {473#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {473#true} is VALID [2022-04-07 17:09:24,296 INFO L290 TraceCheckUtils]: 6: Hoare triple {473#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {509#(<= main_~i~0 0)} is VALID [2022-04-07 17:09:24,308 INFO L290 TraceCheckUtils]: 7: Hoare triple {509#(<= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {509#(<= main_~i~0 0)} is VALID [2022-04-07 17:09:24,308 INFO L290 TraceCheckUtils]: 8: Hoare triple {509#(<= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {479#(<= main_~i~0 1)} is VALID [2022-04-07 17:09:24,309 INFO L290 TraceCheckUtils]: 9: Hoare triple {479#(<= main_~i~0 1)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {480#(<= main_~n~0 1)} is VALID [2022-04-07 17:09:24,309 INFO L290 TraceCheckUtils]: 10: Hoare triple {480#(<= main_~n~0 1)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {522#(and (<= 0 main_~i~1) (<= main_~n~0 1))} is VALID [2022-04-07 17:09:24,310 INFO L290 TraceCheckUtils]: 11: Hoare triple {522#(and (<= 0 main_~i~1) (<= main_~n~0 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {522#(and (<= 0 main_~i~1) (<= main_~n~0 1))} is VALID [2022-04-07 17:09:24,310 INFO L272 TraceCheckUtils]: 12: Hoare triple {522#(and (<= 0 main_~i~1) (<= main_~n~0 1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {473#true} is VALID [2022-04-07 17:09:24,310 INFO L290 TraceCheckUtils]: 13: Hoare triple {473#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {473#true} is VALID [2022-04-07 17:09:24,310 INFO L290 TraceCheckUtils]: 14: Hoare triple {473#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {473#true} is VALID [2022-04-07 17:09:24,310 INFO L290 TraceCheckUtils]: 15: Hoare triple {473#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {473#true} is VALID [2022-04-07 17:09:24,311 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {473#true} {522#(and (<= 0 main_~i~1) (<= main_~n~0 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {522#(and (<= 0 main_~i~1) (<= main_~n~0 1))} is VALID [2022-04-07 17:09:24,312 INFO L290 TraceCheckUtils]: 17: Hoare triple {522#(and (<= 0 main_~i~1) (<= main_~n~0 1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {522#(and (<= 0 main_~i~1) (<= main_~n~0 1))} is VALID [2022-04-07 17:09:24,312 INFO L290 TraceCheckUtils]: 18: Hoare triple {522#(and (<= 0 main_~i~1) (<= main_~n~0 1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {547#(and (<= 1 main_~i~1) (<= main_~n~0 1))} is VALID [2022-04-07 17:09:24,313 INFO L290 TraceCheckUtils]: 19: Hoare triple {547#(and (<= 1 main_~i~1) (<= main_~n~0 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {474#false} is VALID [2022-04-07 17:09:24,313 INFO L272 TraceCheckUtils]: 20: Hoare triple {474#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {474#false} is VALID [2022-04-07 17:09:24,313 INFO L290 TraceCheckUtils]: 21: Hoare triple {474#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {474#false} is VALID [2022-04-07 17:09:24,313 INFO L290 TraceCheckUtils]: 22: Hoare triple {474#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {474#false} is VALID [2022-04-07 17:09:24,313 INFO L290 TraceCheckUtils]: 23: Hoare triple {474#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {474#false} is VALID [2022-04-07 17:09:24,314 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:09:24,314 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 17:09:24,451 INFO L290 TraceCheckUtils]: 23: Hoare triple {474#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {474#false} is VALID [2022-04-07 17:09:24,452 INFO L290 TraceCheckUtils]: 22: Hoare triple {474#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {474#false} is VALID [2022-04-07 17:09:24,453 INFO L290 TraceCheckUtils]: 21: Hoare triple {474#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {474#false} is VALID [2022-04-07 17:09:24,453 INFO L272 TraceCheckUtils]: 20: Hoare triple {474#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {474#false} is VALID [2022-04-07 17:09:24,453 INFO L290 TraceCheckUtils]: 19: Hoare triple {486#(<= main_~n~0 main_~i~1)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {474#false} is VALID [2022-04-07 17:09:24,454 INFO L290 TraceCheckUtils]: 18: Hoare triple {578#(<= main_~n~0 (+ main_~i~1 1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {486#(<= main_~n~0 main_~i~1)} is VALID [2022-04-07 17:09:24,454 INFO L290 TraceCheckUtils]: 17: Hoare triple {578#(<= main_~n~0 (+ main_~i~1 1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {578#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 17:09:24,455 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {473#true} {578#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {578#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 17:09:24,455 INFO L290 TraceCheckUtils]: 15: Hoare triple {473#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {473#true} is VALID [2022-04-07 17:09:24,455 INFO L290 TraceCheckUtils]: 14: Hoare triple {473#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {473#true} is VALID [2022-04-07 17:09:24,455 INFO L290 TraceCheckUtils]: 13: Hoare triple {473#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {473#true} is VALID [2022-04-07 17:09:24,455 INFO L272 TraceCheckUtils]: 12: Hoare triple {578#(<= main_~n~0 (+ main_~i~1 1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {473#true} is VALID [2022-04-07 17:09:24,456 INFO L290 TraceCheckUtils]: 11: Hoare triple {578#(<= main_~n~0 (+ main_~i~1 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {578#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 17:09:24,456 INFO L290 TraceCheckUtils]: 10: Hoare triple {480#(<= main_~n~0 1)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {578#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 17:09:24,457 INFO L290 TraceCheckUtils]: 9: Hoare triple {479#(<= main_~i~0 1)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {480#(<= main_~n~0 1)} is VALID [2022-04-07 17:09:24,457 INFO L290 TraceCheckUtils]: 8: Hoare triple {509#(<= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {479#(<= main_~i~0 1)} is VALID [2022-04-07 17:09:24,458 INFO L290 TraceCheckUtils]: 7: Hoare triple {509#(<= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {509#(<= main_~i~0 0)} is VALID [2022-04-07 17:09:24,458 INFO L290 TraceCheckUtils]: 6: Hoare triple {473#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {509#(<= main_~i~0 0)} is VALID [2022-04-07 17:09:24,458 INFO L290 TraceCheckUtils]: 5: Hoare triple {473#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {473#true} is VALID [2022-04-07 17:09:24,459 INFO L272 TraceCheckUtils]: 4: Hoare triple {473#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {473#true} is VALID [2022-04-07 17:09:24,459 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {473#true} {473#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {473#true} is VALID [2022-04-07 17:09:24,459 INFO L290 TraceCheckUtils]: 2: Hoare triple {473#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {473#true} is VALID [2022-04-07 17:09:24,459 INFO L290 TraceCheckUtils]: 1: Hoare triple {473#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {473#true} is VALID [2022-04-07 17:09:24,459 INFO L272 TraceCheckUtils]: 0: Hoare triple {473#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {473#true} is VALID [2022-04-07 17:09:24,459 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:09:24,460 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [833593054] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 17:09:24,460 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 17:09:24,460 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7, 7] total 12 [2022-04-07 17:09:24,460 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1579522269] [2022-04-07 17:09:24,460 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 17:09:24,461 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 2.5833333333333335) internal successors, (31), 11 states have internal predecessors, (31), 5 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) Word has length 24 [2022-04-07 17:09:24,461 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:09:24,462 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 12 states, 12 states have (on average 2.5833333333333335) internal successors, (31), 11 states have internal predecessors, (31), 5 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-07 17:09:24,495 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 42 edges. 42 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:09:24,495 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2022-04-07 17:09:24,495 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:09:24,496 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2022-04-07 17:09:24,496 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=98, Unknown=0, NotChecked=0, Total=132 [2022-04-07 17:09:24,496 INFO L87 Difference]: Start difference. First operand 27 states and 28 transitions. Second operand has 12 states, 12 states have (on average 2.5833333333333335) internal successors, (31), 11 states have internal predecessors, (31), 5 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-07 17:09:24,766 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:09:24,766 INFO L93 Difference]: Finished difference Result 36 states and 38 transitions. [2022-04-07 17:09:24,767 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-04-07 17:09:24,767 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 2.5833333333333335) internal successors, (31), 11 states have internal predecessors, (31), 5 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) Word has length 24 [2022-04-07 17:09:24,767 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:09:24,767 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 2.5833333333333335) internal successors, (31), 11 states have internal predecessors, (31), 5 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-07 17:09:24,769 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 33 transitions. [2022-04-07 17:09:24,769 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 2.5833333333333335) internal successors, (31), 11 states have internal predecessors, (31), 5 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-07 17:09:24,772 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 33 transitions. [2022-04-07 17:09:24,772 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 8 states and 33 transitions. [2022-04-07 17:09:24,800 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 33 edges. 33 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:09:24,803 INFO L225 Difference]: With dead ends: 36 [2022-04-07 17:09:24,803 INFO L226 Difference]: Without dead ends: 30 [2022-04-07 17:09:24,803 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 47 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 42 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=72, Invalid=200, Unknown=0, NotChecked=0, Total=272 [2022-04-07 17:09:24,806 INFO L913 BasicCegarLoop]: 15 mSDtfsCounter, 29 mSDsluCounter, 27 mSDsCounter, 0 mSdLazyCounter, 98 mSolverCounterSat, 13 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 30 SdHoareTripleChecker+Valid, 42 SdHoareTripleChecker+Invalid, 111 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 13 IncrementalHoareTripleChecker+Valid, 98 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 17:09:24,807 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [30 Valid, 42 Invalid, 111 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [13 Valid, 98 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-07 17:09:24,808 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states. [2022-04-07 17:09:24,816 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 29. [2022-04-07 17:09:24,816 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:09:24,820 INFO L82 GeneralOperation]: Start isEquivalent. First operand 30 states. Second operand has 29 states, 21 states have (on average 1.0952380952380953) internal successors, (23), 22 states have internal predecessors, (23), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 17:09:24,821 INFO L74 IsIncluded]: Start isIncluded. First operand 30 states. Second operand has 29 states, 21 states have (on average 1.0952380952380953) internal successors, (23), 22 states have internal predecessors, (23), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 17:09:24,824 INFO L87 Difference]: Start difference. First operand 30 states. Second operand has 29 states, 21 states have (on average 1.0952380952380953) internal successors, (23), 22 states have internal predecessors, (23), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 17:09:24,830 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:09:24,830 INFO L93 Difference]: Finished difference Result 30 states and 31 transitions. [2022-04-07 17:09:24,830 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 31 transitions. [2022-04-07 17:09:24,830 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:09:24,830 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:09:24,832 INFO L74 IsIncluded]: Start isIncluded. First operand has 29 states, 21 states have (on average 1.0952380952380953) internal successors, (23), 22 states have internal predecessors, (23), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) Second operand 30 states. [2022-04-07 17:09:24,833 INFO L87 Difference]: Start difference. First operand has 29 states, 21 states have (on average 1.0952380952380953) internal successors, (23), 22 states have internal predecessors, (23), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) Second operand 30 states. [2022-04-07 17:09:24,834 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:09:24,834 INFO L93 Difference]: Finished difference Result 30 states and 31 transitions. [2022-04-07 17:09:24,834 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 31 transitions. [2022-04-07 17:09:24,834 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:09:24,834 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:09:24,835 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:09:24,835 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:09:24,835 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 21 states have (on average 1.0952380952380953) internal successors, (23), 22 states have internal predecessors, (23), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 17:09:24,836 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 30 transitions. [2022-04-07 17:09:24,836 INFO L78 Accepts]: Start accepts. Automaton has 29 states and 30 transitions. Word has length 24 [2022-04-07 17:09:24,836 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:09:24,836 INFO L478 AbstractCegarLoop]: Abstraction has 29 states and 30 transitions. [2022-04-07 17:09:24,836 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 12 states have (on average 2.5833333333333335) internal successors, (31), 11 states have internal predecessors, (31), 5 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-07 17:09:24,837 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 30 transitions. [2022-04-07 17:09:24,837 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2022-04-07 17:09:24,837 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:09:24,837 INFO L499 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:09:24,865 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2022-04-07 17:09:25,061 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable3 [2022-04-07 17:09:25,061 INFO L403 AbstractCegarLoop]: === Iteration 5 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:09:25,062 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:09:25,062 INFO L85 PathProgramCache]: Analyzing trace with hash -290697607, now seen corresponding path program 2 times [2022-04-07 17:09:25,062 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:09:25,062 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [961058087] [2022-04-07 17:09:25,062 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:09:25,062 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:09:25,089 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:09:25,204 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:09:25,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:09:25,210 INFO L290 TraceCheckUtils]: 0: Hoare triple {788#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {770#true} is VALID [2022-04-07 17:09:25,210 INFO L290 TraceCheckUtils]: 1: Hoare triple {770#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {770#true} is VALID [2022-04-07 17:09:25,210 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {770#true} {770#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {770#true} is VALID [2022-04-07 17:09:25,210 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 14 [2022-04-07 17:09:25,212 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:09:25,215 INFO L290 TraceCheckUtils]: 0: Hoare triple {770#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {770#true} is VALID [2022-04-07 17:09:25,215 INFO L290 TraceCheckUtils]: 1: Hoare triple {770#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {770#true} is VALID [2022-04-07 17:09:25,215 INFO L290 TraceCheckUtils]: 2: Hoare triple {770#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {770#true} is VALID [2022-04-07 17:09:25,216 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {770#true} {779#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {779#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:09:25,217 INFO L272 TraceCheckUtils]: 0: Hoare triple {770#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {788#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:09:25,217 INFO L290 TraceCheckUtils]: 1: Hoare triple {788#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {770#true} is VALID [2022-04-07 17:09:25,217 INFO L290 TraceCheckUtils]: 2: Hoare triple {770#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {770#true} is VALID [2022-04-07 17:09:25,217 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {770#true} {770#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {770#true} is VALID [2022-04-07 17:09:25,217 INFO L272 TraceCheckUtils]: 4: Hoare triple {770#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {770#true} is VALID [2022-04-07 17:09:25,217 INFO L290 TraceCheckUtils]: 5: Hoare triple {770#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {770#true} is VALID [2022-04-07 17:09:25,218 INFO L290 TraceCheckUtils]: 6: Hoare triple {770#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {775#(= main_~i~0 0)} is VALID [2022-04-07 17:09:25,218 INFO L290 TraceCheckUtils]: 7: Hoare triple {775#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {775#(= main_~i~0 0)} is VALID [2022-04-07 17:09:25,219 INFO L290 TraceCheckUtils]: 8: Hoare triple {775#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {776#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:09:25,219 INFO L290 TraceCheckUtils]: 9: Hoare triple {776#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {777#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:09:25,220 INFO L290 TraceCheckUtils]: 10: Hoare triple {777#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {778#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} is VALID [2022-04-07 17:09:25,220 INFO L290 TraceCheckUtils]: 11: Hoare triple {778#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {778#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} is VALID [2022-04-07 17:09:25,221 INFO L290 TraceCheckUtils]: 12: Hoare triple {778#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {779#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:09:25,221 INFO L290 TraceCheckUtils]: 13: Hoare triple {779#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {779#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:09:25,222 INFO L272 TraceCheckUtils]: 14: Hoare triple {779#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {770#true} is VALID [2022-04-07 17:09:25,222 INFO L290 TraceCheckUtils]: 15: Hoare triple {770#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {770#true} is VALID [2022-04-07 17:09:25,222 INFO L290 TraceCheckUtils]: 16: Hoare triple {770#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {770#true} is VALID [2022-04-07 17:09:25,222 INFO L290 TraceCheckUtils]: 17: Hoare triple {770#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {770#true} is VALID [2022-04-07 17:09:25,223 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {770#true} {779#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {779#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:09:25,223 INFO L290 TraceCheckUtils]: 19: Hoare triple {779#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {779#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:09:25,224 INFO L290 TraceCheckUtils]: 20: Hoare triple {779#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {784#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:09:25,224 INFO L290 TraceCheckUtils]: 21: Hoare triple {784#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {785#(= |main_#t~mem5| 0)} is VALID [2022-04-07 17:09:25,225 INFO L272 TraceCheckUtils]: 22: Hoare triple {785#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {786#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:09:25,225 INFO L290 TraceCheckUtils]: 23: Hoare triple {786#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {787#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:09:25,226 INFO L290 TraceCheckUtils]: 24: Hoare triple {787#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {771#false} is VALID [2022-04-07 17:09:25,226 INFO L290 TraceCheckUtils]: 25: Hoare triple {771#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {771#false} is VALID [2022-04-07 17:09:25,226 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:09:25,226 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:09:25,226 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [961058087] [2022-04-07 17:09:25,226 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [961058087] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:09:25,226 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [180816730] [2022-04-07 17:09:25,227 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-07 17:09:25,227 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:09:25,227 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:09:25,228 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:09:25,251 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-04-07 17:09:25,285 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-07 17:09:25,285 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 17:09:25,286 INFO L263 TraceCheckSpWp]: Trace formula consists of 103 conjuncts, 17 conjunts are in the unsatisfiable core [2022-04-07 17:09:25,294 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:09:25,295 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:09:25,363 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-07 17:09:27,692 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2022-04-07 17:09:27,738 INFO L272 TraceCheckUtils]: 0: Hoare triple {770#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {770#true} is VALID [2022-04-07 17:09:27,738 INFO L290 TraceCheckUtils]: 1: Hoare triple {770#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {770#true} is VALID [2022-04-07 17:09:27,738 INFO L290 TraceCheckUtils]: 2: Hoare triple {770#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {770#true} is VALID [2022-04-07 17:09:27,738 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {770#true} {770#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {770#true} is VALID [2022-04-07 17:09:27,739 INFO L272 TraceCheckUtils]: 4: Hoare triple {770#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {770#true} is VALID [2022-04-07 17:09:27,739 INFO L290 TraceCheckUtils]: 5: Hoare triple {770#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {770#true} is VALID [2022-04-07 17:09:27,742 INFO L290 TraceCheckUtils]: 6: Hoare triple {770#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {775#(= main_~i~0 0)} is VALID [2022-04-07 17:09:27,742 INFO L290 TraceCheckUtils]: 7: Hoare triple {775#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {775#(= main_~i~0 0)} is VALID [2022-04-07 17:09:27,743 INFO L290 TraceCheckUtils]: 8: Hoare triple {775#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {776#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:09:27,743 INFO L290 TraceCheckUtils]: 9: Hoare triple {776#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {778#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} is VALID [2022-04-07 17:09:27,744 INFO L290 TraceCheckUtils]: 10: Hoare triple {778#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {778#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} is VALID [2022-04-07 17:09:27,744 INFO L290 TraceCheckUtils]: 11: Hoare triple {778#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {778#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} is VALID [2022-04-07 17:09:27,745 INFO L290 TraceCheckUtils]: 12: Hoare triple {778#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {779#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:09:27,745 INFO L290 TraceCheckUtils]: 13: Hoare triple {779#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {779#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:09:27,746 INFO L272 TraceCheckUtils]: 14: Hoare triple {779#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {834#(exists ((v_main_~x~0.offset_BEFORE_CALL_1 Int) (v_main_~x~0.base_BEFORE_CALL_1 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_1) (+ 4 v_main_~x~0.offset_BEFORE_CALL_1)) 0))} is VALID [2022-04-07 17:09:27,747 INFO L290 TraceCheckUtils]: 15: Hoare triple {834#(exists ((v_main_~x~0.offset_BEFORE_CALL_1 Int) (v_main_~x~0.base_BEFORE_CALL_1 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_1) (+ 4 v_main_~x~0.offset_BEFORE_CALL_1)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {834#(exists ((v_main_~x~0.offset_BEFORE_CALL_1 Int) (v_main_~x~0.base_BEFORE_CALL_1 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_1) (+ 4 v_main_~x~0.offset_BEFORE_CALL_1)) 0))} is VALID [2022-04-07 17:09:27,747 INFO L290 TraceCheckUtils]: 16: Hoare triple {834#(exists ((v_main_~x~0.offset_BEFORE_CALL_1 Int) (v_main_~x~0.base_BEFORE_CALL_1 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_1) (+ 4 v_main_~x~0.offset_BEFORE_CALL_1)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {834#(exists ((v_main_~x~0.offset_BEFORE_CALL_1 Int) (v_main_~x~0.base_BEFORE_CALL_1 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_1) (+ 4 v_main_~x~0.offset_BEFORE_CALL_1)) 0))} is VALID [2022-04-07 17:09:27,747 INFO L290 TraceCheckUtils]: 17: Hoare triple {834#(exists ((v_main_~x~0.offset_BEFORE_CALL_1 Int) (v_main_~x~0.base_BEFORE_CALL_1 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_1) (+ 4 v_main_~x~0.offset_BEFORE_CALL_1)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {834#(exists ((v_main_~x~0.offset_BEFORE_CALL_1 Int) (v_main_~x~0.base_BEFORE_CALL_1 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_1) (+ 4 v_main_~x~0.offset_BEFORE_CALL_1)) 0))} is VALID [2022-04-07 17:09:27,748 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {834#(exists ((v_main_~x~0.offset_BEFORE_CALL_1 Int) (v_main_~x~0.base_BEFORE_CALL_1 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_1) (+ 4 v_main_~x~0.offset_BEFORE_CALL_1)) 0))} {779#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {779#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:09:27,749 INFO L290 TraceCheckUtils]: 19: Hoare triple {779#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {779#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:09:27,749 INFO L290 TraceCheckUtils]: 20: Hoare triple {779#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {853#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 17:09:27,750 INFO L290 TraceCheckUtils]: 21: Hoare triple {853#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0) (= 0 (+ (- 1) main_~i~1)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {785#(= |main_#t~mem5| 0)} is VALID [2022-04-07 17:09:27,750 INFO L272 TraceCheckUtils]: 22: Hoare triple {785#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {860#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:09:27,751 INFO L290 TraceCheckUtils]: 23: Hoare triple {860#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {864#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:09:27,751 INFO L290 TraceCheckUtils]: 24: Hoare triple {864#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {771#false} is VALID [2022-04-07 17:09:27,751 INFO L290 TraceCheckUtils]: 25: Hoare triple {771#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {771#false} is VALID [2022-04-07 17:09:27,752 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:09:27,752 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 17:09:29,893 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2022-04-07 17:09:29,898 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2022-04-07 17:09:29,947 INFO L290 TraceCheckUtils]: 25: Hoare triple {771#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {771#false} is VALID [2022-04-07 17:09:29,947 INFO L290 TraceCheckUtils]: 24: Hoare triple {864#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {771#false} is VALID [2022-04-07 17:09:29,948 INFO L290 TraceCheckUtils]: 23: Hoare triple {860#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {864#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:09:29,948 INFO L272 TraceCheckUtils]: 22: Hoare triple {785#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {860#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:09:29,949 INFO L290 TraceCheckUtils]: 21: Hoare triple {784#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {785#(= |main_#t~mem5| 0)} is VALID [2022-04-07 17:09:29,950 INFO L290 TraceCheckUtils]: 20: Hoare triple {886#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {784#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:09:29,951 INFO L290 TraceCheckUtils]: 19: Hoare triple {886#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {886#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:09:29,952 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {770#true} {886#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {886#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:09:29,952 INFO L290 TraceCheckUtils]: 17: Hoare triple {770#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {770#true} is VALID [2022-04-07 17:09:29,952 INFO L290 TraceCheckUtils]: 16: Hoare triple {770#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {770#true} is VALID [2022-04-07 17:09:29,952 INFO L290 TraceCheckUtils]: 15: Hoare triple {770#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {770#true} is VALID [2022-04-07 17:09:29,953 INFO L272 TraceCheckUtils]: 14: Hoare triple {886#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {770#true} is VALID [2022-04-07 17:09:29,953 INFO L290 TraceCheckUtils]: 13: Hoare triple {886#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {886#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:09:29,954 INFO L290 TraceCheckUtils]: 12: Hoare triple {778#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {886#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:09:29,954 INFO L290 TraceCheckUtils]: 11: Hoare triple {778#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {778#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} is VALID [2022-04-07 17:09:29,955 INFO L290 TraceCheckUtils]: 10: Hoare triple {778#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {778#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} is VALID [2022-04-07 17:09:29,955 INFO L290 TraceCheckUtils]: 9: Hoare triple {776#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {778#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 4)) 0)} is VALID [2022-04-07 17:09:29,956 INFO L290 TraceCheckUtils]: 8: Hoare triple {775#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {776#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:09:29,956 INFO L290 TraceCheckUtils]: 7: Hoare triple {775#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {775#(= main_~i~0 0)} is VALID [2022-04-07 17:09:29,957 INFO L290 TraceCheckUtils]: 6: Hoare triple {770#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {775#(= main_~i~0 0)} is VALID [2022-04-07 17:09:29,957 INFO L290 TraceCheckUtils]: 5: Hoare triple {770#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {770#true} is VALID [2022-04-07 17:09:29,958 INFO L272 TraceCheckUtils]: 4: Hoare triple {770#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {770#true} is VALID [2022-04-07 17:09:29,960 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {770#true} {770#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {770#true} is VALID [2022-04-07 17:09:29,963 INFO L290 TraceCheckUtils]: 2: Hoare triple {770#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {770#true} is VALID [2022-04-07 17:09:29,965 INFO L290 TraceCheckUtils]: 1: Hoare triple {770#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {770#true} is VALID [2022-04-07 17:09:29,971 INFO L272 TraceCheckUtils]: 0: Hoare triple {770#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {770#true} is VALID [2022-04-07 17:09:29,971 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:09:29,971 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [180816730] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 17:09:29,971 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 17:09:29,971 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 11, 10] total 17 [2022-04-07 17:09:29,971 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [76537528] [2022-04-07 17:09:29,972 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 17:09:29,972 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 16 states have (on average 2.125) internal successors, (34), 14 states have internal predecessors, (34), 4 states have call successors, (8), 5 states have call predecessors, (8), 2 states have return successors, (4), 3 states have call predecessors, (4), 3 states have call successors, (4) Word has length 26 [2022-04-07 17:09:29,973 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:09:29,973 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 17 states, 16 states have (on average 2.125) internal successors, (34), 14 states have internal predecessors, (34), 4 states have call successors, (8), 5 states have call predecessors, (8), 2 states have return successors, (4), 3 states have call predecessors, (4), 3 states have call successors, (4) [2022-04-07 17:09:30,011 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 46 edges. 46 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:09:30,011 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 17 states [2022-04-07 17:09:30,011 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:09:30,011 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2022-04-07 17:09:30,011 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=227, Unknown=2, NotChecked=0, Total=272 [2022-04-07 17:09:30,012 INFO L87 Difference]: Start difference. First operand 29 states and 30 transitions. Second operand has 17 states, 16 states have (on average 2.125) internal successors, (34), 14 states have internal predecessors, (34), 4 states have call successors, (8), 5 states have call predecessors, (8), 2 states have return successors, (4), 3 states have call predecessors, (4), 3 states have call successors, (4) [2022-04-07 17:09:30,574 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:09:30,574 INFO L93 Difference]: Finished difference Result 40 states and 41 transitions. [2022-04-07 17:09:30,574 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-04-07 17:09:30,574 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 16 states have (on average 2.125) internal successors, (34), 14 states have internal predecessors, (34), 4 states have call successors, (8), 5 states have call predecessors, (8), 2 states have return successors, (4), 3 states have call predecessors, (4), 3 states have call successors, (4) Word has length 26 [2022-04-07 17:09:30,575 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:09:30,575 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 16 states have (on average 2.125) internal successors, (34), 14 states have internal predecessors, (34), 4 states have call successors, (8), 5 states have call predecessors, (8), 2 states have return successors, (4), 3 states have call predecessors, (4), 3 states have call successors, (4) [2022-04-07 17:09:30,577 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 42 transitions. [2022-04-07 17:09:30,577 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 16 states have (on average 2.125) internal successors, (34), 14 states have internal predecessors, (34), 4 states have call successors, (8), 5 states have call predecessors, (8), 2 states have return successors, (4), 3 states have call predecessors, (4), 3 states have call successors, (4) [2022-04-07 17:09:30,579 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 42 transitions. [2022-04-07 17:09:30,579 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 15 states and 42 transitions. [2022-04-07 17:09:30,627 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 42 edges. 42 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:09:30,628 INFO L225 Difference]: With dead ends: 40 [2022-04-07 17:09:30,628 INFO L226 Difference]: Without dead ends: 40 [2022-04-07 17:09:30,628 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 78 GetRequests, 46 SyntacticMatches, 6 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 149 ImplicationChecksByTransitivity, 4.3s TimeCoverageRelationStatistics Valid=118, Invalid=636, Unknown=2, NotChecked=0, Total=756 [2022-04-07 17:09:30,629 INFO L913 BasicCegarLoop]: 19 mSDtfsCounter, 50 mSDsluCounter, 49 mSDsCounter, 0 mSdLazyCounter, 199 mSolverCounterSat, 21 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 50 SdHoareTripleChecker+Valid, 68 SdHoareTripleChecker+Invalid, 256 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 21 IncrementalHoareTripleChecker+Valid, 199 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 36 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-07 17:09:30,629 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [50 Valid, 68 Invalid, 256 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [21 Valid, 199 Invalid, 0 Unknown, 36 Unchecked, 0.2s Time] [2022-04-07 17:09:30,630 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states. [2022-04-07 17:09:30,632 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 37. [2022-04-07 17:09:30,632 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:09:30,632 INFO L82 GeneralOperation]: Start isEquivalent. First operand 40 states. Second operand has 37 states, 27 states have (on average 1.0740740740740742) internal successors, (29), 28 states have internal predecessors, (29), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-07 17:09:30,633 INFO L74 IsIncluded]: Start isIncluded. First operand 40 states. Second operand has 37 states, 27 states have (on average 1.0740740740740742) internal successors, (29), 28 states have internal predecessors, (29), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-07 17:09:30,633 INFO L87 Difference]: Start difference. First operand 40 states. Second operand has 37 states, 27 states have (on average 1.0740740740740742) internal successors, (29), 28 states have internal predecessors, (29), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-07 17:09:30,634 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:09:30,634 INFO L93 Difference]: Finished difference Result 40 states and 41 transitions. [2022-04-07 17:09:30,634 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 41 transitions. [2022-04-07 17:09:30,635 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:09:30,635 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:09:30,635 INFO L74 IsIncluded]: Start isIncluded. First operand has 37 states, 27 states have (on average 1.0740740740740742) internal successors, (29), 28 states have internal predecessors, (29), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) Second operand 40 states. [2022-04-07 17:09:30,635 INFO L87 Difference]: Start difference. First operand has 37 states, 27 states have (on average 1.0740740740740742) internal successors, (29), 28 states have internal predecessors, (29), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) Second operand 40 states. [2022-04-07 17:09:30,637 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:09:30,637 INFO L93 Difference]: Finished difference Result 40 states and 41 transitions. [2022-04-07 17:09:30,637 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 41 transitions. [2022-04-07 17:09:30,637 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:09:30,637 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:09:30,637 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:09:30,637 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:09:30,638 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 37 states, 27 states have (on average 1.0740740740740742) internal successors, (29), 28 states have internal predecessors, (29), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-07 17:09:30,639 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 38 transitions. [2022-04-07 17:09:30,639 INFO L78 Accepts]: Start accepts. Automaton has 37 states and 38 transitions. Word has length 26 [2022-04-07 17:09:30,639 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:09:30,639 INFO L478 AbstractCegarLoop]: Abstraction has 37 states and 38 transitions. [2022-04-07 17:09:30,639 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 17 states, 16 states have (on average 2.125) internal successors, (34), 14 states have internal predecessors, (34), 4 states have call successors, (8), 5 states have call predecessors, (8), 2 states have return successors, (4), 3 states have call predecessors, (4), 3 states have call successors, (4) [2022-04-07 17:09:30,639 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 38 transitions. [2022-04-07 17:09:30,640 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2022-04-07 17:09:30,640 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:09:30,640 INFO L499 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:09:30,663 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-04-07 17:09:30,863 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:09:30,863 INFO L403 AbstractCegarLoop]: === Iteration 6 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:09:30,864 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:09:30,864 INFO L85 PathProgramCache]: Analyzing trace with hash -1718174257, now seen corresponding path program 3 times [2022-04-07 17:09:30,864 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:09:30,864 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [217486127] [2022-04-07 17:09:30,864 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:09:30,864 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:09:30,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:09:30,960 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:09:30,962 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:09:30,966 INFO L290 TraceCheckUtils]: 0: Hoare triple {1149#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1129#true} is VALID [2022-04-07 17:09:30,966 INFO L290 TraceCheckUtils]: 1: Hoare triple {1129#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-07 17:09:30,966 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1129#true} {1129#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-07 17:09:30,966 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 14 [2022-04-07 17:09:30,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:09:30,971 INFO L290 TraceCheckUtils]: 0: Hoare triple {1129#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1129#true} is VALID [2022-04-07 17:09:30,971 INFO L290 TraceCheckUtils]: 1: Hoare triple {1129#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-07 17:09:30,971 INFO L290 TraceCheckUtils]: 2: Hoare triple {1129#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-07 17:09:30,972 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1129#true} {1138#(and (<= main_~n~0 2) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1138#(and (<= main_~n~0 2) (= main_~i~1 0))} is VALID [2022-04-07 17:09:30,972 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 22 [2022-04-07 17:09:30,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:09:30,976 INFO L290 TraceCheckUtils]: 0: Hoare triple {1129#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1129#true} is VALID [2022-04-07 17:09:30,976 INFO L290 TraceCheckUtils]: 1: Hoare triple {1129#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-07 17:09:30,976 INFO L290 TraceCheckUtils]: 2: Hoare triple {1129#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-07 17:09:30,977 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1129#true} {1143#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1143#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 17:09:30,977 INFO L272 TraceCheckUtils]: 0: Hoare triple {1129#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1149#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:09:30,977 INFO L290 TraceCheckUtils]: 1: Hoare triple {1149#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1129#true} is VALID [2022-04-07 17:09:30,978 INFO L290 TraceCheckUtils]: 2: Hoare triple {1129#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-07 17:09:30,978 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1129#true} {1129#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-07 17:09:30,978 INFO L272 TraceCheckUtils]: 4: Hoare triple {1129#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-07 17:09:30,978 INFO L290 TraceCheckUtils]: 5: Hoare triple {1129#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {1129#true} is VALID [2022-04-07 17:09:30,978 INFO L290 TraceCheckUtils]: 6: Hoare triple {1129#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {1134#(= main_~i~0 0)} is VALID [2022-04-07 17:09:30,979 INFO L290 TraceCheckUtils]: 7: Hoare triple {1134#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1134#(= main_~i~0 0)} is VALID [2022-04-07 17:09:30,979 INFO L290 TraceCheckUtils]: 8: Hoare triple {1134#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1135#(<= main_~i~0 1)} is VALID [2022-04-07 17:09:30,980 INFO L290 TraceCheckUtils]: 9: Hoare triple {1135#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1135#(<= main_~i~0 1)} is VALID [2022-04-07 17:09:30,980 INFO L290 TraceCheckUtils]: 10: Hoare triple {1135#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1136#(<= main_~i~0 2)} is VALID [2022-04-07 17:09:30,981 INFO L290 TraceCheckUtils]: 11: Hoare triple {1136#(<= main_~i~0 2)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {1137#(<= main_~n~0 2)} is VALID [2022-04-07 17:09:30,981 INFO L290 TraceCheckUtils]: 12: Hoare triple {1137#(<= main_~n~0 2)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {1138#(and (<= main_~n~0 2) (= main_~i~1 0))} is VALID [2022-04-07 17:09:30,983 INFO L290 TraceCheckUtils]: 13: Hoare triple {1138#(and (<= main_~n~0 2) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1138#(and (<= main_~n~0 2) (= main_~i~1 0))} is VALID [2022-04-07 17:09:30,983 INFO L272 TraceCheckUtils]: 14: Hoare triple {1138#(and (<= main_~n~0 2) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1129#true} is VALID [2022-04-07 17:09:30,983 INFO L290 TraceCheckUtils]: 15: Hoare triple {1129#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1129#true} is VALID [2022-04-07 17:09:30,983 INFO L290 TraceCheckUtils]: 16: Hoare triple {1129#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-07 17:09:30,984 INFO L290 TraceCheckUtils]: 17: Hoare triple {1129#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-07 17:09:30,984 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {1129#true} {1138#(and (<= main_~n~0 2) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1138#(and (<= main_~n~0 2) (= main_~i~1 0))} is VALID [2022-04-07 17:09:30,984 INFO L290 TraceCheckUtils]: 19: Hoare triple {1138#(and (<= main_~n~0 2) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {1138#(and (<= main_~n~0 2) (= main_~i~1 0))} is VALID [2022-04-07 17:09:30,985 INFO L290 TraceCheckUtils]: 20: Hoare triple {1138#(and (<= main_~n~0 2) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {1143#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 17:09:30,985 INFO L290 TraceCheckUtils]: 21: Hoare triple {1143#(<= main_~n~0 (+ main_~i~1 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1143#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 17:09:30,985 INFO L272 TraceCheckUtils]: 22: Hoare triple {1143#(<= main_~n~0 (+ main_~i~1 1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1129#true} is VALID [2022-04-07 17:09:30,985 INFO L290 TraceCheckUtils]: 23: Hoare triple {1129#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1129#true} is VALID [2022-04-07 17:09:30,986 INFO L290 TraceCheckUtils]: 24: Hoare triple {1129#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-07 17:09:30,986 INFO L290 TraceCheckUtils]: 25: Hoare triple {1129#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-07 17:09:30,986 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {1129#true} {1143#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1143#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 17:09:30,987 INFO L290 TraceCheckUtils]: 27: Hoare triple {1143#(<= main_~n~0 (+ main_~i~1 1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {1143#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 17:09:30,987 INFO L290 TraceCheckUtils]: 28: Hoare triple {1143#(<= main_~n~0 (+ main_~i~1 1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {1148#(<= main_~n~0 main_~i~1)} is VALID [2022-04-07 17:09:30,988 INFO L290 TraceCheckUtils]: 29: Hoare triple {1148#(<= main_~n~0 main_~i~1)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1130#false} is VALID [2022-04-07 17:09:30,988 INFO L272 TraceCheckUtils]: 30: Hoare triple {1130#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1130#false} is VALID [2022-04-07 17:09:30,988 INFO L290 TraceCheckUtils]: 31: Hoare triple {1130#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1130#false} is VALID [2022-04-07 17:09:30,988 INFO L290 TraceCheckUtils]: 32: Hoare triple {1130#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1130#false} is VALID [2022-04-07 17:09:30,988 INFO L290 TraceCheckUtils]: 33: Hoare triple {1130#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1130#false} is VALID [2022-04-07 17:09:30,988 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 7 proven. 9 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-07 17:09:30,988 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:09:30,989 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [217486127] [2022-04-07 17:09:30,989 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [217486127] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:09:30,989 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1675314523] [2022-04-07 17:09:30,989 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-07 17:09:30,989 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:09:30,989 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:09:30,990 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:09:31,001 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-04-07 17:09:31,042 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2022-04-07 17:09:31,042 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 17:09:31,043 INFO L263 TraceCheckSpWp]: Trace formula consists of 118 conjuncts, 8 conjunts are in the unsatisfiable core [2022-04-07 17:09:31,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:09:31,054 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:09:31,321 INFO L272 TraceCheckUtils]: 0: Hoare triple {1129#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-07 17:09:31,321 INFO L290 TraceCheckUtils]: 1: Hoare triple {1129#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1129#true} is VALID [2022-04-07 17:09:31,321 INFO L290 TraceCheckUtils]: 2: Hoare triple {1129#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-07 17:09:31,321 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1129#true} {1129#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-07 17:09:31,322 INFO L272 TraceCheckUtils]: 4: Hoare triple {1129#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-07 17:09:31,322 INFO L290 TraceCheckUtils]: 5: Hoare triple {1129#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {1129#true} is VALID [2022-04-07 17:09:31,323 INFO L290 TraceCheckUtils]: 6: Hoare triple {1129#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {1171#(<= main_~i~0 0)} is VALID [2022-04-07 17:09:31,324 INFO L290 TraceCheckUtils]: 7: Hoare triple {1171#(<= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1171#(<= main_~i~0 0)} is VALID [2022-04-07 17:09:31,324 INFO L290 TraceCheckUtils]: 8: Hoare triple {1171#(<= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1135#(<= main_~i~0 1)} is VALID [2022-04-07 17:09:31,325 INFO L290 TraceCheckUtils]: 9: Hoare triple {1135#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1135#(<= main_~i~0 1)} is VALID [2022-04-07 17:09:31,325 INFO L290 TraceCheckUtils]: 10: Hoare triple {1135#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1136#(<= main_~i~0 2)} is VALID [2022-04-07 17:09:31,327 INFO L290 TraceCheckUtils]: 11: Hoare triple {1136#(<= main_~i~0 2)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {1137#(<= main_~n~0 2)} is VALID [2022-04-07 17:09:31,327 INFO L290 TraceCheckUtils]: 12: Hoare triple {1137#(<= main_~n~0 2)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {1190#(and (<= main_~n~0 2) (<= 0 main_~i~1))} is VALID [2022-04-07 17:09:31,328 INFO L290 TraceCheckUtils]: 13: Hoare triple {1190#(and (<= main_~n~0 2) (<= 0 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1190#(and (<= main_~n~0 2) (<= 0 main_~i~1))} is VALID [2022-04-07 17:09:31,328 INFO L272 TraceCheckUtils]: 14: Hoare triple {1190#(and (<= main_~n~0 2) (<= 0 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1129#true} is VALID [2022-04-07 17:09:31,328 INFO L290 TraceCheckUtils]: 15: Hoare triple {1129#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1129#true} is VALID [2022-04-07 17:09:31,328 INFO L290 TraceCheckUtils]: 16: Hoare triple {1129#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-07 17:09:31,329 INFO L290 TraceCheckUtils]: 17: Hoare triple {1129#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-07 17:09:31,330 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {1129#true} {1190#(and (<= main_~n~0 2) (<= 0 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1190#(and (<= main_~n~0 2) (<= 0 main_~i~1))} is VALID [2022-04-07 17:09:31,330 INFO L290 TraceCheckUtils]: 19: Hoare triple {1190#(and (<= main_~n~0 2) (<= 0 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {1190#(and (<= main_~n~0 2) (<= 0 main_~i~1))} is VALID [2022-04-07 17:09:31,331 INFO L290 TraceCheckUtils]: 20: Hoare triple {1190#(and (<= main_~n~0 2) (<= 0 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {1215#(and (<= main_~n~0 2) (<= 1 main_~i~1))} is VALID [2022-04-07 17:09:31,331 INFO L290 TraceCheckUtils]: 21: Hoare triple {1215#(and (<= main_~n~0 2) (<= 1 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1215#(and (<= main_~n~0 2) (<= 1 main_~i~1))} is VALID [2022-04-07 17:09:31,331 INFO L272 TraceCheckUtils]: 22: Hoare triple {1215#(and (<= main_~n~0 2) (<= 1 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1129#true} is VALID [2022-04-07 17:09:31,331 INFO L290 TraceCheckUtils]: 23: Hoare triple {1129#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1129#true} is VALID [2022-04-07 17:09:31,332 INFO L290 TraceCheckUtils]: 24: Hoare triple {1129#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-07 17:09:31,332 INFO L290 TraceCheckUtils]: 25: Hoare triple {1129#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-07 17:09:31,332 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {1129#true} {1215#(and (<= main_~n~0 2) (<= 1 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1215#(and (<= main_~n~0 2) (<= 1 main_~i~1))} is VALID [2022-04-07 17:09:31,333 INFO L290 TraceCheckUtils]: 27: Hoare triple {1215#(and (<= main_~n~0 2) (<= 1 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {1215#(and (<= main_~n~0 2) (<= 1 main_~i~1))} is VALID [2022-04-07 17:09:31,333 INFO L290 TraceCheckUtils]: 28: Hoare triple {1215#(and (<= main_~n~0 2) (<= 1 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {1240#(and (<= main_~n~0 2) (<= 2 main_~i~1))} is VALID [2022-04-07 17:09:31,334 INFO L290 TraceCheckUtils]: 29: Hoare triple {1240#(and (<= main_~n~0 2) (<= 2 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1130#false} is VALID [2022-04-07 17:09:31,335 INFO L272 TraceCheckUtils]: 30: Hoare triple {1130#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1130#false} is VALID [2022-04-07 17:09:31,335 INFO L290 TraceCheckUtils]: 31: Hoare triple {1130#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1130#false} is VALID [2022-04-07 17:09:31,335 INFO L290 TraceCheckUtils]: 32: Hoare triple {1130#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1130#false} is VALID [2022-04-07 17:09:31,335 INFO L290 TraceCheckUtils]: 33: Hoare triple {1130#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1130#false} is VALID [2022-04-07 17:09:31,335 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 12 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-07 17:09:31,335 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 17:09:31,519 INFO L290 TraceCheckUtils]: 33: Hoare triple {1130#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1130#false} is VALID [2022-04-07 17:09:31,520 INFO L290 TraceCheckUtils]: 32: Hoare triple {1130#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1130#false} is VALID [2022-04-07 17:09:31,520 INFO L290 TraceCheckUtils]: 31: Hoare triple {1130#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1130#false} is VALID [2022-04-07 17:09:31,520 INFO L272 TraceCheckUtils]: 30: Hoare triple {1130#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1130#false} is VALID [2022-04-07 17:09:31,520 INFO L290 TraceCheckUtils]: 29: Hoare triple {1148#(<= main_~n~0 main_~i~1)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1130#false} is VALID [2022-04-07 17:09:31,521 INFO L290 TraceCheckUtils]: 28: Hoare triple {1143#(<= main_~n~0 (+ main_~i~1 1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {1148#(<= main_~n~0 main_~i~1)} is VALID [2022-04-07 17:09:31,521 INFO L290 TraceCheckUtils]: 27: Hoare triple {1143#(<= main_~n~0 (+ main_~i~1 1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {1143#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 17:09:31,522 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {1129#true} {1143#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1143#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 17:09:31,522 INFO L290 TraceCheckUtils]: 25: Hoare triple {1129#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-07 17:09:31,522 INFO L290 TraceCheckUtils]: 24: Hoare triple {1129#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-07 17:09:31,522 INFO L290 TraceCheckUtils]: 23: Hoare triple {1129#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1129#true} is VALID [2022-04-07 17:09:31,522 INFO L272 TraceCheckUtils]: 22: Hoare triple {1143#(<= main_~n~0 (+ main_~i~1 1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1129#true} is VALID [2022-04-07 17:09:31,523 INFO L290 TraceCheckUtils]: 21: Hoare triple {1143#(<= main_~n~0 (+ main_~i~1 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1143#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 17:09:31,523 INFO L290 TraceCheckUtils]: 20: Hoare triple {1295#(<= main_~n~0 (+ main_~i~1 2))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {1143#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 17:09:31,524 INFO L290 TraceCheckUtils]: 19: Hoare triple {1295#(<= main_~n~0 (+ main_~i~1 2))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {1295#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 17:09:31,524 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {1129#true} {1295#(<= main_~n~0 (+ main_~i~1 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1295#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 17:09:31,524 INFO L290 TraceCheckUtils]: 17: Hoare triple {1129#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-07 17:09:31,525 INFO L290 TraceCheckUtils]: 16: Hoare triple {1129#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-07 17:09:31,525 INFO L290 TraceCheckUtils]: 15: Hoare triple {1129#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1129#true} is VALID [2022-04-07 17:09:31,525 INFO L272 TraceCheckUtils]: 14: Hoare triple {1295#(<= main_~n~0 (+ main_~i~1 2))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1129#true} is VALID [2022-04-07 17:09:31,527 INFO L290 TraceCheckUtils]: 13: Hoare triple {1295#(<= main_~n~0 (+ main_~i~1 2))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1295#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 17:09:31,527 INFO L290 TraceCheckUtils]: 12: Hoare triple {1137#(<= main_~n~0 2)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {1295#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 17:09:31,528 INFO L290 TraceCheckUtils]: 11: Hoare triple {1136#(<= main_~i~0 2)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {1137#(<= main_~n~0 2)} is VALID [2022-04-07 17:09:31,528 INFO L290 TraceCheckUtils]: 10: Hoare triple {1135#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1136#(<= main_~i~0 2)} is VALID [2022-04-07 17:09:31,529 INFO L290 TraceCheckUtils]: 9: Hoare triple {1135#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1135#(<= main_~i~0 1)} is VALID [2022-04-07 17:09:31,529 INFO L290 TraceCheckUtils]: 8: Hoare triple {1171#(<= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1135#(<= main_~i~0 1)} is VALID [2022-04-07 17:09:31,530 INFO L290 TraceCheckUtils]: 7: Hoare triple {1171#(<= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1171#(<= main_~i~0 0)} is VALID [2022-04-07 17:09:31,530 INFO L290 TraceCheckUtils]: 6: Hoare triple {1129#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {1171#(<= main_~i~0 0)} is VALID [2022-04-07 17:09:31,530 INFO L290 TraceCheckUtils]: 5: Hoare triple {1129#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {1129#true} is VALID [2022-04-07 17:09:31,530 INFO L272 TraceCheckUtils]: 4: Hoare triple {1129#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-07 17:09:31,531 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1129#true} {1129#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-07 17:09:31,531 INFO L290 TraceCheckUtils]: 2: Hoare triple {1129#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-07 17:09:31,531 INFO L290 TraceCheckUtils]: 1: Hoare triple {1129#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1129#true} is VALID [2022-04-07 17:09:31,531 INFO L272 TraceCheckUtils]: 0: Hoare triple {1129#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1129#true} is VALID [2022-04-07 17:09:31,531 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 12 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-07 17:09:31,531 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1675314523] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 17:09:31,532 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 17:09:31,532 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9, 9] total 15 [2022-04-07 17:09:31,532 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [971117603] [2022-04-07 17:09:31,532 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 17:09:31,532 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 15 states have (on average 2.6) internal successors, (39), 14 states have internal predecessors, (39), 7 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) Word has length 34 [2022-04-07 17:09:31,533 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:09:31,533 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 15 states, 15 states have (on average 2.6) internal successors, (39), 14 states have internal predecessors, (39), 7 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-07 17:09:31,570 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 54 edges. 54 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:09:31,570 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 15 states [2022-04-07 17:09:31,570 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:09:31,571 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2022-04-07 17:09:31,571 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=159, Unknown=0, NotChecked=0, Total=210 [2022-04-07 17:09:31,571 INFO L87 Difference]: Start difference. First operand 37 states and 38 transitions. Second operand has 15 states, 15 states have (on average 2.6) internal successors, (39), 14 states have internal predecessors, (39), 7 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-07 17:09:31,975 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:09:31,976 INFO L93 Difference]: Finished difference Result 50 states and 53 transitions. [2022-04-07 17:09:31,976 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-04-07 17:09:31,976 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 15 states have (on average 2.6) internal successors, (39), 14 states have internal predecessors, (39), 7 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) Word has length 34 [2022-04-07 17:09:31,976 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:09:31,976 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 15 states have (on average 2.6) internal successors, (39), 14 states have internal predecessors, (39), 7 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-07 17:09:31,978 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 40 transitions. [2022-04-07 17:09:31,978 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 15 states have (on average 2.6) internal successors, (39), 14 states have internal predecessors, (39), 7 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-07 17:09:31,980 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 40 transitions. [2022-04-07 17:09:31,980 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 10 states and 40 transitions. [2022-04-07 17:09:32,020 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 40 edges. 40 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:09:32,022 INFO L225 Difference]: With dead ends: 50 [2022-04-07 17:09:32,022 INFO L226 Difference]: Without dead ends: 40 [2022-04-07 17:09:32,022 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 89 GetRequests, 68 SyntacticMatches, 1 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 95 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=111, Invalid=351, Unknown=0, NotChecked=0, Total=462 [2022-04-07 17:09:32,023 INFO L913 BasicCegarLoop]: 17 mSDtfsCounter, 36 mSDsluCounter, 37 mSDsCounter, 0 mSdLazyCounter, 160 mSolverCounterSat, 23 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 37 SdHoareTripleChecker+Valid, 54 SdHoareTripleChecker+Invalid, 183 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 23 IncrementalHoareTripleChecker+Valid, 160 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-07 17:09:32,023 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [37 Valid, 54 Invalid, 183 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [23 Valid, 160 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-07 17:09:32,023 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states. [2022-04-07 17:09:32,026 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 39. [2022-04-07 17:09:32,026 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:09:32,026 INFO L82 GeneralOperation]: Start isEquivalent. First operand 40 states. Second operand has 39 states, 29 states have (on average 1.0689655172413792) internal successors, (31), 30 states have internal predecessors, (31), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-07 17:09:32,026 INFO L74 IsIncluded]: Start isIncluded. First operand 40 states. Second operand has 39 states, 29 states have (on average 1.0689655172413792) internal successors, (31), 30 states have internal predecessors, (31), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-07 17:09:32,026 INFO L87 Difference]: Start difference. First operand 40 states. Second operand has 39 states, 29 states have (on average 1.0689655172413792) internal successors, (31), 30 states have internal predecessors, (31), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-07 17:09:32,028 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:09:32,028 INFO L93 Difference]: Finished difference Result 40 states and 41 transitions. [2022-04-07 17:09:32,028 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 41 transitions. [2022-04-07 17:09:32,028 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:09:32,028 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:09:32,029 INFO L74 IsIncluded]: Start isIncluded. First operand has 39 states, 29 states have (on average 1.0689655172413792) internal successors, (31), 30 states have internal predecessors, (31), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) Second operand 40 states. [2022-04-07 17:09:32,029 INFO L87 Difference]: Start difference. First operand has 39 states, 29 states have (on average 1.0689655172413792) internal successors, (31), 30 states have internal predecessors, (31), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) Second operand 40 states. [2022-04-07 17:09:32,030 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:09:32,030 INFO L93 Difference]: Finished difference Result 40 states and 41 transitions. [2022-04-07 17:09:32,030 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 41 transitions. [2022-04-07 17:09:32,031 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:09:32,031 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:09:32,031 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:09:32,031 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:09:32,031 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 39 states, 29 states have (on average 1.0689655172413792) internal successors, (31), 30 states have internal predecessors, (31), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-07 17:09:32,032 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 40 transitions. [2022-04-07 17:09:32,032 INFO L78 Accepts]: Start accepts. Automaton has 39 states and 40 transitions. Word has length 34 [2022-04-07 17:09:32,032 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:09:32,032 INFO L478 AbstractCegarLoop]: Abstraction has 39 states and 40 transitions. [2022-04-07 17:09:32,033 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 15 states, 15 states have (on average 2.6) internal successors, (39), 14 states have internal predecessors, (39), 7 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-07 17:09:32,033 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 40 transitions. [2022-04-07 17:09:32,033 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2022-04-07 17:09:32,033 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:09:32,034 INFO L499 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:09:32,059 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2022-04-07 17:09:32,259 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5,5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:09:32,259 INFO L403 AbstractCegarLoop]: === Iteration 7 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:09:32,260 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:09:32,260 INFO L85 PathProgramCache]: Analyzing trace with hash -770459891, now seen corresponding path program 4 times [2022-04-07 17:09:32,260 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:09:32,260 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1406881464] [2022-04-07 17:09:32,260 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:09:32,260 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:09:32,300 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:09:32,443 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:09:32,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:09:32,450 INFO L290 TraceCheckUtils]: 0: Hoare triple {1565#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1541#true} is VALID [2022-04-07 17:09:32,450 INFO L290 TraceCheckUtils]: 1: Hoare triple {1541#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1541#true} is VALID [2022-04-07 17:09:32,451 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1541#true} {1541#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1541#true} is VALID [2022-04-07 17:09:32,451 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-07 17:09:32,452 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:09:32,456 INFO L290 TraceCheckUtils]: 0: Hoare triple {1541#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1541#true} is VALID [2022-04-07 17:09:32,456 INFO L290 TraceCheckUtils]: 1: Hoare triple {1541#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1541#true} is VALID [2022-04-07 17:09:32,456 INFO L290 TraceCheckUtils]: 2: Hoare triple {1541#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1541#true} is VALID [2022-04-07 17:09:32,457 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1541#true} {1551#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1551#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:09:32,457 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 24 [2022-04-07 17:09:32,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:09:32,462 INFO L290 TraceCheckUtils]: 0: Hoare triple {1541#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1541#true} is VALID [2022-04-07 17:09:32,462 INFO L290 TraceCheckUtils]: 1: Hoare triple {1541#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1541#true} is VALID [2022-04-07 17:09:32,462 INFO L290 TraceCheckUtils]: 2: Hoare triple {1541#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1541#true} is VALID [2022-04-07 17:09:32,463 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1541#true} {1556#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1556#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:09:32,463 INFO L272 TraceCheckUtils]: 0: Hoare triple {1541#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1565#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:09:32,464 INFO L290 TraceCheckUtils]: 1: Hoare triple {1565#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1541#true} is VALID [2022-04-07 17:09:32,464 INFO L290 TraceCheckUtils]: 2: Hoare triple {1541#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1541#true} is VALID [2022-04-07 17:09:32,464 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1541#true} {1541#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1541#true} is VALID [2022-04-07 17:09:32,464 INFO L272 TraceCheckUtils]: 4: Hoare triple {1541#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1541#true} is VALID [2022-04-07 17:09:32,464 INFO L290 TraceCheckUtils]: 5: Hoare triple {1541#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {1541#true} is VALID [2022-04-07 17:09:32,471 INFO L290 TraceCheckUtils]: 6: Hoare triple {1541#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {1546#(= main_~i~0 0)} is VALID [2022-04-07 17:09:32,472 INFO L290 TraceCheckUtils]: 7: Hoare triple {1546#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1546#(= main_~i~0 0)} is VALID [2022-04-07 17:09:32,472 INFO L290 TraceCheckUtils]: 8: Hoare triple {1546#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1547#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:09:32,473 INFO L290 TraceCheckUtils]: 9: Hoare triple {1547#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1547#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:09:32,476 INFO L290 TraceCheckUtils]: 10: Hoare triple {1547#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1548#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:09:32,477 INFO L290 TraceCheckUtils]: 11: Hoare triple {1548#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1549#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:09:32,477 INFO L290 TraceCheckUtils]: 12: Hoare triple {1549#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1550#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-07 17:09:32,478 INFO L290 TraceCheckUtils]: 13: Hoare triple {1550#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {1550#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-07 17:09:32,478 INFO L290 TraceCheckUtils]: 14: Hoare triple {1550#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {1551#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:09:32,479 INFO L290 TraceCheckUtils]: 15: Hoare triple {1551#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1551#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:09:32,479 INFO L272 TraceCheckUtils]: 16: Hoare triple {1551#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1541#true} is VALID [2022-04-07 17:09:32,479 INFO L290 TraceCheckUtils]: 17: Hoare triple {1541#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1541#true} is VALID [2022-04-07 17:09:32,479 INFO L290 TraceCheckUtils]: 18: Hoare triple {1541#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1541#true} is VALID [2022-04-07 17:09:32,479 INFO L290 TraceCheckUtils]: 19: Hoare triple {1541#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1541#true} is VALID [2022-04-07 17:09:32,480 INFO L284 TraceCheckUtils]: 20: Hoare quadruple {1541#true} {1551#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1551#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:09:32,480 INFO L290 TraceCheckUtils]: 21: Hoare triple {1551#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {1551#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:09:32,483 INFO L290 TraceCheckUtils]: 22: Hoare triple {1551#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {1556#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:09:32,483 INFO L290 TraceCheckUtils]: 23: Hoare triple {1556#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1556#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:09:32,483 INFO L272 TraceCheckUtils]: 24: Hoare triple {1556#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1541#true} is VALID [2022-04-07 17:09:32,484 INFO L290 TraceCheckUtils]: 25: Hoare triple {1541#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1541#true} is VALID [2022-04-07 17:09:32,484 INFO L290 TraceCheckUtils]: 26: Hoare triple {1541#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1541#true} is VALID [2022-04-07 17:09:32,484 INFO L290 TraceCheckUtils]: 27: Hoare triple {1541#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1541#true} is VALID [2022-04-07 17:09:32,484 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {1541#true} {1556#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1556#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:09:32,485 INFO L290 TraceCheckUtils]: 29: Hoare triple {1556#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {1556#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:09:32,485 INFO L290 TraceCheckUtils]: 30: Hoare triple {1556#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {1561#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:09:32,486 INFO L290 TraceCheckUtils]: 31: Hoare triple {1561#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1562#(= |main_#t~mem5| 0)} is VALID [2022-04-07 17:09:32,486 INFO L272 TraceCheckUtils]: 32: Hoare triple {1562#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1563#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:09:32,487 INFO L290 TraceCheckUtils]: 33: Hoare triple {1563#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1564#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:09:32,487 INFO L290 TraceCheckUtils]: 34: Hoare triple {1564#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1542#false} is VALID [2022-04-07 17:09:32,487 INFO L290 TraceCheckUtils]: 35: Hoare triple {1542#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1542#false} is VALID [2022-04-07 17:09:32,488 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 4 proven. 17 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-07 17:09:32,488 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:09:32,488 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1406881464] [2022-04-07 17:09:32,488 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1406881464] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:09:32,488 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [23782345] [2022-04-07 17:09:32,488 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-07 17:09:32,488 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:09:32,488 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:09:32,489 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:09:32,521 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-04-07 17:09:32,543 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-07 17:09:32,543 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 17:09:32,544 INFO L263 TraceCheckSpWp]: Trace formula consists of 125 conjuncts, 18 conjunts are in the unsatisfiable core [2022-04-07 17:09:32,557 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:09:32,559 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:09:32,650 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-07 17:09:34,741 INFO L356 Elim1Store]: treesize reduction 13, result has 18.8 percent of original size [2022-04-07 17:09:34,741 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 10 [2022-04-07 17:09:34,812 INFO L272 TraceCheckUtils]: 0: Hoare triple {1541#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1541#true} is VALID [2022-04-07 17:09:34,813 INFO L290 TraceCheckUtils]: 1: Hoare triple {1541#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1541#true} is VALID [2022-04-07 17:09:34,813 INFO L290 TraceCheckUtils]: 2: Hoare triple {1541#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1541#true} is VALID [2022-04-07 17:09:34,813 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1541#true} {1541#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1541#true} is VALID [2022-04-07 17:09:34,813 INFO L272 TraceCheckUtils]: 4: Hoare triple {1541#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1541#true} is VALID [2022-04-07 17:09:34,813 INFO L290 TraceCheckUtils]: 5: Hoare triple {1541#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {1541#true} is VALID [2022-04-07 17:09:34,813 INFO L290 TraceCheckUtils]: 6: Hoare triple {1541#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {1587#(<= main_~i~0 0)} is VALID [2022-04-07 17:09:34,814 INFO L290 TraceCheckUtils]: 7: Hoare triple {1587#(<= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1587#(<= main_~i~0 0)} is VALID [2022-04-07 17:09:34,814 INFO L290 TraceCheckUtils]: 8: Hoare triple {1587#(<= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1594#(<= main_~i~0 1)} is VALID [2022-04-07 17:09:34,814 INFO L290 TraceCheckUtils]: 9: Hoare triple {1594#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1594#(<= main_~i~0 1)} is VALID [2022-04-07 17:09:34,815 INFO L290 TraceCheckUtils]: 10: Hoare triple {1594#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1601#(<= main_~i~0 2)} is VALID [2022-04-07 17:09:34,815 INFO L290 TraceCheckUtils]: 11: Hoare triple {1601#(<= main_~i~0 2)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1605#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 2))} is VALID [2022-04-07 17:09:34,817 INFO L290 TraceCheckUtils]: 12: Hoare triple {1605#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1609#(exists ((v_main_~i~0_22 Int)) (and (<= main_~i~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0)))} is VALID [2022-04-07 17:09:34,817 INFO L290 TraceCheckUtils]: 13: Hoare triple {1609#(exists ((v_main_~i~0_22 Int)) (and (<= main_~i~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0)))} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {1613#(exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0)))} is VALID [2022-04-07 17:09:34,818 INFO L290 TraceCheckUtils]: 14: Hoare triple {1613#(exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0)))} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {1617#(and (<= 0 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} is VALID [2022-04-07 17:09:34,819 INFO L290 TraceCheckUtils]: 15: Hoare triple {1617#(and (<= 0 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1617#(and (<= 0 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} is VALID [2022-04-07 17:09:34,822 INFO L272 TraceCheckUtils]: 16: Hoare triple {1617#(and (<= 0 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1624#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} is VALID [2022-04-07 17:09:34,822 INFO L290 TraceCheckUtils]: 17: Hoare triple {1624#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1624#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} is VALID [2022-04-07 17:09:34,822 INFO L290 TraceCheckUtils]: 18: Hoare triple {1624#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1624#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} is VALID [2022-04-07 17:09:34,823 INFO L290 TraceCheckUtils]: 19: Hoare triple {1624#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1624#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} is VALID [2022-04-07 17:09:34,823 INFO L284 TraceCheckUtils]: 20: Hoare quadruple {1624#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} {1617#(and (<= 0 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1617#(and (<= 0 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} is VALID [2022-04-07 17:09:34,824 INFO L290 TraceCheckUtils]: 21: Hoare triple {1617#(and (<= 0 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {1617#(and (<= 0 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} is VALID [2022-04-07 17:09:34,825 INFO L290 TraceCheckUtils]: 22: Hoare triple {1617#(and (<= 0 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {1643#(and (<= 1 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} is VALID [2022-04-07 17:09:34,828 INFO L290 TraceCheckUtils]: 23: Hoare triple {1643#(and (<= 1 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1643#(and (<= 1 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} is VALID [2022-04-07 17:09:34,840 INFO L272 TraceCheckUtils]: 24: Hoare triple {1643#(and (<= 1 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1624#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} is VALID [2022-04-07 17:09:34,840 INFO L290 TraceCheckUtils]: 25: Hoare triple {1624#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1624#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} is VALID [2022-04-07 17:09:34,840 INFO L290 TraceCheckUtils]: 26: Hoare triple {1624#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1624#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} is VALID [2022-04-07 17:09:34,841 INFO L290 TraceCheckUtils]: 27: Hoare triple {1624#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1624#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} is VALID [2022-04-07 17:09:34,841 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {1624#(exists ((v_main_~x~0.offset_BEFORE_CALL_3 Int) (v_main_~x~0.base_BEFORE_CALL_3 Int) (v_main_~i~0_22 Int)) (and (<= v_main_~i~0_22 2) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_3) (+ (* v_main_~i~0_22 4) v_main_~x~0.offset_BEFORE_CALL_3)) 0)))} {1643#(and (<= 1 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1643#(and (<= 1 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} is VALID [2022-04-07 17:09:34,842 INFO L290 TraceCheckUtils]: 29: Hoare triple {1643#(and (<= 1 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {1643#(and (<= 1 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} is VALID [2022-04-07 17:09:34,843 INFO L290 TraceCheckUtils]: 30: Hoare triple {1643#(and (<= 1 main_~i~1) (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {1668#(and (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))) (<= 2 main_~i~1))} is VALID [2022-04-07 17:09:34,843 INFO L290 TraceCheckUtils]: 31: Hoare triple {1668#(and (exists ((v_main_~i~0_22 Int)) (and (<= main_~n~0 (+ v_main_~i~0_22 1)) (<= v_main_~i~0_22 2) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_22 4))) 0))) (<= 2 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1562#(= |main_#t~mem5| 0)} is VALID [2022-04-07 17:09:34,844 INFO L272 TraceCheckUtils]: 32: Hoare triple {1562#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1675#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:09:34,844 INFO L290 TraceCheckUtils]: 33: Hoare triple {1675#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1679#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:09:34,844 INFO L290 TraceCheckUtils]: 34: Hoare triple {1679#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1542#false} is VALID [2022-04-07 17:09:34,844 INFO L290 TraceCheckUtils]: 35: Hoare triple {1542#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1542#false} is VALID [2022-04-07 17:09:34,845 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 6 proven. 15 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-07 17:09:34,845 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 17:09:35,126 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [23782345] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:09:35,126 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-04-07 17:09:35,126 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 15] total 26 [2022-04-07 17:09:35,126 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2070090010] [2022-04-07 17:09:35,126 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-04-07 17:09:35,127 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 25 states have (on average 1.88) internal successors, (47), 23 states have internal predecessors, (47), 6 states have call successors, (9), 5 states have call predecessors, (9), 2 states have return successors, (5), 5 states have call predecessors, (5), 5 states have call successors, (5) Word has length 36 [2022-04-07 17:09:35,127 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:09:35,127 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 26 states, 25 states have (on average 1.88) internal successors, (47), 23 states have internal predecessors, (47), 6 states have call successors, (9), 5 states have call predecessors, (9), 2 states have return successors, (5), 5 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-07 17:09:35,219 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 61 edges. 61 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:09:35,219 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 26 states [2022-04-07 17:09:35,219 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:09:35,220 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2022-04-07 17:09:35,220 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=663, Unknown=0, NotChecked=0, Total=756 [2022-04-07 17:09:35,220 INFO L87 Difference]: Start difference. First operand 39 states and 40 transitions. Second operand has 26 states, 25 states have (on average 1.88) internal successors, (47), 23 states have internal predecessors, (47), 6 states have call successors, (9), 5 states have call predecessors, (9), 2 states have return successors, (5), 5 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-07 17:09:35,862 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:09:35,863 INFO L93 Difference]: Finished difference Result 68 states and 70 transitions. [2022-04-07 17:09:35,863 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2022-04-07 17:09:35,863 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 25 states have (on average 1.88) internal successors, (47), 23 states have internal predecessors, (47), 6 states have call successors, (9), 5 states have call predecessors, (9), 2 states have return successors, (5), 5 states have call predecessors, (5), 5 states have call successors, (5) Word has length 36 [2022-04-07 17:09:35,863 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:09:35,863 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 25 states have (on average 1.88) internal successors, (47), 23 states have internal predecessors, (47), 6 states have call successors, (9), 5 states have call predecessors, (9), 2 states have return successors, (5), 5 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-07 17:09:35,865 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 53 transitions. [2022-04-07 17:09:35,866 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 25 states have (on average 1.88) internal successors, (47), 23 states have internal predecessors, (47), 6 states have call successors, (9), 5 states have call predecessors, (9), 2 states have return successors, (5), 5 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-07 17:09:35,867 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 53 transitions. [2022-04-07 17:09:35,868 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 21 states and 53 transitions. [2022-04-07 17:09:39,961 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 53 edges. 51 inductive. 0 not inductive. 2 times theorem prover too weak to decide inductivity. [2022-04-07 17:09:39,962 INFO L225 Difference]: With dead ends: 68 [2022-04-07 17:09:39,962 INFO L226 Difference]: Without dead ends: 42 [2022-04-07 17:09:39,965 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 79 GetRequests, 35 SyntacticMatches, 4 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 373 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=193, Invalid=1529, Unknown=0, NotChecked=0, Total=1722 [2022-04-07 17:09:39,965 INFO L913 BasicCegarLoop]: 25 mSDtfsCounter, 20 mSDsluCounter, 145 mSDsCounter, 0 mSdLazyCounter, 177 mSolverCounterSat, 10 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 21 SdHoareTripleChecker+Valid, 170 SdHoareTripleChecker+Invalid, 345 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Valid, 177 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 158 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 17:09:39,965 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [21 Valid, 170 Invalid, 345 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [10 Valid, 177 Invalid, 0 Unknown, 158 Unchecked, 0.1s Time] [2022-04-07 17:09:39,966 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42 states. [2022-04-07 17:09:39,968 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42 to 41. [2022-04-07 17:09:39,968 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:09:39,968 INFO L82 GeneralOperation]: Start isEquivalent. First operand 42 states. Second operand has 41 states, 31 states have (on average 1.064516129032258) internal successors, (33), 32 states have internal predecessors, (33), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-07 17:09:39,968 INFO L74 IsIncluded]: Start isIncluded. First operand 42 states. Second operand has 41 states, 31 states have (on average 1.064516129032258) internal successors, (33), 32 states have internal predecessors, (33), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-07 17:09:39,968 INFO L87 Difference]: Start difference. First operand 42 states. Second operand has 41 states, 31 states have (on average 1.064516129032258) internal successors, (33), 32 states have internal predecessors, (33), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-07 17:09:39,970 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:09:39,970 INFO L93 Difference]: Finished difference Result 42 states and 43 transitions. [2022-04-07 17:09:39,970 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 43 transitions. [2022-04-07 17:09:39,970 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:09:39,970 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:09:39,971 INFO L74 IsIncluded]: Start isIncluded. First operand has 41 states, 31 states have (on average 1.064516129032258) internal successors, (33), 32 states have internal predecessors, (33), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) Second operand 42 states. [2022-04-07 17:09:39,971 INFO L87 Difference]: Start difference. First operand has 41 states, 31 states have (on average 1.064516129032258) internal successors, (33), 32 states have internal predecessors, (33), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) Second operand 42 states. [2022-04-07 17:09:39,972 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:09:39,972 INFO L93 Difference]: Finished difference Result 42 states and 43 transitions. [2022-04-07 17:09:39,972 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 43 transitions. [2022-04-07 17:09:39,972 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:09:39,972 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:09:39,972 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:09:39,972 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:09:39,973 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 41 states, 31 states have (on average 1.064516129032258) internal successors, (33), 32 states have internal predecessors, (33), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-07 17:09:39,974 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 42 transitions. [2022-04-07 17:09:39,974 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 42 transitions. Word has length 36 [2022-04-07 17:09:39,974 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:09:39,974 INFO L478 AbstractCegarLoop]: Abstraction has 41 states and 42 transitions. [2022-04-07 17:09:39,974 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 26 states, 25 states have (on average 1.88) internal successors, (47), 23 states have internal predecessors, (47), 6 states have call successors, (9), 5 states have call predecessors, (9), 2 states have return successors, (5), 5 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-07 17:09:39,974 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 42 transitions. [2022-04-07 17:09:39,975 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2022-04-07 17:09:39,975 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:09:39,975 INFO L499 BasicCegarLoop]: trace histogram [4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:09:39,995 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2022-04-07 17:09:40,187 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6,6 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:09:40,188 INFO L403 AbstractCegarLoop]: === Iteration 8 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:09:40,188 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:09:40,188 INFO L85 PathProgramCache]: Analyzing trace with hash -550020917, now seen corresponding path program 5 times [2022-04-07 17:09:40,188 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:09:40,188 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [814626712] [2022-04-07 17:09:40,188 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:09:40,188 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:09:40,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:09:40,411 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:09:40,413 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:09:40,416 INFO L290 TraceCheckUtils]: 0: Hoare triple {1960#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1935#true} is VALID [2022-04-07 17:09:40,416 INFO L290 TraceCheckUtils]: 1: Hoare triple {1935#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1935#true} is VALID [2022-04-07 17:09:40,416 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1935#true} {1935#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1935#true} is VALID [2022-04-07 17:09:40,416 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 18 [2022-04-07 17:09:40,418 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:09:40,421 INFO L290 TraceCheckUtils]: 0: Hoare triple {1935#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1935#true} is VALID [2022-04-07 17:09:40,421 INFO L290 TraceCheckUtils]: 1: Hoare triple {1935#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1935#true} is VALID [2022-04-07 17:09:40,421 INFO L290 TraceCheckUtils]: 2: Hoare triple {1935#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1935#true} is VALID [2022-04-07 17:09:40,422 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1935#true} {1946#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1946#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:09:40,422 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 26 [2022-04-07 17:09:40,423 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:09:40,426 INFO L290 TraceCheckUtils]: 0: Hoare triple {1935#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1935#true} is VALID [2022-04-07 17:09:40,426 INFO L290 TraceCheckUtils]: 1: Hoare triple {1935#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1935#true} is VALID [2022-04-07 17:09:40,426 INFO L290 TraceCheckUtils]: 2: Hoare triple {1935#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1935#true} is VALID [2022-04-07 17:09:40,427 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1935#true} {1951#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1951#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:09:40,428 INFO L272 TraceCheckUtils]: 0: Hoare triple {1935#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1960#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:09:40,428 INFO L290 TraceCheckUtils]: 1: Hoare triple {1960#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1935#true} is VALID [2022-04-07 17:09:40,428 INFO L290 TraceCheckUtils]: 2: Hoare triple {1935#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1935#true} is VALID [2022-04-07 17:09:40,428 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1935#true} {1935#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1935#true} is VALID [2022-04-07 17:09:40,428 INFO L272 TraceCheckUtils]: 4: Hoare triple {1935#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1935#true} is VALID [2022-04-07 17:09:40,428 INFO L290 TraceCheckUtils]: 5: Hoare triple {1935#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {1935#true} is VALID [2022-04-07 17:09:40,429 INFO L290 TraceCheckUtils]: 6: Hoare triple {1935#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {1940#(= main_~i~0 0)} is VALID [2022-04-07 17:09:40,429 INFO L290 TraceCheckUtils]: 7: Hoare triple {1940#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1940#(= main_~i~0 0)} is VALID [2022-04-07 17:09:40,430 INFO L290 TraceCheckUtils]: 8: Hoare triple {1940#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1941#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:09:40,430 INFO L290 TraceCheckUtils]: 9: Hoare triple {1941#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1941#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:09:40,431 INFO L290 TraceCheckUtils]: 10: Hoare triple {1941#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1942#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:09:40,431 INFO L290 TraceCheckUtils]: 11: Hoare triple {1942#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1943#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:09:40,432 INFO L290 TraceCheckUtils]: 12: Hoare triple {1943#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1944#(and (not (= (+ main_~x~0.offset 8) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} is VALID [2022-04-07 17:09:40,433 INFO L290 TraceCheckUtils]: 13: Hoare triple {1944#(and (not (= (+ main_~x~0.offset 8) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1945#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-07 17:09:40,433 INFO L290 TraceCheckUtils]: 14: Hoare triple {1945#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1945#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-07 17:09:40,434 INFO L290 TraceCheckUtils]: 15: Hoare triple {1945#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {1945#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-07 17:09:40,434 INFO L290 TraceCheckUtils]: 16: Hoare triple {1945#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {1946#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:09:40,435 INFO L290 TraceCheckUtils]: 17: Hoare triple {1946#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1946#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:09:40,435 INFO L272 TraceCheckUtils]: 18: Hoare triple {1946#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1935#true} is VALID [2022-04-07 17:09:40,435 INFO L290 TraceCheckUtils]: 19: Hoare triple {1935#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1935#true} is VALID [2022-04-07 17:09:40,435 INFO L290 TraceCheckUtils]: 20: Hoare triple {1935#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1935#true} is VALID [2022-04-07 17:09:40,435 INFO L290 TraceCheckUtils]: 21: Hoare triple {1935#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1935#true} is VALID [2022-04-07 17:09:40,436 INFO L284 TraceCheckUtils]: 22: Hoare quadruple {1935#true} {1946#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1946#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:09:40,436 INFO L290 TraceCheckUtils]: 23: Hoare triple {1946#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {1946#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:09:40,437 INFO L290 TraceCheckUtils]: 24: Hoare triple {1946#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {1951#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:09:40,437 INFO L290 TraceCheckUtils]: 25: Hoare triple {1951#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1951#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:09:40,438 INFO L272 TraceCheckUtils]: 26: Hoare triple {1951#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1935#true} is VALID [2022-04-07 17:09:40,438 INFO L290 TraceCheckUtils]: 27: Hoare triple {1935#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1935#true} is VALID [2022-04-07 17:09:40,438 INFO L290 TraceCheckUtils]: 28: Hoare triple {1935#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1935#true} is VALID [2022-04-07 17:09:40,438 INFO L290 TraceCheckUtils]: 29: Hoare triple {1935#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1935#true} is VALID [2022-04-07 17:09:40,439 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {1935#true} {1951#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1951#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:09:40,439 INFO L290 TraceCheckUtils]: 31: Hoare triple {1951#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {1951#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:09:40,440 INFO L290 TraceCheckUtils]: 32: Hoare triple {1951#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {1956#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:09:40,440 INFO L290 TraceCheckUtils]: 33: Hoare triple {1956#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1957#(= |main_#t~mem5| 0)} is VALID [2022-04-07 17:09:40,441 INFO L272 TraceCheckUtils]: 34: Hoare triple {1957#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1958#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:09:40,441 INFO L290 TraceCheckUtils]: 35: Hoare triple {1958#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1959#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:09:40,442 INFO L290 TraceCheckUtils]: 36: Hoare triple {1959#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1936#false} is VALID [2022-04-07 17:09:40,442 INFO L290 TraceCheckUtils]: 37: Hoare triple {1936#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1936#false} is VALID [2022-04-07 17:09:40,442 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 4 proven. 24 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-07 17:09:40,442 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:09:40,442 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [814626712] [2022-04-07 17:09:40,442 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [814626712] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:09:40,443 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [416800229] [2022-04-07 17:09:40,443 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-04-07 17:09:40,443 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:09:40,443 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:09:40,444 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:09:40,474 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-04-07 17:09:40,504 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 5 check-sat command(s) [2022-04-07 17:09:40,505 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 17:09:40,506 INFO L263 TraceCheckSpWp]: Trace formula consists of 132 conjuncts, 24 conjunts are in the unsatisfiable core [2022-04-07 17:09:40,518 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:09:40,520 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:09:40,575 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-07 17:09:40,800 INFO L356 Elim1Store]: treesize reduction 37, result has 22.9 percent of original size [2022-04-07 17:09:40,800 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 27 treesize of output 26 [2022-04-07 17:09:49,229 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2022-04-07 17:09:49,279 INFO L272 TraceCheckUtils]: 0: Hoare triple {1935#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1935#true} is VALID [2022-04-07 17:09:49,279 INFO L290 TraceCheckUtils]: 1: Hoare triple {1935#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1935#true} is VALID [2022-04-07 17:09:49,279 INFO L290 TraceCheckUtils]: 2: Hoare triple {1935#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1935#true} is VALID [2022-04-07 17:09:49,279 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1935#true} {1935#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1935#true} is VALID [2022-04-07 17:09:49,279 INFO L272 TraceCheckUtils]: 4: Hoare triple {1935#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1935#true} is VALID [2022-04-07 17:09:49,280 INFO L290 TraceCheckUtils]: 5: Hoare triple {1935#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {1935#true} is VALID [2022-04-07 17:09:49,280 INFO L290 TraceCheckUtils]: 6: Hoare triple {1935#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {1940#(= main_~i~0 0)} is VALID [2022-04-07 17:09:49,280 INFO L290 TraceCheckUtils]: 7: Hoare triple {1940#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1940#(= main_~i~0 0)} is VALID [2022-04-07 17:09:49,281 INFO L290 TraceCheckUtils]: 8: Hoare triple {1940#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1941#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:09:49,281 INFO L290 TraceCheckUtils]: 9: Hoare triple {1941#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1941#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:09:49,282 INFO L290 TraceCheckUtils]: 10: Hoare triple {1941#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1942#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:09:49,283 INFO L290 TraceCheckUtils]: 11: Hoare triple {1942#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1943#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:09:49,285 INFO L290 TraceCheckUtils]: 12: Hoare triple {1943#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2000#(exists ((v_main_~i~0_25 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ (* v_main_~i~0_25 4) main_~x~0.offset)) 0) (<= v_main_~i~0_25 2) (<= (+ v_main_~i~0_25 1) main_~i~0) (<= 2 v_main_~i~0_25)))} is VALID [2022-04-07 17:09:49,285 INFO L290 TraceCheckUtils]: 13: Hoare triple {2000#(exists ((v_main_~i~0_25 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ (* v_main_~i~0_25 4) main_~x~0.offset)) 0) (<= v_main_~i~0_25 2) (<= (+ v_main_~i~0_25 1) main_~i~0) (<= 2 v_main_~i~0_25)))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1945#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-07 17:09:49,286 INFO L290 TraceCheckUtils]: 14: Hoare triple {1945#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1945#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-07 17:09:49,286 INFO L290 TraceCheckUtils]: 15: Hoare triple {1945#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {1945#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-07 17:09:49,286 INFO L290 TraceCheckUtils]: 16: Hoare triple {1945#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {1946#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:09:49,287 INFO L290 TraceCheckUtils]: 17: Hoare triple {1946#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1946#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:09:49,287 INFO L272 TraceCheckUtils]: 18: Hoare triple {1946#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2019#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} is VALID [2022-04-07 17:09:49,288 INFO L290 TraceCheckUtils]: 19: Hoare triple {2019#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2019#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} is VALID [2022-04-07 17:09:49,288 INFO L290 TraceCheckUtils]: 20: Hoare triple {2019#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2019#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} is VALID [2022-04-07 17:09:49,288 INFO L290 TraceCheckUtils]: 21: Hoare triple {2019#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2019#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} is VALID [2022-04-07 17:09:49,289 INFO L284 TraceCheckUtils]: 22: Hoare quadruple {2019#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} {1946#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1946#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:09:49,289 INFO L290 TraceCheckUtils]: 23: Hoare triple {1946#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {1946#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:09:49,290 INFO L290 TraceCheckUtils]: 24: Hoare triple {1946#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {2038#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 17:09:49,290 INFO L290 TraceCheckUtils]: 25: Hoare triple {2038#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= 0 (+ (- 1) main_~i~1)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2038#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 17:09:49,291 INFO L272 TraceCheckUtils]: 26: Hoare triple {2038#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= 0 (+ (- 1) main_~i~1)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2019#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} is VALID [2022-04-07 17:09:49,291 INFO L290 TraceCheckUtils]: 27: Hoare triple {2019#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2019#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} is VALID [2022-04-07 17:09:49,292 INFO L290 TraceCheckUtils]: 28: Hoare triple {2019#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2019#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} is VALID [2022-04-07 17:09:49,292 INFO L290 TraceCheckUtils]: 29: Hoare triple {2019#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2019#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} is VALID [2022-04-07 17:09:49,293 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {2019#(exists ((v_main_~x~0.base_BEFORE_CALL_5 Int) (v_main_~x~0.offset_BEFORE_CALL_5 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_5) (+ 8 v_main_~x~0.offset_BEFORE_CALL_5)) 0))} {2038#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= 0 (+ (- 1) main_~i~1)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2038#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 17:09:49,293 INFO L290 TraceCheckUtils]: 31: Hoare triple {2038#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= 0 (+ (- 1) main_~i~1)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {2038#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 17:09:49,293 INFO L290 TraceCheckUtils]: 32: Hoare triple {2038#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= 0 (+ (- 1) main_~i~1)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {2063#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 2))} is VALID [2022-04-07 17:09:49,294 INFO L290 TraceCheckUtils]: 33: Hoare triple {2063#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 2))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1957#(= |main_#t~mem5| 0)} is VALID [2022-04-07 17:09:49,294 INFO L272 TraceCheckUtils]: 34: Hoare triple {1957#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2070#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:09:49,295 INFO L290 TraceCheckUtils]: 35: Hoare triple {2070#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2074#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:09:49,295 INFO L290 TraceCheckUtils]: 36: Hoare triple {2074#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1936#false} is VALID [2022-04-07 17:09:49,295 INFO L290 TraceCheckUtils]: 37: Hoare triple {1936#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1936#false} is VALID [2022-04-07 17:09:49,295 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-07 17:09:49,295 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 17:09:51,549 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2022-04-07 17:09:51,554 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2022-04-07 17:09:51,609 INFO L290 TraceCheckUtils]: 37: Hoare triple {1936#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1936#false} is VALID [2022-04-07 17:09:51,609 INFO L290 TraceCheckUtils]: 36: Hoare triple {2074#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1936#false} is VALID [2022-04-07 17:09:51,610 INFO L290 TraceCheckUtils]: 35: Hoare triple {2070#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2074#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:09:51,610 INFO L272 TraceCheckUtils]: 34: Hoare triple {1957#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2070#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:09:51,611 INFO L290 TraceCheckUtils]: 33: Hoare triple {1956#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1957#(= |main_#t~mem5| 0)} is VALID [2022-04-07 17:09:51,612 INFO L290 TraceCheckUtils]: 32: Hoare triple {1951#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {1956#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:09:51,612 INFO L290 TraceCheckUtils]: 31: Hoare triple {1951#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {1951#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:09:51,613 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {1935#true} {1951#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1951#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:09:51,613 INFO L290 TraceCheckUtils]: 29: Hoare triple {1935#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1935#true} is VALID [2022-04-07 17:09:51,613 INFO L290 TraceCheckUtils]: 28: Hoare triple {1935#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1935#true} is VALID [2022-04-07 17:09:51,613 INFO L290 TraceCheckUtils]: 27: Hoare triple {1935#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1935#true} is VALID [2022-04-07 17:09:51,613 INFO L272 TraceCheckUtils]: 26: Hoare triple {1951#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1935#true} is VALID [2022-04-07 17:09:51,614 INFO L290 TraceCheckUtils]: 25: Hoare triple {1951#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {1951#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:09:51,615 INFO L290 TraceCheckUtils]: 24: Hoare triple {2120#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {1951#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:09:51,615 INFO L290 TraceCheckUtils]: 23: Hoare triple {2120#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {2120#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:09:51,616 INFO L284 TraceCheckUtils]: 22: Hoare quadruple {1935#true} {2120#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2120#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:09:51,616 INFO L290 TraceCheckUtils]: 21: Hoare triple {1935#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1935#true} is VALID [2022-04-07 17:09:51,616 INFO L290 TraceCheckUtils]: 20: Hoare triple {1935#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1935#true} is VALID [2022-04-07 17:09:51,616 INFO L290 TraceCheckUtils]: 19: Hoare triple {1935#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1935#true} is VALID [2022-04-07 17:09:51,616 INFO L272 TraceCheckUtils]: 18: Hoare triple {2120#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {1935#true} is VALID [2022-04-07 17:09:51,617 INFO L290 TraceCheckUtils]: 17: Hoare triple {2120#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2120#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:09:51,617 INFO L290 TraceCheckUtils]: 16: Hoare triple {1945#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {2120#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:09:51,618 INFO L290 TraceCheckUtils]: 15: Hoare triple {1945#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {1945#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-07 17:09:51,618 INFO L290 TraceCheckUtils]: 14: Hoare triple {1945#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1945#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-07 17:09:51,619 INFO L290 TraceCheckUtils]: 13: Hoare triple {1944#(and (not (= (+ main_~x~0.offset 8) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1945#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-07 17:09:51,619 INFO L290 TraceCheckUtils]: 12: Hoare triple {2157#(and (not (<= main_~i~0 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1944#(and (not (= (+ main_~x~0.offset 8) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} is VALID [2022-04-07 17:09:51,620 INFO L290 TraceCheckUtils]: 11: Hoare triple {1942#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2157#(and (not (<= main_~i~0 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} is VALID [2022-04-07 17:09:51,621 INFO L290 TraceCheckUtils]: 10: Hoare triple {1941#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1942#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:09:51,621 INFO L290 TraceCheckUtils]: 9: Hoare triple {1941#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1941#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:09:51,622 INFO L290 TraceCheckUtils]: 8: Hoare triple {1940#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {1941#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:09:51,622 INFO L290 TraceCheckUtils]: 7: Hoare triple {1940#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {1940#(= main_~i~0 0)} is VALID [2022-04-07 17:09:51,623 INFO L290 TraceCheckUtils]: 6: Hoare triple {1935#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {1940#(= main_~i~0 0)} is VALID [2022-04-07 17:09:51,623 INFO L290 TraceCheckUtils]: 5: Hoare triple {1935#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {1935#true} is VALID [2022-04-07 17:09:51,623 INFO L272 TraceCheckUtils]: 4: Hoare triple {1935#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1935#true} is VALID [2022-04-07 17:09:51,623 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1935#true} {1935#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1935#true} is VALID [2022-04-07 17:09:51,623 INFO L290 TraceCheckUtils]: 2: Hoare triple {1935#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1935#true} is VALID [2022-04-07 17:09:51,623 INFO L290 TraceCheckUtils]: 1: Hoare triple {1935#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1935#true} is VALID [2022-04-07 17:09:51,623 INFO L272 TraceCheckUtils]: 0: Hoare triple {1935#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1935#true} is VALID [2022-04-07 17:09:51,624 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 4 proven. 24 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-07 17:09:51,624 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [416800229] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 17:09:51,624 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 17:09:51,624 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 14] total 23 [2022-04-07 17:09:51,624 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [370848316] [2022-04-07 17:09:51,624 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 17:09:51,625 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 22 states have (on average 2.090909090909091) internal successors, (46), 20 states have internal predecessors, (46), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) Word has length 38 [2022-04-07 17:09:51,626 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:09:51,626 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 23 states, 22 states have (on average 2.090909090909091) internal successors, (46), 20 states have internal predecessors, (46), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) [2022-04-07 17:09:51,681 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 62 edges. 62 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:09:51,681 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 23 states [2022-04-07 17:09:51,681 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:09:51,682 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2022-04-07 17:09:51,682 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=67, Invalid=436, Unknown=3, NotChecked=0, Total=506 [2022-04-07 17:09:51,682 INFO L87 Difference]: Start difference. First operand 41 states and 42 transitions. Second operand has 23 states, 22 states have (on average 2.090909090909091) internal successors, (46), 20 states have internal predecessors, (46), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) [2022-04-07 17:09:53,550 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:09:53,550 INFO L93 Difference]: Finished difference Result 69 states and 71 transitions. [2022-04-07 17:09:53,551 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2022-04-07 17:09:53,551 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 22 states have (on average 2.090909090909091) internal successors, (46), 20 states have internal predecessors, (46), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) Word has length 38 [2022-04-07 17:09:53,551 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:09:53,551 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 22 states have (on average 2.090909090909091) internal successors, (46), 20 states have internal predecessors, (46), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) [2022-04-07 17:09:53,553 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 55 transitions. [2022-04-07 17:09:53,554 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 22 states have (on average 2.090909090909091) internal successors, (46), 20 states have internal predecessors, (46), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) [2022-04-07 17:09:53,555 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 55 transitions. [2022-04-07 17:09:53,556 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 22 states and 55 transitions. [2022-04-07 17:09:53,605 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 55 edges. 55 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:09:53,606 INFO L225 Difference]: With dead ends: 69 [2022-04-07 17:09:53,606 INFO L226 Difference]: Without dead ends: 69 [2022-04-07 17:09:53,607 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 113 GetRequests, 67 SyntacticMatches, 9 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 328 ImplicationChecksByTransitivity, 11.6s TimeCoverageRelationStatistics Valid=179, Invalid=1296, Unknown=7, NotChecked=0, Total=1482 [2022-04-07 17:09:53,607 INFO L913 BasicCegarLoop]: 23 mSDtfsCounter, 47 mSDsluCounter, 70 mSDsCounter, 0 mSdLazyCounter, 306 mSolverCounterSat, 15 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 48 SdHoareTripleChecker+Valid, 93 SdHoareTripleChecker+Invalid, 384 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 15 IncrementalHoareTripleChecker+Valid, 306 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 63 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-04-07 17:09:53,608 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [48 Valid, 93 Invalid, 384 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [15 Valid, 306 Invalid, 0 Unknown, 63 Unchecked, 0.3s Time] [2022-04-07 17:09:53,608 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69 states. [2022-04-07 17:09:53,611 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69 to 52. [2022-04-07 17:09:53,611 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:09:53,612 INFO L82 GeneralOperation]: Start isEquivalent. First operand 69 states. Second operand has 52 states, 40 states have (on average 1.075) internal successors, (43), 41 states have internal predecessors, (43), 6 states have call successors, (6), 6 states have call predecessors, (6), 5 states have return successors, (5), 4 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-07 17:09:53,612 INFO L74 IsIncluded]: Start isIncluded. First operand 69 states. Second operand has 52 states, 40 states have (on average 1.075) internal successors, (43), 41 states have internal predecessors, (43), 6 states have call successors, (6), 6 states have call predecessors, (6), 5 states have return successors, (5), 4 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-07 17:09:53,612 INFO L87 Difference]: Start difference. First operand 69 states. Second operand has 52 states, 40 states have (on average 1.075) internal successors, (43), 41 states have internal predecessors, (43), 6 states have call successors, (6), 6 states have call predecessors, (6), 5 states have return successors, (5), 4 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-07 17:09:53,614 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:09:53,614 INFO L93 Difference]: Finished difference Result 69 states and 71 transitions. [2022-04-07 17:09:53,614 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 71 transitions. [2022-04-07 17:09:53,615 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:09:53,615 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:09:53,615 INFO L74 IsIncluded]: Start isIncluded. First operand has 52 states, 40 states have (on average 1.075) internal successors, (43), 41 states have internal predecessors, (43), 6 states have call successors, (6), 6 states have call predecessors, (6), 5 states have return successors, (5), 4 states have call predecessors, (5), 5 states have call successors, (5) Second operand 69 states. [2022-04-07 17:09:53,615 INFO L87 Difference]: Start difference. First operand has 52 states, 40 states have (on average 1.075) internal successors, (43), 41 states have internal predecessors, (43), 6 states have call successors, (6), 6 states have call predecessors, (6), 5 states have return successors, (5), 4 states have call predecessors, (5), 5 states have call successors, (5) Second operand 69 states. [2022-04-07 17:09:53,617 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:09:53,617 INFO L93 Difference]: Finished difference Result 69 states and 71 transitions. [2022-04-07 17:09:53,617 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 71 transitions. [2022-04-07 17:09:53,618 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:09:53,618 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:09:53,618 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:09:53,618 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:09:53,618 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 52 states, 40 states have (on average 1.075) internal successors, (43), 41 states have internal predecessors, (43), 6 states have call successors, (6), 6 states have call predecessors, (6), 5 states have return successors, (5), 4 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-07 17:09:53,619 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 54 transitions. [2022-04-07 17:09:53,620 INFO L78 Accepts]: Start accepts. Automaton has 52 states and 54 transitions. Word has length 38 [2022-04-07 17:09:53,620 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:09:53,620 INFO L478 AbstractCegarLoop]: Abstraction has 52 states and 54 transitions. [2022-04-07 17:09:53,620 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 23 states, 22 states have (on average 2.090909090909091) internal successors, (46), 20 states have internal predecessors, (46), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) [2022-04-07 17:09:53,620 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states and 54 transitions. [2022-04-07 17:09:53,621 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2022-04-07 17:09:53,621 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:09:53,621 INFO L499 BasicCegarLoop]: trace histogram [5, 5, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:09:53,648 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2022-04-07 17:09:53,838 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7,7 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:09:53,838 INFO L403 AbstractCegarLoop]: === Iteration 9 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:09:53,839 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:09:53,839 INFO L85 PathProgramCache]: Analyzing trace with hash 838435593, now seen corresponding path program 6 times [2022-04-07 17:09:53,839 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:09:53,839 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [5992650] [2022-04-07 17:09:53,839 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:09:53,839 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:09:53,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:09:54,023 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:09:54,036 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:09:54,041 INFO L290 TraceCheckUtils]: 0: Hoare triple {2515#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2489#true} is VALID [2022-04-07 17:09:54,041 INFO L290 TraceCheckUtils]: 1: Hoare triple {2489#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2489#true} is VALID [2022-04-07 17:09:54,042 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2489#true} {2489#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2489#true} is VALID [2022-04-07 17:09:54,042 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 20 [2022-04-07 17:09:54,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:09:54,050 INFO L290 TraceCheckUtils]: 0: Hoare triple {2489#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2489#true} is VALID [2022-04-07 17:09:54,050 INFO L290 TraceCheckUtils]: 1: Hoare triple {2489#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2489#true} is VALID [2022-04-07 17:09:54,050 INFO L290 TraceCheckUtils]: 2: Hoare triple {2489#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2489#true} is VALID [2022-04-07 17:09:54,051 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2489#true} {2501#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2501#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:09:54,051 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 28 [2022-04-07 17:09:54,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:09:54,055 INFO L290 TraceCheckUtils]: 0: Hoare triple {2489#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2489#true} is VALID [2022-04-07 17:09:54,055 INFO L290 TraceCheckUtils]: 1: Hoare triple {2489#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2489#true} is VALID [2022-04-07 17:09:54,055 INFO L290 TraceCheckUtils]: 2: Hoare triple {2489#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2489#true} is VALID [2022-04-07 17:09:54,056 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2489#true} {2506#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2506#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:09:54,056 INFO L272 TraceCheckUtils]: 0: Hoare triple {2489#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2515#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:09:54,057 INFO L290 TraceCheckUtils]: 1: Hoare triple {2515#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2489#true} is VALID [2022-04-07 17:09:54,057 INFO L290 TraceCheckUtils]: 2: Hoare triple {2489#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2489#true} is VALID [2022-04-07 17:09:54,057 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2489#true} {2489#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2489#true} is VALID [2022-04-07 17:09:54,057 INFO L272 TraceCheckUtils]: 4: Hoare triple {2489#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2489#true} is VALID [2022-04-07 17:09:54,057 INFO L290 TraceCheckUtils]: 5: Hoare triple {2489#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {2489#true} is VALID [2022-04-07 17:09:54,057 INFO L290 TraceCheckUtils]: 6: Hoare triple {2489#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {2494#(= main_~i~0 0)} is VALID [2022-04-07 17:09:54,058 INFO L290 TraceCheckUtils]: 7: Hoare triple {2494#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2494#(= main_~i~0 0)} is VALID [2022-04-07 17:09:54,058 INFO L290 TraceCheckUtils]: 8: Hoare triple {2494#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2495#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:09:54,059 INFO L290 TraceCheckUtils]: 9: Hoare triple {2495#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2495#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:09:54,059 INFO L290 TraceCheckUtils]: 10: Hoare triple {2495#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2496#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:09:54,060 INFO L290 TraceCheckUtils]: 11: Hoare triple {2496#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2497#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:09:54,061 INFO L290 TraceCheckUtils]: 12: Hoare triple {2497#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2498#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 3 main_~i~0))} is VALID [2022-04-07 17:09:54,061 INFO L290 TraceCheckUtils]: 13: Hoare triple {2498#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 3 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2498#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 3 main_~i~0))} is VALID [2022-04-07 17:09:54,062 INFO L290 TraceCheckUtils]: 14: Hoare triple {2498#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 3 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2499#(and (not (= (+ main_~x~0.offset 8) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} is VALID [2022-04-07 17:09:54,063 INFO L290 TraceCheckUtils]: 15: Hoare triple {2499#(and (not (= (+ main_~x~0.offset 8) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2500#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-07 17:09:54,063 INFO L290 TraceCheckUtils]: 16: Hoare triple {2500#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2500#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-07 17:09:54,063 INFO L290 TraceCheckUtils]: 17: Hoare triple {2500#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {2500#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-07 17:09:54,064 INFO L290 TraceCheckUtils]: 18: Hoare triple {2500#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {2501#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:09:54,064 INFO L290 TraceCheckUtils]: 19: Hoare triple {2501#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2501#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:09:54,064 INFO L272 TraceCheckUtils]: 20: Hoare triple {2501#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2489#true} is VALID [2022-04-07 17:09:54,065 INFO L290 TraceCheckUtils]: 21: Hoare triple {2489#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2489#true} is VALID [2022-04-07 17:09:54,065 INFO L290 TraceCheckUtils]: 22: Hoare triple {2489#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2489#true} is VALID [2022-04-07 17:09:54,065 INFO L290 TraceCheckUtils]: 23: Hoare triple {2489#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2489#true} is VALID [2022-04-07 17:09:54,065 INFO L284 TraceCheckUtils]: 24: Hoare quadruple {2489#true} {2501#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2501#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:09:54,066 INFO L290 TraceCheckUtils]: 25: Hoare triple {2501#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {2501#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:09:54,066 INFO L290 TraceCheckUtils]: 26: Hoare triple {2501#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {2506#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:09:54,067 INFO L290 TraceCheckUtils]: 27: Hoare triple {2506#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2506#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:09:54,067 INFO L272 TraceCheckUtils]: 28: Hoare triple {2506#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2489#true} is VALID [2022-04-07 17:09:54,067 INFO L290 TraceCheckUtils]: 29: Hoare triple {2489#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2489#true} is VALID [2022-04-07 17:09:54,067 INFO L290 TraceCheckUtils]: 30: Hoare triple {2489#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2489#true} is VALID [2022-04-07 17:09:54,067 INFO L290 TraceCheckUtils]: 31: Hoare triple {2489#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2489#true} is VALID [2022-04-07 17:09:54,068 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {2489#true} {2506#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2506#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:09:54,068 INFO L290 TraceCheckUtils]: 33: Hoare triple {2506#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {2506#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:09:54,069 INFO L290 TraceCheckUtils]: 34: Hoare triple {2506#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {2511#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:09:54,069 INFO L290 TraceCheckUtils]: 35: Hoare triple {2511#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2512#(= |main_#t~mem5| 0)} is VALID [2022-04-07 17:09:54,070 INFO L272 TraceCheckUtils]: 36: Hoare triple {2512#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2513#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:09:54,070 INFO L290 TraceCheckUtils]: 37: Hoare triple {2513#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2514#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:09:54,071 INFO L290 TraceCheckUtils]: 38: Hoare triple {2514#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2490#false} is VALID [2022-04-07 17:09:54,071 INFO L290 TraceCheckUtils]: 39: Hoare triple {2490#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2490#false} is VALID [2022-04-07 17:09:54,071 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 4 proven. 33 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-07 17:09:54,071 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:09:54,072 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [5992650] [2022-04-07 17:09:54,072 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [5992650] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:09:54,072 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1932681138] [2022-04-07 17:09:54,072 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-07 17:09:54,072 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:09:54,072 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:09:54,076 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:09:54,080 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2022-04-07 17:09:54,145 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) [2022-04-07 17:09:54,145 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 17:09:54,146 INFO L263 TraceCheckSpWp]: Trace formula consists of 132 conjuncts, 29 conjunts are in the unsatisfiable core [2022-04-07 17:09:54,165 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:09:54,167 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:09:54,232 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-07 17:09:54,376 INFO L356 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2022-04-07 17:09:54,376 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 24 [2022-04-07 17:09:54,434 INFO L356 Elim1Store]: treesize reduction 25, result has 37.5 percent of original size [2022-04-07 17:09:54,435 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 30 [2022-04-07 17:10:02,859 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2022-04-07 17:10:02,902 INFO L272 TraceCheckUtils]: 0: Hoare triple {2489#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2489#true} is VALID [2022-04-07 17:10:02,902 INFO L290 TraceCheckUtils]: 1: Hoare triple {2489#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2489#true} is VALID [2022-04-07 17:10:02,902 INFO L290 TraceCheckUtils]: 2: Hoare triple {2489#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2489#true} is VALID [2022-04-07 17:10:02,902 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2489#true} {2489#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2489#true} is VALID [2022-04-07 17:10:02,902 INFO L272 TraceCheckUtils]: 4: Hoare triple {2489#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2489#true} is VALID [2022-04-07 17:10:02,902 INFO L290 TraceCheckUtils]: 5: Hoare triple {2489#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {2489#true} is VALID [2022-04-07 17:10:02,903 INFO L290 TraceCheckUtils]: 6: Hoare triple {2489#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {2494#(= main_~i~0 0)} is VALID [2022-04-07 17:10:02,903 INFO L290 TraceCheckUtils]: 7: Hoare triple {2494#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2494#(= main_~i~0 0)} is VALID [2022-04-07 17:10:02,903 INFO L290 TraceCheckUtils]: 8: Hoare triple {2494#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2495#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:10:02,904 INFO L290 TraceCheckUtils]: 9: Hoare triple {2495#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2495#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:10:02,904 INFO L290 TraceCheckUtils]: 10: Hoare triple {2495#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2496#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:10:02,905 INFO L290 TraceCheckUtils]: 11: Hoare triple {2496#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2497#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:10:02,905 INFO L290 TraceCheckUtils]: 12: Hoare triple {2497#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2498#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 3 main_~i~0))} is VALID [2022-04-07 17:10:02,906 INFO L290 TraceCheckUtils]: 13: Hoare triple {2498#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 3 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2558#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (< 3 main_~n~0))} is VALID [2022-04-07 17:10:02,906 INFO L290 TraceCheckUtils]: 14: Hoare triple {2558#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (< 3 main_~n~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2558#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (< 3 main_~n~0))} is VALID [2022-04-07 17:10:02,907 INFO L290 TraceCheckUtils]: 15: Hoare triple {2558#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (< 3 main_~n~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2565#(and (or (= 8 (* main_~i~0 4)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)) (< 3 main_~n~0))} is VALID [2022-04-07 17:10:02,907 INFO L290 TraceCheckUtils]: 16: Hoare triple {2565#(and (or (= 8 (* main_~i~0 4)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)) (< 3 main_~n~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2569#(and (or (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= main_~i~0 3)) (< 3 main_~n~0))} is VALID [2022-04-07 17:10:02,908 INFO L290 TraceCheckUtils]: 17: Hoare triple {2569#(and (or (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= main_~i~0 3)) (< 3 main_~n~0))} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {2500#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-07 17:10:02,908 INFO L290 TraceCheckUtils]: 18: Hoare triple {2500#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {2501#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:10:02,908 INFO L290 TraceCheckUtils]: 19: Hoare triple {2501#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2501#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:10:02,909 INFO L272 TraceCheckUtils]: 20: Hoare triple {2501#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2582#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} is VALID [2022-04-07 17:10:02,910 INFO L290 TraceCheckUtils]: 21: Hoare triple {2582#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2582#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} is VALID [2022-04-07 17:10:02,910 INFO L290 TraceCheckUtils]: 22: Hoare triple {2582#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2582#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} is VALID [2022-04-07 17:10:02,910 INFO L290 TraceCheckUtils]: 23: Hoare triple {2582#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2582#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} is VALID [2022-04-07 17:10:02,911 INFO L284 TraceCheckUtils]: 24: Hoare quadruple {2582#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} {2501#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2501#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:10:02,911 INFO L290 TraceCheckUtils]: 25: Hoare triple {2501#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {2501#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:10:02,912 INFO L290 TraceCheckUtils]: 26: Hoare triple {2501#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {2601#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 1))} is VALID [2022-04-07 17:10:02,912 INFO L290 TraceCheckUtils]: 27: Hoare triple {2601#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2601#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 1))} is VALID [2022-04-07 17:10:02,913 INFO L272 TraceCheckUtils]: 28: Hoare triple {2601#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2582#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} is VALID [2022-04-07 17:10:02,914 INFO L290 TraceCheckUtils]: 29: Hoare triple {2582#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2582#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} is VALID [2022-04-07 17:10:02,914 INFO L290 TraceCheckUtils]: 30: Hoare triple {2582#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2582#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} is VALID [2022-04-07 17:10:02,914 INFO L290 TraceCheckUtils]: 31: Hoare triple {2582#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2582#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} is VALID [2022-04-07 17:10:02,915 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {2582#(exists ((v_main_~x~0.base_BEFORE_CALL_9 Int) (v_main_~x~0.offset_BEFORE_CALL_9 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_9) (+ 8 v_main_~x~0.offset_BEFORE_CALL_9)) 0))} {2601#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2601#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 1))} is VALID [2022-04-07 17:10:02,916 INFO L290 TraceCheckUtils]: 33: Hoare triple {2601#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {2601#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 1))} is VALID [2022-04-07 17:10:02,916 INFO L290 TraceCheckUtils]: 34: Hoare triple {2601#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {2626#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 2))} is VALID [2022-04-07 17:10:02,917 INFO L290 TraceCheckUtils]: 35: Hoare triple {2626#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 2))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2512#(= |main_#t~mem5| 0)} is VALID [2022-04-07 17:10:02,918 INFO L272 TraceCheckUtils]: 36: Hoare triple {2512#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2633#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:10:02,918 INFO L290 TraceCheckUtils]: 37: Hoare triple {2633#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2637#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:10:02,919 INFO L290 TraceCheckUtils]: 38: Hoare triple {2637#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2490#false} is VALID [2022-04-07 17:10:02,919 INFO L290 TraceCheckUtils]: 39: Hoare triple {2490#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2490#false} is VALID [2022-04-07 17:10:02,919 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 37 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-07 17:10:02,919 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 17:10:05,471 WARN L833 $PredicateComparison]: unable to prove that (forall ((main_~i~0 Int)) (or (forall ((v_ArrVal_119 Int)) (= 0 (select (store (select |c_#memory_int| c_main_~x~0.base) (+ c_main_~x~0.offset (* main_~i~0 4)) v_ArrVal_119) (+ c_main_~x~0.offset 8)))) (< (+ main_~i~0 1) c_main_~n~0))) is different from false [2022-04-07 17:10:05,771 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2022-04-07 17:10:05,775 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2022-04-07 17:10:05,827 INFO L290 TraceCheckUtils]: 39: Hoare triple {2490#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2490#false} is VALID [2022-04-07 17:10:05,828 INFO L290 TraceCheckUtils]: 38: Hoare triple {2637#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2490#false} is VALID [2022-04-07 17:10:05,828 INFO L290 TraceCheckUtils]: 37: Hoare triple {2633#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2637#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:10:05,828 INFO L272 TraceCheckUtils]: 36: Hoare triple {2512#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2633#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:10:05,829 INFO L290 TraceCheckUtils]: 35: Hoare triple {2511#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2512#(= |main_#t~mem5| 0)} is VALID [2022-04-07 17:10:05,829 INFO L290 TraceCheckUtils]: 34: Hoare triple {2506#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {2511#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:10:05,830 INFO L290 TraceCheckUtils]: 33: Hoare triple {2506#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {2506#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:10:05,830 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {2489#true} {2506#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2506#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:10:05,830 INFO L290 TraceCheckUtils]: 31: Hoare triple {2489#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2489#true} is VALID [2022-04-07 17:10:05,831 INFO L290 TraceCheckUtils]: 30: Hoare triple {2489#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2489#true} is VALID [2022-04-07 17:10:05,831 INFO L290 TraceCheckUtils]: 29: Hoare triple {2489#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2489#true} is VALID [2022-04-07 17:10:05,831 INFO L272 TraceCheckUtils]: 28: Hoare triple {2506#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2489#true} is VALID [2022-04-07 17:10:05,831 INFO L290 TraceCheckUtils]: 27: Hoare triple {2506#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2506#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:10:05,832 INFO L290 TraceCheckUtils]: 26: Hoare triple {2683#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {2506#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:10:05,832 INFO L290 TraceCheckUtils]: 25: Hoare triple {2683#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {2683#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:10:05,833 INFO L284 TraceCheckUtils]: 24: Hoare quadruple {2489#true} {2683#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2683#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:10:05,833 INFO L290 TraceCheckUtils]: 23: Hoare triple {2489#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2489#true} is VALID [2022-04-07 17:10:05,833 INFO L290 TraceCheckUtils]: 22: Hoare triple {2489#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2489#true} is VALID [2022-04-07 17:10:05,833 INFO L290 TraceCheckUtils]: 21: Hoare triple {2489#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2489#true} is VALID [2022-04-07 17:10:05,833 INFO L272 TraceCheckUtils]: 20: Hoare triple {2683#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {2489#true} is VALID [2022-04-07 17:10:05,833 INFO L290 TraceCheckUtils]: 19: Hoare triple {2683#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {2683#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:10:05,834 INFO L290 TraceCheckUtils]: 18: Hoare triple {2500#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {2683#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:10:05,834 INFO L290 TraceCheckUtils]: 17: Hoare triple {2711#(or (< main_~i~0 main_~n~0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {2500#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-07 17:10:05,835 INFO L290 TraceCheckUtils]: 16: Hoare triple {2715#(or (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (< (+ main_~i~0 1) main_~n~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2711#(or (< main_~i~0 main_~n~0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} is VALID [2022-04-07 17:10:05,835 INFO L290 TraceCheckUtils]: 15: Hoare triple {2719#(forall ((main_~i~0 Int)) (or (forall ((v_ArrVal_119 Int)) (= (select (store (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4)) v_ArrVal_119) (+ main_~x~0.offset 8)) 0)) (< (+ main_~i~0 1) main_~n~0)))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2715#(or (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (< (+ main_~i~0 1) main_~n~0))} is VALID [2022-04-07 17:10:05,836 INFO L290 TraceCheckUtils]: 14: Hoare triple {2719#(forall ((main_~i~0 Int)) (or (forall ((v_ArrVal_119 Int)) (= (select (store (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4)) v_ArrVal_119) (+ main_~x~0.offset 8)) 0)) (< (+ main_~i~0 1) main_~n~0)))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2719#(forall ((main_~i~0 Int)) (or (forall ((v_ArrVal_119 Int)) (= (select (store (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4)) v_ArrVal_119) (+ main_~x~0.offset 8)) 0)) (< (+ main_~i~0 1) main_~n~0)))} is VALID [2022-04-07 17:10:05,837 INFO L290 TraceCheckUtils]: 13: Hoare triple {2498#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 3 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2719#(forall ((main_~i~0 Int)) (or (forall ((v_ArrVal_119 Int)) (= (select (store (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4)) v_ArrVal_119) (+ main_~x~0.offset 8)) 0)) (< (+ main_~i~0 1) main_~n~0)))} is VALID [2022-04-07 17:10:05,837 INFO L290 TraceCheckUtils]: 12: Hoare triple {2729#(and (<= 2 main_~i~0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2498#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 3 main_~i~0))} is VALID [2022-04-07 17:10:05,838 INFO L290 TraceCheckUtils]: 11: Hoare triple {2496#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2729#(and (<= 2 main_~i~0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} is VALID [2022-04-07 17:10:05,838 INFO L290 TraceCheckUtils]: 10: Hoare triple {2495#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2496#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:10:05,838 INFO L290 TraceCheckUtils]: 9: Hoare triple {2495#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2495#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:10:05,839 INFO L290 TraceCheckUtils]: 8: Hoare triple {2494#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {2495#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:10:05,839 INFO L290 TraceCheckUtils]: 7: Hoare triple {2494#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {2494#(= main_~i~0 0)} is VALID [2022-04-07 17:10:05,839 INFO L290 TraceCheckUtils]: 6: Hoare triple {2489#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {2494#(= main_~i~0 0)} is VALID [2022-04-07 17:10:05,840 INFO L290 TraceCheckUtils]: 5: Hoare triple {2489#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {2489#true} is VALID [2022-04-07 17:10:05,840 INFO L272 TraceCheckUtils]: 4: Hoare triple {2489#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2489#true} is VALID [2022-04-07 17:10:05,840 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2489#true} {2489#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2489#true} is VALID [2022-04-07 17:10:05,840 INFO L290 TraceCheckUtils]: 2: Hoare triple {2489#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2489#true} is VALID [2022-04-07 17:10:05,840 INFO L290 TraceCheckUtils]: 1: Hoare triple {2489#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2489#true} is VALID [2022-04-07 17:10:05,840 INFO L272 TraceCheckUtils]: 0: Hoare triple {2489#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2489#true} is VALID [2022-04-07 17:10:05,840 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 4 proven. 24 refuted. 0 times theorem prover too weak. 4 trivial. 9 not checked. [2022-04-07 17:10:05,840 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1932681138] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 17:10:05,840 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 17:10:05,840 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 18, 17] total 29 [2022-04-07 17:10:05,841 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1548208723] [2022-04-07 17:10:05,841 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 17:10:05,841 INFO L78 Accepts]: Start accepts. Automaton has has 29 states, 28 states have (on average 2.0) internal successors, (56), 26 states have internal predecessors, (56), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) Word has length 40 [2022-04-07 17:10:05,843 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:10:05,844 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 29 states, 28 states have (on average 2.0) internal successors, (56), 26 states have internal predecessors, (56), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) [2022-04-07 17:10:05,908 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 72 edges. 72 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:10:05,908 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 29 states [2022-04-07 17:10:05,908 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:10:05,909 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2022-04-07 17:10:05,909 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=106, Invalid=650, Unknown=4, NotChecked=52, Total=812 [2022-04-07 17:10:05,909 INFO L87 Difference]: Start difference. First operand 52 states and 54 transitions. Second operand has 29 states, 28 states have (on average 2.0) internal successors, (56), 26 states have internal predecessors, (56), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) [2022-04-07 17:10:08,265 WARN L833 $PredicateComparison]: unable to prove that (and (= |c_#NULL.base| |c_old(#NULL.base)|) (< 3 c_main_~n~0) (forall ((main_~i~0 Int)) (or (forall ((v_ArrVal_119 Int)) (= 0 (select (store (select |c_#memory_int| c_main_~x~0.base) (+ c_main_~x~0.offset (* main_~i~0 4)) v_ArrVal_119) (+ c_main_~x~0.offset 8)))) (< (+ main_~i~0 1) c_main_~n~0))) (<= 3 c_main_~i~0) (= (select (select |c_#memory_int| c_main_~x~0.base) (+ c_main_~x~0.offset 8)) 0) (= |c_#NULL.offset| |c_old(#NULL.offset)|)) is different from false [2022-04-07 17:10:10,271 WARN L833 $PredicateComparison]: unable to prove that (and (< 3 c_main_~n~0) (forall ((main_~i~0 Int)) (or (forall ((v_ArrVal_119 Int)) (= 0 (select (store (select |c_#memory_int| c_main_~x~0.base) (+ c_main_~x~0.offset (* main_~i~0 4)) v_ArrVal_119) (+ c_main_~x~0.offset 8)))) (< (+ main_~i~0 1) c_main_~n~0))) (<= 3 c_main_~i~0) (= (select (select |c_#memory_int| c_main_~x~0.base) (+ c_main_~x~0.offset 8)) 0)) is different from false [2022-04-07 17:10:12,297 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (+ c_main_~x~0.offset 8))) (and (not (= (+ (* c_main_~i~0 4) c_main_~x~0.offset) .cse0)) (< 3 c_main_~n~0) (forall ((main_~i~0 Int)) (or (forall ((v_ArrVal_119 Int)) (= 0 (select (store (select |c_#memory_int| c_main_~x~0.base) (+ c_main_~x~0.offset (* main_~i~0 4)) v_ArrVal_119) (+ c_main_~x~0.offset 8)))) (< (+ main_~i~0 1) c_main_~n~0))) (= (select (select |c_#memory_int| c_main_~x~0.base) .cse0) 0))) is different from false [2022-04-07 17:10:13,545 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:10:13,545 INFO L93 Difference]: Finished difference Result 101 states and 109 transitions. [2022-04-07 17:10:13,545 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2022-04-07 17:10:13,546 INFO L78 Accepts]: Start accepts. Automaton has has 29 states, 28 states have (on average 2.0) internal successors, (56), 26 states have internal predecessors, (56), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) Word has length 40 [2022-04-07 17:10:13,546 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:10:13,546 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 28 states have (on average 2.0) internal successors, (56), 26 states have internal predecessors, (56), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) [2022-04-07 17:10:13,549 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 73 transitions. [2022-04-07 17:10:13,549 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 28 states have (on average 2.0) internal successors, (56), 26 states have internal predecessors, (56), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) [2022-04-07 17:10:13,551 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 73 transitions. [2022-04-07 17:10:13,551 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 32 states and 73 transitions. [2022-04-07 17:10:13,621 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 73 edges. 73 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:10:13,623 INFO L225 Difference]: With dead ends: 101 [2022-04-07 17:10:13,623 INFO L226 Difference]: Without dead ends: 101 [2022-04-07 17:10:13,624 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 130 GetRequests, 68 SyntacticMatches, 10 SemanticMatches, 52 ConstructedPredicates, 4 IntricatePredicates, 0 DeprecatedPredicates, 560 ImplicationChecksByTransitivity, 17.3s TimeCoverageRelationStatistics Valid=321, Invalid=2137, Unknown=8, NotChecked=396, Total=2862 [2022-04-07 17:10:13,625 INFO L913 BasicCegarLoop]: 25 mSDtfsCounter, 63 mSDsluCounter, 119 mSDsCounter, 0 mSdLazyCounter, 552 mSolverCounterSat, 45 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 64 SdHoareTripleChecker+Valid, 144 SdHoareTripleChecker+Invalid, 725 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 45 IncrementalHoareTripleChecker+Valid, 552 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 128 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-04-07 17:10:13,625 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [64 Valid, 144 Invalid, 725 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [45 Valid, 552 Invalid, 0 Unknown, 128 Unchecked, 0.5s Time] [2022-04-07 17:10:13,625 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 101 states. [2022-04-07 17:10:13,629 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 101 to 69. [2022-04-07 17:10:13,629 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:10:13,630 INFO L82 GeneralOperation]: Start isEquivalent. First operand 101 states. Second operand has 69 states, 54 states have (on average 1.1111111111111112) internal successors, (60), 56 states have internal predecessors, (60), 8 states have call successors, (8), 7 states have call predecessors, (8), 6 states have return successors, (7), 5 states have call predecessors, (7), 7 states have call successors, (7) [2022-04-07 17:10:13,631 INFO L74 IsIncluded]: Start isIncluded. First operand 101 states. Second operand has 69 states, 54 states have (on average 1.1111111111111112) internal successors, (60), 56 states have internal predecessors, (60), 8 states have call successors, (8), 7 states have call predecessors, (8), 6 states have return successors, (7), 5 states have call predecessors, (7), 7 states have call successors, (7) [2022-04-07 17:10:13,631 INFO L87 Difference]: Start difference. First operand 101 states. Second operand has 69 states, 54 states have (on average 1.1111111111111112) internal successors, (60), 56 states have internal predecessors, (60), 8 states have call successors, (8), 7 states have call predecessors, (8), 6 states have return successors, (7), 5 states have call predecessors, (7), 7 states have call successors, (7) [2022-04-07 17:10:13,634 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:10:13,634 INFO L93 Difference]: Finished difference Result 101 states and 109 transitions. [2022-04-07 17:10:13,634 INFO L276 IsEmpty]: Start isEmpty. Operand 101 states and 109 transitions. [2022-04-07 17:10:13,635 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:10:13,635 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:10:13,635 INFO L74 IsIncluded]: Start isIncluded. First operand has 69 states, 54 states have (on average 1.1111111111111112) internal successors, (60), 56 states have internal predecessors, (60), 8 states have call successors, (8), 7 states have call predecessors, (8), 6 states have return successors, (7), 5 states have call predecessors, (7), 7 states have call successors, (7) Second operand 101 states. [2022-04-07 17:10:13,636 INFO L87 Difference]: Start difference. First operand has 69 states, 54 states have (on average 1.1111111111111112) internal successors, (60), 56 states have internal predecessors, (60), 8 states have call successors, (8), 7 states have call predecessors, (8), 6 states have return successors, (7), 5 states have call predecessors, (7), 7 states have call successors, (7) Second operand 101 states. [2022-04-07 17:10:13,639 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:10:13,639 INFO L93 Difference]: Finished difference Result 101 states and 109 transitions. [2022-04-07 17:10:13,639 INFO L276 IsEmpty]: Start isEmpty. Operand 101 states and 109 transitions. [2022-04-07 17:10:13,639 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:10:13,639 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:10:13,640 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:10:13,640 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:10:13,640 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 69 states, 54 states have (on average 1.1111111111111112) internal successors, (60), 56 states have internal predecessors, (60), 8 states have call successors, (8), 7 states have call predecessors, (8), 6 states have return successors, (7), 5 states have call predecessors, (7), 7 states have call successors, (7) [2022-04-07 17:10:13,642 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69 states to 69 states and 75 transitions. [2022-04-07 17:10:13,642 INFO L78 Accepts]: Start accepts. Automaton has 69 states and 75 transitions. Word has length 40 [2022-04-07 17:10:13,642 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:10:13,642 INFO L478 AbstractCegarLoop]: Abstraction has 69 states and 75 transitions. [2022-04-07 17:10:13,642 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 29 states, 28 states have (on average 2.0) internal successors, (56), 26 states have internal predecessors, (56), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) [2022-04-07 17:10:13,643 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 75 transitions. [2022-04-07 17:10:13,643 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2022-04-07 17:10:13,643 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:10:13,643 INFO L499 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:10:13,661 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2022-04-07 17:10:13,855 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8,8 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:10:13,855 INFO L403 AbstractCegarLoop]: === Iteration 10 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:10:13,856 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:10:13,856 INFO L85 PathProgramCache]: Analyzing trace with hash -110930399, now seen corresponding path program 7 times [2022-04-07 17:10:13,856 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:10:13,856 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [51326960] [2022-04-07 17:10:13,856 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:10:13,856 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:10:13,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:10:14,035 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:10:14,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:10:14,046 INFO L290 TraceCheckUtils]: 0: Hoare triple {3224#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3194#true} is VALID [2022-04-07 17:10:14,046 INFO L290 TraceCheckUtils]: 1: Hoare triple {3194#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3194#true} is VALID [2022-04-07 17:10:14,046 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {3194#true} {3194#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3194#true} is VALID [2022-04-07 17:10:14,047 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 18 [2022-04-07 17:10:14,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:10:14,050 INFO L290 TraceCheckUtils]: 0: Hoare triple {3194#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3194#true} is VALID [2022-04-07 17:10:14,050 INFO L290 TraceCheckUtils]: 1: Hoare triple {3194#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3194#true} is VALID [2022-04-07 17:10:14,051 INFO L290 TraceCheckUtils]: 2: Hoare triple {3194#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3194#true} is VALID [2022-04-07 17:10:14,051 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3194#true} {3205#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3205#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:10:14,052 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 26 [2022-04-07 17:10:14,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:10:14,055 INFO L290 TraceCheckUtils]: 0: Hoare triple {3194#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3194#true} is VALID [2022-04-07 17:10:14,055 INFO L290 TraceCheckUtils]: 1: Hoare triple {3194#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3194#true} is VALID [2022-04-07 17:10:14,055 INFO L290 TraceCheckUtils]: 2: Hoare triple {3194#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3194#true} is VALID [2022-04-07 17:10:14,056 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3194#true} {3210#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3210#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:10:14,056 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 34 [2022-04-07 17:10:14,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:10:14,059 INFO L290 TraceCheckUtils]: 0: Hoare triple {3194#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3194#true} is VALID [2022-04-07 17:10:14,059 INFO L290 TraceCheckUtils]: 1: Hoare triple {3194#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3194#true} is VALID [2022-04-07 17:10:14,059 INFO L290 TraceCheckUtils]: 2: Hoare triple {3194#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3194#true} is VALID [2022-04-07 17:10:14,060 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3194#true} {3215#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3215#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:10:14,061 INFO L272 TraceCheckUtils]: 0: Hoare triple {3194#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3224#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:10:14,061 INFO L290 TraceCheckUtils]: 1: Hoare triple {3224#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3194#true} is VALID [2022-04-07 17:10:14,061 INFO L290 TraceCheckUtils]: 2: Hoare triple {3194#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3194#true} is VALID [2022-04-07 17:10:14,061 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3194#true} {3194#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3194#true} is VALID [2022-04-07 17:10:14,061 INFO L272 TraceCheckUtils]: 4: Hoare triple {3194#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3194#true} is VALID [2022-04-07 17:10:14,061 INFO L290 TraceCheckUtils]: 5: Hoare triple {3194#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {3194#true} is VALID [2022-04-07 17:10:14,061 INFO L290 TraceCheckUtils]: 6: Hoare triple {3194#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {3199#(= main_~i~0 0)} is VALID [2022-04-07 17:10:14,062 INFO L290 TraceCheckUtils]: 7: Hoare triple {3199#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3199#(= main_~i~0 0)} is VALID [2022-04-07 17:10:14,062 INFO L290 TraceCheckUtils]: 8: Hoare triple {3199#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3200#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:10:14,063 INFO L290 TraceCheckUtils]: 9: Hoare triple {3200#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3200#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:10:14,063 INFO L290 TraceCheckUtils]: 10: Hoare triple {3200#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3201#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:10:14,064 INFO L290 TraceCheckUtils]: 11: Hoare triple {3201#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3201#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:10:14,064 INFO L290 TraceCheckUtils]: 12: Hoare triple {3201#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3202#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 17:10:14,065 INFO L290 TraceCheckUtils]: 13: Hoare triple {3202#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3203#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 17:10:14,065 INFO L290 TraceCheckUtils]: 14: Hoare triple {3203#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3204#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-07 17:10:14,066 INFO L290 TraceCheckUtils]: 15: Hoare triple {3204#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {3204#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-07 17:10:14,066 INFO L290 TraceCheckUtils]: 16: Hoare triple {3204#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {3205#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:10:14,067 INFO L290 TraceCheckUtils]: 17: Hoare triple {3205#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3205#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:10:14,067 INFO L272 TraceCheckUtils]: 18: Hoare triple {3205#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3194#true} is VALID [2022-04-07 17:10:14,067 INFO L290 TraceCheckUtils]: 19: Hoare triple {3194#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3194#true} is VALID [2022-04-07 17:10:14,067 INFO L290 TraceCheckUtils]: 20: Hoare triple {3194#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3194#true} is VALID [2022-04-07 17:10:14,067 INFO L290 TraceCheckUtils]: 21: Hoare triple {3194#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3194#true} is VALID [2022-04-07 17:10:14,068 INFO L284 TraceCheckUtils]: 22: Hoare quadruple {3194#true} {3205#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3205#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:10:14,068 INFO L290 TraceCheckUtils]: 23: Hoare triple {3205#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {3205#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:10:14,068 INFO L290 TraceCheckUtils]: 24: Hoare triple {3205#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {3210#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:10:14,069 INFO L290 TraceCheckUtils]: 25: Hoare triple {3210#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3210#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:10:14,069 INFO L272 TraceCheckUtils]: 26: Hoare triple {3210#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3194#true} is VALID [2022-04-07 17:10:14,069 INFO L290 TraceCheckUtils]: 27: Hoare triple {3194#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3194#true} is VALID [2022-04-07 17:10:14,069 INFO L290 TraceCheckUtils]: 28: Hoare triple {3194#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3194#true} is VALID [2022-04-07 17:10:14,069 INFO L290 TraceCheckUtils]: 29: Hoare triple {3194#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3194#true} is VALID [2022-04-07 17:10:14,070 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {3194#true} {3210#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3210#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:10:14,070 INFO L290 TraceCheckUtils]: 31: Hoare triple {3210#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {3210#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:10:14,071 INFO L290 TraceCheckUtils]: 32: Hoare triple {3210#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {3215#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:10:14,071 INFO L290 TraceCheckUtils]: 33: Hoare triple {3215#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3215#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:10:14,072 INFO L272 TraceCheckUtils]: 34: Hoare triple {3215#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3194#true} is VALID [2022-04-07 17:10:14,072 INFO L290 TraceCheckUtils]: 35: Hoare triple {3194#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3194#true} is VALID [2022-04-07 17:10:14,072 INFO L290 TraceCheckUtils]: 36: Hoare triple {3194#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3194#true} is VALID [2022-04-07 17:10:14,072 INFO L290 TraceCheckUtils]: 37: Hoare triple {3194#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3194#true} is VALID [2022-04-07 17:10:14,073 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {3194#true} {3215#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3215#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:10:14,073 INFO L290 TraceCheckUtils]: 39: Hoare triple {3215#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {3215#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:10:14,073 INFO L290 TraceCheckUtils]: 40: Hoare triple {3215#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {3220#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:10:14,074 INFO L290 TraceCheckUtils]: 41: Hoare triple {3220#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3221#(= |main_#t~mem5| 0)} is VALID [2022-04-07 17:10:14,074 INFO L272 TraceCheckUtils]: 42: Hoare triple {3221#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3222#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:10:14,075 INFO L290 TraceCheckUtils]: 43: Hoare triple {3222#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3223#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:10:14,075 INFO L290 TraceCheckUtils]: 44: Hoare triple {3223#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {3195#false} is VALID [2022-04-07 17:10:14,075 INFO L290 TraceCheckUtils]: 45: Hoare triple {3195#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3195#false} is VALID [2022-04-07 17:10:14,076 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 6 proven. 34 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2022-04-07 17:10:14,076 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:10:14,076 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [51326960] [2022-04-07 17:10:14,076 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [51326960] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:10:14,076 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2062487039] [2022-04-07 17:10:14,076 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-04-07 17:10:14,076 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:10:14,076 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:10:14,079 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:10:14,083 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2022-04-07 17:10:14,137 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:10:14,138 INFO L263 TraceCheckSpWp]: Trace formula consists of 147 conjuncts, 25 conjunts are in the unsatisfiable core [2022-04-07 17:10:14,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:10:14,153 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:10:14,249 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-07 17:10:27,753 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2022-04-07 17:10:27,794 INFO L272 TraceCheckUtils]: 0: Hoare triple {3194#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3194#true} is VALID [2022-04-07 17:10:27,794 INFO L290 TraceCheckUtils]: 1: Hoare triple {3194#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3194#true} is VALID [2022-04-07 17:10:27,794 INFO L290 TraceCheckUtils]: 2: Hoare triple {3194#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3194#true} is VALID [2022-04-07 17:10:27,795 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3194#true} {3194#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3194#true} is VALID [2022-04-07 17:10:27,795 INFO L272 TraceCheckUtils]: 4: Hoare triple {3194#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3194#true} is VALID [2022-04-07 17:10:27,795 INFO L290 TraceCheckUtils]: 5: Hoare triple {3194#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {3194#true} is VALID [2022-04-07 17:10:27,803 INFO L290 TraceCheckUtils]: 6: Hoare triple {3194#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {3199#(= main_~i~0 0)} is VALID [2022-04-07 17:10:27,804 INFO L290 TraceCheckUtils]: 7: Hoare triple {3199#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3199#(= main_~i~0 0)} is VALID [2022-04-07 17:10:27,804 INFO L290 TraceCheckUtils]: 8: Hoare triple {3199#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3200#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:10:27,805 INFO L290 TraceCheckUtils]: 9: Hoare triple {3200#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3200#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:10:27,805 INFO L290 TraceCheckUtils]: 10: Hoare triple {3200#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3201#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:10:27,806 INFO L290 TraceCheckUtils]: 11: Hoare triple {3201#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3201#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:10:27,806 INFO L290 TraceCheckUtils]: 12: Hoare triple {3201#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3202#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 17:10:27,807 INFO L290 TraceCheckUtils]: 13: Hoare triple {3202#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3204#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-07 17:10:27,807 INFO L290 TraceCheckUtils]: 14: Hoare triple {3204#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3204#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-07 17:10:27,808 INFO L290 TraceCheckUtils]: 15: Hoare triple {3204#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {3204#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-07 17:10:27,808 INFO L290 TraceCheckUtils]: 16: Hoare triple {3204#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {3205#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:10:27,809 INFO L290 TraceCheckUtils]: 17: Hoare triple {3205#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3205#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:10:27,810 INFO L272 TraceCheckUtils]: 18: Hoare triple {3205#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3282#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} is VALID [2022-04-07 17:10:27,810 INFO L290 TraceCheckUtils]: 19: Hoare triple {3282#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3282#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} is VALID [2022-04-07 17:10:27,810 INFO L290 TraceCheckUtils]: 20: Hoare triple {3282#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3282#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} is VALID [2022-04-07 17:10:27,811 INFO L290 TraceCheckUtils]: 21: Hoare triple {3282#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3282#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} is VALID [2022-04-07 17:10:27,811 INFO L284 TraceCheckUtils]: 22: Hoare quadruple {3282#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} {3205#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3205#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:10:27,812 INFO L290 TraceCheckUtils]: 23: Hoare triple {3205#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {3205#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:10:27,812 INFO L290 TraceCheckUtils]: 24: Hoare triple {3205#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {3301#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 17:10:27,813 INFO L290 TraceCheckUtils]: 25: Hoare triple {3301#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= 0 (+ (- 1) main_~i~1)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3301#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 17:10:27,814 INFO L272 TraceCheckUtils]: 26: Hoare triple {3301#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= 0 (+ (- 1) main_~i~1)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3282#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} is VALID [2022-04-07 17:10:27,814 INFO L290 TraceCheckUtils]: 27: Hoare triple {3282#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3282#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} is VALID [2022-04-07 17:10:27,815 INFO L290 TraceCheckUtils]: 28: Hoare triple {3282#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3282#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} is VALID [2022-04-07 17:10:27,815 INFO L290 TraceCheckUtils]: 29: Hoare triple {3282#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3282#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} is VALID [2022-04-07 17:10:27,816 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {3282#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} {3301#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= 0 (+ (- 1) main_~i~1)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3301#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 17:10:27,816 INFO L290 TraceCheckUtils]: 31: Hoare triple {3301#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= 0 (+ (- 1) main_~i~1)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {3301#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 17:10:27,817 INFO L290 TraceCheckUtils]: 32: Hoare triple {3301#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= 0 (+ (- 1) main_~i~1)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {3326#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} is VALID [2022-04-07 17:10:27,817 INFO L290 TraceCheckUtils]: 33: Hoare triple {3326#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3326#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} is VALID [2022-04-07 17:10:27,818 INFO L272 TraceCheckUtils]: 34: Hoare triple {3326#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3282#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} is VALID [2022-04-07 17:10:27,818 INFO L290 TraceCheckUtils]: 35: Hoare triple {3282#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3282#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} is VALID [2022-04-07 17:10:27,819 INFO L290 TraceCheckUtils]: 36: Hoare triple {3282#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3282#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} is VALID [2022-04-07 17:10:27,819 INFO L290 TraceCheckUtils]: 37: Hoare triple {3282#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3282#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} is VALID [2022-04-07 17:10:27,820 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {3282#(exists ((v_main_~x~0.base_BEFORE_CALL_13 Int) (v_main_~x~0.offset_BEFORE_CALL_13 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_13) (+ 12 v_main_~x~0.offset_BEFORE_CALL_13)) 0))} {3326#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3326#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} is VALID [2022-04-07 17:10:27,820 INFO L290 TraceCheckUtils]: 39: Hoare triple {3326#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {3326#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} is VALID [2022-04-07 17:10:27,821 INFO L290 TraceCheckUtils]: 40: Hoare triple {3326#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {3351#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= (+ main_~i~1 (- 3)) 0))} is VALID [2022-04-07 17:10:27,821 INFO L290 TraceCheckUtils]: 41: Hoare triple {3351#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0) (= (+ main_~i~1 (- 3)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3221#(= |main_#t~mem5| 0)} is VALID [2022-04-07 17:10:27,822 INFO L272 TraceCheckUtils]: 42: Hoare triple {3221#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3358#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:10:27,822 INFO L290 TraceCheckUtils]: 43: Hoare triple {3358#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3362#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:10:27,823 INFO L290 TraceCheckUtils]: 44: Hoare triple {3362#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {3195#false} is VALID [2022-04-07 17:10:27,823 INFO L290 TraceCheckUtils]: 45: Hoare triple {3195#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3195#false} is VALID [2022-04-07 17:10:27,823 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2022-04-07 17:10:27,823 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 17:10:29,992 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2022-04-07 17:10:29,996 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2022-04-07 17:10:30,060 INFO L290 TraceCheckUtils]: 45: Hoare triple {3195#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3195#false} is VALID [2022-04-07 17:10:30,060 INFO L290 TraceCheckUtils]: 44: Hoare triple {3362#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {3195#false} is VALID [2022-04-07 17:10:30,061 INFO L290 TraceCheckUtils]: 43: Hoare triple {3358#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3362#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:10:30,061 INFO L272 TraceCheckUtils]: 42: Hoare triple {3221#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3358#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:10:30,062 INFO L290 TraceCheckUtils]: 41: Hoare triple {3220#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3221#(= |main_#t~mem5| 0)} is VALID [2022-04-07 17:10:30,062 INFO L290 TraceCheckUtils]: 40: Hoare triple {3215#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {3220#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:10:30,063 INFO L290 TraceCheckUtils]: 39: Hoare triple {3215#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {3215#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:10:30,063 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {3194#true} {3215#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3215#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:10:30,063 INFO L290 TraceCheckUtils]: 37: Hoare triple {3194#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3194#true} is VALID [2022-04-07 17:10:30,063 INFO L290 TraceCheckUtils]: 36: Hoare triple {3194#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3194#true} is VALID [2022-04-07 17:10:30,063 INFO L290 TraceCheckUtils]: 35: Hoare triple {3194#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3194#true} is VALID [2022-04-07 17:10:30,063 INFO L272 TraceCheckUtils]: 34: Hoare triple {3215#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3194#true} is VALID [2022-04-07 17:10:30,064 INFO L290 TraceCheckUtils]: 33: Hoare triple {3215#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3215#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:10:30,064 INFO L290 TraceCheckUtils]: 32: Hoare triple {3210#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {3215#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:10:30,065 INFO L290 TraceCheckUtils]: 31: Hoare triple {3210#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {3210#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:10:30,065 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {3194#true} {3210#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3210#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:10:30,065 INFO L290 TraceCheckUtils]: 29: Hoare triple {3194#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3194#true} is VALID [2022-04-07 17:10:30,065 INFO L290 TraceCheckUtils]: 28: Hoare triple {3194#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3194#true} is VALID [2022-04-07 17:10:30,066 INFO L290 TraceCheckUtils]: 27: Hoare triple {3194#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3194#true} is VALID [2022-04-07 17:10:30,066 INFO L272 TraceCheckUtils]: 26: Hoare triple {3210#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3194#true} is VALID [2022-04-07 17:10:30,066 INFO L290 TraceCheckUtils]: 25: Hoare triple {3210#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3210#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:10:30,066 INFO L290 TraceCheckUtils]: 24: Hoare triple {3432#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {3210#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:10:30,067 INFO L290 TraceCheckUtils]: 23: Hoare triple {3432#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {3432#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:10:30,067 INFO L284 TraceCheckUtils]: 22: Hoare quadruple {3194#true} {3432#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3432#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:10:30,067 INFO L290 TraceCheckUtils]: 21: Hoare triple {3194#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3194#true} is VALID [2022-04-07 17:10:30,068 INFO L290 TraceCheckUtils]: 20: Hoare triple {3194#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3194#true} is VALID [2022-04-07 17:10:30,068 INFO L290 TraceCheckUtils]: 19: Hoare triple {3194#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3194#true} is VALID [2022-04-07 17:10:30,068 INFO L272 TraceCheckUtils]: 18: Hoare triple {3432#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3194#true} is VALID [2022-04-07 17:10:30,068 INFO L290 TraceCheckUtils]: 17: Hoare triple {3432#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3432#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:10:30,068 INFO L290 TraceCheckUtils]: 16: Hoare triple {3204#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {3432#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:10:30,069 INFO L290 TraceCheckUtils]: 15: Hoare triple {3204#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {3204#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-07 17:10:30,069 INFO L290 TraceCheckUtils]: 14: Hoare triple {3204#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3204#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-07 17:10:30,070 INFO L290 TraceCheckUtils]: 13: Hoare triple {3202#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3204#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 12)) 0)} is VALID [2022-04-07 17:10:30,070 INFO L290 TraceCheckUtils]: 12: Hoare triple {3201#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3202#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 17:10:30,070 INFO L290 TraceCheckUtils]: 11: Hoare triple {3201#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3201#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:10:30,071 INFO L290 TraceCheckUtils]: 10: Hoare triple {3200#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3201#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:10:30,071 INFO L290 TraceCheckUtils]: 9: Hoare triple {3200#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3200#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:10:30,072 INFO L290 TraceCheckUtils]: 8: Hoare triple {3199#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3200#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:10:30,072 INFO L290 TraceCheckUtils]: 7: Hoare triple {3199#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3199#(= main_~i~0 0)} is VALID [2022-04-07 17:10:30,072 INFO L290 TraceCheckUtils]: 6: Hoare triple {3194#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {3199#(= main_~i~0 0)} is VALID [2022-04-07 17:10:30,072 INFO L290 TraceCheckUtils]: 5: Hoare triple {3194#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {3194#true} is VALID [2022-04-07 17:10:30,073 INFO L272 TraceCheckUtils]: 4: Hoare triple {3194#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3194#true} is VALID [2022-04-07 17:10:30,073 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3194#true} {3194#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3194#true} is VALID [2022-04-07 17:10:30,073 INFO L290 TraceCheckUtils]: 2: Hoare triple {3194#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3194#true} is VALID [2022-04-07 17:10:30,073 INFO L290 TraceCheckUtils]: 1: Hoare triple {3194#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3194#true} is VALID [2022-04-07 17:10:30,073 INFO L272 TraceCheckUtils]: 0: Hoare triple {3194#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3194#true} is VALID [2022-04-07 17:10:30,073 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 6 proven. 34 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2022-04-07 17:10:30,073 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2062487039] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 17:10:30,074 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 17:10:30,074 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 15, 14] total 23 [2022-04-07 17:10:30,074 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1240295241] [2022-04-07 17:10:30,074 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 17:10:30,075 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 22 states have (on average 2.272727272727273) internal successors, (50), 20 states have internal predecessors, (50), 8 states have call successors, (12), 5 states have call predecessors, (12), 2 states have return successors, (8), 7 states have call predecessors, (8), 7 states have call successors, (8) Word has length 46 [2022-04-07 17:10:30,076 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:10:30,076 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 23 states, 22 states have (on average 2.272727272727273) internal successors, (50), 20 states have internal predecessors, (50), 8 states have call successors, (12), 5 states have call predecessors, (12), 2 states have return successors, (8), 7 states have call predecessors, (8), 7 states have call successors, (8) [2022-04-07 17:10:30,137 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 70 edges. 70 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:10:30,137 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 23 states [2022-04-07 17:10:30,137 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:10:30,138 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2022-04-07 17:10:30,138 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=61, Invalid=441, Unknown=4, NotChecked=0, Total=506 [2022-04-07 17:10:30,139 INFO L87 Difference]: Start difference. First operand 69 states and 75 transitions. Second operand has 23 states, 22 states have (on average 2.272727272727273) internal successors, (50), 20 states have internal predecessors, (50), 8 states have call successors, (12), 5 states have call predecessors, (12), 2 states have return successors, (8), 7 states have call predecessors, (8), 7 states have call successors, (8) [2022-04-07 17:10:31,075 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:10:31,076 INFO L93 Difference]: Finished difference Result 93 states and 102 transitions. [2022-04-07 17:10:31,076 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2022-04-07 17:10:31,076 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 22 states have (on average 2.272727272727273) internal successors, (50), 20 states have internal predecessors, (50), 8 states have call successors, (12), 5 states have call predecessors, (12), 2 states have return successors, (8), 7 states have call predecessors, (8), 7 states have call successors, (8) Word has length 46 [2022-04-07 17:10:31,081 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:10:31,081 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 22 states have (on average 2.272727272727273) internal successors, (50), 20 states have internal predecessors, (50), 8 states have call successors, (12), 5 states have call predecessors, (12), 2 states have return successors, (8), 7 states have call predecessors, (8), 7 states have call successors, (8) [2022-04-07 17:10:31,083 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 57 transitions. [2022-04-07 17:10:31,083 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 22 states have (on average 2.272727272727273) internal successors, (50), 20 states have internal predecessors, (50), 8 states have call successors, (12), 5 states have call predecessors, (12), 2 states have return successors, (8), 7 states have call predecessors, (8), 7 states have call successors, (8) [2022-04-07 17:10:31,085 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 57 transitions. [2022-04-07 17:10:31,085 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 21 states and 57 transitions. [2022-04-07 17:10:31,134 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 57 edges. 57 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:10:31,135 INFO L225 Difference]: With dead ends: 93 [2022-04-07 17:10:31,135 INFO L226 Difference]: Without dead ends: 93 [2022-04-07 17:10:31,136 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 130 GetRequests, 84 SyntacticMatches, 10 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 288 ImplicationChecksByTransitivity, 15.4s TimeCoverageRelationStatistics Valid=162, Invalid=1240, Unknown=4, NotChecked=0, Total=1406 [2022-04-07 17:10:31,136 INFO L913 BasicCegarLoop]: 23 mSDtfsCounter, 55 mSDsluCounter, 99 mSDsCounter, 0 mSdLazyCounter, 445 mSolverCounterSat, 29 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 55 SdHoareTripleChecker+Valid, 122 SdHoareTripleChecker+Invalid, 540 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 29 IncrementalHoareTripleChecker+Valid, 445 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 66 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-04-07 17:10:31,137 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [55 Valid, 122 Invalid, 540 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [29 Valid, 445 Invalid, 0 Unknown, 66 Unchecked, 0.4s Time] [2022-04-07 17:10:31,137 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 93 states. [2022-04-07 17:10:31,141 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 93 to 91. [2022-04-07 17:10:31,141 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:10:31,142 INFO L82 GeneralOperation]: Start isEquivalent. First operand 93 states. Second operand has 91 states, 70 states have (on average 1.1) internal successors, (77), 73 states have internal predecessors, (77), 12 states have call successors, (12), 9 states have call predecessors, (12), 8 states have return successors, (11), 8 states have call predecessors, (11), 11 states have call successors, (11) [2022-04-07 17:10:31,142 INFO L74 IsIncluded]: Start isIncluded. First operand 93 states. Second operand has 91 states, 70 states have (on average 1.1) internal successors, (77), 73 states have internal predecessors, (77), 12 states have call successors, (12), 9 states have call predecessors, (12), 8 states have return successors, (11), 8 states have call predecessors, (11), 11 states have call successors, (11) [2022-04-07 17:10:31,142 INFO L87 Difference]: Start difference. First operand 93 states. Second operand has 91 states, 70 states have (on average 1.1) internal successors, (77), 73 states have internal predecessors, (77), 12 states have call successors, (12), 9 states have call predecessors, (12), 8 states have return successors, (11), 8 states have call predecessors, (11), 11 states have call successors, (11) [2022-04-07 17:10:31,145 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:10:31,145 INFO L93 Difference]: Finished difference Result 93 states and 102 transitions. [2022-04-07 17:10:31,145 INFO L276 IsEmpty]: Start isEmpty. Operand 93 states and 102 transitions. [2022-04-07 17:10:31,146 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:10:31,146 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:10:31,146 INFO L74 IsIncluded]: Start isIncluded. First operand has 91 states, 70 states have (on average 1.1) internal successors, (77), 73 states have internal predecessors, (77), 12 states have call successors, (12), 9 states have call predecessors, (12), 8 states have return successors, (11), 8 states have call predecessors, (11), 11 states have call successors, (11) Second operand 93 states. [2022-04-07 17:10:31,146 INFO L87 Difference]: Start difference. First operand has 91 states, 70 states have (on average 1.1) internal successors, (77), 73 states have internal predecessors, (77), 12 states have call successors, (12), 9 states have call predecessors, (12), 8 states have return successors, (11), 8 states have call predecessors, (11), 11 states have call successors, (11) Second operand 93 states. [2022-04-07 17:10:31,149 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:10:31,149 INFO L93 Difference]: Finished difference Result 93 states and 102 transitions. [2022-04-07 17:10:31,149 INFO L276 IsEmpty]: Start isEmpty. Operand 93 states and 102 transitions. [2022-04-07 17:10:31,150 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:10:31,150 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:10:31,150 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:10:31,150 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:10:31,150 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 91 states, 70 states have (on average 1.1) internal successors, (77), 73 states have internal predecessors, (77), 12 states have call successors, (12), 9 states have call predecessors, (12), 8 states have return successors, (11), 8 states have call predecessors, (11), 11 states have call successors, (11) [2022-04-07 17:10:31,152 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 91 states to 91 states and 100 transitions. [2022-04-07 17:10:31,153 INFO L78 Accepts]: Start accepts. Automaton has 91 states and 100 transitions. Word has length 46 [2022-04-07 17:10:31,153 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:10:31,153 INFO L478 AbstractCegarLoop]: Abstraction has 91 states and 100 transitions. [2022-04-07 17:10:31,153 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 23 states, 22 states have (on average 2.272727272727273) internal successors, (50), 20 states have internal predecessors, (50), 8 states have call successors, (12), 5 states have call predecessors, (12), 2 states have return successors, (8), 7 states have call predecessors, (8), 7 states have call successors, (8) [2022-04-07 17:10:31,153 INFO L276 IsEmpty]: Start isEmpty. Operand 91 states and 100 transitions. [2022-04-07 17:10:31,154 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2022-04-07 17:10:31,154 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:10:31,154 INFO L499 BasicCegarLoop]: trace histogram [8, 8, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:10:31,171 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2022-04-07 17:10:31,359 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable9 [2022-04-07 17:10:31,360 INFO L403 AbstractCegarLoop]: === Iteration 11 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:10:31,360 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:10:31,360 INFO L85 PathProgramCache]: Analyzing trace with hash -1600260925, now seen corresponding path program 8 times [2022-04-07 17:10:31,360 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:10:31,360 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [861747956] [2022-04-07 17:10:31,360 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:10:31,360 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:10:31,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:10:31,690 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:10:31,691 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:10:31,694 INFO L290 TraceCheckUtils]: 0: Hoare triple {3937#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3908#true} is VALID [2022-04-07 17:10:31,694 INFO L290 TraceCheckUtils]: 1: Hoare triple {3908#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3908#true} is VALID [2022-04-07 17:10:31,694 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {3908#true} {3908#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3908#true} is VALID [2022-04-07 17:10:31,694 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 26 [2022-04-07 17:10:31,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:10:31,698 INFO L290 TraceCheckUtils]: 0: Hoare triple {3908#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3908#true} is VALID [2022-04-07 17:10:31,698 INFO L290 TraceCheckUtils]: 1: Hoare triple {3908#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3908#true} is VALID [2022-04-07 17:10:31,698 INFO L290 TraceCheckUtils]: 2: Hoare triple {3908#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3908#true} is VALID [2022-04-07 17:10:31,699 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3908#true} {3923#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3923#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:10:31,699 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 34 [2022-04-07 17:10:31,700 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:10:31,703 INFO L290 TraceCheckUtils]: 0: Hoare triple {3908#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3908#true} is VALID [2022-04-07 17:10:31,703 INFO L290 TraceCheckUtils]: 1: Hoare triple {3908#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3908#true} is VALID [2022-04-07 17:10:31,703 INFO L290 TraceCheckUtils]: 2: Hoare triple {3908#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3908#true} is VALID [2022-04-07 17:10:31,704 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3908#true} {3928#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3928#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:10:31,705 INFO L272 TraceCheckUtils]: 0: Hoare triple {3908#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3937#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:10:31,705 INFO L290 TraceCheckUtils]: 1: Hoare triple {3937#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3908#true} is VALID [2022-04-07 17:10:31,705 INFO L290 TraceCheckUtils]: 2: Hoare triple {3908#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3908#true} is VALID [2022-04-07 17:10:31,705 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3908#true} {3908#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3908#true} is VALID [2022-04-07 17:10:31,705 INFO L272 TraceCheckUtils]: 4: Hoare triple {3908#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3908#true} is VALID [2022-04-07 17:10:31,705 INFO L290 TraceCheckUtils]: 5: Hoare triple {3908#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {3908#true} is VALID [2022-04-07 17:10:31,705 INFO L290 TraceCheckUtils]: 6: Hoare triple {3908#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {3913#(= main_~i~0 0)} is VALID [2022-04-07 17:10:31,706 INFO L290 TraceCheckUtils]: 7: Hoare triple {3913#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3913#(= main_~i~0 0)} is VALID [2022-04-07 17:10:31,706 INFO L290 TraceCheckUtils]: 8: Hoare triple {3913#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3914#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:10:31,707 INFO L290 TraceCheckUtils]: 9: Hoare triple {3914#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3914#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:10:31,707 INFO L290 TraceCheckUtils]: 10: Hoare triple {3914#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3915#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:10:31,708 INFO L290 TraceCheckUtils]: 11: Hoare triple {3915#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3916#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:10:31,709 INFO L290 TraceCheckUtils]: 12: Hoare triple {3916#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3917#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 3 main_~i~0))} is VALID [2022-04-07 17:10:31,709 INFO L290 TraceCheckUtils]: 13: Hoare triple {3917#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 3 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3917#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 3 main_~i~0))} is VALID [2022-04-07 17:10:31,710 INFO L290 TraceCheckUtils]: 14: Hoare triple {3917#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 3 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3918#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 4 main_~i~0))} is VALID [2022-04-07 17:10:31,711 INFO L290 TraceCheckUtils]: 15: Hoare triple {3918#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3918#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 4 main_~i~0))} is VALID [2022-04-07 17:10:31,711 INFO L290 TraceCheckUtils]: 16: Hoare triple {3918#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3919#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 5 main_~i~0))} is VALID [2022-04-07 17:10:31,712 INFO L290 TraceCheckUtils]: 17: Hoare triple {3919#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3919#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 5 main_~i~0))} is VALID [2022-04-07 17:10:31,713 INFO L290 TraceCheckUtils]: 18: Hoare triple {3919#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3920#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 6 main_~i~0))} is VALID [2022-04-07 17:10:31,713 INFO L290 TraceCheckUtils]: 19: Hoare triple {3920#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 6 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3920#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 6 main_~i~0))} is VALID [2022-04-07 17:10:31,714 INFO L290 TraceCheckUtils]: 20: Hoare triple {3920#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 6 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3921#(and (not (= (+ main_~x~0.offset 8) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} is VALID [2022-04-07 17:10:31,715 INFO L290 TraceCheckUtils]: 21: Hoare triple {3921#(and (not (= (+ main_~x~0.offset 8) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3922#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-07 17:10:31,715 INFO L290 TraceCheckUtils]: 22: Hoare triple {3922#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3922#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-07 17:10:31,716 INFO L290 TraceCheckUtils]: 23: Hoare triple {3922#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {3922#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-07 17:10:31,716 INFO L290 TraceCheckUtils]: 24: Hoare triple {3922#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {3923#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:10:31,717 INFO L290 TraceCheckUtils]: 25: Hoare triple {3923#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3923#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:10:31,717 INFO L272 TraceCheckUtils]: 26: Hoare triple {3923#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3908#true} is VALID [2022-04-07 17:10:31,717 INFO L290 TraceCheckUtils]: 27: Hoare triple {3908#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3908#true} is VALID [2022-04-07 17:10:31,717 INFO L290 TraceCheckUtils]: 28: Hoare triple {3908#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3908#true} is VALID [2022-04-07 17:10:31,717 INFO L290 TraceCheckUtils]: 29: Hoare triple {3908#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3908#true} is VALID [2022-04-07 17:10:31,718 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {3908#true} {3923#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3923#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:10:31,718 INFO L290 TraceCheckUtils]: 31: Hoare triple {3923#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {3923#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:10:31,719 INFO L290 TraceCheckUtils]: 32: Hoare triple {3923#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {3928#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:10:31,719 INFO L290 TraceCheckUtils]: 33: Hoare triple {3928#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3928#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:10:31,719 INFO L272 TraceCheckUtils]: 34: Hoare triple {3928#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3908#true} is VALID [2022-04-07 17:10:31,719 INFO L290 TraceCheckUtils]: 35: Hoare triple {3908#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3908#true} is VALID [2022-04-07 17:10:31,719 INFO L290 TraceCheckUtils]: 36: Hoare triple {3908#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3908#true} is VALID [2022-04-07 17:10:31,719 INFO L290 TraceCheckUtils]: 37: Hoare triple {3908#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3908#true} is VALID [2022-04-07 17:10:31,720 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {3908#true} {3928#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3928#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:10:31,721 INFO L290 TraceCheckUtils]: 39: Hoare triple {3928#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {3928#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:10:31,721 INFO L290 TraceCheckUtils]: 40: Hoare triple {3928#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {3933#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:10:31,722 INFO L290 TraceCheckUtils]: 41: Hoare triple {3933#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3934#(= |main_#t~mem5| 0)} is VALID [2022-04-07 17:10:31,722 INFO L272 TraceCheckUtils]: 42: Hoare triple {3934#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3935#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:10:31,723 INFO L290 TraceCheckUtils]: 43: Hoare triple {3935#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3936#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:10:31,723 INFO L290 TraceCheckUtils]: 44: Hoare triple {3936#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {3909#false} is VALID [2022-04-07 17:10:31,723 INFO L290 TraceCheckUtils]: 45: Hoare triple {3909#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3909#false} is VALID [2022-04-07 17:10:31,724 INFO L134 CoverageAnalysis]: Checked inductivity of 80 backedges. 16 proven. 60 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-07 17:10:31,724 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:10:31,724 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [861747956] [2022-04-07 17:10:31,724 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [861747956] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:10:31,724 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1244520381] [2022-04-07 17:10:31,724 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-07 17:10:31,724 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:10:31,724 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:10:31,727 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:10:31,732 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2022-04-07 17:10:31,781 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-07 17:10:31,782 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 17:10:31,782 INFO L263 TraceCheckSpWp]: Trace formula consists of 160 conjuncts, 36 conjunts are in the unsatisfiable core [2022-04-07 17:10:31,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:10:31,795 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:10:31,853 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-07 17:10:31,952 INFO L356 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2022-04-07 17:10:31,952 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 24 [2022-04-07 17:10:31,996 INFO L356 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2022-04-07 17:10:31,996 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 24 [2022-04-07 17:10:32,032 INFO L356 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2022-04-07 17:10:32,033 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 24 [2022-04-07 17:10:32,086 INFO L356 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2022-04-07 17:10:32,086 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 24 [2022-04-07 17:10:32,170 INFO L356 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2022-04-07 17:10:32,175 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 24 [2022-04-07 17:10:40,536 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2022-04-07 17:10:40,588 INFO L272 TraceCheckUtils]: 0: Hoare triple {3908#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3908#true} is VALID [2022-04-07 17:10:40,589 INFO L290 TraceCheckUtils]: 1: Hoare triple {3908#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3908#true} is VALID [2022-04-07 17:10:40,589 INFO L290 TraceCheckUtils]: 2: Hoare triple {3908#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3908#true} is VALID [2022-04-07 17:10:40,589 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3908#true} {3908#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3908#true} is VALID [2022-04-07 17:10:40,589 INFO L272 TraceCheckUtils]: 4: Hoare triple {3908#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3908#true} is VALID [2022-04-07 17:10:40,589 INFO L290 TraceCheckUtils]: 5: Hoare triple {3908#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {3908#true} is VALID [2022-04-07 17:10:40,589 INFO L290 TraceCheckUtils]: 6: Hoare triple {3908#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {3913#(= main_~i~0 0)} is VALID [2022-04-07 17:10:40,590 INFO L290 TraceCheckUtils]: 7: Hoare triple {3913#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3913#(= main_~i~0 0)} is VALID [2022-04-07 17:10:40,590 INFO L290 TraceCheckUtils]: 8: Hoare triple {3913#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3914#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:10:40,591 INFO L290 TraceCheckUtils]: 9: Hoare triple {3914#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3914#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:10:40,591 INFO L290 TraceCheckUtils]: 10: Hoare triple {3914#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3915#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:10:40,592 INFO L290 TraceCheckUtils]: 11: Hoare triple {3915#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3916#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:10:40,593 INFO L290 TraceCheckUtils]: 12: Hoare triple {3916#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3917#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 3 main_~i~0))} is VALID [2022-04-07 17:10:40,593 INFO L290 TraceCheckUtils]: 13: Hoare triple {3917#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 3 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3917#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 3 main_~i~0))} is VALID [2022-04-07 17:10:40,594 INFO L290 TraceCheckUtils]: 14: Hoare triple {3917#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 3 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3918#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 4 main_~i~0))} is VALID [2022-04-07 17:10:40,595 INFO L290 TraceCheckUtils]: 15: Hoare triple {3918#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3918#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 4 main_~i~0))} is VALID [2022-04-07 17:10:40,595 INFO L290 TraceCheckUtils]: 16: Hoare triple {3918#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3919#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 5 main_~i~0))} is VALID [2022-04-07 17:10:40,596 INFO L290 TraceCheckUtils]: 17: Hoare triple {3919#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3919#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 5 main_~i~0))} is VALID [2022-04-07 17:10:40,597 INFO L290 TraceCheckUtils]: 18: Hoare triple {3919#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3920#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 6 main_~i~0))} is VALID [2022-04-07 17:10:40,597 INFO L290 TraceCheckUtils]: 19: Hoare triple {3920#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 6 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3920#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 6 main_~i~0))} is VALID [2022-04-07 17:10:40,598 INFO L290 TraceCheckUtils]: 20: Hoare triple {3920#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 6 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {4001#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 7 main_~i~0))} is VALID [2022-04-07 17:10:40,599 INFO L290 TraceCheckUtils]: 21: Hoare triple {4001#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 7 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3922#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-07 17:10:40,599 INFO L290 TraceCheckUtils]: 22: Hoare triple {3922#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3922#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-07 17:10:40,599 INFO L290 TraceCheckUtils]: 23: Hoare triple {3922#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {3922#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-07 17:10:40,600 INFO L290 TraceCheckUtils]: 24: Hoare triple {3922#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {3923#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:10:40,600 INFO L290 TraceCheckUtils]: 25: Hoare triple {3923#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3923#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:10:40,601 INFO L272 TraceCheckUtils]: 26: Hoare triple {3923#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4020#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 8 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} is VALID [2022-04-07 17:10:40,602 INFO L290 TraceCheckUtils]: 27: Hoare triple {4020#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 8 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4020#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 8 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} is VALID [2022-04-07 17:10:40,602 INFO L290 TraceCheckUtils]: 28: Hoare triple {4020#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 8 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4020#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 8 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} is VALID [2022-04-07 17:10:40,602 INFO L290 TraceCheckUtils]: 29: Hoare triple {4020#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 8 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4020#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 8 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} is VALID [2022-04-07 17:10:40,603 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {4020#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 8 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} {3923#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3923#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:10:40,604 INFO L290 TraceCheckUtils]: 31: Hoare triple {3923#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {3923#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:10:40,604 INFO L290 TraceCheckUtils]: 32: Hoare triple {3923#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {4039#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 1))} is VALID [2022-04-07 17:10:40,604 INFO L290 TraceCheckUtils]: 33: Hoare triple {4039#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {4039#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 1))} is VALID [2022-04-07 17:10:40,605 INFO L272 TraceCheckUtils]: 34: Hoare triple {4039#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4020#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 8 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} is VALID [2022-04-07 17:10:40,606 INFO L290 TraceCheckUtils]: 35: Hoare triple {4020#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 8 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4020#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 8 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} is VALID [2022-04-07 17:10:40,606 INFO L290 TraceCheckUtils]: 36: Hoare triple {4020#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 8 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4020#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 8 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} is VALID [2022-04-07 17:10:40,607 INFO L290 TraceCheckUtils]: 37: Hoare triple {4020#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 8 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4020#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 8 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} is VALID [2022-04-07 17:10:40,607 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {4020#(exists ((v_main_~x~0.base_BEFORE_CALL_19 Int) (v_main_~x~0.offset_BEFORE_CALL_19 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_19) (+ 8 v_main_~x~0.offset_BEFORE_CALL_19)) 0))} {4039#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4039#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 1))} is VALID [2022-04-07 17:10:40,608 INFO L290 TraceCheckUtils]: 39: Hoare triple {4039#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {4039#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 1))} is VALID [2022-04-07 17:10:40,608 INFO L290 TraceCheckUtils]: 40: Hoare triple {4039#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (= main_~i~1 1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {4064#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} is VALID [2022-04-07 17:10:40,609 INFO L290 TraceCheckUtils]: 41: Hoare triple {4064#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3934#(= |main_#t~mem5| 0)} is VALID [2022-04-07 17:10:40,609 INFO L272 TraceCheckUtils]: 42: Hoare triple {3934#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4071#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:10:40,610 INFO L290 TraceCheckUtils]: 43: Hoare triple {4071#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4075#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:10:40,610 INFO L290 TraceCheckUtils]: 44: Hoare triple {4075#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {3909#false} is VALID [2022-04-07 17:10:40,610 INFO L290 TraceCheckUtils]: 45: Hoare triple {3909#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3909#false} is VALID [2022-04-07 17:10:40,611 INFO L134 CoverageAnalysis]: Checked inductivity of 80 backedges. 16 proven. 60 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-07 17:10:40,611 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 17:10:43,245 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2022-04-07 17:10:43,250 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2022-04-07 17:10:43,299 INFO L290 TraceCheckUtils]: 45: Hoare triple {3909#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3909#false} is VALID [2022-04-07 17:10:43,300 INFO L290 TraceCheckUtils]: 44: Hoare triple {4075#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {3909#false} is VALID [2022-04-07 17:10:43,300 INFO L290 TraceCheckUtils]: 43: Hoare triple {4071#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4075#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:10:43,301 INFO L272 TraceCheckUtils]: 42: Hoare triple {3934#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4071#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:10:43,301 INFO L290 TraceCheckUtils]: 41: Hoare triple {3933#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3934#(= |main_#t~mem5| 0)} is VALID [2022-04-07 17:10:43,301 INFO L290 TraceCheckUtils]: 40: Hoare triple {3928#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {3933#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:10:43,302 INFO L290 TraceCheckUtils]: 39: Hoare triple {3928#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {3928#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:10:43,302 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {3908#true} {3928#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3928#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:10:43,303 INFO L290 TraceCheckUtils]: 37: Hoare triple {3908#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3908#true} is VALID [2022-04-07 17:10:43,303 INFO L290 TraceCheckUtils]: 36: Hoare triple {3908#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3908#true} is VALID [2022-04-07 17:10:43,303 INFO L290 TraceCheckUtils]: 35: Hoare triple {3908#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3908#true} is VALID [2022-04-07 17:10:43,303 INFO L272 TraceCheckUtils]: 34: Hoare triple {3928#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3908#true} is VALID [2022-04-07 17:10:43,303 INFO L290 TraceCheckUtils]: 33: Hoare triple {3928#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {3928#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:10:43,304 INFO L290 TraceCheckUtils]: 32: Hoare triple {4121#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {3928#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:10:43,304 INFO L290 TraceCheckUtils]: 31: Hoare triple {4121#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {4121#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:10:43,305 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {3908#true} {4121#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4121#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:10:43,305 INFO L290 TraceCheckUtils]: 29: Hoare triple {3908#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3908#true} is VALID [2022-04-07 17:10:43,305 INFO L290 TraceCheckUtils]: 28: Hoare triple {3908#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3908#true} is VALID [2022-04-07 17:10:43,305 INFO L290 TraceCheckUtils]: 27: Hoare triple {3908#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3908#true} is VALID [2022-04-07 17:10:43,305 INFO L272 TraceCheckUtils]: 26: Hoare triple {4121#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {3908#true} is VALID [2022-04-07 17:10:43,305 INFO L290 TraceCheckUtils]: 25: Hoare triple {4121#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {4121#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:10:43,306 INFO L290 TraceCheckUtils]: 24: Hoare triple {3922#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {4121#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:10:43,306 INFO L290 TraceCheckUtils]: 23: Hoare triple {3922#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {3922#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-07 17:10:43,306 INFO L290 TraceCheckUtils]: 22: Hoare triple {3922#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3922#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-07 17:10:43,307 INFO L290 TraceCheckUtils]: 21: Hoare triple {3921#(and (not (= (+ main_~x~0.offset 8) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3922#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0)} is VALID [2022-04-07 17:10:43,307 INFO L290 TraceCheckUtils]: 20: Hoare triple {4158#(and (not (<= main_~i~0 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3921#(and (not (= (+ main_~x~0.offset 8) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} is VALID [2022-04-07 17:10:43,308 INFO L290 TraceCheckUtils]: 19: Hoare triple {3917#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 3 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4158#(and (not (<= main_~i~0 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} is VALID [2022-04-07 17:10:43,308 INFO L290 TraceCheckUtils]: 18: Hoare triple {4158#(and (not (<= main_~i~0 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3917#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 3 main_~i~0))} is VALID [2022-04-07 17:10:43,309 INFO L290 TraceCheckUtils]: 17: Hoare triple {3917#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 3 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4158#(and (not (<= main_~i~0 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} is VALID [2022-04-07 17:10:43,309 INFO L290 TraceCheckUtils]: 16: Hoare triple {4158#(and (not (<= main_~i~0 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3917#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 3 main_~i~0))} is VALID [2022-04-07 17:10:43,310 INFO L290 TraceCheckUtils]: 15: Hoare triple {3917#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 3 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4158#(and (not (<= main_~i~0 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} is VALID [2022-04-07 17:10:43,310 INFO L290 TraceCheckUtils]: 14: Hoare triple {4158#(and (not (<= main_~i~0 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3917#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 3 main_~i~0))} is VALID [2022-04-07 17:10:43,311 INFO L290 TraceCheckUtils]: 13: Hoare triple {3917#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 3 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4158#(and (not (<= main_~i~0 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} is VALID [2022-04-07 17:10:43,311 INFO L290 TraceCheckUtils]: 12: Hoare triple {4158#(and (not (<= main_~i~0 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3917#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0) (<= 3 main_~i~0))} is VALID [2022-04-07 17:10:43,312 INFO L290 TraceCheckUtils]: 11: Hoare triple {3915#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4158#(and (not (<= main_~i~0 1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 8)) 0))} is VALID [2022-04-07 17:10:43,312 INFO L290 TraceCheckUtils]: 10: Hoare triple {3914#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3915#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:10:43,313 INFO L290 TraceCheckUtils]: 9: Hoare triple {3914#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3914#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:10:43,313 INFO L290 TraceCheckUtils]: 8: Hoare triple {3913#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {3914#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:10:43,314 INFO L290 TraceCheckUtils]: 7: Hoare triple {3913#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {3913#(= main_~i~0 0)} is VALID [2022-04-07 17:10:43,314 INFO L290 TraceCheckUtils]: 6: Hoare triple {3908#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {3913#(= main_~i~0 0)} is VALID [2022-04-07 17:10:43,314 INFO L290 TraceCheckUtils]: 5: Hoare triple {3908#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {3908#true} is VALID [2022-04-07 17:10:43,314 INFO L272 TraceCheckUtils]: 4: Hoare triple {3908#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3908#true} is VALID [2022-04-07 17:10:43,314 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3908#true} {3908#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3908#true} is VALID [2022-04-07 17:10:43,314 INFO L290 TraceCheckUtils]: 2: Hoare triple {3908#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3908#true} is VALID [2022-04-07 17:10:43,314 INFO L290 TraceCheckUtils]: 1: Hoare triple {3908#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3908#true} is VALID [2022-04-07 17:10:43,314 INFO L272 TraceCheckUtils]: 0: Hoare triple {3908#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3908#true} is VALID [2022-04-07 17:10:43,315 INFO L134 CoverageAnalysis]: Checked inductivity of 80 backedges. 4 proven. 56 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2022-04-07 17:10:43,315 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1244520381] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 17:10:43,315 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 17:10:43,315 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19, 15] total 27 [2022-04-07 17:10:43,315 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1082441587] [2022-04-07 17:10:43,315 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 17:10:43,316 INFO L78 Accepts]: Start accepts. Automaton has has 27 states, 26 states have (on average 2.1538461538461537) internal successors, (56), 24 states have internal predecessors, (56), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) Word has length 46 [2022-04-07 17:10:43,317 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:10:43,317 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 27 states, 26 states have (on average 2.1538461538461537) internal successors, (56), 24 states have internal predecessors, (56), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) [2022-04-07 17:10:43,363 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 72 edges. 72 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:10:43,363 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 27 states [2022-04-07 17:10:43,363 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:10:43,364 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2022-04-07 17:10:43,364 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=101, Invalid=598, Unknown=3, NotChecked=0, Total=702 [2022-04-07 17:10:43,364 INFO L87 Difference]: Start difference. First operand 91 states and 100 transitions. Second operand has 27 states, 26 states have (on average 2.1538461538461537) internal successors, (56), 24 states have internal predecessors, (56), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) [2022-04-07 17:10:44,928 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:10:44,929 INFO L93 Difference]: Finished difference Result 101 states and 110 transitions. [2022-04-07 17:10:44,929 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2022-04-07 17:10:44,929 INFO L78 Accepts]: Start accepts. Automaton has has 27 states, 26 states have (on average 2.1538461538461537) internal successors, (56), 24 states have internal predecessors, (56), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) Word has length 46 [2022-04-07 17:10:44,929 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:10:44,929 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27 states, 26 states have (on average 2.1538461538461537) internal successors, (56), 24 states have internal predecessors, (56), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) [2022-04-07 17:10:44,931 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 72 transitions. [2022-04-07 17:10:44,931 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27 states, 26 states have (on average 2.1538461538461537) internal successors, (56), 24 states have internal predecessors, (56), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) [2022-04-07 17:10:44,933 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 72 transitions. [2022-04-07 17:10:44,933 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 27 states and 72 transitions. [2022-04-07 17:10:45,008 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 72 edges. 72 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:10:45,010 INFO L225 Difference]: With dead ends: 101 [2022-04-07 17:10:45,010 INFO L226 Difference]: Without dead ends: 101 [2022-04-07 17:10:45,010 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 146 GetRequests, 82 SyntacticMatches, 17 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 718 ImplicationChecksByTransitivity, 11.0s TimeCoverageRelationStatistics Valid=341, Invalid=2007, Unknown=4, NotChecked=0, Total=2352 [2022-04-07 17:10:45,011 INFO L913 BasicCegarLoop]: 26 mSDtfsCounter, 64 mSDsluCounter, 86 mSDsCounter, 0 mSdLazyCounter, 626 mSolverCounterSat, 29 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 64 SdHoareTripleChecker+Valid, 112 SdHoareTripleChecker+Invalid, 712 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 29 IncrementalHoareTripleChecker+Valid, 626 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 57 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-04-07 17:10:45,011 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [64 Valid, 112 Invalid, 712 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [29 Valid, 626 Invalid, 0 Unknown, 57 Unchecked, 0.5s Time] [2022-04-07 17:10:45,012 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 101 states. [2022-04-07 17:10:45,016 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 101 to 87. [2022-04-07 17:10:45,016 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:10:45,016 INFO L82 GeneralOperation]: Start isEquivalent. First operand 101 states. Second operand has 87 states, 67 states have (on average 1.0895522388059702) internal successors, (73), 70 states have internal predecessors, (73), 11 states have call successors, (11), 9 states have call predecessors, (11), 8 states have return successors, (10), 7 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-07 17:10:45,016 INFO L74 IsIncluded]: Start isIncluded. First operand 101 states. Second operand has 87 states, 67 states have (on average 1.0895522388059702) internal successors, (73), 70 states have internal predecessors, (73), 11 states have call successors, (11), 9 states have call predecessors, (11), 8 states have return successors, (10), 7 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-07 17:10:45,017 INFO L87 Difference]: Start difference. First operand 101 states. Second operand has 87 states, 67 states have (on average 1.0895522388059702) internal successors, (73), 70 states have internal predecessors, (73), 11 states have call successors, (11), 9 states have call predecessors, (11), 8 states have return successors, (10), 7 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-07 17:10:45,020 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:10:45,020 INFO L93 Difference]: Finished difference Result 101 states and 110 transitions. [2022-04-07 17:10:45,020 INFO L276 IsEmpty]: Start isEmpty. Operand 101 states and 110 transitions. [2022-04-07 17:10:45,020 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:10:45,020 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:10:45,021 INFO L74 IsIncluded]: Start isIncluded. First operand has 87 states, 67 states have (on average 1.0895522388059702) internal successors, (73), 70 states have internal predecessors, (73), 11 states have call successors, (11), 9 states have call predecessors, (11), 8 states have return successors, (10), 7 states have call predecessors, (10), 10 states have call successors, (10) Second operand 101 states. [2022-04-07 17:10:45,021 INFO L87 Difference]: Start difference. First operand has 87 states, 67 states have (on average 1.0895522388059702) internal successors, (73), 70 states have internal predecessors, (73), 11 states have call successors, (11), 9 states have call predecessors, (11), 8 states have return successors, (10), 7 states have call predecessors, (10), 10 states have call successors, (10) Second operand 101 states. [2022-04-07 17:10:45,023 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:10:45,023 INFO L93 Difference]: Finished difference Result 101 states and 110 transitions. [2022-04-07 17:10:45,023 INFO L276 IsEmpty]: Start isEmpty. Operand 101 states and 110 transitions. [2022-04-07 17:10:45,024 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:10:45,024 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:10:45,024 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:10:45,024 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:10:45,024 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 87 states, 67 states have (on average 1.0895522388059702) internal successors, (73), 70 states have internal predecessors, (73), 11 states have call successors, (11), 9 states have call predecessors, (11), 8 states have return successors, (10), 7 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-07 17:10:45,025 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 87 states to 87 states and 94 transitions. [2022-04-07 17:10:45,026 INFO L78 Accepts]: Start accepts. Automaton has 87 states and 94 transitions. Word has length 46 [2022-04-07 17:10:45,026 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:10:45,026 INFO L478 AbstractCegarLoop]: Abstraction has 87 states and 94 transitions. [2022-04-07 17:10:45,026 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 27 states, 26 states have (on average 2.1538461538461537) internal successors, (56), 24 states have internal predecessors, (56), 6 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 5 states have call predecessors, (6), 5 states have call successors, (6) [2022-04-07 17:10:45,026 INFO L276 IsEmpty]: Start isEmpty. Operand 87 states and 94 transitions. [2022-04-07 17:10:45,027 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2022-04-07 17:10:45,027 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:10:45,027 INFO L499 BasicCegarLoop]: trace histogram [5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:10:45,054 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2022-04-07 17:10:45,254 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10,10 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:10:45,254 INFO L403 AbstractCegarLoop]: === Iteration 12 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:10:45,255 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:10:45,255 INFO L85 PathProgramCache]: Analyzing trace with hash 692034935, now seen corresponding path program 9 times [2022-04-07 17:10:45,255 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:10:45,255 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1032639428] [2022-04-07 17:10:45,255 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:10:45,255 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:10:45,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:10:45,398 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:10:45,399 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:10:45,401 INFO L290 TraceCheckUtils]: 0: Hoare triple {4692#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4660#true} is VALID [2022-04-07 17:10:45,401 INFO L290 TraceCheckUtils]: 1: Hoare triple {4660#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-07 17:10:45,402 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {4660#true} {4660#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-07 17:10:45,402 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 18 [2022-04-07 17:10:45,403 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:10:45,405 INFO L290 TraceCheckUtils]: 0: Hoare triple {4660#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4660#true} is VALID [2022-04-07 17:10:45,405 INFO L290 TraceCheckUtils]: 1: Hoare triple {4660#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-07 17:10:45,405 INFO L290 TraceCheckUtils]: 2: Hoare triple {4660#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-07 17:10:45,406 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4660#true} {4671#(and (<= main_~n~0 4) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4671#(and (<= main_~n~0 4) (= main_~i~1 0))} is VALID [2022-04-07 17:10:45,406 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 26 [2022-04-07 17:10:45,407 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:10:45,409 INFO L290 TraceCheckUtils]: 0: Hoare triple {4660#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4660#true} is VALID [2022-04-07 17:10:45,409 INFO L290 TraceCheckUtils]: 1: Hoare triple {4660#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-07 17:10:45,409 INFO L290 TraceCheckUtils]: 2: Hoare triple {4660#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-07 17:10:45,410 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4660#true} {4676#(<= main_~n~0 (+ main_~i~1 3))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4676#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-07 17:10:45,410 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 34 [2022-04-07 17:10:45,411 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:10:45,413 INFO L290 TraceCheckUtils]: 0: Hoare triple {4660#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4660#true} is VALID [2022-04-07 17:10:45,413 INFO L290 TraceCheckUtils]: 1: Hoare triple {4660#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-07 17:10:45,413 INFO L290 TraceCheckUtils]: 2: Hoare triple {4660#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-07 17:10:45,414 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4660#true} {4681#(<= main_~n~0 (+ main_~i~1 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4681#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 17:10:45,414 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 42 [2022-04-07 17:10:45,415 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:10:45,417 INFO L290 TraceCheckUtils]: 0: Hoare triple {4660#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4660#true} is VALID [2022-04-07 17:10:45,417 INFO L290 TraceCheckUtils]: 1: Hoare triple {4660#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-07 17:10:45,417 INFO L290 TraceCheckUtils]: 2: Hoare triple {4660#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-07 17:10:45,418 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4660#true} {4686#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4686#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 17:10:45,419 INFO L272 TraceCheckUtils]: 0: Hoare triple {4660#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4692#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:10:45,419 INFO L290 TraceCheckUtils]: 1: Hoare triple {4692#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4660#true} is VALID [2022-04-07 17:10:45,419 INFO L290 TraceCheckUtils]: 2: Hoare triple {4660#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-07 17:10:45,419 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4660#true} {4660#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-07 17:10:45,419 INFO L272 TraceCheckUtils]: 4: Hoare triple {4660#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-07 17:10:45,419 INFO L290 TraceCheckUtils]: 5: Hoare triple {4660#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {4660#true} is VALID [2022-04-07 17:10:45,420 INFO L290 TraceCheckUtils]: 6: Hoare triple {4660#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {4665#(= main_~i~0 0)} is VALID [2022-04-07 17:10:45,420 INFO L290 TraceCheckUtils]: 7: Hoare triple {4665#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4665#(= main_~i~0 0)} is VALID [2022-04-07 17:10:45,421 INFO L290 TraceCheckUtils]: 8: Hoare triple {4665#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {4666#(<= main_~i~0 1)} is VALID [2022-04-07 17:10:45,421 INFO L290 TraceCheckUtils]: 9: Hoare triple {4666#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4666#(<= main_~i~0 1)} is VALID [2022-04-07 17:10:45,421 INFO L290 TraceCheckUtils]: 10: Hoare triple {4666#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {4667#(<= main_~i~0 2)} is VALID [2022-04-07 17:10:45,422 INFO L290 TraceCheckUtils]: 11: Hoare triple {4667#(<= main_~i~0 2)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4667#(<= main_~i~0 2)} is VALID [2022-04-07 17:10:45,422 INFO L290 TraceCheckUtils]: 12: Hoare triple {4667#(<= main_~i~0 2)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {4668#(<= main_~i~0 3)} is VALID [2022-04-07 17:10:45,423 INFO L290 TraceCheckUtils]: 13: Hoare triple {4668#(<= main_~i~0 3)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4668#(<= main_~i~0 3)} is VALID [2022-04-07 17:10:45,423 INFO L290 TraceCheckUtils]: 14: Hoare triple {4668#(<= main_~i~0 3)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {4669#(<= main_~i~0 4)} is VALID [2022-04-07 17:10:45,424 INFO L290 TraceCheckUtils]: 15: Hoare triple {4669#(<= main_~i~0 4)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {4670#(<= main_~n~0 4)} is VALID [2022-04-07 17:10:45,424 INFO L290 TraceCheckUtils]: 16: Hoare triple {4670#(<= main_~n~0 4)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {4671#(and (<= main_~n~0 4) (= main_~i~1 0))} is VALID [2022-04-07 17:10:45,425 INFO L290 TraceCheckUtils]: 17: Hoare triple {4671#(and (<= main_~n~0 4) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {4671#(and (<= main_~n~0 4) (= main_~i~1 0))} is VALID [2022-04-07 17:10:45,425 INFO L272 TraceCheckUtils]: 18: Hoare triple {4671#(and (<= main_~n~0 4) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4660#true} is VALID [2022-04-07 17:10:45,425 INFO L290 TraceCheckUtils]: 19: Hoare triple {4660#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4660#true} is VALID [2022-04-07 17:10:45,425 INFO L290 TraceCheckUtils]: 20: Hoare triple {4660#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-07 17:10:45,425 INFO L290 TraceCheckUtils]: 21: Hoare triple {4660#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-07 17:10:45,425 INFO L284 TraceCheckUtils]: 22: Hoare quadruple {4660#true} {4671#(and (<= main_~n~0 4) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4671#(and (<= main_~n~0 4) (= main_~i~1 0))} is VALID [2022-04-07 17:10:45,426 INFO L290 TraceCheckUtils]: 23: Hoare triple {4671#(and (<= main_~n~0 4) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {4671#(and (<= main_~n~0 4) (= main_~i~1 0))} is VALID [2022-04-07 17:10:45,426 INFO L290 TraceCheckUtils]: 24: Hoare triple {4671#(and (<= main_~n~0 4) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {4676#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-07 17:10:45,427 INFO L290 TraceCheckUtils]: 25: Hoare triple {4676#(<= main_~n~0 (+ main_~i~1 3))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {4676#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-07 17:10:45,427 INFO L272 TraceCheckUtils]: 26: Hoare triple {4676#(<= main_~n~0 (+ main_~i~1 3))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4660#true} is VALID [2022-04-07 17:10:45,427 INFO L290 TraceCheckUtils]: 27: Hoare triple {4660#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4660#true} is VALID [2022-04-07 17:10:45,427 INFO L290 TraceCheckUtils]: 28: Hoare triple {4660#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-07 17:10:45,427 INFO L290 TraceCheckUtils]: 29: Hoare triple {4660#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-07 17:10:45,427 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {4660#true} {4676#(<= main_~n~0 (+ main_~i~1 3))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4676#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-07 17:10:45,428 INFO L290 TraceCheckUtils]: 31: Hoare triple {4676#(<= main_~n~0 (+ main_~i~1 3))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {4676#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-07 17:10:45,428 INFO L290 TraceCheckUtils]: 32: Hoare triple {4676#(<= main_~n~0 (+ main_~i~1 3))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {4681#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 17:10:45,429 INFO L290 TraceCheckUtils]: 33: Hoare triple {4681#(<= main_~n~0 (+ main_~i~1 2))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {4681#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 17:10:45,429 INFO L272 TraceCheckUtils]: 34: Hoare triple {4681#(<= main_~n~0 (+ main_~i~1 2))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4660#true} is VALID [2022-04-07 17:10:45,429 INFO L290 TraceCheckUtils]: 35: Hoare triple {4660#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4660#true} is VALID [2022-04-07 17:10:45,429 INFO L290 TraceCheckUtils]: 36: Hoare triple {4660#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-07 17:10:45,429 INFO L290 TraceCheckUtils]: 37: Hoare triple {4660#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-07 17:10:45,430 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {4660#true} {4681#(<= main_~n~0 (+ main_~i~1 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4681#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 17:10:45,430 INFO L290 TraceCheckUtils]: 39: Hoare triple {4681#(<= main_~n~0 (+ main_~i~1 2))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {4681#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 17:10:45,430 INFO L290 TraceCheckUtils]: 40: Hoare triple {4681#(<= main_~n~0 (+ main_~i~1 2))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {4686#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 17:10:45,431 INFO L290 TraceCheckUtils]: 41: Hoare triple {4686#(<= main_~n~0 (+ main_~i~1 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {4686#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 17:10:45,431 INFO L272 TraceCheckUtils]: 42: Hoare triple {4686#(<= main_~n~0 (+ main_~i~1 1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4660#true} is VALID [2022-04-07 17:10:45,431 INFO L290 TraceCheckUtils]: 43: Hoare triple {4660#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4660#true} is VALID [2022-04-07 17:10:45,431 INFO L290 TraceCheckUtils]: 44: Hoare triple {4660#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-07 17:10:45,431 INFO L290 TraceCheckUtils]: 45: Hoare triple {4660#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-07 17:10:45,432 INFO L284 TraceCheckUtils]: 46: Hoare quadruple {4660#true} {4686#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4686#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 17:10:45,432 INFO L290 TraceCheckUtils]: 47: Hoare triple {4686#(<= main_~n~0 (+ main_~i~1 1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {4686#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 17:10:45,432 INFO L290 TraceCheckUtils]: 48: Hoare triple {4686#(<= main_~n~0 (+ main_~i~1 1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {4691#(<= main_~n~0 main_~i~1)} is VALID [2022-04-07 17:10:45,433 INFO L290 TraceCheckUtils]: 49: Hoare triple {4691#(<= main_~n~0 main_~i~1)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {4661#false} is VALID [2022-04-07 17:10:45,433 INFO L272 TraceCheckUtils]: 50: Hoare triple {4661#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4661#false} is VALID [2022-04-07 17:10:45,433 INFO L290 TraceCheckUtils]: 51: Hoare triple {4661#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4661#false} is VALID [2022-04-07 17:10:45,433 INFO L290 TraceCheckUtils]: 52: Hoare triple {4661#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {4661#false} is VALID [2022-04-07 17:10:45,433 INFO L290 TraceCheckUtils]: 53: Hoare triple {4661#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4661#false} is VALID [2022-04-07 17:10:45,434 INFO L134 CoverageAnalysis]: Checked inductivity of 80 backedges. 27 proven. 29 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2022-04-07 17:10:45,434 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:10:45,434 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1032639428] [2022-04-07 17:10:45,434 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1032639428] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:10:45,434 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2136461233] [2022-04-07 17:10:45,434 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-07 17:10:45,434 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:10:45,434 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:10:45,435 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:10:45,439 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2022-04-07 17:10:45,501 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 5 check-sat command(s) [2022-04-07 17:10:45,501 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 17:10:45,502 INFO L263 TraceCheckSpWp]: Trace formula consists of 162 conjuncts, 12 conjunts are in the unsatisfiable core [2022-04-07 17:10:45,514 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:10:45,515 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:10:45,882 INFO L272 TraceCheckUtils]: 0: Hoare triple {4660#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-07 17:10:45,882 INFO L290 TraceCheckUtils]: 1: Hoare triple {4660#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4660#true} is VALID [2022-04-07 17:10:45,882 INFO L290 TraceCheckUtils]: 2: Hoare triple {4660#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-07 17:10:45,882 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4660#true} {4660#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-07 17:10:45,882 INFO L272 TraceCheckUtils]: 4: Hoare triple {4660#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-07 17:10:45,882 INFO L290 TraceCheckUtils]: 5: Hoare triple {4660#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {4660#true} is VALID [2022-04-07 17:10:45,883 INFO L290 TraceCheckUtils]: 6: Hoare triple {4660#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {4714#(<= main_~i~0 0)} is VALID [2022-04-07 17:10:45,883 INFO L290 TraceCheckUtils]: 7: Hoare triple {4714#(<= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4714#(<= main_~i~0 0)} is VALID [2022-04-07 17:10:45,884 INFO L290 TraceCheckUtils]: 8: Hoare triple {4714#(<= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {4666#(<= main_~i~0 1)} is VALID [2022-04-07 17:10:45,884 INFO L290 TraceCheckUtils]: 9: Hoare triple {4666#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4666#(<= main_~i~0 1)} is VALID [2022-04-07 17:10:45,884 INFO L290 TraceCheckUtils]: 10: Hoare triple {4666#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {4667#(<= main_~i~0 2)} is VALID [2022-04-07 17:10:45,884 INFO L290 TraceCheckUtils]: 11: Hoare triple {4667#(<= main_~i~0 2)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4667#(<= main_~i~0 2)} is VALID [2022-04-07 17:10:45,885 INFO L290 TraceCheckUtils]: 12: Hoare triple {4667#(<= main_~i~0 2)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {4668#(<= main_~i~0 3)} is VALID [2022-04-07 17:10:45,885 INFO L290 TraceCheckUtils]: 13: Hoare triple {4668#(<= main_~i~0 3)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4668#(<= main_~i~0 3)} is VALID [2022-04-07 17:10:45,886 INFO L290 TraceCheckUtils]: 14: Hoare triple {4668#(<= main_~i~0 3)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {4669#(<= main_~i~0 4)} is VALID [2022-04-07 17:10:45,886 INFO L290 TraceCheckUtils]: 15: Hoare triple {4669#(<= main_~i~0 4)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {4670#(<= main_~n~0 4)} is VALID [2022-04-07 17:10:45,886 INFO L290 TraceCheckUtils]: 16: Hoare triple {4670#(<= main_~n~0 4)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {4745#(and (<= 0 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-07 17:10:45,887 INFO L290 TraceCheckUtils]: 17: Hoare triple {4745#(and (<= 0 main_~i~1) (<= main_~n~0 4))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {4745#(and (<= 0 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-07 17:10:45,887 INFO L272 TraceCheckUtils]: 18: Hoare triple {4745#(and (<= 0 main_~i~1) (<= main_~n~0 4))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4660#true} is VALID [2022-04-07 17:10:45,887 INFO L290 TraceCheckUtils]: 19: Hoare triple {4660#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4660#true} is VALID [2022-04-07 17:10:45,887 INFO L290 TraceCheckUtils]: 20: Hoare triple {4660#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-07 17:10:45,887 INFO L290 TraceCheckUtils]: 21: Hoare triple {4660#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-07 17:10:45,888 INFO L284 TraceCheckUtils]: 22: Hoare quadruple {4660#true} {4745#(and (<= 0 main_~i~1) (<= main_~n~0 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4745#(and (<= 0 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-07 17:10:45,888 INFO L290 TraceCheckUtils]: 23: Hoare triple {4745#(and (<= 0 main_~i~1) (<= main_~n~0 4))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {4745#(and (<= 0 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-07 17:10:45,888 INFO L290 TraceCheckUtils]: 24: Hoare triple {4745#(and (<= 0 main_~i~1) (<= main_~n~0 4))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {4770#(and (<= 1 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-07 17:10:45,889 INFO L290 TraceCheckUtils]: 25: Hoare triple {4770#(and (<= 1 main_~i~1) (<= main_~n~0 4))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {4770#(and (<= 1 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-07 17:10:45,889 INFO L272 TraceCheckUtils]: 26: Hoare triple {4770#(and (<= 1 main_~i~1) (<= main_~n~0 4))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4660#true} is VALID [2022-04-07 17:10:45,889 INFO L290 TraceCheckUtils]: 27: Hoare triple {4660#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4660#true} is VALID [2022-04-07 17:10:45,889 INFO L290 TraceCheckUtils]: 28: Hoare triple {4660#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-07 17:10:45,889 INFO L290 TraceCheckUtils]: 29: Hoare triple {4660#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-07 17:10:45,890 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {4660#true} {4770#(and (<= 1 main_~i~1) (<= main_~n~0 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4770#(and (<= 1 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-07 17:10:45,890 INFO L290 TraceCheckUtils]: 31: Hoare triple {4770#(and (<= 1 main_~i~1) (<= main_~n~0 4))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {4770#(and (<= 1 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-07 17:10:45,890 INFO L290 TraceCheckUtils]: 32: Hoare triple {4770#(and (<= 1 main_~i~1) (<= main_~n~0 4))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {4795#(and (<= 2 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-07 17:10:45,891 INFO L290 TraceCheckUtils]: 33: Hoare triple {4795#(and (<= 2 main_~i~1) (<= main_~n~0 4))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {4795#(and (<= 2 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-07 17:10:45,891 INFO L272 TraceCheckUtils]: 34: Hoare triple {4795#(and (<= 2 main_~i~1) (<= main_~n~0 4))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4660#true} is VALID [2022-04-07 17:10:45,891 INFO L290 TraceCheckUtils]: 35: Hoare triple {4660#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4660#true} is VALID [2022-04-07 17:10:45,891 INFO L290 TraceCheckUtils]: 36: Hoare triple {4660#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-07 17:10:45,891 INFO L290 TraceCheckUtils]: 37: Hoare triple {4660#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-07 17:10:45,891 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {4660#true} {4795#(and (<= 2 main_~i~1) (<= main_~n~0 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4795#(and (<= 2 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-07 17:10:45,892 INFO L290 TraceCheckUtils]: 39: Hoare triple {4795#(and (<= 2 main_~i~1) (<= main_~n~0 4))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {4795#(and (<= 2 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-07 17:10:45,892 INFO L290 TraceCheckUtils]: 40: Hoare triple {4795#(and (<= 2 main_~i~1) (<= main_~n~0 4))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {4820#(and (<= 3 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-07 17:10:45,893 INFO L290 TraceCheckUtils]: 41: Hoare triple {4820#(and (<= 3 main_~i~1) (<= main_~n~0 4))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {4820#(and (<= 3 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-07 17:10:45,893 INFO L272 TraceCheckUtils]: 42: Hoare triple {4820#(and (<= 3 main_~i~1) (<= main_~n~0 4))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4660#true} is VALID [2022-04-07 17:10:45,893 INFO L290 TraceCheckUtils]: 43: Hoare triple {4660#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4660#true} is VALID [2022-04-07 17:10:45,893 INFO L290 TraceCheckUtils]: 44: Hoare triple {4660#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-07 17:10:45,893 INFO L290 TraceCheckUtils]: 45: Hoare triple {4660#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-07 17:10:45,893 INFO L284 TraceCheckUtils]: 46: Hoare quadruple {4660#true} {4820#(and (<= 3 main_~i~1) (<= main_~n~0 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4820#(and (<= 3 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-07 17:10:45,894 INFO L290 TraceCheckUtils]: 47: Hoare triple {4820#(and (<= 3 main_~i~1) (<= main_~n~0 4))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {4820#(and (<= 3 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-07 17:10:45,894 INFO L290 TraceCheckUtils]: 48: Hoare triple {4820#(and (<= 3 main_~i~1) (<= main_~n~0 4))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {4845#(and (<= 4 main_~i~1) (<= main_~n~0 4))} is VALID [2022-04-07 17:10:45,895 INFO L290 TraceCheckUtils]: 49: Hoare triple {4845#(and (<= 4 main_~i~1) (<= main_~n~0 4))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {4661#false} is VALID [2022-04-07 17:10:45,895 INFO L272 TraceCheckUtils]: 50: Hoare triple {4661#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4661#false} is VALID [2022-04-07 17:10:45,895 INFO L290 TraceCheckUtils]: 51: Hoare triple {4661#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4661#false} is VALID [2022-04-07 17:10:45,895 INFO L290 TraceCheckUtils]: 52: Hoare triple {4661#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {4661#false} is VALID [2022-04-07 17:10:45,895 INFO L290 TraceCheckUtils]: 53: Hoare triple {4661#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4661#false} is VALID [2022-04-07 17:10:45,895 INFO L134 CoverageAnalysis]: Checked inductivity of 80 backedges. 40 proven. 16 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2022-04-07 17:10:45,895 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 17:10:46,131 INFO L290 TraceCheckUtils]: 53: Hoare triple {4661#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4661#false} is VALID [2022-04-07 17:10:46,132 INFO L290 TraceCheckUtils]: 52: Hoare triple {4661#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {4661#false} is VALID [2022-04-07 17:10:46,132 INFO L290 TraceCheckUtils]: 51: Hoare triple {4661#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4661#false} is VALID [2022-04-07 17:10:46,132 INFO L272 TraceCheckUtils]: 50: Hoare triple {4661#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4661#false} is VALID [2022-04-07 17:10:46,132 INFO L290 TraceCheckUtils]: 49: Hoare triple {4691#(<= main_~n~0 main_~i~1)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {4661#false} is VALID [2022-04-07 17:10:46,133 INFO L290 TraceCheckUtils]: 48: Hoare triple {4686#(<= main_~n~0 (+ main_~i~1 1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {4691#(<= main_~n~0 main_~i~1)} is VALID [2022-04-07 17:10:46,133 INFO L290 TraceCheckUtils]: 47: Hoare triple {4686#(<= main_~n~0 (+ main_~i~1 1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {4686#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 17:10:46,134 INFO L284 TraceCheckUtils]: 46: Hoare quadruple {4660#true} {4686#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4686#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 17:10:46,134 INFO L290 TraceCheckUtils]: 45: Hoare triple {4660#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-07 17:10:46,134 INFO L290 TraceCheckUtils]: 44: Hoare triple {4660#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-07 17:10:46,134 INFO L290 TraceCheckUtils]: 43: Hoare triple {4660#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4660#true} is VALID [2022-04-07 17:10:46,134 INFO L272 TraceCheckUtils]: 42: Hoare triple {4686#(<= main_~n~0 (+ main_~i~1 1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4660#true} is VALID [2022-04-07 17:10:46,134 INFO L290 TraceCheckUtils]: 41: Hoare triple {4686#(<= main_~n~0 (+ main_~i~1 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {4686#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 17:10:46,135 INFO L290 TraceCheckUtils]: 40: Hoare triple {4681#(<= main_~n~0 (+ main_~i~1 2))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {4686#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 17:10:46,135 INFO L290 TraceCheckUtils]: 39: Hoare triple {4681#(<= main_~n~0 (+ main_~i~1 2))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {4681#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 17:10:46,135 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {4660#true} {4681#(<= main_~n~0 (+ main_~i~1 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4681#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 17:10:46,135 INFO L290 TraceCheckUtils]: 37: Hoare triple {4660#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-07 17:10:46,135 INFO L290 TraceCheckUtils]: 36: Hoare triple {4660#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-07 17:10:46,136 INFO L290 TraceCheckUtils]: 35: Hoare triple {4660#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4660#true} is VALID [2022-04-07 17:10:46,136 INFO L272 TraceCheckUtils]: 34: Hoare triple {4681#(<= main_~n~0 (+ main_~i~1 2))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4660#true} is VALID [2022-04-07 17:10:46,136 INFO L290 TraceCheckUtils]: 33: Hoare triple {4681#(<= main_~n~0 (+ main_~i~1 2))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {4681#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 17:10:46,136 INFO L290 TraceCheckUtils]: 32: Hoare triple {4676#(<= main_~n~0 (+ main_~i~1 3))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {4681#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 17:10:46,137 INFO L290 TraceCheckUtils]: 31: Hoare triple {4676#(<= main_~n~0 (+ main_~i~1 3))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {4676#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-07 17:10:46,150 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {4660#true} {4676#(<= main_~n~0 (+ main_~i~1 3))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4676#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-07 17:10:46,150 INFO L290 TraceCheckUtils]: 29: Hoare triple {4660#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-07 17:10:46,150 INFO L290 TraceCheckUtils]: 28: Hoare triple {4660#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-07 17:10:46,151 INFO L290 TraceCheckUtils]: 27: Hoare triple {4660#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4660#true} is VALID [2022-04-07 17:10:46,151 INFO L272 TraceCheckUtils]: 26: Hoare triple {4676#(<= main_~n~0 (+ main_~i~1 3))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4660#true} is VALID [2022-04-07 17:10:46,151 INFO L290 TraceCheckUtils]: 25: Hoare triple {4676#(<= main_~n~0 (+ main_~i~1 3))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {4676#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-07 17:10:46,151 INFO L290 TraceCheckUtils]: 24: Hoare triple {4948#(<= main_~n~0 (+ main_~i~1 4))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {4676#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-07 17:10:46,152 INFO L290 TraceCheckUtils]: 23: Hoare triple {4948#(<= main_~n~0 (+ main_~i~1 4))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {4948#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-07 17:10:46,152 INFO L284 TraceCheckUtils]: 22: Hoare quadruple {4660#true} {4948#(<= main_~n~0 (+ main_~i~1 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4948#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-07 17:10:46,152 INFO L290 TraceCheckUtils]: 21: Hoare triple {4660#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-07 17:10:46,152 INFO L290 TraceCheckUtils]: 20: Hoare triple {4660#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-07 17:10:46,152 INFO L290 TraceCheckUtils]: 19: Hoare triple {4660#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4660#true} is VALID [2022-04-07 17:10:46,153 INFO L272 TraceCheckUtils]: 18: Hoare triple {4948#(<= main_~n~0 (+ main_~i~1 4))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {4660#true} is VALID [2022-04-07 17:10:46,153 INFO L290 TraceCheckUtils]: 17: Hoare triple {4948#(<= main_~n~0 (+ main_~i~1 4))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {4948#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-07 17:10:46,153 INFO L290 TraceCheckUtils]: 16: Hoare triple {4670#(<= main_~n~0 4)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {4948#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-07 17:10:46,154 INFO L290 TraceCheckUtils]: 15: Hoare triple {4669#(<= main_~i~0 4)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {4670#(<= main_~n~0 4)} is VALID [2022-04-07 17:10:46,154 INFO L290 TraceCheckUtils]: 14: Hoare triple {4668#(<= main_~i~0 3)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {4669#(<= main_~i~0 4)} is VALID [2022-04-07 17:10:46,154 INFO L290 TraceCheckUtils]: 13: Hoare triple {4668#(<= main_~i~0 3)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4668#(<= main_~i~0 3)} is VALID [2022-04-07 17:10:46,155 INFO L290 TraceCheckUtils]: 12: Hoare triple {4667#(<= main_~i~0 2)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {4668#(<= main_~i~0 3)} is VALID [2022-04-07 17:10:46,155 INFO L290 TraceCheckUtils]: 11: Hoare triple {4667#(<= main_~i~0 2)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4667#(<= main_~i~0 2)} is VALID [2022-04-07 17:10:46,155 INFO L290 TraceCheckUtils]: 10: Hoare triple {4666#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {4667#(<= main_~i~0 2)} is VALID [2022-04-07 17:10:46,156 INFO L290 TraceCheckUtils]: 9: Hoare triple {4666#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4666#(<= main_~i~0 1)} is VALID [2022-04-07 17:10:46,156 INFO L290 TraceCheckUtils]: 8: Hoare triple {4714#(<= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {4666#(<= main_~i~0 1)} is VALID [2022-04-07 17:10:46,156 INFO L290 TraceCheckUtils]: 7: Hoare triple {4714#(<= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {4714#(<= main_~i~0 0)} is VALID [2022-04-07 17:10:46,157 INFO L290 TraceCheckUtils]: 6: Hoare triple {4660#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {4714#(<= main_~i~0 0)} is VALID [2022-04-07 17:10:46,157 INFO L290 TraceCheckUtils]: 5: Hoare triple {4660#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {4660#true} is VALID [2022-04-07 17:10:46,157 INFO L272 TraceCheckUtils]: 4: Hoare triple {4660#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-07 17:10:46,157 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4660#true} {4660#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-07 17:10:46,157 INFO L290 TraceCheckUtils]: 2: Hoare triple {4660#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-07 17:10:46,157 INFO L290 TraceCheckUtils]: 1: Hoare triple {4660#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4660#true} is VALID [2022-04-07 17:10:46,157 INFO L272 TraceCheckUtils]: 0: Hoare triple {4660#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4660#true} is VALID [2022-04-07 17:10:46,157 INFO L134 CoverageAnalysis]: Checked inductivity of 80 backedges. 40 proven. 16 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2022-04-07 17:10:46,158 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2136461233] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 17:10:46,158 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 17:10:46,158 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 13, 13] total 21 [2022-04-07 17:10:46,158 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1094534055] [2022-04-07 17:10:46,158 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 17:10:46,158 INFO L78 Accepts]: Start accepts. Automaton has has 21 states, 21 states have (on average 2.619047619047619) internal successors, (55), 20 states have internal predecessors, (55), 11 states have call successors, (13), 3 states have call predecessors, (13), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Word has length 54 [2022-04-07 17:10:46,159 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:10:46,159 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 21 states, 21 states have (on average 2.619047619047619) internal successors, (55), 20 states have internal predecessors, (55), 11 states have call successors, (13), 3 states have call predecessors, (13), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-07 17:10:46,216 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 78 edges. 78 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:10:46,216 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 21 states [2022-04-07 17:10:46,217 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:10:46,217 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2022-04-07 17:10:46,217 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=97, Invalid=323, Unknown=0, NotChecked=0, Total=420 [2022-04-07 17:10:46,218 INFO L87 Difference]: Start difference. First operand 87 states and 94 transitions. Second operand has 21 states, 21 states have (on average 2.619047619047619) internal successors, (55), 20 states have internal predecessors, (55), 11 states have call successors, (13), 3 states have call predecessors, (13), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-07 17:10:46,695 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:10:46,696 INFO L93 Difference]: Finished difference Result 98 states and 106 transitions. [2022-04-07 17:10:46,696 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2022-04-07 17:10:46,696 INFO L78 Accepts]: Start accepts. Automaton has has 21 states, 21 states have (on average 2.619047619047619) internal successors, (55), 20 states have internal predecessors, (55), 11 states have call successors, (13), 3 states have call predecessors, (13), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) Word has length 54 [2022-04-07 17:10:46,696 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:10:46,696 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 21 states have (on average 2.619047619047619) internal successors, (55), 20 states have internal predecessors, (55), 11 states have call successors, (13), 3 states have call predecessors, (13), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-07 17:10:46,699 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 54 transitions. [2022-04-07 17:10:46,699 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 21 states have (on average 2.619047619047619) internal successors, (55), 20 states have internal predecessors, (55), 11 states have call successors, (13), 3 states have call predecessors, (13), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-07 17:10:46,700 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 54 transitions. [2022-04-07 17:10:46,700 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 14 states and 54 transitions. [2022-04-07 17:10:46,757 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 54 edges. 54 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:10:46,759 INFO L225 Difference]: With dead ends: 98 [2022-04-07 17:10:46,759 INFO L226 Difference]: Without dead ends: 76 [2022-04-07 17:10:46,760 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 141 GetRequests, 110 SyntacticMatches, 1 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 237 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=216, Invalid=776, Unknown=0, NotChecked=0, Total=992 [2022-04-07 17:10:46,760 INFO L913 BasicCegarLoop]: 21 mSDtfsCounter, 39 mSDsluCounter, 37 mSDsCounter, 0 mSdLazyCounter, 221 mSolverCounterSat, 29 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 40 SdHoareTripleChecker+Valid, 58 SdHoareTripleChecker+Invalid, 250 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 29 IncrementalHoareTripleChecker+Valid, 221 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-07 17:10:46,760 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [40 Valid, 58 Invalid, 250 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [29 Valid, 221 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-07 17:10:46,761 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76 states. [2022-04-07 17:10:46,764 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76 to 76. [2022-04-07 17:10:46,764 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:10:46,764 INFO L82 GeneralOperation]: Start isEquivalent. First operand 76 states. Second operand has 76 states, 59 states have (on average 1.0847457627118644) internal successors, (64), 61 states have internal predecessors, (64), 9 states have call successors, (9), 8 states have call predecessors, (9), 7 states have return successors, (8), 6 states have call predecessors, (8), 8 states have call successors, (8) [2022-04-07 17:10:46,765 INFO L74 IsIncluded]: Start isIncluded. First operand 76 states. Second operand has 76 states, 59 states have (on average 1.0847457627118644) internal successors, (64), 61 states have internal predecessors, (64), 9 states have call successors, (9), 8 states have call predecessors, (9), 7 states have return successors, (8), 6 states have call predecessors, (8), 8 states have call successors, (8) [2022-04-07 17:10:46,765 INFO L87 Difference]: Start difference. First operand 76 states. Second operand has 76 states, 59 states have (on average 1.0847457627118644) internal successors, (64), 61 states have internal predecessors, (64), 9 states have call successors, (9), 8 states have call predecessors, (9), 7 states have return successors, (8), 6 states have call predecessors, (8), 8 states have call successors, (8) [2022-04-07 17:10:46,766 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:10:46,766 INFO L93 Difference]: Finished difference Result 76 states and 81 transitions. [2022-04-07 17:10:46,767 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states and 81 transitions. [2022-04-07 17:10:46,767 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:10:46,767 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:10:46,767 INFO L74 IsIncluded]: Start isIncluded. First operand has 76 states, 59 states have (on average 1.0847457627118644) internal successors, (64), 61 states have internal predecessors, (64), 9 states have call successors, (9), 8 states have call predecessors, (9), 7 states have return successors, (8), 6 states have call predecessors, (8), 8 states have call successors, (8) Second operand 76 states. [2022-04-07 17:10:46,767 INFO L87 Difference]: Start difference. First operand has 76 states, 59 states have (on average 1.0847457627118644) internal successors, (64), 61 states have internal predecessors, (64), 9 states have call successors, (9), 8 states have call predecessors, (9), 7 states have return successors, (8), 6 states have call predecessors, (8), 8 states have call successors, (8) Second operand 76 states. [2022-04-07 17:10:46,769 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:10:46,769 INFO L93 Difference]: Finished difference Result 76 states and 81 transitions. [2022-04-07 17:10:46,769 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states and 81 transitions. [2022-04-07 17:10:46,769 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:10:46,769 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:10:46,769 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:10:46,770 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:10:46,770 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 76 states, 59 states have (on average 1.0847457627118644) internal successors, (64), 61 states have internal predecessors, (64), 9 states have call successors, (9), 8 states have call predecessors, (9), 7 states have return successors, (8), 6 states have call predecessors, (8), 8 states have call successors, (8) [2022-04-07 17:10:46,771 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76 states to 76 states and 81 transitions. [2022-04-07 17:10:46,771 INFO L78 Accepts]: Start accepts. Automaton has 76 states and 81 transitions. Word has length 54 [2022-04-07 17:10:46,771 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:10:46,771 INFO L478 AbstractCegarLoop]: Abstraction has 76 states and 81 transitions. [2022-04-07 17:10:46,772 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 21 states, 21 states have (on average 2.619047619047619) internal successors, (55), 20 states have internal predecessors, (55), 11 states have call successors, (13), 3 states have call predecessors, (13), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-07 17:10:46,772 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states and 81 transitions. [2022-04-07 17:10:46,772 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2022-04-07 17:10:46,772 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:10:46,772 INFO L499 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:10:46,794 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Forceful destruction successful, exit code 0 [2022-04-07 17:10:46,987 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable11 [2022-04-07 17:10:46,987 INFO L403 AbstractCegarLoop]: === Iteration 13 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:10:46,988 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:10:46,988 INFO L85 PathProgramCache]: Analyzing trace with hash 529632181, now seen corresponding path program 10 times [2022-04-07 17:10:46,988 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:10:46,988 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [953471501] [2022-04-07 17:10:46,988 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:10:46,988 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:10:47,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:10:47,190 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:10:47,191 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:10:47,196 INFO L290 TraceCheckUtils]: 0: Hoare triple {5407#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5371#true} is VALID [2022-04-07 17:10:47,196 INFO L290 TraceCheckUtils]: 1: Hoare triple {5371#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5371#true} is VALID [2022-04-07 17:10:47,196 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {5371#true} {5371#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5371#true} is VALID [2022-04-07 17:10:47,196 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 20 [2022-04-07 17:10:47,197 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:10:47,207 INFO L290 TraceCheckUtils]: 0: Hoare triple {5371#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5371#true} is VALID [2022-04-07 17:10:47,207 INFO L290 TraceCheckUtils]: 1: Hoare triple {5371#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5371#true} is VALID [2022-04-07 17:10:47,207 INFO L290 TraceCheckUtils]: 2: Hoare triple {5371#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5371#true} is VALID [2022-04-07 17:10:47,208 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5371#true} {5383#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5383#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:10:47,208 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 28 [2022-04-07 17:10:47,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:10:47,212 INFO L290 TraceCheckUtils]: 0: Hoare triple {5371#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5371#true} is VALID [2022-04-07 17:10:47,212 INFO L290 TraceCheckUtils]: 1: Hoare triple {5371#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5371#true} is VALID [2022-04-07 17:10:47,212 INFO L290 TraceCheckUtils]: 2: Hoare triple {5371#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5371#true} is VALID [2022-04-07 17:10:47,213 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5371#true} {5388#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5388#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:10:47,213 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 36 [2022-04-07 17:10:47,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:10:47,216 INFO L290 TraceCheckUtils]: 0: Hoare triple {5371#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5371#true} is VALID [2022-04-07 17:10:47,216 INFO L290 TraceCheckUtils]: 1: Hoare triple {5371#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5371#true} is VALID [2022-04-07 17:10:47,216 INFO L290 TraceCheckUtils]: 2: Hoare triple {5371#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5371#true} is VALID [2022-04-07 17:10:47,217 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5371#true} {5393#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5393#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:10:47,217 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 44 [2022-04-07 17:10:47,218 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:10:47,224 INFO L290 TraceCheckUtils]: 0: Hoare triple {5371#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5371#true} is VALID [2022-04-07 17:10:47,224 INFO L290 TraceCheckUtils]: 1: Hoare triple {5371#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5371#true} is VALID [2022-04-07 17:10:47,224 INFO L290 TraceCheckUtils]: 2: Hoare triple {5371#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5371#true} is VALID [2022-04-07 17:10:47,225 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5371#true} {5398#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5398#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:10:47,225 INFO L272 TraceCheckUtils]: 0: Hoare triple {5371#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5407#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:10:47,225 INFO L290 TraceCheckUtils]: 1: Hoare triple {5407#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5371#true} is VALID [2022-04-07 17:10:47,226 INFO L290 TraceCheckUtils]: 2: Hoare triple {5371#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5371#true} is VALID [2022-04-07 17:10:47,226 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5371#true} {5371#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5371#true} is VALID [2022-04-07 17:10:47,226 INFO L272 TraceCheckUtils]: 4: Hoare triple {5371#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5371#true} is VALID [2022-04-07 17:10:47,226 INFO L290 TraceCheckUtils]: 5: Hoare triple {5371#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {5371#true} is VALID [2022-04-07 17:10:47,226 INFO L290 TraceCheckUtils]: 6: Hoare triple {5371#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {5376#(= main_~i~0 0)} is VALID [2022-04-07 17:10:47,227 INFO L290 TraceCheckUtils]: 7: Hoare triple {5376#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5376#(= main_~i~0 0)} is VALID [2022-04-07 17:10:47,227 INFO L290 TraceCheckUtils]: 8: Hoare triple {5376#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5377#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:10:47,227 INFO L290 TraceCheckUtils]: 9: Hoare triple {5377#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5377#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:10:47,228 INFO L290 TraceCheckUtils]: 10: Hoare triple {5377#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5378#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:10:47,229 INFO L290 TraceCheckUtils]: 11: Hoare triple {5378#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5378#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:10:47,229 INFO L290 TraceCheckUtils]: 12: Hoare triple {5378#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5379#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 17:10:47,229 INFO L290 TraceCheckUtils]: 13: Hoare triple {5379#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5379#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 17:10:47,230 INFO L290 TraceCheckUtils]: 14: Hoare triple {5379#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5380#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 17:10:47,231 INFO L290 TraceCheckUtils]: 15: Hoare triple {5380#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5381#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 17:10:47,231 INFO L290 TraceCheckUtils]: 16: Hoare triple {5381#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5382#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-07 17:10:47,232 INFO L290 TraceCheckUtils]: 17: Hoare triple {5382#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {5382#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-07 17:10:47,232 INFO L290 TraceCheckUtils]: 18: Hoare triple {5382#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {5383#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:10:47,232 INFO L290 TraceCheckUtils]: 19: Hoare triple {5383#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5383#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:10:47,233 INFO L272 TraceCheckUtils]: 20: Hoare triple {5383#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5371#true} is VALID [2022-04-07 17:10:47,233 INFO L290 TraceCheckUtils]: 21: Hoare triple {5371#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5371#true} is VALID [2022-04-07 17:10:47,233 INFO L290 TraceCheckUtils]: 22: Hoare triple {5371#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5371#true} is VALID [2022-04-07 17:10:47,233 INFO L290 TraceCheckUtils]: 23: Hoare triple {5371#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5371#true} is VALID [2022-04-07 17:10:47,233 INFO L284 TraceCheckUtils]: 24: Hoare quadruple {5371#true} {5383#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5383#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:10:47,234 INFO L290 TraceCheckUtils]: 25: Hoare triple {5383#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {5383#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:10:47,234 INFO L290 TraceCheckUtils]: 26: Hoare triple {5383#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {5388#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:10:47,235 INFO L290 TraceCheckUtils]: 27: Hoare triple {5388#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5388#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:10:47,235 INFO L272 TraceCheckUtils]: 28: Hoare triple {5388#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5371#true} is VALID [2022-04-07 17:10:47,235 INFO L290 TraceCheckUtils]: 29: Hoare triple {5371#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5371#true} is VALID [2022-04-07 17:10:47,235 INFO L290 TraceCheckUtils]: 30: Hoare triple {5371#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5371#true} is VALID [2022-04-07 17:10:47,235 INFO L290 TraceCheckUtils]: 31: Hoare triple {5371#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5371#true} is VALID [2022-04-07 17:10:47,236 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {5371#true} {5388#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5388#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:10:47,236 INFO L290 TraceCheckUtils]: 33: Hoare triple {5388#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {5388#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:10:47,237 INFO L290 TraceCheckUtils]: 34: Hoare triple {5388#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {5393#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:10:47,237 INFO L290 TraceCheckUtils]: 35: Hoare triple {5393#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5393#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:10:47,237 INFO L272 TraceCheckUtils]: 36: Hoare triple {5393#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5371#true} is VALID [2022-04-07 17:10:47,237 INFO L290 TraceCheckUtils]: 37: Hoare triple {5371#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5371#true} is VALID [2022-04-07 17:10:47,237 INFO L290 TraceCheckUtils]: 38: Hoare triple {5371#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5371#true} is VALID [2022-04-07 17:10:47,238 INFO L290 TraceCheckUtils]: 39: Hoare triple {5371#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5371#true} is VALID [2022-04-07 17:10:47,238 INFO L284 TraceCheckUtils]: 40: Hoare quadruple {5371#true} {5393#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5393#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:10:47,238 INFO L290 TraceCheckUtils]: 41: Hoare triple {5393#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {5393#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:10:47,239 INFO L290 TraceCheckUtils]: 42: Hoare triple {5393#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {5398#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:10:47,240 INFO L290 TraceCheckUtils]: 43: Hoare triple {5398#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5398#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:10:47,240 INFO L272 TraceCheckUtils]: 44: Hoare triple {5398#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5371#true} is VALID [2022-04-07 17:10:47,240 INFO L290 TraceCheckUtils]: 45: Hoare triple {5371#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5371#true} is VALID [2022-04-07 17:10:47,240 INFO L290 TraceCheckUtils]: 46: Hoare triple {5371#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5371#true} is VALID [2022-04-07 17:10:47,240 INFO L290 TraceCheckUtils]: 47: Hoare triple {5371#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5371#true} is VALID [2022-04-07 17:10:47,241 INFO L284 TraceCheckUtils]: 48: Hoare quadruple {5371#true} {5398#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5398#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:10:47,241 INFO L290 TraceCheckUtils]: 49: Hoare triple {5398#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {5398#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:10:47,241 INFO L290 TraceCheckUtils]: 50: Hoare triple {5398#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {5403#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:10:47,242 INFO L290 TraceCheckUtils]: 51: Hoare triple {5403#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5404#(= |main_#t~mem5| 0)} is VALID [2022-04-07 17:10:47,242 INFO L272 TraceCheckUtils]: 52: Hoare triple {5404#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5405#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:10:47,243 INFO L290 TraceCheckUtils]: 53: Hoare triple {5405#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5406#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:10:47,243 INFO L290 TraceCheckUtils]: 54: Hoare triple {5406#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {5372#false} is VALID [2022-04-07 17:10:47,243 INFO L290 TraceCheckUtils]: 55: Hoare triple {5372#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5372#false} is VALID [2022-04-07 17:10:47,244 INFO L134 CoverageAnalysis]: Checked inductivity of 89 backedges. 8 proven. 57 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2022-04-07 17:10:47,244 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:10:47,244 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [953471501] [2022-04-07 17:10:47,244 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [953471501] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:10:47,244 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1821603439] [2022-04-07 17:10:47,244 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-07 17:10:47,244 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:10:47,245 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:10:47,247 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:10:47,276 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2022-04-07 17:10:47,326 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-07 17:10:47,326 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 17:10:47,327 INFO L263 TraceCheckSpWp]: Trace formula consists of 169 conjuncts, 22 conjunts are in the unsatisfiable core [2022-04-07 17:10:47,342 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:10:47,343 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:10:47,498 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-07 17:10:51,236 INFO L356 Elim1Store]: treesize reduction 13, result has 18.8 percent of original size [2022-04-07 17:10:51,236 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 10 [2022-04-07 17:10:51,322 INFO L272 TraceCheckUtils]: 0: Hoare triple {5371#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5371#true} is VALID [2022-04-07 17:10:51,322 INFO L290 TraceCheckUtils]: 1: Hoare triple {5371#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5371#true} is VALID [2022-04-07 17:10:51,322 INFO L290 TraceCheckUtils]: 2: Hoare triple {5371#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5371#true} is VALID [2022-04-07 17:10:51,322 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5371#true} {5371#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5371#true} is VALID [2022-04-07 17:10:51,322 INFO L272 TraceCheckUtils]: 4: Hoare triple {5371#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5371#true} is VALID [2022-04-07 17:10:51,322 INFO L290 TraceCheckUtils]: 5: Hoare triple {5371#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {5371#true} is VALID [2022-04-07 17:10:51,323 INFO L290 TraceCheckUtils]: 6: Hoare triple {5371#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {5429#(<= main_~i~0 0)} is VALID [2022-04-07 17:10:51,323 INFO L290 TraceCheckUtils]: 7: Hoare triple {5429#(<= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5429#(<= main_~i~0 0)} is VALID [2022-04-07 17:10:51,324 INFO L290 TraceCheckUtils]: 8: Hoare triple {5429#(<= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5436#(<= main_~i~0 1)} is VALID [2022-04-07 17:10:51,324 INFO L290 TraceCheckUtils]: 9: Hoare triple {5436#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5436#(<= main_~i~0 1)} is VALID [2022-04-07 17:10:51,324 INFO L290 TraceCheckUtils]: 10: Hoare triple {5436#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5443#(<= main_~i~0 2)} is VALID [2022-04-07 17:10:51,325 INFO L290 TraceCheckUtils]: 11: Hoare triple {5443#(<= main_~i~0 2)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5443#(<= main_~i~0 2)} is VALID [2022-04-07 17:10:51,325 INFO L290 TraceCheckUtils]: 12: Hoare triple {5443#(<= main_~i~0 2)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5450#(<= main_~i~0 3)} is VALID [2022-04-07 17:10:51,325 INFO L290 TraceCheckUtils]: 13: Hoare triple {5450#(<= main_~i~0 3)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5450#(<= main_~i~0 3)} is VALID [2022-04-07 17:10:51,326 INFO L290 TraceCheckUtils]: 14: Hoare triple {5450#(<= main_~i~0 3)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5457#(<= main_~i~0 4)} is VALID [2022-04-07 17:10:51,326 INFO L290 TraceCheckUtils]: 15: Hoare triple {5457#(<= main_~i~0 4)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {5461#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 4))} is VALID [2022-04-07 17:10:51,327 INFO L290 TraceCheckUtils]: 16: Hoare triple {5461#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 4))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {5465#(exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~i~0 (+ v_main_~i~0_79 1))))} is VALID [2022-04-07 17:10:51,328 INFO L290 TraceCheckUtils]: 17: Hoare triple {5465#(exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~i~0 (+ v_main_~i~0_79 1))))} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {5469#(exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1))))} is VALID [2022-04-07 17:10:51,328 INFO L290 TraceCheckUtils]: 18: Hoare triple {5469#(exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1))))} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {5473#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 0 main_~i~1))} is VALID [2022-04-07 17:10:51,329 INFO L290 TraceCheckUtils]: 19: Hoare triple {5473#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 0 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5473#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 0 main_~i~1))} is VALID [2022-04-07 17:10:51,332 INFO L272 TraceCheckUtils]: 20: Hoare triple {5473#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 0 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5480#(exists ((v_main_~x~0.base_BEFORE_CALL_23 Int) (v_main_~x~0.offset_BEFORE_CALL_23 Int) (v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_23) (+ (* v_main_~i~0_79 4) v_main_~x~0.offset_BEFORE_CALL_23)) 0)))} is VALID [2022-04-07 17:10:51,333 INFO L290 TraceCheckUtils]: 21: Hoare triple {5480#(exists ((v_main_~x~0.base_BEFORE_CALL_23 Int) (v_main_~x~0.offset_BEFORE_CALL_23 Int) (v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_23) (+ (* v_main_~i~0_79 4) v_main_~x~0.offset_BEFORE_CALL_23)) 0)))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5480#(exists ((v_main_~x~0.base_BEFORE_CALL_23 Int) (v_main_~x~0.offset_BEFORE_CALL_23 Int) (v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_23) (+ (* v_main_~i~0_79 4) v_main_~x~0.offset_BEFORE_CALL_23)) 0)))} is VALID [2022-04-07 17:10:51,333 INFO L290 TraceCheckUtils]: 22: Hoare triple {5480#(exists ((v_main_~x~0.base_BEFORE_CALL_23 Int) (v_main_~x~0.offset_BEFORE_CALL_23 Int) (v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_23) (+ (* v_main_~i~0_79 4) v_main_~x~0.offset_BEFORE_CALL_23)) 0)))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5480#(exists ((v_main_~x~0.base_BEFORE_CALL_23 Int) (v_main_~x~0.offset_BEFORE_CALL_23 Int) (v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_23) (+ (* v_main_~i~0_79 4) v_main_~x~0.offset_BEFORE_CALL_23)) 0)))} is VALID [2022-04-07 17:10:51,333 INFO L290 TraceCheckUtils]: 23: Hoare triple {5480#(exists ((v_main_~x~0.base_BEFORE_CALL_23 Int) (v_main_~x~0.offset_BEFORE_CALL_23 Int) (v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_23) (+ (* v_main_~i~0_79 4) v_main_~x~0.offset_BEFORE_CALL_23)) 0)))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5480#(exists ((v_main_~x~0.base_BEFORE_CALL_23 Int) (v_main_~x~0.offset_BEFORE_CALL_23 Int) (v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_23) (+ (* v_main_~i~0_79 4) v_main_~x~0.offset_BEFORE_CALL_23)) 0)))} is VALID [2022-04-07 17:10:51,334 INFO L284 TraceCheckUtils]: 24: Hoare quadruple {5480#(exists ((v_main_~x~0.base_BEFORE_CALL_23 Int) (v_main_~x~0.offset_BEFORE_CALL_23 Int) (v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_23) (+ (* v_main_~i~0_79 4) v_main_~x~0.offset_BEFORE_CALL_23)) 0)))} {5473#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 0 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5473#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 0 main_~i~1))} is VALID [2022-04-07 17:10:51,334 INFO L290 TraceCheckUtils]: 25: Hoare triple {5473#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 0 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {5473#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 0 main_~i~1))} is VALID [2022-04-07 17:10:51,335 INFO L290 TraceCheckUtils]: 26: Hoare triple {5473#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 0 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {5499#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 1 main_~i~1))} is VALID [2022-04-07 17:10:51,335 INFO L290 TraceCheckUtils]: 27: Hoare triple {5499#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 1 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5499#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 1 main_~i~1))} is VALID [2022-04-07 17:10:51,339 INFO L272 TraceCheckUtils]: 28: Hoare triple {5499#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 1 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5480#(exists ((v_main_~x~0.base_BEFORE_CALL_23 Int) (v_main_~x~0.offset_BEFORE_CALL_23 Int) (v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_23) (+ (* v_main_~i~0_79 4) v_main_~x~0.offset_BEFORE_CALL_23)) 0)))} is VALID [2022-04-07 17:10:51,339 INFO L290 TraceCheckUtils]: 29: Hoare triple {5480#(exists ((v_main_~x~0.base_BEFORE_CALL_23 Int) (v_main_~x~0.offset_BEFORE_CALL_23 Int) (v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_23) (+ (* v_main_~i~0_79 4) v_main_~x~0.offset_BEFORE_CALL_23)) 0)))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5480#(exists ((v_main_~x~0.base_BEFORE_CALL_23 Int) (v_main_~x~0.offset_BEFORE_CALL_23 Int) (v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_23) (+ (* v_main_~i~0_79 4) v_main_~x~0.offset_BEFORE_CALL_23)) 0)))} is VALID [2022-04-07 17:10:51,340 INFO L290 TraceCheckUtils]: 30: Hoare triple {5480#(exists ((v_main_~x~0.base_BEFORE_CALL_23 Int) (v_main_~x~0.offset_BEFORE_CALL_23 Int) (v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_23) (+ (* v_main_~i~0_79 4) v_main_~x~0.offset_BEFORE_CALL_23)) 0)))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5480#(exists ((v_main_~x~0.base_BEFORE_CALL_23 Int) (v_main_~x~0.offset_BEFORE_CALL_23 Int) (v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_23) (+ (* v_main_~i~0_79 4) v_main_~x~0.offset_BEFORE_CALL_23)) 0)))} is VALID [2022-04-07 17:10:51,340 INFO L290 TraceCheckUtils]: 31: Hoare triple {5480#(exists ((v_main_~x~0.base_BEFORE_CALL_23 Int) (v_main_~x~0.offset_BEFORE_CALL_23 Int) (v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_23) (+ (* v_main_~i~0_79 4) v_main_~x~0.offset_BEFORE_CALL_23)) 0)))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5480#(exists ((v_main_~x~0.base_BEFORE_CALL_23 Int) (v_main_~x~0.offset_BEFORE_CALL_23 Int) (v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_23) (+ (* v_main_~i~0_79 4) v_main_~x~0.offset_BEFORE_CALL_23)) 0)))} is VALID [2022-04-07 17:10:51,341 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {5480#(exists ((v_main_~x~0.base_BEFORE_CALL_23 Int) (v_main_~x~0.offset_BEFORE_CALL_23 Int) (v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_23) (+ (* v_main_~i~0_79 4) v_main_~x~0.offset_BEFORE_CALL_23)) 0)))} {5499#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 1 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5499#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 1 main_~i~1))} is VALID [2022-04-07 17:10:51,341 INFO L290 TraceCheckUtils]: 33: Hoare triple {5499#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 1 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {5499#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 1 main_~i~1))} is VALID [2022-04-07 17:10:51,342 INFO L290 TraceCheckUtils]: 34: Hoare triple {5499#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 1 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {5524#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 2 main_~i~1))} is VALID [2022-04-07 17:10:51,342 INFO L290 TraceCheckUtils]: 35: Hoare triple {5524#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 2 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5524#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 2 main_~i~1))} is VALID [2022-04-07 17:10:51,345 INFO L272 TraceCheckUtils]: 36: Hoare triple {5524#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 2 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5480#(exists ((v_main_~x~0.base_BEFORE_CALL_23 Int) (v_main_~x~0.offset_BEFORE_CALL_23 Int) (v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_23) (+ (* v_main_~i~0_79 4) v_main_~x~0.offset_BEFORE_CALL_23)) 0)))} is VALID [2022-04-07 17:10:51,345 INFO L290 TraceCheckUtils]: 37: Hoare triple {5480#(exists ((v_main_~x~0.base_BEFORE_CALL_23 Int) (v_main_~x~0.offset_BEFORE_CALL_23 Int) (v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_23) (+ (* v_main_~i~0_79 4) v_main_~x~0.offset_BEFORE_CALL_23)) 0)))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5480#(exists ((v_main_~x~0.base_BEFORE_CALL_23 Int) (v_main_~x~0.offset_BEFORE_CALL_23 Int) (v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_23) (+ (* v_main_~i~0_79 4) v_main_~x~0.offset_BEFORE_CALL_23)) 0)))} is VALID [2022-04-07 17:10:51,346 INFO L290 TraceCheckUtils]: 38: Hoare triple {5480#(exists ((v_main_~x~0.base_BEFORE_CALL_23 Int) (v_main_~x~0.offset_BEFORE_CALL_23 Int) (v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_23) (+ (* v_main_~i~0_79 4) v_main_~x~0.offset_BEFORE_CALL_23)) 0)))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5480#(exists ((v_main_~x~0.base_BEFORE_CALL_23 Int) (v_main_~x~0.offset_BEFORE_CALL_23 Int) (v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_23) (+ (* v_main_~i~0_79 4) v_main_~x~0.offset_BEFORE_CALL_23)) 0)))} is VALID [2022-04-07 17:10:51,346 INFO L290 TraceCheckUtils]: 39: Hoare triple {5480#(exists ((v_main_~x~0.base_BEFORE_CALL_23 Int) (v_main_~x~0.offset_BEFORE_CALL_23 Int) (v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_23) (+ (* v_main_~i~0_79 4) v_main_~x~0.offset_BEFORE_CALL_23)) 0)))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5480#(exists ((v_main_~x~0.base_BEFORE_CALL_23 Int) (v_main_~x~0.offset_BEFORE_CALL_23 Int) (v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_23) (+ (* v_main_~i~0_79 4) v_main_~x~0.offset_BEFORE_CALL_23)) 0)))} is VALID [2022-04-07 17:10:51,347 INFO L284 TraceCheckUtils]: 40: Hoare quadruple {5480#(exists ((v_main_~x~0.base_BEFORE_CALL_23 Int) (v_main_~x~0.offset_BEFORE_CALL_23 Int) (v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_23) (+ (* v_main_~i~0_79 4) v_main_~x~0.offset_BEFORE_CALL_23)) 0)))} {5524#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 2 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5524#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 2 main_~i~1))} is VALID [2022-04-07 17:10:51,347 INFO L290 TraceCheckUtils]: 41: Hoare triple {5524#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 2 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {5524#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 2 main_~i~1))} is VALID [2022-04-07 17:10:51,348 INFO L290 TraceCheckUtils]: 42: Hoare triple {5524#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 2 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {5549#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 3 main_~i~1))} is VALID [2022-04-07 17:10:51,348 INFO L290 TraceCheckUtils]: 43: Hoare triple {5549#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 3 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5549#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 3 main_~i~1))} is VALID [2022-04-07 17:10:51,351 INFO L272 TraceCheckUtils]: 44: Hoare triple {5549#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 3 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5480#(exists ((v_main_~x~0.base_BEFORE_CALL_23 Int) (v_main_~x~0.offset_BEFORE_CALL_23 Int) (v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_23) (+ (* v_main_~i~0_79 4) v_main_~x~0.offset_BEFORE_CALL_23)) 0)))} is VALID [2022-04-07 17:10:51,351 INFO L290 TraceCheckUtils]: 45: Hoare triple {5480#(exists ((v_main_~x~0.base_BEFORE_CALL_23 Int) (v_main_~x~0.offset_BEFORE_CALL_23 Int) (v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_23) (+ (* v_main_~i~0_79 4) v_main_~x~0.offset_BEFORE_CALL_23)) 0)))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5480#(exists ((v_main_~x~0.base_BEFORE_CALL_23 Int) (v_main_~x~0.offset_BEFORE_CALL_23 Int) (v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_23) (+ (* v_main_~i~0_79 4) v_main_~x~0.offset_BEFORE_CALL_23)) 0)))} is VALID [2022-04-07 17:10:51,351 INFO L290 TraceCheckUtils]: 46: Hoare triple {5480#(exists ((v_main_~x~0.base_BEFORE_CALL_23 Int) (v_main_~x~0.offset_BEFORE_CALL_23 Int) (v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_23) (+ (* v_main_~i~0_79 4) v_main_~x~0.offset_BEFORE_CALL_23)) 0)))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5480#(exists ((v_main_~x~0.base_BEFORE_CALL_23 Int) (v_main_~x~0.offset_BEFORE_CALL_23 Int) (v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_23) (+ (* v_main_~i~0_79 4) v_main_~x~0.offset_BEFORE_CALL_23)) 0)))} is VALID [2022-04-07 17:10:51,352 INFO L290 TraceCheckUtils]: 47: Hoare triple {5480#(exists ((v_main_~x~0.base_BEFORE_CALL_23 Int) (v_main_~x~0.offset_BEFORE_CALL_23 Int) (v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_23) (+ (* v_main_~i~0_79 4) v_main_~x~0.offset_BEFORE_CALL_23)) 0)))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5480#(exists ((v_main_~x~0.base_BEFORE_CALL_23 Int) (v_main_~x~0.offset_BEFORE_CALL_23 Int) (v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_23) (+ (* v_main_~i~0_79 4) v_main_~x~0.offset_BEFORE_CALL_23)) 0)))} is VALID [2022-04-07 17:10:51,352 INFO L284 TraceCheckUtils]: 48: Hoare quadruple {5480#(exists ((v_main_~x~0.base_BEFORE_CALL_23 Int) (v_main_~x~0.offset_BEFORE_CALL_23 Int) (v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_23) (+ (* v_main_~i~0_79 4) v_main_~x~0.offset_BEFORE_CALL_23)) 0)))} {5549#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 3 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5549#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 3 main_~i~1))} is VALID [2022-04-07 17:10:51,353 INFO L290 TraceCheckUtils]: 49: Hoare triple {5549#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 3 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {5549#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 3 main_~i~1))} is VALID [2022-04-07 17:10:51,353 INFO L290 TraceCheckUtils]: 50: Hoare triple {5549#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 3 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {5574#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 4 main_~i~1))} is VALID [2022-04-07 17:10:51,354 INFO L290 TraceCheckUtils]: 51: Hoare triple {5574#(and (exists ((v_main_~i~0_79 Int)) (and (<= v_main_~i~0_79 4) (= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_79 4)))) (<= main_~n~0 (+ v_main_~i~0_79 1)))) (<= 4 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {5404#(= |main_#t~mem5| 0)} is VALID [2022-04-07 17:10:51,354 INFO L272 TraceCheckUtils]: 52: Hoare triple {5404#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {5581#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:10:51,355 INFO L290 TraceCheckUtils]: 53: Hoare triple {5581#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5585#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:10:51,355 INFO L290 TraceCheckUtils]: 54: Hoare triple {5585#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {5372#false} is VALID [2022-04-07 17:10:51,355 INFO L290 TraceCheckUtils]: 55: Hoare triple {5372#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5372#false} is VALID [2022-04-07 17:10:51,356 INFO L134 CoverageAnalysis]: Checked inductivity of 89 backedges. 28 proven. 37 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2022-04-07 17:10:51,356 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 17:10:51,641 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1821603439] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:10:51,641 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-04-07 17:10:51,641 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 19] total 34 [2022-04-07 17:10:51,641 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [119355216] [2022-04-07 17:10:51,641 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-04-07 17:10:51,642 INFO L78 Accepts]: Start accepts. Automaton has has 34 states, 33 states have (on average 2.0303030303030303) internal successors, (67), 31 states have internal predecessors, (67), 10 states have call successors, (13), 5 states have call predecessors, (13), 2 states have return successors, (9), 9 states have call predecessors, (9), 9 states have call successors, (9) Word has length 56 [2022-04-07 17:10:51,642 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:10:51,642 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 34 states, 33 states have (on average 2.0303030303030303) internal successors, (67), 31 states have internal predecessors, (67), 10 states have call successors, (13), 5 states have call predecessors, (13), 2 states have return successors, (9), 9 states have call predecessors, (9), 9 states have call successors, (9) [2022-04-07 17:10:51,744 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 89 edges. 89 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:10:51,745 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 34 states [2022-04-07 17:10:51,745 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:10:51,747 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2022-04-07 17:10:51,748 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=138, Invalid=1122, Unknown=0, NotChecked=0, Total=1260 [2022-04-07 17:10:51,748 INFO L87 Difference]: Start difference. First operand 76 states and 81 transitions. Second operand has 34 states, 33 states have (on average 2.0303030303030303) internal successors, (67), 31 states have internal predecessors, (67), 10 states have call successors, (13), 5 states have call predecessors, (13), 2 states have return successors, (9), 9 states have call predecessors, (9), 9 states have call successors, (9) [2022-04-07 17:10:52,712 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:10:52,712 INFO L93 Difference]: Finished difference Result 118 states and 123 transitions. [2022-04-07 17:10:52,712 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2022-04-07 17:10:52,713 INFO L78 Accepts]: Start accepts. Automaton has has 34 states, 33 states have (on average 2.0303030303030303) internal successors, (67), 31 states have internal predecessors, (67), 10 states have call successors, (13), 5 states have call predecessors, (13), 2 states have return successors, (9), 9 states have call predecessors, (9), 9 states have call successors, (9) Word has length 56 [2022-04-07 17:10:52,713 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:10:52,713 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 33 states have (on average 2.0303030303030303) internal successors, (67), 31 states have internal predecessors, (67), 10 states have call successors, (13), 5 states have call predecessors, (13), 2 states have return successors, (9), 9 states have call predecessors, (9), 9 states have call successors, (9) [2022-04-07 17:10:52,716 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 66 transitions. [2022-04-07 17:10:52,716 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 33 states have (on average 2.0303030303030303) internal successors, (67), 31 states have internal predecessors, (67), 10 states have call successors, (13), 5 states have call predecessors, (13), 2 states have return successors, (9), 9 states have call predecessors, (9), 9 states have call successors, (9) [2022-04-07 17:10:52,718 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 66 transitions. [2022-04-07 17:10:52,718 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 27 states and 66 transitions. [2022-04-07 17:10:57,809 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 66 edges. 64 inductive. 0 not inductive. 2 times theorem prover too weak to decide inductivity. [2022-04-07 17:10:57,810 INFO L225 Difference]: With dead ends: 118 [2022-04-07 17:10:57,810 INFO L226 Difference]: Without dead ends: 76 [2022-04-07 17:10:57,811 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 118 GetRequests, 56 SyntacticMatches, 8 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 679 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=301, Invalid=2779, Unknown=0, NotChecked=0, Total=3080 [2022-04-07 17:10:57,811 INFO L913 BasicCegarLoop]: 29 mSDtfsCounter, 20 mSDsluCounter, 293 mSDsCounter, 0 mSdLazyCounter, 326 mSolverCounterSat, 12 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 21 SdHoareTripleChecker+Valid, 322 SdHoareTripleChecker+Invalid, 521 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 12 IncrementalHoareTripleChecker+Valid, 326 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 183 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-07 17:10:57,812 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [21 Valid, 322 Invalid, 521 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [12 Valid, 326 Invalid, 0 Unknown, 183 Unchecked, 0.2s Time] [2022-04-07 17:10:57,812 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76 states. [2022-04-07 17:10:57,815 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76 to 76. [2022-04-07 17:10:57,815 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:10:57,815 INFO L82 GeneralOperation]: Start isEquivalent. First operand 76 states. Second operand has 76 states, 59 states have (on average 1.0677966101694916) internal successors, (63), 61 states have internal predecessors, (63), 9 states have call successors, (9), 8 states have call predecessors, (9), 7 states have return successors, (8), 6 states have call predecessors, (8), 8 states have call successors, (8) [2022-04-07 17:10:57,815 INFO L74 IsIncluded]: Start isIncluded. First operand 76 states. Second operand has 76 states, 59 states have (on average 1.0677966101694916) internal successors, (63), 61 states have internal predecessors, (63), 9 states have call successors, (9), 8 states have call predecessors, (9), 7 states have return successors, (8), 6 states have call predecessors, (8), 8 states have call successors, (8) [2022-04-07 17:10:57,815 INFO L87 Difference]: Start difference. First operand 76 states. Second operand has 76 states, 59 states have (on average 1.0677966101694916) internal successors, (63), 61 states have internal predecessors, (63), 9 states have call successors, (9), 8 states have call predecessors, (9), 7 states have return successors, (8), 6 states have call predecessors, (8), 8 states have call successors, (8) [2022-04-07 17:10:57,817 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:10:57,817 INFO L93 Difference]: Finished difference Result 76 states and 80 transitions. [2022-04-07 17:10:57,817 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states and 80 transitions. [2022-04-07 17:10:57,817 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:10:57,817 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:10:57,818 INFO L74 IsIncluded]: Start isIncluded. First operand has 76 states, 59 states have (on average 1.0677966101694916) internal successors, (63), 61 states have internal predecessors, (63), 9 states have call successors, (9), 8 states have call predecessors, (9), 7 states have return successors, (8), 6 states have call predecessors, (8), 8 states have call successors, (8) Second operand 76 states. [2022-04-07 17:10:57,818 INFO L87 Difference]: Start difference. First operand has 76 states, 59 states have (on average 1.0677966101694916) internal successors, (63), 61 states have internal predecessors, (63), 9 states have call successors, (9), 8 states have call predecessors, (9), 7 states have return successors, (8), 6 states have call predecessors, (8), 8 states have call successors, (8) Second operand 76 states. [2022-04-07 17:10:57,819 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:10:57,819 INFO L93 Difference]: Finished difference Result 76 states and 80 transitions. [2022-04-07 17:10:57,819 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states and 80 transitions. [2022-04-07 17:10:57,819 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:10:57,820 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:10:57,820 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:10:57,820 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:10:57,820 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 76 states, 59 states have (on average 1.0677966101694916) internal successors, (63), 61 states have internal predecessors, (63), 9 states have call successors, (9), 8 states have call predecessors, (9), 7 states have return successors, (8), 6 states have call predecessors, (8), 8 states have call successors, (8) [2022-04-07 17:10:57,821 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76 states to 76 states and 80 transitions. [2022-04-07 17:10:57,821 INFO L78 Accepts]: Start accepts. Automaton has 76 states and 80 transitions. Word has length 56 [2022-04-07 17:10:57,821 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:10:57,821 INFO L478 AbstractCegarLoop]: Abstraction has 76 states and 80 transitions. [2022-04-07 17:10:57,822 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 34 states, 33 states have (on average 2.0303030303030303) internal successors, (67), 31 states have internal predecessors, (67), 10 states have call successors, (13), 5 states have call predecessors, (13), 2 states have return successors, (9), 9 states have call predecessors, (9), 9 states have call successors, (9) [2022-04-07 17:10:57,822 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states and 80 transitions. [2022-04-07 17:10:57,822 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2022-04-07 17:10:57,822 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:10:57,822 INFO L499 BasicCegarLoop]: trace histogram [6, 6, 5, 5, 5, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:10:57,844 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Forceful destruction successful, exit code 0 [2022-04-07 17:10:58,035 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable12 [2022-04-07 17:10:58,035 INFO L403 AbstractCegarLoop]: === Iteration 14 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:10:58,036 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:10:58,036 INFO L85 PathProgramCache]: Analyzing trace with hash -920591757, now seen corresponding path program 11 times [2022-04-07 17:10:58,036 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:10:58,036 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2064833251] [2022-04-07 17:10:58,036 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:10:58,036 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:10:58,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:10:58,284 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:10:58,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:10:58,287 INFO L290 TraceCheckUtils]: 0: Hoare triple {6048#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6011#true} is VALID [2022-04-07 17:10:58,288 INFO L290 TraceCheckUtils]: 1: Hoare triple {6011#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-07 17:10:58,288 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {6011#true} {6011#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-07 17:10:58,288 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 22 [2022-04-07 17:10:58,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:10:58,291 INFO L290 TraceCheckUtils]: 0: Hoare triple {6011#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6011#true} is VALID [2022-04-07 17:10:58,291 INFO L290 TraceCheckUtils]: 1: Hoare triple {6011#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-07 17:10:58,291 INFO L290 TraceCheckUtils]: 2: Hoare triple {6011#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-07 17:10:58,292 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6011#true} {6024#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6024#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:10:58,292 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 30 [2022-04-07 17:10:58,293 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:10:58,295 INFO L290 TraceCheckUtils]: 0: Hoare triple {6011#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6011#true} is VALID [2022-04-07 17:10:58,295 INFO L290 TraceCheckUtils]: 1: Hoare triple {6011#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-07 17:10:58,295 INFO L290 TraceCheckUtils]: 2: Hoare triple {6011#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-07 17:10:58,296 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6011#true} {6029#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6029#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:10:58,296 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 38 [2022-04-07 17:10:58,296 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:10:58,298 INFO L290 TraceCheckUtils]: 0: Hoare triple {6011#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6011#true} is VALID [2022-04-07 17:10:58,298 INFO L290 TraceCheckUtils]: 1: Hoare triple {6011#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-07 17:10:58,298 INFO L290 TraceCheckUtils]: 2: Hoare triple {6011#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-07 17:10:58,299 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6011#true} {6034#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6034#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:10:58,299 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 46 [2022-04-07 17:10:58,300 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:10:58,302 INFO L290 TraceCheckUtils]: 0: Hoare triple {6011#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6011#true} is VALID [2022-04-07 17:10:58,302 INFO L290 TraceCheckUtils]: 1: Hoare triple {6011#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-07 17:10:58,303 INFO L290 TraceCheckUtils]: 2: Hoare triple {6011#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-07 17:10:58,303 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6011#true} {6039#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6039#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:10:58,304 INFO L272 TraceCheckUtils]: 0: Hoare triple {6011#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6048#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:10:58,304 INFO L290 TraceCheckUtils]: 1: Hoare triple {6048#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6011#true} is VALID [2022-04-07 17:10:58,304 INFO L290 TraceCheckUtils]: 2: Hoare triple {6011#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-07 17:10:58,304 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6011#true} {6011#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-07 17:10:58,304 INFO L272 TraceCheckUtils]: 4: Hoare triple {6011#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-07 17:10:58,304 INFO L290 TraceCheckUtils]: 5: Hoare triple {6011#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {6011#true} is VALID [2022-04-07 17:10:58,305 INFO L290 TraceCheckUtils]: 6: Hoare triple {6011#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {6016#(= main_~i~0 0)} is VALID [2022-04-07 17:10:58,305 INFO L290 TraceCheckUtils]: 7: Hoare triple {6016#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6016#(= main_~i~0 0)} is VALID [2022-04-07 17:10:58,306 INFO L290 TraceCheckUtils]: 8: Hoare triple {6016#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6017#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:10:58,306 INFO L290 TraceCheckUtils]: 9: Hoare triple {6017#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6017#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:10:58,307 INFO L290 TraceCheckUtils]: 10: Hoare triple {6017#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6018#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:10:58,307 INFO L290 TraceCheckUtils]: 11: Hoare triple {6018#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6018#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:10:58,308 INFO L290 TraceCheckUtils]: 12: Hoare triple {6018#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6019#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 17:10:58,308 INFO L290 TraceCheckUtils]: 13: Hoare triple {6019#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6019#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 17:10:58,309 INFO L290 TraceCheckUtils]: 14: Hoare triple {6019#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6020#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 17:10:58,310 INFO L290 TraceCheckUtils]: 15: Hoare triple {6020#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6021#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 17:10:58,311 INFO L290 TraceCheckUtils]: 16: Hoare triple {6021#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6022#(and (not (= (+ main_~x~0.offset 16) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-07 17:10:58,311 INFO L290 TraceCheckUtils]: 17: Hoare triple {6022#(and (not (= (+ main_~x~0.offset 16) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6023#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-07 17:10:58,312 INFO L290 TraceCheckUtils]: 18: Hoare triple {6023#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6023#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-07 17:10:58,312 INFO L290 TraceCheckUtils]: 19: Hoare triple {6023#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {6023#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-07 17:10:58,313 INFO L290 TraceCheckUtils]: 20: Hoare triple {6023#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {6024#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:10:58,313 INFO L290 TraceCheckUtils]: 21: Hoare triple {6024#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6024#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:10:58,313 INFO L272 TraceCheckUtils]: 22: Hoare triple {6024#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6011#true} is VALID [2022-04-07 17:10:58,314 INFO L290 TraceCheckUtils]: 23: Hoare triple {6011#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6011#true} is VALID [2022-04-07 17:10:58,314 INFO L290 TraceCheckUtils]: 24: Hoare triple {6011#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-07 17:10:58,314 INFO L290 TraceCheckUtils]: 25: Hoare triple {6011#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-07 17:10:58,315 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {6011#true} {6024#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6024#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:10:58,315 INFO L290 TraceCheckUtils]: 27: Hoare triple {6024#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6024#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:10:58,316 INFO L290 TraceCheckUtils]: 28: Hoare triple {6024#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6029#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:10:58,316 INFO L290 TraceCheckUtils]: 29: Hoare triple {6029#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6029#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:10:58,316 INFO L272 TraceCheckUtils]: 30: Hoare triple {6029#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6011#true} is VALID [2022-04-07 17:10:58,316 INFO L290 TraceCheckUtils]: 31: Hoare triple {6011#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6011#true} is VALID [2022-04-07 17:10:58,316 INFO L290 TraceCheckUtils]: 32: Hoare triple {6011#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-07 17:10:58,317 INFO L290 TraceCheckUtils]: 33: Hoare triple {6011#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-07 17:10:58,317 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {6011#true} {6029#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6029#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:10:58,318 INFO L290 TraceCheckUtils]: 35: Hoare triple {6029#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6029#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:10:58,319 INFO L290 TraceCheckUtils]: 36: Hoare triple {6029#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6034#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:10:58,319 INFO L290 TraceCheckUtils]: 37: Hoare triple {6034#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6034#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:10:58,319 INFO L272 TraceCheckUtils]: 38: Hoare triple {6034#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6011#true} is VALID [2022-04-07 17:10:58,319 INFO L290 TraceCheckUtils]: 39: Hoare triple {6011#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6011#true} is VALID [2022-04-07 17:10:58,319 INFO L290 TraceCheckUtils]: 40: Hoare triple {6011#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-07 17:10:58,319 INFO L290 TraceCheckUtils]: 41: Hoare triple {6011#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-07 17:10:58,320 INFO L284 TraceCheckUtils]: 42: Hoare quadruple {6011#true} {6034#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6034#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:10:58,321 INFO L290 TraceCheckUtils]: 43: Hoare triple {6034#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6034#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:10:58,321 INFO L290 TraceCheckUtils]: 44: Hoare triple {6034#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6039#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:10:58,322 INFO L290 TraceCheckUtils]: 45: Hoare triple {6039#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6039#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:10:58,322 INFO L272 TraceCheckUtils]: 46: Hoare triple {6039#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6011#true} is VALID [2022-04-07 17:10:58,322 INFO L290 TraceCheckUtils]: 47: Hoare triple {6011#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6011#true} is VALID [2022-04-07 17:10:58,322 INFO L290 TraceCheckUtils]: 48: Hoare triple {6011#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-07 17:10:58,322 INFO L290 TraceCheckUtils]: 49: Hoare triple {6011#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-07 17:10:58,323 INFO L284 TraceCheckUtils]: 50: Hoare quadruple {6011#true} {6039#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6039#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:10:58,323 INFO L290 TraceCheckUtils]: 51: Hoare triple {6039#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6039#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:10:58,324 INFO L290 TraceCheckUtils]: 52: Hoare triple {6039#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6044#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:10:58,325 INFO L290 TraceCheckUtils]: 53: Hoare triple {6044#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6045#(= |main_#t~mem5| 0)} is VALID [2022-04-07 17:10:58,325 INFO L272 TraceCheckUtils]: 54: Hoare triple {6045#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6046#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:10:58,326 INFO L290 TraceCheckUtils]: 55: Hoare triple {6046#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6047#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:10:58,326 INFO L290 TraceCheckUtils]: 56: Hoare triple {6047#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {6012#false} is VALID [2022-04-07 17:10:58,326 INFO L290 TraceCheckUtils]: 57: Hoare triple {6012#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6012#false} is VALID [2022-04-07 17:10:58,326 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 8 proven. 68 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2022-04-07 17:10:58,327 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:10:58,327 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2064833251] [2022-04-07 17:10:58,327 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2064833251] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:10:58,327 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1600503506] [2022-04-07 17:10:58,327 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-04-07 17:10:58,327 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:10:58,327 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:10:58,328 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:10:58,354 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2022-04-07 17:10:58,406 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 7 check-sat command(s) [2022-04-07 17:10:58,406 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 17:10:58,407 INFO L263 TraceCheckSpWp]: Trace formula consists of 176 conjuncts, 32 conjunts are in the unsatisfiable core [2022-04-07 17:10:58,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:10:58,422 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:10:58,505 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-07 17:10:58,737 INFO L356 Elim1Store]: treesize reduction 37, result has 22.9 percent of original size [2022-04-07 17:10:58,737 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 27 treesize of output 26 [2022-04-07 17:11:28,139 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2022-04-07 17:11:28,189 INFO L272 TraceCheckUtils]: 0: Hoare triple {6011#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-07 17:11:28,190 INFO L290 TraceCheckUtils]: 1: Hoare triple {6011#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6011#true} is VALID [2022-04-07 17:11:28,190 INFO L290 TraceCheckUtils]: 2: Hoare triple {6011#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-07 17:11:28,190 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6011#true} {6011#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-07 17:11:28,190 INFO L272 TraceCheckUtils]: 4: Hoare triple {6011#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-07 17:11:28,190 INFO L290 TraceCheckUtils]: 5: Hoare triple {6011#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {6011#true} is VALID [2022-04-07 17:11:28,190 INFO L290 TraceCheckUtils]: 6: Hoare triple {6011#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {6016#(= main_~i~0 0)} is VALID [2022-04-07 17:11:28,190 INFO L290 TraceCheckUtils]: 7: Hoare triple {6016#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6016#(= main_~i~0 0)} is VALID [2022-04-07 17:11:28,191 INFO L290 TraceCheckUtils]: 8: Hoare triple {6016#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6017#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:11:28,192 INFO L290 TraceCheckUtils]: 9: Hoare triple {6017#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6017#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:11:28,192 INFO L290 TraceCheckUtils]: 10: Hoare triple {6017#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6018#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:11:28,193 INFO L290 TraceCheckUtils]: 11: Hoare triple {6018#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6018#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:11:28,193 INFO L290 TraceCheckUtils]: 12: Hoare triple {6018#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6019#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 17:11:28,194 INFO L290 TraceCheckUtils]: 13: Hoare triple {6019#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6019#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 17:11:28,194 INFO L290 TraceCheckUtils]: 14: Hoare triple {6019#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6020#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 17:11:28,195 INFO L290 TraceCheckUtils]: 15: Hoare triple {6020#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6021#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 17:11:28,196 INFO L290 TraceCheckUtils]: 16: Hoare triple {6021#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6100#(exists ((v_main_~i~0_84 Int)) (and (<= 4 v_main_~i~0_84) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_84 4))) 0) (<= (+ v_main_~i~0_84 1) main_~i~0) (<= v_main_~i~0_84 4)))} is VALID [2022-04-07 17:11:28,197 INFO L290 TraceCheckUtils]: 17: Hoare triple {6100#(exists ((v_main_~i~0_84 Int)) (and (<= 4 v_main_~i~0_84) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* v_main_~i~0_84 4))) 0) (<= (+ v_main_~i~0_84 1) main_~i~0) (<= v_main_~i~0_84 4)))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6023#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-07 17:11:28,197 INFO L290 TraceCheckUtils]: 18: Hoare triple {6023#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6023#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-07 17:11:28,198 INFO L290 TraceCheckUtils]: 19: Hoare triple {6023#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {6023#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-07 17:11:28,198 INFO L290 TraceCheckUtils]: 20: Hoare triple {6023#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {6024#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:11:28,198 INFO L290 TraceCheckUtils]: 21: Hoare triple {6024#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6024#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:11:28,199 INFO L272 TraceCheckUtils]: 22: Hoare triple {6024#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6119#(exists ((v_main_~x~0.base_BEFORE_CALL_27 Int) (v_main_~x~0.offset_BEFORE_CALL_27 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_27) (+ 16 v_main_~x~0.offset_BEFORE_CALL_27)) 0))} is VALID [2022-04-07 17:11:28,199 INFO L290 TraceCheckUtils]: 23: Hoare triple {6119#(exists ((v_main_~x~0.base_BEFORE_CALL_27 Int) (v_main_~x~0.offset_BEFORE_CALL_27 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_27) (+ 16 v_main_~x~0.offset_BEFORE_CALL_27)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6119#(exists ((v_main_~x~0.base_BEFORE_CALL_27 Int) (v_main_~x~0.offset_BEFORE_CALL_27 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_27) (+ 16 v_main_~x~0.offset_BEFORE_CALL_27)) 0))} is VALID [2022-04-07 17:11:28,200 INFO L290 TraceCheckUtils]: 24: Hoare triple {6119#(exists ((v_main_~x~0.base_BEFORE_CALL_27 Int) (v_main_~x~0.offset_BEFORE_CALL_27 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_27) (+ 16 v_main_~x~0.offset_BEFORE_CALL_27)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6119#(exists ((v_main_~x~0.base_BEFORE_CALL_27 Int) (v_main_~x~0.offset_BEFORE_CALL_27 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_27) (+ 16 v_main_~x~0.offset_BEFORE_CALL_27)) 0))} is VALID [2022-04-07 17:11:28,200 INFO L290 TraceCheckUtils]: 25: Hoare triple {6119#(exists ((v_main_~x~0.base_BEFORE_CALL_27 Int) (v_main_~x~0.offset_BEFORE_CALL_27 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_27) (+ 16 v_main_~x~0.offset_BEFORE_CALL_27)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6119#(exists ((v_main_~x~0.base_BEFORE_CALL_27 Int) (v_main_~x~0.offset_BEFORE_CALL_27 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_27) (+ 16 v_main_~x~0.offset_BEFORE_CALL_27)) 0))} is VALID [2022-04-07 17:11:28,201 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {6119#(exists ((v_main_~x~0.base_BEFORE_CALL_27 Int) (v_main_~x~0.offset_BEFORE_CALL_27 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_27) (+ 16 v_main_~x~0.offset_BEFORE_CALL_27)) 0))} {6024#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6024#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:11:28,201 INFO L290 TraceCheckUtils]: 27: Hoare triple {6024#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6024#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:11:28,201 INFO L290 TraceCheckUtils]: 28: Hoare triple {6024#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6138#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-07 17:11:28,202 INFO L290 TraceCheckUtils]: 29: Hoare triple {6138#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6138#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-07 17:11:28,203 INFO L272 TraceCheckUtils]: 30: Hoare triple {6138#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6119#(exists ((v_main_~x~0.base_BEFORE_CALL_27 Int) (v_main_~x~0.offset_BEFORE_CALL_27 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_27) (+ 16 v_main_~x~0.offset_BEFORE_CALL_27)) 0))} is VALID [2022-04-07 17:11:28,203 INFO L290 TraceCheckUtils]: 31: Hoare triple {6119#(exists ((v_main_~x~0.base_BEFORE_CALL_27 Int) (v_main_~x~0.offset_BEFORE_CALL_27 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_27) (+ 16 v_main_~x~0.offset_BEFORE_CALL_27)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6119#(exists ((v_main_~x~0.base_BEFORE_CALL_27 Int) (v_main_~x~0.offset_BEFORE_CALL_27 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_27) (+ 16 v_main_~x~0.offset_BEFORE_CALL_27)) 0))} is VALID [2022-04-07 17:11:28,203 INFO L290 TraceCheckUtils]: 32: Hoare triple {6119#(exists ((v_main_~x~0.base_BEFORE_CALL_27 Int) (v_main_~x~0.offset_BEFORE_CALL_27 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_27) (+ 16 v_main_~x~0.offset_BEFORE_CALL_27)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6119#(exists ((v_main_~x~0.base_BEFORE_CALL_27 Int) (v_main_~x~0.offset_BEFORE_CALL_27 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_27) (+ 16 v_main_~x~0.offset_BEFORE_CALL_27)) 0))} is VALID [2022-04-07 17:11:28,203 INFO L290 TraceCheckUtils]: 33: Hoare triple {6119#(exists ((v_main_~x~0.base_BEFORE_CALL_27 Int) (v_main_~x~0.offset_BEFORE_CALL_27 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_27) (+ 16 v_main_~x~0.offset_BEFORE_CALL_27)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6119#(exists ((v_main_~x~0.base_BEFORE_CALL_27 Int) (v_main_~x~0.offset_BEFORE_CALL_27 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_27) (+ 16 v_main_~x~0.offset_BEFORE_CALL_27)) 0))} is VALID [2022-04-07 17:11:28,204 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {6119#(exists ((v_main_~x~0.base_BEFORE_CALL_27 Int) (v_main_~x~0.offset_BEFORE_CALL_27 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_27) (+ 16 v_main_~x~0.offset_BEFORE_CALL_27)) 0))} {6138#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6138#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-07 17:11:28,204 INFO L290 TraceCheckUtils]: 35: Hoare triple {6138#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6138#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-07 17:11:28,205 INFO L290 TraceCheckUtils]: 36: Hoare triple {6138#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6163#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-07 17:11:28,205 INFO L290 TraceCheckUtils]: 37: Hoare triple {6163#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6163#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-07 17:11:28,206 INFO L272 TraceCheckUtils]: 38: Hoare triple {6163#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6119#(exists ((v_main_~x~0.base_BEFORE_CALL_27 Int) (v_main_~x~0.offset_BEFORE_CALL_27 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_27) (+ 16 v_main_~x~0.offset_BEFORE_CALL_27)) 0))} is VALID [2022-04-07 17:11:28,206 INFO L290 TraceCheckUtils]: 39: Hoare triple {6119#(exists ((v_main_~x~0.base_BEFORE_CALL_27 Int) (v_main_~x~0.offset_BEFORE_CALL_27 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_27) (+ 16 v_main_~x~0.offset_BEFORE_CALL_27)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6119#(exists ((v_main_~x~0.base_BEFORE_CALL_27 Int) (v_main_~x~0.offset_BEFORE_CALL_27 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_27) (+ 16 v_main_~x~0.offset_BEFORE_CALL_27)) 0))} is VALID [2022-04-07 17:11:28,207 INFO L290 TraceCheckUtils]: 40: Hoare triple {6119#(exists ((v_main_~x~0.base_BEFORE_CALL_27 Int) (v_main_~x~0.offset_BEFORE_CALL_27 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_27) (+ 16 v_main_~x~0.offset_BEFORE_CALL_27)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6119#(exists ((v_main_~x~0.base_BEFORE_CALL_27 Int) (v_main_~x~0.offset_BEFORE_CALL_27 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_27) (+ 16 v_main_~x~0.offset_BEFORE_CALL_27)) 0))} is VALID [2022-04-07 17:11:28,207 INFO L290 TraceCheckUtils]: 41: Hoare triple {6119#(exists ((v_main_~x~0.base_BEFORE_CALL_27 Int) (v_main_~x~0.offset_BEFORE_CALL_27 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_27) (+ 16 v_main_~x~0.offset_BEFORE_CALL_27)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6119#(exists ((v_main_~x~0.base_BEFORE_CALL_27 Int) (v_main_~x~0.offset_BEFORE_CALL_27 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_27) (+ 16 v_main_~x~0.offset_BEFORE_CALL_27)) 0))} is VALID [2022-04-07 17:11:28,207 INFO L284 TraceCheckUtils]: 42: Hoare quadruple {6119#(exists ((v_main_~x~0.base_BEFORE_CALL_27 Int) (v_main_~x~0.offset_BEFORE_CALL_27 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_27) (+ 16 v_main_~x~0.offset_BEFORE_CALL_27)) 0))} {6163#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6163#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-07 17:11:28,208 INFO L290 TraceCheckUtils]: 43: Hoare triple {6163#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6163#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-07 17:11:28,208 INFO L290 TraceCheckUtils]: 44: Hoare triple {6163#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6188#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= (+ main_~i~1 (- 3)) 0))} is VALID [2022-04-07 17:11:28,209 INFO L290 TraceCheckUtils]: 45: Hoare triple {6188#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= (+ main_~i~1 (- 3)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6188#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= (+ main_~i~1 (- 3)) 0))} is VALID [2022-04-07 17:11:28,209 INFO L272 TraceCheckUtils]: 46: Hoare triple {6188#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= (+ main_~i~1 (- 3)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6119#(exists ((v_main_~x~0.base_BEFORE_CALL_27 Int) (v_main_~x~0.offset_BEFORE_CALL_27 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_27) (+ 16 v_main_~x~0.offset_BEFORE_CALL_27)) 0))} is VALID [2022-04-07 17:11:28,210 INFO L290 TraceCheckUtils]: 47: Hoare triple {6119#(exists ((v_main_~x~0.base_BEFORE_CALL_27 Int) (v_main_~x~0.offset_BEFORE_CALL_27 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_27) (+ 16 v_main_~x~0.offset_BEFORE_CALL_27)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6119#(exists ((v_main_~x~0.base_BEFORE_CALL_27 Int) (v_main_~x~0.offset_BEFORE_CALL_27 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_27) (+ 16 v_main_~x~0.offset_BEFORE_CALL_27)) 0))} is VALID [2022-04-07 17:11:28,210 INFO L290 TraceCheckUtils]: 48: Hoare triple {6119#(exists ((v_main_~x~0.base_BEFORE_CALL_27 Int) (v_main_~x~0.offset_BEFORE_CALL_27 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_27) (+ 16 v_main_~x~0.offset_BEFORE_CALL_27)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6119#(exists ((v_main_~x~0.base_BEFORE_CALL_27 Int) (v_main_~x~0.offset_BEFORE_CALL_27 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_27) (+ 16 v_main_~x~0.offset_BEFORE_CALL_27)) 0))} is VALID [2022-04-07 17:11:28,210 INFO L290 TraceCheckUtils]: 49: Hoare triple {6119#(exists ((v_main_~x~0.base_BEFORE_CALL_27 Int) (v_main_~x~0.offset_BEFORE_CALL_27 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_27) (+ 16 v_main_~x~0.offset_BEFORE_CALL_27)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6119#(exists ((v_main_~x~0.base_BEFORE_CALL_27 Int) (v_main_~x~0.offset_BEFORE_CALL_27 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_27) (+ 16 v_main_~x~0.offset_BEFORE_CALL_27)) 0))} is VALID [2022-04-07 17:11:28,211 INFO L284 TraceCheckUtils]: 50: Hoare quadruple {6119#(exists ((v_main_~x~0.base_BEFORE_CALL_27 Int) (v_main_~x~0.offset_BEFORE_CALL_27 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_27) (+ 16 v_main_~x~0.offset_BEFORE_CALL_27)) 0))} {6188#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= (+ main_~i~1 (- 3)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6188#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= (+ main_~i~1 (- 3)) 0))} is VALID [2022-04-07 17:11:28,211 INFO L290 TraceCheckUtils]: 51: Hoare triple {6188#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= (+ main_~i~1 (- 3)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6188#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= (+ main_~i~1 (- 3)) 0))} is VALID [2022-04-07 17:11:28,212 INFO L290 TraceCheckUtils]: 52: Hoare triple {6188#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= (+ main_~i~1 (- 3)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6213#(and (= main_~i~1 4) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-07 17:11:28,212 INFO L290 TraceCheckUtils]: 53: Hoare triple {6213#(and (= main_~i~1 4) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6045#(= |main_#t~mem5| 0)} is VALID [2022-04-07 17:11:28,212 INFO L272 TraceCheckUtils]: 54: Hoare triple {6045#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6220#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:11:28,213 INFO L290 TraceCheckUtils]: 55: Hoare triple {6220#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6224#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:11:28,213 INFO L290 TraceCheckUtils]: 56: Hoare triple {6224#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {6012#false} is VALID [2022-04-07 17:11:28,213 INFO L290 TraceCheckUtils]: 57: Hoare triple {6012#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6012#false} is VALID [2022-04-07 17:11:28,214 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 76 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2022-04-07 17:11:28,214 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 17:11:30,494 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2022-04-07 17:11:30,500 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2022-04-07 17:11:30,578 INFO L290 TraceCheckUtils]: 57: Hoare triple {6012#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6012#false} is VALID [2022-04-07 17:11:30,578 INFO L290 TraceCheckUtils]: 56: Hoare triple {6224#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {6012#false} is VALID [2022-04-07 17:11:30,578 INFO L290 TraceCheckUtils]: 55: Hoare triple {6220#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6224#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:11:30,587 INFO L272 TraceCheckUtils]: 54: Hoare triple {6045#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6220#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:11:30,588 INFO L290 TraceCheckUtils]: 53: Hoare triple {6044#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6045#(= |main_#t~mem5| 0)} is VALID [2022-04-07 17:11:30,589 INFO L290 TraceCheckUtils]: 52: Hoare triple {6039#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6044#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:11:30,589 INFO L290 TraceCheckUtils]: 51: Hoare triple {6039#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6039#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:11:30,590 INFO L284 TraceCheckUtils]: 50: Hoare quadruple {6011#true} {6039#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6039#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:11:30,590 INFO L290 TraceCheckUtils]: 49: Hoare triple {6011#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-07 17:11:30,590 INFO L290 TraceCheckUtils]: 48: Hoare triple {6011#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-07 17:11:30,590 INFO L290 TraceCheckUtils]: 47: Hoare triple {6011#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6011#true} is VALID [2022-04-07 17:11:30,590 INFO L272 TraceCheckUtils]: 46: Hoare triple {6039#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6011#true} is VALID [2022-04-07 17:11:30,591 INFO L290 TraceCheckUtils]: 45: Hoare triple {6039#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6039#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:11:30,591 INFO L290 TraceCheckUtils]: 44: Hoare triple {6034#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6039#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:11:30,592 INFO L290 TraceCheckUtils]: 43: Hoare triple {6034#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6034#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:11:30,592 INFO L284 TraceCheckUtils]: 42: Hoare quadruple {6011#true} {6034#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6034#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:11:30,593 INFO L290 TraceCheckUtils]: 41: Hoare triple {6011#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-07 17:11:30,593 INFO L290 TraceCheckUtils]: 40: Hoare triple {6011#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-07 17:11:30,593 INFO L290 TraceCheckUtils]: 39: Hoare triple {6011#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6011#true} is VALID [2022-04-07 17:11:30,593 INFO L272 TraceCheckUtils]: 38: Hoare triple {6034#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6011#true} is VALID [2022-04-07 17:11:30,593 INFO L290 TraceCheckUtils]: 37: Hoare triple {6034#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6034#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:11:30,594 INFO L290 TraceCheckUtils]: 36: Hoare triple {6029#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6034#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:11:30,594 INFO L290 TraceCheckUtils]: 35: Hoare triple {6029#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6029#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:11:30,595 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {6011#true} {6029#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6029#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:11:30,595 INFO L290 TraceCheckUtils]: 33: Hoare triple {6011#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-07 17:11:30,595 INFO L290 TraceCheckUtils]: 32: Hoare triple {6011#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-07 17:11:30,595 INFO L290 TraceCheckUtils]: 31: Hoare triple {6011#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6011#true} is VALID [2022-04-07 17:11:30,595 INFO L272 TraceCheckUtils]: 30: Hoare triple {6029#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6011#true} is VALID [2022-04-07 17:11:30,596 INFO L290 TraceCheckUtils]: 29: Hoare triple {6029#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6029#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:11:30,597 INFO L290 TraceCheckUtils]: 28: Hoare triple {6318#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6029#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:11:30,597 INFO L290 TraceCheckUtils]: 27: Hoare triple {6318#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6318#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:11:30,598 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {6011#true} {6318#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6318#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:11:30,598 INFO L290 TraceCheckUtils]: 25: Hoare triple {6011#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-07 17:11:30,598 INFO L290 TraceCheckUtils]: 24: Hoare triple {6011#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-07 17:11:30,598 INFO L290 TraceCheckUtils]: 23: Hoare triple {6011#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6011#true} is VALID [2022-04-07 17:11:30,598 INFO L272 TraceCheckUtils]: 22: Hoare triple {6318#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6011#true} is VALID [2022-04-07 17:11:30,598 INFO L290 TraceCheckUtils]: 21: Hoare triple {6318#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6318#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:11:30,599 INFO L290 TraceCheckUtils]: 20: Hoare triple {6023#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {6318#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:11:30,599 INFO L290 TraceCheckUtils]: 19: Hoare triple {6023#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {6023#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-07 17:11:30,600 INFO L290 TraceCheckUtils]: 18: Hoare triple {6023#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6023#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-07 17:11:30,601 INFO L290 TraceCheckUtils]: 17: Hoare triple {6022#(and (not (= (+ main_~x~0.offset 16) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6023#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-07 17:11:30,601 INFO L290 TraceCheckUtils]: 16: Hoare triple {6355#(and (not (<= main_~i~0 3)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6022#(and (not (= (+ main_~x~0.offset 16) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-07 17:11:30,602 INFO L290 TraceCheckUtils]: 15: Hoare triple {6020#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6355#(and (not (<= main_~i~0 3)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-07 17:11:30,602 INFO L290 TraceCheckUtils]: 14: Hoare triple {6019#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6020#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 17:11:30,603 INFO L290 TraceCheckUtils]: 13: Hoare triple {6019#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6019#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 17:11:30,603 INFO L290 TraceCheckUtils]: 12: Hoare triple {6018#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6019#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 17:11:30,604 INFO L290 TraceCheckUtils]: 11: Hoare triple {6018#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6018#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:11:30,604 INFO L290 TraceCheckUtils]: 10: Hoare triple {6017#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6018#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:11:30,605 INFO L290 TraceCheckUtils]: 9: Hoare triple {6017#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6017#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:11:30,605 INFO L290 TraceCheckUtils]: 8: Hoare triple {6016#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6017#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:11:30,606 INFO L290 TraceCheckUtils]: 7: Hoare triple {6016#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6016#(= main_~i~0 0)} is VALID [2022-04-07 17:11:30,606 INFO L290 TraceCheckUtils]: 6: Hoare triple {6011#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {6016#(= main_~i~0 0)} is VALID [2022-04-07 17:11:30,606 INFO L290 TraceCheckUtils]: 5: Hoare triple {6011#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {6011#true} is VALID [2022-04-07 17:11:30,606 INFO L272 TraceCheckUtils]: 4: Hoare triple {6011#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-07 17:11:30,606 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6011#true} {6011#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-07 17:11:30,607 INFO L290 TraceCheckUtils]: 2: Hoare triple {6011#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-07 17:11:30,607 INFO L290 TraceCheckUtils]: 1: Hoare triple {6011#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6011#true} is VALID [2022-04-07 17:11:30,607 INFO L272 TraceCheckUtils]: 0: Hoare triple {6011#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6011#true} is VALID [2022-04-07 17:11:30,607 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 8 proven. 68 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2022-04-07 17:11:30,607 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1600503506] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 17:11:30,607 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 17:11:30,608 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19, 18] total 29 [2022-04-07 17:11:30,608 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1872756625] [2022-04-07 17:11:30,608 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 17:11:30,608 INFO L78 Accepts]: Start accepts. Automaton has has 29 states, 28 states have (on average 2.2142857142857144) internal successors, (62), 26 states have internal predecessors, (62), 10 states have call successors, (14), 5 states have call predecessors, (14), 2 states have return successors, (10), 9 states have call predecessors, (10), 9 states have call successors, (10) Word has length 58 [2022-04-07 17:11:30,609 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:11:30,610 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 29 states, 28 states have (on average 2.2142857142857144) internal successors, (62), 26 states have internal predecessors, (62), 10 states have call successors, (14), 5 states have call predecessors, (14), 2 states have return successors, (10), 9 states have call predecessors, (10), 9 states have call successors, (10) [2022-04-07 17:11:30,682 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 86 edges. 86 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:11:30,682 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 29 states [2022-04-07 17:11:30,682 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:11:30,683 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2022-04-07 17:11:30,683 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=85, Invalid=722, Unknown=5, NotChecked=0, Total=812 [2022-04-07 17:11:30,683 INFO L87 Difference]: Start difference. First operand 76 states and 80 transitions. Second operand has 29 states, 28 states have (on average 2.2142857142857144) internal successors, (62), 26 states have internal predecessors, (62), 10 states have call successors, (14), 5 states have call predecessors, (14), 2 states have return successors, (10), 9 states have call predecessors, (10), 9 states have call successors, (10) [2022-04-07 17:11:40,151 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:11:40,151 INFO L93 Difference]: Finished difference Result 117 states and 121 transitions. [2022-04-07 17:11:40,151 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2022-04-07 17:11:40,151 INFO L78 Accepts]: Start accepts. Automaton has has 29 states, 28 states have (on average 2.2142857142857144) internal successors, (62), 26 states have internal predecessors, (62), 10 states have call successors, (14), 5 states have call predecessors, (14), 2 states have return successors, (10), 9 states have call predecessors, (10), 9 states have call successors, (10) Word has length 58 [2022-04-07 17:11:40,151 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:11:40,152 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 28 states have (on average 2.2142857142857144) internal successors, (62), 26 states have internal predecessors, (62), 10 states have call successors, (14), 5 states have call predecessors, (14), 2 states have return successors, (10), 9 states have call predecessors, (10), 9 states have call successors, (10) [2022-04-07 17:11:40,153 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 68 transitions. [2022-04-07 17:11:40,153 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 28 states have (on average 2.2142857142857144) internal successors, (62), 26 states have internal predecessors, (62), 10 states have call successors, (14), 5 states have call predecessors, (14), 2 states have return successors, (10), 9 states have call predecessors, (10), 9 states have call successors, (10) [2022-04-07 17:11:40,154 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 68 transitions. [2022-04-07 17:11:40,154 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 27 states and 68 transitions. [2022-04-07 17:11:40,220 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 68 edges. 68 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:11:40,222 INFO L225 Difference]: With dead ends: 117 [2022-04-07 17:11:40,222 INFO L226 Difference]: Without dead ends: 117 [2022-04-07 17:11:40,222 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 165 GetRequests, 106 SyntacticMatches, 13 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 498 ImplicationChecksByTransitivity, 39.4s TimeCoverageRelationStatistics Valid=218, Invalid=2029, Unknown=9, NotChecked=0, Total=2256 [2022-04-07 17:11:40,223 INFO L913 BasicCegarLoop]: 26 mSDtfsCounter, 56 mSDsluCounter, 161 mSDsCounter, 0 mSdLazyCounter, 736 mSolverCounterSat, 19 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 57 SdHoareTripleChecker+Valid, 187 SdHoareTripleChecker+Invalid, 851 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 19 IncrementalHoareTripleChecker+Valid, 736 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 96 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-04-07 17:11:40,223 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [57 Valid, 187 Invalid, 851 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [19 Valid, 736 Invalid, 0 Unknown, 96 Unchecked, 0.6s Time] [2022-04-07 17:11:40,224 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 117 states. [2022-04-07 17:11:40,227 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 117 to 91. [2022-04-07 17:11:40,227 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:11:40,227 INFO L82 GeneralOperation]: Start isEquivalent. First operand 117 states. Second operand has 91 states, 70 states have (on average 1.0571428571428572) internal successors, (74), 73 states have internal predecessors, (74), 11 states have call successors, (11), 10 states have call predecessors, (11), 9 states have return successors, (10), 7 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-07 17:11:40,228 INFO L74 IsIncluded]: Start isIncluded. First operand 117 states. Second operand has 91 states, 70 states have (on average 1.0571428571428572) internal successors, (74), 73 states have internal predecessors, (74), 11 states have call successors, (11), 10 states have call predecessors, (11), 9 states have return successors, (10), 7 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-07 17:11:40,228 INFO L87 Difference]: Start difference. First operand 117 states. Second operand has 91 states, 70 states have (on average 1.0571428571428572) internal successors, (74), 73 states have internal predecessors, (74), 11 states have call successors, (11), 10 states have call predecessors, (11), 9 states have return successors, (10), 7 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-07 17:11:40,230 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:11:40,230 INFO L93 Difference]: Finished difference Result 117 states and 121 transitions. [2022-04-07 17:11:40,230 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states and 121 transitions. [2022-04-07 17:11:40,230 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:11:40,230 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:11:40,231 INFO L74 IsIncluded]: Start isIncluded. First operand has 91 states, 70 states have (on average 1.0571428571428572) internal successors, (74), 73 states have internal predecessors, (74), 11 states have call successors, (11), 10 states have call predecessors, (11), 9 states have return successors, (10), 7 states have call predecessors, (10), 10 states have call successors, (10) Second operand 117 states. [2022-04-07 17:11:40,231 INFO L87 Difference]: Start difference. First operand has 91 states, 70 states have (on average 1.0571428571428572) internal successors, (74), 73 states have internal predecessors, (74), 11 states have call successors, (11), 10 states have call predecessors, (11), 9 states have return successors, (10), 7 states have call predecessors, (10), 10 states have call successors, (10) Second operand 117 states. [2022-04-07 17:11:40,233 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:11:40,233 INFO L93 Difference]: Finished difference Result 117 states and 121 transitions. [2022-04-07 17:11:40,233 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states and 121 transitions. [2022-04-07 17:11:40,234 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:11:40,234 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:11:40,234 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:11:40,234 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:11:40,234 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 91 states, 70 states have (on average 1.0571428571428572) internal successors, (74), 73 states have internal predecessors, (74), 11 states have call successors, (11), 10 states have call predecessors, (11), 9 states have return successors, (10), 7 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-07 17:11:40,235 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 91 states to 91 states and 95 transitions. [2022-04-07 17:11:40,236 INFO L78 Accepts]: Start accepts. Automaton has 91 states and 95 transitions. Word has length 58 [2022-04-07 17:11:40,236 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:11:40,236 INFO L478 AbstractCegarLoop]: Abstraction has 91 states and 95 transitions. [2022-04-07 17:11:40,236 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 29 states, 28 states have (on average 2.2142857142857144) internal successors, (62), 26 states have internal predecessors, (62), 10 states have call successors, (14), 5 states have call predecessors, (14), 2 states have return successors, (10), 9 states have call predecessors, (10), 9 states have call successors, (10) [2022-04-07 17:11:40,236 INFO L276 IsEmpty]: Start isEmpty. Operand 91 states and 95 transitions. [2022-04-07 17:11:40,237 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2022-04-07 17:11:40,237 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:11:40,237 INFO L499 BasicCegarLoop]: trace histogram [7, 7, 5, 5, 5, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:11:40,259 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Forceful destruction successful, exit code 0 [2022-04-07 17:11:40,451 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable13 [2022-04-07 17:11:40,452 INFO L403 AbstractCegarLoop]: === Iteration 15 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:11:40,452 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:11:40,452 INFO L85 PathProgramCache]: Analyzing trace with hash 1278575025, now seen corresponding path program 12 times [2022-04-07 17:11:40,452 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:11:40,452 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [951125621] [2022-04-07 17:11:40,452 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:11:40,452 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:11:40,479 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:11:40,700 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:11:40,701 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:11:40,703 INFO L290 TraceCheckUtils]: 0: Hoare triple {6927#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6889#true} is VALID [2022-04-07 17:11:40,703 INFO L290 TraceCheckUtils]: 1: Hoare triple {6889#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-07 17:11:40,703 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {6889#true} {6889#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-07 17:11:40,704 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 24 [2022-04-07 17:11:40,704 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:11:40,716 INFO L290 TraceCheckUtils]: 0: Hoare triple {6889#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6889#true} is VALID [2022-04-07 17:11:40,716 INFO L290 TraceCheckUtils]: 1: Hoare triple {6889#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-07 17:11:40,717 INFO L290 TraceCheckUtils]: 2: Hoare triple {6889#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-07 17:11:40,717 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6889#true} {6903#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6903#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:11:40,717 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 32 [2022-04-07 17:11:40,718 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:11:40,721 INFO L290 TraceCheckUtils]: 0: Hoare triple {6889#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6889#true} is VALID [2022-04-07 17:11:40,721 INFO L290 TraceCheckUtils]: 1: Hoare triple {6889#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-07 17:11:40,721 INFO L290 TraceCheckUtils]: 2: Hoare triple {6889#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-07 17:11:40,722 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6889#true} {6908#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6908#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:11:40,722 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 40 [2022-04-07 17:11:40,723 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:11:40,726 INFO L290 TraceCheckUtils]: 0: Hoare triple {6889#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6889#true} is VALID [2022-04-07 17:11:40,727 INFO L290 TraceCheckUtils]: 1: Hoare triple {6889#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-07 17:11:40,727 INFO L290 TraceCheckUtils]: 2: Hoare triple {6889#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-07 17:11:40,728 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6889#true} {6913#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6913#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:11:40,728 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 48 [2022-04-07 17:11:40,729 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:11:40,731 INFO L290 TraceCheckUtils]: 0: Hoare triple {6889#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6889#true} is VALID [2022-04-07 17:11:40,731 INFO L290 TraceCheckUtils]: 1: Hoare triple {6889#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-07 17:11:40,731 INFO L290 TraceCheckUtils]: 2: Hoare triple {6889#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-07 17:11:40,732 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6889#true} {6918#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6918#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:11:40,733 INFO L272 TraceCheckUtils]: 0: Hoare triple {6889#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6927#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:11:40,733 INFO L290 TraceCheckUtils]: 1: Hoare triple {6927#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6889#true} is VALID [2022-04-07 17:11:40,733 INFO L290 TraceCheckUtils]: 2: Hoare triple {6889#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-07 17:11:40,733 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6889#true} {6889#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-07 17:11:40,733 INFO L272 TraceCheckUtils]: 4: Hoare triple {6889#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-07 17:11:40,733 INFO L290 TraceCheckUtils]: 5: Hoare triple {6889#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {6889#true} is VALID [2022-04-07 17:11:40,734 INFO L290 TraceCheckUtils]: 6: Hoare triple {6889#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {6894#(= main_~i~0 0)} is VALID [2022-04-07 17:11:40,734 INFO L290 TraceCheckUtils]: 7: Hoare triple {6894#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6894#(= main_~i~0 0)} is VALID [2022-04-07 17:11:40,734 INFO L290 TraceCheckUtils]: 8: Hoare triple {6894#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6895#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:11:40,735 INFO L290 TraceCheckUtils]: 9: Hoare triple {6895#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6895#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:11:40,735 INFO L290 TraceCheckUtils]: 10: Hoare triple {6895#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6896#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:11:40,736 INFO L290 TraceCheckUtils]: 11: Hoare triple {6896#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6896#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:11:40,736 INFO L290 TraceCheckUtils]: 12: Hoare triple {6896#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6897#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 17:11:40,737 INFO L290 TraceCheckUtils]: 13: Hoare triple {6897#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6897#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 17:11:40,737 INFO L290 TraceCheckUtils]: 14: Hoare triple {6897#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6898#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 17:11:40,738 INFO L290 TraceCheckUtils]: 15: Hoare triple {6898#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6899#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 17:11:40,738 INFO L290 TraceCheckUtils]: 16: Hoare triple {6899#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6900#(and (<= 5 main_~i~0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-07 17:11:40,739 INFO L290 TraceCheckUtils]: 17: Hoare triple {6900#(and (<= 5 main_~i~0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6900#(and (<= 5 main_~i~0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-07 17:11:40,740 INFO L290 TraceCheckUtils]: 18: Hoare triple {6900#(and (<= 5 main_~i~0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6901#(and (not (= (+ main_~x~0.offset 16) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-07 17:11:40,740 INFO L290 TraceCheckUtils]: 19: Hoare triple {6901#(and (not (= (+ main_~x~0.offset 16) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6902#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-07 17:11:40,741 INFO L290 TraceCheckUtils]: 20: Hoare triple {6902#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6902#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-07 17:11:40,741 INFO L290 TraceCheckUtils]: 21: Hoare triple {6902#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {6902#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-07 17:11:40,742 INFO L290 TraceCheckUtils]: 22: Hoare triple {6902#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {6903#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:11:40,742 INFO L290 TraceCheckUtils]: 23: Hoare triple {6903#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6903#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:11:40,742 INFO L272 TraceCheckUtils]: 24: Hoare triple {6903#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6889#true} is VALID [2022-04-07 17:11:40,742 INFO L290 TraceCheckUtils]: 25: Hoare triple {6889#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6889#true} is VALID [2022-04-07 17:11:40,742 INFO L290 TraceCheckUtils]: 26: Hoare triple {6889#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-07 17:11:40,742 INFO L290 TraceCheckUtils]: 27: Hoare triple {6889#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-07 17:11:40,743 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {6889#true} {6903#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6903#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:11:40,743 INFO L290 TraceCheckUtils]: 29: Hoare triple {6903#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6903#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:11:40,744 INFO L290 TraceCheckUtils]: 30: Hoare triple {6903#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6908#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:11:40,744 INFO L290 TraceCheckUtils]: 31: Hoare triple {6908#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6908#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:11:40,744 INFO L272 TraceCheckUtils]: 32: Hoare triple {6908#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6889#true} is VALID [2022-04-07 17:11:40,744 INFO L290 TraceCheckUtils]: 33: Hoare triple {6889#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6889#true} is VALID [2022-04-07 17:11:40,745 INFO L290 TraceCheckUtils]: 34: Hoare triple {6889#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-07 17:11:40,745 INFO L290 TraceCheckUtils]: 35: Hoare triple {6889#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-07 17:11:40,745 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {6889#true} {6908#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6908#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:11:40,746 INFO L290 TraceCheckUtils]: 37: Hoare triple {6908#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6908#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:11:40,746 INFO L290 TraceCheckUtils]: 38: Hoare triple {6908#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6913#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:11:40,747 INFO L290 TraceCheckUtils]: 39: Hoare triple {6913#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6913#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:11:40,747 INFO L272 TraceCheckUtils]: 40: Hoare triple {6913#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6889#true} is VALID [2022-04-07 17:11:40,747 INFO L290 TraceCheckUtils]: 41: Hoare triple {6889#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6889#true} is VALID [2022-04-07 17:11:40,747 INFO L290 TraceCheckUtils]: 42: Hoare triple {6889#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-07 17:11:40,747 INFO L290 TraceCheckUtils]: 43: Hoare triple {6889#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-07 17:11:40,748 INFO L284 TraceCheckUtils]: 44: Hoare quadruple {6889#true} {6913#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6913#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:11:40,748 INFO L290 TraceCheckUtils]: 45: Hoare triple {6913#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6913#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:11:40,749 INFO L290 TraceCheckUtils]: 46: Hoare triple {6913#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6918#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:11:40,749 INFO L290 TraceCheckUtils]: 47: Hoare triple {6918#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6918#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:11:40,749 INFO L272 TraceCheckUtils]: 48: Hoare triple {6918#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6889#true} is VALID [2022-04-07 17:11:40,750 INFO L290 TraceCheckUtils]: 49: Hoare triple {6889#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6889#true} is VALID [2022-04-07 17:11:40,750 INFO L290 TraceCheckUtils]: 50: Hoare triple {6889#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-07 17:11:40,750 INFO L290 TraceCheckUtils]: 51: Hoare triple {6889#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-07 17:11:40,750 INFO L284 TraceCheckUtils]: 52: Hoare quadruple {6889#true} {6918#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6918#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:11:40,751 INFO L290 TraceCheckUtils]: 53: Hoare triple {6918#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6918#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:11:40,751 INFO L290 TraceCheckUtils]: 54: Hoare triple {6918#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6923#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:11:40,752 INFO L290 TraceCheckUtils]: 55: Hoare triple {6923#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6924#(= |main_#t~mem5| 0)} is VALID [2022-04-07 17:11:40,752 INFO L272 TraceCheckUtils]: 56: Hoare triple {6924#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6925#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:11:40,753 INFO L290 TraceCheckUtils]: 57: Hoare triple {6925#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6926#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:11:40,753 INFO L290 TraceCheckUtils]: 58: Hoare triple {6926#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {6890#false} is VALID [2022-04-07 17:11:40,753 INFO L290 TraceCheckUtils]: 59: Hoare triple {6890#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6890#false} is VALID [2022-04-07 17:11:40,754 INFO L134 CoverageAnalysis]: Checked inductivity of 113 backedges. 8 proven. 81 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2022-04-07 17:11:40,754 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:11:40,754 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [951125621] [2022-04-07 17:11:40,754 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [951125621] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:11:40,754 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2102279863] [2022-04-07 17:11:40,754 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-07 17:11:40,754 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:11:40,754 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:11:40,755 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:11:40,771 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2022-04-07 17:11:40,830 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 8 check-sat command(s) [2022-04-07 17:11:40,831 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 17:11:40,832 INFO L263 TraceCheckSpWp]: Trace formula consists of 183 conjuncts, 35 conjunts are in the unsatisfiable core [2022-04-07 17:11:40,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:11:40,847 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:11:40,928 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-07 17:11:41,039 INFO L356 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2022-04-07 17:11:41,039 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 24 [2022-04-07 17:11:41,112 INFO L356 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2022-04-07 17:11:41,113 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 24 [2022-04-07 17:12:10,512 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2022-04-07 17:12:10,560 INFO L272 TraceCheckUtils]: 0: Hoare triple {6889#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-07 17:12:10,560 INFO L290 TraceCheckUtils]: 1: Hoare triple {6889#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6889#true} is VALID [2022-04-07 17:12:10,561 INFO L290 TraceCheckUtils]: 2: Hoare triple {6889#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-07 17:12:10,561 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6889#true} {6889#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-07 17:12:10,561 INFO L272 TraceCheckUtils]: 4: Hoare triple {6889#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-07 17:12:10,561 INFO L290 TraceCheckUtils]: 5: Hoare triple {6889#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {6889#true} is VALID [2022-04-07 17:12:10,567 INFO L290 TraceCheckUtils]: 6: Hoare triple {6889#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {6894#(= main_~i~0 0)} is VALID [2022-04-07 17:12:10,568 INFO L290 TraceCheckUtils]: 7: Hoare triple {6894#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6894#(= main_~i~0 0)} is VALID [2022-04-07 17:12:10,568 INFO L290 TraceCheckUtils]: 8: Hoare triple {6894#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6895#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:12:10,569 INFO L290 TraceCheckUtils]: 9: Hoare triple {6895#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6895#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:12:10,570 INFO L290 TraceCheckUtils]: 10: Hoare triple {6895#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6896#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:12:10,570 INFO L290 TraceCheckUtils]: 11: Hoare triple {6896#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6896#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:12:10,571 INFO L290 TraceCheckUtils]: 12: Hoare triple {6896#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6897#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 17:12:10,571 INFO L290 TraceCheckUtils]: 13: Hoare triple {6897#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6897#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 17:12:10,572 INFO L290 TraceCheckUtils]: 14: Hoare triple {6897#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6898#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 17:12:10,573 INFO L290 TraceCheckUtils]: 15: Hoare triple {6898#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6899#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 17:12:10,573 INFO L290 TraceCheckUtils]: 16: Hoare triple {6899#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6900#(and (<= 5 main_~i~0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-07 17:12:10,574 INFO L290 TraceCheckUtils]: 17: Hoare triple {6900#(and (<= 5 main_~i~0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6900#(and (<= 5 main_~i~0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-07 17:12:10,575 INFO L290 TraceCheckUtils]: 18: Hoare triple {6900#(and (<= 5 main_~i~0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6985#(and (<= 6 main_~i~0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-07 17:12:10,575 INFO L290 TraceCheckUtils]: 19: Hoare triple {6985#(and (<= 6 main_~i~0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6902#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-07 17:12:10,576 INFO L290 TraceCheckUtils]: 20: Hoare triple {6902#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6902#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-07 17:12:10,576 INFO L290 TraceCheckUtils]: 21: Hoare triple {6902#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {6902#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-07 17:12:10,577 INFO L290 TraceCheckUtils]: 22: Hoare triple {6902#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {6903#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:12:10,577 INFO L290 TraceCheckUtils]: 23: Hoare triple {6903#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6903#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:12:10,579 INFO L272 TraceCheckUtils]: 24: Hoare triple {6903#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7004#(exists ((v_main_~x~0.base_BEFORE_CALL_35 Int) (v_main_~x~0.offset_BEFORE_CALL_35 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_35) (+ 16 v_main_~x~0.offset_BEFORE_CALL_35)) 0))} is VALID [2022-04-07 17:12:10,579 INFO L290 TraceCheckUtils]: 25: Hoare triple {7004#(exists ((v_main_~x~0.base_BEFORE_CALL_35 Int) (v_main_~x~0.offset_BEFORE_CALL_35 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_35) (+ 16 v_main_~x~0.offset_BEFORE_CALL_35)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7004#(exists ((v_main_~x~0.base_BEFORE_CALL_35 Int) (v_main_~x~0.offset_BEFORE_CALL_35 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_35) (+ 16 v_main_~x~0.offset_BEFORE_CALL_35)) 0))} is VALID [2022-04-07 17:12:10,579 INFO L290 TraceCheckUtils]: 26: Hoare triple {7004#(exists ((v_main_~x~0.base_BEFORE_CALL_35 Int) (v_main_~x~0.offset_BEFORE_CALL_35 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_35) (+ 16 v_main_~x~0.offset_BEFORE_CALL_35)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7004#(exists ((v_main_~x~0.base_BEFORE_CALL_35 Int) (v_main_~x~0.offset_BEFORE_CALL_35 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_35) (+ 16 v_main_~x~0.offset_BEFORE_CALL_35)) 0))} is VALID [2022-04-07 17:12:10,580 INFO L290 TraceCheckUtils]: 27: Hoare triple {7004#(exists ((v_main_~x~0.base_BEFORE_CALL_35 Int) (v_main_~x~0.offset_BEFORE_CALL_35 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_35) (+ 16 v_main_~x~0.offset_BEFORE_CALL_35)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7004#(exists ((v_main_~x~0.base_BEFORE_CALL_35 Int) (v_main_~x~0.offset_BEFORE_CALL_35 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_35) (+ 16 v_main_~x~0.offset_BEFORE_CALL_35)) 0))} is VALID [2022-04-07 17:12:10,581 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {7004#(exists ((v_main_~x~0.base_BEFORE_CALL_35 Int) (v_main_~x~0.offset_BEFORE_CALL_35 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_35) (+ 16 v_main_~x~0.offset_BEFORE_CALL_35)) 0))} {6903#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6903#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:12:10,581 INFO L290 TraceCheckUtils]: 29: Hoare triple {6903#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6903#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:12:10,582 INFO L290 TraceCheckUtils]: 30: Hoare triple {6903#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7023#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-07 17:12:10,582 INFO L290 TraceCheckUtils]: 31: Hoare triple {7023#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7023#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-07 17:12:10,583 INFO L272 TraceCheckUtils]: 32: Hoare triple {7023#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7004#(exists ((v_main_~x~0.base_BEFORE_CALL_35 Int) (v_main_~x~0.offset_BEFORE_CALL_35 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_35) (+ 16 v_main_~x~0.offset_BEFORE_CALL_35)) 0))} is VALID [2022-04-07 17:12:10,583 INFO L290 TraceCheckUtils]: 33: Hoare triple {7004#(exists ((v_main_~x~0.base_BEFORE_CALL_35 Int) (v_main_~x~0.offset_BEFORE_CALL_35 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_35) (+ 16 v_main_~x~0.offset_BEFORE_CALL_35)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7004#(exists ((v_main_~x~0.base_BEFORE_CALL_35 Int) (v_main_~x~0.offset_BEFORE_CALL_35 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_35) (+ 16 v_main_~x~0.offset_BEFORE_CALL_35)) 0))} is VALID [2022-04-07 17:12:10,583 INFO L290 TraceCheckUtils]: 34: Hoare triple {7004#(exists ((v_main_~x~0.base_BEFORE_CALL_35 Int) (v_main_~x~0.offset_BEFORE_CALL_35 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_35) (+ 16 v_main_~x~0.offset_BEFORE_CALL_35)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7004#(exists ((v_main_~x~0.base_BEFORE_CALL_35 Int) (v_main_~x~0.offset_BEFORE_CALL_35 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_35) (+ 16 v_main_~x~0.offset_BEFORE_CALL_35)) 0))} is VALID [2022-04-07 17:12:10,584 INFO L290 TraceCheckUtils]: 35: Hoare triple {7004#(exists ((v_main_~x~0.base_BEFORE_CALL_35 Int) (v_main_~x~0.offset_BEFORE_CALL_35 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_35) (+ 16 v_main_~x~0.offset_BEFORE_CALL_35)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7004#(exists ((v_main_~x~0.base_BEFORE_CALL_35 Int) (v_main_~x~0.offset_BEFORE_CALL_35 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_35) (+ 16 v_main_~x~0.offset_BEFORE_CALL_35)) 0))} is VALID [2022-04-07 17:12:10,584 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {7004#(exists ((v_main_~x~0.base_BEFORE_CALL_35 Int) (v_main_~x~0.offset_BEFORE_CALL_35 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_35) (+ 16 v_main_~x~0.offset_BEFORE_CALL_35)) 0))} {7023#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7023#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-07 17:12:10,585 INFO L290 TraceCheckUtils]: 37: Hoare triple {7023#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7023#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-07 17:12:10,585 INFO L290 TraceCheckUtils]: 38: Hoare triple {7023#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7048#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-07 17:12:10,586 INFO L290 TraceCheckUtils]: 39: Hoare triple {7048#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7048#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-07 17:12:10,586 INFO L272 TraceCheckUtils]: 40: Hoare triple {7048#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7004#(exists ((v_main_~x~0.base_BEFORE_CALL_35 Int) (v_main_~x~0.offset_BEFORE_CALL_35 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_35) (+ 16 v_main_~x~0.offset_BEFORE_CALL_35)) 0))} is VALID [2022-04-07 17:12:10,587 INFO L290 TraceCheckUtils]: 41: Hoare triple {7004#(exists ((v_main_~x~0.base_BEFORE_CALL_35 Int) (v_main_~x~0.offset_BEFORE_CALL_35 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_35) (+ 16 v_main_~x~0.offset_BEFORE_CALL_35)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7004#(exists ((v_main_~x~0.base_BEFORE_CALL_35 Int) (v_main_~x~0.offset_BEFORE_CALL_35 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_35) (+ 16 v_main_~x~0.offset_BEFORE_CALL_35)) 0))} is VALID [2022-04-07 17:12:10,587 INFO L290 TraceCheckUtils]: 42: Hoare triple {7004#(exists ((v_main_~x~0.base_BEFORE_CALL_35 Int) (v_main_~x~0.offset_BEFORE_CALL_35 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_35) (+ 16 v_main_~x~0.offset_BEFORE_CALL_35)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7004#(exists ((v_main_~x~0.base_BEFORE_CALL_35 Int) (v_main_~x~0.offset_BEFORE_CALL_35 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_35) (+ 16 v_main_~x~0.offset_BEFORE_CALL_35)) 0))} is VALID [2022-04-07 17:12:10,587 INFO L290 TraceCheckUtils]: 43: Hoare triple {7004#(exists ((v_main_~x~0.base_BEFORE_CALL_35 Int) (v_main_~x~0.offset_BEFORE_CALL_35 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_35) (+ 16 v_main_~x~0.offset_BEFORE_CALL_35)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7004#(exists ((v_main_~x~0.base_BEFORE_CALL_35 Int) (v_main_~x~0.offset_BEFORE_CALL_35 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_35) (+ 16 v_main_~x~0.offset_BEFORE_CALL_35)) 0))} is VALID [2022-04-07 17:12:10,588 INFO L284 TraceCheckUtils]: 44: Hoare quadruple {7004#(exists ((v_main_~x~0.base_BEFORE_CALL_35 Int) (v_main_~x~0.offset_BEFORE_CALL_35 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_35) (+ 16 v_main_~x~0.offset_BEFORE_CALL_35)) 0))} {7048#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7048#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-07 17:12:10,588 INFO L290 TraceCheckUtils]: 45: Hoare triple {7048#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7048#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-07 17:12:10,588 INFO L290 TraceCheckUtils]: 46: Hoare triple {7048#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7073#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= (+ main_~i~1 (- 3)) 0))} is VALID [2022-04-07 17:12:10,589 INFO L290 TraceCheckUtils]: 47: Hoare triple {7073#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= (+ main_~i~1 (- 3)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7073#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= (+ main_~i~1 (- 3)) 0))} is VALID [2022-04-07 17:12:10,590 INFO L272 TraceCheckUtils]: 48: Hoare triple {7073#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= (+ main_~i~1 (- 3)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7004#(exists ((v_main_~x~0.base_BEFORE_CALL_35 Int) (v_main_~x~0.offset_BEFORE_CALL_35 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_35) (+ 16 v_main_~x~0.offset_BEFORE_CALL_35)) 0))} is VALID [2022-04-07 17:12:10,590 INFO L290 TraceCheckUtils]: 49: Hoare triple {7004#(exists ((v_main_~x~0.base_BEFORE_CALL_35 Int) (v_main_~x~0.offset_BEFORE_CALL_35 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_35) (+ 16 v_main_~x~0.offset_BEFORE_CALL_35)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7004#(exists ((v_main_~x~0.base_BEFORE_CALL_35 Int) (v_main_~x~0.offset_BEFORE_CALL_35 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_35) (+ 16 v_main_~x~0.offset_BEFORE_CALL_35)) 0))} is VALID [2022-04-07 17:12:10,590 INFO L290 TraceCheckUtils]: 50: Hoare triple {7004#(exists ((v_main_~x~0.base_BEFORE_CALL_35 Int) (v_main_~x~0.offset_BEFORE_CALL_35 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_35) (+ 16 v_main_~x~0.offset_BEFORE_CALL_35)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7004#(exists ((v_main_~x~0.base_BEFORE_CALL_35 Int) (v_main_~x~0.offset_BEFORE_CALL_35 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_35) (+ 16 v_main_~x~0.offset_BEFORE_CALL_35)) 0))} is VALID [2022-04-07 17:12:10,591 INFO L290 TraceCheckUtils]: 51: Hoare triple {7004#(exists ((v_main_~x~0.base_BEFORE_CALL_35 Int) (v_main_~x~0.offset_BEFORE_CALL_35 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_35) (+ 16 v_main_~x~0.offset_BEFORE_CALL_35)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7004#(exists ((v_main_~x~0.base_BEFORE_CALL_35 Int) (v_main_~x~0.offset_BEFORE_CALL_35 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_35) (+ 16 v_main_~x~0.offset_BEFORE_CALL_35)) 0))} is VALID [2022-04-07 17:12:10,591 INFO L284 TraceCheckUtils]: 52: Hoare quadruple {7004#(exists ((v_main_~x~0.base_BEFORE_CALL_35 Int) (v_main_~x~0.offset_BEFORE_CALL_35 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_35) (+ 16 v_main_~x~0.offset_BEFORE_CALL_35)) 0))} {7073#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= (+ main_~i~1 (- 3)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7073#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= (+ main_~i~1 (- 3)) 0))} is VALID [2022-04-07 17:12:10,592 INFO L290 TraceCheckUtils]: 53: Hoare triple {7073#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= (+ main_~i~1 (- 3)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7073#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= (+ main_~i~1 (- 3)) 0))} is VALID [2022-04-07 17:12:10,592 INFO L290 TraceCheckUtils]: 54: Hoare triple {7073#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0) (= (+ main_~i~1 (- 3)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7098#(and (= 0 (+ main_~i~1 (- 4))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-07 17:12:10,593 INFO L290 TraceCheckUtils]: 55: Hoare triple {7098#(and (= 0 (+ main_~i~1 (- 4))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6924#(= |main_#t~mem5| 0)} is VALID [2022-04-07 17:12:10,594 INFO L272 TraceCheckUtils]: 56: Hoare triple {6924#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7105#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:12:10,594 INFO L290 TraceCheckUtils]: 57: Hoare triple {7105#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7109#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:12:10,594 INFO L290 TraceCheckUtils]: 58: Hoare triple {7109#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {6890#false} is VALID [2022-04-07 17:12:10,595 INFO L290 TraceCheckUtils]: 59: Hoare triple {6890#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6890#false} is VALID [2022-04-07 17:12:10,595 INFO L134 CoverageAnalysis]: Checked inductivity of 113 backedges. 1 proven. 88 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2022-04-07 17:12:10,595 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 17:12:12,953 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2022-04-07 17:12:12,957 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2022-04-07 17:12:13,052 INFO L290 TraceCheckUtils]: 59: Hoare triple {6890#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6890#false} is VALID [2022-04-07 17:12:13,053 INFO L290 TraceCheckUtils]: 58: Hoare triple {7109#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {6890#false} is VALID [2022-04-07 17:12:13,053 INFO L290 TraceCheckUtils]: 57: Hoare triple {7105#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7109#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:12:13,054 INFO L272 TraceCheckUtils]: 56: Hoare triple {6924#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7105#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:12:13,054 INFO L290 TraceCheckUtils]: 55: Hoare triple {6923#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6924#(= |main_#t~mem5| 0)} is VALID [2022-04-07 17:12:13,055 INFO L290 TraceCheckUtils]: 54: Hoare triple {6918#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6923#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:12:13,055 INFO L290 TraceCheckUtils]: 53: Hoare triple {6918#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6918#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:12:13,056 INFO L284 TraceCheckUtils]: 52: Hoare quadruple {6889#true} {6918#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6918#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:12:13,056 INFO L290 TraceCheckUtils]: 51: Hoare triple {6889#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-07 17:12:13,056 INFO L290 TraceCheckUtils]: 50: Hoare triple {6889#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-07 17:12:13,056 INFO L290 TraceCheckUtils]: 49: Hoare triple {6889#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6889#true} is VALID [2022-04-07 17:12:13,056 INFO L272 TraceCheckUtils]: 48: Hoare triple {6918#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6889#true} is VALID [2022-04-07 17:12:13,056 INFO L290 TraceCheckUtils]: 47: Hoare triple {6918#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6918#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:12:13,057 INFO L290 TraceCheckUtils]: 46: Hoare triple {6913#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6918#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:12:13,057 INFO L290 TraceCheckUtils]: 45: Hoare triple {6913#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6913#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:12:13,058 INFO L284 TraceCheckUtils]: 44: Hoare quadruple {6889#true} {6913#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6913#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:12:13,058 INFO L290 TraceCheckUtils]: 43: Hoare triple {6889#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-07 17:12:13,058 INFO L290 TraceCheckUtils]: 42: Hoare triple {6889#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-07 17:12:13,058 INFO L290 TraceCheckUtils]: 41: Hoare triple {6889#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6889#true} is VALID [2022-04-07 17:12:13,058 INFO L272 TraceCheckUtils]: 40: Hoare triple {6913#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6889#true} is VALID [2022-04-07 17:12:13,058 INFO L290 TraceCheckUtils]: 39: Hoare triple {6913#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6913#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:12:13,059 INFO L290 TraceCheckUtils]: 38: Hoare triple {6908#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6913#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:12:13,059 INFO L290 TraceCheckUtils]: 37: Hoare triple {6908#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {6908#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:12:13,060 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {6889#true} {6908#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6908#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:12:13,060 INFO L290 TraceCheckUtils]: 35: Hoare triple {6889#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-07 17:12:13,060 INFO L290 TraceCheckUtils]: 34: Hoare triple {6889#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-07 17:12:13,060 INFO L290 TraceCheckUtils]: 33: Hoare triple {6889#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6889#true} is VALID [2022-04-07 17:12:13,060 INFO L272 TraceCheckUtils]: 32: Hoare triple {6908#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6889#true} is VALID [2022-04-07 17:12:13,060 INFO L290 TraceCheckUtils]: 31: Hoare triple {6908#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {6908#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:12:13,061 INFO L290 TraceCheckUtils]: 30: Hoare triple {7203#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {6908#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:12:13,061 INFO L290 TraceCheckUtils]: 29: Hoare triple {7203#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7203#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:12:13,062 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {6889#true} {7203#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7203#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:12:13,062 INFO L290 TraceCheckUtils]: 27: Hoare triple {6889#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-07 17:12:13,062 INFO L290 TraceCheckUtils]: 26: Hoare triple {6889#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-07 17:12:13,062 INFO L290 TraceCheckUtils]: 25: Hoare triple {6889#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6889#true} is VALID [2022-04-07 17:12:13,062 INFO L272 TraceCheckUtils]: 24: Hoare triple {7203#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {6889#true} is VALID [2022-04-07 17:12:13,062 INFO L290 TraceCheckUtils]: 23: Hoare triple {7203#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7203#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:12:13,063 INFO L290 TraceCheckUtils]: 22: Hoare triple {6902#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {7203#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:12:13,063 INFO L290 TraceCheckUtils]: 21: Hoare triple {6902#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {6902#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-07 17:12:13,064 INFO L290 TraceCheckUtils]: 20: Hoare triple {6902#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6902#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-07 17:12:13,064 INFO L290 TraceCheckUtils]: 19: Hoare triple {6901#(and (not (= (+ main_~x~0.offset 16) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6902#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0)} is VALID [2022-04-07 17:12:13,065 INFO L290 TraceCheckUtils]: 18: Hoare triple {7240#(and (not (<= main_~i~0 3)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6901#(and (not (= (+ main_~x~0.offset 16) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-07 17:12:13,065 INFO L290 TraceCheckUtils]: 17: Hoare triple {6900#(and (<= 5 main_~i~0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7240#(and (not (<= main_~i~0 3)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-07 17:12:13,066 INFO L290 TraceCheckUtils]: 16: Hoare triple {7240#(and (not (<= main_~i~0 3)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6900#(and (<= 5 main_~i~0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-07 17:12:13,066 INFO L290 TraceCheckUtils]: 15: Hoare triple {6898#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7240#(and (not (<= main_~i~0 3)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16)) 0))} is VALID [2022-04-07 17:12:13,066 INFO L290 TraceCheckUtils]: 14: Hoare triple {6897#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6898#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 17:12:13,067 INFO L290 TraceCheckUtils]: 13: Hoare triple {6897#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6897#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 17:12:13,067 INFO L290 TraceCheckUtils]: 12: Hoare triple {6896#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6897#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 17:12:13,068 INFO L290 TraceCheckUtils]: 11: Hoare triple {6896#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6896#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:12:13,068 INFO L290 TraceCheckUtils]: 10: Hoare triple {6895#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6896#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:12:13,069 INFO L290 TraceCheckUtils]: 9: Hoare triple {6895#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6895#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:12:13,069 INFO L290 TraceCheckUtils]: 8: Hoare triple {6894#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {6895#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:12:13,069 INFO L290 TraceCheckUtils]: 7: Hoare triple {6894#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {6894#(= main_~i~0 0)} is VALID [2022-04-07 17:12:13,070 INFO L290 TraceCheckUtils]: 6: Hoare triple {6889#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {6894#(= main_~i~0 0)} is VALID [2022-04-07 17:12:13,070 INFO L290 TraceCheckUtils]: 5: Hoare triple {6889#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {6889#true} is VALID [2022-04-07 17:12:13,070 INFO L272 TraceCheckUtils]: 4: Hoare triple {6889#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-07 17:12:13,070 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6889#true} {6889#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-07 17:12:13,070 INFO L290 TraceCheckUtils]: 2: Hoare triple {6889#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-07 17:12:13,070 INFO L290 TraceCheckUtils]: 1: Hoare triple {6889#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6889#true} is VALID [2022-04-07 17:12:13,070 INFO L272 TraceCheckUtils]: 0: Hoare triple {6889#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6889#true} is VALID [2022-04-07 17:12:13,070 INFO L134 CoverageAnalysis]: Checked inductivity of 113 backedges. 8 proven. 80 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2022-04-07 17:12:13,070 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2102279863] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 17:12:13,070 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 17:12:13,070 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20, 19] total 30 [2022-04-07 17:12:13,071 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [381219648] [2022-04-07 17:12:13,071 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 17:12:13,071 INFO L78 Accepts]: Start accepts. Automaton has has 30 states, 29 states have (on average 2.2758620689655173) internal successors, (66), 27 states have internal predecessors, (66), 10 states have call successors, (14), 5 states have call predecessors, (14), 2 states have return successors, (10), 9 states have call predecessors, (10), 9 states have call successors, (10) Word has length 60 [2022-04-07 17:12:13,073 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:12:13,074 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 30 states, 29 states have (on average 2.2758620689655173) internal successors, (66), 27 states have internal predecessors, (66), 10 states have call successors, (14), 5 states have call predecessors, (14), 2 states have return successors, (10), 9 states have call predecessors, (10), 9 states have call successors, (10) [2022-04-07 17:12:13,158 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 90 edges. 90 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:12:13,158 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 30 states [2022-04-07 17:12:13,158 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:12:13,159 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2022-04-07 17:12:13,159 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=92, Invalid=773, Unknown=5, NotChecked=0, Total=870 [2022-04-07 17:12:13,159 INFO L87 Difference]: Start difference. First operand 91 states and 95 transitions. Second operand has 30 states, 29 states have (on average 2.2758620689655173) internal successors, (66), 27 states have internal predecessors, (66), 10 states have call successors, (14), 5 states have call predecessors, (14), 2 states have return successors, (10), 9 states have call predecessors, (10), 9 states have call successors, (10) [2022-04-07 17:12:14,605 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:12:14,605 INFO L93 Difference]: Finished difference Result 117 states and 123 transitions. [2022-04-07 17:12:14,605 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2022-04-07 17:12:14,605 INFO L78 Accepts]: Start accepts. Automaton has has 30 states, 29 states have (on average 2.2758620689655173) internal successors, (66), 27 states have internal predecessors, (66), 10 states have call successors, (14), 5 states have call predecessors, (14), 2 states have return successors, (10), 9 states have call predecessors, (10), 9 states have call successors, (10) Word has length 60 [2022-04-07 17:12:14,606 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:12:14,607 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 30 states, 29 states have (on average 2.2758620689655173) internal successors, (66), 27 states have internal predecessors, (66), 10 states have call successors, (14), 5 states have call predecessors, (14), 2 states have return successors, (10), 9 states have call predecessors, (10), 9 states have call successors, (10) [2022-04-07 17:12:14,611 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 65 transitions. [2022-04-07 17:12:14,611 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 30 states, 29 states have (on average 2.2758620689655173) internal successors, (66), 27 states have internal predecessors, (66), 10 states have call successors, (14), 5 states have call predecessors, (14), 2 states have return successors, (10), 9 states have call predecessors, (10), 9 states have call successors, (10) [2022-04-07 17:12:14,612 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 65 transitions. [2022-04-07 17:12:14,612 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 26 states and 65 transitions. [2022-04-07 17:12:14,678 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 65 edges. 65 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:12:14,681 INFO L225 Difference]: With dead ends: 117 [2022-04-07 17:12:14,681 INFO L226 Difference]: Without dead ends: 117 [2022-04-07 17:12:14,683 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 168 GetRequests, 106 SyntacticMatches, 15 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 541 ImplicationChecksByTransitivity, 31.5s TimeCoverageRelationStatistics Valid=240, Invalid=2107, Unknown=5, NotChecked=0, Total=2352 [2022-04-07 17:12:14,684 INFO L913 BasicCegarLoop]: 24 mSDtfsCounter, 65 mSDsluCounter, 145 mSDsCounter, 0 mSdLazyCounter, 715 mSolverCounterSat, 40 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 65 SdHoareTripleChecker+Valid, 169 SdHoareTripleChecker+Invalid, 827 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 40 IncrementalHoareTripleChecker+Valid, 715 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 72 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-04-07 17:12:14,685 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [65 Valid, 169 Invalid, 827 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [40 Valid, 715 Invalid, 0 Unknown, 72 Unchecked, 0.6s Time] [2022-04-07 17:12:14,685 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 117 states. [2022-04-07 17:12:14,698 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 117 to 107. [2022-04-07 17:12:14,698 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:12:14,699 INFO L82 GeneralOperation]: Start isEquivalent. First operand 117 states. Second operand has 107 states, 82 states have (on average 1.048780487804878) internal successors, (86), 85 states have internal predecessors, (86), 14 states have call successors, (14), 11 states have call predecessors, (14), 10 states have return successors, (13), 10 states have call predecessors, (13), 13 states have call successors, (13) [2022-04-07 17:12:14,699 INFO L74 IsIncluded]: Start isIncluded. First operand 117 states. Second operand has 107 states, 82 states have (on average 1.048780487804878) internal successors, (86), 85 states have internal predecessors, (86), 14 states have call successors, (14), 11 states have call predecessors, (14), 10 states have return successors, (13), 10 states have call predecessors, (13), 13 states have call successors, (13) [2022-04-07 17:12:14,699 INFO L87 Difference]: Start difference. First operand 117 states. Second operand has 107 states, 82 states have (on average 1.048780487804878) internal successors, (86), 85 states have internal predecessors, (86), 14 states have call successors, (14), 11 states have call predecessors, (14), 10 states have return successors, (13), 10 states have call predecessors, (13), 13 states have call successors, (13) [2022-04-07 17:12:14,703 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:12:14,703 INFO L93 Difference]: Finished difference Result 117 states and 123 transitions. [2022-04-07 17:12:14,703 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states and 123 transitions. [2022-04-07 17:12:14,703 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:12:14,703 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:12:14,703 INFO L74 IsIncluded]: Start isIncluded. First operand has 107 states, 82 states have (on average 1.048780487804878) internal successors, (86), 85 states have internal predecessors, (86), 14 states have call successors, (14), 11 states have call predecessors, (14), 10 states have return successors, (13), 10 states have call predecessors, (13), 13 states have call successors, (13) Second operand 117 states. [2022-04-07 17:12:14,704 INFO L87 Difference]: Start difference. First operand has 107 states, 82 states have (on average 1.048780487804878) internal successors, (86), 85 states have internal predecessors, (86), 14 states have call successors, (14), 11 states have call predecessors, (14), 10 states have return successors, (13), 10 states have call predecessors, (13), 13 states have call successors, (13) Second operand 117 states. [2022-04-07 17:12:14,707 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:12:14,707 INFO L93 Difference]: Finished difference Result 117 states and 123 transitions. [2022-04-07 17:12:14,707 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states and 123 transitions. [2022-04-07 17:12:14,707 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:12:14,707 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:12:14,708 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:12:14,708 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:12:14,708 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 107 states, 82 states have (on average 1.048780487804878) internal successors, (86), 85 states have internal predecessors, (86), 14 states have call successors, (14), 11 states have call predecessors, (14), 10 states have return successors, (13), 10 states have call predecessors, (13), 13 states have call successors, (13) [2022-04-07 17:12:14,710 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 107 states to 107 states and 113 transitions. [2022-04-07 17:12:14,710 INFO L78 Accepts]: Start accepts. Automaton has 107 states and 113 transitions. Word has length 60 [2022-04-07 17:12:14,710 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:12:14,710 INFO L478 AbstractCegarLoop]: Abstraction has 107 states and 113 transitions. [2022-04-07 17:12:14,710 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 30 states, 29 states have (on average 2.2758620689655173) internal successors, (66), 27 states have internal predecessors, (66), 10 states have call successors, (14), 5 states have call predecessors, (14), 2 states have return successors, (10), 9 states have call predecessors, (10), 9 states have call successors, (10) [2022-04-07 17:12:14,711 INFO L276 IsEmpty]: Start isEmpty. Operand 107 states and 113 transitions. [2022-04-07 17:12:14,712 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2022-04-07 17:12:14,712 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:12:14,712 INFO L499 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:12:14,734 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Forceful destruction successful, exit code 0 [2022-04-07 17:12:14,935 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable14 [2022-04-07 17:12:14,936 INFO L403 AbstractCegarLoop]: === Iteration 16 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:12:14,936 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:12:14,936 INFO L85 PathProgramCache]: Analyzing trace with hash -694372407, now seen corresponding path program 13 times [2022-04-07 17:12:14,936 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:12:14,936 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2021504526] [2022-04-07 17:12:14,936 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:12:14,936 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:12:14,971 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:12:15,194 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:12:15,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:12:15,201 INFO L290 TraceCheckUtils]: 0: Hoare triple {7835#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7793#true} is VALID [2022-04-07 17:12:15,201 INFO L290 TraceCheckUtils]: 1: Hoare triple {7793#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-07 17:12:15,201 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {7793#true} {7793#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-07 17:12:15,201 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 22 [2022-04-07 17:12:15,202 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:12:15,204 INFO L290 TraceCheckUtils]: 0: Hoare triple {7793#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7793#true} is VALID [2022-04-07 17:12:15,204 INFO L290 TraceCheckUtils]: 1: Hoare triple {7793#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-07 17:12:15,204 INFO L290 TraceCheckUtils]: 2: Hoare triple {7793#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-07 17:12:15,205 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7793#true} {7806#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7806#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:12:15,205 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 30 [2022-04-07 17:12:15,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:12:15,208 INFO L290 TraceCheckUtils]: 0: Hoare triple {7793#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7793#true} is VALID [2022-04-07 17:12:15,208 INFO L290 TraceCheckUtils]: 1: Hoare triple {7793#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-07 17:12:15,208 INFO L290 TraceCheckUtils]: 2: Hoare triple {7793#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-07 17:12:15,209 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7793#true} {7811#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7811#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:12:15,209 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 38 [2022-04-07 17:12:15,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:12:15,212 INFO L290 TraceCheckUtils]: 0: Hoare triple {7793#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7793#true} is VALID [2022-04-07 17:12:15,212 INFO L290 TraceCheckUtils]: 1: Hoare triple {7793#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-07 17:12:15,212 INFO L290 TraceCheckUtils]: 2: Hoare triple {7793#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-07 17:12:15,213 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7793#true} {7816#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7816#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:12:15,213 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 46 [2022-04-07 17:12:15,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:12:15,216 INFO L290 TraceCheckUtils]: 0: Hoare triple {7793#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7793#true} is VALID [2022-04-07 17:12:15,216 INFO L290 TraceCheckUtils]: 1: Hoare triple {7793#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-07 17:12:15,216 INFO L290 TraceCheckUtils]: 2: Hoare triple {7793#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-07 17:12:15,216 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7793#true} {7821#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7821#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:12:15,217 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 54 [2022-04-07 17:12:15,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:12:15,220 INFO L290 TraceCheckUtils]: 0: Hoare triple {7793#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7793#true} is VALID [2022-04-07 17:12:15,220 INFO L290 TraceCheckUtils]: 1: Hoare triple {7793#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-07 17:12:15,221 INFO L290 TraceCheckUtils]: 2: Hoare triple {7793#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-07 17:12:15,221 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7793#true} {7826#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7826#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:12:15,222 INFO L272 TraceCheckUtils]: 0: Hoare triple {7793#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7835#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:12:15,222 INFO L290 TraceCheckUtils]: 1: Hoare triple {7835#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7793#true} is VALID [2022-04-07 17:12:15,222 INFO L290 TraceCheckUtils]: 2: Hoare triple {7793#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-07 17:12:15,222 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7793#true} {7793#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-07 17:12:15,222 INFO L272 TraceCheckUtils]: 4: Hoare triple {7793#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-07 17:12:15,222 INFO L290 TraceCheckUtils]: 5: Hoare triple {7793#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {7793#true} is VALID [2022-04-07 17:12:15,223 INFO L290 TraceCheckUtils]: 6: Hoare triple {7793#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {7798#(= main_~i~0 0)} is VALID [2022-04-07 17:12:15,223 INFO L290 TraceCheckUtils]: 7: Hoare triple {7798#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7798#(= main_~i~0 0)} is VALID [2022-04-07 17:12:15,223 INFO L290 TraceCheckUtils]: 8: Hoare triple {7798#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7799#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:12:15,224 INFO L290 TraceCheckUtils]: 9: Hoare triple {7799#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7799#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:12:15,224 INFO L290 TraceCheckUtils]: 10: Hoare triple {7799#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7800#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:12:15,225 INFO L290 TraceCheckUtils]: 11: Hoare triple {7800#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7800#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:12:15,225 INFO L290 TraceCheckUtils]: 12: Hoare triple {7800#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7801#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 17:12:15,226 INFO L290 TraceCheckUtils]: 13: Hoare triple {7801#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7801#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 17:12:15,226 INFO L290 TraceCheckUtils]: 14: Hoare triple {7801#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7802#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 17:12:15,227 INFO L290 TraceCheckUtils]: 15: Hoare triple {7802#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7802#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 17:12:15,227 INFO L290 TraceCheckUtils]: 16: Hoare triple {7802#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7803#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 17:12:15,228 INFO L290 TraceCheckUtils]: 17: Hoare triple {7803#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7804#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 17:12:15,228 INFO L290 TraceCheckUtils]: 18: Hoare triple {7804#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7805#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-07 17:12:15,229 INFO L290 TraceCheckUtils]: 19: Hoare triple {7805#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {7805#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-07 17:12:15,229 INFO L290 TraceCheckUtils]: 20: Hoare triple {7805#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {7806#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:12:15,229 INFO L290 TraceCheckUtils]: 21: Hoare triple {7806#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7806#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:12:15,230 INFO L272 TraceCheckUtils]: 22: Hoare triple {7806#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7793#true} is VALID [2022-04-07 17:12:15,230 INFO L290 TraceCheckUtils]: 23: Hoare triple {7793#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7793#true} is VALID [2022-04-07 17:12:15,230 INFO L290 TraceCheckUtils]: 24: Hoare triple {7793#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-07 17:12:15,230 INFO L290 TraceCheckUtils]: 25: Hoare triple {7793#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-07 17:12:15,230 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {7793#true} {7806#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7806#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:12:15,231 INFO L290 TraceCheckUtils]: 27: Hoare triple {7806#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7806#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:12:15,231 INFO L290 TraceCheckUtils]: 28: Hoare triple {7806#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7811#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:12:15,232 INFO L290 TraceCheckUtils]: 29: Hoare triple {7811#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7811#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:12:15,232 INFO L272 TraceCheckUtils]: 30: Hoare triple {7811#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7793#true} is VALID [2022-04-07 17:12:15,232 INFO L290 TraceCheckUtils]: 31: Hoare triple {7793#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7793#true} is VALID [2022-04-07 17:12:15,232 INFO L290 TraceCheckUtils]: 32: Hoare triple {7793#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-07 17:12:15,232 INFO L290 TraceCheckUtils]: 33: Hoare triple {7793#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-07 17:12:15,233 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {7793#true} {7811#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7811#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:12:15,233 INFO L290 TraceCheckUtils]: 35: Hoare triple {7811#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7811#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:12:15,234 INFO L290 TraceCheckUtils]: 36: Hoare triple {7811#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7816#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:12:15,234 INFO L290 TraceCheckUtils]: 37: Hoare triple {7816#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7816#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:12:15,234 INFO L272 TraceCheckUtils]: 38: Hoare triple {7816#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7793#true} is VALID [2022-04-07 17:12:15,234 INFO L290 TraceCheckUtils]: 39: Hoare triple {7793#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7793#true} is VALID [2022-04-07 17:12:15,234 INFO L290 TraceCheckUtils]: 40: Hoare triple {7793#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-07 17:12:15,234 INFO L290 TraceCheckUtils]: 41: Hoare triple {7793#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-07 17:12:15,235 INFO L284 TraceCheckUtils]: 42: Hoare quadruple {7793#true} {7816#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7816#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:12:15,235 INFO L290 TraceCheckUtils]: 43: Hoare triple {7816#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7816#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:12:15,236 INFO L290 TraceCheckUtils]: 44: Hoare triple {7816#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7821#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:12:15,236 INFO L290 TraceCheckUtils]: 45: Hoare triple {7821#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7821#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:12:15,237 INFO L272 TraceCheckUtils]: 46: Hoare triple {7821#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7793#true} is VALID [2022-04-07 17:12:15,237 INFO L290 TraceCheckUtils]: 47: Hoare triple {7793#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7793#true} is VALID [2022-04-07 17:12:15,237 INFO L290 TraceCheckUtils]: 48: Hoare triple {7793#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-07 17:12:15,237 INFO L290 TraceCheckUtils]: 49: Hoare triple {7793#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-07 17:12:15,237 INFO L284 TraceCheckUtils]: 50: Hoare quadruple {7793#true} {7821#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7821#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:12:15,238 INFO L290 TraceCheckUtils]: 51: Hoare triple {7821#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7821#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:12:15,238 INFO L290 TraceCheckUtils]: 52: Hoare triple {7821#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7826#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:12:15,239 INFO L290 TraceCheckUtils]: 53: Hoare triple {7826#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7826#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:12:15,239 INFO L272 TraceCheckUtils]: 54: Hoare triple {7826#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7793#true} is VALID [2022-04-07 17:12:15,239 INFO L290 TraceCheckUtils]: 55: Hoare triple {7793#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7793#true} is VALID [2022-04-07 17:12:15,239 INFO L290 TraceCheckUtils]: 56: Hoare triple {7793#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-07 17:12:15,239 INFO L290 TraceCheckUtils]: 57: Hoare triple {7793#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-07 17:12:15,240 INFO L284 TraceCheckUtils]: 58: Hoare quadruple {7793#true} {7826#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7826#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:12:15,240 INFO L290 TraceCheckUtils]: 59: Hoare triple {7826#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7826#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:12:15,241 INFO L290 TraceCheckUtils]: 60: Hoare triple {7826#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7831#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:12:15,241 INFO L290 TraceCheckUtils]: 61: Hoare triple {7831#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7832#(= |main_#t~mem5| 0)} is VALID [2022-04-07 17:12:15,242 INFO L272 TraceCheckUtils]: 62: Hoare triple {7832#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7833#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:12:15,242 INFO L290 TraceCheckUtils]: 63: Hoare triple {7833#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7834#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:12:15,242 INFO L290 TraceCheckUtils]: 64: Hoare triple {7834#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {7794#false} is VALID [2022-04-07 17:12:15,243 INFO L290 TraceCheckUtils]: 65: Hoare triple {7794#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7794#false} is VALID [2022-04-07 17:12:15,243 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 10 proven. 86 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2022-04-07 17:12:15,243 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:12:15,243 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2021504526] [2022-04-07 17:12:15,243 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2021504526] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:12:15,243 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1860082824] [2022-04-07 17:12:15,243 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-04-07 17:12:15,243 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:12:15,243 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:12:15,244 INFO L229 MonitoredProcess]: Starting monitored process 15 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:12:15,245 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2022-04-07 17:12:15,303 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:12:15,304 INFO L263 TraceCheckSpWp]: Trace formula consists of 191 conjuncts, 33 conjunts are in the unsatisfiable core [2022-04-07 17:12:15,315 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:12:15,316 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:12:15,426 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-07 17:12:49,070 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2022-04-07 17:12:49,120 INFO L272 TraceCheckUtils]: 0: Hoare triple {7793#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-07 17:12:49,120 INFO L290 TraceCheckUtils]: 1: Hoare triple {7793#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7793#true} is VALID [2022-04-07 17:12:49,120 INFO L290 TraceCheckUtils]: 2: Hoare triple {7793#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-07 17:12:49,120 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7793#true} {7793#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-07 17:12:49,120 INFO L272 TraceCheckUtils]: 4: Hoare triple {7793#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-07 17:12:49,121 INFO L290 TraceCheckUtils]: 5: Hoare triple {7793#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {7793#true} is VALID [2022-04-07 17:12:49,121 INFO L290 TraceCheckUtils]: 6: Hoare triple {7793#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {7798#(= main_~i~0 0)} is VALID [2022-04-07 17:12:49,121 INFO L290 TraceCheckUtils]: 7: Hoare triple {7798#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7798#(= main_~i~0 0)} is VALID [2022-04-07 17:12:49,121 INFO L290 TraceCheckUtils]: 8: Hoare triple {7798#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7799#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:12:49,122 INFO L290 TraceCheckUtils]: 9: Hoare triple {7799#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7799#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:12:49,122 INFO L290 TraceCheckUtils]: 10: Hoare triple {7799#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7800#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:12:49,123 INFO L290 TraceCheckUtils]: 11: Hoare triple {7800#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7800#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:12:49,123 INFO L290 TraceCheckUtils]: 12: Hoare triple {7800#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7801#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 17:12:49,124 INFO L290 TraceCheckUtils]: 13: Hoare triple {7801#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7801#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 17:12:49,124 INFO L290 TraceCheckUtils]: 14: Hoare triple {7801#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7802#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 17:12:49,124 INFO L290 TraceCheckUtils]: 15: Hoare triple {7802#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7802#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 17:12:49,125 INFO L290 TraceCheckUtils]: 16: Hoare triple {7802#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7803#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 17:12:49,125 INFO L290 TraceCheckUtils]: 17: Hoare triple {7803#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7805#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-07 17:12:49,126 INFO L290 TraceCheckUtils]: 18: Hoare triple {7805#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7805#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-07 17:12:49,126 INFO L290 TraceCheckUtils]: 19: Hoare triple {7805#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {7805#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-07 17:12:49,126 INFO L290 TraceCheckUtils]: 20: Hoare triple {7805#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {7806#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:12:49,127 INFO L290 TraceCheckUtils]: 21: Hoare triple {7806#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7806#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:12:49,128 INFO L272 TraceCheckUtils]: 22: Hoare triple {7806#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} is VALID [2022-04-07 17:12:49,128 INFO L290 TraceCheckUtils]: 23: Hoare triple {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} is VALID [2022-04-07 17:12:49,128 INFO L290 TraceCheckUtils]: 24: Hoare triple {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} is VALID [2022-04-07 17:12:49,129 INFO L290 TraceCheckUtils]: 25: Hoare triple {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} is VALID [2022-04-07 17:12:49,129 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} {7806#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7806#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:12:49,129 INFO L290 TraceCheckUtils]: 27: Hoare triple {7806#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7806#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:12:49,130 INFO L290 TraceCheckUtils]: 28: Hoare triple {7806#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7924#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 17:12:49,130 INFO L290 TraceCheckUtils]: 29: Hoare triple {7924#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7924#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 17:12:49,131 INFO L272 TraceCheckUtils]: 30: Hoare triple {7924#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} is VALID [2022-04-07 17:12:49,131 INFO L290 TraceCheckUtils]: 31: Hoare triple {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} is VALID [2022-04-07 17:12:49,132 INFO L290 TraceCheckUtils]: 32: Hoare triple {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} is VALID [2022-04-07 17:12:49,132 INFO L290 TraceCheckUtils]: 33: Hoare triple {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} is VALID [2022-04-07 17:12:49,133 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} {7924#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7924#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 17:12:49,133 INFO L290 TraceCheckUtils]: 35: Hoare triple {7924#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7924#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 17:12:49,133 INFO L290 TraceCheckUtils]: 36: Hoare triple {7924#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7949#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 2))} is VALID [2022-04-07 17:12:49,134 INFO L290 TraceCheckUtils]: 37: Hoare triple {7949#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 2))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7949#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 2))} is VALID [2022-04-07 17:12:49,135 INFO L272 TraceCheckUtils]: 38: Hoare triple {7949#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 2))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} is VALID [2022-04-07 17:12:49,135 INFO L290 TraceCheckUtils]: 39: Hoare triple {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} is VALID [2022-04-07 17:12:49,135 INFO L290 TraceCheckUtils]: 40: Hoare triple {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} is VALID [2022-04-07 17:12:49,135 INFO L290 TraceCheckUtils]: 41: Hoare triple {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} is VALID [2022-04-07 17:12:49,136 INFO L284 TraceCheckUtils]: 42: Hoare quadruple {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} {7949#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7949#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 2))} is VALID [2022-04-07 17:12:49,136 INFO L290 TraceCheckUtils]: 43: Hoare triple {7949#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 2))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7949#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 2))} is VALID [2022-04-07 17:12:49,137 INFO L290 TraceCheckUtils]: 44: Hoare triple {7949#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 2))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7974#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-07 17:12:49,137 INFO L290 TraceCheckUtils]: 45: Hoare triple {7974#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7974#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-07 17:12:49,138 INFO L272 TraceCheckUtils]: 46: Hoare triple {7974#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} is VALID [2022-04-07 17:12:49,138 INFO L290 TraceCheckUtils]: 47: Hoare triple {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} is VALID [2022-04-07 17:12:49,139 INFO L290 TraceCheckUtils]: 48: Hoare triple {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} is VALID [2022-04-07 17:12:49,139 INFO L290 TraceCheckUtils]: 49: Hoare triple {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} is VALID [2022-04-07 17:12:49,139 INFO L284 TraceCheckUtils]: 50: Hoare quadruple {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} {7974#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7974#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-07 17:12:49,140 INFO L290 TraceCheckUtils]: 51: Hoare triple {7974#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7974#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-07 17:12:49,140 INFO L290 TraceCheckUtils]: 52: Hoare triple {7974#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7999#(and (= 3 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-07 17:12:49,141 INFO L290 TraceCheckUtils]: 53: Hoare triple {7999#(and (= 3 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7999#(and (= 3 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-07 17:12:49,141 INFO L272 TraceCheckUtils]: 54: Hoare triple {7999#(and (= 3 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} is VALID [2022-04-07 17:12:49,142 INFO L290 TraceCheckUtils]: 55: Hoare triple {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} is VALID [2022-04-07 17:12:49,142 INFO L290 TraceCheckUtils]: 56: Hoare triple {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} is VALID [2022-04-07 17:12:49,142 INFO L290 TraceCheckUtils]: 57: Hoare triple {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} is VALID [2022-04-07 17:12:49,143 INFO L284 TraceCheckUtils]: 58: Hoare quadruple {7905#(exists ((v_main_~x~0.base_BEFORE_CALL_43 Int) (v_main_~x~0.offset_BEFORE_CALL_43 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_43) (+ 20 v_main_~x~0.offset_BEFORE_CALL_43)) 0))} {7999#(and (= 3 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7999#(and (= 3 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-07 17:12:49,143 INFO L290 TraceCheckUtils]: 59: Hoare triple {7999#(and (= 3 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7999#(and (= 3 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-07 17:12:49,144 INFO L290 TraceCheckUtils]: 60: Hoare triple {7999#(and (= 3 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {8024#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 5 main_~i~1))} is VALID [2022-04-07 17:12:49,144 INFO L290 TraceCheckUtils]: 61: Hoare triple {8024#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 5 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7832#(= |main_#t~mem5| 0)} is VALID [2022-04-07 17:12:49,145 INFO L272 TraceCheckUtils]: 62: Hoare triple {7832#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8031#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:12:49,145 INFO L290 TraceCheckUtils]: 63: Hoare triple {8031#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8035#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:12:49,145 INFO L290 TraceCheckUtils]: 64: Hoare triple {8035#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {7794#false} is VALID [2022-04-07 17:12:49,145 INFO L290 TraceCheckUtils]: 65: Hoare triple {7794#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7794#false} is VALID [2022-04-07 17:12:49,146 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 96 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2022-04-07 17:12:49,146 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 17:12:51,376 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2022-04-07 17:12:51,386 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2022-04-07 17:12:51,505 INFO L290 TraceCheckUtils]: 65: Hoare triple {7794#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7794#false} is VALID [2022-04-07 17:12:51,505 INFO L290 TraceCheckUtils]: 64: Hoare triple {8035#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {7794#false} is VALID [2022-04-07 17:12:51,506 INFO L290 TraceCheckUtils]: 63: Hoare triple {8031#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8035#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:12:51,506 INFO L272 TraceCheckUtils]: 62: Hoare triple {7832#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8031#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:12:51,507 INFO L290 TraceCheckUtils]: 61: Hoare triple {7831#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7832#(= |main_#t~mem5| 0)} is VALID [2022-04-07 17:12:51,507 INFO L290 TraceCheckUtils]: 60: Hoare triple {7826#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7831#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:12:51,508 INFO L290 TraceCheckUtils]: 59: Hoare triple {7826#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7826#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:12:51,508 INFO L284 TraceCheckUtils]: 58: Hoare quadruple {7793#true} {7826#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7826#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:12:51,508 INFO L290 TraceCheckUtils]: 57: Hoare triple {7793#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-07 17:12:51,509 INFO L290 TraceCheckUtils]: 56: Hoare triple {7793#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-07 17:12:51,509 INFO L290 TraceCheckUtils]: 55: Hoare triple {7793#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7793#true} is VALID [2022-04-07 17:12:51,509 INFO L272 TraceCheckUtils]: 54: Hoare triple {7826#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7793#true} is VALID [2022-04-07 17:12:51,509 INFO L290 TraceCheckUtils]: 53: Hoare triple {7826#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7826#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:12:51,510 INFO L290 TraceCheckUtils]: 52: Hoare triple {7821#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7826#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:12:51,510 INFO L290 TraceCheckUtils]: 51: Hoare triple {7821#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7821#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:12:51,511 INFO L284 TraceCheckUtils]: 50: Hoare quadruple {7793#true} {7821#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7821#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:12:51,511 INFO L290 TraceCheckUtils]: 49: Hoare triple {7793#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-07 17:12:51,511 INFO L290 TraceCheckUtils]: 48: Hoare triple {7793#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-07 17:12:51,511 INFO L290 TraceCheckUtils]: 47: Hoare triple {7793#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7793#true} is VALID [2022-04-07 17:12:51,511 INFO L272 TraceCheckUtils]: 46: Hoare triple {7821#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7793#true} is VALID [2022-04-07 17:12:51,512 INFO L290 TraceCheckUtils]: 45: Hoare triple {7821#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7821#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:12:51,513 INFO L290 TraceCheckUtils]: 44: Hoare triple {7816#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7821#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:12:51,513 INFO L290 TraceCheckUtils]: 43: Hoare triple {7816#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7816#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:12:51,514 INFO L284 TraceCheckUtils]: 42: Hoare quadruple {7793#true} {7816#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7816#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:12:51,514 INFO L290 TraceCheckUtils]: 41: Hoare triple {7793#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-07 17:12:51,514 INFO L290 TraceCheckUtils]: 40: Hoare triple {7793#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-07 17:12:51,514 INFO L290 TraceCheckUtils]: 39: Hoare triple {7793#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7793#true} is VALID [2022-04-07 17:12:51,514 INFO L272 TraceCheckUtils]: 38: Hoare triple {7816#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7793#true} is VALID [2022-04-07 17:12:51,514 INFO L290 TraceCheckUtils]: 37: Hoare triple {7816#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7816#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:12:51,515 INFO L290 TraceCheckUtils]: 36: Hoare triple {7811#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7816#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:12:51,516 INFO L290 TraceCheckUtils]: 35: Hoare triple {7811#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {7811#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:12:51,516 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {7793#true} {7811#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7811#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:12:51,516 INFO L290 TraceCheckUtils]: 33: Hoare triple {7793#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-07 17:12:51,516 INFO L290 TraceCheckUtils]: 32: Hoare triple {7793#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-07 17:12:51,516 INFO L290 TraceCheckUtils]: 31: Hoare triple {7793#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7793#true} is VALID [2022-04-07 17:12:51,517 INFO L272 TraceCheckUtils]: 30: Hoare triple {7811#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7793#true} is VALID [2022-04-07 17:12:51,517 INFO L290 TraceCheckUtils]: 29: Hoare triple {7811#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {7811#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:12:51,518 INFO L290 TraceCheckUtils]: 28: Hoare triple {8153#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {7811#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:12:51,518 INFO L290 TraceCheckUtils]: 27: Hoare triple {8153#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {8153#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 17:12:51,519 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {7793#true} {8153#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8153#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 17:12:51,519 INFO L290 TraceCheckUtils]: 25: Hoare triple {7793#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-07 17:12:51,519 INFO L290 TraceCheckUtils]: 24: Hoare triple {7793#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-07 17:12:51,519 INFO L290 TraceCheckUtils]: 23: Hoare triple {7793#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7793#true} is VALID [2022-04-07 17:12:51,519 INFO L272 TraceCheckUtils]: 22: Hoare triple {8153#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {7793#true} is VALID [2022-04-07 17:12:51,520 INFO L290 TraceCheckUtils]: 21: Hoare triple {8153#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8153#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 17:12:51,520 INFO L290 TraceCheckUtils]: 20: Hoare triple {7805#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {8153#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 17:12:51,520 INFO L290 TraceCheckUtils]: 19: Hoare triple {7805#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {7805#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-07 17:12:51,521 INFO L290 TraceCheckUtils]: 18: Hoare triple {7805#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7805#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-07 17:12:51,521 INFO L290 TraceCheckUtils]: 17: Hoare triple {7803#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7805#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-07 17:12:51,522 INFO L290 TraceCheckUtils]: 16: Hoare triple {7802#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7803#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 17:12:51,522 INFO L290 TraceCheckUtils]: 15: Hoare triple {7802#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7802#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 17:12:51,523 INFO L290 TraceCheckUtils]: 14: Hoare triple {7801#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7802#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 17:12:51,524 INFO L290 TraceCheckUtils]: 13: Hoare triple {7801#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7801#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 17:12:51,524 INFO L290 TraceCheckUtils]: 12: Hoare triple {7800#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7801#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 17:12:51,525 INFO L290 TraceCheckUtils]: 11: Hoare triple {7800#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7800#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:12:51,525 INFO L290 TraceCheckUtils]: 10: Hoare triple {7799#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7800#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:12:51,526 INFO L290 TraceCheckUtils]: 9: Hoare triple {7799#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7799#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:12:51,526 INFO L290 TraceCheckUtils]: 8: Hoare triple {7798#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {7799#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:12:51,526 INFO L290 TraceCheckUtils]: 7: Hoare triple {7798#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {7798#(= main_~i~0 0)} is VALID [2022-04-07 17:12:51,527 INFO L290 TraceCheckUtils]: 6: Hoare triple {7793#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {7798#(= main_~i~0 0)} is VALID [2022-04-07 17:12:51,527 INFO L290 TraceCheckUtils]: 5: Hoare triple {7793#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {7793#true} is VALID [2022-04-07 17:12:51,527 INFO L272 TraceCheckUtils]: 4: Hoare triple {7793#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-07 17:12:51,527 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7793#true} {7793#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-07 17:12:51,527 INFO L290 TraceCheckUtils]: 2: Hoare triple {7793#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-07 17:12:51,527 INFO L290 TraceCheckUtils]: 1: Hoare triple {7793#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7793#true} is VALID [2022-04-07 17:12:51,527 INFO L272 TraceCheckUtils]: 0: Hoare triple {7793#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7793#true} is VALID [2022-04-07 17:12:51,528 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 10 proven. 86 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2022-04-07 17:12:51,528 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1860082824] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 17:12:51,528 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 17:12:51,528 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 19, 18] total 29 [2022-04-07 17:12:51,528 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1602896701] [2022-04-07 17:12:51,528 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 17:12:51,530 INFO L78 Accepts]: Start accepts. Automaton has has 29 states, 28 states have (on average 2.357142857142857) internal successors, (66), 26 states have internal predecessors, (66), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) Word has length 66 [2022-04-07 17:12:51,531 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:12:51,531 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 29 states, 28 states have (on average 2.357142857142857) internal successors, (66), 26 states have internal predecessors, (66), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) [2022-04-07 17:12:51,609 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 94 edges. 94 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:12:51,609 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 29 states [2022-04-07 17:12:51,609 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:12:51,609 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2022-04-07 17:12:51,610 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=79, Invalid=727, Unknown=6, NotChecked=0, Total=812 [2022-04-07 17:12:51,610 INFO L87 Difference]: Start difference. First operand 107 states and 113 transitions. Second operand has 29 states, 28 states have (on average 2.357142857142857) internal successors, (66), 26 states have internal predecessors, (66), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) [2022-04-07 17:12:53,376 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:12:53,377 INFO L93 Difference]: Finished difference Result 132 states and 136 transitions. [2022-04-07 17:12:53,377 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2022-04-07 17:12:53,377 INFO L78 Accepts]: Start accepts. Automaton has has 29 states, 28 states have (on average 2.357142857142857) internal successors, (66), 26 states have internal predecessors, (66), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) Word has length 66 [2022-04-07 17:12:53,377 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:12:53,377 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 28 states have (on average 2.357142857142857) internal successors, (66), 26 states have internal predecessors, (66), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) [2022-04-07 17:12:53,384 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 72 transitions. [2022-04-07 17:12:53,384 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 28 states have (on average 2.357142857142857) internal successors, (66), 26 states have internal predecessors, (66), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) [2022-04-07 17:12:53,385 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 72 transitions. [2022-04-07 17:12:53,385 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 28 states and 72 transitions. [2022-04-07 17:12:53,456 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 72 edges. 72 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:12:53,458 INFO L225 Difference]: With dead ends: 132 [2022-04-07 17:12:53,458 INFO L226 Difference]: Without dead ends: 132 [2022-04-07 17:12:53,458 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 187 GetRequests, 126 SyntacticMatches, 14 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 503 ImplicationChecksByTransitivity, 35.5s TimeCoverageRelationStatistics Valid=211, Invalid=2135, Unknown=6, NotChecked=0, Total=2352 [2022-04-07 17:12:53,459 INFO L913 BasicCegarLoop]: 29 mSDtfsCounter, 54 mSDsluCounter, 194 mSDsCounter, 0 mSdLazyCounter, 911 mSolverCounterSat, 19 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 55 SdHoareTripleChecker+Valid, 223 SdHoareTripleChecker+Invalid, 1019 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 19 IncrementalHoareTripleChecker+Valid, 911 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 89 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2022-04-07 17:12:53,459 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [55 Valid, 223 Invalid, 1019 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [19 Valid, 911 Invalid, 0 Unknown, 89 Unchecked, 0.7s Time] [2022-04-07 17:12:53,459 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 132 states. [2022-04-07 17:12:53,462 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 132 to 99. [2022-04-07 17:12:53,462 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:12:53,463 INFO L82 GeneralOperation]: Start isEquivalent. First operand 132 states. Second operand has 99 states, 76 states have (on average 1.0526315789473684) internal successors, (80), 79 states have internal predecessors, (80), 12 states have call successors, (12), 11 states have call predecessors, (12), 10 states have return successors, (11), 8 states have call predecessors, (11), 11 states have call successors, (11) [2022-04-07 17:12:53,463 INFO L74 IsIncluded]: Start isIncluded. First operand 132 states. Second operand has 99 states, 76 states have (on average 1.0526315789473684) internal successors, (80), 79 states have internal predecessors, (80), 12 states have call successors, (12), 11 states have call predecessors, (12), 10 states have return successors, (11), 8 states have call predecessors, (11), 11 states have call successors, (11) [2022-04-07 17:12:53,463 INFO L87 Difference]: Start difference. First operand 132 states. Second operand has 99 states, 76 states have (on average 1.0526315789473684) internal successors, (80), 79 states have internal predecessors, (80), 12 states have call successors, (12), 11 states have call predecessors, (12), 10 states have return successors, (11), 8 states have call predecessors, (11), 11 states have call successors, (11) [2022-04-07 17:12:53,465 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:12:53,465 INFO L93 Difference]: Finished difference Result 132 states and 136 transitions. [2022-04-07 17:12:53,465 INFO L276 IsEmpty]: Start isEmpty. Operand 132 states and 136 transitions. [2022-04-07 17:12:53,466 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:12:53,466 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:12:53,466 INFO L74 IsIncluded]: Start isIncluded. First operand has 99 states, 76 states have (on average 1.0526315789473684) internal successors, (80), 79 states have internal predecessors, (80), 12 states have call successors, (12), 11 states have call predecessors, (12), 10 states have return successors, (11), 8 states have call predecessors, (11), 11 states have call successors, (11) Second operand 132 states. [2022-04-07 17:12:53,466 INFO L87 Difference]: Start difference. First operand has 99 states, 76 states have (on average 1.0526315789473684) internal successors, (80), 79 states have internal predecessors, (80), 12 states have call successors, (12), 11 states have call predecessors, (12), 10 states have return successors, (11), 8 states have call predecessors, (11), 11 states have call successors, (11) Second operand 132 states. [2022-04-07 17:12:53,468 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:12:53,468 INFO L93 Difference]: Finished difference Result 132 states and 136 transitions. [2022-04-07 17:12:53,469 INFO L276 IsEmpty]: Start isEmpty. Operand 132 states and 136 transitions. [2022-04-07 17:12:53,469 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:12:53,469 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:12:53,469 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:12:53,469 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:12:53,469 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 99 states, 76 states have (on average 1.0526315789473684) internal successors, (80), 79 states have internal predecessors, (80), 12 states have call successors, (12), 11 states have call predecessors, (12), 10 states have return successors, (11), 8 states have call predecessors, (11), 11 states have call successors, (11) [2022-04-07 17:12:53,471 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 103 transitions. [2022-04-07 17:12:53,471 INFO L78 Accepts]: Start accepts. Automaton has 99 states and 103 transitions. Word has length 66 [2022-04-07 17:12:53,471 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:12:53,471 INFO L478 AbstractCegarLoop]: Abstraction has 99 states and 103 transitions. [2022-04-07 17:12:53,471 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 29 states, 28 states have (on average 2.357142857142857) internal successors, (66), 26 states have internal predecessors, (66), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) [2022-04-07 17:12:53,471 INFO L276 IsEmpty]: Start isEmpty. Operand 99 states and 103 transitions. [2022-04-07 17:12:53,472 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2022-04-07 17:12:53,472 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:12:53,472 INFO L499 BasicCegarLoop]: trace histogram [7, 7, 6, 6, 6, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:12:53,499 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Forceful destruction successful, exit code 0 [2022-04-07 17:12:53,691 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15,15 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:12:53,691 INFO L403 AbstractCegarLoop]: === Iteration 17 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:12:53,691 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:12:53,691 INFO L85 PathProgramCache]: Analyzing trace with hash 1865758983, now seen corresponding path program 14 times [2022-04-07 17:12:53,692 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:12:53,692 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1776040275] [2022-04-07 17:12:53,692 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:12:53,692 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:12:53,713 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:12:53,944 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:12:53,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:12:53,949 INFO L290 TraceCheckUtils]: 0: Hoare triple {8823#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {8780#true} is VALID [2022-04-07 17:12:53,949 INFO L290 TraceCheckUtils]: 1: Hoare triple {8780#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-07 17:12:53,949 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {8780#true} {8780#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-07 17:12:53,949 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 24 [2022-04-07 17:12:53,950 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:12:53,952 INFO L290 TraceCheckUtils]: 0: Hoare triple {8780#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8780#true} is VALID [2022-04-07 17:12:53,952 INFO L290 TraceCheckUtils]: 1: Hoare triple {8780#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-07 17:12:53,952 INFO L290 TraceCheckUtils]: 2: Hoare triple {8780#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-07 17:12:53,953 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8780#true} {8794#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8794#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:12:53,953 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 32 [2022-04-07 17:12:53,954 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:12:53,958 INFO L290 TraceCheckUtils]: 0: Hoare triple {8780#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8780#true} is VALID [2022-04-07 17:12:53,958 INFO L290 TraceCheckUtils]: 1: Hoare triple {8780#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-07 17:12:53,958 INFO L290 TraceCheckUtils]: 2: Hoare triple {8780#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-07 17:12:53,958 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8780#true} {8799#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8799#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:12:53,959 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 40 [2022-04-07 17:12:53,959 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:12:53,963 INFO L290 TraceCheckUtils]: 0: Hoare triple {8780#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8780#true} is VALID [2022-04-07 17:12:53,963 INFO L290 TraceCheckUtils]: 1: Hoare triple {8780#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-07 17:12:53,963 INFO L290 TraceCheckUtils]: 2: Hoare triple {8780#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-07 17:12:53,964 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8780#true} {8804#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8804#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:12:53,964 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 48 [2022-04-07 17:12:53,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:12:53,966 INFO L290 TraceCheckUtils]: 0: Hoare triple {8780#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8780#true} is VALID [2022-04-07 17:12:53,966 INFO L290 TraceCheckUtils]: 1: Hoare triple {8780#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-07 17:12:53,967 INFO L290 TraceCheckUtils]: 2: Hoare triple {8780#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-07 17:12:53,967 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8780#true} {8809#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8809#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:12:53,967 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 56 [2022-04-07 17:12:53,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:12:53,977 INFO L290 TraceCheckUtils]: 0: Hoare triple {8780#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8780#true} is VALID [2022-04-07 17:12:53,977 INFO L290 TraceCheckUtils]: 1: Hoare triple {8780#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-07 17:12:53,977 INFO L290 TraceCheckUtils]: 2: Hoare triple {8780#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-07 17:12:53,978 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8780#true} {8814#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8814#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:12:53,978 INFO L272 TraceCheckUtils]: 0: Hoare triple {8780#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8823#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:12:53,978 INFO L290 TraceCheckUtils]: 1: Hoare triple {8823#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {8780#true} is VALID [2022-04-07 17:12:53,978 INFO L290 TraceCheckUtils]: 2: Hoare triple {8780#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-07 17:12:53,978 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8780#true} {8780#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-07 17:12:53,979 INFO L272 TraceCheckUtils]: 4: Hoare triple {8780#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-07 17:12:53,979 INFO L290 TraceCheckUtils]: 5: Hoare triple {8780#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {8780#true} is VALID [2022-04-07 17:12:53,979 INFO L290 TraceCheckUtils]: 6: Hoare triple {8780#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {8785#(= main_~i~0 0)} is VALID [2022-04-07 17:12:53,979 INFO L290 TraceCheckUtils]: 7: Hoare triple {8785#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8785#(= main_~i~0 0)} is VALID [2022-04-07 17:12:53,980 INFO L290 TraceCheckUtils]: 8: Hoare triple {8785#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8786#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:12:53,980 INFO L290 TraceCheckUtils]: 9: Hoare triple {8786#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8786#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:12:53,980 INFO L290 TraceCheckUtils]: 10: Hoare triple {8786#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8787#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:12:53,981 INFO L290 TraceCheckUtils]: 11: Hoare triple {8787#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8787#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:12:53,981 INFO L290 TraceCheckUtils]: 12: Hoare triple {8787#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8788#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 17:12:53,982 INFO L290 TraceCheckUtils]: 13: Hoare triple {8788#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8788#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 17:12:53,982 INFO L290 TraceCheckUtils]: 14: Hoare triple {8788#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8789#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 17:12:53,982 INFO L290 TraceCheckUtils]: 15: Hoare triple {8789#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8789#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 17:12:53,983 INFO L290 TraceCheckUtils]: 16: Hoare triple {8789#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8790#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 17:12:53,983 INFO L290 TraceCheckUtils]: 17: Hoare triple {8790#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8791#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 17:12:53,984 INFO L290 TraceCheckUtils]: 18: Hoare triple {8791#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8792#(and (not (= (+ main_~x~0.offset 20) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-07 17:12:53,985 INFO L290 TraceCheckUtils]: 19: Hoare triple {8792#(and (not (= (+ main_~x~0.offset 20) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8793#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-07 17:12:53,985 INFO L290 TraceCheckUtils]: 20: Hoare triple {8793#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8793#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-07 17:12:53,985 INFO L290 TraceCheckUtils]: 21: Hoare triple {8793#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {8793#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-07 17:12:53,985 INFO L290 TraceCheckUtils]: 22: Hoare triple {8793#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {8794#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:12:53,986 INFO L290 TraceCheckUtils]: 23: Hoare triple {8794#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8794#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:12:53,986 INFO L272 TraceCheckUtils]: 24: Hoare triple {8794#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8780#true} is VALID [2022-04-07 17:12:53,986 INFO L290 TraceCheckUtils]: 25: Hoare triple {8780#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8780#true} is VALID [2022-04-07 17:12:53,986 INFO L290 TraceCheckUtils]: 26: Hoare triple {8780#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-07 17:12:53,986 INFO L290 TraceCheckUtils]: 27: Hoare triple {8780#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-07 17:12:53,987 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {8780#true} {8794#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8794#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:12:53,987 INFO L290 TraceCheckUtils]: 29: Hoare triple {8794#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {8794#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:12:53,987 INFO L290 TraceCheckUtils]: 30: Hoare triple {8794#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {8799#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:12:53,988 INFO L290 TraceCheckUtils]: 31: Hoare triple {8799#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8799#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:12:53,988 INFO L272 TraceCheckUtils]: 32: Hoare triple {8799#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8780#true} is VALID [2022-04-07 17:12:53,988 INFO L290 TraceCheckUtils]: 33: Hoare triple {8780#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8780#true} is VALID [2022-04-07 17:12:53,988 INFO L290 TraceCheckUtils]: 34: Hoare triple {8780#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-07 17:12:53,988 INFO L290 TraceCheckUtils]: 35: Hoare triple {8780#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-07 17:12:53,989 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {8780#true} {8799#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8799#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:12:53,989 INFO L290 TraceCheckUtils]: 37: Hoare triple {8799#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {8799#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:12:53,989 INFO L290 TraceCheckUtils]: 38: Hoare triple {8799#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {8804#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:12:53,990 INFO L290 TraceCheckUtils]: 39: Hoare triple {8804#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8804#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:12:53,990 INFO L272 TraceCheckUtils]: 40: Hoare triple {8804#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8780#true} is VALID [2022-04-07 17:12:53,990 INFO L290 TraceCheckUtils]: 41: Hoare triple {8780#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8780#true} is VALID [2022-04-07 17:12:53,990 INFO L290 TraceCheckUtils]: 42: Hoare triple {8780#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-07 17:12:53,990 INFO L290 TraceCheckUtils]: 43: Hoare triple {8780#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-07 17:12:53,991 INFO L284 TraceCheckUtils]: 44: Hoare quadruple {8780#true} {8804#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8804#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:12:53,991 INFO L290 TraceCheckUtils]: 45: Hoare triple {8804#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {8804#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:12:53,992 INFO L290 TraceCheckUtils]: 46: Hoare triple {8804#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {8809#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:12:53,992 INFO L290 TraceCheckUtils]: 47: Hoare triple {8809#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8809#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:12:53,992 INFO L272 TraceCheckUtils]: 48: Hoare triple {8809#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8780#true} is VALID [2022-04-07 17:12:53,992 INFO L290 TraceCheckUtils]: 49: Hoare triple {8780#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8780#true} is VALID [2022-04-07 17:12:53,992 INFO L290 TraceCheckUtils]: 50: Hoare triple {8780#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-07 17:12:53,992 INFO L290 TraceCheckUtils]: 51: Hoare triple {8780#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-07 17:12:53,993 INFO L284 TraceCheckUtils]: 52: Hoare quadruple {8780#true} {8809#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8809#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:12:53,993 INFO L290 TraceCheckUtils]: 53: Hoare triple {8809#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {8809#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:12:53,994 INFO L290 TraceCheckUtils]: 54: Hoare triple {8809#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {8814#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:12:53,994 INFO L290 TraceCheckUtils]: 55: Hoare triple {8814#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8814#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:12:53,994 INFO L272 TraceCheckUtils]: 56: Hoare triple {8814#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8780#true} is VALID [2022-04-07 17:12:53,994 INFO L290 TraceCheckUtils]: 57: Hoare triple {8780#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8780#true} is VALID [2022-04-07 17:12:53,994 INFO L290 TraceCheckUtils]: 58: Hoare triple {8780#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-07 17:12:53,994 INFO L290 TraceCheckUtils]: 59: Hoare triple {8780#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-07 17:12:53,995 INFO L284 TraceCheckUtils]: 60: Hoare quadruple {8780#true} {8814#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8814#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:12:53,995 INFO L290 TraceCheckUtils]: 61: Hoare triple {8814#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {8814#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:12:53,996 INFO L290 TraceCheckUtils]: 62: Hoare triple {8814#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {8819#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:12:53,996 INFO L290 TraceCheckUtils]: 63: Hoare triple {8819#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8820#(= |main_#t~mem5| 0)} is VALID [2022-04-07 17:12:53,996 INFO L272 TraceCheckUtils]: 64: Hoare triple {8820#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8821#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:12:53,997 INFO L290 TraceCheckUtils]: 65: Hoare triple {8821#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8822#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:12:53,997 INFO L290 TraceCheckUtils]: 66: Hoare triple {8822#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {8781#false} is VALID [2022-04-07 17:12:53,997 INFO L290 TraceCheckUtils]: 67: Hoare triple {8781#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8781#false} is VALID [2022-04-07 17:12:53,997 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 10 proven. 99 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2022-04-07 17:12:53,998 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:12:53,998 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1776040275] [2022-04-07 17:12:53,998 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1776040275] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:12:53,998 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1083211716] [2022-04-07 17:12:53,998 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-07 17:12:53,998 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:12:53,998 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:12:53,999 INFO L229 MonitoredProcess]: Starting monitored process 16 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:12:54,000 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2022-04-07 17:12:54,067 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-07 17:12:54,067 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 17:12:54,068 INFO L263 TraceCheckSpWp]: Trace formula consists of 198 conjuncts, 36 conjunts are in the unsatisfiable core [2022-04-07 17:12:54,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:12:54,081 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:12:54,170 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-07 17:12:54,381 INFO L356 Elim1Store]: treesize reduction 37, result has 22.9 percent of original size [2022-04-07 17:12:54,381 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 27 treesize of output 26 [2022-04-07 17:13:29,782 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2022-04-07 17:13:29,833 INFO L272 TraceCheckUtils]: 0: Hoare triple {8780#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-07 17:13:29,833 INFO L290 TraceCheckUtils]: 1: Hoare triple {8780#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {8780#true} is VALID [2022-04-07 17:13:29,833 INFO L290 TraceCheckUtils]: 2: Hoare triple {8780#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-07 17:13:29,833 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8780#true} {8780#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-07 17:13:29,833 INFO L272 TraceCheckUtils]: 4: Hoare triple {8780#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-07 17:13:29,833 INFO L290 TraceCheckUtils]: 5: Hoare triple {8780#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {8780#true} is VALID [2022-04-07 17:13:29,834 INFO L290 TraceCheckUtils]: 6: Hoare triple {8780#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {8785#(= main_~i~0 0)} is VALID [2022-04-07 17:13:29,834 INFO L290 TraceCheckUtils]: 7: Hoare triple {8785#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8785#(= main_~i~0 0)} is VALID [2022-04-07 17:13:29,834 INFO L290 TraceCheckUtils]: 8: Hoare triple {8785#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8786#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:13:29,835 INFO L290 TraceCheckUtils]: 9: Hoare triple {8786#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8786#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:13:29,835 INFO L290 TraceCheckUtils]: 10: Hoare triple {8786#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8787#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:13:29,835 INFO L290 TraceCheckUtils]: 11: Hoare triple {8787#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8787#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:13:29,836 INFO L290 TraceCheckUtils]: 12: Hoare triple {8787#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8788#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 17:13:29,836 INFO L290 TraceCheckUtils]: 13: Hoare triple {8788#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8788#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 17:13:29,837 INFO L290 TraceCheckUtils]: 14: Hoare triple {8788#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8789#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 17:13:29,837 INFO L290 TraceCheckUtils]: 15: Hoare triple {8789#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8789#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 17:13:29,837 INFO L290 TraceCheckUtils]: 16: Hoare triple {8789#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8790#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 17:13:29,838 INFO L290 TraceCheckUtils]: 17: Hoare triple {8790#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8791#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 17:13:29,839 INFO L290 TraceCheckUtils]: 18: Hoare triple {8791#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8881#(exists ((v_main_~i~0_123 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_123))) 0) (<= v_main_~i~0_123 5) (<= 5 v_main_~i~0_123) (<= (+ v_main_~i~0_123 1) main_~i~0)))} is VALID [2022-04-07 17:13:29,840 INFO L290 TraceCheckUtils]: 19: Hoare triple {8881#(exists ((v_main_~i~0_123 Int)) (and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_123))) 0) (<= v_main_~i~0_123 5) (<= 5 v_main_~i~0_123) (<= (+ v_main_~i~0_123 1) main_~i~0)))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8793#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-07 17:13:29,840 INFO L290 TraceCheckUtils]: 20: Hoare triple {8793#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8793#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-07 17:13:29,840 INFO L290 TraceCheckUtils]: 21: Hoare triple {8793#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {8793#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-07 17:13:29,841 INFO L290 TraceCheckUtils]: 22: Hoare triple {8793#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {8794#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:13:29,841 INFO L290 TraceCheckUtils]: 23: Hoare triple {8794#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8794#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:13:29,842 INFO L272 TraceCheckUtils]: 24: Hoare triple {8794#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} is VALID [2022-04-07 17:13:29,845 INFO L290 TraceCheckUtils]: 25: Hoare triple {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} is VALID [2022-04-07 17:13:29,846 INFO L290 TraceCheckUtils]: 26: Hoare triple {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} is VALID [2022-04-07 17:13:29,846 INFO L290 TraceCheckUtils]: 27: Hoare triple {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} is VALID [2022-04-07 17:13:29,847 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} {8794#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8794#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:13:29,847 INFO L290 TraceCheckUtils]: 29: Hoare triple {8794#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {8794#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:13:29,847 INFO L290 TraceCheckUtils]: 30: Hoare triple {8794#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {8919#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 17:13:29,848 INFO L290 TraceCheckUtils]: 31: Hoare triple {8919#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8919#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 17:13:29,849 INFO L272 TraceCheckUtils]: 32: Hoare triple {8919#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} is VALID [2022-04-07 17:13:29,849 INFO L290 TraceCheckUtils]: 33: Hoare triple {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} is VALID [2022-04-07 17:13:29,849 INFO L290 TraceCheckUtils]: 34: Hoare triple {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} is VALID [2022-04-07 17:13:29,849 INFO L290 TraceCheckUtils]: 35: Hoare triple {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} is VALID [2022-04-07 17:13:29,850 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} {8919#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8919#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 17:13:29,850 INFO L290 TraceCheckUtils]: 37: Hoare triple {8919#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {8919#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 17:13:29,851 INFO L290 TraceCheckUtils]: 38: Hoare triple {8919#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 0 (+ (- 1) main_~i~1)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {8944#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-07 17:13:29,851 INFO L290 TraceCheckUtils]: 39: Hoare triple {8944#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8944#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-07 17:13:29,852 INFO L272 TraceCheckUtils]: 40: Hoare triple {8944#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} is VALID [2022-04-07 17:13:29,852 INFO L290 TraceCheckUtils]: 41: Hoare triple {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} is VALID [2022-04-07 17:13:29,853 INFO L290 TraceCheckUtils]: 42: Hoare triple {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} is VALID [2022-04-07 17:13:29,853 INFO L290 TraceCheckUtils]: 43: Hoare triple {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} is VALID [2022-04-07 17:13:29,853 INFO L284 TraceCheckUtils]: 44: Hoare quadruple {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} {8944#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8944#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-07 17:13:29,854 INFO L290 TraceCheckUtils]: 45: Hoare triple {8944#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {8944#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-07 17:13:29,854 INFO L290 TraceCheckUtils]: 46: Hoare triple {8944#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {8969#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= (+ main_~i~1 (- 3)) 0))} is VALID [2022-04-07 17:13:29,855 INFO L290 TraceCheckUtils]: 47: Hoare triple {8969#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= (+ main_~i~1 (- 3)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8969#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= (+ main_~i~1 (- 3)) 0))} is VALID [2022-04-07 17:13:29,855 INFO L272 TraceCheckUtils]: 48: Hoare triple {8969#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= (+ main_~i~1 (- 3)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} is VALID [2022-04-07 17:13:29,856 INFO L290 TraceCheckUtils]: 49: Hoare triple {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} is VALID [2022-04-07 17:13:29,856 INFO L290 TraceCheckUtils]: 50: Hoare triple {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} is VALID [2022-04-07 17:13:29,856 INFO L290 TraceCheckUtils]: 51: Hoare triple {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} is VALID [2022-04-07 17:13:29,857 INFO L284 TraceCheckUtils]: 52: Hoare quadruple {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} {8969#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= (+ main_~i~1 (- 3)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8969#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= (+ main_~i~1 (- 3)) 0))} is VALID [2022-04-07 17:13:29,857 INFO L290 TraceCheckUtils]: 53: Hoare triple {8969#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= (+ main_~i~1 (- 3)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {8969#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= (+ main_~i~1 (- 3)) 0))} is VALID [2022-04-07 17:13:29,857 INFO L290 TraceCheckUtils]: 54: Hoare triple {8969#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= (+ main_~i~1 (- 3)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {8994#(and (= 0 (+ main_~i~1 (- 4))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-07 17:13:29,858 INFO L290 TraceCheckUtils]: 55: Hoare triple {8994#(and (= 0 (+ main_~i~1 (- 4))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8994#(and (= 0 (+ main_~i~1 (- 4))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-07 17:13:29,859 INFO L272 TraceCheckUtils]: 56: Hoare triple {8994#(and (= 0 (+ main_~i~1 (- 4))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} is VALID [2022-04-07 17:13:29,859 INFO L290 TraceCheckUtils]: 57: Hoare triple {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} is VALID [2022-04-07 17:13:29,859 INFO L290 TraceCheckUtils]: 58: Hoare triple {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} is VALID [2022-04-07 17:13:29,860 INFO L290 TraceCheckUtils]: 59: Hoare triple {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} is VALID [2022-04-07 17:13:29,860 INFO L284 TraceCheckUtils]: 60: Hoare quadruple {8900#(exists ((v_main_~x~0.base_BEFORE_CALL_53 Int) (v_main_~x~0.offset_BEFORE_CALL_53 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_53) (+ 20 v_main_~x~0.offset_BEFORE_CALL_53)) 0))} {8994#(and (= 0 (+ main_~i~1 (- 4))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8994#(and (= 0 (+ main_~i~1 (- 4))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-07 17:13:29,860 INFO L290 TraceCheckUtils]: 61: Hoare triple {8994#(and (= 0 (+ main_~i~1 (- 4))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {8994#(and (= 0 (+ main_~i~1 (- 4))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-07 17:13:29,861 INFO L290 TraceCheckUtils]: 62: Hoare triple {8994#(and (= 0 (+ main_~i~1 (- 4))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {9019#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= (+ main_~i~1 (- 5)) 0))} is VALID [2022-04-07 17:13:29,861 INFO L290 TraceCheckUtils]: 63: Hoare triple {9019#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= (+ main_~i~1 (- 5)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8820#(= |main_#t~mem5| 0)} is VALID [2022-04-07 17:13:29,862 INFO L272 TraceCheckUtils]: 64: Hoare triple {8820#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9026#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:13:29,862 INFO L290 TraceCheckUtils]: 65: Hoare triple {9026#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9030#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:13:29,862 INFO L290 TraceCheckUtils]: 66: Hoare triple {9030#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {8781#false} is VALID [2022-04-07 17:13:29,862 INFO L290 TraceCheckUtils]: 67: Hoare triple {8781#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8781#false} is VALID [2022-04-07 17:13:29,863 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 0 proven. 109 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2022-04-07 17:13:29,863 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 17:13:32,236 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2022-04-07 17:13:32,240 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2022-04-07 17:13:32,334 INFO L290 TraceCheckUtils]: 67: Hoare triple {8781#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8781#false} is VALID [2022-04-07 17:13:32,334 INFO L290 TraceCheckUtils]: 66: Hoare triple {9030#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {8781#false} is VALID [2022-04-07 17:13:32,335 INFO L290 TraceCheckUtils]: 65: Hoare triple {9026#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9030#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:13:32,339 INFO L272 TraceCheckUtils]: 64: Hoare triple {8820#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9026#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:13:32,340 INFO L290 TraceCheckUtils]: 63: Hoare triple {8819#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8820#(= |main_#t~mem5| 0)} is VALID [2022-04-07 17:13:32,341 INFO L290 TraceCheckUtils]: 62: Hoare triple {8814#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {8819#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:13:32,341 INFO L290 TraceCheckUtils]: 61: Hoare triple {8814#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {8814#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:13:32,342 INFO L284 TraceCheckUtils]: 60: Hoare quadruple {8780#true} {8814#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8814#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:13:32,342 INFO L290 TraceCheckUtils]: 59: Hoare triple {8780#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-07 17:13:32,342 INFO L290 TraceCheckUtils]: 58: Hoare triple {8780#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-07 17:13:32,342 INFO L290 TraceCheckUtils]: 57: Hoare triple {8780#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8780#true} is VALID [2022-04-07 17:13:32,342 INFO L272 TraceCheckUtils]: 56: Hoare triple {8814#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8780#true} is VALID [2022-04-07 17:13:32,342 INFO L290 TraceCheckUtils]: 55: Hoare triple {8814#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8814#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:13:32,343 INFO L290 TraceCheckUtils]: 54: Hoare triple {8809#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {8814#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:13:32,343 INFO L290 TraceCheckUtils]: 53: Hoare triple {8809#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {8809#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:13:32,344 INFO L284 TraceCheckUtils]: 52: Hoare quadruple {8780#true} {8809#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8809#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:13:32,344 INFO L290 TraceCheckUtils]: 51: Hoare triple {8780#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-07 17:13:32,344 INFO L290 TraceCheckUtils]: 50: Hoare triple {8780#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-07 17:13:32,344 INFO L290 TraceCheckUtils]: 49: Hoare triple {8780#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8780#true} is VALID [2022-04-07 17:13:32,344 INFO L272 TraceCheckUtils]: 48: Hoare triple {8809#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8780#true} is VALID [2022-04-07 17:13:32,345 INFO L290 TraceCheckUtils]: 47: Hoare triple {8809#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8809#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:13:32,345 INFO L290 TraceCheckUtils]: 46: Hoare triple {8804#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {8809#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:13:32,345 INFO L290 TraceCheckUtils]: 45: Hoare triple {8804#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {8804#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:13:32,346 INFO L284 TraceCheckUtils]: 44: Hoare quadruple {8780#true} {8804#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8804#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:13:32,346 INFO L290 TraceCheckUtils]: 43: Hoare triple {8780#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-07 17:13:32,346 INFO L290 TraceCheckUtils]: 42: Hoare triple {8780#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-07 17:13:32,346 INFO L290 TraceCheckUtils]: 41: Hoare triple {8780#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8780#true} is VALID [2022-04-07 17:13:32,346 INFO L272 TraceCheckUtils]: 40: Hoare triple {8804#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8780#true} is VALID [2022-04-07 17:13:32,347 INFO L290 TraceCheckUtils]: 39: Hoare triple {8804#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8804#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:13:32,347 INFO L290 TraceCheckUtils]: 38: Hoare triple {8799#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {8804#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:13:32,347 INFO L290 TraceCheckUtils]: 37: Hoare triple {8799#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {8799#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:13:32,348 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {8780#true} {8799#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8799#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:13:32,348 INFO L290 TraceCheckUtils]: 35: Hoare triple {8780#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-07 17:13:32,348 INFO L290 TraceCheckUtils]: 34: Hoare triple {8780#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-07 17:13:32,348 INFO L290 TraceCheckUtils]: 33: Hoare triple {8780#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8780#true} is VALID [2022-04-07 17:13:32,348 INFO L272 TraceCheckUtils]: 32: Hoare triple {8799#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8780#true} is VALID [2022-04-07 17:13:32,349 INFO L290 TraceCheckUtils]: 31: Hoare triple {8799#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {8799#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:13:32,349 INFO L290 TraceCheckUtils]: 30: Hoare triple {9148#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {8799#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:13:32,350 INFO L290 TraceCheckUtils]: 29: Hoare triple {9148#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {9148#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 17:13:32,350 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {8780#true} {9148#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9148#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 17:13:32,350 INFO L290 TraceCheckUtils]: 27: Hoare triple {8780#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-07 17:13:32,350 INFO L290 TraceCheckUtils]: 26: Hoare triple {8780#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-07 17:13:32,350 INFO L290 TraceCheckUtils]: 25: Hoare triple {8780#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8780#true} is VALID [2022-04-07 17:13:32,350 INFO L272 TraceCheckUtils]: 24: Hoare triple {9148#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {8780#true} is VALID [2022-04-07 17:13:32,351 INFO L290 TraceCheckUtils]: 23: Hoare triple {9148#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9148#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 17:13:32,351 INFO L290 TraceCheckUtils]: 22: Hoare triple {8793#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {9148#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 17:13:32,351 INFO L290 TraceCheckUtils]: 21: Hoare triple {8793#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {8793#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-07 17:13:32,352 INFO L290 TraceCheckUtils]: 20: Hoare triple {8793#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8793#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-07 17:13:32,352 INFO L290 TraceCheckUtils]: 19: Hoare triple {8792#(and (not (= (+ main_~x~0.offset 20) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8793#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-07 17:13:32,353 INFO L290 TraceCheckUtils]: 18: Hoare triple {9185#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (not (<= main_~i~0 4)))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8792#(and (not (= (+ main_~x~0.offset 20) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-07 17:13:32,353 INFO L290 TraceCheckUtils]: 17: Hoare triple {8790#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9185#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (not (<= main_~i~0 4)))} is VALID [2022-04-07 17:13:32,354 INFO L290 TraceCheckUtils]: 16: Hoare triple {8789#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8790#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 17:13:32,354 INFO L290 TraceCheckUtils]: 15: Hoare triple {8789#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8789#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 17:13:32,354 INFO L290 TraceCheckUtils]: 14: Hoare triple {8788#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8789#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 17:13:32,355 INFO L290 TraceCheckUtils]: 13: Hoare triple {8788#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8788#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 17:13:32,355 INFO L290 TraceCheckUtils]: 12: Hoare triple {8787#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8788#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 17:13:32,356 INFO L290 TraceCheckUtils]: 11: Hoare triple {8787#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8787#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:13:32,356 INFO L290 TraceCheckUtils]: 10: Hoare triple {8786#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8787#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:13:32,357 INFO L290 TraceCheckUtils]: 9: Hoare triple {8786#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8786#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:13:32,357 INFO L290 TraceCheckUtils]: 8: Hoare triple {8785#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {8786#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:13:32,357 INFO L290 TraceCheckUtils]: 7: Hoare triple {8785#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {8785#(= main_~i~0 0)} is VALID [2022-04-07 17:13:32,357 INFO L290 TraceCheckUtils]: 6: Hoare triple {8780#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {8785#(= main_~i~0 0)} is VALID [2022-04-07 17:13:32,358 INFO L290 TraceCheckUtils]: 5: Hoare triple {8780#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {8780#true} is VALID [2022-04-07 17:13:32,358 INFO L272 TraceCheckUtils]: 4: Hoare triple {8780#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-07 17:13:32,358 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8780#true} {8780#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-07 17:13:32,358 INFO L290 TraceCheckUtils]: 2: Hoare triple {8780#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-07 17:13:32,358 INFO L290 TraceCheckUtils]: 1: Hoare triple {8780#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {8780#true} is VALID [2022-04-07 17:13:32,358 INFO L272 TraceCheckUtils]: 0: Hoare triple {8780#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8780#true} is VALID [2022-04-07 17:13:32,358 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 10 proven. 99 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2022-04-07 17:13:32,358 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1083211716] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 17:13:32,359 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 17:13:32,359 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21, 20] total 32 [2022-04-07 17:13:32,359 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1073369271] [2022-04-07 17:13:32,359 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 17:13:32,359 INFO L78 Accepts]: Start accepts. Automaton has has 32 states, 31 states have (on average 2.2580645161290325) internal successors, (70), 29 states have internal predecessors, (70), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) Word has length 68 [2022-04-07 17:13:32,360 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:13:32,360 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 32 states, 31 states have (on average 2.2580645161290325) internal successors, (70), 29 states have internal predecessors, (70), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) [2022-04-07 17:13:32,428 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 98 edges. 98 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:13:32,428 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 32 states [2022-04-07 17:13:32,428 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:13:32,428 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2022-04-07 17:13:32,428 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=94, Invalid=892, Unknown=6, NotChecked=0, Total=992 [2022-04-07 17:13:32,429 INFO L87 Difference]: Start difference. First operand 99 states and 103 transitions. Second operand has 32 states, 31 states have (on average 2.2580645161290325) internal successors, (70), 29 states have internal predecessors, (70), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) [2022-04-07 17:13:33,977 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:13:33,977 INFO L93 Difference]: Finished difference Result 161 states and 166 transitions. [2022-04-07 17:13:33,977 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2022-04-07 17:13:33,978 INFO L78 Accepts]: Start accepts. Automaton has has 32 states, 31 states have (on average 2.2580645161290325) internal successors, (70), 29 states have internal predecessors, (70), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) Word has length 68 [2022-04-07 17:13:33,978 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:13:33,978 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 32 states, 31 states have (on average 2.2580645161290325) internal successors, (70), 29 states have internal predecessors, (70), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) [2022-04-07 17:13:33,981 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 76 transitions. [2022-04-07 17:13:33,981 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 32 states, 31 states have (on average 2.2580645161290325) internal successors, (70), 29 states have internal predecessors, (70), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) [2022-04-07 17:13:33,982 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 76 transitions. [2022-04-07 17:13:33,982 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 30 states and 76 transitions. [2022-04-07 17:13:34,051 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 76 edges. 76 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:13:34,053 INFO L225 Difference]: With dead ends: 161 [2022-04-07 17:13:34,053 INFO L226 Difference]: Without dead ends: 161 [2022-04-07 17:13:34,053 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 192 GetRequests, 126 SyntacticMatches, 15 SemanticMatches, 51 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 611 ImplicationChecksByTransitivity, 37.3s TimeCoverageRelationStatistics Valid=237, Invalid=2513, Unknown=6, NotChecked=0, Total=2756 [2022-04-07 17:13:34,054 INFO L913 BasicCegarLoop]: 28 mSDtfsCounter, 52 mSDsluCounter, 211 mSDsCounter, 0 mSdLazyCounter, 831 mSolverCounterSat, 22 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 53 SdHoareTripleChecker+Valid, 239 SdHoareTripleChecker+Invalid, 943 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 22 IncrementalHoareTripleChecker+Valid, 831 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 90 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-04-07 17:13:34,054 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [53 Valid, 239 Invalid, 943 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [22 Valid, 831 Invalid, 0 Unknown, 90 Unchecked, 0.6s Time] [2022-04-07 17:13:34,054 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 161 states. [2022-04-07 17:13:34,060 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 161 to 135. [2022-04-07 17:13:34,060 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:13:34,060 INFO L82 GeneralOperation]: Start isEquivalent. First operand 161 states. Second operand has 135 states, 103 states have (on average 1.0388349514563107) internal successors, (107), 106 states have internal predecessors, (107), 17 states have call successors, (17), 15 states have call predecessors, (17), 14 states have return successors, (16), 13 states have call predecessors, (16), 16 states have call successors, (16) [2022-04-07 17:13:34,061 INFO L74 IsIncluded]: Start isIncluded. First operand 161 states. Second operand has 135 states, 103 states have (on average 1.0388349514563107) internal successors, (107), 106 states have internal predecessors, (107), 17 states have call successors, (17), 15 states have call predecessors, (17), 14 states have return successors, (16), 13 states have call predecessors, (16), 16 states have call successors, (16) [2022-04-07 17:13:34,061 INFO L87 Difference]: Start difference. First operand 161 states. Second operand has 135 states, 103 states have (on average 1.0388349514563107) internal successors, (107), 106 states have internal predecessors, (107), 17 states have call successors, (17), 15 states have call predecessors, (17), 14 states have return successors, (16), 13 states have call predecessors, (16), 16 states have call successors, (16) [2022-04-07 17:13:34,064 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:13:34,064 INFO L93 Difference]: Finished difference Result 161 states and 166 transitions. [2022-04-07 17:13:34,064 INFO L276 IsEmpty]: Start isEmpty. Operand 161 states and 166 transitions. [2022-04-07 17:13:34,064 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:13:34,064 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:13:34,065 INFO L74 IsIncluded]: Start isIncluded. First operand has 135 states, 103 states have (on average 1.0388349514563107) internal successors, (107), 106 states have internal predecessors, (107), 17 states have call successors, (17), 15 states have call predecessors, (17), 14 states have return successors, (16), 13 states have call predecessors, (16), 16 states have call successors, (16) Second operand 161 states. [2022-04-07 17:13:34,065 INFO L87 Difference]: Start difference. First operand has 135 states, 103 states have (on average 1.0388349514563107) internal successors, (107), 106 states have internal predecessors, (107), 17 states have call successors, (17), 15 states have call predecessors, (17), 14 states have return successors, (16), 13 states have call predecessors, (16), 16 states have call successors, (16) Second operand 161 states. [2022-04-07 17:13:34,068 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:13:34,068 INFO L93 Difference]: Finished difference Result 161 states and 166 transitions. [2022-04-07 17:13:34,068 INFO L276 IsEmpty]: Start isEmpty. Operand 161 states and 166 transitions. [2022-04-07 17:13:34,068 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:13:34,069 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:13:34,069 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:13:34,069 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:13:34,069 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 135 states, 103 states have (on average 1.0388349514563107) internal successors, (107), 106 states have internal predecessors, (107), 17 states have call successors, (17), 15 states have call predecessors, (17), 14 states have return successors, (16), 13 states have call predecessors, (16), 16 states have call successors, (16) [2022-04-07 17:13:34,071 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 135 states to 135 states and 140 transitions. [2022-04-07 17:13:34,071 INFO L78 Accepts]: Start accepts. Automaton has 135 states and 140 transitions. Word has length 68 [2022-04-07 17:13:34,071 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:13:34,071 INFO L478 AbstractCegarLoop]: Abstraction has 135 states and 140 transitions. [2022-04-07 17:13:34,072 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 32 states, 31 states have (on average 2.2580645161290325) internal successors, (70), 29 states have internal predecessors, (70), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) [2022-04-07 17:13:34,072 INFO L276 IsEmpty]: Start isEmpty. Operand 135 states and 140 transitions. [2022-04-07 17:13:34,072 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2022-04-07 17:13:34,073 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:13:34,073 INFO L499 BasicCegarLoop]: trace histogram [8, 8, 6, 6, 6, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:13:34,097 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Ended with exit code 0 [2022-04-07 17:13:34,295 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 16 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable16 [2022-04-07 17:13:34,295 INFO L403 AbstractCegarLoop]: === Iteration 18 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:13:34,296 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:13:34,296 INFO L85 PathProgramCache]: Analyzing trace with hash 1135764165, now seen corresponding path program 15 times [2022-04-07 17:13:34,296 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:13:34,296 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [368773828] [2022-04-07 17:13:34,296 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:13:34,296 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:13:34,325 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:13:34,585 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:13:34,587 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:13:34,588 INFO L290 TraceCheckUtils]: 0: Hoare triple {9950#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {9906#true} is VALID [2022-04-07 17:13:34,588 INFO L290 TraceCheckUtils]: 1: Hoare triple {9906#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-07 17:13:34,589 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {9906#true} {9906#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-07 17:13:34,589 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 26 [2022-04-07 17:13:34,589 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:13:34,591 INFO L290 TraceCheckUtils]: 0: Hoare triple {9906#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9906#true} is VALID [2022-04-07 17:13:34,591 INFO L290 TraceCheckUtils]: 1: Hoare triple {9906#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-07 17:13:34,591 INFO L290 TraceCheckUtils]: 2: Hoare triple {9906#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-07 17:13:34,592 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9906#true} {9921#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9921#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:13:34,592 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 34 [2022-04-07 17:13:34,593 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:13:34,595 INFO L290 TraceCheckUtils]: 0: Hoare triple {9906#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9906#true} is VALID [2022-04-07 17:13:34,596 INFO L290 TraceCheckUtils]: 1: Hoare triple {9906#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-07 17:13:34,596 INFO L290 TraceCheckUtils]: 2: Hoare triple {9906#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-07 17:13:34,596 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9906#true} {9926#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9926#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:13:34,596 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 42 [2022-04-07 17:13:34,597 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:13:34,599 INFO L290 TraceCheckUtils]: 0: Hoare triple {9906#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9906#true} is VALID [2022-04-07 17:13:34,599 INFO L290 TraceCheckUtils]: 1: Hoare triple {9906#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-07 17:13:34,599 INFO L290 TraceCheckUtils]: 2: Hoare triple {9906#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-07 17:13:34,599 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9906#true} {9931#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9931#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:13:34,600 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 50 [2022-04-07 17:13:34,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:13:34,602 INFO L290 TraceCheckUtils]: 0: Hoare triple {9906#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9906#true} is VALID [2022-04-07 17:13:34,602 INFO L290 TraceCheckUtils]: 1: Hoare triple {9906#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-07 17:13:34,602 INFO L290 TraceCheckUtils]: 2: Hoare triple {9906#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-07 17:13:34,602 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9906#true} {9936#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9936#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:13:34,603 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 58 [2022-04-07 17:13:34,603 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:13:34,616 INFO L290 TraceCheckUtils]: 0: Hoare triple {9906#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9906#true} is VALID [2022-04-07 17:13:34,616 INFO L290 TraceCheckUtils]: 1: Hoare triple {9906#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-07 17:13:34,616 INFO L290 TraceCheckUtils]: 2: Hoare triple {9906#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-07 17:13:34,617 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9906#true} {9941#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9941#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:13:34,618 INFO L272 TraceCheckUtils]: 0: Hoare triple {9906#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9950#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:13:34,618 INFO L290 TraceCheckUtils]: 1: Hoare triple {9950#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {9906#true} is VALID [2022-04-07 17:13:34,618 INFO L290 TraceCheckUtils]: 2: Hoare triple {9906#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-07 17:13:34,618 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9906#true} {9906#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-07 17:13:34,618 INFO L272 TraceCheckUtils]: 4: Hoare triple {9906#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-07 17:13:34,618 INFO L290 TraceCheckUtils]: 5: Hoare triple {9906#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {9906#true} is VALID [2022-04-07 17:13:34,619 INFO L290 TraceCheckUtils]: 6: Hoare triple {9906#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {9911#(= main_~i~0 0)} is VALID [2022-04-07 17:13:34,619 INFO L290 TraceCheckUtils]: 7: Hoare triple {9911#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9911#(= main_~i~0 0)} is VALID [2022-04-07 17:13:34,620 INFO L290 TraceCheckUtils]: 8: Hoare triple {9911#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9912#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:13:34,620 INFO L290 TraceCheckUtils]: 9: Hoare triple {9912#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9912#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:13:34,621 INFO L290 TraceCheckUtils]: 10: Hoare triple {9912#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9913#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:13:34,621 INFO L290 TraceCheckUtils]: 11: Hoare triple {9913#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9913#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:13:34,622 INFO L290 TraceCheckUtils]: 12: Hoare triple {9913#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9914#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 17:13:34,622 INFO L290 TraceCheckUtils]: 13: Hoare triple {9914#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9914#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 17:13:34,623 INFO L290 TraceCheckUtils]: 14: Hoare triple {9914#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9915#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 17:13:34,623 INFO L290 TraceCheckUtils]: 15: Hoare triple {9915#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9915#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 17:13:34,624 INFO L290 TraceCheckUtils]: 16: Hoare triple {9915#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9916#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 17:13:34,625 INFO L290 TraceCheckUtils]: 17: Hoare triple {9916#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9917#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 17:13:34,625 INFO L290 TraceCheckUtils]: 18: Hoare triple {9917#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9918#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (<= 6 main_~i~0))} is VALID [2022-04-07 17:13:34,626 INFO L290 TraceCheckUtils]: 19: Hoare triple {9918#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (<= 6 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9918#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (<= 6 main_~i~0))} is VALID [2022-04-07 17:13:34,626 INFO L290 TraceCheckUtils]: 20: Hoare triple {9918#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (<= 6 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9919#(and (not (= (+ main_~x~0.offset 20) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-07 17:13:34,627 INFO L290 TraceCheckUtils]: 21: Hoare triple {9919#(and (not (= (+ main_~x~0.offset 20) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9920#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-07 17:13:34,628 INFO L290 TraceCheckUtils]: 22: Hoare triple {9920#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9920#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-07 17:13:34,628 INFO L290 TraceCheckUtils]: 23: Hoare triple {9920#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {9920#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-07 17:13:34,628 INFO L290 TraceCheckUtils]: 24: Hoare triple {9920#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {9921#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:13:34,629 INFO L290 TraceCheckUtils]: 25: Hoare triple {9921#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9921#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:13:34,629 INFO L272 TraceCheckUtils]: 26: Hoare triple {9921#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9906#true} is VALID [2022-04-07 17:13:34,629 INFO L290 TraceCheckUtils]: 27: Hoare triple {9906#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9906#true} is VALID [2022-04-07 17:13:34,629 INFO L290 TraceCheckUtils]: 28: Hoare triple {9906#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-07 17:13:34,629 INFO L290 TraceCheckUtils]: 29: Hoare triple {9906#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-07 17:13:34,630 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {9906#true} {9921#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9921#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:13:34,630 INFO L290 TraceCheckUtils]: 31: Hoare triple {9921#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {9921#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:13:34,635 INFO L290 TraceCheckUtils]: 32: Hoare triple {9921#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {9926#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:13:34,636 INFO L290 TraceCheckUtils]: 33: Hoare triple {9926#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9926#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:13:34,636 INFO L272 TraceCheckUtils]: 34: Hoare triple {9926#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9906#true} is VALID [2022-04-07 17:13:34,636 INFO L290 TraceCheckUtils]: 35: Hoare triple {9906#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9906#true} is VALID [2022-04-07 17:13:34,636 INFO L290 TraceCheckUtils]: 36: Hoare triple {9906#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-07 17:13:34,636 INFO L290 TraceCheckUtils]: 37: Hoare triple {9906#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-07 17:13:34,637 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {9906#true} {9926#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9926#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:13:34,638 INFO L290 TraceCheckUtils]: 39: Hoare triple {9926#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {9926#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:13:34,638 INFO L290 TraceCheckUtils]: 40: Hoare triple {9926#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {9931#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:13:34,639 INFO L290 TraceCheckUtils]: 41: Hoare triple {9931#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9931#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:13:34,639 INFO L272 TraceCheckUtils]: 42: Hoare triple {9931#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9906#true} is VALID [2022-04-07 17:13:34,639 INFO L290 TraceCheckUtils]: 43: Hoare triple {9906#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9906#true} is VALID [2022-04-07 17:13:34,639 INFO L290 TraceCheckUtils]: 44: Hoare triple {9906#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-07 17:13:34,639 INFO L290 TraceCheckUtils]: 45: Hoare triple {9906#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-07 17:13:34,640 INFO L284 TraceCheckUtils]: 46: Hoare quadruple {9906#true} {9931#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9931#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:13:34,640 INFO L290 TraceCheckUtils]: 47: Hoare triple {9931#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {9931#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:13:34,641 INFO L290 TraceCheckUtils]: 48: Hoare triple {9931#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {9936#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:13:34,641 INFO L290 TraceCheckUtils]: 49: Hoare triple {9936#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9936#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:13:34,641 INFO L272 TraceCheckUtils]: 50: Hoare triple {9936#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9906#true} is VALID [2022-04-07 17:13:34,642 INFO L290 TraceCheckUtils]: 51: Hoare triple {9906#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9906#true} is VALID [2022-04-07 17:13:34,642 INFO L290 TraceCheckUtils]: 52: Hoare triple {9906#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-07 17:13:34,642 INFO L290 TraceCheckUtils]: 53: Hoare triple {9906#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-07 17:13:34,642 INFO L284 TraceCheckUtils]: 54: Hoare quadruple {9906#true} {9936#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9936#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:13:34,643 INFO L290 TraceCheckUtils]: 55: Hoare triple {9936#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {9936#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:13:34,643 INFO L290 TraceCheckUtils]: 56: Hoare triple {9936#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {9941#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:13:34,644 INFO L290 TraceCheckUtils]: 57: Hoare triple {9941#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9941#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:13:34,644 INFO L272 TraceCheckUtils]: 58: Hoare triple {9941#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9906#true} is VALID [2022-04-07 17:13:34,644 INFO L290 TraceCheckUtils]: 59: Hoare triple {9906#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9906#true} is VALID [2022-04-07 17:13:34,644 INFO L290 TraceCheckUtils]: 60: Hoare triple {9906#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-07 17:13:34,644 INFO L290 TraceCheckUtils]: 61: Hoare triple {9906#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-07 17:13:34,645 INFO L284 TraceCheckUtils]: 62: Hoare quadruple {9906#true} {9941#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9941#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:13:34,645 INFO L290 TraceCheckUtils]: 63: Hoare triple {9941#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {9941#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:13:34,646 INFO L290 TraceCheckUtils]: 64: Hoare triple {9941#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {9946#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:13:34,647 INFO L290 TraceCheckUtils]: 65: Hoare triple {9946#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9947#(= |main_#t~mem5| 0)} is VALID [2022-04-07 17:13:34,647 INFO L272 TraceCheckUtils]: 66: Hoare triple {9947#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9948#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:13:34,648 INFO L290 TraceCheckUtils]: 67: Hoare triple {9948#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9949#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:13:34,648 INFO L290 TraceCheckUtils]: 68: Hoare triple {9949#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {9907#false} is VALID [2022-04-07 17:13:34,648 INFO L290 TraceCheckUtils]: 69: Hoare triple {9907#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9907#false} is VALID [2022-04-07 17:13:34,648 INFO L134 CoverageAnalysis]: Checked inductivity of 164 backedges. 10 proven. 114 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2022-04-07 17:13:34,649 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:13:34,649 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [368773828] [2022-04-07 17:13:34,649 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [368773828] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:13:34,649 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [139452030] [2022-04-07 17:13:34,649 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-07 17:13:34,649 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:13:34,649 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:13:34,650 INFO L229 MonitoredProcess]: Starting monitored process 17 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:13:34,651 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2022-04-07 17:13:34,752 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 9 check-sat command(s) [2022-04-07 17:13:34,752 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 17:13:34,753 INFO L263 TraceCheckSpWp]: Trace formula consists of 205 conjuncts, 39 conjunts are in the unsatisfiable core [2022-04-07 17:13:34,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:13:34,771 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:13:34,862 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-07 17:13:34,975 INFO L356 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2022-04-07 17:13:34,975 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 24 [2022-04-07 17:13:35,052 INFO L356 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2022-04-07 17:13:35,052 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 24 [2022-04-07 17:14:10,423 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2022-04-07 17:14:10,477 INFO L272 TraceCheckUtils]: 0: Hoare triple {9906#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-07 17:14:10,478 INFO L290 TraceCheckUtils]: 1: Hoare triple {9906#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {9906#true} is VALID [2022-04-07 17:14:10,478 INFO L290 TraceCheckUtils]: 2: Hoare triple {9906#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-07 17:14:10,478 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9906#true} {9906#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-07 17:14:10,478 INFO L272 TraceCheckUtils]: 4: Hoare triple {9906#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-07 17:14:10,478 INFO L290 TraceCheckUtils]: 5: Hoare triple {9906#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {9906#true} is VALID [2022-04-07 17:14:10,478 INFO L290 TraceCheckUtils]: 6: Hoare triple {9906#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {9911#(= main_~i~0 0)} is VALID [2022-04-07 17:14:10,478 INFO L290 TraceCheckUtils]: 7: Hoare triple {9911#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9911#(= main_~i~0 0)} is VALID [2022-04-07 17:14:10,479 INFO L290 TraceCheckUtils]: 8: Hoare triple {9911#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9912#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:14:10,479 INFO L290 TraceCheckUtils]: 9: Hoare triple {9912#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9912#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:14:10,480 INFO L290 TraceCheckUtils]: 10: Hoare triple {9912#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9913#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:14:10,480 INFO L290 TraceCheckUtils]: 11: Hoare triple {9913#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9913#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:14:10,480 INFO L290 TraceCheckUtils]: 12: Hoare triple {9913#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9914#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 17:14:10,481 INFO L290 TraceCheckUtils]: 13: Hoare triple {9914#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9914#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 17:14:10,481 INFO L290 TraceCheckUtils]: 14: Hoare triple {9914#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9915#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 17:14:10,482 INFO L290 TraceCheckUtils]: 15: Hoare triple {9915#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9915#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 17:14:10,482 INFO L290 TraceCheckUtils]: 16: Hoare triple {9915#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9916#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 17:14:10,483 INFO L290 TraceCheckUtils]: 17: Hoare triple {9916#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9917#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 17:14:10,483 INFO L290 TraceCheckUtils]: 18: Hoare triple {9917#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9918#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (<= 6 main_~i~0))} is VALID [2022-04-07 17:14:10,484 INFO L290 TraceCheckUtils]: 19: Hoare triple {9918#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (<= 6 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9918#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (<= 6 main_~i~0))} is VALID [2022-04-07 17:14:10,484 INFO L290 TraceCheckUtils]: 20: Hoare triple {9918#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (<= 6 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {10014#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (<= 7 main_~i~0))} is VALID [2022-04-07 17:14:10,485 INFO L290 TraceCheckUtils]: 21: Hoare triple {10014#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (<= 7 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9920#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-07 17:14:10,485 INFO L290 TraceCheckUtils]: 22: Hoare triple {9920#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9920#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-07 17:14:10,485 INFO L290 TraceCheckUtils]: 23: Hoare triple {9920#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {9920#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-07 17:14:10,486 INFO L290 TraceCheckUtils]: 24: Hoare triple {9920#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {9921#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:14:10,486 INFO L290 TraceCheckUtils]: 25: Hoare triple {9921#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9921#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:14:10,487 INFO L272 TraceCheckUtils]: 26: Hoare triple {9921#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} is VALID [2022-04-07 17:14:10,487 INFO L290 TraceCheckUtils]: 27: Hoare triple {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} is VALID [2022-04-07 17:14:10,488 INFO L290 TraceCheckUtils]: 28: Hoare triple {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} is VALID [2022-04-07 17:14:10,488 INFO L290 TraceCheckUtils]: 29: Hoare triple {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} is VALID [2022-04-07 17:14:10,488 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} {9921#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9921#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:14:10,489 INFO L290 TraceCheckUtils]: 31: Hoare triple {9921#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {9921#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:14:10,489 INFO L290 TraceCheckUtils]: 32: Hoare triple {9921#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {10052#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 1))} is VALID [2022-04-07 17:14:10,489 INFO L290 TraceCheckUtils]: 33: Hoare triple {10052#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {10052#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 1))} is VALID [2022-04-07 17:14:10,490 INFO L272 TraceCheckUtils]: 34: Hoare triple {10052#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} is VALID [2022-04-07 17:14:10,491 INFO L290 TraceCheckUtils]: 35: Hoare triple {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} is VALID [2022-04-07 17:14:10,491 INFO L290 TraceCheckUtils]: 36: Hoare triple {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} is VALID [2022-04-07 17:14:10,491 INFO L290 TraceCheckUtils]: 37: Hoare triple {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} is VALID [2022-04-07 17:14:10,492 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} {10052#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10052#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 1))} is VALID [2022-04-07 17:14:10,492 INFO L290 TraceCheckUtils]: 39: Hoare triple {10052#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {10052#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 1))} is VALID [2022-04-07 17:14:10,492 INFO L290 TraceCheckUtils]: 40: Hoare triple {10052#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {10077#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-07 17:14:10,493 INFO L290 TraceCheckUtils]: 41: Hoare triple {10077#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {10077#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-07 17:14:10,494 INFO L272 TraceCheckUtils]: 42: Hoare triple {10077#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} is VALID [2022-04-07 17:14:10,494 INFO L290 TraceCheckUtils]: 43: Hoare triple {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} is VALID [2022-04-07 17:14:10,494 INFO L290 TraceCheckUtils]: 44: Hoare triple {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} is VALID [2022-04-07 17:14:10,494 INFO L290 TraceCheckUtils]: 45: Hoare triple {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} is VALID [2022-04-07 17:14:10,495 INFO L284 TraceCheckUtils]: 46: Hoare quadruple {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} {10077#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10077#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-07 17:14:10,495 INFO L290 TraceCheckUtils]: 47: Hoare triple {10077#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {10077#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-07 17:14:10,496 INFO L290 TraceCheckUtils]: 48: Hoare triple {10077#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {10102#(and (= (+ (- 2) main_~i~1) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-07 17:14:10,496 INFO L290 TraceCheckUtils]: 49: Hoare triple {10102#(and (= (+ (- 2) main_~i~1) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {10102#(and (= (+ (- 2) main_~i~1) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-07 17:14:10,497 INFO L272 TraceCheckUtils]: 50: Hoare triple {10102#(and (= (+ (- 2) main_~i~1) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} is VALID [2022-04-07 17:14:10,497 INFO L290 TraceCheckUtils]: 51: Hoare triple {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} is VALID [2022-04-07 17:14:10,497 INFO L290 TraceCheckUtils]: 52: Hoare triple {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} is VALID [2022-04-07 17:14:10,498 INFO L290 TraceCheckUtils]: 53: Hoare triple {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} is VALID [2022-04-07 17:14:10,498 INFO L284 TraceCheckUtils]: 54: Hoare quadruple {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} {10102#(and (= (+ (- 2) main_~i~1) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10102#(and (= (+ (- 2) main_~i~1) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-07 17:14:10,499 INFO L290 TraceCheckUtils]: 55: Hoare triple {10102#(and (= (+ (- 2) main_~i~1) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {10102#(and (= (+ (- 2) main_~i~1) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-07 17:14:10,499 INFO L290 TraceCheckUtils]: 56: Hoare triple {10102#(and (= (+ (- 2) main_~i~1) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {10127#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 4))} is VALID [2022-04-07 17:14:10,500 INFO L290 TraceCheckUtils]: 57: Hoare triple {10127#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 4))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {10127#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 4))} is VALID [2022-04-07 17:14:10,500 INFO L272 TraceCheckUtils]: 58: Hoare triple {10127#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 4))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} is VALID [2022-04-07 17:14:10,501 INFO L290 TraceCheckUtils]: 59: Hoare triple {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} is VALID [2022-04-07 17:14:10,501 INFO L290 TraceCheckUtils]: 60: Hoare triple {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} is VALID [2022-04-07 17:14:10,501 INFO L290 TraceCheckUtils]: 61: Hoare triple {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} is VALID [2022-04-07 17:14:10,502 INFO L284 TraceCheckUtils]: 62: Hoare quadruple {10033#(exists ((v_main_~x~0.base_BEFORE_CALL_63 Int) (v_main_~x~0.offset_BEFORE_CALL_63 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_63) (+ 20 v_main_~x~0.offset_BEFORE_CALL_63)) 0))} {10127#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10127#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 4))} is VALID [2022-04-07 17:14:10,502 INFO L290 TraceCheckUtils]: 63: Hoare triple {10127#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 4))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {10127#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 4))} is VALID [2022-04-07 17:14:10,502 INFO L290 TraceCheckUtils]: 64: Hoare triple {10127#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= main_~i~1 4))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {10152#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 5 main_~i~1))} is VALID [2022-04-07 17:14:10,503 INFO L290 TraceCheckUtils]: 65: Hoare triple {10152#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (= 5 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9947#(= |main_#t~mem5| 0)} is VALID [2022-04-07 17:14:10,503 INFO L272 TraceCheckUtils]: 66: Hoare triple {9947#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10159#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:14:10,504 INFO L290 TraceCheckUtils]: 67: Hoare triple {10159#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10163#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:14:10,504 INFO L290 TraceCheckUtils]: 68: Hoare triple {10163#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {9907#false} is VALID [2022-04-07 17:14:10,504 INFO L290 TraceCheckUtils]: 69: Hoare triple {9907#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9907#false} is VALID [2022-04-07 17:14:10,504 INFO L134 CoverageAnalysis]: Checked inductivity of 164 backedges. 1 proven. 123 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2022-04-07 17:14:10,504 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 17:14:11,500 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2022-04-07 17:14:11,506 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2022-04-07 17:14:11,599 INFO L290 TraceCheckUtils]: 69: Hoare triple {9907#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9907#false} is VALID [2022-04-07 17:14:11,600 INFO L290 TraceCheckUtils]: 68: Hoare triple {10163#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {9907#false} is VALID [2022-04-07 17:14:11,600 INFO L290 TraceCheckUtils]: 67: Hoare triple {10159#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10163#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:14:11,601 INFO L272 TraceCheckUtils]: 66: Hoare triple {9947#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10159#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:14:11,601 INFO L290 TraceCheckUtils]: 65: Hoare triple {9946#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9947#(= |main_#t~mem5| 0)} is VALID [2022-04-07 17:14:11,602 INFO L290 TraceCheckUtils]: 64: Hoare triple {9941#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {9946#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:14:11,602 INFO L290 TraceCheckUtils]: 63: Hoare triple {9941#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {9941#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:14:11,603 INFO L284 TraceCheckUtils]: 62: Hoare quadruple {9906#true} {9941#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9941#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:14:11,603 INFO L290 TraceCheckUtils]: 61: Hoare triple {9906#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-07 17:14:11,603 INFO L290 TraceCheckUtils]: 60: Hoare triple {9906#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-07 17:14:11,603 INFO L290 TraceCheckUtils]: 59: Hoare triple {9906#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9906#true} is VALID [2022-04-07 17:14:11,603 INFO L272 TraceCheckUtils]: 58: Hoare triple {9941#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9906#true} is VALID [2022-04-07 17:14:11,603 INFO L290 TraceCheckUtils]: 57: Hoare triple {9941#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9941#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:14:11,604 INFO L290 TraceCheckUtils]: 56: Hoare triple {9936#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {9941#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:14:11,604 INFO L290 TraceCheckUtils]: 55: Hoare triple {9936#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {9936#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:14:11,605 INFO L284 TraceCheckUtils]: 54: Hoare quadruple {9906#true} {9936#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9936#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:14:11,605 INFO L290 TraceCheckUtils]: 53: Hoare triple {9906#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-07 17:14:11,605 INFO L290 TraceCheckUtils]: 52: Hoare triple {9906#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-07 17:14:11,605 INFO L290 TraceCheckUtils]: 51: Hoare triple {9906#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9906#true} is VALID [2022-04-07 17:14:11,605 INFO L272 TraceCheckUtils]: 50: Hoare triple {9936#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9906#true} is VALID [2022-04-07 17:14:11,605 INFO L290 TraceCheckUtils]: 49: Hoare triple {9936#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9936#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:14:11,606 INFO L290 TraceCheckUtils]: 48: Hoare triple {9931#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {9936#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:14:11,606 INFO L290 TraceCheckUtils]: 47: Hoare triple {9931#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {9931#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:14:11,607 INFO L284 TraceCheckUtils]: 46: Hoare quadruple {9906#true} {9931#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9931#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:14:11,607 INFO L290 TraceCheckUtils]: 45: Hoare triple {9906#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-07 17:14:11,607 INFO L290 TraceCheckUtils]: 44: Hoare triple {9906#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-07 17:14:11,607 INFO L290 TraceCheckUtils]: 43: Hoare triple {9906#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9906#true} is VALID [2022-04-07 17:14:11,607 INFO L272 TraceCheckUtils]: 42: Hoare triple {9931#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9906#true} is VALID [2022-04-07 17:14:11,607 INFO L290 TraceCheckUtils]: 41: Hoare triple {9931#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9931#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:14:11,608 INFO L290 TraceCheckUtils]: 40: Hoare triple {9926#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {9931#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:14:11,608 INFO L290 TraceCheckUtils]: 39: Hoare triple {9926#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {9926#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:14:11,609 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {9906#true} {9926#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9926#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:14:11,609 INFO L290 TraceCheckUtils]: 37: Hoare triple {9906#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-07 17:14:11,609 INFO L290 TraceCheckUtils]: 36: Hoare triple {9906#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-07 17:14:11,609 INFO L290 TraceCheckUtils]: 35: Hoare triple {9906#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9906#true} is VALID [2022-04-07 17:14:11,609 INFO L272 TraceCheckUtils]: 34: Hoare triple {9926#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9906#true} is VALID [2022-04-07 17:14:11,610 INFO L290 TraceCheckUtils]: 33: Hoare triple {9926#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {9926#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:14:11,610 INFO L290 TraceCheckUtils]: 32: Hoare triple {10281#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {9926#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:14:11,610 INFO L290 TraceCheckUtils]: 31: Hoare triple {10281#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {10281#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 17:14:11,611 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {9906#true} {10281#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {10281#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 17:14:11,611 INFO L290 TraceCheckUtils]: 29: Hoare triple {9906#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-07 17:14:11,611 INFO L290 TraceCheckUtils]: 28: Hoare triple {9906#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-07 17:14:11,611 INFO L290 TraceCheckUtils]: 27: Hoare triple {9906#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9906#true} is VALID [2022-04-07 17:14:11,611 INFO L272 TraceCheckUtils]: 26: Hoare triple {10281#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {9906#true} is VALID [2022-04-07 17:14:11,612 INFO L290 TraceCheckUtils]: 25: Hoare triple {10281#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {10281#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 17:14:11,612 INFO L290 TraceCheckUtils]: 24: Hoare triple {9920#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {10281#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 17:14:11,612 INFO L290 TraceCheckUtils]: 23: Hoare triple {9920#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {9920#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-07 17:14:11,613 INFO L290 TraceCheckUtils]: 22: Hoare triple {9920#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9920#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-07 17:14:11,613 INFO L290 TraceCheckUtils]: 21: Hoare triple {9919#(and (not (= (+ main_~x~0.offset 20) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9920#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0)} is VALID [2022-04-07 17:14:11,614 INFO L290 TraceCheckUtils]: 20: Hoare triple {10318#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (not (<= main_~i~0 4)))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9919#(and (not (= (+ main_~x~0.offset 20) (+ main_~x~0.offset (* main_~i~0 4)))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0))} is VALID [2022-04-07 17:14:11,614 INFO L290 TraceCheckUtils]: 19: Hoare triple {9918#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (<= 6 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {10318#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (not (<= main_~i~0 4)))} is VALID [2022-04-07 17:14:11,615 INFO L290 TraceCheckUtils]: 18: Hoare triple {10318#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (not (<= main_~i~0 4)))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9918#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (<= 6 main_~i~0))} is VALID [2022-04-07 17:14:11,615 INFO L290 TraceCheckUtils]: 17: Hoare triple {9916#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {10318#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 20)) 0) (not (<= main_~i~0 4)))} is VALID [2022-04-07 17:14:11,615 INFO L290 TraceCheckUtils]: 16: Hoare triple {9915#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9916#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 17:14:11,616 INFO L290 TraceCheckUtils]: 15: Hoare triple {9915#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9915#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 17:14:11,616 INFO L290 TraceCheckUtils]: 14: Hoare triple {9914#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9915#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 17:14:11,617 INFO L290 TraceCheckUtils]: 13: Hoare triple {9914#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9914#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 17:14:11,617 INFO L290 TraceCheckUtils]: 12: Hoare triple {9913#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9914#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 17:14:11,618 INFO L290 TraceCheckUtils]: 11: Hoare triple {9913#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9913#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:14:11,618 INFO L290 TraceCheckUtils]: 10: Hoare triple {9912#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9913#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:14:11,618 INFO L290 TraceCheckUtils]: 9: Hoare triple {9912#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9912#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:14:11,619 INFO L290 TraceCheckUtils]: 8: Hoare triple {9911#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {9912#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:14:11,619 INFO L290 TraceCheckUtils]: 7: Hoare triple {9911#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {9911#(= main_~i~0 0)} is VALID [2022-04-07 17:14:11,619 INFO L290 TraceCheckUtils]: 6: Hoare triple {9906#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {9911#(= main_~i~0 0)} is VALID [2022-04-07 17:14:11,619 INFO L290 TraceCheckUtils]: 5: Hoare triple {9906#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {9906#true} is VALID [2022-04-07 17:14:11,620 INFO L272 TraceCheckUtils]: 4: Hoare triple {9906#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-07 17:14:11,620 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9906#true} {9906#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-07 17:14:11,620 INFO L290 TraceCheckUtils]: 2: Hoare triple {9906#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-07 17:14:11,620 INFO L290 TraceCheckUtils]: 1: Hoare triple {9906#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {9906#true} is VALID [2022-04-07 17:14:11,620 INFO L272 TraceCheckUtils]: 0: Hoare triple {9906#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9906#true} is VALID [2022-04-07 17:14:11,620 INFO L134 CoverageAnalysis]: Checked inductivity of 164 backedges. 10 proven. 113 refuted. 0 times theorem prover too weak. 41 trivial. 0 not checked. [2022-04-07 17:14:11,620 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [139452030] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 17:14:11,620 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 17:14:11,620 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22, 21] total 33 [2022-04-07 17:14:11,620 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [771411690] [2022-04-07 17:14:11,621 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 17:14:11,621 INFO L78 Accepts]: Start accepts. Automaton has has 33 states, 32 states have (on average 2.3125) internal successors, (74), 30 states have internal predecessors, (74), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) Word has length 70 [2022-04-07 17:14:11,622 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:14:11,622 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 33 states, 32 states have (on average 2.3125) internal successors, (74), 30 states have internal predecessors, (74), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) [2022-04-07 17:14:11,694 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 102 edges. 102 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:14:11,694 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 33 states [2022-04-07 17:14:11,694 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:14:11,694 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2022-04-07 17:14:11,694 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=101, Invalid=949, Unknown=6, NotChecked=0, Total=1056 [2022-04-07 17:14:11,695 INFO L87 Difference]: Start difference. First operand 135 states and 140 transitions. Second operand has 33 states, 32 states have (on average 2.3125) internal successors, (74), 30 states have internal predecessors, (74), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) [2022-04-07 17:14:13,776 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:14:13,776 INFO L93 Difference]: Finished difference Result 157 states and 163 transitions. [2022-04-07 17:14:13,776 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2022-04-07 17:14:13,776 INFO L78 Accepts]: Start accepts. Automaton has has 33 states, 32 states have (on average 2.3125) internal successors, (74), 30 states have internal predecessors, (74), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) Word has length 70 [2022-04-07 17:14:13,776 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:14:13,776 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 33 states, 32 states have (on average 2.3125) internal successors, (74), 30 states have internal predecessors, (74), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) [2022-04-07 17:14:13,777 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 77 transitions. [2022-04-07 17:14:13,778 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 33 states, 32 states have (on average 2.3125) internal successors, (74), 30 states have internal predecessors, (74), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) [2022-04-07 17:14:13,779 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 77 transitions. [2022-04-07 17:14:13,779 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 30 states and 77 transitions. [2022-04-07 17:14:13,869 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 77 edges. 77 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:14:13,872 INFO L225 Difference]: With dead ends: 157 [2022-04-07 17:14:13,872 INFO L226 Difference]: Without dead ends: 157 [2022-04-07 17:14:13,873 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 195 GetRequests, 125 SyntacticMatches, 17 SemanticMatches, 53 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 688 ImplicationChecksByTransitivity, 36.0s TimeCoverageRelationStatistics Valid=277, Invalid=2687, Unknown=6, NotChecked=0, Total=2970 [2022-04-07 17:14:13,873 INFO L913 BasicCegarLoop]: 28 mSDtfsCounter, 70 mSDsluCounter, 214 mSDsCounter, 0 mSdLazyCounter, 1152 mSolverCounterSat, 45 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 70 SdHoareTripleChecker+Valid, 242 SdHoareTripleChecker+Invalid, 1286 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 45 IncrementalHoareTripleChecker+Valid, 1152 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 89 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2022-04-07 17:14:13,873 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [70 Valid, 242 Invalid, 1286 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [45 Valid, 1152 Invalid, 0 Unknown, 89 Unchecked, 0.9s Time] [2022-04-07 17:14:13,874 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 157 states. [2022-04-07 17:14:13,877 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 157 to 147. [2022-04-07 17:14:13,877 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:14:13,878 INFO L82 GeneralOperation]: Start isEquivalent. First operand 157 states. Second operand has 147 states, 112 states have (on average 1.0357142857142858) internal successors, (116), 115 states have internal predecessors, (116), 19 states have call successors, (19), 16 states have call predecessors, (19), 15 states have return successors, (18), 15 states have call predecessors, (18), 18 states have call successors, (18) [2022-04-07 17:14:13,878 INFO L74 IsIncluded]: Start isIncluded. First operand 157 states. Second operand has 147 states, 112 states have (on average 1.0357142857142858) internal successors, (116), 115 states have internal predecessors, (116), 19 states have call successors, (19), 16 states have call predecessors, (19), 15 states have return successors, (18), 15 states have call predecessors, (18), 18 states have call successors, (18) [2022-04-07 17:14:13,878 INFO L87 Difference]: Start difference. First operand 157 states. Second operand has 147 states, 112 states have (on average 1.0357142857142858) internal successors, (116), 115 states have internal predecessors, (116), 19 states have call successors, (19), 16 states have call predecessors, (19), 15 states have return successors, (18), 15 states have call predecessors, (18), 18 states have call successors, (18) [2022-04-07 17:14:13,884 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:14:13,884 INFO L93 Difference]: Finished difference Result 157 states and 163 transitions. [2022-04-07 17:14:13,884 INFO L276 IsEmpty]: Start isEmpty. Operand 157 states and 163 transitions. [2022-04-07 17:14:13,885 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:14:13,885 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:14:13,885 INFO L74 IsIncluded]: Start isIncluded. First operand has 147 states, 112 states have (on average 1.0357142857142858) internal successors, (116), 115 states have internal predecessors, (116), 19 states have call successors, (19), 16 states have call predecessors, (19), 15 states have return successors, (18), 15 states have call predecessors, (18), 18 states have call successors, (18) Second operand 157 states. [2022-04-07 17:14:13,885 INFO L87 Difference]: Start difference. First operand has 147 states, 112 states have (on average 1.0357142857142858) internal successors, (116), 115 states have internal predecessors, (116), 19 states have call successors, (19), 16 states have call predecessors, (19), 15 states have return successors, (18), 15 states have call predecessors, (18), 18 states have call successors, (18) Second operand 157 states. [2022-04-07 17:14:13,888 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:14:13,888 INFO L93 Difference]: Finished difference Result 157 states and 163 transitions. [2022-04-07 17:14:13,888 INFO L276 IsEmpty]: Start isEmpty. Operand 157 states and 163 transitions. [2022-04-07 17:14:13,889 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:14:13,889 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:14:13,889 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:14:13,889 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:14:13,889 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 147 states, 112 states have (on average 1.0357142857142858) internal successors, (116), 115 states have internal predecessors, (116), 19 states have call successors, (19), 16 states have call predecessors, (19), 15 states have return successors, (18), 15 states have call predecessors, (18), 18 states have call successors, (18) [2022-04-07 17:14:13,891 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 147 states to 147 states and 153 transitions. [2022-04-07 17:14:13,892 INFO L78 Accepts]: Start accepts. Automaton has 147 states and 153 transitions. Word has length 70 [2022-04-07 17:14:13,892 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:14:13,892 INFO L478 AbstractCegarLoop]: Abstraction has 147 states and 153 transitions. [2022-04-07 17:14:13,893 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 33 states, 32 states have (on average 2.3125) internal successors, (74), 30 states have internal predecessors, (74), 12 states have call successors, (16), 5 states have call predecessors, (16), 2 states have return successors, (12), 11 states have call predecessors, (12), 11 states have call successors, (12) [2022-04-07 17:14:13,893 INFO L276 IsEmpty]: Start isEmpty. Operand 147 states and 153 transitions. [2022-04-07 17:14:13,894 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2022-04-07 17:14:13,894 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:14:13,894 INFO L499 BasicCegarLoop]: trace histogram [7, 7, 7, 6, 6, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:14:13,920 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Forceful destruction successful, exit code 0 [2022-04-07 17:14:14,118 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 17 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable17 [2022-04-07 17:14:14,118 INFO L403 AbstractCegarLoop]: === Iteration 19 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:14:14,118 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:14:14,118 INFO L85 PathProgramCache]: Analyzing trace with hash -126822625, now seen corresponding path program 16 times [2022-04-07 17:14:14,118 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:14:14,118 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1570000631] [2022-04-07 17:14:14,119 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:14:14,119 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:14:14,133 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:14:14,296 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:14:14,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:14:14,299 INFO L290 TraceCheckUtils]: 0: Hoare triple {11087#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11043#true} is VALID [2022-04-07 17:14:14,299 INFO L290 TraceCheckUtils]: 1: Hoare triple {11043#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-07 17:14:14,299 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {11043#true} {11043#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-07 17:14:14,299 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 22 [2022-04-07 17:14:14,300 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:14:14,302 INFO L290 TraceCheckUtils]: 0: Hoare triple {11043#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11043#true} is VALID [2022-04-07 17:14:14,302 INFO L290 TraceCheckUtils]: 1: Hoare triple {11043#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-07 17:14:14,302 INFO L290 TraceCheckUtils]: 2: Hoare triple {11043#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-07 17:14:14,303 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11043#true} {11056#(and (<= main_~n~0 6) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11056#(and (<= main_~n~0 6) (= main_~i~1 0))} is VALID [2022-04-07 17:14:14,303 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 30 [2022-04-07 17:14:14,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:14:14,306 INFO L290 TraceCheckUtils]: 0: Hoare triple {11043#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11043#true} is VALID [2022-04-07 17:14:14,306 INFO L290 TraceCheckUtils]: 1: Hoare triple {11043#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-07 17:14:14,306 INFO L290 TraceCheckUtils]: 2: Hoare triple {11043#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-07 17:14:14,307 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11043#true} {11061#(<= main_~n~0 (+ 5 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11061#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-07 17:14:14,307 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 38 [2022-04-07 17:14:14,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:14:14,310 INFO L290 TraceCheckUtils]: 0: Hoare triple {11043#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11043#true} is VALID [2022-04-07 17:14:14,310 INFO L290 TraceCheckUtils]: 1: Hoare triple {11043#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-07 17:14:14,310 INFO L290 TraceCheckUtils]: 2: Hoare triple {11043#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-07 17:14:14,311 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11043#true} {11066#(<= main_~n~0 (+ main_~i~1 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11066#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-07 17:14:14,311 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 46 [2022-04-07 17:14:14,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:14:14,314 INFO L290 TraceCheckUtils]: 0: Hoare triple {11043#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11043#true} is VALID [2022-04-07 17:14:14,314 INFO L290 TraceCheckUtils]: 1: Hoare triple {11043#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-07 17:14:14,314 INFO L290 TraceCheckUtils]: 2: Hoare triple {11043#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-07 17:14:14,315 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11043#true} {11071#(<= main_~n~0 (+ main_~i~1 3))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11071#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-07 17:14:14,315 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 54 [2022-04-07 17:14:14,316 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:14:14,318 INFO L290 TraceCheckUtils]: 0: Hoare triple {11043#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11043#true} is VALID [2022-04-07 17:14:14,318 INFO L290 TraceCheckUtils]: 1: Hoare triple {11043#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-07 17:14:14,318 INFO L290 TraceCheckUtils]: 2: Hoare triple {11043#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-07 17:14:14,319 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11043#true} {11076#(<= main_~n~0 (+ main_~i~1 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11076#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 17:14:14,319 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 62 [2022-04-07 17:14:14,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:14:14,322 INFO L290 TraceCheckUtils]: 0: Hoare triple {11043#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11043#true} is VALID [2022-04-07 17:14:14,323 INFO L290 TraceCheckUtils]: 1: Hoare triple {11043#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-07 17:14:14,323 INFO L290 TraceCheckUtils]: 2: Hoare triple {11043#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-07 17:14:14,323 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11043#true} {11081#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11081#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 17:14:14,324 INFO L272 TraceCheckUtils]: 0: Hoare triple {11043#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11087#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:14:14,324 INFO L290 TraceCheckUtils]: 1: Hoare triple {11087#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11043#true} is VALID [2022-04-07 17:14:14,324 INFO L290 TraceCheckUtils]: 2: Hoare triple {11043#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-07 17:14:14,324 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11043#true} {11043#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-07 17:14:14,324 INFO L272 TraceCheckUtils]: 4: Hoare triple {11043#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-07 17:14:14,325 INFO L290 TraceCheckUtils]: 5: Hoare triple {11043#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {11043#true} is VALID [2022-04-07 17:14:14,325 INFO L290 TraceCheckUtils]: 6: Hoare triple {11043#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {11048#(= main_~i~0 0)} is VALID [2022-04-07 17:14:14,325 INFO L290 TraceCheckUtils]: 7: Hoare triple {11048#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11048#(= main_~i~0 0)} is VALID [2022-04-07 17:14:14,326 INFO L290 TraceCheckUtils]: 8: Hoare triple {11048#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11049#(<= main_~i~0 1)} is VALID [2022-04-07 17:14:14,326 INFO L290 TraceCheckUtils]: 9: Hoare triple {11049#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11049#(<= main_~i~0 1)} is VALID [2022-04-07 17:14:14,327 INFO L290 TraceCheckUtils]: 10: Hoare triple {11049#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11050#(<= main_~i~0 2)} is VALID [2022-04-07 17:14:14,327 INFO L290 TraceCheckUtils]: 11: Hoare triple {11050#(<= main_~i~0 2)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11050#(<= main_~i~0 2)} is VALID [2022-04-07 17:14:14,328 INFO L290 TraceCheckUtils]: 12: Hoare triple {11050#(<= main_~i~0 2)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11051#(<= main_~i~0 3)} is VALID [2022-04-07 17:14:14,328 INFO L290 TraceCheckUtils]: 13: Hoare triple {11051#(<= main_~i~0 3)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11051#(<= main_~i~0 3)} is VALID [2022-04-07 17:14:14,328 INFO L290 TraceCheckUtils]: 14: Hoare triple {11051#(<= main_~i~0 3)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11052#(<= main_~i~0 4)} is VALID [2022-04-07 17:14:14,329 INFO L290 TraceCheckUtils]: 15: Hoare triple {11052#(<= main_~i~0 4)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11052#(<= main_~i~0 4)} is VALID [2022-04-07 17:14:14,329 INFO L290 TraceCheckUtils]: 16: Hoare triple {11052#(<= main_~i~0 4)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11053#(<= main_~i~0 5)} is VALID [2022-04-07 17:14:14,330 INFO L290 TraceCheckUtils]: 17: Hoare triple {11053#(<= main_~i~0 5)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11053#(<= main_~i~0 5)} is VALID [2022-04-07 17:14:14,330 INFO L290 TraceCheckUtils]: 18: Hoare triple {11053#(<= main_~i~0 5)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11054#(<= main_~i~0 6)} is VALID [2022-04-07 17:14:14,331 INFO L290 TraceCheckUtils]: 19: Hoare triple {11054#(<= main_~i~0 6)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {11055#(<= main_~n~0 6)} is VALID [2022-04-07 17:14:14,331 INFO L290 TraceCheckUtils]: 20: Hoare triple {11055#(<= main_~n~0 6)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {11056#(and (<= main_~n~0 6) (= main_~i~1 0))} is VALID [2022-04-07 17:14:14,332 INFO L290 TraceCheckUtils]: 21: Hoare triple {11056#(and (<= main_~n~0 6) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11056#(and (<= main_~n~0 6) (= main_~i~1 0))} is VALID [2022-04-07 17:14:14,332 INFO L272 TraceCheckUtils]: 22: Hoare triple {11056#(and (<= main_~n~0 6) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11043#true} is VALID [2022-04-07 17:14:14,332 INFO L290 TraceCheckUtils]: 23: Hoare triple {11043#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11043#true} is VALID [2022-04-07 17:14:14,332 INFO L290 TraceCheckUtils]: 24: Hoare triple {11043#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-07 17:14:14,332 INFO L290 TraceCheckUtils]: 25: Hoare triple {11043#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-07 17:14:14,333 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {11043#true} {11056#(and (<= main_~n~0 6) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11056#(and (<= main_~n~0 6) (= main_~i~1 0))} is VALID [2022-04-07 17:14:14,333 INFO L290 TraceCheckUtils]: 27: Hoare triple {11056#(and (<= main_~n~0 6) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11056#(and (<= main_~n~0 6) (= main_~i~1 0))} is VALID [2022-04-07 17:14:14,333 INFO L290 TraceCheckUtils]: 28: Hoare triple {11056#(and (<= main_~n~0 6) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11061#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-07 17:14:14,334 INFO L290 TraceCheckUtils]: 29: Hoare triple {11061#(<= main_~n~0 (+ 5 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11061#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-07 17:14:14,334 INFO L272 TraceCheckUtils]: 30: Hoare triple {11061#(<= main_~n~0 (+ 5 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11043#true} is VALID [2022-04-07 17:14:14,334 INFO L290 TraceCheckUtils]: 31: Hoare triple {11043#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11043#true} is VALID [2022-04-07 17:14:14,334 INFO L290 TraceCheckUtils]: 32: Hoare triple {11043#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-07 17:14:14,334 INFO L290 TraceCheckUtils]: 33: Hoare triple {11043#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-07 17:14:14,335 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {11043#true} {11061#(<= main_~n~0 (+ 5 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11061#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-07 17:14:14,335 INFO L290 TraceCheckUtils]: 35: Hoare triple {11061#(<= main_~n~0 (+ 5 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11061#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-07 17:14:14,336 INFO L290 TraceCheckUtils]: 36: Hoare triple {11061#(<= main_~n~0 (+ 5 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11066#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-07 17:14:14,336 INFO L290 TraceCheckUtils]: 37: Hoare triple {11066#(<= main_~n~0 (+ main_~i~1 4))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11066#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-07 17:14:14,336 INFO L272 TraceCheckUtils]: 38: Hoare triple {11066#(<= main_~n~0 (+ main_~i~1 4))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11043#true} is VALID [2022-04-07 17:14:14,336 INFO L290 TraceCheckUtils]: 39: Hoare triple {11043#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11043#true} is VALID [2022-04-07 17:14:14,336 INFO L290 TraceCheckUtils]: 40: Hoare triple {11043#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-07 17:14:14,336 INFO L290 TraceCheckUtils]: 41: Hoare triple {11043#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-07 17:14:14,337 INFO L284 TraceCheckUtils]: 42: Hoare quadruple {11043#true} {11066#(<= main_~n~0 (+ main_~i~1 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11066#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-07 17:14:14,337 INFO L290 TraceCheckUtils]: 43: Hoare triple {11066#(<= main_~n~0 (+ main_~i~1 4))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11066#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-07 17:14:14,338 INFO L290 TraceCheckUtils]: 44: Hoare triple {11066#(<= main_~n~0 (+ main_~i~1 4))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11071#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-07 17:14:14,338 INFO L290 TraceCheckUtils]: 45: Hoare triple {11071#(<= main_~n~0 (+ main_~i~1 3))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11071#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-07 17:14:14,339 INFO L272 TraceCheckUtils]: 46: Hoare triple {11071#(<= main_~n~0 (+ main_~i~1 3))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11043#true} is VALID [2022-04-07 17:14:14,339 INFO L290 TraceCheckUtils]: 47: Hoare triple {11043#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11043#true} is VALID [2022-04-07 17:14:14,339 INFO L290 TraceCheckUtils]: 48: Hoare triple {11043#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-07 17:14:14,339 INFO L290 TraceCheckUtils]: 49: Hoare triple {11043#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-07 17:14:14,339 INFO L284 TraceCheckUtils]: 50: Hoare quadruple {11043#true} {11071#(<= main_~n~0 (+ main_~i~1 3))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11071#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-07 17:14:14,340 INFO L290 TraceCheckUtils]: 51: Hoare triple {11071#(<= main_~n~0 (+ main_~i~1 3))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11071#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-07 17:14:14,341 INFO L290 TraceCheckUtils]: 52: Hoare triple {11071#(<= main_~n~0 (+ main_~i~1 3))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11076#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 17:14:14,341 INFO L290 TraceCheckUtils]: 53: Hoare triple {11076#(<= main_~n~0 (+ main_~i~1 2))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11076#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 17:14:14,341 INFO L272 TraceCheckUtils]: 54: Hoare triple {11076#(<= main_~n~0 (+ main_~i~1 2))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11043#true} is VALID [2022-04-07 17:14:14,341 INFO L290 TraceCheckUtils]: 55: Hoare triple {11043#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11043#true} is VALID [2022-04-07 17:14:14,341 INFO L290 TraceCheckUtils]: 56: Hoare triple {11043#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-07 17:14:14,341 INFO L290 TraceCheckUtils]: 57: Hoare triple {11043#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-07 17:14:14,342 INFO L284 TraceCheckUtils]: 58: Hoare quadruple {11043#true} {11076#(<= main_~n~0 (+ main_~i~1 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11076#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 17:14:14,342 INFO L290 TraceCheckUtils]: 59: Hoare triple {11076#(<= main_~n~0 (+ main_~i~1 2))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11076#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 17:14:14,342 INFO L290 TraceCheckUtils]: 60: Hoare triple {11076#(<= main_~n~0 (+ main_~i~1 2))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11081#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 17:14:14,343 INFO L290 TraceCheckUtils]: 61: Hoare triple {11081#(<= main_~n~0 (+ main_~i~1 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11081#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 17:14:14,343 INFO L272 TraceCheckUtils]: 62: Hoare triple {11081#(<= main_~n~0 (+ main_~i~1 1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11043#true} is VALID [2022-04-07 17:14:14,343 INFO L290 TraceCheckUtils]: 63: Hoare triple {11043#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11043#true} is VALID [2022-04-07 17:14:14,343 INFO L290 TraceCheckUtils]: 64: Hoare triple {11043#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-07 17:14:14,343 INFO L290 TraceCheckUtils]: 65: Hoare triple {11043#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-07 17:14:14,344 INFO L284 TraceCheckUtils]: 66: Hoare quadruple {11043#true} {11081#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11081#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 17:14:14,344 INFO L290 TraceCheckUtils]: 67: Hoare triple {11081#(<= main_~n~0 (+ main_~i~1 1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11081#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 17:14:14,344 INFO L290 TraceCheckUtils]: 68: Hoare triple {11081#(<= main_~n~0 (+ main_~i~1 1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11086#(<= main_~n~0 main_~i~1)} is VALID [2022-04-07 17:14:14,345 INFO L290 TraceCheckUtils]: 69: Hoare triple {11086#(<= main_~n~0 main_~i~1)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11044#false} is VALID [2022-04-07 17:14:14,345 INFO L272 TraceCheckUtils]: 70: Hoare triple {11044#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11044#false} is VALID [2022-04-07 17:14:14,345 INFO L290 TraceCheckUtils]: 71: Hoare triple {11044#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11044#false} is VALID [2022-04-07 17:14:14,345 INFO L290 TraceCheckUtils]: 72: Hoare triple {11044#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {11044#false} is VALID [2022-04-07 17:14:14,345 INFO L290 TraceCheckUtils]: 73: Hoare triple {11044#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11044#false} is VALID [2022-04-07 17:14:14,345 INFO L134 CoverageAnalysis]: Checked inductivity of 180 backedges. 63 proven. 57 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2022-04-07 17:14:14,345 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:14:14,345 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1570000631] [2022-04-07 17:14:14,345 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1570000631] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:14:14,345 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [670784845] [2022-04-07 17:14:14,345 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-07 17:14:14,346 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:14:14,346 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:14:14,346 INFO L229 MonitoredProcess]: Starting monitored process 18 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:14:14,347 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2022-04-07 17:14:14,441 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-07 17:14:14,441 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 17:14:14,442 INFO L263 TraceCheckSpWp]: Trace formula consists of 206 conjuncts, 16 conjunts are in the unsatisfiable core [2022-04-07 17:14:14,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:14:14,457 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:14:14,950 INFO L272 TraceCheckUtils]: 0: Hoare triple {11043#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-07 17:14:14,950 INFO L290 TraceCheckUtils]: 1: Hoare triple {11043#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11043#true} is VALID [2022-04-07 17:14:14,950 INFO L290 TraceCheckUtils]: 2: Hoare triple {11043#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-07 17:14:14,950 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11043#true} {11043#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-07 17:14:14,950 INFO L272 TraceCheckUtils]: 4: Hoare triple {11043#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-07 17:14:14,950 INFO L290 TraceCheckUtils]: 5: Hoare triple {11043#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {11043#true} is VALID [2022-04-07 17:14:14,951 INFO L290 TraceCheckUtils]: 6: Hoare triple {11043#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {11109#(<= main_~i~0 0)} is VALID [2022-04-07 17:14:14,951 INFO L290 TraceCheckUtils]: 7: Hoare triple {11109#(<= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11109#(<= main_~i~0 0)} is VALID [2022-04-07 17:14:14,951 INFO L290 TraceCheckUtils]: 8: Hoare triple {11109#(<= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11049#(<= main_~i~0 1)} is VALID [2022-04-07 17:14:14,952 INFO L290 TraceCheckUtils]: 9: Hoare triple {11049#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11049#(<= main_~i~0 1)} is VALID [2022-04-07 17:14:14,952 INFO L290 TraceCheckUtils]: 10: Hoare triple {11049#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11050#(<= main_~i~0 2)} is VALID [2022-04-07 17:14:14,952 INFO L290 TraceCheckUtils]: 11: Hoare triple {11050#(<= main_~i~0 2)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11050#(<= main_~i~0 2)} is VALID [2022-04-07 17:14:14,953 INFO L290 TraceCheckUtils]: 12: Hoare triple {11050#(<= main_~i~0 2)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11051#(<= main_~i~0 3)} is VALID [2022-04-07 17:14:14,953 INFO L290 TraceCheckUtils]: 13: Hoare triple {11051#(<= main_~i~0 3)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11051#(<= main_~i~0 3)} is VALID [2022-04-07 17:14:14,953 INFO L290 TraceCheckUtils]: 14: Hoare triple {11051#(<= main_~i~0 3)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11052#(<= main_~i~0 4)} is VALID [2022-04-07 17:14:14,954 INFO L290 TraceCheckUtils]: 15: Hoare triple {11052#(<= main_~i~0 4)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11052#(<= main_~i~0 4)} is VALID [2022-04-07 17:14:14,954 INFO L290 TraceCheckUtils]: 16: Hoare triple {11052#(<= main_~i~0 4)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11053#(<= main_~i~0 5)} is VALID [2022-04-07 17:14:14,954 INFO L290 TraceCheckUtils]: 17: Hoare triple {11053#(<= main_~i~0 5)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11053#(<= main_~i~0 5)} is VALID [2022-04-07 17:14:14,955 INFO L290 TraceCheckUtils]: 18: Hoare triple {11053#(<= main_~i~0 5)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11054#(<= main_~i~0 6)} is VALID [2022-04-07 17:14:14,955 INFO L290 TraceCheckUtils]: 19: Hoare triple {11054#(<= main_~i~0 6)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {11055#(<= main_~n~0 6)} is VALID [2022-04-07 17:14:14,955 INFO L290 TraceCheckUtils]: 20: Hoare triple {11055#(<= main_~n~0 6)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {11152#(and (<= main_~n~0 6) (<= 0 main_~i~1))} is VALID [2022-04-07 17:14:14,956 INFO L290 TraceCheckUtils]: 21: Hoare triple {11152#(and (<= main_~n~0 6) (<= 0 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11152#(and (<= main_~n~0 6) (<= 0 main_~i~1))} is VALID [2022-04-07 17:14:14,956 INFO L272 TraceCheckUtils]: 22: Hoare triple {11152#(and (<= main_~n~0 6) (<= 0 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11043#true} is VALID [2022-04-07 17:14:14,956 INFO L290 TraceCheckUtils]: 23: Hoare triple {11043#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11043#true} is VALID [2022-04-07 17:14:14,956 INFO L290 TraceCheckUtils]: 24: Hoare triple {11043#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-07 17:14:14,956 INFO L290 TraceCheckUtils]: 25: Hoare triple {11043#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-07 17:14:14,957 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {11043#true} {11152#(and (<= main_~n~0 6) (<= 0 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11152#(and (<= main_~n~0 6) (<= 0 main_~i~1))} is VALID [2022-04-07 17:14:14,957 INFO L290 TraceCheckUtils]: 27: Hoare triple {11152#(and (<= main_~n~0 6) (<= 0 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11152#(and (<= main_~n~0 6) (<= 0 main_~i~1))} is VALID [2022-04-07 17:14:14,957 INFO L290 TraceCheckUtils]: 28: Hoare triple {11152#(and (<= main_~n~0 6) (<= 0 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11177#(and (<= main_~n~0 6) (<= 1 main_~i~1))} is VALID [2022-04-07 17:14:14,958 INFO L290 TraceCheckUtils]: 29: Hoare triple {11177#(and (<= main_~n~0 6) (<= 1 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11177#(and (<= main_~n~0 6) (<= 1 main_~i~1))} is VALID [2022-04-07 17:14:14,958 INFO L272 TraceCheckUtils]: 30: Hoare triple {11177#(and (<= main_~n~0 6) (<= 1 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11043#true} is VALID [2022-04-07 17:14:14,958 INFO L290 TraceCheckUtils]: 31: Hoare triple {11043#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11043#true} is VALID [2022-04-07 17:14:14,958 INFO L290 TraceCheckUtils]: 32: Hoare triple {11043#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-07 17:14:14,958 INFO L290 TraceCheckUtils]: 33: Hoare triple {11043#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-07 17:14:14,959 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {11043#true} {11177#(and (<= main_~n~0 6) (<= 1 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11177#(and (<= main_~n~0 6) (<= 1 main_~i~1))} is VALID [2022-04-07 17:14:14,959 INFO L290 TraceCheckUtils]: 35: Hoare triple {11177#(and (<= main_~n~0 6) (<= 1 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11177#(and (<= main_~n~0 6) (<= 1 main_~i~1))} is VALID [2022-04-07 17:14:14,959 INFO L290 TraceCheckUtils]: 36: Hoare triple {11177#(and (<= main_~n~0 6) (<= 1 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11202#(and (<= main_~n~0 6) (<= 2 main_~i~1))} is VALID [2022-04-07 17:14:14,960 INFO L290 TraceCheckUtils]: 37: Hoare triple {11202#(and (<= main_~n~0 6) (<= 2 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11202#(and (<= main_~n~0 6) (<= 2 main_~i~1))} is VALID [2022-04-07 17:14:14,960 INFO L272 TraceCheckUtils]: 38: Hoare triple {11202#(and (<= main_~n~0 6) (<= 2 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11043#true} is VALID [2022-04-07 17:14:14,960 INFO L290 TraceCheckUtils]: 39: Hoare triple {11043#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11043#true} is VALID [2022-04-07 17:14:14,960 INFO L290 TraceCheckUtils]: 40: Hoare triple {11043#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-07 17:14:14,960 INFO L290 TraceCheckUtils]: 41: Hoare triple {11043#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-07 17:14:14,961 INFO L284 TraceCheckUtils]: 42: Hoare quadruple {11043#true} {11202#(and (<= main_~n~0 6) (<= 2 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11202#(and (<= main_~n~0 6) (<= 2 main_~i~1))} is VALID [2022-04-07 17:14:14,961 INFO L290 TraceCheckUtils]: 43: Hoare triple {11202#(and (<= main_~n~0 6) (<= 2 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11202#(and (<= main_~n~0 6) (<= 2 main_~i~1))} is VALID [2022-04-07 17:14:14,961 INFO L290 TraceCheckUtils]: 44: Hoare triple {11202#(and (<= main_~n~0 6) (<= 2 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11227#(and (<= main_~n~0 6) (<= 3 main_~i~1))} is VALID [2022-04-07 17:14:14,962 INFO L290 TraceCheckUtils]: 45: Hoare triple {11227#(and (<= main_~n~0 6) (<= 3 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11227#(and (<= main_~n~0 6) (<= 3 main_~i~1))} is VALID [2022-04-07 17:14:14,962 INFO L272 TraceCheckUtils]: 46: Hoare triple {11227#(and (<= main_~n~0 6) (<= 3 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11043#true} is VALID [2022-04-07 17:14:14,962 INFO L290 TraceCheckUtils]: 47: Hoare triple {11043#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11043#true} is VALID [2022-04-07 17:14:14,962 INFO L290 TraceCheckUtils]: 48: Hoare triple {11043#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-07 17:14:14,962 INFO L290 TraceCheckUtils]: 49: Hoare triple {11043#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-07 17:14:14,962 INFO L284 TraceCheckUtils]: 50: Hoare quadruple {11043#true} {11227#(and (<= main_~n~0 6) (<= 3 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11227#(and (<= main_~n~0 6) (<= 3 main_~i~1))} is VALID [2022-04-07 17:14:14,963 INFO L290 TraceCheckUtils]: 51: Hoare triple {11227#(and (<= main_~n~0 6) (<= 3 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11227#(and (<= main_~n~0 6) (<= 3 main_~i~1))} is VALID [2022-04-07 17:14:14,963 INFO L290 TraceCheckUtils]: 52: Hoare triple {11227#(and (<= main_~n~0 6) (<= 3 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11252#(and (<= main_~n~0 6) (<= 4 main_~i~1))} is VALID [2022-04-07 17:14:14,964 INFO L290 TraceCheckUtils]: 53: Hoare triple {11252#(and (<= main_~n~0 6) (<= 4 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11252#(and (<= main_~n~0 6) (<= 4 main_~i~1))} is VALID [2022-04-07 17:14:14,964 INFO L272 TraceCheckUtils]: 54: Hoare triple {11252#(and (<= main_~n~0 6) (<= 4 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11043#true} is VALID [2022-04-07 17:14:14,964 INFO L290 TraceCheckUtils]: 55: Hoare triple {11043#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11043#true} is VALID [2022-04-07 17:14:14,964 INFO L290 TraceCheckUtils]: 56: Hoare triple {11043#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-07 17:14:14,964 INFO L290 TraceCheckUtils]: 57: Hoare triple {11043#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-07 17:14:14,964 INFO L284 TraceCheckUtils]: 58: Hoare quadruple {11043#true} {11252#(and (<= main_~n~0 6) (<= 4 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11252#(and (<= main_~n~0 6) (<= 4 main_~i~1))} is VALID [2022-04-07 17:14:14,965 INFO L290 TraceCheckUtils]: 59: Hoare triple {11252#(and (<= main_~n~0 6) (<= 4 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11252#(and (<= main_~n~0 6) (<= 4 main_~i~1))} is VALID [2022-04-07 17:14:14,965 INFO L290 TraceCheckUtils]: 60: Hoare triple {11252#(and (<= main_~n~0 6) (<= 4 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11277#(and (<= main_~n~0 6) (<= 5 main_~i~1))} is VALID [2022-04-07 17:14:14,966 INFO L290 TraceCheckUtils]: 61: Hoare triple {11277#(and (<= main_~n~0 6) (<= 5 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11277#(and (<= main_~n~0 6) (<= 5 main_~i~1))} is VALID [2022-04-07 17:14:14,966 INFO L272 TraceCheckUtils]: 62: Hoare triple {11277#(and (<= main_~n~0 6) (<= 5 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11043#true} is VALID [2022-04-07 17:14:14,966 INFO L290 TraceCheckUtils]: 63: Hoare triple {11043#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11043#true} is VALID [2022-04-07 17:14:14,966 INFO L290 TraceCheckUtils]: 64: Hoare triple {11043#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-07 17:14:14,966 INFO L290 TraceCheckUtils]: 65: Hoare triple {11043#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-07 17:14:14,966 INFO L284 TraceCheckUtils]: 66: Hoare quadruple {11043#true} {11277#(and (<= main_~n~0 6) (<= 5 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11277#(and (<= main_~n~0 6) (<= 5 main_~i~1))} is VALID [2022-04-07 17:14:14,967 INFO L290 TraceCheckUtils]: 67: Hoare triple {11277#(and (<= main_~n~0 6) (<= 5 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11277#(and (<= main_~n~0 6) (<= 5 main_~i~1))} is VALID [2022-04-07 17:14:14,967 INFO L290 TraceCheckUtils]: 68: Hoare triple {11277#(and (<= main_~n~0 6) (<= 5 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11302#(and (<= main_~n~0 6) (<= 6 main_~i~1))} is VALID [2022-04-07 17:14:14,967 INFO L290 TraceCheckUtils]: 69: Hoare triple {11302#(and (<= main_~n~0 6) (<= 6 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11044#false} is VALID [2022-04-07 17:14:14,968 INFO L272 TraceCheckUtils]: 70: Hoare triple {11044#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11044#false} is VALID [2022-04-07 17:14:14,968 INFO L290 TraceCheckUtils]: 71: Hoare triple {11044#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11044#false} is VALID [2022-04-07 17:14:14,968 INFO L290 TraceCheckUtils]: 72: Hoare triple {11044#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {11044#false} is VALID [2022-04-07 17:14:14,968 INFO L290 TraceCheckUtils]: 73: Hoare triple {11044#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11044#false} is VALID [2022-04-07 17:14:14,968 INFO L134 CoverageAnalysis]: Checked inductivity of 180 backedges. 84 proven. 36 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2022-04-07 17:14:14,968 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 17:14:15,288 INFO L290 TraceCheckUtils]: 73: Hoare triple {11044#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11044#false} is VALID [2022-04-07 17:14:15,288 INFO L290 TraceCheckUtils]: 72: Hoare triple {11044#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {11044#false} is VALID [2022-04-07 17:14:15,288 INFO L290 TraceCheckUtils]: 71: Hoare triple {11044#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11044#false} is VALID [2022-04-07 17:14:15,288 INFO L272 TraceCheckUtils]: 70: Hoare triple {11044#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11044#false} is VALID [2022-04-07 17:14:15,289 INFO L290 TraceCheckUtils]: 69: Hoare triple {11086#(<= main_~n~0 main_~i~1)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11044#false} is VALID [2022-04-07 17:14:15,290 INFO L290 TraceCheckUtils]: 68: Hoare triple {11081#(<= main_~n~0 (+ main_~i~1 1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11086#(<= main_~n~0 main_~i~1)} is VALID [2022-04-07 17:14:15,290 INFO L290 TraceCheckUtils]: 67: Hoare triple {11081#(<= main_~n~0 (+ main_~i~1 1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11081#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 17:14:15,291 INFO L284 TraceCheckUtils]: 66: Hoare quadruple {11043#true} {11081#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11081#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 17:14:15,291 INFO L290 TraceCheckUtils]: 65: Hoare triple {11043#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-07 17:14:15,291 INFO L290 TraceCheckUtils]: 64: Hoare triple {11043#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-07 17:14:15,291 INFO L290 TraceCheckUtils]: 63: Hoare triple {11043#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11043#true} is VALID [2022-04-07 17:14:15,291 INFO L272 TraceCheckUtils]: 62: Hoare triple {11081#(<= main_~n~0 (+ main_~i~1 1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11043#true} is VALID [2022-04-07 17:14:15,291 INFO L290 TraceCheckUtils]: 61: Hoare triple {11081#(<= main_~n~0 (+ main_~i~1 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11081#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 17:14:15,292 INFO L290 TraceCheckUtils]: 60: Hoare triple {11076#(<= main_~n~0 (+ main_~i~1 2))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11081#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 17:14:15,292 INFO L290 TraceCheckUtils]: 59: Hoare triple {11076#(<= main_~n~0 (+ main_~i~1 2))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11076#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 17:14:15,292 INFO L284 TraceCheckUtils]: 58: Hoare quadruple {11043#true} {11076#(<= main_~n~0 (+ main_~i~1 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11076#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 17:14:15,292 INFO L290 TraceCheckUtils]: 57: Hoare triple {11043#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-07 17:14:15,292 INFO L290 TraceCheckUtils]: 56: Hoare triple {11043#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-07 17:14:15,293 INFO L290 TraceCheckUtils]: 55: Hoare triple {11043#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11043#true} is VALID [2022-04-07 17:14:15,293 INFO L272 TraceCheckUtils]: 54: Hoare triple {11076#(<= main_~n~0 (+ main_~i~1 2))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11043#true} is VALID [2022-04-07 17:14:15,293 INFO L290 TraceCheckUtils]: 53: Hoare triple {11076#(<= main_~n~0 (+ main_~i~1 2))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11076#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 17:14:15,293 INFO L290 TraceCheckUtils]: 52: Hoare triple {11071#(<= main_~n~0 (+ main_~i~1 3))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11076#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 17:14:15,294 INFO L290 TraceCheckUtils]: 51: Hoare triple {11071#(<= main_~n~0 (+ main_~i~1 3))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11071#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-07 17:14:15,294 INFO L284 TraceCheckUtils]: 50: Hoare quadruple {11043#true} {11071#(<= main_~n~0 (+ main_~i~1 3))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11071#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-07 17:14:15,294 INFO L290 TraceCheckUtils]: 49: Hoare triple {11043#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-07 17:14:15,294 INFO L290 TraceCheckUtils]: 48: Hoare triple {11043#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-07 17:14:15,294 INFO L290 TraceCheckUtils]: 47: Hoare triple {11043#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11043#true} is VALID [2022-04-07 17:14:15,294 INFO L272 TraceCheckUtils]: 46: Hoare triple {11071#(<= main_~n~0 (+ main_~i~1 3))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11043#true} is VALID [2022-04-07 17:14:15,295 INFO L290 TraceCheckUtils]: 45: Hoare triple {11071#(<= main_~n~0 (+ main_~i~1 3))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11071#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-07 17:14:15,295 INFO L290 TraceCheckUtils]: 44: Hoare triple {11066#(<= main_~n~0 (+ main_~i~1 4))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11071#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-07 17:14:15,296 INFO L290 TraceCheckUtils]: 43: Hoare triple {11066#(<= main_~n~0 (+ main_~i~1 4))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11066#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-07 17:14:15,296 INFO L284 TraceCheckUtils]: 42: Hoare quadruple {11043#true} {11066#(<= main_~n~0 (+ main_~i~1 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11066#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-07 17:14:15,296 INFO L290 TraceCheckUtils]: 41: Hoare triple {11043#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-07 17:14:15,296 INFO L290 TraceCheckUtils]: 40: Hoare triple {11043#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-07 17:14:15,296 INFO L290 TraceCheckUtils]: 39: Hoare triple {11043#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11043#true} is VALID [2022-04-07 17:14:15,296 INFO L272 TraceCheckUtils]: 38: Hoare triple {11066#(<= main_~n~0 (+ main_~i~1 4))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11043#true} is VALID [2022-04-07 17:14:15,297 INFO L290 TraceCheckUtils]: 37: Hoare triple {11066#(<= main_~n~0 (+ main_~i~1 4))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11066#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-07 17:14:15,297 INFO L290 TraceCheckUtils]: 36: Hoare triple {11061#(<= main_~n~0 (+ 5 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11066#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-07 17:14:15,297 INFO L290 TraceCheckUtils]: 35: Hoare triple {11061#(<= main_~n~0 (+ 5 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11061#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-07 17:14:15,298 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {11043#true} {11061#(<= main_~n~0 (+ 5 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11061#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-07 17:14:15,298 INFO L290 TraceCheckUtils]: 33: Hoare triple {11043#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-07 17:14:15,298 INFO L290 TraceCheckUtils]: 32: Hoare triple {11043#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-07 17:14:15,298 INFO L290 TraceCheckUtils]: 31: Hoare triple {11043#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11043#true} is VALID [2022-04-07 17:14:15,298 INFO L272 TraceCheckUtils]: 30: Hoare triple {11061#(<= main_~n~0 (+ 5 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11043#true} is VALID [2022-04-07 17:14:15,298 INFO L290 TraceCheckUtils]: 29: Hoare triple {11061#(<= main_~n~0 (+ 5 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11061#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-07 17:14:15,299 INFO L290 TraceCheckUtils]: 28: Hoare triple {11453#(<= main_~n~0 (+ main_~i~1 6))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {11061#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-07 17:14:15,299 INFO L290 TraceCheckUtils]: 27: Hoare triple {11453#(<= main_~n~0 (+ main_~i~1 6))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {11453#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-07 17:14:15,299 INFO L284 TraceCheckUtils]: 26: Hoare quadruple {11043#true} {11453#(<= main_~n~0 (+ main_~i~1 6))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11453#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-07 17:14:15,300 INFO L290 TraceCheckUtils]: 25: Hoare triple {11043#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-07 17:14:15,300 INFO L290 TraceCheckUtils]: 24: Hoare triple {11043#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-07 17:14:15,300 INFO L290 TraceCheckUtils]: 23: Hoare triple {11043#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11043#true} is VALID [2022-04-07 17:14:15,300 INFO L272 TraceCheckUtils]: 22: Hoare triple {11453#(<= main_~n~0 (+ main_~i~1 6))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {11043#true} is VALID [2022-04-07 17:14:15,300 INFO L290 TraceCheckUtils]: 21: Hoare triple {11453#(<= main_~n~0 (+ main_~i~1 6))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {11453#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-07 17:14:15,300 INFO L290 TraceCheckUtils]: 20: Hoare triple {11055#(<= main_~n~0 6)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {11453#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-07 17:14:15,301 INFO L290 TraceCheckUtils]: 19: Hoare triple {11054#(<= main_~i~0 6)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {11055#(<= main_~n~0 6)} is VALID [2022-04-07 17:14:15,301 INFO L290 TraceCheckUtils]: 18: Hoare triple {11053#(<= main_~i~0 5)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11054#(<= main_~i~0 6)} is VALID [2022-04-07 17:14:15,302 INFO L290 TraceCheckUtils]: 17: Hoare triple {11053#(<= main_~i~0 5)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11053#(<= main_~i~0 5)} is VALID [2022-04-07 17:14:15,302 INFO L290 TraceCheckUtils]: 16: Hoare triple {11052#(<= main_~i~0 4)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11053#(<= main_~i~0 5)} is VALID [2022-04-07 17:14:15,302 INFO L290 TraceCheckUtils]: 15: Hoare triple {11052#(<= main_~i~0 4)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11052#(<= main_~i~0 4)} is VALID [2022-04-07 17:14:15,303 INFO L290 TraceCheckUtils]: 14: Hoare triple {11051#(<= main_~i~0 3)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11052#(<= main_~i~0 4)} is VALID [2022-04-07 17:14:15,303 INFO L290 TraceCheckUtils]: 13: Hoare triple {11051#(<= main_~i~0 3)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11051#(<= main_~i~0 3)} is VALID [2022-04-07 17:14:15,303 INFO L290 TraceCheckUtils]: 12: Hoare triple {11050#(<= main_~i~0 2)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11051#(<= main_~i~0 3)} is VALID [2022-04-07 17:14:15,304 INFO L290 TraceCheckUtils]: 11: Hoare triple {11050#(<= main_~i~0 2)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11050#(<= main_~i~0 2)} is VALID [2022-04-07 17:14:15,304 INFO L290 TraceCheckUtils]: 10: Hoare triple {11049#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11050#(<= main_~i~0 2)} is VALID [2022-04-07 17:14:15,304 INFO L290 TraceCheckUtils]: 9: Hoare triple {11049#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11049#(<= main_~i~0 1)} is VALID [2022-04-07 17:14:15,305 INFO L290 TraceCheckUtils]: 8: Hoare triple {11109#(<= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {11049#(<= main_~i~0 1)} is VALID [2022-04-07 17:14:15,305 INFO L290 TraceCheckUtils]: 7: Hoare triple {11109#(<= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {11109#(<= main_~i~0 0)} is VALID [2022-04-07 17:14:15,305 INFO L290 TraceCheckUtils]: 6: Hoare triple {11043#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {11109#(<= main_~i~0 0)} is VALID [2022-04-07 17:14:15,305 INFO L290 TraceCheckUtils]: 5: Hoare triple {11043#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {11043#true} is VALID [2022-04-07 17:14:15,306 INFO L272 TraceCheckUtils]: 4: Hoare triple {11043#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-07 17:14:15,306 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11043#true} {11043#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-07 17:14:15,306 INFO L290 TraceCheckUtils]: 2: Hoare triple {11043#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-07 17:14:15,306 INFO L290 TraceCheckUtils]: 1: Hoare triple {11043#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11043#true} is VALID [2022-04-07 17:14:15,306 INFO L272 TraceCheckUtils]: 0: Hoare triple {11043#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11043#true} is VALID [2022-04-07 17:14:15,306 INFO L134 CoverageAnalysis]: Checked inductivity of 180 backedges. 84 proven. 36 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2022-04-07 17:14:15,306 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [670784845] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 17:14:15,306 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 17:14:15,306 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 17, 17] total 27 [2022-04-07 17:14:15,307 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1889790648] [2022-04-07 17:14:15,307 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 17:14:15,314 INFO L78 Accepts]: Start accepts. Automaton has has 27 states, 27 states have (on average 2.6296296296296298) internal successors, (71), 26 states have internal predecessors, (71), 15 states have call successors, (17), 3 states have call predecessors, (17), 1 states have return successors, (14), 14 states have call predecessors, (14), 14 states have call successors, (14) Word has length 74 [2022-04-07 17:14:15,315 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:14:15,315 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 27 states, 27 states have (on average 2.6296296296296298) internal successors, (71), 26 states have internal predecessors, (71), 15 states have call successors, (17), 3 states have call predecessors, (17), 1 states have return successors, (14), 14 states have call predecessors, (14), 14 states have call successors, (14) [2022-04-07 17:14:15,398 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 102 edges. 102 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:14:15,398 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 27 states [2022-04-07 17:14:15,398 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:14:15,399 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2022-04-07 17:14:15,399 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=159, Invalid=543, Unknown=0, NotChecked=0, Total=702 [2022-04-07 17:14:15,399 INFO L87 Difference]: Start difference. First operand 147 states and 153 transitions. Second operand has 27 states, 27 states have (on average 2.6296296296296298) internal successors, (71), 26 states have internal predecessors, (71), 15 states have call successors, (17), 3 states have call predecessors, (17), 1 states have return successors, (14), 14 states have call predecessors, (14), 14 states have call successors, (14) [2022-04-07 17:14:16,224 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:14:16,225 INFO L93 Difference]: Finished difference Result 154 states and 160 transitions. [2022-04-07 17:14:16,225 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2022-04-07 17:14:16,225 INFO L78 Accepts]: Start accepts. Automaton has has 27 states, 27 states have (on average 2.6296296296296298) internal successors, (71), 26 states have internal predecessors, (71), 15 states have call successors, (17), 3 states have call predecessors, (17), 1 states have return successors, (14), 14 states have call predecessors, (14), 14 states have call successors, (14) Word has length 74 [2022-04-07 17:14:16,225 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:14:16,225 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27 states, 27 states have (on average 2.6296296296296298) internal successors, (71), 26 states have internal predecessors, (71), 15 states have call successors, (17), 3 states have call predecessors, (17), 1 states have return successors, (14), 14 states have call predecessors, (14), 14 states have call successors, (14) [2022-04-07 17:14:16,226 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 68 transitions. [2022-04-07 17:14:16,226 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27 states, 27 states have (on average 2.6296296296296298) internal successors, (71), 26 states have internal predecessors, (71), 15 states have call successors, (17), 3 states have call predecessors, (17), 1 states have return successors, (14), 14 states have call predecessors, (14), 14 states have call successors, (14) [2022-04-07 17:14:16,227 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 68 transitions. [2022-04-07 17:14:16,227 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 18 states and 68 transitions. [2022-04-07 17:14:16,301 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 68 edges. 68 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:14:16,303 INFO L225 Difference]: With dead ends: 154 [2022-04-07 17:14:16,303 INFO L226 Difference]: Without dead ends: 116 [2022-04-07 17:14:16,304 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 193 GetRequests, 152 SyntacticMatches, 1 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 435 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=357, Invalid=1365, Unknown=0, NotChecked=0, Total=1722 [2022-04-07 17:14:16,305 INFO L913 BasicCegarLoop]: 25 mSDtfsCounter, 43 mSDsluCounter, 47 mSDsCounter, 0 mSdLazyCounter, 395 mSolverCounterSat, 35 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 44 SdHoareTripleChecker+Valid, 72 SdHoareTripleChecker+Invalid, 430 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 35 IncrementalHoareTripleChecker+Valid, 395 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-04-07 17:14:16,306 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [44 Valid, 72 Invalid, 430 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [35 Valid, 395 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-04-07 17:14:16,306 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 116 states. [2022-04-07 17:14:16,309 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 116 to 116. [2022-04-07 17:14:16,310 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:14:16,310 INFO L82 GeneralOperation]: Start isEquivalent. First operand 116 states. Second operand has 116 states, 89 states have (on average 1.0337078651685394) internal successors, (92), 91 states have internal predecessors, (92), 14 states have call successors, (14), 13 states have call predecessors, (14), 12 states have return successors, (13), 11 states have call predecessors, (13), 13 states have call successors, (13) [2022-04-07 17:14:16,310 INFO L74 IsIncluded]: Start isIncluded. First operand 116 states. Second operand has 116 states, 89 states have (on average 1.0337078651685394) internal successors, (92), 91 states have internal predecessors, (92), 14 states have call successors, (14), 13 states have call predecessors, (14), 12 states have return successors, (13), 11 states have call predecessors, (13), 13 states have call successors, (13) [2022-04-07 17:14:16,310 INFO L87 Difference]: Start difference. First operand 116 states. Second operand has 116 states, 89 states have (on average 1.0337078651685394) internal successors, (92), 91 states have internal predecessors, (92), 14 states have call successors, (14), 13 states have call predecessors, (14), 12 states have return successors, (13), 11 states have call predecessors, (13), 13 states have call successors, (13) [2022-04-07 17:14:16,312 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:14:16,312 INFO L93 Difference]: Finished difference Result 116 states and 119 transitions. [2022-04-07 17:14:16,312 INFO L276 IsEmpty]: Start isEmpty. Operand 116 states and 119 transitions. [2022-04-07 17:14:16,312 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:14:16,312 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:14:16,313 INFO L74 IsIncluded]: Start isIncluded. First operand has 116 states, 89 states have (on average 1.0337078651685394) internal successors, (92), 91 states have internal predecessors, (92), 14 states have call successors, (14), 13 states have call predecessors, (14), 12 states have return successors, (13), 11 states have call predecessors, (13), 13 states have call successors, (13) Second operand 116 states. [2022-04-07 17:14:16,313 INFO L87 Difference]: Start difference. First operand has 116 states, 89 states have (on average 1.0337078651685394) internal successors, (92), 91 states have internal predecessors, (92), 14 states have call successors, (14), 13 states have call predecessors, (14), 12 states have return successors, (13), 11 states have call predecessors, (13), 13 states have call successors, (13) Second operand 116 states. [2022-04-07 17:14:16,317 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:14:16,317 INFO L93 Difference]: Finished difference Result 116 states and 119 transitions. [2022-04-07 17:14:16,317 INFO L276 IsEmpty]: Start isEmpty. Operand 116 states and 119 transitions. [2022-04-07 17:14:16,317 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:14:16,317 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:14:16,317 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:14:16,317 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:14:16,318 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 116 states, 89 states have (on average 1.0337078651685394) internal successors, (92), 91 states have internal predecessors, (92), 14 states have call successors, (14), 13 states have call predecessors, (14), 12 states have return successors, (13), 11 states have call predecessors, (13), 13 states have call successors, (13) [2022-04-07 17:14:16,319 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 116 states to 116 states and 119 transitions. [2022-04-07 17:14:16,319 INFO L78 Accepts]: Start accepts. Automaton has 116 states and 119 transitions. Word has length 74 [2022-04-07 17:14:16,319 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:14:16,319 INFO L478 AbstractCegarLoop]: Abstraction has 116 states and 119 transitions. [2022-04-07 17:14:16,320 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 27 states, 27 states have (on average 2.6296296296296298) internal successors, (71), 26 states have internal predecessors, (71), 15 states have call successors, (17), 3 states have call predecessors, (17), 1 states have return successors, (14), 14 states have call predecessors, (14), 14 states have call successors, (14) [2022-04-07 17:14:16,320 INFO L276 IsEmpty]: Start isEmpty. Operand 116 states and 119 transitions. [2022-04-07 17:14:16,320 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2022-04-07 17:14:16,320 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:14:16,320 INFO L499 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:14:16,343 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Forceful destruction successful, exit code 0 [2022-04-07 17:14:16,543 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18,18 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:14:16,544 INFO L403 AbstractCegarLoop]: === Iteration 20 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:14:16,544 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:14:16,544 INFO L85 PathProgramCache]: Analyzing trace with hash -578078115, now seen corresponding path program 17 times [2022-04-07 17:14:16,544 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:14:16,544 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2135183374] [2022-04-07 17:14:16,544 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:14:16,545 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:14:16,565 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:14:16,860 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:14:16,861 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:14:16,863 INFO L290 TraceCheckUtils]: 0: Hoare triple {12120#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {12072#true} is VALID [2022-04-07 17:14:16,863 INFO L290 TraceCheckUtils]: 1: Hoare triple {12072#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-07 17:14:16,864 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {12072#true} {12072#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-07 17:14:16,864 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 24 [2022-04-07 17:14:16,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:14:16,867 INFO L290 TraceCheckUtils]: 0: Hoare triple {12072#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12072#true} is VALID [2022-04-07 17:14:16,867 INFO L290 TraceCheckUtils]: 1: Hoare triple {12072#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-07 17:14:16,867 INFO L290 TraceCheckUtils]: 2: Hoare triple {12072#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-07 17:14:16,868 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12072#true} {12086#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12086#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 17:14:16,868 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 32 [2022-04-07 17:14:16,875 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:14:16,878 INFO L290 TraceCheckUtils]: 0: Hoare triple {12072#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12072#true} is VALID [2022-04-07 17:14:16,878 INFO L290 TraceCheckUtils]: 1: Hoare triple {12072#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-07 17:14:16,878 INFO L290 TraceCheckUtils]: 2: Hoare triple {12072#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-07 17:14:16,879 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12072#true} {12091#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12091#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 17:14:16,879 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 40 [2022-04-07 17:14:16,881 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:14:16,883 INFO L290 TraceCheckUtils]: 0: Hoare triple {12072#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12072#true} is VALID [2022-04-07 17:14:16,883 INFO L290 TraceCheckUtils]: 1: Hoare triple {12072#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-07 17:14:16,883 INFO L290 TraceCheckUtils]: 2: Hoare triple {12072#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-07 17:14:16,884 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12072#true} {12096#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12096#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:14:16,884 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 48 [2022-04-07 17:14:16,885 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:14:16,887 INFO L290 TraceCheckUtils]: 0: Hoare triple {12072#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12072#true} is VALID [2022-04-07 17:14:16,887 INFO L290 TraceCheckUtils]: 1: Hoare triple {12072#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-07 17:14:16,887 INFO L290 TraceCheckUtils]: 2: Hoare triple {12072#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-07 17:14:16,888 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12072#true} {12101#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12101#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:14:16,888 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 56 [2022-04-07 17:14:16,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:14:16,894 INFO L290 TraceCheckUtils]: 0: Hoare triple {12072#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12072#true} is VALID [2022-04-07 17:14:16,894 INFO L290 TraceCheckUtils]: 1: Hoare triple {12072#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-07 17:14:16,894 INFO L290 TraceCheckUtils]: 2: Hoare triple {12072#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-07 17:14:16,895 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12072#true} {12106#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12106#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:14:16,895 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 64 [2022-04-07 17:14:16,896 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:14:16,898 INFO L290 TraceCheckUtils]: 0: Hoare triple {12072#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12072#true} is VALID [2022-04-07 17:14:16,899 INFO L290 TraceCheckUtils]: 1: Hoare triple {12072#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-07 17:14:16,899 INFO L290 TraceCheckUtils]: 2: Hoare triple {12072#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-07 17:14:16,899 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12072#true} {12111#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12111#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:14:16,900 INFO L272 TraceCheckUtils]: 0: Hoare triple {12072#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12120#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:14:16,900 INFO L290 TraceCheckUtils]: 1: Hoare triple {12120#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {12072#true} is VALID [2022-04-07 17:14:16,900 INFO L290 TraceCheckUtils]: 2: Hoare triple {12072#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-07 17:14:16,900 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12072#true} {12072#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-07 17:14:16,900 INFO L272 TraceCheckUtils]: 4: Hoare triple {12072#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-07 17:14:16,901 INFO L290 TraceCheckUtils]: 5: Hoare triple {12072#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {12072#true} is VALID [2022-04-07 17:14:16,901 INFO L290 TraceCheckUtils]: 6: Hoare triple {12072#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {12077#(= main_~i~0 0)} is VALID [2022-04-07 17:14:16,901 INFO L290 TraceCheckUtils]: 7: Hoare triple {12077#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12077#(= main_~i~0 0)} is VALID [2022-04-07 17:14:16,902 INFO L290 TraceCheckUtils]: 8: Hoare triple {12077#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12078#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:14:16,902 INFO L290 TraceCheckUtils]: 9: Hoare triple {12078#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12078#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:14:16,903 INFO L290 TraceCheckUtils]: 10: Hoare triple {12078#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12079#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:14:16,903 INFO L290 TraceCheckUtils]: 11: Hoare triple {12079#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12079#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:14:16,904 INFO L290 TraceCheckUtils]: 12: Hoare triple {12079#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12080#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 17:14:16,904 INFO L290 TraceCheckUtils]: 13: Hoare triple {12080#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12080#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 17:14:16,905 INFO L290 TraceCheckUtils]: 14: Hoare triple {12080#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12081#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 17:14:16,905 INFO L290 TraceCheckUtils]: 15: Hoare triple {12081#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12081#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 17:14:16,906 INFO L290 TraceCheckUtils]: 16: Hoare triple {12081#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12082#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 17:14:16,906 INFO L290 TraceCheckUtils]: 17: Hoare triple {12082#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12082#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 17:14:16,907 INFO L290 TraceCheckUtils]: 18: Hoare triple {12082#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12083#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-07 17:14:16,908 INFO L290 TraceCheckUtils]: 19: Hoare triple {12083#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12084#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-07 17:14:16,908 INFO L290 TraceCheckUtils]: 20: Hoare triple {12084#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= main_~i~0 6) (<= 6 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12085#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} is VALID [2022-04-07 17:14:16,909 INFO L290 TraceCheckUtils]: 21: Hoare triple {12085#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {12085#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} is VALID [2022-04-07 17:14:16,909 INFO L290 TraceCheckUtils]: 22: Hoare triple {12085#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {12086#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 17:14:16,910 INFO L290 TraceCheckUtils]: 23: Hoare triple {12086#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12086#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 17:14:16,910 INFO L272 TraceCheckUtils]: 24: Hoare triple {12086#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12072#true} is VALID [2022-04-07 17:14:16,910 INFO L290 TraceCheckUtils]: 25: Hoare triple {12072#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12072#true} is VALID [2022-04-07 17:14:16,910 INFO L290 TraceCheckUtils]: 26: Hoare triple {12072#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-07 17:14:16,910 INFO L290 TraceCheckUtils]: 27: Hoare triple {12072#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-07 17:14:16,911 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {12072#true} {12086#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12086#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 17:14:16,911 INFO L290 TraceCheckUtils]: 29: Hoare triple {12086#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {12086#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 17:14:16,912 INFO L290 TraceCheckUtils]: 30: Hoare triple {12086#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {12091#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 17:14:16,912 INFO L290 TraceCheckUtils]: 31: Hoare triple {12091#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12091#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 17:14:16,912 INFO L272 TraceCheckUtils]: 32: Hoare triple {12091#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12072#true} is VALID [2022-04-07 17:14:16,912 INFO L290 TraceCheckUtils]: 33: Hoare triple {12072#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12072#true} is VALID [2022-04-07 17:14:16,912 INFO L290 TraceCheckUtils]: 34: Hoare triple {12072#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-07 17:14:16,912 INFO L290 TraceCheckUtils]: 35: Hoare triple {12072#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-07 17:14:16,913 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {12072#true} {12091#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12091#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 17:14:16,913 INFO L290 TraceCheckUtils]: 37: Hoare triple {12091#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {12091#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 17:14:16,914 INFO L290 TraceCheckUtils]: 38: Hoare triple {12091#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {12096#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:14:16,914 INFO L290 TraceCheckUtils]: 39: Hoare triple {12096#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12096#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:14:16,915 INFO L272 TraceCheckUtils]: 40: Hoare triple {12096#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12072#true} is VALID [2022-04-07 17:14:16,915 INFO L290 TraceCheckUtils]: 41: Hoare triple {12072#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12072#true} is VALID [2022-04-07 17:14:16,915 INFO L290 TraceCheckUtils]: 42: Hoare triple {12072#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-07 17:14:16,915 INFO L290 TraceCheckUtils]: 43: Hoare triple {12072#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-07 17:14:16,915 INFO L284 TraceCheckUtils]: 44: Hoare quadruple {12072#true} {12096#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12096#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:14:16,916 INFO L290 TraceCheckUtils]: 45: Hoare triple {12096#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {12096#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:14:16,917 INFO L290 TraceCheckUtils]: 46: Hoare triple {12096#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {12101#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:14:16,917 INFO L290 TraceCheckUtils]: 47: Hoare triple {12101#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12101#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:14:16,917 INFO L272 TraceCheckUtils]: 48: Hoare triple {12101#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12072#true} is VALID [2022-04-07 17:14:16,917 INFO L290 TraceCheckUtils]: 49: Hoare triple {12072#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12072#true} is VALID [2022-04-07 17:14:16,917 INFO L290 TraceCheckUtils]: 50: Hoare triple {12072#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-07 17:14:16,917 INFO L290 TraceCheckUtils]: 51: Hoare triple {12072#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-07 17:14:16,918 INFO L284 TraceCheckUtils]: 52: Hoare quadruple {12072#true} {12101#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12101#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:14:16,919 INFO L290 TraceCheckUtils]: 53: Hoare triple {12101#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {12101#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:14:16,919 INFO L290 TraceCheckUtils]: 54: Hoare triple {12101#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {12106#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:14:16,920 INFO L290 TraceCheckUtils]: 55: Hoare triple {12106#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12106#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:14:16,920 INFO L272 TraceCheckUtils]: 56: Hoare triple {12106#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12072#true} is VALID [2022-04-07 17:14:16,920 INFO L290 TraceCheckUtils]: 57: Hoare triple {12072#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12072#true} is VALID [2022-04-07 17:14:16,920 INFO L290 TraceCheckUtils]: 58: Hoare triple {12072#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-07 17:14:16,920 INFO L290 TraceCheckUtils]: 59: Hoare triple {12072#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-07 17:14:16,921 INFO L284 TraceCheckUtils]: 60: Hoare quadruple {12072#true} {12106#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12106#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:14:16,921 INFO L290 TraceCheckUtils]: 61: Hoare triple {12106#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {12106#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:14:16,922 INFO L290 TraceCheckUtils]: 62: Hoare triple {12106#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {12111#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:14:16,922 INFO L290 TraceCheckUtils]: 63: Hoare triple {12111#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12111#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:14:16,922 INFO L272 TraceCheckUtils]: 64: Hoare triple {12111#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12072#true} is VALID [2022-04-07 17:14:16,923 INFO L290 TraceCheckUtils]: 65: Hoare triple {12072#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12072#true} is VALID [2022-04-07 17:14:16,923 INFO L290 TraceCheckUtils]: 66: Hoare triple {12072#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-07 17:14:16,923 INFO L290 TraceCheckUtils]: 67: Hoare triple {12072#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-07 17:14:16,923 INFO L284 TraceCheckUtils]: 68: Hoare quadruple {12072#true} {12111#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12111#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:14:16,924 INFO L290 TraceCheckUtils]: 69: Hoare triple {12111#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {12111#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:14:16,924 INFO L290 TraceCheckUtils]: 70: Hoare triple {12111#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {12116#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:14:16,925 INFO L290 TraceCheckUtils]: 71: Hoare triple {12116#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12117#(= |main_#t~mem5| 0)} is VALID [2022-04-07 17:14:16,925 INFO L272 TraceCheckUtils]: 72: Hoare triple {12117#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12118#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:14:16,926 INFO L290 TraceCheckUtils]: 73: Hoare triple {12118#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12119#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:14:16,926 INFO L290 TraceCheckUtils]: 74: Hoare triple {12119#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {12073#false} is VALID [2022-04-07 17:14:16,926 INFO L290 TraceCheckUtils]: 75: Hoare triple {12073#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12073#false} is VALID [2022-04-07 17:14:16,927 INFO L134 CoverageAnalysis]: Checked inductivity of 193 backedges. 12 proven. 121 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2022-04-07 17:14:16,927 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:14:16,927 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2135183374] [2022-04-07 17:14:16,927 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2135183374] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:14:16,927 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [903385790] [2022-04-07 17:14:16,927 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-04-07 17:14:16,927 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:14:16,927 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:14:16,932 INFO L229 MonitoredProcess]: Starting monitored process 19 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:14:16,934 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2022-04-07 17:14:17,018 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 8 check-sat command(s) [2022-04-07 17:14:17,019 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 17:14:17,020 INFO L263 TraceCheckSpWp]: Trace formula consists of 213 conjuncts, 37 conjunts are in the unsatisfiable core [2022-04-07 17:14:17,036 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:14:17,037 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:14:17,157 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-07 17:15:11,234 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2022-04-07 17:15:11,289 INFO L272 TraceCheckUtils]: 0: Hoare triple {12072#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-07 17:15:11,289 INFO L290 TraceCheckUtils]: 1: Hoare triple {12072#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {12072#true} is VALID [2022-04-07 17:15:11,290 INFO L290 TraceCheckUtils]: 2: Hoare triple {12072#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-07 17:15:11,290 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12072#true} {12072#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-07 17:15:11,290 INFO L272 TraceCheckUtils]: 4: Hoare triple {12072#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-07 17:15:11,290 INFO L290 TraceCheckUtils]: 5: Hoare triple {12072#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {12072#true} is VALID [2022-04-07 17:15:11,290 INFO L290 TraceCheckUtils]: 6: Hoare triple {12072#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {12077#(= main_~i~0 0)} is VALID [2022-04-07 17:15:11,290 INFO L290 TraceCheckUtils]: 7: Hoare triple {12077#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12077#(= main_~i~0 0)} is VALID [2022-04-07 17:15:11,291 INFO L290 TraceCheckUtils]: 8: Hoare triple {12077#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12078#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:15:11,291 INFO L290 TraceCheckUtils]: 9: Hoare triple {12078#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12078#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:15:11,292 INFO L290 TraceCheckUtils]: 10: Hoare triple {12078#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12079#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:15:11,292 INFO L290 TraceCheckUtils]: 11: Hoare triple {12079#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12079#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:15:11,292 INFO L290 TraceCheckUtils]: 12: Hoare triple {12079#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12080#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 17:15:11,293 INFO L290 TraceCheckUtils]: 13: Hoare triple {12080#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12080#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 17:15:11,293 INFO L290 TraceCheckUtils]: 14: Hoare triple {12080#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12081#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 17:15:11,294 INFO L290 TraceCheckUtils]: 15: Hoare triple {12081#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12081#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 17:15:11,294 INFO L290 TraceCheckUtils]: 16: Hoare triple {12081#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12082#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 17:15:11,294 INFO L290 TraceCheckUtils]: 17: Hoare triple {12082#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12082#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 17:15:11,295 INFO L290 TraceCheckUtils]: 18: Hoare triple {12082#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12083#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-07 17:15:11,295 INFO L290 TraceCheckUtils]: 19: Hoare triple {12083#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12085#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} is VALID [2022-04-07 17:15:11,296 INFO L290 TraceCheckUtils]: 20: Hoare triple {12085#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12085#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} is VALID [2022-04-07 17:15:11,296 INFO L290 TraceCheckUtils]: 21: Hoare triple {12085#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {12085#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} is VALID [2022-04-07 17:15:11,296 INFO L290 TraceCheckUtils]: 22: Hoare triple {12085#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {12086#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 17:15:11,297 INFO L290 TraceCheckUtils]: 23: Hoare triple {12086#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12086#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 17:15:11,298 INFO L272 TraceCheckUtils]: 24: Hoare triple {12086#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} is VALID [2022-04-07 17:15:11,298 INFO L290 TraceCheckUtils]: 25: Hoare triple {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} is VALID [2022-04-07 17:15:11,298 INFO L290 TraceCheckUtils]: 26: Hoare triple {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} is VALID [2022-04-07 17:15:11,300 INFO L290 TraceCheckUtils]: 27: Hoare triple {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} is VALID [2022-04-07 17:15:11,300 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} {12086#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12086#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 17:15:11,300 INFO L290 TraceCheckUtils]: 29: Hoare triple {12086#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {12086#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 17:15:11,301 INFO L290 TraceCheckUtils]: 30: Hoare triple {12086#(and (= main_~i~1 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {12215#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 17:15:11,301 INFO L290 TraceCheckUtils]: 31: Hoare triple {12215#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12215#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 17:15:11,302 INFO L272 TraceCheckUtils]: 32: Hoare triple {12215#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} is VALID [2022-04-07 17:15:11,302 INFO L290 TraceCheckUtils]: 33: Hoare triple {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} is VALID [2022-04-07 17:15:11,303 INFO L290 TraceCheckUtils]: 34: Hoare triple {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} is VALID [2022-04-07 17:15:11,303 INFO L290 TraceCheckUtils]: 35: Hoare triple {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} is VALID [2022-04-07 17:15:11,303 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} {12215#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12215#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 17:15:11,304 INFO L290 TraceCheckUtils]: 37: Hoare triple {12215#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {12215#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 17:15:11,304 INFO L290 TraceCheckUtils]: 38: Hoare triple {12215#(and (= 0 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {12240#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 17:15:11,305 INFO L290 TraceCheckUtils]: 39: Hoare triple {12240#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12240#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 17:15:11,305 INFO L272 TraceCheckUtils]: 40: Hoare triple {12240#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} is VALID [2022-04-07 17:15:11,306 INFO L290 TraceCheckUtils]: 41: Hoare triple {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} is VALID [2022-04-07 17:15:11,306 INFO L290 TraceCheckUtils]: 42: Hoare triple {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} is VALID [2022-04-07 17:15:11,306 INFO L290 TraceCheckUtils]: 43: Hoare triple {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} is VALID [2022-04-07 17:15:11,307 INFO L284 TraceCheckUtils]: 44: Hoare quadruple {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} {12240#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12240#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 17:15:11,307 INFO L290 TraceCheckUtils]: 45: Hoare triple {12240#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {12240#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 17:15:11,308 INFO L290 TraceCheckUtils]: 46: Hoare triple {12240#(and (= (+ (- 2) main_~i~1) 0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {12265#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 17:15:11,308 INFO L290 TraceCheckUtils]: 47: Hoare triple {12265#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12265#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 17:15:11,309 INFO L272 TraceCheckUtils]: 48: Hoare triple {12265#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} is VALID [2022-04-07 17:15:11,309 INFO L290 TraceCheckUtils]: 49: Hoare triple {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} is VALID [2022-04-07 17:15:11,309 INFO L290 TraceCheckUtils]: 50: Hoare triple {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} is VALID [2022-04-07 17:15:11,310 INFO L290 TraceCheckUtils]: 51: Hoare triple {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} is VALID [2022-04-07 17:15:11,310 INFO L284 TraceCheckUtils]: 52: Hoare quadruple {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} {12265#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12265#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 17:15:11,311 INFO L290 TraceCheckUtils]: 53: Hoare triple {12265#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {12265#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 17:15:11,311 INFO L290 TraceCheckUtils]: 54: Hoare triple {12265#(and (= main_~i~1 3) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {12290#(and (= main_~i~1 4) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 17:15:11,311 INFO L290 TraceCheckUtils]: 55: Hoare triple {12290#(and (= main_~i~1 4) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12290#(and (= main_~i~1 4) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 17:15:11,312 INFO L272 TraceCheckUtils]: 56: Hoare triple {12290#(and (= main_~i~1 4) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} is VALID [2022-04-07 17:15:11,312 INFO L290 TraceCheckUtils]: 57: Hoare triple {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} is VALID [2022-04-07 17:15:11,313 INFO L290 TraceCheckUtils]: 58: Hoare triple {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} is VALID [2022-04-07 17:15:11,313 INFO L290 TraceCheckUtils]: 59: Hoare triple {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} is VALID [2022-04-07 17:15:11,314 INFO L284 TraceCheckUtils]: 60: Hoare quadruple {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} {12290#(and (= main_~i~1 4) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12290#(and (= main_~i~1 4) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 17:15:11,314 INFO L290 TraceCheckUtils]: 61: Hoare triple {12290#(and (= main_~i~1 4) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {12290#(and (= main_~i~1 4) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 17:15:11,314 INFO L290 TraceCheckUtils]: 62: Hoare triple {12290#(and (= main_~i~1 4) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {12315#(and (= 4 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 17:15:11,315 INFO L290 TraceCheckUtils]: 63: Hoare triple {12315#(and (= 4 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12315#(and (= 4 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 17:15:11,315 INFO L272 TraceCheckUtils]: 64: Hoare triple {12315#(and (= 4 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} is VALID [2022-04-07 17:15:11,316 INFO L290 TraceCheckUtils]: 65: Hoare triple {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} is VALID [2022-04-07 17:15:11,317 INFO L290 TraceCheckUtils]: 66: Hoare triple {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} is VALID [2022-04-07 17:15:11,318 INFO L290 TraceCheckUtils]: 67: Hoare triple {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} is VALID [2022-04-07 17:15:11,320 INFO L284 TraceCheckUtils]: 68: Hoare quadruple {12196#(exists ((v_main_~x~0.base_BEFORE_CALL_73 Int) (v_main_~x~0.offset_BEFORE_CALL_73 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_73) (+ v_main_~x~0.offset_BEFORE_CALL_73 24)) 0))} {12315#(and (= 4 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12315#(and (= 4 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 17:15:11,321 INFO L290 TraceCheckUtils]: 69: Hoare triple {12315#(and (= 4 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {12315#(and (= 4 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 17:15:11,322 INFO L290 TraceCheckUtils]: 70: Hoare triple {12315#(and (= 4 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {12340#(and (= (+ (- 2) main_~i~1) 4) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} is VALID [2022-04-07 17:15:11,322 INFO L290 TraceCheckUtils]: 71: Hoare triple {12340#(and (= (+ (- 2) main_~i~1) 4) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12117#(= |main_#t~mem5| 0)} is VALID [2022-04-07 17:15:11,322 INFO L272 TraceCheckUtils]: 72: Hoare triple {12117#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12347#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:15:11,323 INFO L290 TraceCheckUtils]: 73: Hoare triple {12347#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12351#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:15:11,323 INFO L290 TraceCheckUtils]: 74: Hoare triple {12351#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {12073#false} is VALID [2022-04-07 17:15:11,323 INFO L290 TraceCheckUtils]: 75: Hoare triple {12073#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12073#false} is VALID [2022-04-07 17:15:11,324 INFO L134 CoverageAnalysis]: Checked inductivity of 193 backedges. 0 proven. 133 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2022-04-07 17:15:11,324 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 17:15:13,584 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2022-04-07 17:15:13,588 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2022-04-07 17:15:13,693 INFO L290 TraceCheckUtils]: 75: Hoare triple {12073#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12073#false} is VALID [2022-04-07 17:15:13,694 INFO L290 TraceCheckUtils]: 74: Hoare triple {12351#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {12073#false} is VALID [2022-04-07 17:15:13,694 INFO L290 TraceCheckUtils]: 73: Hoare triple {12347#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12351#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:15:13,695 INFO L272 TraceCheckUtils]: 72: Hoare triple {12117#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12347#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:15:13,695 INFO L290 TraceCheckUtils]: 71: Hoare triple {12116#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12117#(= |main_#t~mem5| 0)} is VALID [2022-04-07 17:15:13,696 INFO L290 TraceCheckUtils]: 70: Hoare triple {12111#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {12116#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:15:13,696 INFO L290 TraceCheckUtils]: 69: Hoare triple {12111#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {12111#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:15:13,697 INFO L284 TraceCheckUtils]: 68: Hoare quadruple {12072#true} {12111#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12111#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:15:13,697 INFO L290 TraceCheckUtils]: 67: Hoare triple {12072#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-07 17:15:13,697 INFO L290 TraceCheckUtils]: 66: Hoare triple {12072#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-07 17:15:13,697 INFO L290 TraceCheckUtils]: 65: Hoare triple {12072#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12072#true} is VALID [2022-04-07 17:15:13,697 INFO L272 TraceCheckUtils]: 64: Hoare triple {12111#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12072#true} is VALID [2022-04-07 17:15:13,697 INFO L290 TraceCheckUtils]: 63: Hoare triple {12111#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12111#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:15:13,698 INFO L290 TraceCheckUtils]: 62: Hoare triple {12106#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {12111#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:15:13,698 INFO L290 TraceCheckUtils]: 61: Hoare triple {12106#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {12106#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:15:13,699 INFO L284 TraceCheckUtils]: 60: Hoare quadruple {12072#true} {12106#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12106#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:15:13,699 INFO L290 TraceCheckUtils]: 59: Hoare triple {12072#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-07 17:15:13,699 INFO L290 TraceCheckUtils]: 58: Hoare triple {12072#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-07 17:15:13,699 INFO L290 TraceCheckUtils]: 57: Hoare triple {12072#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12072#true} is VALID [2022-04-07 17:15:13,699 INFO L272 TraceCheckUtils]: 56: Hoare triple {12106#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12072#true} is VALID [2022-04-07 17:15:13,699 INFO L290 TraceCheckUtils]: 55: Hoare triple {12106#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12106#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:15:13,700 INFO L290 TraceCheckUtils]: 54: Hoare triple {12101#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {12106#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:15:13,700 INFO L290 TraceCheckUtils]: 53: Hoare triple {12101#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {12101#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:15:13,701 INFO L284 TraceCheckUtils]: 52: Hoare quadruple {12072#true} {12101#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12101#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:15:13,701 INFO L290 TraceCheckUtils]: 51: Hoare triple {12072#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-07 17:15:13,701 INFO L290 TraceCheckUtils]: 50: Hoare triple {12072#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-07 17:15:13,701 INFO L290 TraceCheckUtils]: 49: Hoare triple {12072#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12072#true} is VALID [2022-04-07 17:15:13,701 INFO L272 TraceCheckUtils]: 48: Hoare triple {12101#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12072#true} is VALID [2022-04-07 17:15:13,702 INFO L290 TraceCheckUtils]: 47: Hoare triple {12101#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12101#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:15:13,702 INFO L290 TraceCheckUtils]: 46: Hoare triple {12096#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {12101#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:15:13,702 INFO L290 TraceCheckUtils]: 45: Hoare triple {12096#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {12096#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:15:13,703 INFO L284 TraceCheckUtils]: 44: Hoare quadruple {12072#true} {12096#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12096#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:15:13,703 INFO L290 TraceCheckUtils]: 43: Hoare triple {12072#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-07 17:15:13,703 INFO L290 TraceCheckUtils]: 42: Hoare triple {12072#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-07 17:15:13,703 INFO L290 TraceCheckUtils]: 41: Hoare triple {12072#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12072#true} is VALID [2022-04-07 17:15:13,703 INFO L272 TraceCheckUtils]: 40: Hoare triple {12096#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12072#true} is VALID [2022-04-07 17:15:13,704 INFO L290 TraceCheckUtils]: 39: Hoare triple {12096#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12096#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:15:13,704 INFO L290 TraceCheckUtils]: 38: Hoare triple {12091#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {12096#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:15:13,705 INFO L290 TraceCheckUtils]: 37: Hoare triple {12091#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {12091#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 17:15:13,706 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {12072#true} {12091#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12091#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 17:15:13,706 INFO L290 TraceCheckUtils]: 35: Hoare triple {12072#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-07 17:15:13,706 INFO L290 TraceCheckUtils]: 34: Hoare triple {12072#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-07 17:15:13,706 INFO L290 TraceCheckUtils]: 33: Hoare triple {12072#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12072#true} is VALID [2022-04-07 17:15:13,706 INFO L272 TraceCheckUtils]: 32: Hoare triple {12091#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12072#true} is VALID [2022-04-07 17:15:13,707 INFO L290 TraceCheckUtils]: 31: Hoare triple {12091#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12091#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 17:15:13,707 INFO L290 TraceCheckUtils]: 30: Hoare triple {12493#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {12091#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 17:15:13,708 INFO L290 TraceCheckUtils]: 29: Hoare triple {12493#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {12493#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 17:15:13,709 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {12072#true} {12493#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12493#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 17:15:13,709 INFO L290 TraceCheckUtils]: 27: Hoare triple {12072#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-07 17:15:13,709 INFO L290 TraceCheckUtils]: 26: Hoare triple {12072#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-07 17:15:13,709 INFO L290 TraceCheckUtils]: 25: Hoare triple {12072#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12072#true} is VALID [2022-04-07 17:15:13,709 INFO L272 TraceCheckUtils]: 24: Hoare triple {12493#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {12072#true} is VALID [2022-04-07 17:15:13,709 INFO L290 TraceCheckUtils]: 23: Hoare triple {12493#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {12493#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 17:15:13,710 INFO L290 TraceCheckUtils]: 22: Hoare triple {12085#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {12493#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 17:15:13,710 INFO L290 TraceCheckUtils]: 21: Hoare triple {12085#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {12085#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} is VALID [2022-04-07 17:15:13,711 INFO L290 TraceCheckUtils]: 20: Hoare triple {12085#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12085#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} is VALID [2022-04-07 17:15:13,711 INFO L290 TraceCheckUtils]: 19: Hoare triple {12083#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12085#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 24)) 0)} is VALID [2022-04-07 17:15:13,712 INFO L290 TraceCheckUtils]: 18: Hoare triple {12082#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12083#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-07 17:15:13,712 INFO L290 TraceCheckUtils]: 17: Hoare triple {12082#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12082#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 17:15:13,713 INFO L290 TraceCheckUtils]: 16: Hoare triple {12081#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12082#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 17:15:13,713 INFO L290 TraceCheckUtils]: 15: Hoare triple {12081#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12081#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 17:15:13,714 INFO L290 TraceCheckUtils]: 14: Hoare triple {12080#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12081#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 17:15:13,715 INFO L290 TraceCheckUtils]: 13: Hoare triple {12080#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12080#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 17:15:13,715 INFO L290 TraceCheckUtils]: 12: Hoare triple {12079#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12080#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 17:15:13,716 INFO L290 TraceCheckUtils]: 11: Hoare triple {12079#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12079#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:15:13,716 INFO L290 TraceCheckUtils]: 10: Hoare triple {12078#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12079#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:15:13,717 INFO L290 TraceCheckUtils]: 9: Hoare triple {12078#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12078#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:15:13,717 INFO L290 TraceCheckUtils]: 8: Hoare triple {12077#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {12078#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:15:13,718 INFO L290 TraceCheckUtils]: 7: Hoare triple {12077#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {12077#(= main_~i~0 0)} is VALID [2022-04-07 17:15:13,718 INFO L290 TraceCheckUtils]: 6: Hoare triple {12072#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {12077#(= main_~i~0 0)} is VALID [2022-04-07 17:15:13,718 INFO L290 TraceCheckUtils]: 5: Hoare triple {12072#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {12072#true} is VALID [2022-04-07 17:15:13,718 INFO L272 TraceCheckUtils]: 4: Hoare triple {12072#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-07 17:15:13,718 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12072#true} {12072#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-07 17:15:13,719 INFO L290 TraceCheckUtils]: 2: Hoare triple {12072#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-07 17:15:13,719 INFO L290 TraceCheckUtils]: 1: Hoare triple {12072#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {12072#true} is VALID [2022-04-07 17:15:13,719 INFO L272 TraceCheckUtils]: 0: Hoare triple {12072#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12072#true} is VALID [2022-04-07 17:15:13,719 INFO L134 CoverageAnalysis]: Checked inductivity of 193 backedges. 12 proven. 121 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2022-04-07 17:15:13,719 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [903385790] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 17:15:13,719 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 17:15:13,720 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 21, 20] total 32 [2022-04-07 17:15:13,720 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [93795198] [2022-04-07 17:15:13,720 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 17:15:13,720 INFO L78 Accepts]: Start accepts. Automaton has has 32 states, 31 states have (on average 2.3870967741935485) internal successors, (74), 29 states have internal predecessors, (74), 14 states have call successors, (18), 5 states have call predecessors, (18), 2 states have return successors, (14), 13 states have call predecessors, (14), 13 states have call successors, (14) Word has length 76 [2022-04-07 17:15:13,721 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:15:13,721 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 32 states, 31 states have (on average 2.3870967741935485) internal successors, (74), 29 states have internal predecessors, (74), 14 states have call successors, (18), 5 states have call predecessors, (18), 2 states have return successors, (14), 13 states have call predecessors, (14), 13 states have call successors, (14) [2022-04-07 17:15:13,819 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 106 edges. 106 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:15:13,820 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 32 states [2022-04-07 17:15:13,820 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:15:13,820 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2022-04-07 17:15:13,821 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=88, Invalid=897, Unknown=7, NotChecked=0, Total=992 [2022-04-07 17:15:13,821 INFO L87 Difference]: Start difference. First operand 116 states and 119 transitions. Second operand has 32 states, 31 states have (on average 2.3870967741935485) internal successors, (74), 29 states have internal predecessors, (74), 14 states have call successors, (18), 5 states have call predecessors, (18), 2 states have return successors, (14), 13 states have call predecessors, (14), 13 states have call successors, (14) [2022-04-07 17:15:15,553 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:15:15,553 INFO L93 Difference]: Finished difference Result 126 states and 129 transitions. [2022-04-07 17:15:15,553 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2022-04-07 17:15:15,553 INFO L78 Accepts]: Start accepts. Automaton has has 32 states, 31 states have (on average 2.3870967741935485) internal successors, (74), 29 states have internal predecessors, (74), 14 states have call successors, (18), 5 states have call predecessors, (18), 2 states have return successors, (14), 13 states have call predecessors, (14), 13 states have call successors, (14) Word has length 76 [2022-04-07 17:15:15,553 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:15:15,553 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 32 states, 31 states have (on average 2.3870967741935485) internal successors, (74), 29 states have internal predecessors, (74), 14 states have call successors, (18), 5 states have call predecessors, (18), 2 states have return successors, (14), 13 states have call predecessors, (14), 13 states have call successors, (14) [2022-04-07 17:15:15,554 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 77 transitions. [2022-04-07 17:15:15,554 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 32 states, 31 states have (on average 2.3870967741935485) internal successors, (74), 29 states have internal predecessors, (74), 14 states have call successors, (18), 5 states have call predecessors, (18), 2 states have return successors, (14), 13 states have call predecessors, (14), 13 states have call successors, (14) [2022-04-07 17:15:15,555 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 77 transitions. [2022-04-07 17:15:15,555 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 30 states and 77 transitions. [2022-04-07 17:15:15,618 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 77 edges. 77 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:15:15,619 INFO L225 Difference]: With dead ends: 126 [2022-04-07 17:15:15,620 INFO L226 Difference]: Without dead ends: 126 [2022-04-07 17:15:15,620 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 208 GetRequests, 141 SyntacticMatches, 16 SemanticMatches, 51 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 588 ImplicationChecksByTransitivity, 56.0s TimeCoverageRelationStatistics Valid=228, Invalid=2521, Unknown=7, NotChecked=0, Total=2756 [2022-04-07 17:15:15,621 INFO L913 BasicCegarLoop]: 29 mSDtfsCounter, 66 mSDsluCounter, 200 mSDsCounter, 0 mSdLazyCounter, 940 mSolverCounterSat, 45 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 66 SdHoareTripleChecker+Valid, 229 SdHoareTripleChecker+Invalid, 1073 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 45 IncrementalHoareTripleChecker+Valid, 940 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 88 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2022-04-07 17:15:15,621 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [66 Valid, 229 Invalid, 1073 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [45 Valid, 940 Invalid, 0 Unknown, 88 Unchecked, 0.7s Time] [2022-04-07 17:15:15,622 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 126 states. [2022-04-07 17:15:15,624 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 126 to 124. [2022-04-07 17:15:15,624 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:15:15,624 INFO L82 GeneralOperation]: Start isEquivalent. First operand 126 states. Second operand has 124 states, 95 states have (on average 1.0315789473684212) internal successors, (98), 97 states have internal predecessors, (98), 15 states have call successors, (15), 14 states have call predecessors, (15), 13 states have return successors, (14), 12 states have call predecessors, (14), 14 states have call successors, (14) [2022-04-07 17:15:15,625 INFO L74 IsIncluded]: Start isIncluded. First operand 126 states. Second operand has 124 states, 95 states have (on average 1.0315789473684212) internal successors, (98), 97 states have internal predecessors, (98), 15 states have call successors, (15), 14 states have call predecessors, (15), 13 states have return successors, (14), 12 states have call predecessors, (14), 14 states have call successors, (14) [2022-04-07 17:15:15,625 INFO L87 Difference]: Start difference. First operand 126 states. Second operand has 124 states, 95 states have (on average 1.0315789473684212) internal successors, (98), 97 states have internal predecessors, (98), 15 states have call successors, (15), 14 states have call predecessors, (15), 13 states have return successors, (14), 12 states have call predecessors, (14), 14 states have call successors, (14) [2022-04-07 17:15:15,627 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:15:15,627 INFO L93 Difference]: Finished difference Result 126 states and 129 transitions. [2022-04-07 17:15:15,627 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 129 transitions. [2022-04-07 17:15:15,627 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:15:15,627 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:15:15,627 INFO L74 IsIncluded]: Start isIncluded. First operand has 124 states, 95 states have (on average 1.0315789473684212) internal successors, (98), 97 states have internal predecessors, (98), 15 states have call successors, (15), 14 states have call predecessors, (15), 13 states have return successors, (14), 12 states have call predecessors, (14), 14 states have call successors, (14) Second operand 126 states. [2022-04-07 17:15:15,628 INFO L87 Difference]: Start difference. First operand has 124 states, 95 states have (on average 1.0315789473684212) internal successors, (98), 97 states have internal predecessors, (98), 15 states have call successors, (15), 14 states have call predecessors, (15), 13 states have return successors, (14), 12 states have call predecessors, (14), 14 states have call successors, (14) Second operand 126 states. [2022-04-07 17:15:15,630 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:15:15,630 INFO L93 Difference]: Finished difference Result 126 states and 129 transitions. [2022-04-07 17:15:15,630 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 129 transitions. [2022-04-07 17:15:15,631 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:15:15,631 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:15:15,631 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:15:15,631 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:15:15,631 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 124 states, 95 states have (on average 1.0315789473684212) internal successors, (98), 97 states have internal predecessors, (98), 15 states have call successors, (15), 14 states have call predecessors, (15), 13 states have return successors, (14), 12 states have call predecessors, (14), 14 states have call successors, (14) [2022-04-07 17:15:15,633 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 124 states to 124 states and 127 transitions. [2022-04-07 17:15:15,633 INFO L78 Accepts]: Start accepts. Automaton has 124 states and 127 transitions. Word has length 76 [2022-04-07 17:15:15,633 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:15:15,633 INFO L478 AbstractCegarLoop]: Abstraction has 124 states and 127 transitions. [2022-04-07 17:15:15,633 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 32 states, 31 states have (on average 2.3870967741935485) internal successors, (74), 29 states have internal predecessors, (74), 14 states have call successors, (18), 5 states have call predecessors, (18), 2 states have return successors, (14), 13 states have call predecessors, (14), 13 states have call successors, (14) [2022-04-07 17:15:15,633 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 127 transitions. [2022-04-07 17:15:15,634 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2022-04-07 17:15:15,634 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:15:15,634 INFO L499 BasicCegarLoop]: trace histogram [8, 8, 8, 7, 7, 7, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:15:15,653 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Forceful destruction successful, exit code 0 [2022-04-07 17:15:15,847 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19,19 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:15:15,847 INFO L403 AbstractCegarLoop]: === Iteration 21 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:15:15,848 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:15:15,848 INFO L85 PathProgramCache]: Analyzing trace with hash -1454537293, now seen corresponding path program 18 times [2022-04-07 17:15:15,848 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:15:15,848 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1249903165] [2022-04-07 17:15:15,848 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:15:15,848 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:15:15,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:15:16,024 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:15:16,026 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:15:16,032 INFO L290 TraceCheckUtils]: 0: Hoare triple {13181#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {13131#true} is VALID [2022-04-07 17:15:16,033 INFO L290 TraceCheckUtils]: 1: Hoare triple {13131#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-07 17:15:16,033 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {13131#true} {13131#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-07 17:15:16,033 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 24 [2022-04-07 17:15:16,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:15:16,036 INFO L290 TraceCheckUtils]: 0: Hoare triple {13131#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13131#true} is VALID [2022-04-07 17:15:16,036 INFO L290 TraceCheckUtils]: 1: Hoare triple {13131#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-07 17:15:16,037 INFO L290 TraceCheckUtils]: 2: Hoare triple {13131#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-07 17:15:16,037 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13131#true} {13145#(and (<= main_~n~0 7) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13145#(and (<= main_~n~0 7) (= main_~i~1 0))} is VALID [2022-04-07 17:15:16,037 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 32 [2022-04-07 17:15:16,038 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:15:16,040 INFO L290 TraceCheckUtils]: 0: Hoare triple {13131#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13131#true} is VALID [2022-04-07 17:15:16,040 INFO L290 TraceCheckUtils]: 1: Hoare triple {13131#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-07 17:15:16,041 INFO L290 TraceCheckUtils]: 2: Hoare triple {13131#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-07 17:15:16,041 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13131#true} {13150#(<= main_~n~0 (+ main_~i~1 6))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13150#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-07 17:15:16,041 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 40 [2022-04-07 17:15:16,042 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:15:16,044 INFO L290 TraceCheckUtils]: 0: Hoare triple {13131#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13131#true} is VALID [2022-04-07 17:15:16,044 INFO L290 TraceCheckUtils]: 1: Hoare triple {13131#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-07 17:15:16,044 INFO L290 TraceCheckUtils]: 2: Hoare triple {13131#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-07 17:15:16,045 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13131#true} {13155#(<= main_~n~0 (+ 5 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13155#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-07 17:15:16,045 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 48 [2022-04-07 17:15:16,046 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:15:16,048 INFO L290 TraceCheckUtils]: 0: Hoare triple {13131#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13131#true} is VALID [2022-04-07 17:15:16,048 INFO L290 TraceCheckUtils]: 1: Hoare triple {13131#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-07 17:15:16,048 INFO L290 TraceCheckUtils]: 2: Hoare triple {13131#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-07 17:15:16,049 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13131#true} {13160#(<= main_~n~0 (+ main_~i~1 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13160#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-07 17:15:16,049 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 56 [2022-04-07 17:15:16,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:15:16,052 INFO L290 TraceCheckUtils]: 0: Hoare triple {13131#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13131#true} is VALID [2022-04-07 17:15:16,052 INFO L290 TraceCheckUtils]: 1: Hoare triple {13131#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-07 17:15:16,052 INFO L290 TraceCheckUtils]: 2: Hoare triple {13131#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-07 17:15:16,053 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13131#true} {13165#(<= main_~n~0 (+ main_~i~1 3))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13165#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-07 17:15:16,053 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 64 [2022-04-07 17:15:16,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:15:16,056 INFO L290 TraceCheckUtils]: 0: Hoare triple {13131#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13131#true} is VALID [2022-04-07 17:15:16,056 INFO L290 TraceCheckUtils]: 1: Hoare triple {13131#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-07 17:15:16,056 INFO L290 TraceCheckUtils]: 2: Hoare triple {13131#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-07 17:15:16,057 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13131#true} {13170#(<= main_~n~0 (+ main_~i~1 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13170#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 17:15:16,057 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 72 [2022-04-07 17:15:16,058 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:15:16,060 INFO L290 TraceCheckUtils]: 0: Hoare triple {13131#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13131#true} is VALID [2022-04-07 17:15:16,060 INFO L290 TraceCheckUtils]: 1: Hoare triple {13131#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-07 17:15:16,060 INFO L290 TraceCheckUtils]: 2: Hoare triple {13131#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-07 17:15:16,061 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13131#true} {13175#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13175#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 17:15:16,061 INFO L272 TraceCheckUtils]: 0: Hoare triple {13131#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13181#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:15:16,062 INFO L290 TraceCheckUtils]: 1: Hoare triple {13181#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {13131#true} is VALID [2022-04-07 17:15:16,062 INFO L290 TraceCheckUtils]: 2: Hoare triple {13131#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-07 17:15:16,062 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13131#true} {13131#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-07 17:15:16,062 INFO L272 TraceCheckUtils]: 4: Hoare triple {13131#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-07 17:15:16,062 INFO L290 TraceCheckUtils]: 5: Hoare triple {13131#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {13131#true} is VALID [2022-04-07 17:15:16,062 INFO L290 TraceCheckUtils]: 6: Hoare triple {13131#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {13136#(= main_~i~0 0)} is VALID [2022-04-07 17:15:16,063 INFO L290 TraceCheckUtils]: 7: Hoare triple {13136#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {13136#(= main_~i~0 0)} is VALID [2022-04-07 17:15:16,063 INFO L290 TraceCheckUtils]: 8: Hoare triple {13136#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {13137#(<= main_~i~0 1)} is VALID [2022-04-07 17:15:16,063 INFO L290 TraceCheckUtils]: 9: Hoare triple {13137#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {13137#(<= main_~i~0 1)} is VALID [2022-04-07 17:15:16,064 INFO L290 TraceCheckUtils]: 10: Hoare triple {13137#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {13138#(<= main_~i~0 2)} is VALID [2022-04-07 17:15:16,064 INFO L290 TraceCheckUtils]: 11: Hoare triple {13138#(<= main_~i~0 2)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {13138#(<= main_~i~0 2)} is VALID [2022-04-07 17:15:16,065 INFO L290 TraceCheckUtils]: 12: Hoare triple {13138#(<= main_~i~0 2)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {13139#(<= main_~i~0 3)} is VALID [2022-04-07 17:15:16,065 INFO L290 TraceCheckUtils]: 13: Hoare triple {13139#(<= main_~i~0 3)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {13139#(<= main_~i~0 3)} is VALID [2022-04-07 17:15:16,065 INFO L290 TraceCheckUtils]: 14: Hoare triple {13139#(<= main_~i~0 3)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {13140#(<= main_~i~0 4)} is VALID [2022-04-07 17:15:16,066 INFO L290 TraceCheckUtils]: 15: Hoare triple {13140#(<= main_~i~0 4)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {13140#(<= main_~i~0 4)} is VALID [2022-04-07 17:15:16,066 INFO L290 TraceCheckUtils]: 16: Hoare triple {13140#(<= main_~i~0 4)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {13141#(<= main_~i~0 5)} is VALID [2022-04-07 17:15:16,067 INFO L290 TraceCheckUtils]: 17: Hoare triple {13141#(<= main_~i~0 5)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {13141#(<= main_~i~0 5)} is VALID [2022-04-07 17:15:16,067 INFO L290 TraceCheckUtils]: 18: Hoare triple {13141#(<= main_~i~0 5)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {13142#(<= main_~i~0 6)} is VALID [2022-04-07 17:15:16,067 INFO L290 TraceCheckUtils]: 19: Hoare triple {13142#(<= main_~i~0 6)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {13142#(<= main_~i~0 6)} is VALID [2022-04-07 17:15:16,068 INFO L290 TraceCheckUtils]: 20: Hoare triple {13142#(<= main_~i~0 6)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {13143#(<= main_~i~0 7)} is VALID [2022-04-07 17:15:16,068 INFO L290 TraceCheckUtils]: 21: Hoare triple {13143#(<= main_~i~0 7)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {13144#(<= main_~n~0 7)} is VALID [2022-04-07 17:15:16,069 INFO L290 TraceCheckUtils]: 22: Hoare triple {13144#(<= main_~n~0 7)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {13145#(and (<= main_~n~0 7) (= main_~i~1 0))} is VALID [2022-04-07 17:15:16,069 INFO L290 TraceCheckUtils]: 23: Hoare triple {13145#(and (<= main_~n~0 7) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {13145#(and (<= main_~n~0 7) (= main_~i~1 0))} is VALID [2022-04-07 17:15:16,069 INFO L272 TraceCheckUtils]: 24: Hoare triple {13145#(and (<= main_~n~0 7) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13131#true} is VALID [2022-04-07 17:15:16,069 INFO L290 TraceCheckUtils]: 25: Hoare triple {13131#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13131#true} is VALID [2022-04-07 17:15:16,069 INFO L290 TraceCheckUtils]: 26: Hoare triple {13131#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-07 17:15:16,070 INFO L290 TraceCheckUtils]: 27: Hoare triple {13131#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-07 17:15:16,070 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {13131#true} {13145#(and (<= main_~n~0 7) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13145#(and (<= main_~n~0 7) (= main_~i~1 0))} is VALID [2022-04-07 17:15:16,071 INFO L290 TraceCheckUtils]: 29: Hoare triple {13145#(and (<= main_~n~0 7) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {13145#(and (<= main_~n~0 7) (= main_~i~1 0))} is VALID [2022-04-07 17:15:16,071 INFO L290 TraceCheckUtils]: 30: Hoare triple {13145#(and (<= main_~n~0 7) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {13150#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-07 17:15:16,071 INFO L290 TraceCheckUtils]: 31: Hoare triple {13150#(<= main_~n~0 (+ main_~i~1 6))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {13150#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-07 17:15:16,071 INFO L272 TraceCheckUtils]: 32: Hoare triple {13150#(<= main_~n~0 (+ main_~i~1 6))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13131#true} is VALID [2022-04-07 17:15:16,072 INFO L290 TraceCheckUtils]: 33: Hoare triple {13131#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13131#true} is VALID [2022-04-07 17:15:16,072 INFO L290 TraceCheckUtils]: 34: Hoare triple {13131#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-07 17:15:16,072 INFO L290 TraceCheckUtils]: 35: Hoare triple {13131#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-07 17:15:16,072 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {13131#true} {13150#(<= main_~n~0 (+ main_~i~1 6))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13150#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-07 17:15:16,073 INFO L290 TraceCheckUtils]: 37: Hoare triple {13150#(<= main_~n~0 (+ main_~i~1 6))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {13150#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-07 17:15:16,073 INFO L290 TraceCheckUtils]: 38: Hoare triple {13150#(<= main_~n~0 (+ main_~i~1 6))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {13155#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-07 17:15:16,074 INFO L290 TraceCheckUtils]: 39: Hoare triple {13155#(<= main_~n~0 (+ 5 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {13155#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-07 17:15:16,074 INFO L272 TraceCheckUtils]: 40: Hoare triple {13155#(<= main_~n~0 (+ 5 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13131#true} is VALID [2022-04-07 17:15:16,074 INFO L290 TraceCheckUtils]: 41: Hoare triple {13131#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13131#true} is VALID [2022-04-07 17:15:16,074 INFO L290 TraceCheckUtils]: 42: Hoare triple {13131#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-07 17:15:16,074 INFO L290 TraceCheckUtils]: 43: Hoare triple {13131#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-07 17:15:16,075 INFO L284 TraceCheckUtils]: 44: Hoare quadruple {13131#true} {13155#(<= main_~n~0 (+ 5 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13155#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-07 17:15:16,075 INFO L290 TraceCheckUtils]: 45: Hoare triple {13155#(<= main_~n~0 (+ 5 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {13155#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-07 17:15:16,075 INFO L290 TraceCheckUtils]: 46: Hoare triple {13155#(<= main_~n~0 (+ 5 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {13160#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-07 17:15:16,076 INFO L290 TraceCheckUtils]: 47: Hoare triple {13160#(<= main_~n~0 (+ main_~i~1 4))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {13160#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-07 17:15:16,076 INFO L272 TraceCheckUtils]: 48: Hoare triple {13160#(<= main_~n~0 (+ main_~i~1 4))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13131#true} is VALID [2022-04-07 17:15:16,076 INFO L290 TraceCheckUtils]: 49: Hoare triple {13131#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13131#true} is VALID [2022-04-07 17:15:16,076 INFO L290 TraceCheckUtils]: 50: Hoare triple {13131#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-07 17:15:16,076 INFO L290 TraceCheckUtils]: 51: Hoare triple {13131#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-07 17:15:16,077 INFO L284 TraceCheckUtils]: 52: Hoare quadruple {13131#true} {13160#(<= main_~n~0 (+ main_~i~1 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13160#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-07 17:15:16,077 INFO L290 TraceCheckUtils]: 53: Hoare triple {13160#(<= main_~n~0 (+ main_~i~1 4))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {13160#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-07 17:15:16,077 INFO L290 TraceCheckUtils]: 54: Hoare triple {13160#(<= main_~n~0 (+ main_~i~1 4))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {13165#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-07 17:15:16,078 INFO L290 TraceCheckUtils]: 55: Hoare triple {13165#(<= main_~n~0 (+ main_~i~1 3))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {13165#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-07 17:15:16,078 INFO L272 TraceCheckUtils]: 56: Hoare triple {13165#(<= main_~n~0 (+ main_~i~1 3))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13131#true} is VALID [2022-04-07 17:15:16,078 INFO L290 TraceCheckUtils]: 57: Hoare triple {13131#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13131#true} is VALID [2022-04-07 17:15:16,078 INFO L290 TraceCheckUtils]: 58: Hoare triple {13131#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-07 17:15:16,078 INFO L290 TraceCheckUtils]: 59: Hoare triple {13131#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-07 17:15:16,079 INFO L284 TraceCheckUtils]: 60: Hoare quadruple {13131#true} {13165#(<= main_~n~0 (+ main_~i~1 3))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13165#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-07 17:15:16,079 INFO L290 TraceCheckUtils]: 61: Hoare triple {13165#(<= main_~n~0 (+ main_~i~1 3))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {13165#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-07 17:15:16,080 INFO L290 TraceCheckUtils]: 62: Hoare triple {13165#(<= main_~n~0 (+ main_~i~1 3))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {13170#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 17:15:16,080 INFO L290 TraceCheckUtils]: 63: Hoare triple {13170#(<= main_~n~0 (+ main_~i~1 2))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {13170#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 17:15:16,080 INFO L272 TraceCheckUtils]: 64: Hoare triple {13170#(<= main_~n~0 (+ main_~i~1 2))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13131#true} is VALID [2022-04-07 17:15:16,080 INFO L290 TraceCheckUtils]: 65: Hoare triple {13131#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13131#true} is VALID [2022-04-07 17:15:16,080 INFO L290 TraceCheckUtils]: 66: Hoare triple {13131#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-07 17:15:16,081 INFO L290 TraceCheckUtils]: 67: Hoare triple {13131#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-07 17:15:16,081 INFO L284 TraceCheckUtils]: 68: Hoare quadruple {13131#true} {13170#(<= main_~n~0 (+ main_~i~1 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13170#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 17:15:16,081 INFO L290 TraceCheckUtils]: 69: Hoare triple {13170#(<= main_~n~0 (+ main_~i~1 2))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {13170#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 17:15:16,082 INFO L290 TraceCheckUtils]: 70: Hoare triple {13170#(<= main_~n~0 (+ main_~i~1 2))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {13175#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 17:15:16,082 INFO L290 TraceCheckUtils]: 71: Hoare triple {13175#(<= main_~n~0 (+ main_~i~1 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {13175#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 17:15:16,082 INFO L272 TraceCheckUtils]: 72: Hoare triple {13175#(<= main_~n~0 (+ main_~i~1 1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13131#true} is VALID [2022-04-07 17:15:16,082 INFO L290 TraceCheckUtils]: 73: Hoare triple {13131#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13131#true} is VALID [2022-04-07 17:15:16,083 INFO L290 TraceCheckUtils]: 74: Hoare triple {13131#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-07 17:15:16,083 INFO L290 TraceCheckUtils]: 75: Hoare triple {13131#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-07 17:15:16,083 INFO L284 TraceCheckUtils]: 76: Hoare quadruple {13131#true} {13175#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13175#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 17:15:16,084 INFO L290 TraceCheckUtils]: 77: Hoare triple {13175#(<= main_~n~0 (+ main_~i~1 1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {13175#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 17:15:16,084 INFO L290 TraceCheckUtils]: 78: Hoare triple {13175#(<= main_~n~0 (+ main_~i~1 1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {13180#(<= main_~n~0 main_~i~1)} is VALID [2022-04-07 17:15:16,085 INFO L290 TraceCheckUtils]: 79: Hoare triple {13180#(<= main_~n~0 main_~i~1)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {13132#false} is VALID [2022-04-07 17:15:16,085 INFO L272 TraceCheckUtils]: 80: Hoare triple {13132#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13132#false} is VALID [2022-04-07 17:15:16,085 INFO L290 TraceCheckUtils]: 81: Hoare triple {13132#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13132#false} is VALID [2022-04-07 17:15:16,085 INFO L290 TraceCheckUtils]: 82: Hoare triple {13132#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {13132#false} is VALID [2022-04-07 17:15:16,085 INFO L290 TraceCheckUtils]: 83: Hoare triple {13132#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13132#false} is VALID [2022-04-07 17:15:16,085 INFO L134 CoverageAnalysis]: Checked inductivity of 245 backedges. 87 proven. 74 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2022-04-07 17:15:16,086 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:15:16,086 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1249903165] [2022-04-07 17:15:16,086 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1249903165] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:15:16,086 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1813749539] [2022-04-07 17:15:16,086 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-07 17:15:16,086 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:15:16,086 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:15:16,092 INFO L229 MonitoredProcess]: Starting monitored process 20 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:15:16,121 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process [2022-04-07 17:15:16,204 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 8 check-sat command(s) [2022-04-07 17:15:16,204 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 17:15:16,205 INFO L263 TraceCheckSpWp]: Trace formula consists of 228 conjuncts, 18 conjunts are in the unsatisfiable core [2022-04-07 17:15:16,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:15:16,228 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:15:16,898 INFO L272 TraceCheckUtils]: 0: Hoare triple {13131#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-07 17:15:16,898 INFO L290 TraceCheckUtils]: 1: Hoare triple {13131#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {13131#true} is VALID [2022-04-07 17:15:16,898 INFO L290 TraceCheckUtils]: 2: Hoare triple {13131#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-07 17:15:16,898 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13131#true} {13131#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-07 17:15:16,899 INFO L272 TraceCheckUtils]: 4: Hoare triple {13131#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-07 17:15:16,899 INFO L290 TraceCheckUtils]: 5: Hoare triple {13131#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {13131#true} is VALID [2022-04-07 17:15:16,899 INFO L290 TraceCheckUtils]: 6: Hoare triple {13131#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {13203#(<= main_~i~0 0)} is VALID [2022-04-07 17:15:16,899 INFO L290 TraceCheckUtils]: 7: Hoare triple {13203#(<= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {13203#(<= main_~i~0 0)} is VALID [2022-04-07 17:15:16,900 INFO L290 TraceCheckUtils]: 8: Hoare triple {13203#(<= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {13137#(<= main_~i~0 1)} is VALID [2022-04-07 17:15:16,900 INFO L290 TraceCheckUtils]: 9: Hoare triple {13137#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {13137#(<= main_~i~0 1)} is VALID [2022-04-07 17:15:16,900 INFO L290 TraceCheckUtils]: 10: Hoare triple {13137#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {13138#(<= main_~i~0 2)} is VALID [2022-04-07 17:15:16,901 INFO L290 TraceCheckUtils]: 11: Hoare triple {13138#(<= main_~i~0 2)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {13138#(<= main_~i~0 2)} is VALID [2022-04-07 17:15:16,901 INFO L290 TraceCheckUtils]: 12: Hoare triple {13138#(<= main_~i~0 2)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {13139#(<= main_~i~0 3)} is VALID [2022-04-07 17:15:16,901 INFO L290 TraceCheckUtils]: 13: Hoare triple {13139#(<= main_~i~0 3)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {13139#(<= main_~i~0 3)} is VALID [2022-04-07 17:15:16,902 INFO L290 TraceCheckUtils]: 14: Hoare triple {13139#(<= main_~i~0 3)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {13140#(<= main_~i~0 4)} is VALID [2022-04-07 17:15:16,902 INFO L290 TraceCheckUtils]: 15: Hoare triple {13140#(<= main_~i~0 4)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {13140#(<= main_~i~0 4)} is VALID [2022-04-07 17:15:16,902 INFO L290 TraceCheckUtils]: 16: Hoare triple {13140#(<= main_~i~0 4)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {13141#(<= main_~i~0 5)} is VALID [2022-04-07 17:15:16,903 INFO L290 TraceCheckUtils]: 17: Hoare triple {13141#(<= main_~i~0 5)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {13141#(<= main_~i~0 5)} is VALID [2022-04-07 17:15:16,903 INFO L290 TraceCheckUtils]: 18: Hoare triple {13141#(<= main_~i~0 5)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {13142#(<= main_~i~0 6)} is VALID [2022-04-07 17:15:16,903 INFO L290 TraceCheckUtils]: 19: Hoare triple {13142#(<= main_~i~0 6)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {13142#(<= main_~i~0 6)} is VALID [2022-04-07 17:15:16,904 INFO L290 TraceCheckUtils]: 20: Hoare triple {13142#(<= main_~i~0 6)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {13143#(<= main_~i~0 7)} is VALID [2022-04-07 17:15:16,904 INFO L290 TraceCheckUtils]: 21: Hoare triple {13143#(<= main_~i~0 7)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {13144#(<= main_~n~0 7)} is VALID [2022-04-07 17:15:16,905 INFO L290 TraceCheckUtils]: 22: Hoare triple {13144#(<= main_~n~0 7)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {13252#(and (<= 0 main_~i~1) (<= main_~n~0 7))} is VALID [2022-04-07 17:15:16,905 INFO L290 TraceCheckUtils]: 23: Hoare triple {13252#(and (<= 0 main_~i~1) (<= main_~n~0 7))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {13252#(and (<= 0 main_~i~1) (<= main_~n~0 7))} is VALID [2022-04-07 17:15:16,905 INFO L272 TraceCheckUtils]: 24: Hoare triple {13252#(and (<= 0 main_~i~1) (<= main_~n~0 7))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13131#true} is VALID [2022-04-07 17:15:16,905 INFO L290 TraceCheckUtils]: 25: Hoare triple {13131#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13131#true} is VALID [2022-04-07 17:15:16,905 INFO L290 TraceCheckUtils]: 26: Hoare triple {13131#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-07 17:15:16,905 INFO L290 TraceCheckUtils]: 27: Hoare triple {13131#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-07 17:15:16,906 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {13131#true} {13252#(and (<= 0 main_~i~1) (<= main_~n~0 7))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13252#(and (<= 0 main_~i~1) (<= main_~n~0 7))} is VALID [2022-04-07 17:15:16,906 INFO L290 TraceCheckUtils]: 29: Hoare triple {13252#(and (<= 0 main_~i~1) (<= main_~n~0 7))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {13252#(and (<= 0 main_~i~1) (<= main_~n~0 7))} is VALID [2022-04-07 17:15:16,906 INFO L290 TraceCheckUtils]: 30: Hoare triple {13252#(and (<= 0 main_~i~1) (<= main_~n~0 7))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {13277#(and (<= 1 main_~i~1) (<= main_~n~0 7))} is VALID [2022-04-07 17:15:16,907 INFO L290 TraceCheckUtils]: 31: Hoare triple {13277#(and (<= 1 main_~i~1) (<= main_~n~0 7))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {13277#(and (<= 1 main_~i~1) (<= main_~n~0 7))} is VALID [2022-04-07 17:15:16,907 INFO L272 TraceCheckUtils]: 32: Hoare triple {13277#(and (<= 1 main_~i~1) (<= main_~n~0 7))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13131#true} is VALID [2022-04-07 17:15:16,907 INFO L290 TraceCheckUtils]: 33: Hoare triple {13131#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13131#true} is VALID [2022-04-07 17:15:16,907 INFO L290 TraceCheckUtils]: 34: Hoare triple {13131#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-07 17:15:16,907 INFO L290 TraceCheckUtils]: 35: Hoare triple {13131#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-07 17:15:16,908 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {13131#true} {13277#(and (<= 1 main_~i~1) (<= main_~n~0 7))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13277#(and (<= 1 main_~i~1) (<= main_~n~0 7))} is VALID [2022-04-07 17:15:16,908 INFO L290 TraceCheckUtils]: 37: Hoare triple {13277#(and (<= 1 main_~i~1) (<= main_~n~0 7))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {13277#(and (<= 1 main_~i~1) (<= main_~n~0 7))} is VALID [2022-04-07 17:15:16,908 INFO L290 TraceCheckUtils]: 38: Hoare triple {13277#(and (<= 1 main_~i~1) (<= main_~n~0 7))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {13302#(and (<= main_~n~0 7) (<= 2 main_~i~1))} is VALID [2022-04-07 17:15:16,909 INFO L290 TraceCheckUtils]: 39: Hoare triple {13302#(and (<= main_~n~0 7) (<= 2 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {13302#(and (<= main_~n~0 7) (<= 2 main_~i~1))} is VALID [2022-04-07 17:15:16,909 INFO L272 TraceCheckUtils]: 40: Hoare triple {13302#(and (<= main_~n~0 7) (<= 2 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13131#true} is VALID [2022-04-07 17:15:16,909 INFO L290 TraceCheckUtils]: 41: Hoare triple {13131#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13131#true} is VALID [2022-04-07 17:15:16,909 INFO L290 TraceCheckUtils]: 42: Hoare triple {13131#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-07 17:15:16,909 INFO L290 TraceCheckUtils]: 43: Hoare triple {13131#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-07 17:15:16,909 INFO L284 TraceCheckUtils]: 44: Hoare quadruple {13131#true} {13302#(and (<= main_~n~0 7) (<= 2 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13302#(and (<= main_~n~0 7) (<= 2 main_~i~1))} is VALID [2022-04-07 17:15:16,910 INFO L290 TraceCheckUtils]: 45: Hoare triple {13302#(and (<= main_~n~0 7) (<= 2 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {13302#(and (<= main_~n~0 7) (<= 2 main_~i~1))} is VALID [2022-04-07 17:15:16,910 INFO L290 TraceCheckUtils]: 46: Hoare triple {13302#(and (<= main_~n~0 7) (<= 2 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {13327#(and (<= main_~n~0 7) (<= 3 main_~i~1))} is VALID [2022-04-07 17:15:16,911 INFO L290 TraceCheckUtils]: 47: Hoare triple {13327#(and (<= main_~n~0 7) (<= 3 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {13327#(and (<= main_~n~0 7) (<= 3 main_~i~1))} is VALID [2022-04-07 17:15:16,911 INFO L272 TraceCheckUtils]: 48: Hoare triple {13327#(and (<= main_~n~0 7) (<= 3 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13131#true} is VALID [2022-04-07 17:15:16,911 INFO L290 TraceCheckUtils]: 49: Hoare triple {13131#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13131#true} is VALID [2022-04-07 17:15:16,911 INFO L290 TraceCheckUtils]: 50: Hoare triple {13131#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-07 17:15:16,911 INFO L290 TraceCheckUtils]: 51: Hoare triple {13131#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-07 17:15:16,911 INFO L284 TraceCheckUtils]: 52: Hoare quadruple {13131#true} {13327#(and (<= main_~n~0 7) (<= 3 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13327#(and (<= main_~n~0 7) (<= 3 main_~i~1))} is VALID [2022-04-07 17:15:16,912 INFO L290 TraceCheckUtils]: 53: Hoare triple {13327#(and (<= main_~n~0 7) (<= 3 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {13327#(and (<= main_~n~0 7) (<= 3 main_~i~1))} is VALID [2022-04-07 17:15:16,912 INFO L290 TraceCheckUtils]: 54: Hoare triple {13327#(and (<= main_~n~0 7) (<= 3 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {13352#(and (<= main_~n~0 7) (<= 4 main_~i~1))} is VALID [2022-04-07 17:15:16,912 INFO L290 TraceCheckUtils]: 55: Hoare triple {13352#(and (<= main_~n~0 7) (<= 4 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {13352#(and (<= main_~n~0 7) (<= 4 main_~i~1))} is VALID [2022-04-07 17:15:16,913 INFO L272 TraceCheckUtils]: 56: Hoare triple {13352#(and (<= main_~n~0 7) (<= 4 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13131#true} is VALID [2022-04-07 17:15:16,913 INFO L290 TraceCheckUtils]: 57: Hoare triple {13131#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13131#true} is VALID [2022-04-07 17:15:16,913 INFO L290 TraceCheckUtils]: 58: Hoare triple {13131#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-07 17:15:16,913 INFO L290 TraceCheckUtils]: 59: Hoare triple {13131#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-07 17:15:16,913 INFO L284 TraceCheckUtils]: 60: Hoare quadruple {13131#true} {13352#(and (<= main_~n~0 7) (<= 4 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13352#(and (<= main_~n~0 7) (<= 4 main_~i~1))} is VALID [2022-04-07 17:15:16,913 INFO L290 TraceCheckUtils]: 61: Hoare triple {13352#(and (<= main_~n~0 7) (<= 4 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {13352#(and (<= main_~n~0 7) (<= 4 main_~i~1))} is VALID [2022-04-07 17:15:16,914 INFO L290 TraceCheckUtils]: 62: Hoare triple {13352#(and (<= main_~n~0 7) (<= 4 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {13377#(and (<= 5 main_~i~1) (<= main_~n~0 7))} is VALID [2022-04-07 17:15:16,914 INFO L290 TraceCheckUtils]: 63: Hoare triple {13377#(and (<= 5 main_~i~1) (<= main_~n~0 7))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {13377#(and (<= 5 main_~i~1) (<= main_~n~0 7))} is VALID [2022-04-07 17:15:16,914 INFO L272 TraceCheckUtils]: 64: Hoare triple {13377#(and (<= 5 main_~i~1) (<= main_~n~0 7))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13131#true} is VALID [2022-04-07 17:15:16,914 INFO L290 TraceCheckUtils]: 65: Hoare triple {13131#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13131#true} is VALID [2022-04-07 17:15:16,915 INFO L290 TraceCheckUtils]: 66: Hoare triple {13131#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-07 17:15:16,915 INFO L290 TraceCheckUtils]: 67: Hoare triple {13131#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-07 17:15:16,915 INFO L284 TraceCheckUtils]: 68: Hoare quadruple {13131#true} {13377#(and (<= 5 main_~i~1) (<= main_~n~0 7))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13377#(and (<= 5 main_~i~1) (<= main_~n~0 7))} is VALID [2022-04-07 17:15:16,915 INFO L290 TraceCheckUtils]: 69: Hoare triple {13377#(and (<= 5 main_~i~1) (<= main_~n~0 7))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {13377#(and (<= 5 main_~i~1) (<= main_~n~0 7))} is VALID [2022-04-07 17:15:16,916 INFO L290 TraceCheckUtils]: 70: Hoare triple {13377#(and (<= 5 main_~i~1) (<= main_~n~0 7))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {13402#(and (<= 6 main_~i~1) (<= main_~n~0 7))} is VALID [2022-04-07 17:15:16,916 INFO L290 TraceCheckUtils]: 71: Hoare triple {13402#(and (<= 6 main_~i~1) (<= main_~n~0 7))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {13402#(and (<= 6 main_~i~1) (<= main_~n~0 7))} is VALID [2022-04-07 17:15:16,916 INFO L272 TraceCheckUtils]: 72: Hoare triple {13402#(and (<= 6 main_~i~1) (<= main_~n~0 7))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13131#true} is VALID [2022-04-07 17:15:16,916 INFO L290 TraceCheckUtils]: 73: Hoare triple {13131#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13131#true} is VALID [2022-04-07 17:15:16,916 INFO L290 TraceCheckUtils]: 74: Hoare triple {13131#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-07 17:15:16,916 INFO L290 TraceCheckUtils]: 75: Hoare triple {13131#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-07 17:15:16,917 INFO L284 TraceCheckUtils]: 76: Hoare quadruple {13131#true} {13402#(and (<= 6 main_~i~1) (<= main_~n~0 7))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13402#(and (<= 6 main_~i~1) (<= main_~n~0 7))} is VALID [2022-04-07 17:15:16,917 INFO L290 TraceCheckUtils]: 77: Hoare triple {13402#(and (<= 6 main_~i~1) (<= main_~n~0 7))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {13402#(and (<= 6 main_~i~1) (<= main_~n~0 7))} is VALID [2022-04-07 17:15:16,918 INFO L290 TraceCheckUtils]: 78: Hoare triple {13402#(and (<= 6 main_~i~1) (<= main_~n~0 7))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {13427#(and (<= 7 main_~i~1) (<= main_~n~0 7))} is VALID [2022-04-07 17:15:16,918 INFO L290 TraceCheckUtils]: 79: Hoare triple {13427#(and (<= 7 main_~i~1) (<= main_~n~0 7))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {13132#false} is VALID [2022-04-07 17:15:16,918 INFO L272 TraceCheckUtils]: 80: Hoare triple {13132#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13132#false} is VALID [2022-04-07 17:15:16,918 INFO L290 TraceCheckUtils]: 81: Hoare triple {13132#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13132#false} is VALID [2022-04-07 17:15:16,918 INFO L290 TraceCheckUtils]: 82: Hoare triple {13132#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {13132#false} is VALID [2022-04-07 17:15:16,918 INFO L290 TraceCheckUtils]: 83: Hoare triple {13132#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13132#false} is VALID [2022-04-07 17:15:16,919 INFO L134 CoverageAnalysis]: Checked inductivity of 245 backedges. 112 proven. 49 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2022-04-07 17:15:16,919 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 17:15:17,275 INFO L290 TraceCheckUtils]: 83: Hoare triple {13132#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13132#false} is VALID [2022-04-07 17:15:17,275 INFO L290 TraceCheckUtils]: 82: Hoare triple {13132#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {13132#false} is VALID [2022-04-07 17:15:17,275 INFO L290 TraceCheckUtils]: 81: Hoare triple {13132#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13132#false} is VALID [2022-04-07 17:15:17,275 INFO L272 TraceCheckUtils]: 80: Hoare triple {13132#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13132#false} is VALID [2022-04-07 17:15:17,275 INFO L290 TraceCheckUtils]: 79: Hoare triple {13180#(<= main_~n~0 main_~i~1)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {13132#false} is VALID [2022-04-07 17:15:17,276 INFO L290 TraceCheckUtils]: 78: Hoare triple {13175#(<= main_~n~0 (+ main_~i~1 1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {13180#(<= main_~n~0 main_~i~1)} is VALID [2022-04-07 17:15:17,276 INFO L290 TraceCheckUtils]: 77: Hoare triple {13175#(<= main_~n~0 (+ main_~i~1 1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {13175#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 17:15:17,277 INFO L284 TraceCheckUtils]: 76: Hoare quadruple {13131#true} {13175#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13175#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 17:15:17,277 INFO L290 TraceCheckUtils]: 75: Hoare triple {13131#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-07 17:15:17,277 INFO L290 TraceCheckUtils]: 74: Hoare triple {13131#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-07 17:15:17,277 INFO L290 TraceCheckUtils]: 73: Hoare triple {13131#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13131#true} is VALID [2022-04-07 17:15:17,277 INFO L272 TraceCheckUtils]: 72: Hoare triple {13175#(<= main_~n~0 (+ main_~i~1 1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13131#true} is VALID [2022-04-07 17:15:17,277 INFO L290 TraceCheckUtils]: 71: Hoare triple {13175#(<= main_~n~0 (+ main_~i~1 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {13175#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 17:15:17,278 INFO L290 TraceCheckUtils]: 70: Hoare triple {13170#(<= main_~n~0 (+ main_~i~1 2))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {13175#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 17:15:17,278 INFO L290 TraceCheckUtils]: 69: Hoare triple {13170#(<= main_~n~0 (+ main_~i~1 2))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {13170#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 17:15:17,278 INFO L284 TraceCheckUtils]: 68: Hoare quadruple {13131#true} {13170#(<= main_~n~0 (+ main_~i~1 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13170#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 17:15:17,279 INFO L290 TraceCheckUtils]: 67: Hoare triple {13131#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-07 17:15:17,279 INFO L290 TraceCheckUtils]: 66: Hoare triple {13131#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-07 17:15:17,279 INFO L290 TraceCheckUtils]: 65: Hoare triple {13131#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13131#true} is VALID [2022-04-07 17:15:17,279 INFO L272 TraceCheckUtils]: 64: Hoare triple {13170#(<= main_~n~0 (+ main_~i~1 2))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13131#true} is VALID [2022-04-07 17:15:17,279 INFO L290 TraceCheckUtils]: 63: Hoare triple {13170#(<= main_~n~0 (+ main_~i~1 2))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {13170#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 17:15:17,280 INFO L290 TraceCheckUtils]: 62: Hoare triple {13165#(<= main_~n~0 (+ main_~i~1 3))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {13170#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 17:15:17,280 INFO L290 TraceCheckUtils]: 61: Hoare triple {13165#(<= main_~n~0 (+ main_~i~1 3))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {13165#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-07 17:15:17,280 INFO L284 TraceCheckUtils]: 60: Hoare quadruple {13131#true} {13165#(<= main_~n~0 (+ main_~i~1 3))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13165#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-07 17:15:17,280 INFO L290 TraceCheckUtils]: 59: Hoare triple {13131#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-07 17:15:17,280 INFO L290 TraceCheckUtils]: 58: Hoare triple {13131#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-07 17:15:17,280 INFO L290 TraceCheckUtils]: 57: Hoare triple {13131#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13131#true} is VALID [2022-04-07 17:15:17,281 INFO L272 TraceCheckUtils]: 56: Hoare triple {13165#(<= main_~n~0 (+ main_~i~1 3))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13131#true} is VALID [2022-04-07 17:15:17,281 INFO L290 TraceCheckUtils]: 55: Hoare triple {13165#(<= main_~n~0 (+ main_~i~1 3))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {13165#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-07 17:15:17,281 INFO L290 TraceCheckUtils]: 54: Hoare triple {13160#(<= main_~n~0 (+ main_~i~1 4))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {13165#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-07 17:15:17,282 INFO L290 TraceCheckUtils]: 53: Hoare triple {13160#(<= main_~n~0 (+ main_~i~1 4))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {13160#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-07 17:15:17,282 INFO L284 TraceCheckUtils]: 52: Hoare quadruple {13131#true} {13160#(<= main_~n~0 (+ main_~i~1 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13160#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-07 17:15:17,282 INFO L290 TraceCheckUtils]: 51: Hoare triple {13131#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-07 17:15:17,282 INFO L290 TraceCheckUtils]: 50: Hoare triple {13131#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-07 17:15:17,282 INFO L290 TraceCheckUtils]: 49: Hoare triple {13131#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13131#true} is VALID [2022-04-07 17:15:17,282 INFO L272 TraceCheckUtils]: 48: Hoare triple {13160#(<= main_~n~0 (+ main_~i~1 4))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13131#true} is VALID [2022-04-07 17:15:17,283 INFO L290 TraceCheckUtils]: 47: Hoare triple {13160#(<= main_~n~0 (+ main_~i~1 4))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {13160#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-07 17:15:17,283 INFO L290 TraceCheckUtils]: 46: Hoare triple {13155#(<= main_~n~0 (+ 5 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {13160#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-07 17:15:17,283 INFO L290 TraceCheckUtils]: 45: Hoare triple {13155#(<= main_~n~0 (+ 5 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {13155#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-07 17:15:17,284 INFO L284 TraceCheckUtils]: 44: Hoare quadruple {13131#true} {13155#(<= main_~n~0 (+ 5 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13155#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-07 17:15:17,284 INFO L290 TraceCheckUtils]: 43: Hoare triple {13131#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-07 17:15:17,284 INFO L290 TraceCheckUtils]: 42: Hoare triple {13131#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-07 17:15:17,284 INFO L290 TraceCheckUtils]: 41: Hoare triple {13131#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13131#true} is VALID [2022-04-07 17:15:17,284 INFO L272 TraceCheckUtils]: 40: Hoare triple {13155#(<= main_~n~0 (+ 5 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13131#true} is VALID [2022-04-07 17:15:17,290 INFO L290 TraceCheckUtils]: 39: Hoare triple {13155#(<= main_~n~0 (+ 5 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {13155#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-07 17:15:17,291 INFO L290 TraceCheckUtils]: 38: Hoare triple {13150#(<= main_~n~0 (+ main_~i~1 6))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {13155#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-07 17:15:17,292 INFO L290 TraceCheckUtils]: 37: Hoare triple {13150#(<= main_~n~0 (+ main_~i~1 6))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {13150#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-07 17:15:17,293 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {13131#true} {13150#(<= main_~n~0 (+ main_~i~1 6))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13150#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-07 17:15:17,293 INFO L290 TraceCheckUtils]: 35: Hoare triple {13131#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-07 17:15:17,293 INFO L290 TraceCheckUtils]: 34: Hoare triple {13131#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-07 17:15:17,293 INFO L290 TraceCheckUtils]: 33: Hoare triple {13131#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13131#true} is VALID [2022-04-07 17:15:17,293 INFO L272 TraceCheckUtils]: 32: Hoare triple {13150#(<= main_~n~0 (+ main_~i~1 6))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13131#true} is VALID [2022-04-07 17:15:17,294 INFO L290 TraceCheckUtils]: 31: Hoare triple {13150#(<= main_~n~0 (+ main_~i~1 6))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {13150#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-07 17:15:17,294 INFO L290 TraceCheckUtils]: 30: Hoare triple {13602#(<= main_~n~0 (+ 7 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {13150#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-07 17:15:17,294 INFO L290 TraceCheckUtils]: 29: Hoare triple {13602#(<= main_~n~0 (+ 7 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {13602#(<= main_~n~0 (+ 7 main_~i~1))} is VALID [2022-04-07 17:15:17,295 INFO L284 TraceCheckUtils]: 28: Hoare quadruple {13131#true} {13602#(<= main_~n~0 (+ 7 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13602#(<= main_~n~0 (+ 7 main_~i~1))} is VALID [2022-04-07 17:15:17,295 INFO L290 TraceCheckUtils]: 27: Hoare triple {13131#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-07 17:15:17,295 INFO L290 TraceCheckUtils]: 26: Hoare triple {13131#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-07 17:15:17,295 INFO L290 TraceCheckUtils]: 25: Hoare triple {13131#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13131#true} is VALID [2022-04-07 17:15:17,296 INFO L272 TraceCheckUtils]: 24: Hoare triple {13602#(<= main_~n~0 (+ 7 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {13131#true} is VALID [2022-04-07 17:15:17,296 INFO L290 TraceCheckUtils]: 23: Hoare triple {13602#(<= main_~n~0 (+ 7 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {13602#(<= main_~n~0 (+ 7 main_~i~1))} is VALID [2022-04-07 17:15:17,296 INFO L290 TraceCheckUtils]: 22: Hoare triple {13144#(<= main_~n~0 7)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {13602#(<= main_~n~0 (+ 7 main_~i~1))} is VALID [2022-04-07 17:15:17,297 INFO L290 TraceCheckUtils]: 21: Hoare triple {13143#(<= main_~i~0 7)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {13144#(<= main_~n~0 7)} is VALID [2022-04-07 17:15:17,297 INFO L290 TraceCheckUtils]: 20: Hoare triple {13142#(<= main_~i~0 6)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {13143#(<= main_~i~0 7)} is VALID [2022-04-07 17:15:17,298 INFO L290 TraceCheckUtils]: 19: Hoare triple {13142#(<= main_~i~0 6)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {13142#(<= main_~i~0 6)} is VALID [2022-04-07 17:15:17,298 INFO L290 TraceCheckUtils]: 18: Hoare triple {13141#(<= main_~i~0 5)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {13142#(<= main_~i~0 6)} is VALID [2022-04-07 17:15:17,299 INFO L290 TraceCheckUtils]: 17: Hoare triple {13141#(<= main_~i~0 5)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {13141#(<= main_~i~0 5)} is VALID [2022-04-07 17:15:17,299 INFO L290 TraceCheckUtils]: 16: Hoare triple {13140#(<= main_~i~0 4)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {13141#(<= main_~i~0 5)} is VALID [2022-04-07 17:15:17,299 INFO L290 TraceCheckUtils]: 15: Hoare triple {13140#(<= main_~i~0 4)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {13140#(<= main_~i~0 4)} is VALID [2022-04-07 17:15:17,300 INFO L290 TraceCheckUtils]: 14: Hoare triple {13139#(<= main_~i~0 3)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {13140#(<= main_~i~0 4)} is VALID [2022-04-07 17:15:17,300 INFO L290 TraceCheckUtils]: 13: Hoare triple {13139#(<= main_~i~0 3)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {13139#(<= main_~i~0 3)} is VALID [2022-04-07 17:15:17,301 INFO L290 TraceCheckUtils]: 12: Hoare triple {13138#(<= main_~i~0 2)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {13139#(<= main_~i~0 3)} is VALID [2022-04-07 17:15:17,301 INFO L290 TraceCheckUtils]: 11: Hoare triple {13138#(<= main_~i~0 2)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {13138#(<= main_~i~0 2)} is VALID [2022-04-07 17:15:17,302 INFO L290 TraceCheckUtils]: 10: Hoare triple {13137#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {13138#(<= main_~i~0 2)} is VALID [2022-04-07 17:15:17,302 INFO L290 TraceCheckUtils]: 9: Hoare triple {13137#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {13137#(<= main_~i~0 1)} is VALID [2022-04-07 17:15:17,303 INFO L290 TraceCheckUtils]: 8: Hoare triple {13203#(<= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {13137#(<= main_~i~0 1)} is VALID [2022-04-07 17:15:17,303 INFO L290 TraceCheckUtils]: 7: Hoare triple {13203#(<= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {13203#(<= main_~i~0 0)} is VALID [2022-04-07 17:15:17,304 INFO L290 TraceCheckUtils]: 6: Hoare triple {13131#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {13203#(<= main_~i~0 0)} is VALID [2022-04-07 17:15:17,304 INFO L290 TraceCheckUtils]: 5: Hoare triple {13131#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {13131#true} is VALID [2022-04-07 17:15:17,304 INFO L272 TraceCheckUtils]: 4: Hoare triple {13131#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-07 17:15:17,304 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13131#true} {13131#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-07 17:15:17,304 INFO L290 TraceCheckUtils]: 2: Hoare triple {13131#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-07 17:15:17,304 INFO L290 TraceCheckUtils]: 1: Hoare triple {13131#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {13131#true} is VALID [2022-04-07 17:15:17,304 INFO L272 TraceCheckUtils]: 0: Hoare triple {13131#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13131#true} is VALID [2022-04-07 17:15:17,305 INFO L134 CoverageAnalysis]: Checked inductivity of 245 backedges. 112 proven. 49 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2022-04-07 17:15:17,305 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1813749539] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 17:15:17,305 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 17:15:17,305 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 19, 19] total 30 [2022-04-07 17:15:17,305 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [390329791] [2022-04-07 17:15:17,305 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 17:15:17,306 INFO L78 Accepts]: Start accepts. Automaton has has 30 states, 30 states have (on average 2.6333333333333333) internal successors, (79), 29 states have internal predecessors, (79), 17 states have call successors, (19), 3 states have call predecessors, (19), 1 states have return successors, (16), 16 states have call predecessors, (16), 16 states have call successors, (16) Word has length 84 [2022-04-07 17:15:17,306 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:15:17,306 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 30 states, 30 states have (on average 2.6333333333333333) internal successors, (79), 29 states have internal predecessors, (79), 17 states have call successors, (19), 3 states have call predecessors, (19), 1 states have return successors, (16), 16 states have call predecessors, (16), 16 states have call successors, (16) [2022-04-07 17:15:17,390 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 114 edges. 114 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:15:17,390 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 30 states [2022-04-07 17:15:17,390 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:15:17,390 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2022-04-07 17:15:17,391 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=196, Invalid=674, Unknown=0, NotChecked=0, Total=870 [2022-04-07 17:15:17,391 INFO L87 Difference]: Start difference. First operand 124 states and 127 transitions. Second operand has 30 states, 30 states have (on average 2.6333333333333333) internal successors, (79), 29 states have internal predecessors, (79), 17 states have call successors, (19), 3 states have call predecessors, (19), 1 states have return successors, (16), 16 states have call predecessors, (16), 16 states have call successors, (16) [2022-04-07 17:15:18,210 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:15:18,210 INFO L93 Difference]: Finished difference Result 136 states and 140 transitions. [2022-04-07 17:15:18,210 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2022-04-07 17:15:18,210 INFO L78 Accepts]: Start accepts. Automaton has has 30 states, 30 states have (on average 2.6333333333333333) internal successors, (79), 29 states have internal predecessors, (79), 17 states have call successors, (19), 3 states have call predecessors, (19), 1 states have return successors, (16), 16 states have call predecessors, (16), 16 states have call successors, (16) Word has length 84 [2022-04-07 17:15:18,211 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:15:18,211 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 30 states, 30 states have (on average 2.6333333333333333) internal successors, (79), 29 states have internal predecessors, (79), 17 states have call successors, (19), 3 states have call predecessors, (19), 1 states have return successors, (16), 16 states have call predecessors, (16), 16 states have call successors, (16) [2022-04-07 17:15:18,212 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 75 transitions. [2022-04-07 17:15:18,212 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 30 states, 30 states have (on average 2.6333333333333333) internal successors, (79), 29 states have internal predecessors, (79), 17 states have call successors, (19), 3 states have call predecessors, (19), 1 states have return successors, (16), 16 states have call predecessors, (16), 16 states have call successors, (16) [2022-04-07 17:15:18,214 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 75 transitions. [2022-04-07 17:15:18,214 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 20 states and 75 transitions. [2022-04-07 17:15:18,288 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 75 edges. 75 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:15:18,289 INFO L225 Difference]: With dead ends: 136 [2022-04-07 17:15:18,289 INFO L226 Difference]: Without dead ends: 90 [2022-04-07 17:15:18,290 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 219 GetRequests, 173 SyntacticMatches, 1 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 555 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=441, Invalid=1721, Unknown=0, NotChecked=0, Total=2162 [2022-04-07 17:15:18,291 INFO L913 BasicCegarLoop]: 27 mSDtfsCounter, 45 mSDsluCounter, 47 mSDsCounter, 0 mSdLazyCounter, 374 mSolverCounterSat, 40 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 46 SdHoareTripleChecker+Valid, 74 SdHoareTripleChecker+Invalid, 414 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 40 IncrementalHoareTripleChecker+Valid, 374 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-04-07 17:15:18,291 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [46 Valid, 74 Invalid, 414 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [40 Valid, 374 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-04-07 17:15:18,291 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 90 states. [2022-04-07 17:15:18,293 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 90 to 89. [2022-04-07 17:15:18,293 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:15:18,293 INFO L82 GeneralOperation]: Start isEquivalent. First operand 90 states. Second operand has 89 states, 69 states have (on average 1.0289855072463767) internal successors, (71), 70 states have internal predecessors, (71), 10 states have call successors, (10), 10 states have call predecessors, (10), 9 states have return successors, (9), 8 states have call predecessors, (9), 9 states have call successors, (9) [2022-04-07 17:15:18,293 INFO L74 IsIncluded]: Start isIncluded. First operand 90 states. Second operand has 89 states, 69 states have (on average 1.0289855072463767) internal successors, (71), 70 states have internal predecessors, (71), 10 states have call successors, (10), 10 states have call predecessors, (10), 9 states have return successors, (9), 8 states have call predecessors, (9), 9 states have call successors, (9) [2022-04-07 17:15:18,294 INFO L87 Difference]: Start difference. First operand 90 states. Second operand has 89 states, 69 states have (on average 1.0289855072463767) internal successors, (71), 70 states have internal predecessors, (71), 10 states have call successors, (10), 10 states have call predecessors, (10), 9 states have return successors, (9), 8 states have call predecessors, (9), 9 states have call successors, (9) [2022-04-07 17:15:18,295 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:15:18,295 INFO L93 Difference]: Finished difference Result 90 states and 91 transitions. [2022-04-07 17:15:18,295 INFO L276 IsEmpty]: Start isEmpty. Operand 90 states and 91 transitions. [2022-04-07 17:15:18,295 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:15:18,295 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:15:18,296 INFO L74 IsIncluded]: Start isIncluded. First operand has 89 states, 69 states have (on average 1.0289855072463767) internal successors, (71), 70 states have internal predecessors, (71), 10 states have call successors, (10), 10 states have call predecessors, (10), 9 states have return successors, (9), 8 states have call predecessors, (9), 9 states have call successors, (9) Second operand 90 states. [2022-04-07 17:15:18,296 INFO L87 Difference]: Start difference. First operand has 89 states, 69 states have (on average 1.0289855072463767) internal successors, (71), 70 states have internal predecessors, (71), 10 states have call successors, (10), 10 states have call predecessors, (10), 9 states have return successors, (9), 8 states have call predecessors, (9), 9 states have call successors, (9) Second operand 90 states. [2022-04-07 17:15:18,297 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:15:18,297 INFO L93 Difference]: Finished difference Result 90 states and 91 transitions. [2022-04-07 17:15:18,297 INFO L276 IsEmpty]: Start isEmpty. Operand 90 states and 91 transitions. [2022-04-07 17:15:18,297 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:15:18,298 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:15:18,298 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:15:18,298 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:15:18,298 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 89 states, 69 states have (on average 1.0289855072463767) internal successors, (71), 70 states have internal predecessors, (71), 10 states have call successors, (10), 10 states have call predecessors, (10), 9 states have return successors, (9), 8 states have call predecessors, (9), 9 states have call successors, (9) [2022-04-07 17:15:18,299 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 89 states to 89 states and 90 transitions. [2022-04-07 17:15:18,299 INFO L78 Accepts]: Start accepts. Automaton has 89 states and 90 transitions. Word has length 84 [2022-04-07 17:15:18,299 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:15:18,299 INFO L478 AbstractCegarLoop]: Abstraction has 89 states and 90 transitions. [2022-04-07 17:15:18,299 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 30 states, 30 states have (on average 2.6333333333333333) internal successors, (79), 29 states have internal predecessors, (79), 17 states have call successors, (19), 3 states have call predecessors, (19), 1 states have return successors, (16), 16 states have call predecessors, (16), 16 states have call successors, (16) [2022-04-07 17:15:18,299 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 90 transitions. [2022-04-07 17:15:18,300 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2022-04-07 17:15:18,300 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:15:18,300 INFO L499 BasicCegarLoop]: trace histogram [8, 8, 8, 8, 8, 7, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:15:18,327 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Forceful destruction successful, exit code 0 [2022-04-07 17:15:18,523 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20,20 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:15:18,523 INFO L403 AbstractCegarLoop]: === Iteration 22 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:15:18,524 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:15:18,524 INFO L85 PathProgramCache]: Analyzing trace with hash -160730255, now seen corresponding path program 19 times [2022-04-07 17:15:18,524 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:15:18,524 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1764480850] [2022-04-07 17:15:18,524 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:15:18,524 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:15:18,549 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:15:18,859 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:15:18,860 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:15:18,868 INFO L290 TraceCheckUtils]: 0: Hoare triple {14188#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {14134#true} is VALID [2022-04-07 17:15:18,869 INFO L290 TraceCheckUtils]: 1: Hoare triple {14134#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-07 17:15:18,869 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {14134#true} {14134#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-07 17:15:18,869 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 26 [2022-04-07 17:15:18,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:15:18,872 INFO L290 TraceCheckUtils]: 0: Hoare triple {14134#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14134#true} is VALID [2022-04-07 17:15:18,873 INFO L290 TraceCheckUtils]: 1: Hoare triple {14134#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-07 17:15:18,873 INFO L290 TraceCheckUtils]: 2: Hoare triple {14134#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-07 17:15:18,874 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14134#true} {14149#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14149#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:15:18,874 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 34 [2022-04-07 17:15:18,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:15:18,876 INFO L290 TraceCheckUtils]: 0: Hoare triple {14134#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14134#true} is VALID [2022-04-07 17:15:18,877 INFO L290 TraceCheckUtils]: 1: Hoare triple {14134#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-07 17:15:18,877 INFO L290 TraceCheckUtils]: 2: Hoare triple {14134#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-07 17:15:18,877 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14134#true} {14154#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14154#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 17:15:18,878 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 42 [2022-04-07 17:15:18,878 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:15:18,880 INFO L290 TraceCheckUtils]: 0: Hoare triple {14134#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14134#true} is VALID [2022-04-07 17:15:18,880 INFO L290 TraceCheckUtils]: 1: Hoare triple {14134#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-07 17:15:18,880 INFO L290 TraceCheckUtils]: 2: Hoare triple {14134#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-07 17:15:18,881 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14134#true} {14159#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14159#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 17:15:18,881 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 50 [2022-04-07 17:15:18,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:15:18,884 INFO L290 TraceCheckUtils]: 0: Hoare triple {14134#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14134#true} is VALID [2022-04-07 17:15:18,884 INFO L290 TraceCheckUtils]: 1: Hoare triple {14134#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-07 17:15:18,884 INFO L290 TraceCheckUtils]: 2: Hoare triple {14134#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-07 17:15:18,885 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14134#true} {14164#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14164#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:15:18,885 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 58 [2022-04-07 17:15:18,885 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:15:18,887 INFO L290 TraceCheckUtils]: 0: Hoare triple {14134#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14134#true} is VALID [2022-04-07 17:15:18,887 INFO L290 TraceCheckUtils]: 1: Hoare triple {14134#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-07 17:15:18,887 INFO L290 TraceCheckUtils]: 2: Hoare triple {14134#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-07 17:15:18,888 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14134#true} {14169#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14169#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:15:18,888 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 66 [2022-04-07 17:15:18,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:15:18,891 INFO L290 TraceCheckUtils]: 0: Hoare triple {14134#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14134#true} is VALID [2022-04-07 17:15:18,891 INFO L290 TraceCheckUtils]: 1: Hoare triple {14134#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-07 17:15:18,891 INFO L290 TraceCheckUtils]: 2: Hoare triple {14134#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-07 17:15:18,892 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14134#true} {14174#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14174#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:15:18,892 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 74 [2022-04-07 17:15:18,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:15:18,895 INFO L290 TraceCheckUtils]: 0: Hoare triple {14134#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14134#true} is VALID [2022-04-07 17:15:18,895 INFO L290 TraceCheckUtils]: 1: Hoare triple {14134#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-07 17:15:18,895 INFO L290 TraceCheckUtils]: 2: Hoare triple {14134#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-07 17:15:18,895 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14134#true} {14179#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14179#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:15:18,896 INFO L272 TraceCheckUtils]: 0: Hoare triple {14134#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14188#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:15:18,896 INFO L290 TraceCheckUtils]: 1: Hoare triple {14188#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {14134#true} is VALID [2022-04-07 17:15:18,896 INFO L290 TraceCheckUtils]: 2: Hoare triple {14134#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-07 17:15:18,896 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14134#true} {14134#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-07 17:15:18,896 INFO L272 TraceCheckUtils]: 4: Hoare triple {14134#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-07 17:15:18,896 INFO L290 TraceCheckUtils]: 5: Hoare triple {14134#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {14134#true} is VALID [2022-04-07 17:15:18,897 INFO L290 TraceCheckUtils]: 6: Hoare triple {14134#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {14139#(= main_~i~0 0)} is VALID [2022-04-07 17:15:18,897 INFO L290 TraceCheckUtils]: 7: Hoare triple {14139#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14139#(= main_~i~0 0)} is VALID [2022-04-07 17:15:18,897 INFO L290 TraceCheckUtils]: 8: Hoare triple {14139#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14140#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:15:18,898 INFO L290 TraceCheckUtils]: 9: Hoare triple {14140#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14140#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:15:18,898 INFO L290 TraceCheckUtils]: 10: Hoare triple {14140#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14141#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:15:18,899 INFO L290 TraceCheckUtils]: 11: Hoare triple {14141#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14141#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:15:18,899 INFO L290 TraceCheckUtils]: 12: Hoare triple {14141#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14142#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 17:15:18,899 INFO L290 TraceCheckUtils]: 13: Hoare triple {14142#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14142#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 17:15:18,900 INFO L290 TraceCheckUtils]: 14: Hoare triple {14142#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14143#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 17:15:18,900 INFO L290 TraceCheckUtils]: 15: Hoare triple {14143#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14143#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 17:15:18,901 INFO L290 TraceCheckUtils]: 16: Hoare triple {14143#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14144#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 17:15:18,901 INFO L290 TraceCheckUtils]: 17: Hoare triple {14144#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14144#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 17:15:18,902 INFO L290 TraceCheckUtils]: 18: Hoare triple {14144#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14145#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-07 17:15:18,902 INFO L290 TraceCheckUtils]: 19: Hoare triple {14145#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14145#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-07 17:15:18,902 INFO L290 TraceCheckUtils]: 20: Hoare triple {14145#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14146#(and (<= main_~i~0 7) (<= 7 main_~i~0))} is VALID [2022-04-07 17:15:18,903 INFO L290 TraceCheckUtils]: 21: Hoare triple {14146#(and (<= main_~i~0 7) (<= 7 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14147#(and (<= main_~i~0 7) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 7 main_~i~0))} is VALID [2022-04-07 17:15:18,903 INFO L290 TraceCheckUtils]: 22: Hoare triple {14147#(and (<= main_~i~0 7) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 7 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14148#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-07 17:15:18,904 INFO L290 TraceCheckUtils]: 23: Hoare triple {14148#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {14148#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-07 17:15:18,904 INFO L290 TraceCheckUtils]: 24: Hoare triple {14148#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {14149#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:15:18,904 INFO L290 TraceCheckUtils]: 25: Hoare triple {14149#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14149#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:15:18,905 INFO L272 TraceCheckUtils]: 26: Hoare triple {14149#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14134#true} is VALID [2022-04-07 17:15:18,905 INFO L290 TraceCheckUtils]: 27: Hoare triple {14134#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14134#true} is VALID [2022-04-07 17:15:18,905 INFO L290 TraceCheckUtils]: 28: Hoare triple {14134#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-07 17:15:18,905 INFO L290 TraceCheckUtils]: 29: Hoare triple {14134#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-07 17:15:18,905 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {14134#true} {14149#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14149#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:15:18,906 INFO L290 TraceCheckUtils]: 31: Hoare triple {14149#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14149#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:15:18,906 INFO L290 TraceCheckUtils]: 32: Hoare triple {14149#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14154#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 17:15:18,906 INFO L290 TraceCheckUtils]: 33: Hoare triple {14154#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14154#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 17:15:18,906 INFO L272 TraceCheckUtils]: 34: Hoare triple {14154#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14134#true} is VALID [2022-04-07 17:15:18,906 INFO L290 TraceCheckUtils]: 35: Hoare triple {14134#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14134#true} is VALID [2022-04-07 17:15:18,907 INFO L290 TraceCheckUtils]: 36: Hoare triple {14134#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-07 17:15:18,907 INFO L290 TraceCheckUtils]: 37: Hoare triple {14134#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-07 17:15:18,907 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {14134#true} {14154#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14154#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 17:15:18,907 INFO L290 TraceCheckUtils]: 39: Hoare triple {14154#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14154#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 17:15:18,908 INFO L290 TraceCheckUtils]: 40: Hoare triple {14154#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14159#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 17:15:18,908 INFO L290 TraceCheckUtils]: 41: Hoare triple {14159#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14159#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 17:15:18,908 INFO L272 TraceCheckUtils]: 42: Hoare triple {14159#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14134#true} is VALID [2022-04-07 17:15:18,908 INFO L290 TraceCheckUtils]: 43: Hoare triple {14134#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14134#true} is VALID [2022-04-07 17:15:18,909 INFO L290 TraceCheckUtils]: 44: Hoare triple {14134#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-07 17:15:18,909 INFO L290 TraceCheckUtils]: 45: Hoare triple {14134#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-07 17:15:18,909 INFO L284 TraceCheckUtils]: 46: Hoare quadruple {14134#true} {14159#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14159#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 17:15:18,909 INFO L290 TraceCheckUtils]: 47: Hoare triple {14159#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14159#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 17:15:18,910 INFO L290 TraceCheckUtils]: 48: Hoare triple {14159#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14164#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:15:18,910 INFO L290 TraceCheckUtils]: 49: Hoare triple {14164#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14164#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:15:18,910 INFO L272 TraceCheckUtils]: 50: Hoare triple {14164#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14134#true} is VALID [2022-04-07 17:15:18,911 INFO L290 TraceCheckUtils]: 51: Hoare triple {14134#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14134#true} is VALID [2022-04-07 17:15:18,911 INFO L290 TraceCheckUtils]: 52: Hoare triple {14134#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-07 17:15:18,911 INFO L290 TraceCheckUtils]: 53: Hoare triple {14134#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-07 17:15:18,911 INFO L284 TraceCheckUtils]: 54: Hoare quadruple {14134#true} {14164#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14164#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:15:18,912 INFO L290 TraceCheckUtils]: 55: Hoare triple {14164#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14164#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:15:18,912 INFO L290 TraceCheckUtils]: 56: Hoare triple {14164#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14169#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:15:18,912 INFO L290 TraceCheckUtils]: 57: Hoare triple {14169#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14169#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:15:18,913 INFO L272 TraceCheckUtils]: 58: Hoare triple {14169#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14134#true} is VALID [2022-04-07 17:15:18,913 INFO L290 TraceCheckUtils]: 59: Hoare triple {14134#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14134#true} is VALID [2022-04-07 17:15:18,913 INFO L290 TraceCheckUtils]: 60: Hoare triple {14134#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-07 17:15:18,913 INFO L290 TraceCheckUtils]: 61: Hoare triple {14134#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-07 17:15:18,913 INFO L284 TraceCheckUtils]: 62: Hoare quadruple {14134#true} {14169#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14169#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:15:18,914 INFO L290 TraceCheckUtils]: 63: Hoare triple {14169#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14169#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:15:18,914 INFO L290 TraceCheckUtils]: 64: Hoare triple {14169#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14174#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:15:18,915 INFO L290 TraceCheckUtils]: 65: Hoare triple {14174#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14174#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:15:18,915 INFO L272 TraceCheckUtils]: 66: Hoare triple {14174#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14134#true} is VALID [2022-04-07 17:15:18,915 INFO L290 TraceCheckUtils]: 67: Hoare triple {14134#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14134#true} is VALID [2022-04-07 17:15:18,915 INFO L290 TraceCheckUtils]: 68: Hoare triple {14134#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-07 17:15:18,915 INFO L290 TraceCheckUtils]: 69: Hoare triple {14134#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-07 17:15:18,915 INFO L284 TraceCheckUtils]: 70: Hoare quadruple {14134#true} {14174#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14174#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:15:18,916 INFO L290 TraceCheckUtils]: 71: Hoare triple {14174#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14174#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:15:18,916 INFO L290 TraceCheckUtils]: 72: Hoare triple {14174#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14179#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:15:18,917 INFO L290 TraceCheckUtils]: 73: Hoare triple {14179#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14179#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:15:18,917 INFO L272 TraceCheckUtils]: 74: Hoare triple {14179#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14134#true} is VALID [2022-04-07 17:15:18,917 INFO L290 TraceCheckUtils]: 75: Hoare triple {14134#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14134#true} is VALID [2022-04-07 17:15:18,917 INFO L290 TraceCheckUtils]: 76: Hoare triple {14134#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-07 17:15:18,923 INFO L290 TraceCheckUtils]: 77: Hoare triple {14134#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-07 17:15:18,925 INFO L284 TraceCheckUtils]: 78: Hoare quadruple {14134#true} {14179#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14179#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:15:18,925 INFO L290 TraceCheckUtils]: 79: Hoare triple {14179#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14179#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:15:18,926 INFO L290 TraceCheckUtils]: 80: Hoare triple {14179#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14184#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:15:18,926 INFO L290 TraceCheckUtils]: 81: Hoare triple {14184#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14185#(= |main_#t~mem5| 0)} is VALID [2022-04-07 17:15:18,926 INFO L272 TraceCheckUtils]: 82: Hoare triple {14185#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14186#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:15:18,927 INFO L290 TraceCheckUtils]: 83: Hoare triple {14186#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14187#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:15:18,927 INFO L290 TraceCheckUtils]: 84: Hoare triple {14187#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {14135#false} is VALID [2022-04-07 17:15:18,927 INFO L290 TraceCheckUtils]: 85: Hoare triple {14135#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14135#false} is VALID [2022-04-07 17:15:18,928 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 14 proven. 162 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2022-04-07 17:15:18,928 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:15:18,928 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1764480850] [2022-04-07 17:15:18,928 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1764480850] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:15:18,928 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [887058096] [2022-04-07 17:15:18,928 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-04-07 17:15:18,928 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:15:18,928 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:15:18,929 INFO L229 MonitoredProcess]: Starting monitored process 21 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:15:18,929 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Waiting until timeout for monitored process [2022-04-07 17:15:19,001 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:15:19,002 INFO L263 TraceCheckSpWp]: Trace formula consists of 235 conjuncts, 41 conjunts are in the unsatisfiable core [2022-04-07 17:15:19,015 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:15:19,017 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:15:19,156 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-07 17:16:43,315 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2022-04-07 17:16:43,369 INFO L272 TraceCheckUtils]: 0: Hoare triple {14134#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-07 17:16:43,370 INFO L290 TraceCheckUtils]: 1: Hoare triple {14134#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {14134#true} is VALID [2022-04-07 17:16:43,370 INFO L290 TraceCheckUtils]: 2: Hoare triple {14134#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-07 17:16:43,370 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14134#true} {14134#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-07 17:16:43,370 INFO L272 TraceCheckUtils]: 4: Hoare triple {14134#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-07 17:16:43,370 INFO L290 TraceCheckUtils]: 5: Hoare triple {14134#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {14134#true} is VALID [2022-04-07 17:16:43,370 INFO L290 TraceCheckUtils]: 6: Hoare triple {14134#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {14139#(= main_~i~0 0)} is VALID [2022-04-07 17:16:43,371 INFO L290 TraceCheckUtils]: 7: Hoare triple {14139#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14139#(= main_~i~0 0)} is VALID [2022-04-07 17:16:43,371 INFO L290 TraceCheckUtils]: 8: Hoare triple {14139#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14140#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:16:43,371 INFO L290 TraceCheckUtils]: 9: Hoare triple {14140#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14140#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:16:43,372 INFO L290 TraceCheckUtils]: 10: Hoare triple {14140#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14141#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:16:43,372 INFO L290 TraceCheckUtils]: 11: Hoare triple {14141#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14141#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:16:43,373 INFO L290 TraceCheckUtils]: 12: Hoare triple {14141#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14142#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 17:16:43,373 INFO L290 TraceCheckUtils]: 13: Hoare triple {14142#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14142#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 17:16:43,373 INFO L290 TraceCheckUtils]: 14: Hoare triple {14142#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14143#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 17:16:43,374 INFO L290 TraceCheckUtils]: 15: Hoare triple {14143#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14143#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 17:16:43,374 INFO L290 TraceCheckUtils]: 16: Hoare triple {14143#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14144#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 17:16:43,375 INFO L290 TraceCheckUtils]: 17: Hoare triple {14144#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14144#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 17:16:43,375 INFO L290 TraceCheckUtils]: 18: Hoare triple {14144#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14145#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-07 17:16:43,375 INFO L290 TraceCheckUtils]: 19: Hoare triple {14145#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14145#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-07 17:16:43,376 INFO L290 TraceCheckUtils]: 20: Hoare triple {14145#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14146#(and (<= main_~i~0 7) (<= 7 main_~i~0))} is VALID [2022-04-07 17:16:43,376 INFO L290 TraceCheckUtils]: 21: Hoare triple {14146#(and (<= main_~i~0 7) (<= 7 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14148#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-07 17:16:43,377 INFO L290 TraceCheckUtils]: 22: Hoare triple {14148#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14148#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-07 17:16:43,377 INFO L290 TraceCheckUtils]: 23: Hoare triple {14148#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {14148#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-07 17:16:43,377 INFO L290 TraceCheckUtils]: 24: Hoare triple {14148#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {14149#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:16:43,378 INFO L290 TraceCheckUtils]: 25: Hoare triple {14149#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14149#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:16:43,378 INFO L272 TraceCheckUtils]: 26: Hoare triple {14149#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} is VALID [2022-04-07 17:16:43,379 INFO L290 TraceCheckUtils]: 27: Hoare triple {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} is VALID [2022-04-07 17:16:43,379 INFO L290 TraceCheckUtils]: 28: Hoare triple {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} is VALID [2022-04-07 17:16:43,380 INFO L290 TraceCheckUtils]: 29: Hoare triple {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} is VALID [2022-04-07 17:16:43,380 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} {14149#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14149#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:16:43,380 INFO L290 TraceCheckUtils]: 31: Hoare triple {14149#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14149#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:16:43,381 INFO L290 TraceCheckUtils]: 32: Hoare triple {14149#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14289#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 17:16:43,381 INFO L290 TraceCheckUtils]: 33: Hoare triple {14289#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ (- 1) main_~i~1)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14289#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 17:16:43,382 INFO L272 TraceCheckUtils]: 34: Hoare triple {14289#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ (- 1) main_~i~1)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} is VALID [2022-04-07 17:16:43,382 INFO L290 TraceCheckUtils]: 35: Hoare triple {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} is VALID [2022-04-07 17:16:43,383 INFO L290 TraceCheckUtils]: 36: Hoare triple {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} is VALID [2022-04-07 17:16:43,383 INFO L290 TraceCheckUtils]: 37: Hoare triple {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} is VALID [2022-04-07 17:16:43,384 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} {14289#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ (- 1) main_~i~1)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14289#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 17:16:43,384 INFO L290 TraceCheckUtils]: 39: Hoare triple {14289#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ (- 1) main_~i~1)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14289#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 17:16:43,384 INFO L290 TraceCheckUtils]: 40: Hoare triple {14289#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ (- 1) main_~i~1)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14314#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 0))} is VALID [2022-04-07 17:16:43,385 INFO L290 TraceCheckUtils]: 41: Hoare triple {14314#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14314#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 0))} is VALID [2022-04-07 17:16:43,385 INFO L272 TraceCheckUtils]: 42: Hoare triple {14314#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} is VALID [2022-04-07 17:16:43,386 INFO L290 TraceCheckUtils]: 43: Hoare triple {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} is VALID [2022-04-07 17:16:43,386 INFO L290 TraceCheckUtils]: 44: Hoare triple {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} is VALID [2022-04-07 17:16:43,387 INFO L290 TraceCheckUtils]: 45: Hoare triple {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} is VALID [2022-04-07 17:16:43,387 INFO L284 TraceCheckUtils]: 46: Hoare quadruple {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} {14314#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14314#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 0))} is VALID [2022-04-07 17:16:43,387 INFO L290 TraceCheckUtils]: 47: Hoare triple {14314#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14314#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 0))} is VALID [2022-04-07 17:16:43,388 INFO L290 TraceCheckUtils]: 48: Hoare triple {14314#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14339#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ main_~i~1 (- 3)) 0))} is VALID [2022-04-07 17:16:43,388 INFO L290 TraceCheckUtils]: 49: Hoare triple {14339#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ main_~i~1 (- 3)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14339#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ main_~i~1 (- 3)) 0))} is VALID [2022-04-07 17:16:43,389 INFO L272 TraceCheckUtils]: 50: Hoare triple {14339#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ main_~i~1 (- 3)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} is VALID [2022-04-07 17:16:43,389 INFO L290 TraceCheckUtils]: 51: Hoare triple {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} is VALID [2022-04-07 17:16:43,390 INFO L290 TraceCheckUtils]: 52: Hoare triple {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} is VALID [2022-04-07 17:16:43,390 INFO L290 TraceCheckUtils]: 53: Hoare triple {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} is VALID [2022-04-07 17:16:43,391 INFO L284 TraceCheckUtils]: 54: Hoare quadruple {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} {14339#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ main_~i~1 (- 3)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14339#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ main_~i~1 (- 3)) 0))} is VALID [2022-04-07 17:16:43,391 INFO L290 TraceCheckUtils]: 55: Hoare triple {14339#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ main_~i~1 (- 3)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14339#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ main_~i~1 (- 3)) 0))} is VALID [2022-04-07 17:16:43,391 INFO L290 TraceCheckUtils]: 56: Hoare triple {14339#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ main_~i~1 (- 3)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14364#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ main_~i~1 (- 4))))} is VALID [2022-04-07 17:16:43,392 INFO L290 TraceCheckUtils]: 57: Hoare triple {14364#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ main_~i~1 (- 4))))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14364#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ main_~i~1 (- 4))))} is VALID [2022-04-07 17:16:43,392 INFO L272 TraceCheckUtils]: 58: Hoare triple {14364#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ main_~i~1 (- 4))))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} is VALID [2022-04-07 17:16:43,393 INFO L290 TraceCheckUtils]: 59: Hoare triple {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} is VALID [2022-04-07 17:16:43,393 INFO L290 TraceCheckUtils]: 60: Hoare triple {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} is VALID [2022-04-07 17:16:43,403 INFO L290 TraceCheckUtils]: 61: Hoare triple {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} is VALID [2022-04-07 17:16:43,404 INFO L284 TraceCheckUtils]: 62: Hoare quadruple {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} {14364#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ main_~i~1 (- 4))))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14364#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ main_~i~1 (- 4))))} is VALID [2022-04-07 17:16:43,404 INFO L290 TraceCheckUtils]: 63: Hoare triple {14364#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ main_~i~1 (- 4))))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14364#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ main_~i~1 (- 4))))} is VALID [2022-04-07 17:16:43,405 INFO L290 TraceCheckUtils]: 64: Hoare triple {14364#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ main_~i~1 (- 4))))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14389#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ main_~i~1 (- 5)) 0))} is VALID [2022-04-07 17:16:43,405 INFO L290 TraceCheckUtils]: 65: Hoare triple {14389#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ main_~i~1 (- 5)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14389#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ main_~i~1 (- 5)) 0))} is VALID [2022-04-07 17:16:43,406 INFO L272 TraceCheckUtils]: 66: Hoare triple {14389#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ main_~i~1 (- 5)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} is VALID [2022-04-07 17:16:43,407 INFO L290 TraceCheckUtils]: 67: Hoare triple {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} is VALID [2022-04-07 17:16:43,407 INFO L290 TraceCheckUtils]: 68: Hoare triple {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} is VALID [2022-04-07 17:16:43,408 INFO L290 TraceCheckUtils]: 69: Hoare triple {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} is VALID [2022-04-07 17:16:43,408 INFO L284 TraceCheckUtils]: 70: Hoare quadruple {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} {14389#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ main_~i~1 (- 5)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14389#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ main_~i~1 (- 5)) 0))} is VALID [2022-04-07 17:16:43,409 INFO L290 TraceCheckUtils]: 71: Hoare triple {14389#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ main_~i~1 (- 5)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14389#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ main_~i~1 (- 5)) 0))} is VALID [2022-04-07 17:16:43,409 INFO L290 TraceCheckUtils]: 72: Hoare triple {14389#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ main_~i~1 (- 5)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14414#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ main_~i~1 (- 6))))} is VALID [2022-04-07 17:16:43,410 INFO L290 TraceCheckUtils]: 73: Hoare triple {14414#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ main_~i~1 (- 6))))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14414#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ main_~i~1 (- 6))))} is VALID [2022-04-07 17:16:43,411 INFO L272 TraceCheckUtils]: 74: Hoare triple {14414#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ main_~i~1 (- 6))))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} is VALID [2022-04-07 17:16:43,411 INFO L290 TraceCheckUtils]: 75: Hoare triple {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} is VALID [2022-04-07 17:16:43,412 INFO L290 TraceCheckUtils]: 76: Hoare triple {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} is VALID [2022-04-07 17:16:43,412 INFO L290 TraceCheckUtils]: 77: Hoare triple {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} is VALID [2022-04-07 17:16:43,413 INFO L284 TraceCheckUtils]: 78: Hoare quadruple {14270#(exists ((v_main_~x~0.base_BEFORE_CALL_85 Int) (v_main_~x~0.offset_BEFORE_CALL_85 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_85) (+ 28 v_main_~x~0.offset_BEFORE_CALL_85)) 0))} {14414#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ main_~i~1 (- 6))))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14414#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ main_~i~1 (- 6))))} is VALID [2022-04-07 17:16:43,413 INFO L290 TraceCheckUtils]: 79: Hoare triple {14414#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ main_~i~1 (- 6))))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14414#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ main_~i~1 (- 6))))} is VALID [2022-04-07 17:16:43,414 INFO L290 TraceCheckUtils]: 80: Hoare triple {14414#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ main_~i~1 (- 6))))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14439#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ main_~i~1 (- 7)) 0))} is VALID [2022-04-07 17:16:43,414 INFO L290 TraceCheckUtils]: 81: Hoare triple {14439#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ main_~i~1 (- 7)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14185#(= |main_#t~mem5| 0)} is VALID [2022-04-07 17:16:43,415 INFO L272 TraceCheckUtils]: 82: Hoare triple {14185#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14446#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:16:43,415 INFO L290 TraceCheckUtils]: 83: Hoare triple {14446#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14450#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:16:43,415 INFO L290 TraceCheckUtils]: 84: Hoare triple {14450#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {14135#false} is VALID [2022-04-07 17:16:43,415 INFO L290 TraceCheckUtils]: 85: Hoare triple {14135#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14135#false} is VALID [2022-04-07 17:16:43,416 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 0 proven. 176 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2022-04-07 17:16:43,416 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 17:16:45,699 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2022-04-07 17:16:45,703 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2022-04-07 17:16:45,822 INFO L290 TraceCheckUtils]: 85: Hoare triple {14135#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14135#false} is VALID [2022-04-07 17:16:45,822 INFO L290 TraceCheckUtils]: 84: Hoare triple {14450#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {14135#false} is VALID [2022-04-07 17:16:45,823 INFO L290 TraceCheckUtils]: 83: Hoare triple {14446#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14450#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:16:45,823 INFO L272 TraceCheckUtils]: 82: Hoare triple {14185#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14446#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:16:45,824 INFO L290 TraceCheckUtils]: 81: Hoare triple {14184#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14185#(= |main_#t~mem5| 0)} is VALID [2022-04-07 17:16:45,824 INFO L290 TraceCheckUtils]: 80: Hoare triple {14179#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14184#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:16:45,825 INFO L290 TraceCheckUtils]: 79: Hoare triple {14179#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14179#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:16:45,825 INFO L284 TraceCheckUtils]: 78: Hoare quadruple {14134#true} {14179#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14179#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:16:45,825 INFO L290 TraceCheckUtils]: 77: Hoare triple {14134#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-07 17:16:45,825 INFO L290 TraceCheckUtils]: 76: Hoare triple {14134#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-07 17:16:45,825 INFO L290 TraceCheckUtils]: 75: Hoare triple {14134#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14134#true} is VALID [2022-04-07 17:16:45,825 INFO L272 TraceCheckUtils]: 74: Hoare triple {14179#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14134#true} is VALID [2022-04-07 17:16:45,835 INFO L290 TraceCheckUtils]: 73: Hoare triple {14179#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14179#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:16:45,835 INFO L290 TraceCheckUtils]: 72: Hoare triple {14174#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14179#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:16:45,836 INFO L290 TraceCheckUtils]: 71: Hoare triple {14174#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14174#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:16:45,836 INFO L284 TraceCheckUtils]: 70: Hoare quadruple {14134#true} {14174#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14174#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:16:45,836 INFO L290 TraceCheckUtils]: 69: Hoare triple {14134#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-07 17:16:45,836 INFO L290 TraceCheckUtils]: 68: Hoare triple {14134#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-07 17:16:45,837 INFO L290 TraceCheckUtils]: 67: Hoare triple {14134#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14134#true} is VALID [2022-04-07 17:16:45,837 INFO L272 TraceCheckUtils]: 66: Hoare triple {14174#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14134#true} is VALID [2022-04-07 17:16:45,837 INFO L290 TraceCheckUtils]: 65: Hoare triple {14174#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14174#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:16:45,838 INFO L290 TraceCheckUtils]: 64: Hoare triple {14169#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14174#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:16:45,838 INFO L290 TraceCheckUtils]: 63: Hoare triple {14169#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14169#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:16:45,838 INFO L284 TraceCheckUtils]: 62: Hoare quadruple {14134#true} {14169#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14169#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:16:45,838 INFO L290 TraceCheckUtils]: 61: Hoare triple {14134#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-07 17:16:45,839 INFO L290 TraceCheckUtils]: 60: Hoare triple {14134#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-07 17:16:45,839 INFO L290 TraceCheckUtils]: 59: Hoare triple {14134#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14134#true} is VALID [2022-04-07 17:16:45,839 INFO L272 TraceCheckUtils]: 58: Hoare triple {14169#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14134#true} is VALID [2022-04-07 17:16:45,839 INFO L290 TraceCheckUtils]: 57: Hoare triple {14169#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14169#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:16:45,840 INFO L290 TraceCheckUtils]: 56: Hoare triple {14164#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14169#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:16:45,840 INFO L290 TraceCheckUtils]: 55: Hoare triple {14164#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14164#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:16:45,840 INFO L284 TraceCheckUtils]: 54: Hoare quadruple {14134#true} {14164#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14164#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:16:45,841 INFO L290 TraceCheckUtils]: 53: Hoare triple {14134#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-07 17:16:45,841 INFO L290 TraceCheckUtils]: 52: Hoare triple {14134#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-07 17:16:45,841 INFO L290 TraceCheckUtils]: 51: Hoare triple {14134#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14134#true} is VALID [2022-04-07 17:16:45,841 INFO L272 TraceCheckUtils]: 50: Hoare triple {14164#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14134#true} is VALID [2022-04-07 17:16:45,841 INFO L290 TraceCheckUtils]: 49: Hoare triple {14164#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14164#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:16:45,842 INFO L290 TraceCheckUtils]: 48: Hoare triple {14159#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14164#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:16:45,842 INFO L290 TraceCheckUtils]: 47: Hoare triple {14159#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14159#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 17:16:45,842 INFO L284 TraceCheckUtils]: 46: Hoare quadruple {14134#true} {14159#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14159#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 17:16:45,843 INFO L290 TraceCheckUtils]: 45: Hoare triple {14134#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-07 17:16:45,843 INFO L290 TraceCheckUtils]: 44: Hoare triple {14134#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-07 17:16:45,843 INFO L290 TraceCheckUtils]: 43: Hoare triple {14134#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14134#true} is VALID [2022-04-07 17:16:45,843 INFO L272 TraceCheckUtils]: 42: Hoare triple {14159#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14134#true} is VALID [2022-04-07 17:16:45,843 INFO L290 TraceCheckUtils]: 41: Hoare triple {14159#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14159#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 17:16:45,844 INFO L290 TraceCheckUtils]: 40: Hoare triple {14154#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14159#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 17:16:45,844 INFO L290 TraceCheckUtils]: 39: Hoare triple {14154#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14154#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 17:16:45,845 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {14134#true} {14154#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14154#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 17:16:45,845 INFO L290 TraceCheckUtils]: 37: Hoare triple {14134#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-07 17:16:45,845 INFO L290 TraceCheckUtils]: 36: Hoare triple {14134#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-07 17:16:45,845 INFO L290 TraceCheckUtils]: 35: Hoare triple {14134#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14134#true} is VALID [2022-04-07 17:16:45,845 INFO L272 TraceCheckUtils]: 34: Hoare triple {14154#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14134#true} is VALID [2022-04-07 17:16:45,845 INFO L290 TraceCheckUtils]: 33: Hoare triple {14154#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14154#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 17:16:45,846 INFO L290 TraceCheckUtils]: 32: Hoare triple {14616#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {14154#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 17:16:45,846 INFO L290 TraceCheckUtils]: 31: Hoare triple {14616#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {14616#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-07 17:16:45,846 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {14134#true} {14616#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14616#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-07 17:16:45,847 INFO L290 TraceCheckUtils]: 29: Hoare triple {14134#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-07 17:16:45,847 INFO L290 TraceCheckUtils]: 28: Hoare triple {14134#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-07 17:16:45,847 INFO L290 TraceCheckUtils]: 27: Hoare triple {14134#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14134#true} is VALID [2022-04-07 17:16:45,847 INFO L272 TraceCheckUtils]: 26: Hoare triple {14616#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {14134#true} is VALID [2022-04-07 17:16:45,847 INFO L290 TraceCheckUtils]: 25: Hoare triple {14616#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {14616#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-07 17:16:45,848 INFO L290 TraceCheckUtils]: 24: Hoare triple {14148#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {14616#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-07 17:16:45,848 INFO L290 TraceCheckUtils]: 23: Hoare triple {14148#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {14148#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-07 17:16:45,848 INFO L290 TraceCheckUtils]: 22: Hoare triple {14148#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14148#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-07 17:16:45,849 INFO L290 TraceCheckUtils]: 21: Hoare triple {14146#(and (<= main_~i~0 7) (<= 7 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14148#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-07 17:16:45,849 INFO L290 TraceCheckUtils]: 20: Hoare triple {14145#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14146#(and (<= main_~i~0 7) (<= 7 main_~i~0))} is VALID [2022-04-07 17:16:45,849 INFO L290 TraceCheckUtils]: 19: Hoare triple {14145#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14145#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-07 17:16:45,850 INFO L290 TraceCheckUtils]: 18: Hoare triple {14144#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14145#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-07 17:16:45,850 INFO L290 TraceCheckUtils]: 17: Hoare triple {14144#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14144#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 17:16:45,851 INFO L290 TraceCheckUtils]: 16: Hoare triple {14143#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14144#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 17:16:45,851 INFO L290 TraceCheckUtils]: 15: Hoare triple {14143#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14143#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 17:16:45,851 INFO L290 TraceCheckUtils]: 14: Hoare triple {14142#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14143#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 17:16:45,852 INFO L290 TraceCheckUtils]: 13: Hoare triple {14142#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14142#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 17:16:45,852 INFO L290 TraceCheckUtils]: 12: Hoare triple {14141#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14142#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 17:16:45,853 INFO L290 TraceCheckUtils]: 11: Hoare triple {14141#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14141#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:16:45,853 INFO L290 TraceCheckUtils]: 10: Hoare triple {14140#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14141#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:16:45,853 INFO L290 TraceCheckUtils]: 9: Hoare triple {14140#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14140#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:16:45,854 INFO L290 TraceCheckUtils]: 8: Hoare triple {14139#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {14140#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:16:45,854 INFO L290 TraceCheckUtils]: 7: Hoare triple {14139#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {14139#(= main_~i~0 0)} is VALID [2022-04-07 17:16:45,854 INFO L290 TraceCheckUtils]: 6: Hoare triple {14134#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {14139#(= main_~i~0 0)} is VALID [2022-04-07 17:16:45,855 INFO L290 TraceCheckUtils]: 5: Hoare triple {14134#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {14134#true} is VALID [2022-04-07 17:16:45,855 INFO L272 TraceCheckUtils]: 4: Hoare triple {14134#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-07 17:16:45,855 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14134#true} {14134#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-07 17:16:45,855 INFO L290 TraceCheckUtils]: 2: Hoare triple {14134#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-07 17:16:45,855 INFO L290 TraceCheckUtils]: 1: Hoare triple {14134#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {14134#true} is VALID [2022-04-07 17:16:45,855 INFO L272 TraceCheckUtils]: 0: Hoare triple {14134#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14134#true} is VALID [2022-04-07 17:16:45,855 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 14 proven. 162 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2022-04-07 17:16:45,855 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [887058096] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 17:16:45,855 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 17:16:45,855 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 23, 22] total 35 [2022-04-07 17:16:45,856 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2134963781] [2022-04-07 17:16:45,856 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 17:16:45,856 INFO L78 Accepts]: Start accepts. Automaton has has 35 states, 34 states have (on average 2.411764705882353) internal successors, (82), 32 states have internal predecessors, (82), 16 states have call successors, (20), 5 states have call predecessors, (20), 2 states have return successors, (16), 15 states have call predecessors, (16), 15 states have call successors, (16) Word has length 86 [2022-04-07 17:16:45,857 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:16:45,857 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 35 states, 34 states have (on average 2.411764705882353) internal successors, (82), 32 states have internal predecessors, (82), 16 states have call successors, (20), 5 states have call predecessors, (20), 2 states have return successors, (16), 15 states have call predecessors, (16), 15 states have call successors, (16) [2022-04-07 17:16:45,944 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 118 edges. 118 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:16:45,944 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 35 states [2022-04-07 17:16:45,944 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:16:45,945 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2022-04-07 17:16:45,945 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=97, Invalid=1085, Unknown=8, NotChecked=0, Total=1190 [2022-04-07 17:16:45,945 INFO L87 Difference]: Start difference. First operand 89 states and 90 transitions. Second operand has 35 states, 34 states have (on average 2.411764705882353) internal successors, (82), 32 states have internal predecessors, (82), 16 states have call successors, (20), 5 states have call predecessors, (20), 2 states have return successors, (16), 15 states have call predecessors, (16), 15 states have call successors, (16) [2022-04-07 17:16:48,010 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:16:48,010 INFO L93 Difference]: Finished difference Result 156 states and 158 transitions. [2022-04-07 17:16:48,010 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2022-04-07 17:16:48,010 INFO L78 Accepts]: Start accepts. Automaton has has 35 states, 34 states have (on average 2.411764705882353) internal successors, (82), 32 states have internal predecessors, (82), 16 states have call successors, (20), 5 states have call predecessors, (20), 2 states have return successors, (16), 15 states have call predecessors, (16), 15 states have call successors, (16) Word has length 86 [2022-04-07 17:16:48,011 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:16:48,011 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 35 states, 34 states have (on average 2.411764705882353) internal successors, (82), 32 states have internal predecessors, (82), 16 states have call successors, (20), 5 states have call predecessors, (20), 2 states have return successors, (16), 15 states have call predecessors, (16), 15 states have call successors, (16) [2022-04-07 17:16:48,012 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 87 transitions. [2022-04-07 17:16:48,012 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 35 states, 34 states have (on average 2.411764705882353) internal successors, (82), 32 states have internal predecessors, (82), 16 states have call successors, (20), 5 states have call predecessors, (20), 2 states have return successors, (16), 15 states have call predecessors, (16), 15 states have call successors, (16) [2022-04-07 17:16:48,014 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 87 transitions. [2022-04-07 17:16:48,014 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 33 states and 87 transitions. [2022-04-07 17:16:48,101 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 87 edges. 87 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:16:48,104 INFO L225 Difference]: With dead ends: 156 [2022-04-07 17:16:48,104 INFO L226 Difference]: Without dead ends: 156 [2022-04-07 17:16:48,105 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 242 GetRequests, 168 SyntacticMatches, 18 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 711 ImplicationChecksByTransitivity, 85.9s TimeCoverageRelationStatistics Valid=250, Invalid=3048, Unknown=8, NotChecked=0, Total=3306 [2022-04-07 17:16:48,106 INFO L913 BasicCegarLoop]: 33 mSDtfsCounter, 77 mSDsluCounter, 234 mSDsCounter, 0 mSdLazyCounter, 1187 mSolverCounterSat, 25 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 78 SdHoareTripleChecker+Valid, 267 SdHoareTripleChecker+Invalid, 1329 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 25 IncrementalHoareTripleChecker+Valid, 1187 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 117 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2022-04-07 17:16:48,107 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [78 Valid, 267 Invalid, 1329 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [25 Valid, 1187 Invalid, 0 Unknown, 117 Unchecked, 0.9s Time] [2022-04-07 17:16:48,107 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 156 states. [2022-04-07 17:16:48,111 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 156 to 100. [2022-04-07 17:16:48,111 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:16:48,111 INFO L82 GeneralOperation]: Start isEquivalent. First operand 156 states. Second operand has 100 states, 78 states have (on average 1.0384615384615385) internal successors, (81), 79 states have internal predecessors, (81), 11 states have call successors, (11), 11 states have call predecessors, (11), 10 states have return successors, (10), 9 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-07 17:16:48,111 INFO L74 IsIncluded]: Start isIncluded. First operand 156 states. Second operand has 100 states, 78 states have (on average 1.0384615384615385) internal successors, (81), 79 states have internal predecessors, (81), 11 states have call successors, (11), 11 states have call predecessors, (11), 10 states have return successors, (10), 9 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-07 17:16:48,111 INFO L87 Difference]: Start difference. First operand 156 states. Second operand has 100 states, 78 states have (on average 1.0384615384615385) internal successors, (81), 79 states have internal predecessors, (81), 11 states have call successors, (11), 11 states have call predecessors, (11), 10 states have return successors, (10), 9 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-07 17:16:48,114 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:16:48,114 INFO L93 Difference]: Finished difference Result 156 states and 158 transitions. [2022-04-07 17:16:48,114 INFO L276 IsEmpty]: Start isEmpty. Operand 156 states and 158 transitions. [2022-04-07 17:16:48,114 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:16:48,114 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:16:48,115 INFO L74 IsIncluded]: Start isIncluded. First operand has 100 states, 78 states have (on average 1.0384615384615385) internal successors, (81), 79 states have internal predecessors, (81), 11 states have call successors, (11), 11 states have call predecessors, (11), 10 states have return successors, (10), 9 states have call predecessors, (10), 10 states have call successors, (10) Second operand 156 states. [2022-04-07 17:16:48,115 INFO L87 Difference]: Start difference. First operand has 100 states, 78 states have (on average 1.0384615384615385) internal successors, (81), 79 states have internal predecessors, (81), 11 states have call successors, (11), 11 states have call predecessors, (11), 10 states have return successors, (10), 9 states have call predecessors, (10), 10 states have call successors, (10) Second operand 156 states. [2022-04-07 17:16:48,117 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:16:48,117 INFO L93 Difference]: Finished difference Result 156 states and 158 transitions. [2022-04-07 17:16:48,117 INFO L276 IsEmpty]: Start isEmpty. Operand 156 states and 158 transitions. [2022-04-07 17:16:48,118 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:16:48,118 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:16:48,118 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:16:48,118 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:16:48,118 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 100 states, 78 states have (on average 1.0384615384615385) internal successors, (81), 79 states have internal predecessors, (81), 11 states have call successors, (11), 11 states have call predecessors, (11), 10 states have return successors, (10), 9 states have call predecessors, (10), 10 states have call successors, (10) [2022-04-07 17:16:48,119 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100 states to 100 states and 102 transitions. [2022-04-07 17:16:48,119 INFO L78 Accepts]: Start accepts. Automaton has 100 states and 102 transitions. Word has length 86 [2022-04-07 17:16:48,120 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:16:48,120 INFO L478 AbstractCegarLoop]: Abstraction has 100 states and 102 transitions. [2022-04-07 17:16:48,120 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 35 states, 34 states have (on average 2.411764705882353) internal successors, (82), 32 states have internal predecessors, (82), 16 states have call successors, (20), 5 states have call predecessors, (20), 2 states have return successors, (16), 15 states have call predecessors, (16), 15 states have call successors, (16) [2022-04-07 17:16:48,120 INFO L276 IsEmpty]: Start isEmpty. Operand 100 states and 102 transitions. [2022-04-07 17:16:48,120 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2022-04-07 17:16:48,121 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:16:48,121 INFO L499 BasicCegarLoop]: trace histogram [9, 9, 8, 8, 8, 7, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:16:48,145 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Forceful destruction successful, exit code 0 [2022-04-07 17:16:48,321 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 21 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable21 [2022-04-07 17:16:48,321 INFO L403 AbstractCegarLoop]: === Iteration 23 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:16:48,322 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:16:48,322 INFO L85 PathProgramCache]: Analyzing trace with hash 1942284719, now seen corresponding path program 20 times [2022-04-07 17:16:48,322 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:16:48,322 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1550148121] [2022-04-07 17:16:48,322 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:16:48,322 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:16:48,344 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:16:48,721 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:16:48,723 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:16:48,725 INFO L290 TraceCheckUtils]: 0: Hoare triple {15393#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {15338#true} is VALID [2022-04-07 17:16:48,725 INFO L290 TraceCheckUtils]: 1: Hoare triple {15338#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-07 17:16:48,725 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {15338#true} {15338#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-07 17:16:48,725 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 28 [2022-04-07 17:16:48,726 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:16:48,728 INFO L290 TraceCheckUtils]: 0: Hoare triple {15338#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15338#true} is VALID [2022-04-07 17:16:48,728 INFO L290 TraceCheckUtils]: 1: Hoare triple {15338#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-07 17:16:48,728 INFO L290 TraceCheckUtils]: 2: Hoare triple {15338#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-07 17:16:48,729 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15338#true} {15354#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15354#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:16:48,729 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 36 [2022-04-07 17:16:48,730 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:16:48,732 INFO L290 TraceCheckUtils]: 0: Hoare triple {15338#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15338#true} is VALID [2022-04-07 17:16:48,732 INFO L290 TraceCheckUtils]: 1: Hoare triple {15338#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-07 17:16:48,732 INFO L290 TraceCheckUtils]: 2: Hoare triple {15338#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-07 17:16:48,733 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15338#true} {15359#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15359#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 17:16:48,733 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 44 [2022-04-07 17:16:48,734 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:16:48,736 INFO L290 TraceCheckUtils]: 0: Hoare triple {15338#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15338#true} is VALID [2022-04-07 17:16:48,736 INFO L290 TraceCheckUtils]: 1: Hoare triple {15338#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-07 17:16:48,736 INFO L290 TraceCheckUtils]: 2: Hoare triple {15338#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-07 17:16:48,737 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15338#true} {15364#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15364#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 17:16:48,737 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 52 [2022-04-07 17:16:48,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:16:48,740 INFO L290 TraceCheckUtils]: 0: Hoare triple {15338#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15338#true} is VALID [2022-04-07 17:16:48,740 INFO L290 TraceCheckUtils]: 1: Hoare triple {15338#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-07 17:16:48,740 INFO L290 TraceCheckUtils]: 2: Hoare triple {15338#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-07 17:16:48,741 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15338#true} {15369#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15369#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:16:48,741 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 60 [2022-04-07 17:16:48,742 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:16:48,744 INFO L290 TraceCheckUtils]: 0: Hoare triple {15338#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15338#true} is VALID [2022-04-07 17:16:48,744 INFO L290 TraceCheckUtils]: 1: Hoare triple {15338#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-07 17:16:48,744 INFO L290 TraceCheckUtils]: 2: Hoare triple {15338#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-07 17:16:48,745 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15338#true} {15374#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15374#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:16:48,746 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 68 [2022-04-07 17:16:48,746 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:16:48,749 INFO L290 TraceCheckUtils]: 0: Hoare triple {15338#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15338#true} is VALID [2022-04-07 17:16:48,749 INFO L290 TraceCheckUtils]: 1: Hoare triple {15338#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-07 17:16:48,749 INFO L290 TraceCheckUtils]: 2: Hoare triple {15338#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-07 17:16:48,750 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15338#true} {15379#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15379#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:16:48,750 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 76 [2022-04-07 17:16:48,751 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:16:48,754 INFO L290 TraceCheckUtils]: 0: Hoare triple {15338#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15338#true} is VALID [2022-04-07 17:16:48,755 INFO L290 TraceCheckUtils]: 1: Hoare triple {15338#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-07 17:16:48,755 INFO L290 TraceCheckUtils]: 2: Hoare triple {15338#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-07 17:16:48,755 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15338#true} {15384#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15384#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:16:48,756 INFO L272 TraceCheckUtils]: 0: Hoare triple {15338#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15393#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:16:48,756 INFO L290 TraceCheckUtils]: 1: Hoare triple {15393#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {15338#true} is VALID [2022-04-07 17:16:48,756 INFO L290 TraceCheckUtils]: 2: Hoare triple {15338#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-07 17:16:48,756 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15338#true} {15338#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-07 17:16:48,756 INFO L272 TraceCheckUtils]: 4: Hoare triple {15338#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-07 17:16:48,756 INFO L290 TraceCheckUtils]: 5: Hoare triple {15338#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {15338#true} is VALID [2022-04-07 17:16:48,757 INFO L290 TraceCheckUtils]: 6: Hoare triple {15338#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {15343#(= main_~i~0 0)} is VALID [2022-04-07 17:16:48,757 INFO L290 TraceCheckUtils]: 7: Hoare triple {15343#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15343#(= main_~i~0 0)} is VALID [2022-04-07 17:16:48,758 INFO L290 TraceCheckUtils]: 8: Hoare triple {15343#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15344#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:16:48,758 INFO L290 TraceCheckUtils]: 9: Hoare triple {15344#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15344#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:16:48,759 INFO L290 TraceCheckUtils]: 10: Hoare triple {15344#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15345#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:16:48,759 INFO L290 TraceCheckUtils]: 11: Hoare triple {15345#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15345#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:16:48,760 INFO L290 TraceCheckUtils]: 12: Hoare triple {15345#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15346#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 17:16:48,760 INFO L290 TraceCheckUtils]: 13: Hoare triple {15346#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15346#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 17:16:48,761 INFO L290 TraceCheckUtils]: 14: Hoare triple {15346#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15347#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 17:16:48,761 INFO L290 TraceCheckUtils]: 15: Hoare triple {15347#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15347#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 17:16:48,762 INFO L290 TraceCheckUtils]: 16: Hoare triple {15347#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15348#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 17:16:48,762 INFO L290 TraceCheckUtils]: 17: Hoare triple {15348#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15348#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 17:16:48,763 INFO L290 TraceCheckUtils]: 18: Hoare triple {15348#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15349#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-07 17:16:48,764 INFO L290 TraceCheckUtils]: 19: Hoare triple {15349#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15349#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-07 17:16:48,764 INFO L290 TraceCheckUtils]: 20: Hoare triple {15349#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15350#(and (<= main_~i~0 7) (<= 7 main_~i~0))} is VALID [2022-04-07 17:16:48,765 INFO L290 TraceCheckUtils]: 21: Hoare triple {15350#(and (<= main_~i~0 7) (<= 7 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15351#(and (<= main_~i~0 7) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 7 main_~i~0))} is VALID [2022-04-07 17:16:48,766 INFO L290 TraceCheckUtils]: 22: Hoare triple {15351#(and (<= main_~i~0 7) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 7 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15352#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (not (= (+ main_~x~0.offset 28) (+ main_~x~0.offset (* main_~i~0 4)))))} is VALID [2022-04-07 17:16:48,766 INFO L290 TraceCheckUtils]: 23: Hoare triple {15352#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (not (= (+ main_~x~0.offset 28) (+ main_~x~0.offset (* main_~i~0 4)))))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15353#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-07 17:16:48,767 INFO L290 TraceCheckUtils]: 24: Hoare triple {15353#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15353#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-07 17:16:48,767 INFO L290 TraceCheckUtils]: 25: Hoare triple {15353#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {15353#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-07 17:16:48,767 INFO L290 TraceCheckUtils]: 26: Hoare triple {15353#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {15354#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:16:48,768 INFO L290 TraceCheckUtils]: 27: Hoare triple {15354#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15354#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:16:48,768 INFO L272 TraceCheckUtils]: 28: Hoare triple {15354#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15338#true} is VALID [2022-04-07 17:16:48,768 INFO L290 TraceCheckUtils]: 29: Hoare triple {15338#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15338#true} is VALID [2022-04-07 17:16:48,768 INFO L290 TraceCheckUtils]: 30: Hoare triple {15338#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-07 17:16:48,768 INFO L290 TraceCheckUtils]: 31: Hoare triple {15338#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-07 17:16:48,769 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {15338#true} {15354#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15354#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:16:48,769 INFO L290 TraceCheckUtils]: 33: Hoare triple {15354#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15354#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:16:48,770 INFO L290 TraceCheckUtils]: 34: Hoare triple {15354#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15359#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 17:16:48,770 INFO L290 TraceCheckUtils]: 35: Hoare triple {15359#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15359#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 17:16:48,770 INFO L272 TraceCheckUtils]: 36: Hoare triple {15359#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15338#true} is VALID [2022-04-07 17:16:48,770 INFO L290 TraceCheckUtils]: 37: Hoare triple {15338#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15338#true} is VALID [2022-04-07 17:16:48,770 INFO L290 TraceCheckUtils]: 38: Hoare triple {15338#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-07 17:16:48,771 INFO L290 TraceCheckUtils]: 39: Hoare triple {15338#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-07 17:16:48,771 INFO L284 TraceCheckUtils]: 40: Hoare quadruple {15338#true} {15359#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15359#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 17:16:48,771 INFO L290 TraceCheckUtils]: 41: Hoare triple {15359#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15359#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 17:16:48,772 INFO L290 TraceCheckUtils]: 42: Hoare triple {15359#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15364#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 17:16:48,773 INFO L290 TraceCheckUtils]: 43: Hoare triple {15364#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15364#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 17:16:48,773 INFO L272 TraceCheckUtils]: 44: Hoare triple {15364#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15338#true} is VALID [2022-04-07 17:16:48,773 INFO L290 TraceCheckUtils]: 45: Hoare triple {15338#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15338#true} is VALID [2022-04-07 17:16:48,773 INFO L290 TraceCheckUtils]: 46: Hoare triple {15338#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-07 17:16:48,773 INFO L290 TraceCheckUtils]: 47: Hoare triple {15338#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-07 17:16:48,774 INFO L284 TraceCheckUtils]: 48: Hoare quadruple {15338#true} {15364#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15364#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 17:16:48,774 INFO L290 TraceCheckUtils]: 49: Hoare triple {15364#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15364#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 17:16:48,775 INFO L290 TraceCheckUtils]: 50: Hoare triple {15364#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15369#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:16:48,775 INFO L290 TraceCheckUtils]: 51: Hoare triple {15369#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15369#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:16:48,775 INFO L272 TraceCheckUtils]: 52: Hoare triple {15369#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15338#true} is VALID [2022-04-07 17:16:48,775 INFO L290 TraceCheckUtils]: 53: Hoare triple {15338#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15338#true} is VALID [2022-04-07 17:16:48,775 INFO L290 TraceCheckUtils]: 54: Hoare triple {15338#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-07 17:16:48,775 INFO L290 TraceCheckUtils]: 55: Hoare triple {15338#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-07 17:16:48,776 INFO L284 TraceCheckUtils]: 56: Hoare quadruple {15338#true} {15369#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15369#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:16:48,776 INFO L290 TraceCheckUtils]: 57: Hoare triple {15369#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15369#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:16:48,777 INFO L290 TraceCheckUtils]: 58: Hoare triple {15369#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15374#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:16:48,777 INFO L290 TraceCheckUtils]: 59: Hoare triple {15374#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15374#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:16:48,778 INFO L272 TraceCheckUtils]: 60: Hoare triple {15374#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15338#true} is VALID [2022-04-07 17:16:48,778 INFO L290 TraceCheckUtils]: 61: Hoare triple {15338#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15338#true} is VALID [2022-04-07 17:16:48,778 INFO L290 TraceCheckUtils]: 62: Hoare triple {15338#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-07 17:16:48,778 INFO L290 TraceCheckUtils]: 63: Hoare triple {15338#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-07 17:16:48,778 INFO L284 TraceCheckUtils]: 64: Hoare quadruple {15338#true} {15374#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15374#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:16:48,779 INFO L290 TraceCheckUtils]: 65: Hoare triple {15374#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15374#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:16:48,779 INFO L290 TraceCheckUtils]: 66: Hoare triple {15374#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15379#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:16:48,780 INFO L290 TraceCheckUtils]: 67: Hoare triple {15379#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15379#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:16:48,780 INFO L272 TraceCheckUtils]: 68: Hoare triple {15379#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15338#true} is VALID [2022-04-07 17:16:48,780 INFO L290 TraceCheckUtils]: 69: Hoare triple {15338#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15338#true} is VALID [2022-04-07 17:16:48,780 INFO L290 TraceCheckUtils]: 70: Hoare triple {15338#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-07 17:16:48,780 INFO L290 TraceCheckUtils]: 71: Hoare triple {15338#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-07 17:16:48,781 INFO L284 TraceCheckUtils]: 72: Hoare quadruple {15338#true} {15379#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15379#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:16:48,781 INFO L290 TraceCheckUtils]: 73: Hoare triple {15379#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15379#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:16:48,782 INFO L290 TraceCheckUtils]: 74: Hoare triple {15379#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15384#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:16:48,782 INFO L290 TraceCheckUtils]: 75: Hoare triple {15384#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15384#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:16:48,782 INFO L272 TraceCheckUtils]: 76: Hoare triple {15384#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15338#true} is VALID [2022-04-07 17:16:48,782 INFO L290 TraceCheckUtils]: 77: Hoare triple {15338#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15338#true} is VALID [2022-04-07 17:16:48,783 INFO L290 TraceCheckUtils]: 78: Hoare triple {15338#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-07 17:16:48,783 INFO L290 TraceCheckUtils]: 79: Hoare triple {15338#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-07 17:16:48,783 INFO L284 TraceCheckUtils]: 80: Hoare quadruple {15338#true} {15384#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15384#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:16:48,784 INFO L290 TraceCheckUtils]: 81: Hoare triple {15384#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15384#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:16:48,784 INFO L290 TraceCheckUtils]: 82: Hoare triple {15384#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15389#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:16:48,785 INFO L290 TraceCheckUtils]: 83: Hoare triple {15389#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15390#(= |main_#t~mem5| 0)} is VALID [2022-04-07 17:16:48,785 INFO L272 TraceCheckUtils]: 84: Hoare triple {15390#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15391#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:16:48,785 INFO L290 TraceCheckUtils]: 85: Hoare triple {15391#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15392#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:16:48,786 INFO L290 TraceCheckUtils]: 86: Hoare triple {15392#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {15339#false} is VALID [2022-04-07 17:16:48,786 INFO L290 TraceCheckUtils]: 87: Hoare triple {15339#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15339#false} is VALID [2022-04-07 17:16:48,786 INFO L134 CoverageAnalysis]: Checked inductivity of 277 backedges. 14 proven. 179 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2022-04-07 17:16:48,787 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:16:48,787 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1550148121] [2022-04-07 17:16:48,787 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1550148121] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:16:48,787 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1865232198] [2022-04-07 17:16:48,787 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-07 17:16:48,787 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:16:48,787 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:16:48,788 INFO L229 MonitoredProcess]: Starting monitored process 22 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:16:48,789 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Waiting until timeout for monitored process [2022-04-07 17:16:48,880 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-07 17:16:48,880 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 17:16:48,882 INFO L263 TraceCheckSpWp]: Trace formula consists of 242 conjuncts, 44 conjunts are in the unsatisfiable core [2022-04-07 17:16:48,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:16:48,900 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:16:49,051 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-07 17:16:49,270 INFO L356 Elim1Store]: treesize reduction 37, result has 22.9 percent of original size [2022-04-07 17:16:49,271 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 27 treesize of output 26 [2022-04-07 17:18:18,604 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2022-04-07 17:18:18,661 INFO L272 TraceCheckUtils]: 0: Hoare triple {15338#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-07 17:18:18,662 INFO L290 TraceCheckUtils]: 1: Hoare triple {15338#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {15338#true} is VALID [2022-04-07 17:18:18,662 INFO L290 TraceCheckUtils]: 2: Hoare triple {15338#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-07 17:18:18,662 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15338#true} {15338#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-07 17:18:18,662 INFO L272 TraceCheckUtils]: 4: Hoare triple {15338#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-07 17:18:18,662 INFO L290 TraceCheckUtils]: 5: Hoare triple {15338#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {15338#true} is VALID [2022-04-07 17:18:18,662 INFO L290 TraceCheckUtils]: 6: Hoare triple {15338#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {15343#(= main_~i~0 0)} is VALID [2022-04-07 17:18:18,662 INFO L290 TraceCheckUtils]: 7: Hoare triple {15343#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15343#(= main_~i~0 0)} is VALID [2022-04-07 17:18:18,663 INFO L290 TraceCheckUtils]: 8: Hoare triple {15343#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15344#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:18:18,663 INFO L290 TraceCheckUtils]: 9: Hoare triple {15344#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15344#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:18:18,664 INFO L290 TraceCheckUtils]: 10: Hoare triple {15344#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15345#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:18:18,664 INFO L290 TraceCheckUtils]: 11: Hoare triple {15345#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15345#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:18:18,664 INFO L290 TraceCheckUtils]: 12: Hoare triple {15345#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15346#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 17:18:18,665 INFO L290 TraceCheckUtils]: 13: Hoare triple {15346#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15346#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 17:18:18,665 INFO L290 TraceCheckUtils]: 14: Hoare triple {15346#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15347#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 17:18:18,666 INFO L290 TraceCheckUtils]: 15: Hoare triple {15347#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15347#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 17:18:18,666 INFO L290 TraceCheckUtils]: 16: Hoare triple {15347#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15348#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 17:18:18,666 INFO L290 TraceCheckUtils]: 17: Hoare triple {15348#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15348#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 17:18:18,667 INFO L290 TraceCheckUtils]: 18: Hoare triple {15348#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15349#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-07 17:18:18,667 INFO L290 TraceCheckUtils]: 19: Hoare triple {15349#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15349#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-07 17:18:18,668 INFO L290 TraceCheckUtils]: 20: Hoare triple {15349#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15350#(and (<= main_~i~0 7) (<= 7 main_~i~0))} is VALID [2022-04-07 17:18:18,668 INFO L290 TraceCheckUtils]: 21: Hoare triple {15350#(and (<= main_~i~0 7) (<= 7 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15351#(and (<= main_~i~0 7) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 7 main_~i~0))} is VALID [2022-04-07 17:18:18,669 INFO L290 TraceCheckUtils]: 22: Hoare triple {15351#(and (<= main_~i~0 7) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 7 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15463#(exists ((v_main_~i~0_213 Int)) (and (<= (+ v_main_~i~0_213 1) main_~i~0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_213))) 0) (<= v_main_~i~0_213 7) (<= 7 v_main_~i~0_213)))} is VALID [2022-04-07 17:18:18,670 INFO L290 TraceCheckUtils]: 23: Hoare triple {15463#(exists ((v_main_~i~0_213 Int)) (and (<= (+ v_main_~i~0_213 1) main_~i~0) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* 4 v_main_~i~0_213))) 0) (<= v_main_~i~0_213 7) (<= 7 v_main_~i~0_213)))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15353#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-07 17:18:18,670 INFO L290 TraceCheckUtils]: 24: Hoare triple {15353#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15353#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-07 17:18:18,671 INFO L290 TraceCheckUtils]: 25: Hoare triple {15353#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {15353#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-07 17:18:18,671 INFO L290 TraceCheckUtils]: 26: Hoare triple {15353#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {15354#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:18:18,671 INFO L290 TraceCheckUtils]: 27: Hoare triple {15354#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15354#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:18:18,672 INFO L272 TraceCheckUtils]: 28: Hoare triple {15354#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} is VALID [2022-04-07 17:18:18,675 INFO L290 TraceCheckUtils]: 29: Hoare triple {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} is VALID [2022-04-07 17:18:18,676 INFO L290 TraceCheckUtils]: 30: Hoare triple {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} is VALID [2022-04-07 17:18:18,676 INFO L290 TraceCheckUtils]: 31: Hoare triple {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} is VALID [2022-04-07 17:18:18,677 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} {15354#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15354#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:18:18,677 INFO L290 TraceCheckUtils]: 33: Hoare triple {15354#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15354#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:18:18,678 INFO L290 TraceCheckUtils]: 34: Hoare triple {15354#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15501#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 17:18:18,678 INFO L290 TraceCheckUtils]: 35: Hoare triple {15501#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ (- 1) main_~i~1)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15501#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 17:18:18,680 INFO L272 TraceCheckUtils]: 36: Hoare triple {15501#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ (- 1) main_~i~1)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} is VALID [2022-04-07 17:18:18,680 INFO L290 TraceCheckUtils]: 37: Hoare triple {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} is VALID [2022-04-07 17:18:18,680 INFO L290 TraceCheckUtils]: 38: Hoare triple {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} is VALID [2022-04-07 17:18:18,680 INFO L290 TraceCheckUtils]: 39: Hoare triple {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} is VALID [2022-04-07 17:18:18,681 INFO L284 TraceCheckUtils]: 40: Hoare quadruple {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} {15501#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ (- 1) main_~i~1)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15501#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 17:18:18,681 INFO L290 TraceCheckUtils]: 41: Hoare triple {15501#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ (- 1) main_~i~1)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15501#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 17:18:18,682 INFO L290 TraceCheckUtils]: 42: Hoare triple {15501#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ (- 1) main_~i~1)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15526#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 2))} is VALID [2022-04-07 17:18:18,682 INFO L290 TraceCheckUtils]: 43: Hoare triple {15526#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 2))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15526#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 2))} is VALID [2022-04-07 17:18:18,683 INFO L272 TraceCheckUtils]: 44: Hoare triple {15526#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 2))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} is VALID [2022-04-07 17:18:18,683 INFO L290 TraceCheckUtils]: 45: Hoare triple {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} is VALID [2022-04-07 17:18:18,684 INFO L290 TraceCheckUtils]: 46: Hoare triple {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} is VALID [2022-04-07 17:18:18,684 INFO L290 TraceCheckUtils]: 47: Hoare triple {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} is VALID [2022-04-07 17:18:18,687 INFO L284 TraceCheckUtils]: 48: Hoare quadruple {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} {15526#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15526#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 2))} is VALID [2022-04-07 17:18:18,687 INFO L290 TraceCheckUtils]: 49: Hoare triple {15526#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 2))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15526#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 2))} is VALID [2022-04-07 17:18:18,687 INFO L290 TraceCheckUtils]: 50: Hoare triple {15526#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 2))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15551#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 2 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 17:18:18,688 INFO L290 TraceCheckUtils]: 51: Hoare triple {15551#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 2 (+ (- 1) main_~i~1)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15551#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 2 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 17:18:18,689 INFO L272 TraceCheckUtils]: 52: Hoare triple {15551#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 2 (+ (- 1) main_~i~1)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} is VALID [2022-04-07 17:18:18,689 INFO L290 TraceCheckUtils]: 53: Hoare triple {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} is VALID [2022-04-07 17:18:18,689 INFO L290 TraceCheckUtils]: 54: Hoare triple {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} is VALID [2022-04-07 17:18:18,689 INFO L290 TraceCheckUtils]: 55: Hoare triple {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} is VALID [2022-04-07 17:18:18,690 INFO L284 TraceCheckUtils]: 56: Hoare quadruple {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} {15551#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 2 (+ (- 1) main_~i~1)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15551#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 2 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 17:18:18,690 INFO L290 TraceCheckUtils]: 57: Hoare triple {15551#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 2 (+ (- 1) main_~i~1)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15551#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 2 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 17:18:18,691 INFO L290 TraceCheckUtils]: 58: Hoare triple {15551#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 2 (+ (- 1) main_~i~1)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15576#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 2))} is VALID [2022-04-07 17:18:18,691 INFO L290 TraceCheckUtils]: 59: Hoare triple {15576#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 2))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15576#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 2))} is VALID [2022-04-07 17:18:18,692 INFO L272 TraceCheckUtils]: 60: Hoare triple {15576#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 2))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} is VALID [2022-04-07 17:18:18,692 INFO L290 TraceCheckUtils]: 61: Hoare triple {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} is VALID [2022-04-07 17:18:18,693 INFO L290 TraceCheckUtils]: 62: Hoare triple {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} is VALID [2022-04-07 17:18:18,693 INFO L290 TraceCheckUtils]: 63: Hoare triple {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} is VALID [2022-04-07 17:18:18,693 INFO L284 TraceCheckUtils]: 64: Hoare quadruple {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} {15576#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15576#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 2))} is VALID [2022-04-07 17:18:18,694 INFO L290 TraceCheckUtils]: 65: Hoare triple {15576#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 2))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15576#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 2))} is VALID [2022-04-07 17:18:18,694 INFO L290 TraceCheckUtils]: 66: Hoare triple {15576#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 2))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15601#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ main_~i~1 (- 3)) 2))} is VALID [2022-04-07 17:18:18,694 INFO L290 TraceCheckUtils]: 67: Hoare triple {15601#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ main_~i~1 (- 3)) 2))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15601#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ main_~i~1 (- 3)) 2))} is VALID [2022-04-07 17:18:18,695 INFO L272 TraceCheckUtils]: 68: Hoare triple {15601#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ main_~i~1 (- 3)) 2))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} is VALID [2022-04-07 17:18:18,696 INFO L290 TraceCheckUtils]: 69: Hoare triple {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} is VALID [2022-04-07 17:18:18,696 INFO L290 TraceCheckUtils]: 70: Hoare triple {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} is VALID [2022-04-07 17:18:18,696 INFO L290 TraceCheckUtils]: 71: Hoare triple {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} is VALID [2022-04-07 17:18:18,697 INFO L284 TraceCheckUtils]: 72: Hoare quadruple {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} {15601#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ main_~i~1 (- 3)) 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15601#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ main_~i~1 (- 3)) 2))} is VALID [2022-04-07 17:18:18,697 INFO L290 TraceCheckUtils]: 73: Hoare triple {15601#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ main_~i~1 (- 3)) 2))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15601#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ main_~i~1 (- 3)) 2))} is VALID [2022-04-07 17:18:18,697 INFO L290 TraceCheckUtils]: 74: Hoare triple {15601#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ main_~i~1 (- 3)) 2))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15626#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 6))} is VALID [2022-04-07 17:18:18,698 INFO L290 TraceCheckUtils]: 75: Hoare triple {15626#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 6))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15626#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 6))} is VALID [2022-04-07 17:18:18,699 INFO L272 TraceCheckUtils]: 76: Hoare triple {15626#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 6))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} is VALID [2022-04-07 17:18:18,699 INFO L290 TraceCheckUtils]: 77: Hoare triple {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} is VALID [2022-04-07 17:18:18,699 INFO L290 TraceCheckUtils]: 78: Hoare triple {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} is VALID [2022-04-07 17:18:18,699 INFO L290 TraceCheckUtils]: 79: Hoare triple {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} is VALID [2022-04-07 17:18:18,700 INFO L284 TraceCheckUtils]: 80: Hoare quadruple {15482#(exists ((v_main_~x~0.base_BEFORE_CALL_99 Int) (v_main_~x~0.offset_BEFORE_CALL_99 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_99) (+ 28 v_main_~x~0.offset_BEFORE_CALL_99)) 0))} {15626#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 6))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15626#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 6))} is VALID [2022-04-07 17:18:18,700 INFO L290 TraceCheckUtils]: 81: Hoare triple {15626#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 6))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15626#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 6))} is VALID [2022-04-07 17:18:18,701 INFO L290 TraceCheckUtils]: 82: Hoare triple {15626#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 6))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15651#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 6 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 17:18:18,701 INFO L290 TraceCheckUtils]: 83: Hoare triple {15651#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 6 (+ (- 1) main_~i~1)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15390#(= |main_#t~mem5| 0)} is VALID [2022-04-07 17:18:18,702 INFO L272 TraceCheckUtils]: 84: Hoare triple {15390#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15658#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:18:18,702 INFO L290 TraceCheckUtils]: 85: Hoare triple {15658#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15662#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:18:18,702 INFO L290 TraceCheckUtils]: 86: Hoare triple {15662#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {15339#false} is VALID [2022-04-07 17:18:18,702 INFO L290 TraceCheckUtils]: 87: Hoare triple {15339#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15339#false} is VALID [2022-04-07 17:18:18,703 INFO L134 CoverageAnalysis]: Checked inductivity of 277 backedges. 0 proven. 193 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2022-04-07 17:18:18,703 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 17:18:21,117 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2022-04-07 17:18:21,121 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2022-04-07 17:18:21,259 INFO L290 TraceCheckUtils]: 87: Hoare triple {15339#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15339#false} is VALID [2022-04-07 17:18:21,259 INFO L290 TraceCheckUtils]: 86: Hoare triple {15662#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {15339#false} is VALID [2022-04-07 17:18:21,259 INFO L290 TraceCheckUtils]: 85: Hoare triple {15658#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15662#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:18:21,260 INFO L272 TraceCheckUtils]: 84: Hoare triple {15390#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15658#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:18:21,260 INFO L290 TraceCheckUtils]: 83: Hoare triple {15389#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15390#(= |main_#t~mem5| 0)} is VALID [2022-04-07 17:18:21,261 INFO L290 TraceCheckUtils]: 82: Hoare triple {15384#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15389#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:18:21,261 INFO L290 TraceCheckUtils]: 81: Hoare triple {15384#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15384#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:18:21,262 INFO L284 TraceCheckUtils]: 80: Hoare quadruple {15338#true} {15384#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15384#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:18:21,262 INFO L290 TraceCheckUtils]: 79: Hoare triple {15338#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-07 17:18:21,262 INFO L290 TraceCheckUtils]: 78: Hoare triple {15338#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-07 17:18:21,262 INFO L290 TraceCheckUtils]: 77: Hoare triple {15338#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15338#true} is VALID [2022-04-07 17:18:21,262 INFO L272 TraceCheckUtils]: 76: Hoare triple {15384#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15338#true} is VALID [2022-04-07 17:18:21,262 INFO L290 TraceCheckUtils]: 75: Hoare triple {15384#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15384#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:18:21,263 INFO L290 TraceCheckUtils]: 74: Hoare triple {15379#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15384#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:18:21,263 INFO L290 TraceCheckUtils]: 73: Hoare triple {15379#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15379#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:18:21,264 INFO L284 TraceCheckUtils]: 72: Hoare quadruple {15338#true} {15379#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15379#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:18:21,264 INFO L290 TraceCheckUtils]: 71: Hoare triple {15338#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-07 17:18:21,264 INFO L290 TraceCheckUtils]: 70: Hoare triple {15338#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-07 17:18:21,264 INFO L290 TraceCheckUtils]: 69: Hoare triple {15338#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15338#true} is VALID [2022-04-07 17:18:21,264 INFO L272 TraceCheckUtils]: 68: Hoare triple {15379#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15338#true} is VALID [2022-04-07 17:18:21,265 INFO L290 TraceCheckUtils]: 67: Hoare triple {15379#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15379#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:18:21,265 INFO L290 TraceCheckUtils]: 66: Hoare triple {15374#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15379#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:18:21,265 INFO L290 TraceCheckUtils]: 65: Hoare triple {15374#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15374#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:18:21,266 INFO L284 TraceCheckUtils]: 64: Hoare quadruple {15338#true} {15374#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15374#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:18:21,266 INFO L290 TraceCheckUtils]: 63: Hoare triple {15338#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-07 17:18:21,266 INFO L290 TraceCheckUtils]: 62: Hoare triple {15338#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-07 17:18:21,266 INFO L290 TraceCheckUtils]: 61: Hoare triple {15338#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15338#true} is VALID [2022-04-07 17:18:21,266 INFO L272 TraceCheckUtils]: 60: Hoare triple {15374#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15338#true} is VALID [2022-04-07 17:18:21,267 INFO L290 TraceCheckUtils]: 59: Hoare triple {15374#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15374#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:18:21,271 INFO L290 TraceCheckUtils]: 58: Hoare triple {15369#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15374#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:18:21,272 INFO L290 TraceCheckUtils]: 57: Hoare triple {15369#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15369#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:18:21,272 INFO L284 TraceCheckUtils]: 56: Hoare quadruple {15338#true} {15369#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15369#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:18:21,272 INFO L290 TraceCheckUtils]: 55: Hoare triple {15338#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-07 17:18:21,272 INFO L290 TraceCheckUtils]: 54: Hoare triple {15338#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-07 17:18:21,273 INFO L290 TraceCheckUtils]: 53: Hoare triple {15338#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15338#true} is VALID [2022-04-07 17:18:21,273 INFO L272 TraceCheckUtils]: 52: Hoare triple {15369#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15338#true} is VALID [2022-04-07 17:18:21,273 INFO L290 TraceCheckUtils]: 51: Hoare triple {15369#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15369#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:18:21,273 INFO L290 TraceCheckUtils]: 50: Hoare triple {15364#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15369#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:18:21,274 INFO L290 TraceCheckUtils]: 49: Hoare triple {15364#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15364#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 17:18:21,274 INFO L284 TraceCheckUtils]: 48: Hoare quadruple {15338#true} {15364#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15364#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 17:18:21,274 INFO L290 TraceCheckUtils]: 47: Hoare triple {15338#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-07 17:18:21,275 INFO L290 TraceCheckUtils]: 46: Hoare triple {15338#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-07 17:18:21,275 INFO L290 TraceCheckUtils]: 45: Hoare triple {15338#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15338#true} is VALID [2022-04-07 17:18:21,275 INFO L272 TraceCheckUtils]: 44: Hoare triple {15364#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15338#true} is VALID [2022-04-07 17:18:21,275 INFO L290 TraceCheckUtils]: 43: Hoare triple {15364#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15364#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 17:18:21,276 INFO L290 TraceCheckUtils]: 42: Hoare triple {15359#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15364#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 17:18:21,276 INFO L290 TraceCheckUtils]: 41: Hoare triple {15359#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15359#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 17:18:21,276 INFO L284 TraceCheckUtils]: 40: Hoare quadruple {15338#true} {15359#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15359#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 17:18:21,276 INFO L290 TraceCheckUtils]: 39: Hoare triple {15338#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-07 17:18:21,277 INFO L290 TraceCheckUtils]: 38: Hoare triple {15338#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-07 17:18:21,277 INFO L290 TraceCheckUtils]: 37: Hoare triple {15338#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15338#true} is VALID [2022-04-07 17:18:21,277 INFO L272 TraceCheckUtils]: 36: Hoare triple {15359#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15338#true} is VALID [2022-04-07 17:18:21,277 INFO L290 TraceCheckUtils]: 35: Hoare triple {15359#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15359#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 17:18:21,277 INFO L290 TraceCheckUtils]: 34: Hoare triple {15828#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {15359#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 17:18:21,278 INFO L290 TraceCheckUtils]: 33: Hoare triple {15828#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {15828#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-07 17:18:21,278 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {15338#true} {15828#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15828#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-07 17:18:21,278 INFO L290 TraceCheckUtils]: 31: Hoare triple {15338#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-07 17:18:21,278 INFO L290 TraceCheckUtils]: 30: Hoare triple {15338#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-07 17:18:21,279 INFO L290 TraceCheckUtils]: 29: Hoare triple {15338#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15338#true} is VALID [2022-04-07 17:18:21,279 INFO L272 TraceCheckUtils]: 28: Hoare triple {15828#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {15338#true} is VALID [2022-04-07 17:18:21,279 INFO L290 TraceCheckUtils]: 27: Hoare triple {15828#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {15828#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-07 17:18:21,279 INFO L290 TraceCheckUtils]: 26: Hoare triple {15353#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {15828#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-07 17:18:21,280 INFO L290 TraceCheckUtils]: 25: Hoare triple {15353#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {15353#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-07 17:18:21,280 INFO L290 TraceCheckUtils]: 24: Hoare triple {15353#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15353#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-07 17:18:21,280 INFO L290 TraceCheckUtils]: 23: Hoare triple {15352#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (not (= (+ main_~x~0.offset 28) (+ main_~x~0.offset (* main_~i~0 4)))))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15353#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-07 17:18:21,281 INFO L290 TraceCheckUtils]: 22: Hoare triple {15865#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (not (<= main_~i~0 6)))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15352#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (not (= (+ main_~x~0.offset 28) (+ main_~x~0.offset (* main_~i~0 4)))))} is VALID [2022-04-07 17:18:21,281 INFO L290 TraceCheckUtils]: 21: Hoare triple {15350#(and (<= main_~i~0 7) (<= 7 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15865#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (not (<= main_~i~0 6)))} is VALID [2022-04-07 17:18:21,282 INFO L290 TraceCheckUtils]: 20: Hoare triple {15349#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15350#(and (<= main_~i~0 7) (<= 7 main_~i~0))} is VALID [2022-04-07 17:18:21,282 INFO L290 TraceCheckUtils]: 19: Hoare triple {15349#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15349#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-07 17:18:21,283 INFO L290 TraceCheckUtils]: 18: Hoare triple {15348#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15349#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-07 17:18:21,283 INFO L290 TraceCheckUtils]: 17: Hoare triple {15348#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15348#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 17:18:21,283 INFO L290 TraceCheckUtils]: 16: Hoare triple {15347#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15348#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 17:18:21,284 INFO L290 TraceCheckUtils]: 15: Hoare triple {15347#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15347#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 17:18:21,284 INFO L290 TraceCheckUtils]: 14: Hoare triple {15346#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15347#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 17:18:21,285 INFO L290 TraceCheckUtils]: 13: Hoare triple {15346#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15346#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 17:18:21,285 INFO L290 TraceCheckUtils]: 12: Hoare triple {15345#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15346#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 17:18:21,285 INFO L290 TraceCheckUtils]: 11: Hoare triple {15345#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15345#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:18:21,286 INFO L290 TraceCheckUtils]: 10: Hoare triple {15344#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15345#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:18:21,286 INFO L290 TraceCheckUtils]: 9: Hoare triple {15344#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15344#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:18:21,287 INFO L290 TraceCheckUtils]: 8: Hoare triple {15343#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {15344#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:18:21,287 INFO L290 TraceCheckUtils]: 7: Hoare triple {15343#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {15343#(= main_~i~0 0)} is VALID [2022-04-07 17:18:21,287 INFO L290 TraceCheckUtils]: 6: Hoare triple {15338#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {15343#(= main_~i~0 0)} is VALID [2022-04-07 17:18:21,287 INFO L290 TraceCheckUtils]: 5: Hoare triple {15338#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {15338#true} is VALID [2022-04-07 17:18:21,287 INFO L272 TraceCheckUtils]: 4: Hoare triple {15338#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-07 17:18:21,287 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15338#true} {15338#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-07 17:18:21,288 INFO L290 TraceCheckUtils]: 2: Hoare triple {15338#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-07 17:18:21,288 INFO L290 TraceCheckUtils]: 1: Hoare triple {15338#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {15338#true} is VALID [2022-04-07 17:18:21,288 INFO L272 TraceCheckUtils]: 0: Hoare triple {15338#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15338#true} is VALID [2022-04-07 17:18:21,288 INFO L134 CoverageAnalysis]: Checked inductivity of 277 backedges. 14 proven. 179 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2022-04-07 17:18:21,288 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1865232198] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 17:18:21,288 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 17:18:21,288 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 24] total 38 [2022-04-07 17:18:21,288 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1398390238] [2022-04-07 17:18:21,289 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 17:18:21,289 INFO L78 Accepts]: Start accepts. Automaton has has 38 states, 37 states have (on average 2.324324324324324) internal successors, (86), 35 states have internal predecessors, (86), 16 states have call successors, (20), 5 states have call predecessors, (20), 2 states have return successors, (16), 15 states have call predecessors, (16), 15 states have call successors, (16) Word has length 88 [2022-04-07 17:18:21,290 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:18:21,290 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 38 states, 37 states have (on average 2.324324324324324) internal successors, (86), 35 states have internal predecessors, (86), 16 states have call successors, (20), 5 states have call predecessors, (20), 2 states have return successors, (16), 15 states have call predecessors, (16), 15 states have call successors, (16) [2022-04-07 17:18:21,374 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 122 edges. 122 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:18:21,374 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 38 states [2022-04-07 17:18:21,374 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:18:21,374 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2022-04-07 17:18:21,375 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=112, Invalid=1286, Unknown=8, NotChecked=0, Total=1406 [2022-04-07 17:18:21,375 INFO L87 Difference]: Start difference. First operand 100 states and 102 transitions. Second operand has 38 states, 37 states have (on average 2.324324324324324) internal successors, (86), 35 states have internal predecessors, (86), 16 states have call successors, (20), 5 states have call predecessors, (20), 2 states have return successors, (16), 15 states have call predecessors, (16), 15 states have call successors, (16) [2022-04-07 17:18:23,657 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:18:23,657 INFO L93 Difference]: Finished difference Result 201 states and 211 transitions. [2022-04-07 17:18:23,657 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2022-04-07 17:18:23,657 INFO L78 Accepts]: Start accepts. Automaton has has 38 states, 37 states have (on average 2.324324324324324) internal successors, (86), 35 states have internal predecessors, (86), 16 states have call successors, (20), 5 states have call predecessors, (20), 2 states have return successors, (16), 15 states have call predecessors, (16), 15 states have call successors, (16) Word has length 88 [2022-04-07 17:18:23,658 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:18:23,658 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 38 states, 37 states have (on average 2.324324324324324) internal successors, (86), 35 states have internal predecessors, (86), 16 states have call successors, (20), 5 states have call predecessors, (20), 2 states have return successors, (16), 15 states have call predecessors, (16), 15 states have call successors, (16) [2022-04-07 17:18:23,659 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 95 transitions. [2022-04-07 17:18:23,660 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 38 states, 37 states have (on average 2.324324324324324) internal successors, (86), 35 states have internal predecessors, (86), 16 states have call successors, (20), 5 states have call predecessors, (20), 2 states have return successors, (16), 15 states have call predecessors, (16), 15 states have call successors, (16) [2022-04-07 17:18:23,661 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 95 transitions. [2022-04-07 17:18:23,661 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 34 states and 95 transitions. [2022-04-07 17:18:23,764 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 95 edges. 95 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:18:23,768 INFO L225 Difference]: With dead ends: 201 [2022-04-07 17:18:23,768 INFO L226 Difference]: Without dead ends: 201 [2022-04-07 17:18:23,769 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 238 GetRequests, 160 SyntacticMatches, 19 SemanticMatches, 59 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 804 ImplicationChecksByTransitivity, 91.3s TimeCoverageRelationStatistics Valid=271, Invalid=3381, Unknown=8, NotChecked=0, Total=3660 [2022-04-07 17:18:23,769 INFO L913 BasicCegarLoop]: 31 mSDtfsCounter, 53 mSDsluCounter, 291 mSDsCounter, 0 mSdLazyCounter, 1287 mSolverCounterSat, 40 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 54 SdHoareTripleChecker+Valid, 322 SdHoareTripleChecker+Invalid, 1428 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 40 IncrementalHoareTripleChecker+Valid, 1287 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 101 IncrementalHoareTripleChecker+Unchecked, 1.0s IncrementalHoareTripleChecker+Time [2022-04-07 17:18:23,769 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [54 Valid, 322 Invalid, 1428 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [40 Valid, 1287 Invalid, 0 Unknown, 101 Unchecked, 1.0s Time] [2022-04-07 17:18:23,770 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 201 states. [2022-04-07 17:18:23,775 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 201 to 171. [2022-04-07 17:18:23,775 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:18:23,775 INFO L82 GeneralOperation]: Start isEquivalent. First operand 201 states. Second operand has 171 states, 131 states have (on average 1.0305343511450382) internal successors, (135), 134 states have internal predecessors, (135), 23 states have call successors, (23), 17 states have call predecessors, (23), 16 states have return successors, (22), 19 states have call predecessors, (22), 22 states have call successors, (22) [2022-04-07 17:18:23,776 INFO L74 IsIncluded]: Start isIncluded. First operand 201 states. Second operand has 171 states, 131 states have (on average 1.0305343511450382) internal successors, (135), 134 states have internal predecessors, (135), 23 states have call successors, (23), 17 states have call predecessors, (23), 16 states have return successors, (22), 19 states have call predecessors, (22), 22 states have call successors, (22) [2022-04-07 17:18:23,776 INFO L87 Difference]: Start difference. First operand 201 states. Second operand has 171 states, 131 states have (on average 1.0305343511450382) internal successors, (135), 134 states have internal predecessors, (135), 23 states have call successors, (23), 17 states have call predecessors, (23), 16 states have return successors, (22), 19 states have call predecessors, (22), 22 states have call successors, (22) [2022-04-07 17:18:23,779 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:18:23,779 INFO L93 Difference]: Finished difference Result 201 states and 211 transitions. [2022-04-07 17:18:23,780 INFO L276 IsEmpty]: Start isEmpty. Operand 201 states and 211 transitions. [2022-04-07 17:18:23,782 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:18:23,782 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:18:23,782 INFO L74 IsIncluded]: Start isIncluded. First operand has 171 states, 131 states have (on average 1.0305343511450382) internal successors, (135), 134 states have internal predecessors, (135), 23 states have call successors, (23), 17 states have call predecessors, (23), 16 states have return successors, (22), 19 states have call predecessors, (22), 22 states have call successors, (22) Second operand 201 states. [2022-04-07 17:18:23,783 INFO L87 Difference]: Start difference. First operand has 171 states, 131 states have (on average 1.0305343511450382) internal successors, (135), 134 states have internal predecessors, (135), 23 states have call successors, (23), 17 states have call predecessors, (23), 16 states have return successors, (22), 19 states have call predecessors, (22), 22 states have call successors, (22) Second operand 201 states. [2022-04-07 17:18:23,787 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:18:23,787 INFO L93 Difference]: Finished difference Result 201 states and 211 transitions. [2022-04-07 17:18:23,787 INFO L276 IsEmpty]: Start isEmpty. Operand 201 states and 211 transitions. [2022-04-07 17:18:23,788 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:18:23,788 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:18:23,788 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:18:23,788 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:18:23,788 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 171 states, 131 states have (on average 1.0305343511450382) internal successors, (135), 134 states have internal predecessors, (135), 23 states have call successors, (23), 17 states have call predecessors, (23), 16 states have return successors, (22), 19 states have call predecessors, (22), 22 states have call successors, (22) [2022-04-07 17:18:23,790 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 171 states to 171 states and 180 transitions. [2022-04-07 17:18:23,790 INFO L78 Accepts]: Start accepts. Automaton has 171 states and 180 transitions. Word has length 88 [2022-04-07 17:18:23,791 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:18:23,791 INFO L478 AbstractCegarLoop]: Abstraction has 171 states and 180 transitions. [2022-04-07 17:18:23,791 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 38 states, 37 states have (on average 2.324324324324324) internal successors, (86), 35 states have internal predecessors, (86), 16 states have call successors, (20), 5 states have call predecessors, (20), 2 states have return successors, (16), 15 states have call predecessors, (16), 15 states have call successors, (16) [2022-04-07 17:18:23,791 INFO L276 IsEmpty]: Start isEmpty. Operand 171 states and 180 transitions. [2022-04-07 17:18:23,793 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2022-04-07 17:18:23,793 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:18:23,793 INFO L499 BasicCegarLoop]: trace histogram [10, 10, 8, 8, 8, 7, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:18:23,822 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Forceful destruction successful, exit code 0 [2022-04-07 17:18:24,007 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 22 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable22 [2022-04-07 17:18:24,008 INFO L403 AbstractCegarLoop]: === Iteration 24 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:18:24,008 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:18:24,008 INFO L85 PathProgramCache]: Analyzing trace with hash 10078317, now seen corresponding path program 21 times [2022-04-07 17:18:24,008 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:18:24,008 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1756989748] [2022-04-07 17:18:24,008 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:18:24,008 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:18:24,033 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:18:24,454 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:18:24,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:18:24,458 INFO L290 TraceCheckUtils]: 0: Hoare triple {16810#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {16754#true} is VALID [2022-04-07 17:18:24,458 INFO L290 TraceCheckUtils]: 1: Hoare triple {16754#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-07 17:18:24,458 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {16754#true} {16754#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-07 17:18:24,458 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 30 [2022-04-07 17:18:24,459 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:18:24,462 INFO L290 TraceCheckUtils]: 0: Hoare triple {16754#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16754#true} is VALID [2022-04-07 17:18:24,462 INFO L290 TraceCheckUtils]: 1: Hoare triple {16754#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-07 17:18:24,462 INFO L290 TraceCheckUtils]: 2: Hoare triple {16754#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-07 17:18:24,463 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16754#true} {16771#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16771#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:18:24,463 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 38 [2022-04-07 17:18:24,464 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:18:24,466 INFO L290 TraceCheckUtils]: 0: Hoare triple {16754#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16754#true} is VALID [2022-04-07 17:18:24,466 INFO L290 TraceCheckUtils]: 1: Hoare triple {16754#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-07 17:18:24,466 INFO L290 TraceCheckUtils]: 2: Hoare triple {16754#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-07 17:18:24,467 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16754#true} {16776#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16776#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 17:18:24,467 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 46 [2022-04-07 17:18:24,468 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:18:24,470 INFO L290 TraceCheckUtils]: 0: Hoare triple {16754#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16754#true} is VALID [2022-04-07 17:18:24,470 INFO L290 TraceCheckUtils]: 1: Hoare triple {16754#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-07 17:18:24,470 INFO L290 TraceCheckUtils]: 2: Hoare triple {16754#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-07 17:18:24,471 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16754#true} {16781#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16781#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 17:18:24,471 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 54 [2022-04-07 17:18:24,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:18:24,476 INFO L290 TraceCheckUtils]: 0: Hoare triple {16754#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16754#true} is VALID [2022-04-07 17:18:24,476 INFO L290 TraceCheckUtils]: 1: Hoare triple {16754#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-07 17:18:24,476 INFO L290 TraceCheckUtils]: 2: Hoare triple {16754#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-07 17:18:24,477 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16754#true} {16786#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16786#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:18:24,477 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 62 [2022-04-07 17:18:24,478 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:18:24,480 INFO L290 TraceCheckUtils]: 0: Hoare triple {16754#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16754#true} is VALID [2022-04-07 17:18:24,480 INFO L290 TraceCheckUtils]: 1: Hoare triple {16754#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-07 17:18:24,480 INFO L290 TraceCheckUtils]: 2: Hoare triple {16754#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-07 17:18:24,481 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16754#true} {16791#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16791#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:18:24,481 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 70 [2022-04-07 17:18:24,482 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:18:24,483 INFO L290 TraceCheckUtils]: 0: Hoare triple {16754#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16754#true} is VALID [2022-04-07 17:18:24,484 INFO L290 TraceCheckUtils]: 1: Hoare triple {16754#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-07 17:18:24,484 INFO L290 TraceCheckUtils]: 2: Hoare triple {16754#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-07 17:18:24,484 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16754#true} {16796#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16796#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:18:24,484 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 78 [2022-04-07 17:18:24,485 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:18:24,487 INFO L290 TraceCheckUtils]: 0: Hoare triple {16754#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16754#true} is VALID [2022-04-07 17:18:24,487 INFO L290 TraceCheckUtils]: 1: Hoare triple {16754#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-07 17:18:24,487 INFO L290 TraceCheckUtils]: 2: Hoare triple {16754#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-07 17:18:24,487 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16754#true} {16801#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16801#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:18:24,488 INFO L272 TraceCheckUtils]: 0: Hoare triple {16754#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16810#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:18:24,488 INFO L290 TraceCheckUtils]: 1: Hoare triple {16810#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {16754#true} is VALID [2022-04-07 17:18:24,488 INFO L290 TraceCheckUtils]: 2: Hoare triple {16754#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-07 17:18:24,488 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16754#true} {16754#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-07 17:18:24,488 INFO L272 TraceCheckUtils]: 4: Hoare triple {16754#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-07 17:18:24,488 INFO L290 TraceCheckUtils]: 5: Hoare triple {16754#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {16754#true} is VALID [2022-04-07 17:18:24,489 INFO L290 TraceCheckUtils]: 6: Hoare triple {16754#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {16759#(= main_~i~0 0)} is VALID [2022-04-07 17:18:24,489 INFO L290 TraceCheckUtils]: 7: Hoare triple {16759#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16759#(= main_~i~0 0)} is VALID [2022-04-07 17:18:24,489 INFO L290 TraceCheckUtils]: 8: Hoare triple {16759#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16760#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:18:24,490 INFO L290 TraceCheckUtils]: 9: Hoare triple {16760#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16760#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:18:24,490 INFO L290 TraceCheckUtils]: 10: Hoare triple {16760#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16761#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:18:24,491 INFO L290 TraceCheckUtils]: 11: Hoare triple {16761#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16761#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:18:24,491 INFO L290 TraceCheckUtils]: 12: Hoare triple {16761#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16762#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 17:18:24,492 INFO L290 TraceCheckUtils]: 13: Hoare triple {16762#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16762#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 17:18:24,492 INFO L290 TraceCheckUtils]: 14: Hoare triple {16762#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16763#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 17:18:24,493 INFO L290 TraceCheckUtils]: 15: Hoare triple {16763#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16763#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 17:18:24,493 INFO L290 TraceCheckUtils]: 16: Hoare triple {16763#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16764#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 17:18:24,494 INFO L290 TraceCheckUtils]: 17: Hoare triple {16764#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16764#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 17:18:24,494 INFO L290 TraceCheckUtils]: 18: Hoare triple {16764#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16765#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-07 17:18:24,495 INFO L290 TraceCheckUtils]: 19: Hoare triple {16765#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16765#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-07 17:18:24,495 INFO L290 TraceCheckUtils]: 20: Hoare triple {16765#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16766#(and (<= main_~i~0 7) (<= 7 main_~i~0))} is VALID [2022-04-07 17:18:24,496 INFO L290 TraceCheckUtils]: 21: Hoare triple {16766#(and (<= main_~i~0 7) (<= 7 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16767#(and (<= main_~i~0 7) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 7 main_~i~0))} is VALID [2022-04-07 17:18:24,496 INFO L290 TraceCheckUtils]: 22: Hoare triple {16767#(and (<= main_~i~0 7) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 7 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16768#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (<= 8 main_~i~0))} is VALID [2022-04-07 17:18:24,497 INFO L290 TraceCheckUtils]: 23: Hoare triple {16768#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (<= 8 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16768#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (<= 8 main_~i~0))} is VALID [2022-04-07 17:18:24,498 INFO L290 TraceCheckUtils]: 24: Hoare triple {16768#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (<= 8 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16769#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (not (= (+ main_~x~0.offset 28) (+ main_~x~0.offset (* main_~i~0 4)))))} is VALID [2022-04-07 17:18:24,498 INFO L290 TraceCheckUtils]: 25: Hoare triple {16769#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (not (= (+ main_~x~0.offset 28) (+ main_~x~0.offset (* main_~i~0 4)))))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16770#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-07 17:18:24,499 INFO L290 TraceCheckUtils]: 26: Hoare triple {16770#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16770#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-07 17:18:24,499 INFO L290 TraceCheckUtils]: 27: Hoare triple {16770#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {16770#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-07 17:18:24,499 INFO L290 TraceCheckUtils]: 28: Hoare triple {16770#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {16771#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:18:24,500 INFO L290 TraceCheckUtils]: 29: Hoare triple {16771#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16771#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:18:24,500 INFO L272 TraceCheckUtils]: 30: Hoare triple {16771#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16754#true} is VALID [2022-04-07 17:18:24,500 INFO L290 TraceCheckUtils]: 31: Hoare triple {16754#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16754#true} is VALID [2022-04-07 17:18:24,500 INFO L290 TraceCheckUtils]: 32: Hoare triple {16754#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-07 17:18:24,500 INFO L290 TraceCheckUtils]: 33: Hoare triple {16754#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-07 17:18:24,501 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {16754#true} {16771#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16771#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:18:24,501 INFO L290 TraceCheckUtils]: 35: Hoare triple {16771#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16771#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:18:24,502 INFO L290 TraceCheckUtils]: 36: Hoare triple {16771#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16776#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 17:18:24,502 INFO L290 TraceCheckUtils]: 37: Hoare triple {16776#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16776#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 17:18:24,502 INFO L272 TraceCheckUtils]: 38: Hoare triple {16776#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16754#true} is VALID [2022-04-07 17:18:24,502 INFO L290 TraceCheckUtils]: 39: Hoare triple {16754#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16754#true} is VALID [2022-04-07 17:18:24,502 INFO L290 TraceCheckUtils]: 40: Hoare triple {16754#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-07 17:18:24,502 INFO L290 TraceCheckUtils]: 41: Hoare triple {16754#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-07 17:18:24,503 INFO L284 TraceCheckUtils]: 42: Hoare quadruple {16754#true} {16776#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16776#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 17:18:24,503 INFO L290 TraceCheckUtils]: 43: Hoare triple {16776#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16776#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 17:18:24,504 INFO L290 TraceCheckUtils]: 44: Hoare triple {16776#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16781#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 17:18:24,504 INFO L290 TraceCheckUtils]: 45: Hoare triple {16781#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16781#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 17:18:24,504 INFO L272 TraceCheckUtils]: 46: Hoare triple {16781#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16754#true} is VALID [2022-04-07 17:18:24,504 INFO L290 TraceCheckUtils]: 47: Hoare triple {16754#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16754#true} is VALID [2022-04-07 17:18:24,504 INFO L290 TraceCheckUtils]: 48: Hoare triple {16754#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-07 17:18:24,504 INFO L290 TraceCheckUtils]: 49: Hoare triple {16754#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-07 17:18:24,505 INFO L284 TraceCheckUtils]: 50: Hoare quadruple {16754#true} {16781#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16781#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 17:18:24,505 INFO L290 TraceCheckUtils]: 51: Hoare triple {16781#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16781#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 17:18:24,506 INFO L290 TraceCheckUtils]: 52: Hoare triple {16781#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16786#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:18:24,506 INFO L290 TraceCheckUtils]: 53: Hoare triple {16786#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16786#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:18:24,506 INFO L272 TraceCheckUtils]: 54: Hoare triple {16786#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16754#true} is VALID [2022-04-07 17:18:24,507 INFO L290 TraceCheckUtils]: 55: Hoare triple {16754#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16754#true} is VALID [2022-04-07 17:18:24,507 INFO L290 TraceCheckUtils]: 56: Hoare triple {16754#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-07 17:18:24,507 INFO L290 TraceCheckUtils]: 57: Hoare triple {16754#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-07 17:18:24,507 INFO L284 TraceCheckUtils]: 58: Hoare quadruple {16754#true} {16786#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16786#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:18:24,508 INFO L290 TraceCheckUtils]: 59: Hoare triple {16786#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16786#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:18:24,508 INFO L290 TraceCheckUtils]: 60: Hoare triple {16786#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16791#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:18:24,509 INFO L290 TraceCheckUtils]: 61: Hoare triple {16791#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16791#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:18:24,509 INFO L272 TraceCheckUtils]: 62: Hoare triple {16791#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16754#true} is VALID [2022-04-07 17:18:24,509 INFO L290 TraceCheckUtils]: 63: Hoare triple {16754#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16754#true} is VALID [2022-04-07 17:18:24,509 INFO L290 TraceCheckUtils]: 64: Hoare triple {16754#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-07 17:18:24,509 INFO L290 TraceCheckUtils]: 65: Hoare triple {16754#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-07 17:18:24,510 INFO L284 TraceCheckUtils]: 66: Hoare quadruple {16754#true} {16791#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16791#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:18:24,510 INFO L290 TraceCheckUtils]: 67: Hoare triple {16791#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16791#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:18:24,511 INFO L290 TraceCheckUtils]: 68: Hoare triple {16791#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16796#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:18:24,511 INFO L290 TraceCheckUtils]: 69: Hoare triple {16796#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16796#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:18:24,511 INFO L272 TraceCheckUtils]: 70: Hoare triple {16796#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16754#true} is VALID [2022-04-07 17:18:24,511 INFO L290 TraceCheckUtils]: 71: Hoare triple {16754#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16754#true} is VALID [2022-04-07 17:18:24,511 INFO L290 TraceCheckUtils]: 72: Hoare triple {16754#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-07 17:18:24,511 INFO L290 TraceCheckUtils]: 73: Hoare triple {16754#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-07 17:18:24,512 INFO L284 TraceCheckUtils]: 74: Hoare quadruple {16754#true} {16796#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16796#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:18:24,512 INFO L290 TraceCheckUtils]: 75: Hoare triple {16796#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16796#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:18:24,513 INFO L290 TraceCheckUtils]: 76: Hoare triple {16796#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16801#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:18:24,513 INFO L290 TraceCheckUtils]: 77: Hoare triple {16801#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16801#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:18:24,513 INFO L272 TraceCheckUtils]: 78: Hoare triple {16801#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16754#true} is VALID [2022-04-07 17:18:24,513 INFO L290 TraceCheckUtils]: 79: Hoare triple {16754#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16754#true} is VALID [2022-04-07 17:18:24,514 INFO L290 TraceCheckUtils]: 80: Hoare triple {16754#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-07 17:18:24,514 INFO L290 TraceCheckUtils]: 81: Hoare triple {16754#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-07 17:18:24,514 INFO L284 TraceCheckUtils]: 82: Hoare quadruple {16754#true} {16801#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16801#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:18:24,515 INFO L290 TraceCheckUtils]: 83: Hoare triple {16801#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16801#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:18:24,515 INFO L290 TraceCheckUtils]: 84: Hoare triple {16801#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16806#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:18:24,516 INFO L290 TraceCheckUtils]: 85: Hoare triple {16806#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16807#(= |main_#t~mem5| 0)} is VALID [2022-04-07 17:18:24,516 INFO L272 TraceCheckUtils]: 86: Hoare triple {16807#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16808#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:18:24,516 INFO L290 TraceCheckUtils]: 87: Hoare triple {16808#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16809#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:18:24,517 INFO L290 TraceCheckUtils]: 88: Hoare triple {16809#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {16755#false} is VALID [2022-04-07 17:18:24,517 INFO L290 TraceCheckUtils]: 89: Hoare triple {16755#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16755#false} is VALID [2022-04-07 17:18:24,517 INFO L134 CoverageAnalysis]: Checked inductivity of 296 backedges. 14 proven. 198 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2022-04-07 17:18:24,517 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:18:24,517 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1756989748] [2022-04-07 17:18:24,518 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1756989748] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:18:24,518 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1400097555] [2022-04-07 17:18:24,518 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-07 17:18:24,518 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:18:24,518 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:18:24,519 INFO L229 MonitoredProcess]: Starting monitored process 23 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:18:24,553 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Waiting until timeout for monitored process [2022-04-07 17:18:24,690 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2022-04-07 17:18:24,690 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 17:18:24,692 INFO L263 TraceCheckSpWp]: Trace formula consists of 249 conjuncts, 47 conjunts are in the unsatisfiable core [2022-04-07 17:18:24,708 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:18:24,710 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:18:24,846 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-07 17:18:24,965 INFO L356 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2022-04-07 17:18:24,965 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 24 [2022-04-07 17:18:25,043 INFO L356 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2022-04-07 17:18:25,043 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 24 [2022-04-07 17:19:59,239 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2022-04-07 17:19:59,304 INFO L272 TraceCheckUtils]: 0: Hoare triple {16754#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-07 17:19:59,304 INFO L290 TraceCheckUtils]: 1: Hoare triple {16754#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {16754#true} is VALID [2022-04-07 17:19:59,304 INFO L290 TraceCheckUtils]: 2: Hoare triple {16754#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-07 17:19:59,304 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16754#true} {16754#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-07 17:19:59,304 INFO L272 TraceCheckUtils]: 4: Hoare triple {16754#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-07 17:19:59,304 INFO L290 TraceCheckUtils]: 5: Hoare triple {16754#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {16754#true} is VALID [2022-04-07 17:19:59,304 INFO L290 TraceCheckUtils]: 6: Hoare triple {16754#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {16759#(= main_~i~0 0)} is VALID [2022-04-07 17:19:59,305 INFO L290 TraceCheckUtils]: 7: Hoare triple {16759#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16759#(= main_~i~0 0)} is VALID [2022-04-07 17:19:59,305 INFO L290 TraceCheckUtils]: 8: Hoare triple {16759#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16760#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:19:59,305 INFO L290 TraceCheckUtils]: 9: Hoare triple {16760#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16760#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:19:59,306 INFO L290 TraceCheckUtils]: 10: Hoare triple {16760#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16761#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:19:59,306 INFO L290 TraceCheckUtils]: 11: Hoare triple {16761#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16761#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:19:59,307 INFO L290 TraceCheckUtils]: 12: Hoare triple {16761#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16762#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 17:19:59,307 INFO L290 TraceCheckUtils]: 13: Hoare triple {16762#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16762#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 17:19:59,308 INFO L290 TraceCheckUtils]: 14: Hoare triple {16762#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16763#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 17:19:59,308 INFO L290 TraceCheckUtils]: 15: Hoare triple {16763#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16763#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 17:19:59,308 INFO L290 TraceCheckUtils]: 16: Hoare triple {16763#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16764#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 17:19:59,309 INFO L290 TraceCheckUtils]: 17: Hoare triple {16764#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16764#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 17:19:59,309 INFO L290 TraceCheckUtils]: 18: Hoare triple {16764#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16765#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-07 17:19:59,310 INFO L290 TraceCheckUtils]: 19: Hoare triple {16765#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16765#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-07 17:19:59,310 INFO L290 TraceCheckUtils]: 20: Hoare triple {16765#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16766#(and (<= main_~i~0 7) (<= 7 main_~i~0))} is VALID [2022-04-07 17:19:59,311 INFO L290 TraceCheckUtils]: 21: Hoare triple {16766#(and (<= main_~i~0 7) (<= 7 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16767#(and (<= main_~i~0 7) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 7 main_~i~0))} is VALID [2022-04-07 17:19:59,311 INFO L290 TraceCheckUtils]: 22: Hoare triple {16767#(and (<= main_~i~0 7) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 7 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16768#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (<= 8 main_~i~0))} is VALID [2022-04-07 17:19:59,312 INFO L290 TraceCheckUtils]: 23: Hoare triple {16768#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (<= 8 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16768#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (<= 8 main_~i~0))} is VALID [2022-04-07 17:19:59,312 INFO L290 TraceCheckUtils]: 24: Hoare triple {16768#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (<= 8 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16886#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (<= 9 main_~i~0))} is VALID [2022-04-07 17:19:59,313 INFO L290 TraceCheckUtils]: 25: Hoare triple {16886#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (<= 9 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16770#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-07 17:19:59,313 INFO L290 TraceCheckUtils]: 26: Hoare triple {16770#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16770#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-07 17:19:59,313 INFO L290 TraceCheckUtils]: 27: Hoare triple {16770#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {16770#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-07 17:19:59,314 INFO L290 TraceCheckUtils]: 28: Hoare triple {16770#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {16771#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:19:59,314 INFO L290 TraceCheckUtils]: 29: Hoare triple {16771#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16771#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:19:59,315 INFO L272 TraceCheckUtils]: 30: Hoare triple {16771#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} is VALID [2022-04-07 17:19:59,315 INFO L290 TraceCheckUtils]: 31: Hoare triple {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} is VALID [2022-04-07 17:19:59,315 INFO L290 TraceCheckUtils]: 32: Hoare triple {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} is VALID [2022-04-07 17:19:59,316 INFO L290 TraceCheckUtils]: 33: Hoare triple {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} is VALID [2022-04-07 17:19:59,316 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} {16771#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16771#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:19:59,316 INFO L290 TraceCheckUtils]: 35: Hoare triple {16771#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16771#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:19:59,317 INFO L290 TraceCheckUtils]: 36: Hoare triple {16771#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16924#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 17:19:59,317 INFO L290 TraceCheckUtils]: 37: Hoare triple {16924#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ (- 1) main_~i~1)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16924#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 17:19:59,318 INFO L272 TraceCheckUtils]: 38: Hoare triple {16924#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ (- 1) main_~i~1)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} is VALID [2022-04-07 17:19:59,318 INFO L290 TraceCheckUtils]: 39: Hoare triple {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} is VALID [2022-04-07 17:19:59,319 INFO L290 TraceCheckUtils]: 40: Hoare triple {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} is VALID [2022-04-07 17:19:59,319 INFO L290 TraceCheckUtils]: 41: Hoare triple {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} is VALID [2022-04-07 17:19:59,319 INFO L284 TraceCheckUtils]: 42: Hoare quadruple {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} {16924#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ (- 1) main_~i~1)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16924#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 17:19:59,320 INFO L290 TraceCheckUtils]: 43: Hoare triple {16924#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ (- 1) main_~i~1)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16924#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 17:19:59,320 INFO L290 TraceCheckUtils]: 44: Hoare triple {16924#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 0 (+ (- 1) main_~i~1)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16949#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 2))} is VALID [2022-04-07 17:19:59,321 INFO L290 TraceCheckUtils]: 45: Hoare triple {16949#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 2))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16949#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 2))} is VALID [2022-04-07 17:19:59,321 INFO L272 TraceCheckUtils]: 46: Hoare triple {16949#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 2))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} is VALID [2022-04-07 17:19:59,322 INFO L290 TraceCheckUtils]: 47: Hoare triple {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} is VALID [2022-04-07 17:19:59,322 INFO L290 TraceCheckUtils]: 48: Hoare triple {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} is VALID [2022-04-07 17:19:59,322 INFO L290 TraceCheckUtils]: 49: Hoare triple {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} is VALID [2022-04-07 17:19:59,323 INFO L284 TraceCheckUtils]: 50: Hoare quadruple {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} {16949#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16949#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 2))} is VALID [2022-04-07 17:19:59,323 INFO L290 TraceCheckUtils]: 51: Hoare triple {16949#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 2))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16949#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 2))} is VALID [2022-04-07 17:19:59,323 INFO L290 TraceCheckUtils]: 52: Hoare triple {16949#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 2))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16974#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 3))} is VALID [2022-04-07 17:19:59,324 INFO L290 TraceCheckUtils]: 53: Hoare triple {16974#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 3))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16974#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 3))} is VALID [2022-04-07 17:19:59,325 INFO L272 TraceCheckUtils]: 54: Hoare triple {16974#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 3))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} is VALID [2022-04-07 17:19:59,325 INFO L290 TraceCheckUtils]: 55: Hoare triple {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} is VALID [2022-04-07 17:19:59,325 INFO L290 TraceCheckUtils]: 56: Hoare triple {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} is VALID [2022-04-07 17:19:59,325 INFO L290 TraceCheckUtils]: 57: Hoare triple {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} is VALID [2022-04-07 17:19:59,326 INFO L284 TraceCheckUtils]: 58: Hoare quadruple {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} {16974#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 3))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16974#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 3))} is VALID [2022-04-07 17:19:59,326 INFO L290 TraceCheckUtils]: 59: Hoare triple {16974#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 3))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16974#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 3))} is VALID [2022-04-07 17:19:59,327 INFO L290 TraceCheckUtils]: 60: Hoare triple {16974#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= main_~i~1 3))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16999#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 3 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 17:19:59,327 INFO L290 TraceCheckUtils]: 61: Hoare triple {16999#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 3 (+ (- 1) main_~i~1)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16999#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 3 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 17:19:59,328 INFO L272 TraceCheckUtils]: 62: Hoare triple {16999#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 3 (+ (- 1) main_~i~1)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} is VALID [2022-04-07 17:19:59,328 INFO L290 TraceCheckUtils]: 63: Hoare triple {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} is VALID [2022-04-07 17:19:59,328 INFO L290 TraceCheckUtils]: 64: Hoare triple {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} is VALID [2022-04-07 17:19:59,329 INFO L290 TraceCheckUtils]: 65: Hoare triple {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} is VALID [2022-04-07 17:19:59,329 INFO L284 TraceCheckUtils]: 66: Hoare quadruple {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} {16999#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 3 (+ (- 1) main_~i~1)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16999#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 3 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 17:19:59,330 INFO L290 TraceCheckUtils]: 67: Hoare triple {16999#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 3 (+ (- 1) main_~i~1)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16999#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 3 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 17:19:59,330 INFO L290 TraceCheckUtils]: 68: Hoare triple {16999#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 3 (+ (- 1) main_~i~1)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {17024#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 5 main_~i~1))} is VALID [2022-04-07 17:19:59,330 INFO L290 TraceCheckUtils]: 69: Hoare triple {17024#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 5 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {17024#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 5 main_~i~1))} is VALID [2022-04-07 17:19:59,331 INFO L272 TraceCheckUtils]: 70: Hoare triple {17024#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 5 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} is VALID [2022-04-07 17:19:59,331 INFO L290 TraceCheckUtils]: 71: Hoare triple {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} is VALID [2022-04-07 17:19:59,332 INFO L290 TraceCheckUtils]: 72: Hoare triple {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} is VALID [2022-04-07 17:19:59,332 INFO L290 TraceCheckUtils]: 73: Hoare triple {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} is VALID [2022-04-07 17:19:59,332 INFO L284 TraceCheckUtils]: 74: Hoare quadruple {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} {17024#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 5 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {17024#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 5 main_~i~1))} is VALID [2022-04-07 17:19:59,333 INFO L290 TraceCheckUtils]: 75: Hoare triple {17024#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 5 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {17024#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 5 main_~i~1))} is VALID [2022-04-07 17:19:59,333 INFO L290 TraceCheckUtils]: 76: Hoare triple {17024#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 5 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {17049#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 5 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 17:19:59,334 INFO L290 TraceCheckUtils]: 77: Hoare triple {17049#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 5 (+ (- 1) main_~i~1)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {17049#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 5 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 17:19:59,334 INFO L272 TraceCheckUtils]: 78: Hoare triple {17049#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 5 (+ (- 1) main_~i~1)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} is VALID [2022-04-07 17:19:59,335 INFO L290 TraceCheckUtils]: 79: Hoare triple {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} is VALID [2022-04-07 17:19:59,335 INFO L290 TraceCheckUtils]: 80: Hoare triple {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} is VALID [2022-04-07 17:19:59,335 INFO L290 TraceCheckUtils]: 81: Hoare triple {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} is VALID [2022-04-07 17:19:59,336 INFO L284 TraceCheckUtils]: 82: Hoare quadruple {16905#(exists ((v_main_~x~0.offset_BEFORE_CALL_113 Int) (v_main_~x~0.base_BEFORE_CALL_113 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_113) (+ v_main_~x~0.offset_BEFORE_CALL_113 28)) 0))} {17049#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 5 (+ (- 1) main_~i~1)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {17049#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 5 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 17:19:59,336 INFO L290 TraceCheckUtils]: 83: Hoare triple {17049#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 5 (+ (- 1) main_~i~1)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {17049#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 5 (+ (- 1) main_~i~1)))} is VALID [2022-04-07 17:19:59,336 INFO L290 TraceCheckUtils]: 84: Hoare triple {17049#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= 5 (+ (- 1) main_~i~1)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {17074#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 5))} is VALID [2022-04-07 17:19:59,337 INFO L290 TraceCheckUtils]: 85: Hoare triple {17074#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (= (+ (- 2) main_~i~1) 5))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16807#(= |main_#t~mem5| 0)} is VALID [2022-04-07 17:19:59,337 INFO L272 TraceCheckUtils]: 86: Hoare triple {16807#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {17081#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:19:59,338 INFO L290 TraceCheckUtils]: 87: Hoare triple {17081#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {17085#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:19:59,338 INFO L290 TraceCheckUtils]: 88: Hoare triple {17085#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {16755#false} is VALID [2022-04-07 17:19:59,338 INFO L290 TraceCheckUtils]: 89: Hoare triple {16755#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16755#false} is VALID [2022-04-07 17:19:59,338 INFO L134 CoverageAnalysis]: Checked inductivity of 296 backedges. 1 proven. 211 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2022-04-07 17:19:59,338 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 17:20:01,820 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2022-04-07 17:20:01,824 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2022-04-07 17:20:01,948 INFO L290 TraceCheckUtils]: 89: Hoare triple {16755#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16755#false} is VALID [2022-04-07 17:20:01,949 INFO L290 TraceCheckUtils]: 88: Hoare triple {17085#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {16755#false} is VALID [2022-04-07 17:20:01,949 INFO L290 TraceCheckUtils]: 87: Hoare triple {17081#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {17085#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:20:01,950 INFO L272 TraceCheckUtils]: 86: Hoare triple {16807#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {17081#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:20:01,951 INFO L290 TraceCheckUtils]: 85: Hoare triple {16806#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16807#(= |main_#t~mem5| 0)} is VALID [2022-04-07 17:20:01,951 INFO L290 TraceCheckUtils]: 84: Hoare triple {16801#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16806#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:20:01,952 INFO L290 TraceCheckUtils]: 83: Hoare triple {16801#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16801#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:20:01,953 INFO L284 TraceCheckUtils]: 82: Hoare quadruple {16754#true} {16801#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16801#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:20:01,953 INFO L290 TraceCheckUtils]: 81: Hoare triple {16754#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-07 17:20:01,953 INFO L290 TraceCheckUtils]: 80: Hoare triple {16754#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-07 17:20:01,953 INFO L290 TraceCheckUtils]: 79: Hoare triple {16754#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16754#true} is VALID [2022-04-07 17:20:01,953 INFO L272 TraceCheckUtils]: 78: Hoare triple {16801#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16754#true} is VALID [2022-04-07 17:20:01,954 INFO L290 TraceCheckUtils]: 77: Hoare triple {16801#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16801#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:20:01,954 INFO L290 TraceCheckUtils]: 76: Hoare triple {16796#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16801#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:20:01,955 INFO L290 TraceCheckUtils]: 75: Hoare triple {16796#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16796#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:20:01,956 INFO L284 TraceCheckUtils]: 74: Hoare quadruple {16754#true} {16796#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16796#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:20:01,956 INFO L290 TraceCheckUtils]: 73: Hoare triple {16754#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-07 17:20:01,956 INFO L290 TraceCheckUtils]: 72: Hoare triple {16754#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-07 17:20:01,956 INFO L290 TraceCheckUtils]: 71: Hoare triple {16754#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16754#true} is VALID [2022-04-07 17:20:01,956 INFO L272 TraceCheckUtils]: 70: Hoare triple {16796#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16754#true} is VALID [2022-04-07 17:20:01,957 INFO L290 TraceCheckUtils]: 69: Hoare triple {16796#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16796#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:20:01,957 INFO L290 TraceCheckUtils]: 68: Hoare triple {16791#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16796#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:20:01,958 INFO L290 TraceCheckUtils]: 67: Hoare triple {16791#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16791#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:20:01,958 INFO L284 TraceCheckUtils]: 66: Hoare quadruple {16754#true} {16791#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16791#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:20:01,959 INFO L290 TraceCheckUtils]: 65: Hoare triple {16754#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-07 17:20:01,959 INFO L290 TraceCheckUtils]: 64: Hoare triple {16754#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-07 17:20:01,959 INFO L290 TraceCheckUtils]: 63: Hoare triple {16754#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16754#true} is VALID [2022-04-07 17:20:01,959 INFO L272 TraceCheckUtils]: 62: Hoare triple {16791#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16754#true} is VALID [2022-04-07 17:20:01,959 INFO L290 TraceCheckUtils]: 61: Hoare triple {16791#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16791#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:20:01,960 INFO L290 TraceCheckUtils]: 60: Hoare triple {16786#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16791#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:20:01,961 INFO L290 TraceCheckUtils]: 59: Hoare triple {16786#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16786#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:20:01,961 INFO L284 TraceCheckUtils]: 58: Hoare quadruple {16754#true} {16786#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16786#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:20:01,962 INFO L290 TraceCheckUtils]: 57: Hoare triple {16754#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-07 17:20:01,962 INFO L290 TraceCheckUtils]: 56: Hoare triple {16754#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-07 17:20:01,962 INFO L290 TraceCheckUtils]: 55: Hoare triple {16754#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16754#true} is VALID [2022-04-07 17:20:01,962 INFO L272 TraceCheckUtils]: 54: Hoare triple {16786#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16754#true} is VALID [2022-04-07 17:20:01,962 INFO L290 TraceCheckUtils]: 53: Hoare triple {16786#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16786#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:20:01,963 INFO L290 TraceCheckUtils]: 52: Hoare triple {16781#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16786#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:20:01,964 INFO L290 TraceCheckUtils]: 51: Hoare triple {16781#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16781#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 17:20:01,964 INFO L284 TraceCheckUtils]: 50: Hoare quadruple {16754#true} {16781#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16781#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 17:20:01,964 INFO L290 TraceCheckUtils]: 49: Hoare triple {16754#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-07 17:20:01,965 INFO L290 TraceCheckUtils]: 48: Hoare triple {16754#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-07 17:20:01,965 INFO L290 TraceCheckUtils]: 47: Hoare triple {16754#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16754#true} is VALID [2022-04-07 17:20:01,965 INFO L272 TraceCheckUtils]: 46: Hoare triple {16781#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16754#true} is VALID [2022-04-07 17:20:01,965 INFO L290 TraceCheckUtils]: 45: Hoare triple {16781#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16781#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 17:20:01,966 INFO L290 TraceCheckUtils]: 44: Hoare triple {16776#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16781#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 17:20:01,966 INFO L290 TraceCheckUtils]: 43: Hoare triple {16776#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {16776#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 17:20:01,967 INFO L284 TraceCheckUtils]: 42: Hoare quadruple {16754#true} {16776#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16776#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 17:20:01,967 INFO L290 TraceCheckUtils]: 41: Hoare triple {16754#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-07 17:20:01,967 INFO L290 TraceCheckUtils]: 40: Hoare triple {16754#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-07 17:20:01,967 INFO L290 TraceCheckUtils]: 39: Hoare triple {16754#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16754#true} is VALID [2022-04-07 17:20:01,967 INFO L272 TraceCheckUtils]: 38: Hoare triple {16776#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16754#true} is VALID [2022-04-07 17:20:01,967 INFO L290 TraceCheckUtils]: 37: Hoare triple {16776#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {16776#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 17:20:01,968 INFO L290 TraceCheckUtils]: 36: Hoare triple {17251#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {16776#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 17:20:01,968 INFO L290 TraceCheckUtils]: 35: Hoare triple {17251#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {17251#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-07 17:20:01,969 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {16754#true} {17251#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {17251#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-07 17:20:01,969 INFO L290 TraceCheckUtils]: 33: Hoare triple {16754#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-07 17:20:01,969 INFO L290 TraceCheckUtils]: 32: Hoare triple {16754#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-07 17:20:01,969 INFO L290 TraceCheckUtils]: 31: Hoare triple {16754#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16754#true} is VALID [2022-04-07 17:20:01,969 INFO L272 TraceCheckUtils]: 30: Hoare triple {17251#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {16754#true} is VALID [2022-04-07 17:20:01,970 INFO L290 TraceCheckUtils]: 29: Hoare triple {17251#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {17251#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-07 17:20:01,970 INFO L290 TraceCheckUtils]: 28: Hoare triple {16770#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {17251#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-07 17:20:01,970 INFO L290 TraceCheckUtils]: 27: Hoare triple {16770#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {16770#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-07 17:20:01,971 INFO L290 TraceCheckUtils]: 26: Hoare triple {16770#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16770#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-07 17:20:01,971 INFO L290 TraceCheckUtils]: 25: Hoare triple {16769#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (not (= (+ main_~x~0.offset 28) (+ main_~x~0.offset (* main_~i~0 4)))))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16770#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0)} is VALID [2022-04-07 17:20:01,972 INFO L290 TraceCheckUtils]: 24: Hoare triple {17288#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (not (<= main_~i~0 6)))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16769#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (not (= (+ main_~x~0.offset 28) (+ main_~x~0.offset (* main_~i~0 4)))))} is VALID [2022-04-07 17:20:01,972 INFO L290 TraceCheckUtils]: 23: Hoare triple {16768#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (<= 8 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {17288#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (not (<= main_~i~0 6)))} is VALID [2022-04-07 17:20:01,973 INFO L290 TraceCheckUtils]: 22: Hoare triple {17288#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (not (<= main_~i~0 6)))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16768#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (<= 8 main_~i~0))} is VALID [2022-04-07 17:20:01,973 INFO L290 TraceCheckUtils]: 21: Hoare triple {16766#(and (<= main_~i~0 7) (<= 7 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {17288#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 28)) 0) (not (<= main_~i~0 6)))} is VALID [2022-04-07 17:20:01,973 INFO L290 TraceCheckUtils]: 20: Hoare triple {16765#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16766#(and (<= main_~i~0 7) (<= 7 main_~i~0))} is VALID [2022-04-07 17:20:01,974 INFO L290 TraceCheckUtils]: 19: Hoare triple {16765#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16765#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-07 17:20:01,974 INFO L290 TraceCheckUtils]: 18: Hoare triple {16764#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16765#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-07 17:20:01,975 INFO L290 TraceCheckUtils]: 17: Hoare triple {16764#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16764#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 17:20:01,975 INFO L290 TraceCheckUtils]: 16: Hoare triple {16763#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16764#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 17:20:01,976 INFO L290 TraceCheckUtils]: 15: Hoare triple {16763#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16763#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 17:20:01,976 INFO L290 TraceCheckUtils]: 14: Hoare triple {16762#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16763#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 17:20:01,976 INFO L290 TraceCheckUtils]: 13: Hoare triple {16762#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16762#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 17:20:01,977 INFO L290 TraceCheckUtils]: 12: Hoare triple {16761#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16762#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 17:20:01,977 INFO L290 TraceCheckUtils]: 11: Hoare triple {16761#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16761#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:20:01,978 INFO L290 TraceCheckUtils]: 10: Hoare triple {16760#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16761#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:20:01,978 INFO L290 TraceCheckUtils]: 9: Hoare triple {16760#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16760#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:20:01,978 INFO L290 TraceCheckUtils]: 8: Hoare triple {16759#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {16760#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:20:01,979 INFO L290 TraceCheckUtils]: 7: Hoare triple {16759#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {16759#(= main_~i~0 0)} is VALID [2022-04-07 17:20:01,979 INFO L290 TraceCheckUtils]: 6: Hoare triple {16754#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {16759#(= main_~i~0 0)} is VALID [2022-04-07 17:20:01,979 INFO L290 TraceCheckUtils]: 5: Hoare triple {16754#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {16754#true} is VALID [2022-04-07 17:20:01,979 INFO L272 TraceCheckUtils]: 4: Hoare triple {16754#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-07 17:20:01,979 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16754#true} {16754#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-07 17:20:01,979 INFO L290 TraceCheckUtils]: 2: Hoare triple {16754#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-07 17:20:01,979 INFO L290 TraceCheckUtils]: 1: Hoare triple {16754#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {16754#true} is VALID [2022-04-07 17:20:01,979 INFO L272 TraceCheckUtils]: 0: Hoare triple {16754#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16754#true} is VALID [2022-04-07 17:20:01,980 INFO L134 CoverageAnalysis]: Checked inductivity of 296 backedges. 14 proven. 197 refuted. 0 times theorem prover too weak. 85 trivial. 0 not checked. [2022-04-07 17:20:01,980 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1400097555] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 17:20:01,980 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 17:20:01,980 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 26, 25] total 39 [2022-04-07 17:20:01,980 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1531080135] [2022-04-07 17:20:01,980 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 17:20:01,981 INFO L78 Accepts]: Start accepts. Automaton has has 39 states, 38 states have (on average 2.3684210526315788) internal successors, (90), 36 states have internal predecessors, (90), 16 states have call successors, (20), 5 states have call predecessors, (20), 2 states have return successors, (16), 15 states have call predecessors, (16), 15 states have call successors, (16) Word has length 90 [2022-04-07 17:20:01,982 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:20:01,982 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 39 states, 38 states have (on average 2.3684210526315788) internal successors, (90), 36 states have internal predecessors, (90), 16 states have call successors, (20), 5 states have call predecessors, (20), 2 states have return successors, (16), 15 states have call predecessors, (16), 15 states have call successors, (16) [2022-04-07 17:20:02,066 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 126 edges. 126 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:20:02,066 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 39 states [2022-04-07 17:20:02,066 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:20:02,067 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2022-04-07 17:20:02,067 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=119, Invalid=1355, Unknown=8, NotChecked=0, Total=1482 [2022-04-07 17:20:02,067 INFO L87 Difference]: Start difference. First operand 171 states and 180 transitions. Second operand has 39 states, 38 states have (on average 2.3684210526315788) internal successors, (90), 36 states have internal predecessors, (90), 16 states have call successors, (20), 5 states have call predecessors, (20), 2 states have return successors, (16), 15 states have call predecessors, (16), 15 states have call successors, (16) [2022-04-07 17:20:04,849 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:20:04,850 INFO L93 Difference]: Finished difference Result 193 states and 203 transitions. [2022-04-07 17:20:04,850 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2022-04-07 17:20:04,850 INFO L78 Accepts]: Start accepts. Automaton has has 39 states, 38 states have (on average 2.3684210526315788) internal successors, (90), 36 states have internal predecessors, (90), 16 states have call successors, (20), 5 states have call predecessors, (20), 2 states have return successors, (16), 15 states have call predecessors, (16), 15 states have call successors, (16) Word has length 90 [2022-04-07 17:20:04,850 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:20:04,850 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 39 states, 38 states have (on average 2.3684210526315788) internal successors, (90), 36 states have internal predecessors, (90), 16 states have call successors, (20), 5 states have call predecessors, (20), 2 states have return successors, (16), 15 states have call predecessors, (16), 15 states have call successors, (16) [2022-04-07 17:20:04,852 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 90 transitions. [2022-04-07 17:20:04,852 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 39 states, 38 states have (on average 2.3684210526315788) internal successors, (90), 36 states have internal predecessors, (90), 16 states have call successors, (20), 5 states have call predecessors, (20), 2 states have return successors, (16), 15 states have call predecessors, (16), 15 states have call successors, (16) [2022-04-07 17:20:04,853 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 90 transitions. [2022-04-07 17:20:04,853 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 37 states and 90 transitions. [2022-04-07 17:20:04,930 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 90 edges. 90 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:20:04,933 INFO L225 Difference]: With dead ends: 193 [2022-04-07 17:20:04,933 INFO L226 Difference]: Without dead ends: 193 [2022-04-07 17:20:04,934 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 249 GetRequests, 164 SyntacticMatches, 21 SemanticMatches, 64 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1004 ImplicationChecksByTransitivity, 96.3s TimeCoverageRelationStatistics Valid=326, Invalid=3956, Unknown=8, NotChecked=0, Total=4290 [2022-04-07 17:20:04,934 INFO L913 BasicCegarLoop]: 32 mSDtfsCounter, 75 mSDsluCounter, 277 mSDsCounter, 0 mSdLazyCounter, 1434 mSolverCounterSat, 54 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 75 SdHoareTripleChecker+Valid, 309 SdHoareTripleChecker+Invalid, 1579 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 54 IncrementalHoareTripleChecker+Valid, 1434 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 91 IncrementalHoareTripleChecker+Unchecked, 1.2s IncrementalHoareTripleChecker+Time [2022-04-07 17:20:04,934 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [75 Valid, 309 Invalid, 1579 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [54 Valid, 1434 Invalid, 0 Unknown, 91 Unchecked, 1.2s Time] [2022-04-07 17:20:04,935 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 193 states. [2022-04-07 17:20:04,938 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 193 to 183. [2022-04-07 17:20:04,938 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:20:04,939 INFO L82 GeneralOperation]: Start isEquivalent. First operand 193 states. Second operand has 183 states, 140 states have (on average 1.0285714285714285) internal successors, (144), 143 states have internal predecessors, (144), 25 states have call successors, (25), 18 states have call predecessors, (25), 17 states have return successors, (24), 21 states have call predecessors, (24), 24 states have call successors, (24) [2022-04-07 17:20:04,939 INFO L74 IsIncluded]: Start isIncluded. First operand 193 states. Second operand has 183 states, 140 states have (on average 1.0285714285714285) internal successors, (144), 143 states have internal predecessors, (144), 25 states have call successors, (25), 18 states have call predecessors, (25), 17 states have return successors, (24), 21 states have call predecessors, (24), 24 states have call successors, (24) [2022-04-07 17:20:04,939 INFO L87 Difference]: Start difference. First operand 193 states. Second operand has 183 states, 140 states have (on average 1.0285714285714285) internal successors, (144), 143 states have internal predecessors, (144), 25 states have call successors, (25), 18 states have call predecessors, (25), 17 states have return successors, (24), 21 states have call predecessors, (24), 24 states have call successors, (24) [2022-04-07 17:20:04,942 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:20:04,943 INFO L93 Difference]: Finished difference Result 193 states and 203 transitions. [2022-04-07 17:20:04,943 INFO L276 IsEmpty]: Start isEmpty. Operand 193 states and 203 transitions. [2022-04-07 17:20:04,943 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:20:04,943 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:20:04,943 INFO L74 IsIncluded]: Start isIncluded. First operand has 183 states, 140 states have (on average 1.0285714285714285) internal successors, (144), 143 states have internal predecessors, (144), 25 states have call successors, (25), 18 states have call predecessors, (25), 17 states have return successors, (24), 21 states have call predecessors, (24), 24 states have call successors, (24) Second operand 193 states. [2022-04-07 17:20:04,944 INFO L87 Difference]: Start difference. First operand has 183 states, 140 states have (on average 1.0285714285714285) internal successors, (144), 143 states have internal predecessors, (144), 25 states have call successors, (25), 18 states have call predecessors, (25), 17 states have return successors, (24), 21 states have call predecessors, (24), 24 states have call successors, (24) Second operand 193 states. [2022-04-07 17:20:04,947 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:20:04,947 INFO L93 Difference]: Finished difference Result 193 states and 203 transitions. [2022-04-07 17:20:04,947 INFO L276 IsEmpty]: Start isEmpty. Operand 193 states and 203 transitions. [2022-04-07 17:20:04,948 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:20:04,948 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:20:04,948 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:20:04,948 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:20:04,948 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 183 states, 140 states have (on average 1.0285714285714285) internal successors, (144), 143 states have internal predecessors, (144), 25 states have call successors, (25), 18 states have call predecessors, (25), 17 states have return successors, (24), 21 states have call predecessors, (24), 24 states have call successors, (24) [2022-04-07 17:20:04,951 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 183 states to 183 states and 193 transitions. [2022-04-07 17:20:04,951 INFO L78 Accepts]: Start accepts. Automaton has 183 states and 193 transitions. Word has length 90 [2022-04-07 17:20:04,951 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:20:04,951 INFO L478 AbstractCegarLoop]: Abstraction has 183 states and 193 transitions. [2022-04-07 17:20:04,951 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 39 states, 38 states have (on average 2.3684210526315788) internal successors, (90), 36 states have internal predecessors, (90), 16 states have call successors, (20), 5 states have call predecessors, (20), 2 states have return successors, (16), 15 states have call predecessors, (16), 15 states have call successors, (16) [2022-04-07 17:20:04,952 INFO L276 IsEmpty]: Start isEmpty. Operand 183 states and 193 transitions. [2022-04-07 17:20:04,952 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2022-04-07 17:20:04,952 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:20:04,952 INFO L499 BasicCegarLoop]: trace histogram [9, 9, 9, 8, 8, 8, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:20:04,983 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Forceful destruction successful, exit code 0 [2022-04-07 17:20:05,175 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23,23 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:20:05,176 INFO L403 AbstractCegarLoop]: === Iteration 25 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:20:05,176 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:20:05,176 INFO L85 PathProgramCache]: Analyzing trace with hash -1271043385, now seen corresponding path program 22 times [2022-04-07 17:20:05,176 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:20:05,176 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1804535130] [2022-04-07 17:20:05,176 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:20:05,176 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:20:05,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:20:05,407 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:20:05,409 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:20:05,410 INFO L290 TraceCheckUtils]: 0: Hoare triple {18236#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {18180#true} is VALID [2022-04-07 17:20:05,411 INFO L290 TraceCheckUtils]: 1: Hoare triple {18180#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:05,411 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {18180#true} {18180#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:05,411 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 26 [2022-04-07 17:20:05,412 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:20:05,413 INFO L290 TraceCheckUtils]: 0: Hoare triple {18180#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18180#true} is VALID [2022-04-07 17:20:05,414 INFO L290 TraceCheckUtils]: 1: Hoare triple {18180#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:05,414 INFO L290 TraceCheckUtils]: 2: Hoare triple {18180#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:05,414 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {18180#true} {18195#(and (<= main_~n~0 8) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18195#(and (<= main_~n~0 8) (= main_~i~1 0))} is VALID [2022-04-07 17:20:05,414 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 34 [2022-04-07 17:20:05,415 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:20:05,417 INFO L290 TraceCheckUtils]: 0: Hoare triple {18180#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18180#true} is VALID [2022-04-07 17:20:05,417 INFO L290 TraceCheckUtils]: 1: Hoare triple {18180#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:05,417 INFO L290 TraceCheckUtils]: 2: Hoare triple {18180#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:05,418 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {18180#true} {18200#(<= main_~n~0 (+ 7 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18200#(<= main_~n~0 (+ 7 main_~i~1))} is VALID [2022-04-07 17:20:05,418 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 42 [2022-04-07 17:20:05,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:20:05,423 INFO L290 TraceCheckUtils]: 0: Hoare triple {18180#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18180#true} is VALID [2022-04-07 17:20:05,424 INFO L290 TraceCheckUtils]: 1: Hoare triple {18180#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:05,424 INFO L290 TraceCheckUtils]: 2: Hoare triple {18180#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:05,424 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {18180#true} {18205#(<= main_~n~0 (+ main_~i~1 6))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18205#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-07 17:20:05,425 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 50 [2022-04-07 17:20:05,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:20:05,427 INFO L290 TraceCheckUtils]: 0: Hoare triple {18180#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18180#true} is VALID [2022-04-07 17:20:05,427 INFO L290 TraceCheckUtils]: 1: Hoare triple {18180#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:05,428 INFO L290 TraceCheckUtils]: 2: Hoare triple {18180#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:05,428 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {18180#true} {18210#(<= main_~n~0 (+ 5 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18210#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-07 17:20:05,428 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 58 [2022-04-07 17:20:05,429 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:20:05,431 INFO L290 TraceCheckUtils]: 0: Hoare triple {18180#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18180#true} is VALID [2022-04-07 17:20:05,431 INFO L290 TraceCheckUtils]: 1: Hoare triple {18180#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:05,431 INFO L290 TraceCheckUtils]: 2: Hoare triple {18180#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:05,432 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {18180#true} {18215#(<= main_~n~0 (+ main_~i~1 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18215#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-07 17:20:05,432 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 66 [2022-04-07 17:20:05,433 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:20:05,435 INFO L290 TraceCheckUtils]: 0: Hoare triple {18180#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18180#true} is VALID [2022-04-07 17:20:05,435 INFO L290 TraceCheckUtils]: 1: Hoare triple {18180#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:05,435 INFO L290 TraceCheckUtils]: 2: Hoare triple {18180#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:05,435 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {18180#true} {18220#(<= main_~n~0 (+ main_~i~1 3))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18220#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-07 17:20:05,436 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 74 [2022-04-07 17:20:05,436 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:20:05,438 INFO L290 TraceCheckUtils]: 0: Hoare triple {18180#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18180#true} is VALID [2022-04-07 17:20:05,438 INFO L290 TraceCheckUtils]: 1: Hoare triple {18180#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:05,438 INFO L290 TraceCheckUtils]: 2: Hoare triple {18180#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:05,439 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {18180#true} {18225#(<= main_~n~0 (+ main_~i~1 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18225#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 17:20:05,439 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 82 [2022-04-07 17:20:05,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:20:05,444 INFO L290 TraceCheckUtils]: 0: Hoare triple {18180#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18180#true} is VALID [2022-04-07 17:20:05,444 INFO L290 TraceCheckUtils]: 1: Hoare triple {18180#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:05,444 INFO L290 TraceCheckUtils]: 2: Hoare triple {18180#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:05,444 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {18180#true} {18230#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18230#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 17:20:05,445 INFO L272 TraceCheckUtils]: 0: Hoare triple {18180#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18236#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:20:05,445 INFO L290 TraceCheckUtils]: 1: Hoare triple {18236#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {18180#true} is VALID [2022-04-07 17:20:05,445 INFO L290 TraceCheckUtils]: 2: Hoare triple {18180#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:05,445 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {18180#true} {18180#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:05,445 INFO L272 TraceCheckUtils]: 4: Hoare triple {18180#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:05,445 INFO L290 TraceCheckUtils]: 5: Hoare triple {18180#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {18180#true} is VALID [2022-04-07 17:20:05,446 INFO L290 TraceCheckUtils]: 6: Hoare triple {18180#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {18185#(= main_~i~0 0)} is VALID [2022-04-07 17:20:05,446 INFO L290 TraceCheckUtils]: 7: Hoare triple {18185#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18185#(= main_~i~0 0)} is VALID [2022-04-07 17:20:05,446 INFO L290 TraceCheckUtils]: 8: Hoare triple {18185#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18186#(<= main_~i~0 1)} is VALID [2022-04-07 17:20:05,447 INFO L290 TraceCheckUtils]: 9: Hoare triple {18186#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18186#(<= main_~i~0 1)} is VALID [2022-04-07 17:20:05,447 INFO L290 TraceCheckUtils]: 10: Hoare triple {18186#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18187#(<= main_~i~0 2)} is VALID [2022-04-07 17:20:05,448 INFO L290 TraceCheckUtils]: 11: Hoare triple {18187#(<= main_~i~0 2)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18187#(<= main_~i~0 2)} is VALID [2022-04-07 17:20:05,448 INFO L290 TraceCheckUtils]: 12: Hoare triple {18187#(<= main_~i~0 2)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18188#(<= main_~i~0 3)} is VALID [2022-04-07 17:20:05,448 INFO L290 TraceCheckUtils]: 13: Hoare triple {18188#(<= main_~i~0 3)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18188#(<= main_~i~0 3)} is VALID [2022-04-07 17:20:05,449 INFO L290 TraceCheckUtils]: 14: Hoare triple {18188#(<= main_~i~0 3)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18189#(<= main_~i~0 4)} is VALID [2022-04-07 17:20:05,449 INFO L290 TraceCheckUtils]: 15: Hoare triple {18189#(<= main_~i~0 4)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18189#(<= main_~i~0 4)} is VALID [2022-04-07 17:20:05,450 INFO L290 TraceCheckUtils]: 16: Hoare triple {18189#(<= main_~i~0 4)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18190#(<= main_~i~0 5)} is VALID [2022-04-07 17:20:05,450 INFO L290 TraceCheckUtils]: 17: Hoare triple {18190#(<= main_~i~0 5)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18190#(<= main_~i~0 5)} is VALID [2022-04-07 17:20:05,450 INFO L290 TraceCheckUtils]: 18: Hoare triple {18190#(<= main_~i~0 5)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18191#(<= main_~i~0 6)} is VALID [2022-04-07 17:20:05,451 INFO L290 TraceCheckUtils]: 19: Hoare triple {18191#(<= main_~i~0 6)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18191#(<= main_~i~0 6)} is VALID [2022-04-07 17:20:05,451 INFO L290 TraceCheckUtils]: 20: Hoare triple {18191#(<= main_~i~0 6)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18192#(<= main_~i~0 7)} is VALID [2022-04-07 17:20:05,451 INFO L290 TraceCheckUtils]: 21: Hoare triple {18192#(<= main_~i~0 7)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18192#(<= main_~i~0 7)} is VALID [2022-04-07 17:20:05,452 INFO L290 TraceCheckUtils]: 22: Hoare triple {18192#(<= main_~i~0 7)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18193#(<= main_~i~0 8)} is VALID [2022-04-07 17:20:05,452 INFO L290 TraceCheckUtils]: 23: Hoare triple {18193#(<= main_~i~0 8)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {18194#(<= main_~n~0 8)} is VALID [2022-04-07 17:20:05,453 INFO L290 TraceCheckUtils]: 24: Hoare triple {18194#(<= main_~n~0 8)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {18195#(and (<= main_~n~0 8) (= main_~i~1 0))} is VALID [2022-04-07 17:20:05,453 INFO L290 TraceCheckUtils]: 25: Hoare triple {18195#(and (<= main_~n~0 8) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18195#(and (<= main_~n~0 8) (= main_~i~1 0))} is VALID [2022-04-07 17:20:05,453 INFO L272 TraceCheckUtils]: 26: Hoare triple {18195#(and (<= main_~n~0 8) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18180#true} is VALID [2022-04-07 17:20:05,453 INFO L290 TraceCheckUtils]: 27: Hoare triple {18180#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18180#true} is VALID [2022-04-07 17:20:05,453 INFO L290 TraceCheckUtils]: 28: Hoare triple {18180#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:05,453 INFO L290 TraceCheckUtils]: 29: Hoare triple {18180#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:05,454 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {18180#true} {18195#(and (<= main_~n~0 8) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18195#(and (<= main_~n~0 8) (= main_~i~1 0))} is VALID [2022-04-07 17:20:05,454 INFO L290 TraceCheckUtils]: 31: Hoare triple {18195#(and (<= main_~n~0 8) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18195#(and (<= main_~n~0 8) (= main_~i~1 0))} is VALID [2022-04-07 17:20:05,455 INFO L290 TraceCheckUtils]: 32: Hoare triple {18195#(and (<= main_~n~0 8) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18200#(<= main_~n~0 (+ 7 main_~i~1))} is VALID [2022-04-07 17:20:05,455 INFO L290 TraceCheckUtils]: 33: Hoare triple {18200#(<= main_~n~0 (+ 7 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18200#(<= main_~n~0 (+ 7 main_~i~1))} is VALID [2022-04-07 17:20:05,455 INFO L272 TraceCheckUtils]: 34: Hoare triple {18200#(<= main_~n~0 (+ 7 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18180#true} is VALID [2022-04-07 17:20:05,455 INFO L290 TraceCheckUtils]: 35: Hoare triple {18180#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18180#true} is VALID [2022-04-07 17:20:05,455 INFO L290 TraceCheckUtils]: 36: Hoare triple {18180#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:05,455 INFO L290 TraceCheckUtils]: 37: Hoare triple {18180#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:05,456 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {18180#true} {18200#(<= main_~n~0 (+ 7 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18200#(<= main_~n~0 (+ 7 main_~i~1))} is VALID [2022-04-07 17:20:05,456 INFO L290 TraceCheckUtils]: 39: Hoare triple {18200#(<= main_~n~0 (+ 7 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18200#(<= main_~n~0 (+ 7 main_~i~1))} is VALID [2022-04-07 17:20:05,456 INFO L290 TraceCheckUtils]: 40: Hoare triple {18200#(<= main_~n~0 (+ 7 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18205#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-07 17:20:05,457 INFO L290 TraceCheckUtils]: 41: Hoare triple {18205#(<= main_~n~0 (+ main_~i~1 6))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18205#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-07 17:20:05,457 INFO L272 TraceCheckUtils]: 42: Hoare triple {18205#(<= main_~n~0 (+ main_~i~1 6))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18180#true} is VALID [2022-04-07 17:20:05,457 INFO L290 TraceCheckUtils]: 43: Hoare triple {18180#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18180#true} is VALID [2022-04-07 17:20:05,457 INFO L290 TraceCheckUtils]: 44: Hoare triple {18180#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:05,457 INFO L290 TraceCheckUtils]: 45: Hoare triple {18180#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:05,458 INFO L284 TraceCheckUtils]: 46: Hoare quadruple {18180#true} {18205#(<= main_~n~0 (+ main_~i~1 6))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18205#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-07 17:20:05,458 INFO L290 TraceCheckUtils]: 47: Hoare triple {18205#(<= main_~n~0 (+ main_~i~1 6))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18205#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-07 17:20:05,459 INFO L290 TraceCheckUtils]: 48: Hoare triple {18205#(<= main_~n~0 (+ main_~i~1 6))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18210#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-07 17:20:05,459 INFO L290 TraceCheckUtils]: 49: Hoare triple {18210#(<= main_~n~0 (+ 5 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18210#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-07 17:20:05,459 INFO L272 TraceCheckUtils]: 50: Hoare triple {18210#(<= main_~n~0 (+ 5 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18180#true} is VALID [2022-04-07 17:20:05,459 INFO L290 TraceCheckUtils]: 51: Hoare triple {18180#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18180#true} is VALID [2022-04-07 17:20:05,459 INFO L290 TraceCheckUtils]: 52: Hoare triple {18180#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:05,459 INFO L290 TraceCheckUtils]: 53: Hoare triple {18180#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:05,460 INFO L284 TraceCheckUtils]: 54: Hoare quadruple {18180#true} {18210#(<= main_~n~0 (+ 5 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18210#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-07 17:20:05,460 INFO L290 TraceCheckUtils]: 55: Hoare triple {18210#(<= main_~n~0 (+ 5 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18210#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-07 17:20:05,460 INFO L290 TraceCheckUtils]: 56: Hoare triple {18210#(<= main_~n~0 (+ 5 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18215#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-07 17:20:05,461 INFO L290 TraceCheckUtils]: 57: Hoare triple {18215#(<= main_~n~0 (+ main_~i~1 4))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18215#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-07 17:20:05,461 INFO L272 TraceCheckUtils]: 58: Hoare triple {18215#(<= main_~n~0 (+ main_~i~1 4))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18180#true} is VALID [2022-04-07 17:20:05,461 INFO L290 TraceCheckUtils]: 59: Hoare triple {18180#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18180#true} is VALID [2022-04-07 17:20:05,461 INFO L290 TraceCheckUtils]: 60: Hoare triple {18180#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:05,461 INFO L290 TraceCheckUtils]: 61: Hoare triple {18180#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:05,462 INFO L284 TraceCheckUtils]: 62: Hoare quadruple {18180#true} {18215#(<= main_~n~0 (+ main_~i~1 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18215#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-07 17:20:05,462 INFO L290 TraceCheckUtils]: 63: Hoare triple {18215#(<= main_~n~0 (+ main_~i~1 4))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18215#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-07 17:20:05,462 INFO L290 TraceCheckUtils]: 64: Hoare triple {18215#(<= main_~n~0 (+ main_~i~1 4))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18220#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-07 17:20:05,463 INFO L290 TraceCheckUtils]: 65: Hoare triple {18220#(<= main_~n~0 (+ main_~i~1 3))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18220#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-07 17:20:05,463 INFO L272 TraceCheckUtils]: 66: Hoare triple {18220#(<= main_~n~0 (+ main_~i~1 3))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18180#true} is VALID [2022-04-07 17:20:05,463 INFO L290 TraceCheckUtils]: 67: Hoare triple {18180#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18180#true} is VALID [2022-04-07 17:20:05,463 INFO L290 TraceCheckUtils]: 68: Hoare triple {18180#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:05,463 INFO L290 TraceCheckUtils]: 69: Hoare triple {18180#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:05,464 INFO L284 TraceCheckUtils]: 70: Hoare quadruple {18180#true} {18220#(<= main_~n~0 (+ main_~i~1 3))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18220#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-07 17:20:05,464 INFO L290 TraceCheckUtils]: 71: Hoare triple {18220#(<= main_~n~0 (+ main_~i~1 3))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18220#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-07 17:20:05,464 INFO L290 TraceCheckUtils]: 72: Hoare triple {18220#(<= main_~n~0 (+ main_~i~1 3))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18225#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 17:20:05,465 INFO L290 TraceCheckUtils]: 73: Hoare triple {18225#(<= main_~n~0 (+ main_~i~1 2))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18225#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 17:20:05,465 INFO L272 TraceCheckUtils]: 74: Hoare triple {18225#(<= main_~n~0 (+ main_~i~1 2))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18180#true} is VALID [2022-04-07 17:20:05,465 INFO L290 TraceCheckUtils]: 75: Hoare triple {18180#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18180#true} is VALID [2022-04-07 17:20:05,465 INFO L290 TraceCheckUtils]: 76: Hoare triple {18180#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:05,465 INFO L290 TraceCheckUtils]: 77: Hoare triple {18180#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:05,466 INFO L284 TraceCheckUtils]: 78: Hoare quadruple {18180#true} {18225#(<= main_~n~0 (+ main_~i~1 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18225#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 17:20:05,466 INFO L290 TraceCheckUtils]: 79: Hoare triple {18225#(<= main_~n~0 (+ main_~i~1 2))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18225#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 17:20:05,466 INFO L290 TraceCheckUtils]: 80: Hoare triple {18225#(<= main_~n~0 (+ main_~i~1 2))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18230#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 17:20:05,467 INFO L290 TraceCheckUtils]: 81: Hoare triple {18230#(<= main_~n~0 (+ main_~i~1 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18230#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 17:20:05,467 INFO L272 TraceCheckUtils]: 82: Hoare triple {18230#(<= main_~n~0 (+ main_~i~1 1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18180#true} is VALID [2022-04-07 17:20:05,467 INFO L290 TraceCheckUtils]: 83: Hoare triple {18180#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18180#true} is VALID [2022-04-07 17:20:05,467 INFO L290 TraceCheckUtils]: 84: Hoare triple {18180#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:05,467 INFO L290 TraceCheckUtils]: 85: Hoare triple {18180#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:05,468 INFO L284 TraceCheckUtils]: 86: Hoare quadruple {18180#true} {18230#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18230#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 17:20:05,468 INFO L290 TraceCheckUtils]: 87: Hoare triple {18230#(<= main_~n~0 (+ main_~i~1 1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18230#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 17:20:05,468 INFO L290 TraceCheckUtils]: 88: Hoare triple {18230#(<= main_~n~0 (+ main_~i~1 1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18235#(<= main_~n~0 main_~i~1)} is VALID [2022-04-07 17:20:05,469 INFO L290 TraceCheckUtils]: 89: Hoare triple {18235#(<= main_~n~0 main_~i~1)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18181#false} is VALID [2022-04-07 17:20:05,469 INFO L272 TraceCheckUtils]: 90: Hoare triple {18181#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18181#false} is VALID [2022-04-07 17:20:05,469 INFO L290 TraceCheckUtils]: 91: Hoare triple {18181#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18181#false} is VALID [2022-04-07 17:20:05,469 INFO L290 TraceCheckUtils]: 92: Hoare triple {18181#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {18181#false} is VALID [2022-04-07 17:20:05,469 INFO L290 TraceCheckUtils]: 93: Hoare triple {18181#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18181#false} is VALID [2022-04-07 17:20:05,470 INFO L134 CoverageAnalysis]: Checked inductivity of 320 backedges. 115 proven. 93 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2022-04-07 17:20:05,470 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:20:05,470 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1804535130] [2022-04-07 17:20:05,470 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1804535130] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:20:05,470 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [419177645] [2022-04-07 17:20:05,470 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-07 17:20:05,471 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:20:05,471 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:20:05,472 INFO L229 MonitoredProcess]: Starting monitored process 24 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:20:05,495 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Waiting until timeout for monitored process [2022-04-07 17:20:05,675 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-07 17:20:05,675 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 17:20:05,677 INFO L263 TraceCheckSpWp]: Trace formula consists of 250 conjuncts, 20 conjunts are in the unsatisfiable core [2022-04-07 17:20:05,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:20:05,699 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:20:06,463 INFO L272 TraceCheckUtils]: 0: Hoare triple {18180#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:06,463 INFO L290 TraceCheckUtils]: 1: Hoare triple {18180#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {18180#true} is VALID [2022-04-07 17:20:06,463 INFO L290 TraceCheckUtils]: 2: Hoare triple {18180#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:06,463 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {18180#true} {18180#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:06,463 INFO L272 TraceCheckUtils]: 4: Hoare triple {18180#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:06,463 INFO L290 TraceCheckUtils]: 5: Hoare triple {18180#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {18180#true} is VALID [2022-04-07 17:20:06,464 INFO L290 TraceCheckUtils]: 6: Hoare triple {18180#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {18258#(<= main_~i~0 0)} is VALID [2022-04-07 17:20:06,464 INFO L290 TraceCheckUtils]: 7: Hoare triple {18258#(<= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18258#(<= main_~i~0 0)} is VALID [2022-04-07 17:20:06,465 INFO L290 TraceCheckUtils]: 8: Hoare triple {18258#(<= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18186#(<= main_~i~0 1)} is VALID [2022-04-07 17:20:06,465 INFO L290 TraceCheckUtils]: 9: Hoare triple {18186#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18186#(<= main_~i~0 1)} is VALID [2022-04-07 17:20:06,466 INFO L290 TraceCheckUtils]: 10: Hoare triple {18186#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18187#(<= main_~i~0 2)} is VALID [2022-04-07 17:20:06,466 INFO L290 TraceCheckUtils]: 11: Hoare triple {18187#(<= main_~i~0 2)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18187#(<= main_~i~0 2)} is VALID [2022-04-07 17:20:06,466 INFO L290 TraceCheckUtils]: 12: Hoare triple {18187#(<= main_~i~0 2)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18188#(<= main_~i~0 3)} is VALID [2022-04-07 17:20:06,467 INFO L290 TraceCheckUtils]: 13: Hoare triple {18188#(<= main_~i~0 3)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18188#(<= main_~i~0 3)} is VALID [2022-04-07 17:20:06,467 INFO L290 TraceCheckUtils]: 14: Hoare triple {18188#(<= main_~i~0 3)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18189#(<= main_~i~0 4)} is VALID [2022-04-07 17:20:06,468 INFO L290 TraceCheckUtils]: 15: Hoare triple {18189#(<= main_~i~0 4)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18189#(<= main_~i~0 4)} is VALID [2022-04-07 17:20:06,468 INFO L290 TraceCheckUtils]: 16: Hoare triple {18189#(<= main_~i~0 4)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18190#(<= main_~i~0 5)} is VALID [2022-04-07 17:20:06,468 INFO L290 TraceCheckUtils]: 17: Hoare triple {18190#(<= main_~i~0 5)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18190#(<= main_~i~0 5)} is VALID [2022-04-07 17:20:06,469 INFO L290 TraceCheckUtils]: 18: Hoare triple {18190#(<= main_~i~0 5)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18191#(<= main_~i~0 6)} is VALID [2022-04-07 17:20:06,469 INFO L290 TraceCheckUtils]: 19: Hoare triple {18191#(<= main_~i~0 6)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18191#(<= main_~i~0 6)} is VALID [2022-04-07 17:20:06,470 INFO L290 TraceCheckUtils]: 20: Hoare triple {18191#(<= main_~i~0 6)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18192#(<= main_~i~0 7)} is VALID [2022-04-07 17:20:06,470 INFO L290 TraceCheckUtils]: 21: Hoare triple {18192#(<= main_~i~0 7)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18192#(<= main_~i~0 7)} is VALID [2022-04-07 17:20:06,471 INFO L290 TraceCheckUtils]: 22: Hoare triple {18192#(<= main_~i~0 7)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18193#(<= main_~i~0 8)} is VALID [2022-04-07 17:20:06,471 INFO L290 TraceCheckUtils]: 23: Hoare triple {18193#(<= main_~i~0 8)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {18194#(<= main_~n~0 8)} is VALID [2022-04-07 17:20:06,472 INFO L290 TraceCheckUtils]: 24: Hoare triple {18194#(<= main_~n~0 8)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {18313#(and (<= 0 main_~i~1) (<= main_~n~0 8))} is VALID [2022-04-07 17:20:06,472 INFO L290 TraceCheckUtils]: 25: Hoare triple {18313#(and (<= 0 main_~i~1) (<= main_~n~0 8))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18313#(and (<= 0 main_~i~1) (<= main_~n~0 8))} is VALID [2022-04-07 17:20:06,472 INFO L272 TraceCheckUtils]: 26: Hoare triple {18313#(and (<= 0 main_~i~1) (<= main_~n~0 8))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18180#true} is VALID [2022-04-07 17:20:06,472 INFO L290 TraceCheckUtils]: 27: Hoare triple {18180#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18180#true} is VALID [2022-04-07 17:20:06,472 INFO L290 TraceCheckUtils]: 28: Hoare triple {18180#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:06,472 INFO L290 TraceCheckUtils]: 29: Hoare triple {18180#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:06,473 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {18180#true} {18313#(and (<= 0 main_~i~1) (<= main_~n~0 8))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18313#(and (<= 0 main_~i~1) (<= main_~n~0 8))} is VALID [2022-04-07 17:20:06,473 INFO L290 TraceCheckUtils]: 31: Hoare triple {18313#(and (<= 0 main_~i~1) (<= main_~n~0 8))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18313#(and (<= 0 main_~i~1) (<= main_~n~0 8))} is VALID [2022-04-07 17:20:06,474 INFO L290 TraceCheckUtils]: 32: Hoare triple {18313#(and (<= 0 main_~i~1) (<= main_~n~0 8))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18338#(and (<= 1 main_~i~1) (<= main_~n~0 8))} is VALID [2022-04-07 17:20:06,474 INFO L290 TraceCheckUtils]: 33: Hoare triple {18338#(and (<= 1 main_~i~1) (<= main_~n~0 8))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18338#(and (<= 1 main_~i~1) (<= main_~n~0 8))} is VALID [2022-04-07 17:20:06,475 INFO L272 TraceCheckUtils]: 34: Hoare triple {18338#(and (<= 1 main_~i~1) (<= main_~n~0 8))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18180#true} is VALID [2022-04-07 17:20:06,475 INFO L290 TraceCheckUtils]: 35: Hoare triple {18180#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18180#true} is VALID [2022-04-07 17:20:06,475 INFO L290 TraceCheckUtils]: 36: Hoare triple {18180#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:06,475 INFO L290 TraceCheckUtils]: 37: Hoare triple {18180#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:06,475 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {18180#true} {18338#(and (<= 1 main_~i~1) (<= main_~n~0 8))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18338#(and (<= 1 main_~i~1) (<= main_~n~0 8))} is VALID [2022-04-07 17:20:06,476 INFO L290 TraceCheckUtils]: 39: Hoare triple {18338#(and (<= 1 main_~i~1) (<= main_~n~0 8))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18338#(and (<= 1 main_~i~1) (<= main_~n~0 8))} is VALID [2022-04-07 17:20:06,476 INFO L290 TraceCheckUtils]: 40: Hoare triple {18338#(and (<= 1 main_~i~1) (<= main_~n~0 8))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18363#(and (<= main_~n~0 8) (<= 2 main_~i~1))} is VALID [2022-04-07 17:20:06,477 INFO L290 TraceCheckUtils]: 41: Hoare triple {18363#(and (<= main_~n~0 8) (<= 2 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18363#(and (<= main_~n~0 8) (<= 2 main_~i~1))} is VALID [2022-04-07 17:20:06,477 INFO L272 TraceCheckUtils]: 42: Hoare triple {18363#(and (<= main_~n~0 8) (<= 2 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18180#true} is VALID [2022-04-07 17:20:06,477 INFO L290 TraceCheckUtils]: 43: Hoare triple {18180#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18180#true} is VALID [2022-04-07 17:20:06,477 INFO L290 TraceCheckUtils]: 44: Hoare triple {18180#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:06,477 INFO L290 TraceCheckUtils]: 45: Hoare triple {18180#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:06,478 INFO L284 TraceCheckUtils]: 46: Hoare quadruple {18180#true} {18363#(and (<= main_~n~0 8) (<= 2 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18363#(and (<= main_~n~0 8) (<= 2 main_~i~1))} is VALID [2022-04-07 17:20:06,478 INFO L290 TraceCheckUtils]: 47: Hoare triple {18363#(and (<= main_~n~0 8) (<= 2 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18363#(and (<= main_~n~0 8) (<= 2 main_~i~1))} is VALID [2022-04-07 17:20:06,479 INFO L290 TraceCheckUtils]: 48: Hoare triple {18363#(and (<= main_~n~0 8) (<= 2 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18388#(and (<= main_~n~0 8) (<= 3 main_~i~1))} is VALID [2022-04-07 17:20:06,479 INFO L290 TraceCheckUtils]: 49: Hoare triple {18388#(and (<= main_~n~0 8) (<= 3 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18388#(and (<= main_~n~0 8) (<= 3 main_~i~1))} is VALID [2022-04-07 17:20:06,479 INFO L272 TraceCheckUtils]: 50: Hoare triple {18388#(and (<= main_~n~0 8) (<= 3 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18180#true} is VALID [2022-04-07 17:20:06,479 INFO L290 TraceCheckUtils]: 51: Hoare triple {18180#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18180#true} is VALID [2022-04-07 17:20:06,479 INFO L290 TraceCheckUtils]: 52: Hoare triple {18180#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:06,479 INFO L290 TraceCheckUtils]: 53: Hoare triple {18180#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:06,480 INFO L284 TraceCheckUtils]: 54: Hoare quadruple {18180#true} {18388#(and (<= main_~n~0 8) (<= 3 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18388#(and (<= main_~n~0 8) (<= 3 main_~i~1))} is VALID [2022-04-07 17:20:06,480 INFO L290 TraceCheckUtils]: 55: Hoare triple {18388#(and (<= main_~n~0 8) (<= 3 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18388#(and (<= main_~n~0 8) (<= 3 main_~i~1))} is VALID [2022-04-07 17:20:06,481 INFO L290 TraceCheckUtils]: 56: Hoare triple {18388#(and (<= main_~n~0 8) (<= 3 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18413#(and (<= main_~n~0 8) (<= 4 main_~i~1))} is VALID [2022-04-07 17:20:06,481 INFO L290 TraceCheckUtils]: 57: Hoare triple {18413#(and (<= main_~n~0 8) (<= 4 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18413#(and (<= main_~n~0 8) (<= 4 main_~i~1))} is VALID [2022-04-07 17:20:06,481 INFO L272 TraceCheckUtils]: 58: Hoare triple {18413#(and (<= main_~n~0 8) (<= 4 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18180#true} is VALID [2022-04-07 17:20:06,482 INFO L290 TraceCheckUtils]: 59: Hoare triple {18180#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18180#true} is VALID [2022-04-07 17:20:06,482 INFO L290 TraceCheckUtils]: 60: Hoare triple {18180#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:06,482 INFO L290 TraceCheckUtils]: 61: Hoare triple {18180#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:06,482 INFO L284 TraceCheckUtils]: 62: Hoare quadruple {18180#true} {18413#(and (<= main_~n~0 8) (<= 4 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18413#(and (<= main_~n~0 8) (<= 4 main_~i~1))} is VALID [2022-04-07 17:20:06,483 INFO L290 TraceCheckUtils]: 63: Hoare triple {18413#(and (<= main_~n~0 8) (<= 4 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18413#(and (<= main_~n~0 8) (<= 4 main_~i~1))} is VALID [2022-04-07 17:20:06,483 INFO L290 TraceCheckUtils]: 64: Hoare triple {18413#(and (<= main_~n~0 8) (<= 4 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18438#(and (<= main_~n~0 8) (<= 5 main_~i~1))} is VALID [2022-04-07 17:20:06,484 INFO L290 TraceCheckUtils]: 65: Hoare triple {18438#(and (<= main_~n~0 8) (<= 5 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18438#(and (<= main_~n~0 8) (<= 5 main_~i~1))} is VALID [2022-04-07 17:20:06,484 INFO L272 TraceCheckUtils]: 66: Hoare triple {18438#(and (<= main_~n~0 8) (<= 5 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18180#true} is VALID [2022-04-07 17:20:06,484 INFO L290 TraceCheckUtils]: 67: Hoare triple {18180#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18180#true} is VALID [2022-04-07 17:20:06,484 INFO L290 TraceCheckUtils]: 68: Hoare triple {18180#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:06,484 INFO L290 TraceCheckUtils]: 69: Hoare triple {18180#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:06,485 INFO L284 TraceCheckUtils]: 70: Hoare quadruple {18180#true} {18438#(and (<= main_~n~0 8) (<= 5 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18438#(and (<= main_~n~0 8) (<= 5 main_~i~1))} is VALID [2022-04-07 17:20:06,485 INFO L290 TraceCheckUtils]: 71: Hoare triple {18438#(and (<= main_~n~0 8) (<= 5 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18438#(and (<= main_~n~0 8) (<= 5 main_~i~1))} is VALID [2022-04-07 17:20:06,486 INFO L290 TraceCheckUtils]: 72: Hoare triple {18438#(and (<= main_~n~0 8) (<= 5 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18463#(and (<= 6 main_~i~1) (<= main_~n~0 8))} is VALID [2022-04-07 17:20:06,486 INFO L290 TraceCheckUtils]: 73: Hoare triple {18463#(and (<= 6 main_~i~1) (<= main_~n~0 8))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18463#(and (<= 6 main_~i~1) (<= main_~n~0 8))} is VALID [2022-04-07 17:20:06,486 INFO L272 TraceCheckUtils]: 74: Hoare triple {18463#(and (<= 6 main_~i~1) (<= main_~n~0 8))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18180#true} is VALID [2022-04-07 17:20:06,486 INFO L290 TraceCheckUtils]: 75: Hoare triple {18180#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18180#true} is VALID [2022-04-07 17:20:06,487 INFO L290 TraceCheckUtils]: 76: Hoare triple {18180#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:06,487 INFO L290 TraceCheckUtils]: 77: Hoare triple {18180#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:06,487 INFO L284 TraceCheckUtils]: 78: Hoare quadruple {18180#true} {18463#(and (<= 6 main_~i~1) (<= main_~n~0 8))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18463#(and (<= 6 main_~i~1) (<= main_~n~0 8))} is VALID [2022-04-07 17:20:06,488 INFO L290 TraceCheckUtils]: 79: Hoare triple {18463#(and (<= 6 main_~i~1) (<= main_~n~0 8))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18463#(and (<= 6 main_~i~1) (<= main_~n~0 8))} is VALID [2022-04-07 17:20:06,488 INFO L290 TraceCheckUtils]: 80: Hoare triple {18463#(and (<= 6 main_~i~1) (<= main_~n~0 8))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18488#(and (<= 7 main_~i~1) (<= main_~n~0 8))} is VALID [2022-04-07 17:20:06,489 INFO L290 TraceCheckUtils]: 81: Hoare triple {18488#(and (<= 7 main_~i~1) (<= main_~n~0 8))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18488#(and (<= 7 main_~i~1) (<= main_~n~0 8))} is VALID [2022-04-07 17:20:06,489 INFO L272 TraceCheckUtils]: 82: Hoare triple {18488#(and (<= 7 main_~i~1) (<= main_~n~0 8))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18180#true} is VALID [2022-04-07 17:20:06,489 INFO L290 TraceCheckUtils]: 83: Hoare triple {18180#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18180#true} is VALID [2022-04-07 17:20:06,489 INFO L290 TraceCheckUtils]: 84: Hoare triple {18180#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:06,489 INFO L290 TraceCheckUtils]: 85: Hoare triple {18180#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:06,490 INFO L284 TraceCheckUtils]: 86: Hoare quadruple {18180#true} {18488#(and (<= 7 main_~i~1) (<= main_~n~0 8))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18488#(and (<= 7 main_~i~1) (<= main_~n~0 8))} is VALID [2022-04-07 17:20:06,490 INFO L290 TraceCheckUtils]: 87: Hoare triple {18488#(and (<= 7 main_~i~1) (<= main_~n~0 8))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18488#(and (<= 7 main_~i~1) (<= main_~n~0 8))} is VALID [2022-04-07 17:20:06,491 INFO L290 TraceCheckUtils]: 88: Hoare triple {18488#(and (<= 7 main_~i~1) (<= main_~n~0 8))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18513#(and (<= main_~n~0 8) (<= 8 main_~i~1))} is VALID [2022-04-07 17:20:06,491 INFO L290 TraceCheckUtils]: 89: Hoare triple {18513#(and (<= main_~n~0 8) (<= 8 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18181#false} is VALID [2022-04-07 17:20:06,491 INFO L272 TraceCheckUtils]: 90: Hoare triple {18181#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18181#false} is VALID [2022-04-07 17:20:06,491 INFO L290 TraceCheckUtils]: 91: Hoare triple {18181#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18181#false} is VALID [2022-04-07 17:20:06,491 INFO L290 TraceCheckUtils]: 92: Hoare triple {18181#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {18181#false} is VALID [2022-04-07 17:20:06,492 INFO L290 TraceCheckUtils]: 93: Hoare triple {18181#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18181#false} is VALID [2022-04-07 17:20:06,492 INFO L134 CoverageAnalysis]: Checked inductivity of 320 backedges. 144 proven. 64 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2022-04-07 17:20:06,492 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 17:20:06,894 INFO L290 TraceCheckUtils]: 93: Hoare triple {18181#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18181#false} is VALID [2022-04-07 17:20:06,894 INFO L290 TraceCheckUtils]: 92: Hoare triple {18181#false} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {18181#false} is VALID [2022-04-07 17:20:06,894 INFO L290 TraceCheckUtils]: 91: Hoare triple {18181#false} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18181#false} is VALID [2022-04-07 17:20:06,894 INFO L272 TraceCheckUtils]: 90: Hoare triple {18181#false} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18181#false} is VALID [2022-04-07 17:20:06,895 INFO L290 TraceCheckUtils]: 89: Hoare triple {18235#(<= main_~n~0 main_~i~1)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18181#false} is VALID [2022-04-07 17:20:06,895 INFO L290 TraceCheckUtils]: 88: Hoare triple {18230#(<= main_~n~0 (+ main_~i~1 1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18235#(<= main_~n~0 main_~i~1)} is VALID [2022-04-07 17:20:06,895 INFO L290 TraceCheckUtils]: 87: Hoare triple {18230#(<= main_~n~0 (+ main_~i~1 1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18230#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 17:20:06,896 INFO L284 TraceCheckUtils]: 86: Hoare quadruple {18180#true} {18230#(<= main_~n~0 (+ main_~i~1 1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18230#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 17:20:06,896 INFO L290 TraceCheckUtils]: 85: Hoare triple {18180#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:06,896 INFO L290 TraceCheckUtils]: 84: Hoare triple {18180#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:06,896 INFO L290 TraceCheckUtils]: 83: Hoare triple {18180#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18180#true} is VALID [2022-04-07 17:20:06,896 INFO L272 TraceCheckUtils]: 82: Hoare triple {18230#(<= main_~n~0 (+ main_~i~1 1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18180#true} is VALID [2022-04-07 17:20:06,896 INFO L290 TraceCheckUtils]: 81: Hoare triple {18230#(<= main_~n~0 (+ main_~i~1 1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18230#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 17:20:06,897 INFO L290 TraceCheckUtils]: 80: Hoare triple {18225#(<= main_~n~0 (+ main_~i~1 2))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18230#(<= main_~n~0 (+ main_~i~1 1))} is VALID [2022-04-07 17:20:06,897 INFO L290 TraceCheckUtils]: 79: Hoare triple {18225#(<= main_~n~0 (+ main_~i~1 2))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18225#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 17:20:06,898 INFO L284 TraceCheckUtils]: 78: Hoare quadruple {18180#true} {18225#(<= main_~n~0 (+ main_~i~1 2))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18225#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 17:20:06,898 INFO L290 TraceCheckUtils]: 77: Hoare triple {18180#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:06,898 INFO L290 TraceCheckUtils]: 76: Hoare triple {18180#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:06,898 INFO L290 TraceCheckUtils]: 75: Hoare triple {18180#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18180#true} is VALID [2022-04-07 17:20:06,898 INFO L272 TraceCheckUtils]: 74: Hoare triple {18225#(<= main_~n~0 (+ main_~i~1 2))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18180#true} is VALID [2022-04-07 17:20:06,898 INFO L290 TraceCheckUtils]: 73: Hoare triple {18225#(<= main_~n~0 (+ main_~i~1 2))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18225#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 17:20:06,899 INFO L290 TraceCheckUtils]: 72: Hoare triple {18220#(<= main_~n~0 (+ main_~i~1 3))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18225#(<= main_~n~0 (+ main_~i~1 2))} is VALID [2022-04-07 17:20:06,899 INFO L290 TraceCheckUtils]: 71: Hoare triple {18220#(<= main_~n~0 (+ main_~i~1 3))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18220#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-07 17:20:06,899 INFO L284 TraceCheckUtils]: 70: Hoare quadruple {18180#true} {18220#(<= main_~n~0 (+ main_~i~1 3))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18220#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-07 17:20:06,899 INFO L290 TraceCheckUtils]: 69: Hoare triple {18180#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:06,900 INFO L290 TraceCheckUtils]: 68: Hoare triple {18180#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:06,900 INFO L290 TraceCheckUtils]: 67: Hoare triple {18180#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18180#true} is VALID [2022-04-07 17:20:06,900 INFO L272 TraceCheckUtils]: 66: Hoare triple {18220#(<= main_~n~0 (+ main_~i~1 3))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18180#true} is VALID [2022-04-07 17:20:06,900 INFO L290 TraceCheckUtils]: 65: Hoare triple {18220#(<= main_~n~0 (+ main_~i~1 3))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18220#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-07 17:20:06,900 INFO L290 TraceCheckUtils]: 64: Hoare triple {18215#(<= main_~n~0 (+ main_~i~1 4))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18220#(<= main_~n~0 (+ main_~i~1 3))} is VALID [2022-04-07 17:20:06,901 INFO L290 TraceCheckUtils]: 63: Hoare triple {18215#(<= main_~n~0 (+ main_~i~1 4))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18215#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-07 17:20:06,901 INFO L284 TraceCheckUtils]: 62: Hoare quadruple {18180#true} {18215#(<= main_~n~0 (+ main_~i~1 4))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18215#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-07 17:20:06,901 INFO L290 TraceCheckUtils]: 61: Hoare triple {18180#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:06,901 INFO L290 TraceCheckUtils]: 60: Hoare triple {18180#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:06,901 INFO L290 TraceCheckUtils]: 59: Hoare triple {18180#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18180#true} is VALID [2022-04-07 17:20:06,901 INFO L272 TraceCheckUtils]: 58: Hoare triple {18215#(<= main_~n~0 (+ main_~i~1 4))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18180#true} is VALID [2022-04-07 17:20:06,902 INFO L290 TraceCheckUtils]: 57: Hoare triple {18215#(<= main_~n~0 (+ main_~i~1 4))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18215#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-07 17:20:06,902 INFO L290 TraceCheckUtils]: 56: Hoare triple {18210#(<= main_~n~0 (+ 5 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18215#(<= main_~n~0 (+ main_~i~1 4))} is VALID [2022-04-07 17:20:06,902 INFO L290 TraceCheckUtils]: 55: Hoare triple {18210#(<= main_~n~0 (+ 5 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18210#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-07 17:20:06,903 INFO L284 TraceCheckUtils]: 54: Hoare quadruple {18180#true} {18210#(<= main_~n~0 (+ 5 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18210#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-07 17:20:06,903 INFO L290 TraceCheckUtils]: 53: Hoare triple {18180#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:06,903 INFO L290 TraceCheckUtils]: 52: Hoare triple {18180#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:06,903 INFO L290 TraceCheckUtils]: 51: Hoare triple {18180#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18180#true} is VALID [2022-04-07 17:20:06,903 INFO L272 TraceCheckUtils]: 50: Hoare triple {18210#(<= main_~n~0 (+ 5 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18180#true} is VALID [2022-04-07 17:20:06,903 INFO L290 TraceCheckUtils]: 49: Hoare triple {18210#(<= main_~n~0 (+ 5 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18210#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-07 17:20:06,904 INFO L290 TraceCheckUtils]: 48: Hoare triple {18205#(<= main_~n~0 (+ main_~i~1 6))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18210#(<= main_~n~0 (+ 5 main_~i~1))} is VALID [2022-04-07 17:20:06,904 INFO L290 TraceCheckUtils]: 47: Hoare triple {18205#(<= main_~n~0 (+ main_~i~1 6))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18205#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-07 17:20:06,905 INFO L284 TraceCheckUtils]: 46: Hoare quadruple {18180#true} {18205#(<= main_~n~0 (+ main_~i~1 6))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18205#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-07 17:20:06,905 INFO L290 TraceCheckUtils]: 45: Hoare triple {18180#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:06,905 INFO L290 TraceCheckUtils]: 44: Hoare triple {18180#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:06,905 INFO L290 TraceCheckUtils]: 43: Hoare triple {18180#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18180#true} is VALID [2022-04-07 17:20:06,905 INFO L272 TraceCheckUtils]: 42: Hoare triple {18205#(<= main_~n~0 (+ main_~i~1 6))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18180#true} is VALID [2022-04-07 17:20:06,905 INFO L290 TraceCheckUtils]: 41: Hoare triple {18205#(<= main_~n~0 (+ main_~i~1 6))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18205#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-07 17:20:06,906 INFO L290 TraceCheckUtils]: 40: Hoare triple {18200#(<= main_~n~0 (+ 7 main_~i~1))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18205#(<= main_~n~0 (+ main_~i~1 6))} is VALID [2022-04-07 17:20:06,906 INFO L290 TraceCheckUtils]: 39: Hoare triple {18200#(<= main_~n~0 (+ 7 main_~i~1))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18200#(<= main_~n~0 (+ 7 main_~i~1))} is VALID [2022-04-07 17:20:06,906 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {18180#true} {18200#(<= main_~n~0 (+ 7 main_~i~1))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18200#(<= main_~n~0 (+ 7 main_~i~1))} is VALID [2022-04-07 17:20:06,906 INFO L290 TraceCheckUtils]: 37: Hoare triple {18180#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:06,906 INFO L290 TraceCheckUtils]: 36: Hoare triple {18180#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:06,907 INFO L290 TraceCheckUtils]: 35: Hoare triple {18180#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18180#true} is VALID [2022-04-07 17:20:06,907 INFO L272 TraceCheckUtils]: 34: Hoare triple {18200#(<= main_~n~0 (+ 7 main_~i~1))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18180#true} is VALID [2022-04-07 17:20:06,907 INFO L290 TraceCheckUtils]: 33: Hoare triple {18200#(<= main_~n~0 (+ 7 main_~i~1))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18200#(<= main_~n~0 (+ 7 main_~i~1))} is VALID [2022-04-07 17:20:06,907 INFO L290 TraceCheckUtils]: 32: Hoare triple {18712#(<= main_~n~0 (+ main_~i~1 8))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {18200#(<= main_~n~0 (+ 7 main_~i~1))} is VALID [2022-04-07 17:20:06,908 INFO L290 TraceCheckUtils]: 31: Hoare triple {18712#(<= main_~n~0 (+ main_~i~1 8))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {18712#(<= main_~n~0 (+ main_~i~1 8))} is VALID [2022-04-07 17:20:06,908 INFO L284 TraceCheckUtils]: 30: Hoare quadruple {18180#true} {18712#(<= main_~n~0 (+ main_~i~1 8))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18712#(<= main_~n~0 (+ main_~i~1 8))} is VALID [2022-04-07 17:20:06,908 INFO L290 TraceCheckUtils]: 29: Hoare triple {18180#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:06,908 INFO L290 TraceCheckUtils]: 28: Hoare triple {18180#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:06,908 INFO L290 TraceCheckUtils]: 27: Hoare triple {18180#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18180#true} is VALID [2022-04-07 17:20:06,908 INFO L272 TraceCheckUtils]: 26: Hoare triple {18712#(<= main_~n~0 (+ main_~i~1 8))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {18180#true} is VALID [2022-04-07 17:20:06,909 INFO L290 TraceCheckUtils]: 25: Hoare triple {18712#(<= main_~n~0 (+ main_~i~1 8))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {18712#(<= main_~n~0 (+ main_~i~1 8))} is VALID [2022-04-07 17:20:06,909 INFO L290 TraceCheckUtils]: 24: Hoare triple {18194#(<= main_~n~0 8)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {18712#(<= main_~n~0 (+ main_~i~1 8))} is VALID [2022-04-07 17:20:06,909 INFO L290 TraceCheckUtils]: 23: Hoare triple {18193#(<= main_~i~0 8)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {18194#(<= main_~n~0 8)} is VALID [2022-04-07 17:20:06,910 INFO L290 TraceCheckUtils]: 22: Hoare triple {18192#(<= main_~i~0 7)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18193#(<= main_~i~0 8)} is VALID [2022-04-07 17:20:06,910 INFO L290 TraceCheckUtils]: 21: Hoare triple {18192#(<= main_~i~0 7)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18192#(<= main_~i~0 7)} is VALID [2022-04-07 17:20:06,910 INFO L290 TraceCheckUtils]: 20: Hoare triple {18191#(<= main_~i~0 6)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18192#(<= main_~i~0 7)} is VALID [2022-04-07 17:20:06,911 INFO L290 TraceCheckUtils]: 19: Hoare triple {18191#(<= main_~i~0 6)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18191#(<= main_~i~0 6)} is VALID [2022-04-07 17:20:06,911 INFO L290 TraceCheckUtils]: 18: Hoare triple {18190#(<= main_~i~0 5)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18191#(<= main_~i~0 6)} is VALID [2022-04-07 17:20:06,911 INFO L290 TraceCheckUtils]: 17: Hoare triple {18190#(<= main_~i~0 5)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18190#(<= main_~i~0 5)} is VALID [2022-04-07 17:20:06,912 INFO L290 TraceCheckUtils]: 16: Hoare triple {18189#(<= main_~i~0 4)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18190#(<= main_~i~0 5)} is VALID [2022-04-07 17:20:06,912 INFO L290 TraceCheckUtils]: 15: Hoare triple {18189#(<= main_~i~0 4)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18189#(<= main_~i~0 4)} is VALID [2022-04-07 17:20:06,912 INFO L290 TraceCheckUtils]: 14: Hoare triple {18188#(<= main_~i~0 3)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18189#(<= main_~i~0 4)} is VALID [2022-04-07 17:20:06,913 INFO L290 TraceCheckUtils]: 13: Hoare triple {18188#(<= main_~i~0 3)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18188#(<= main_~i~0 3)} is VALID [2022-04-07 17:20:06,913 INFO L290 TraceCheckUtils]: 12: Hoare triple {18187#(<= main_~i~0 2)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18188#(<= main_~i~0 3)} is VALID [2022-04-07 17:20:06,913 INFO L290 TraceCheckUtils]: 11: Hoare triple {18187#(<= main_~i~0 2)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18187#(<= main_~i~0 2)} is VALID [2022-04-07 17:20:06,914 INFO L290 TraceCheckUtils]: 10: Hoare triple {18186#(<= main_~i~0 1)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18187#(<= main_~i~0 2)} is VALID [2022-04-07 17:20:06,914 INFO L290 TraceCheckUtils]: 9: Hoare triple {18186#(<= main_~i~0 1)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18186#(<= main_~i~0 1)} is VALID [2022-04-07 17:20:06,914 INFO L290 TraceCheckUtils]: 8: Hoare triple {18258#(<= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {18186#(<= main_~i~0 1)} is VALID [2022-04-07 17:20:06,915 INFO L290 TraceCheckUtils]: 7: Hoare triple {18258#(<= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {18258#(<= main_~i~0 0)} is VALID [2022-04-07 17:20:06,915 INFO L290 TraceCheckUtils]: 6: Hoare triple {18180#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {18258#(<= main_~i~0 0)} is VALID [2022-04-07 17:20:06,915 INFO L290 TraceCheckUtils]: 5: Hoare triple {18180#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {18180#true} is VALID [2022-04-07 17:20:06,915 INFO L272 TraceCheckUtils]: 4: Hoare triple {18180#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:06,915 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {18180#true} {18180#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:06,915 INFO L290 TraceCheckUtils]: 2: Hoare triple {18180#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:06,915 INFO L290 TraceCheckUtils]: 1: Hoare triple {18180#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {18180#true} is VALID [2022-04-07 17:20:06,916 INFO L272 TraceCheckUtils]: 0: Hoare triple {18180#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18180#true} is VALID [2022-04-07 17:20:06,916 INFO L134 CoverageAnalysis]: Checked inductivity of 320 backedges. 144 proven. 64 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2022-04-07 17:20:06,916 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [419177645] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 17:20:06,916 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 17:20:06,916 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 21, 21] total 33 [2022-04-07 17:20:06,916 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [462728738] [2022-04-07 17:20:06,916 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 17:20:06,917 INFO L78 Accepts]: Start accepts. Automaton has has 33 states, 33 states have (on average 2.6363636363636362) internal successors, (87), 32 states have internal predecessors, (87), 19 states have call successors, (21), 3 states have call predecessors, (21), 1 states have return successors, (18), 18 states have call predecessors, (18), 18 states have call successors, (18) Word has length 94 [2022-04-07 17:20:06,917 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:20:06,917 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 33 states, 33 states have (on average 2.6363636363636362) internal successors, (87), 32 states have internal predecessors, (87), 19 states have call successors, (21), 3 states have call predecessors, (21), 1 states have return successors, (18), 18 states have call predecessors, (18), 18 states have call successors, (18) [2022-04-07 17:20:06,993 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 126 edges. 126 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:20:06,993 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 33 states [2022-04-07 17:20:06,993 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:20:06,994 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2022-04-07 17:20:06,994 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=237, Invalid=819, Unknown=0, NotChecked=0, Total=1056 [2022-04-07 17:20:06,994 INFO L87 Difference]: Start difference. First operand 183 states and 193 transitions. Second operand has 33 states, 33 states have (on average 2.6363636363636362) internal successors, (87), 32 states have internal predecessors, (87), 19 states have call successors, (21), 3 states have call predecessors, (21), 1 states have return successors, (18), 18 states have call predecessors, (18), 18 states have call successors, (18) [2022-04-07 17:20:07,959 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:20:07,959 INFO L93 Difference]: Finished difference Result 190 states and 200 transitions. [2022-04-07 17:20:07,959 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2022-04-07 17:20:07,959 INFO L78 Accepts]: Start accepts. Automaton has has 33 states, 33 states have (on average 2.6363636363636362) internal successors, (87), 32 states have internal predecessors, (87), 19 states have call successors, (21), 3 states have call predecessors, (21), 1 states have return successors, (18), 18 states have call predecessors, (18), 18 states have call successors, (18) Word has length 94 [2022-04-07 17:20:07,959 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:20:07,959 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 33 states, 33 states have (on average 2.6363636363636362) internal successors, (87), 32 states have internal predecessors, (87), 19 states have call successors, (21), 3 states have call predecessors, (21), 1 states have return successors, (18), 18 states have call predecessors, (18), 18 states have call successors, (18) [2022-04-07 17:20:07,960 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 82 transitions. [2022-04-07 17:20:07,961 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 33 states, 33 states have (on average 2.6363636363636362) internal successors, (87), 32 states have internal predecessors, (87), 19 states have call successors, (21), 3 states have call predecessors, (21), 1 states have return successors, (18), 18 states have call predecessors, (18), 18 states have call successors, (18) [2022-04-07 17:20:07,962 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 82 transitions. [2022-04-07 17:20:07,962 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 22 states and 82 transitions. [2022-04-07 17:20:08,052 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 82 edges. 82 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:20:08,054 INFO L225 Difference]: With dead ends: 190 [2022-04-07 17:20:08,054 INFO L226 Difference]: Without dead ends: 152 [2022-04-07 17:20:08,055 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 245 GetRequests, 194 SyntacticMatches, 1 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 689 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=534, Invalid=2118, Unknown=0, NotChecked=0, Total=2652 [2022-04-07 17:20:08,055 INFO L913 BasicCegarLoop]: 29 mSDtfsCounter, 47 mSDsluCounter, 47 mSDsCounter, 0 mSdLazyCounter, 477 mSolverCounterSat, 44 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 48 SdHoareTripleChecker+Valid, 76 SdHoareTripleChecker+Invalid, 521 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 44 IncrementalHoareTripleChecker+Valid, 477 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-04-07 17:20:08,055 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [48 Valid, 76 Invalid, 521 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [44 Valid, 477 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-04-07 17:20:08,056 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 152 states. [2022-04-07 17:20:08,058 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 152 to 152. [2022-04-07 17:20:08,059 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:20:08,059 INFO L82 GeneralOperation]: Start isEquivalent. First operand 152 states. Second operand has 152 states, 117 states have (on average 1.0256410256410255) internal successors, (120), 119 states have internal predecessors, (120), 18 states have call successors, (18), 17 states have call predecessors, (18), 16 states have return successors, (17), 15 states have call predecessors, (17), 17 states have call successors, (17) [2022-04-07 17:20:08,059 INFO L74 IsIncluded]: Start isIncluded. First operand 152 states. Second operand has 152 states, 117 states have (on average 1.0256410256410255) internal successors, (120), 119 states have internal predecessors, (120), 18 states have call successors, (18), 17 states have call predecessors, (18), 16 states have return successors, (17), 15 states have call predecessors, (17), 17 states have call successors, (17) [2022-04-07 17:20:08,059 INFO L87 Difference]: Start difference. First operand 152 states. Second operand has 152 states, 117 states have (on average 1.0256410256410255) internal successors, (120), 119 states have internal predecessors, (120), 18 states have call successors, (18), 17 states have call predecessors, (18), 16 states have return successors, (17), 15 states have call predecessors, (17), 17 states have call successors, (17) [2022-04-07 17:20:08,061 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:20:08,061 INFO L93 Difference]: Finished difference Result 152 states and 155 transitions. [2022-04-07 17:20:08,062 INFO L276 IsEmpty]: Start isEmpty. Operand 152 states and 155 transitions. [2022-04-07 17:20:08,062 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:20:08,062 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:20:08,062 INFO L74 IsIncluded]: Start isIncluded. First operand has 152 states, 117 states have (on average 1.0256410256410255) internal successors, (120), 119 states have internal predecessors, (120), 18 states have call successors, (18), 17 states have call predecessors, (18), 16 states have return successors, (17), 15 states have call predecessors, (17), 17 states have call successors, (17) Second operand 152 states. [2022-04-07 17:20:08,062 INFO L87 Difference]: Start difference. First operand has 152 states, 117 states have (on average 1.0256410256410255) internal successors, (120), 119 states have internal predecessors, (120), 18 states have call successors, (18), 17 states have call predecessors, (18), 16 states have return successors, (17), 15 states have call predecessors, (17), 17 states have call successors, (17) Second operand 152 states. [2022-04-07 17:20:08,065 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:20:08,065 INFO L93 Difference]: Finished difference Result 152 states and 155 transitions. [2022-04-07 17:20:08,065 INFO L276 IsEmpty]: Start isEmpty. Operand 152 states and 155 transitions. [2022-04-07 17:20:08,065 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:20:08,065 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:20:08,065 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:20:08,065 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:20:08,065 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 152 states, 117 states have (on average 1.0256410256410255) internal successors, (120), 119 states have internal predecessors, (120), 18 states have call successors, (18), 17 states have call predecessors, (18), 16 states have return successors, (17), 15 states have call predecessors, (17), 17 states have call successors, (17) [2022-04-07 17:20:08,067 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 152 states to 152 states and 155 transitions. [2022-04-07 17:20:08,067 INFO L78 Accepts]: Start accepts. Automaton has 152 states and 155 transitions. Word has length 94 [2022-04-07 17:20:08,068 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:20:08,068 INFO L478 AbstractCegarLoop]: Abstraction has 152 states and 155 transitions. [2022-04-07 17:20:08,068 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 33 states, 33 states have (on average 2.6363636363636362) internal successors, (87), 32 states have internal predecessors, (87), 19 states have call successors, (21), 3 states have call predecessors, (21), 1 states have return successors, (18), 18 states have call predecessors, (18), 18 states have call successors, (18) [2022-04-07 17:20:08,068 INFO L276 IsEmpty]: Start isEmpty. Operand 152 states and 155 transitions. [2022-04-07 17:20:08,069 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2022-04-07 17:20:08,069 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:20:08,069 INFO L499 BasicCegarLoop]: trace histogram [9, 9, 9, 9, 9, 8, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:20:08,095 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Ended with exit code 0 [2022-04-07 17:20:08,283 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24,24 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:20:08,283 INFO L403 AbstractCegarLoop]: === Iteration 26 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:20:08,284 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:20:08,284 INFO L85 PathProgramCache]: Analyzing trace with hash 1012122373, now seen corresponding path program 23 times [2022-04-07 17:20:08,284 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:20:08,284 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1976305944] [2022-04-07 17:20:08,284 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:20:08,284 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:20:08,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:20:08,657 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:20:08,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:20:08,670 INFO L290 TraceCheckUtils]: 0: Hoare triple {19555#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {19495#true} is VALID [2022-04-07 17:20:08,670 INFO L290 TraceCheckUtils]: 1: Hoare triple {19495#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-07 17:20:08,670 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {19495#true} {19495#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-07 17:20:08,670 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 28 [2022-04-07 17:20:08,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:20:08,673 INFO L290 TraceCheckUtils]: 0: Hoare triple {19495#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19495#true} is VALID [2022-04-07 17:20:08,673 INFO L290 TraceCheckUtils]: 1: Hoare triple {19495#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-07 17:20:08,673 INFO L290 TraceCheckUtils]: 2: Hoare triple {19495#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-07 17:20:08,673 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19495#true} {19511#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19511#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:20:08,673 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 36 [2022-04-07 17:20:08,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:20:08,676 INFO L290 TraceCheckUtils]: 0: Hoare triple {19495#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19495#true} is VALID [2022-04-07 17:20:08,676 INFO L290 TraceCheckUtils]: 1: Hoare triple {19495#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-07 17:20:08,676 INFO L290 TraceCheckUtils]: 2: Hoare triple {19495#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-07 17:20:08,677 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19495#true} {19516#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19516#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-07 17:20:08,677 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 44 [2022-04-07 17:20:08,677 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:20:08,679 INFO L290 TraceCheckUtils]: 0: Hoare triple {19495#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19495#true} is VALID [2022-04-07 17:20:08,680 INFO L290 TraceCheckUtils]: 1: Hoare triple {19495#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-07 17:20:08,680 INFO L290 TraceCheckUtils]: 2: Hoare triple {19495#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-07 17:20:08,680 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19495#true} {19521#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19521#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 17:20:08,680 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 52 [2022-04-07 17:20:08,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:20:08,683 INFO L290 TraceCheckUtils]: 0: Hoare triple {19495#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19495#true} is VALID [2022-04-07 17:20:08,683 INFO L290 TraceCheckUtils]: 1: Hoare triple {19495#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-07 17:20:08,683 INFO L290 TraceCheckUtils]: 2: Hoare triple {19495#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-07 17:20:08,684 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19495#true} {19526#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19526#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 17:20:08,684 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 60 [2022-04-07 17:20:08,685 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:20:08,687 INFO L290 TraceCheckUtils]: 0: Hoare triple {19495#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19495#true} is VALID [2022-04-07 17:20:08,687 INFO L290 TraceCheckUtils]: 1: Hoare triple {19495#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-07 17:20:08,687 INFO L290 TraceCheckUtils]: 2: Hoare triple {19495#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-07 17:20:08,688 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19495#true} {19531#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19531#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:20:08,688 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 68 [2022-04-07 17:20:08,689 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:20:08,692 INFO L290 TraceCheckUtils]: 0: Hoare triple {19495#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19495#true} is VALID [2022-04-07 17:20:08,692 INFO L290 TraceCheckUtils]: 1: Hoare triple {19495#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-07 17:20:08,692 INFO L290 TraceCheckUtils]: 2: Hoare triple {19495#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-07 17:20:08,693 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19495#true} {19536#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19536#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:20:08,693 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 76 [2022-04-07 17:20:08,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:20:08,696 INFO L290 TraceCheckUtils]: 0: Hoare triple {19495#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19495#true} is VALID [2022-04-07 17:20:08,696 INFO L290 TraceCheckUtils]: 1: Hoare triple {19495#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-07 17:20:08,696 INFO L290 TraceCheckUtils]: 2: Hoare triple {19495#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-07 17:20:08,697 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19495#true} {19541#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19541#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:20:08,697 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 84 [2022-04-07 17:20:08,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:20:08,700 INFO L290 TraceCheckUtils]: 0: Hoare triple {19495#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19495#true} is VALID [2022-04-07 17:20:08,700 INFO L290 TraceCheckUtils]: 1: Hoare triple {19495#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-07 17:20:08,700 INFO L290 TraceCheckUtils]: 2: Hoare triple {19495#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-07 17:20:08,701 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19495#true} {19546#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19546#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:20:08,701 INFO L272 TraceCheckUtils]: 0: Hoare triple {19495#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19555#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:20:08,701 INFO L290 TraceCheckUtils]: 1: Hoare triple {19555#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {19495#true} is VALID [2022-04-07 17:20:08,701 INFO L290 TraceCheckUtils]: 2: Hoare triple {19495#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-07 17:20:08,701 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19495#true} {19495#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-07 17:20:08,702 INFO L272 TraceCheckUtils]: 4: Hoare triple {19495#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-07 17:20:08,702 INFO L290 TraceCheckUtils]: 5: Hoare triple {19495#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {19495#true} is VALID [2022-04-07 17:20:08,702 INFO L290 TraceCheckUtils]: 6: Hoare triple {19495#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {19500#(= main_~i~0 0)} is VALID [2022-04-07 17:20:08,702 INFO L290 TraceCheckUtils]: 7: Hoare triple {19500#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19500#(= main_~i~0 0)} is VALID [2022-04-07 17:20:08,703 INFO L290 TraceCheckUtils]: 8: Hoare triple {19500#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19501#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:20:08,703 INFO L290 TraceCheckUtils]: 9: Hoare triple {19501#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19501#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:20:08,704 INFO L290 TraceCheckUtils]: 10: Hoare triple {19501#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19502#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:20:08,704 INFO L290 TraceCheckUtils]: 11: Hoare triple {19502#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19502#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:20:08,705 INFO L290 TraceCheckUtils]: 12: Hoare triple {19502#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19503#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 17:20:08,705 INFO L290 TraceCheckUtils]: 13: Hoare triple {19503#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19503#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 17:20:08,706 INFO L290 TraceCheckUtils]: 14: Hoare triple {19503#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19504#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 17:20:08,706 INFO L290 TraceCheckUtils]: 15: Hoare triple {19504#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19504#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 17:20:08,706 INFO L290 TraceCheckUtils]: 16: Hoare triple {19504#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19505#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 17:20:08,707 INFO L290 TraceCheckUtils]: 17: Hoare triple {19505#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19505#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 17:20:08,707 INFO L290 TraceCheckUtils]: 18: Hoare triple {19505#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19506#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-07 17:20:08,708 INFO L290 TraceCheckUtils]: 19: Hoare triple {19506#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19506#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-07 17:20:08,708 INFO L290 TraceCheckUtils]: 20: Hoare triple {19506#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19507#(and (<= main_~i~0 7) (<= 7 main_~i~0))} is VALID [2022-04-07 17:20:08,709 INFO L290 TraceCheckUtils]: 21: Hoare triple {19507#(and (<= main_~i~0 7) (<= 7 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19507#(and (<= main_~i~0 7) (<= 7 main_~i~0))} is VALID [2022-04-07 17:20:08,709 INFO L290 TraceCheckUtils]: 22: Hoare triple {19507#(and (<= main_~i~0 7) (<= 7 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19508#(and (<= 8 main_~i~0) (<= main_~i~0 8))} is VALID [2022-04-07 17:20:08,710 INFO L290 TraceCheckUtils]: 23: Hoare triple {19508#(and (<= 8 main_~i~0) (<= main_~i~0 8))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19509#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 8 main_~i~0) (<= main_~i~0 8))} is VALID [2022-04-07 17:20:08,710 INFO L290 TraceCheckUtils]: 24: Hoare triple {19509#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 8 main_~i~0) (<= main_~i~0 8))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0)} is VALID [2022-04-07 17:20:08,711 INFO L290 TraceCheckUtils]: 25: Hoare triple {19510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {19510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0)} is VALID [2022-04-07 17:20:08,711 INFO L290 TraceCheckUtils]: 26: Hoare triple {19510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {19511#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:20:08,712 INFO L290 TraceCheckUtils]: 27: Hoare triple {19511#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19511#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:20:08,712 INFO L272 TraceCheckUtils]: 28: Hoare triple {19511#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19495#true} is VALID [2022-04-07 17:20:08,712 INFO L290 TraceCheckUtils]: 29: Hoare triple {19495#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19495#true} is VALID [2022-04-07 17:20:08,712 INFO L290 TraceCheckUtils]: 30: Hoare triple {19495#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-07 17:20:08,712 INFO L290 TraceCheckUtils]: 31: Hoare triple {19495#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-07 17:20:08,713 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {19495#true} {19511#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19511#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:20:08,713 INFO L290 TraceCheckUtils]: 33: Hoare triple {19511#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {19511#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:20:08,714 INFO L290 TraceCheckUtils]: 34: Hoare triple {19511#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {19516#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-07 17:20:08,714 INFO L290 TraceCheckUtils]: 35: Hoare triple {19516#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19516#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-07 17:20:08,714 INFO L272 TraceCheckUtils]: 36: Hoare triple {19516#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19495#true} is VALID [2022-04-07 17:20:08,714 INFO L290 TraceCheckUtils]: 37: Hoare triple {19495#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19495#true} is VALID [2022-04-07 17:20:08,714 INFO L290 TraceCheckUtils]: 38: Hoare triple {19495#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-07 17:20:08,715 INFO L290 TraceCheckUtils]: 39: Hoare triple {19495#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-07 17:20:08,715 INFO L284 TraceCheckUtils]: 40: Hoare quadruple {19495#true} {19516#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19516#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-07 17:20:08,715 INFO L290 TraceCheckUtils]: 41: Hoare triple {19516#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {19516#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-07 17:20:08,716 INFO L290 TraceCheckUtils]: 42: Hoare triple {19516#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {19521#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 17:20:08,716 INFO L290 TraceCheckUtils]: 43: Hoare triple {19521#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19521#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 17:20:08,717 INFO L272 TraceCheckUtils]: 44: Hoare triple {19521#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19495#true} is VALID [2022-04-07 17:20:08,717 INFO L290 TraceCheckUtils]: 45: Hoare triple {19495#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19495#true} is VALID [2022-04-07 17:20:08,717 INFO L290 TraceCheckUtils]: 46: Hoare triple {19495#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-07 17:20:08,717 INFO L290 TraceCheckUtils]: 47: Hoare triple {19495#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-07 17:20:08,717 INFO L284 TraceCheckUtils]: 48: Hoare quadruple {19495#true} {19521#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19521#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 17:20:08,718 INFO L290 TraceCheckUtils]: 49: Hoare triple {19521#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {19521#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 17:20:08,718 INFO L290 TraceCheckUtils]: 50: Hoare triple {19521#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {19526#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 17:20:08,719 INFO L290 TraceCheckUtils]: 51: Hoare triple {19526#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19526#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 17:20:08,719 INFO L272 TraceCheckUtils]: 52: Hoare triple {19526#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19495#true} is VALID [2022-04-07 17:20:08,719 INFO L290 TraceCheckUtils]: 53: Hoare triple {19495#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19495#true} is VALID [2022-04-07 17:20:08,719 INFO L290 TraceCheckUtils]: 54: Hoare triple {19495#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-07 17:20:08,719 INFO L290 TraceCheckUtils]: 55: Hoare triple {19495#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-07 17:20:08,720 INFO L284 TraceCheckUtils]: 56: Hoare quadruple {19495#true} {19526#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19526#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 17:20:08,720 INFO L290 TraceCheckUtils]: 57: Hoare triple {19526#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {19526#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 17:20:08,721 INFO L290 TraceCheckUtils]: 58: Hoare triple {19526#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {19531#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:20:08,721 INFO L290 TraceCheckUtils]: 59: Hoare triple {19531#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19531#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:20:08,721 INFO L272 TraceCheckUtils]: 60: Hoare triple {19531#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19495#true} is VALID [2022-04-07 17:20:08,721 INFO L290 TraceCheckUtils]: 61: Hoare triple {19495#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19495#true} is VALID [2022-04-07 17:20:08,721 INFO L290 TraceCheckUtils]: 62: Hoare triple {19495#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-07 17:20:08,722 INFO L290 TraceCheckUtils]: 63: Hoare triple {19495#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-07 17:20:08,722 INFO L284 TraceCheckUtils]: 64: Hoare quadruple {19495#true} {19531#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19531#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:20:08,723 INFO L290 TraceCheckUtils]: 65: Hoare triple {19531#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {19531#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:20:08,723 INFO L290 TraceCheckUtils]: 66: Hoare triple {19531#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {19536#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:20:08,724 INFO L290 TraceCheckUtils]: 67: Hoare triple {19536#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19536#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:20:08,724 INFO L272 TraceCheckUtils]: 68: Hoare triple {19536#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19495#true} is VALID [2022-04-07 17:20:08,724 INFO L290 TraceCheckUtils]: 69: Hoare triple {19495#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19495#true} is VALID [2022-04-07 17:20:08,724 INFO L290 TraceCheckUtils]: 70: Hoare triple {19495#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-07 17:20:08,724 INFO L290 TraceCheckUtils]: 71: Hoare triple {19495#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-07 17:20:08,725 INFO L284 TraceCheckUtils]: 72: Hoare quadruple {19495#true} {19536#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19536#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:20:08,725 INFO L290 TraceCheckUtils]: 73: Hoare triple {19536#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {19536#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:20:08,726 INFO L290 TraceCheckUtils]: 74: Hoare triple {19536#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {19541#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:20:08,726 INFO L290 TraceCheckUtils]: 75: Hoare triple {19541#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19541#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:20:08,726 INFO L272 TraceCheckUtils]: 76: Hoare triple {19541#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19495#true} is VALID [2022-04-07 17:20:08,726 INFO L290 TraceCheckUtils]: 77: Hoare triple {19495#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19495#true} is VALID [2022-04-07 17:20:08,726 INFO L290 TraceCheckUtils]: 78: Hoare triple {19495#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-07 17:20:08,726 INFO L290 TraceCheckUtils]: 79: Hoare triple {19495#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-07 17:20:08,727 INFO L284 TraceCheckUtils]: 80: Hoare quadruple {19495#true} {19541#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19541#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:20:08,727 INFO L290 TraceCheckUtils]: 81: Hoare triple {19541#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {19541#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:20:08,728 INFO L290 TraceCheckUtils]: 82: Hoare triple {19541#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {19546#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:20:08,728 INFO L290 TraceCheckUtils]: 83: Hoare triple {19546#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19546#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:20:08,728 INFO L272 TraceCheckUtils]: 84: Hoare triple {19546#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19495#true} is VALID [2022-04-07 17:20:08,729 INFO L290 TraceCheckUtils]: 85: Hoare triple {19495#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19495#true} is VALID [2022-04-07 17:20:08,729 INFO L290 TraceCheckUtils]: 86: Hoare triple {19495#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-07 17:20:08,729 INFO L290 TraceCheckUtils]: 87: Hoare triple {19495#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-07 17:20:08,729 INFO L284 TraceCheckUtils]: 88: Hoare quadruple {19495#true} {19546#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19546#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:20:08,730 INFO L290 TraceCheckUtils]: 89: Hoare triple {19546#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {19546#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:20:08,730 INFO L290 TraceCheckUtils]: 90: Hoare triple {19546#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {19551#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:20:08,731 INFO L290 TraceCheckUtils]: 91: Hoare triple {19551#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19552#(= |main_#t~mem5| 0)} is VALID [2022-04-07 17:20:08,731 INFO L272 TraceCheckUtils]: 92: Hoare triple {19552#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19553#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:20:08,732 INFO L290 TraceCheckUtils]: 93: Hoare triple {19553#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19554#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:20:08,732 INFO L290 TraceCheckUtils]: 94: Hoare triple {19554#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {19496#false} is VALID [2022-04-07 17:20:08,732 INFO L290 TraceCheckUtils]: 95: Hoare triple {19496#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19496#false} is VALID [2022-04-07 17:20:08,733 INFO L134 CoverageAnalysis]: Checked inductivity of 337 backedges. 16 proven. 209 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2022-04-07 17:20:08,733 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:20:08,733 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1976305944] [2022-04-07 17:20:08,733 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1976305944] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:20:08,733 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [768484667] [2022-04-07 17:20:08,733 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-04-07 17:20:08,733 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:20:08,733 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:20:08,735 INFO L229 MonitoredProcess]: Starting monitored process 25 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:20:08,766 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Waiting until timeout for monitored process [2022-04-07 17:20:08,910 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 10 check-sat command(s) [2022-04-07 17:20:08,911 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 17:20:08,913 INFO L263 TraceCheckSpWp]: Trace formula consists of 257 conjuncts, 45 conjunts are in the unsatisfiable core [2022-04-07 17:20:08,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:20:08,931 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:20:09,091 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-07 17:21:47,233 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2022-04-07 17:21:47,291 INFO L272 TraceCheckUtils]: 0: Hoare triple {19495#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-07 17:21:47,291 INFO L290 TraceCheckUtils]: 1: Hoare triple {19495#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {19495#true} is VALID [2022-04-07 17:21:47,291 INFO L290 TraceCheckUtils]: 2: Hoare triple {19495#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-07 17:21:47,292 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19495#true} {19495#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-07 17:21:47,292 INFO L272 TraceCheckUtils]: 4: Hoare triple {19495#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-07 17:21:47,292 INFO L290 TraceCheckUtils]: 5: Hoare triple {19495#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {19495#true} is VALID [2022-04-07 17:21:47,292 INFO L290 TraceCheckUtils]: 6: Hoare triple {19495#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {19500#(= main_~i~0 0)} is VALID [2022-04-07 17:21:47,292 INFO L290 TraceCheckUtils]: 7: Hoare triple {19500#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19500#(= main_~i~0 0)} is VALID [2022-04-07 17:21:47,293 INFO L290 TraceCheckUtils]: 8: Hoare triple {19500#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19501#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:21:47,293 INFO L290 TraceCheckUtils]: 9: Hoare triple {19501#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19501#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:21:47,293 INFO L290 TraceCheckUtils]: 10: Hoare triple {19501#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19502#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:21:47,294 INFO L290 TraceCheckUtils]: 11: Hoare triple {19502#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19502#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:21:47,294 INFO L290 TraceCheckUtils]: 12: Hoare triple {19502#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19503#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 17:21:47,295 INFO L290 TraceCheckUtils]: 13: Hoare triple {19503#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19503#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 17:21:47,295 INFO L290 TraceCheckUtils]: 14: Hoare triple {19503#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19504#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 17:21:47,296 INFO L290 TraceCheckUtils]: 15: Hoare triple {19504#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19504#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 17:21:47,296 INFO L290 TraceCheckUtils]: 16: Hoare triple {19504#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19505#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 17:21:47,296 INFO L290 TraceCheckUtils]: 17: Hoare triple {19505#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19505#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 17:21:47,297 INFO L290 TraceCheckUtils]: 18: Hoare triple {19505#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19506#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-07 17:21:47,297 INFO L290 TraceCheckUtils]: 19: Hoare triple {19506#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19506#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-07 17:21:47,298 INFO L290 TraceCheckUtils]: 20: Hoare triple {19506#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19507#(and (<= main_~i~0 7) (<= 7 main_~i~0))} is VALID [2022-04-07 17:21:47,298 INFO L290 TraceCheckUtils]: 21: Hoare triple {19507#(and (<= main_~i~0 7) (<= 7 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19507#(and (<= main_~i~0 7) (<= 7 main_~i~0))} is VALID [2022-04-07 17:21:47,298 INFO L290 TraceCheckUtils]: 22: Hoare triple {19507#(and (<= main_~i~0 7) (<= 7 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19508#(and (<= 8 main_~i~0) (<= main_~i~0 8))} is VALID [2022-04-07 17:21:47,299 INFO L290 TraceCheckUtils]: 23: Hoare triple {19508#(and (<= 8 main_~i~0) (<= main_~i~0 8))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0)} is VALID [2022-04-07 17:21:47,299 INFO L290 TraceCheckUtils]: 24: Hoare triple {19510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0)} is VALID [2022-04-07 17:21:47,300 INFO L290 TraceCheckUtils]: 25: Hoare triple {19510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {19510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0)} is VALID [2022-04-07 17:21:47,300 INFO L290 TraceCheckUtils]: 26: Hoare triple {19510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {19511#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:21:47,300 INFO L290 TraceCheckUtils]: 27: Hoare triple {19511#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19511#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:21:47,301 INFO L272 TraceCheckUtils]: 28: Hoare triple {19511#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} is VALID [2022-04-07 17:21:47,302 INFO L290 TraceCheckUtils]: 29: Hoare triple {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} is VALID [2022-04-07 17:21:47,302 INFO L290 TraceCheckUtils]: 30: Hoare triple {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} is VALID [2022-04-07 17:21:47,302 INFO L290 TraceCheckUtils]: 31: Hoare triple {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} is VALID [2022-04-07 17:21:47,303 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} {19511#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19511#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:21:47,303 INFO L290 TraceCheckUtils]: 33: Hoare triple {19511#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {19511#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:21:47,303 INFO L290 TraceCheckUtils]: 34: Hoare triple {19511#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {19662#(and (= main_~i~1 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} is VALID [2022-04-07 17:21:47,304 INFO L290 TraceCheckUtils]: 35: Hoare triple {19662#(and (= main_~i~1 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19662#(and (= main_~i~1 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} is VALID [2022-04-07 17:21:47,305 INFO L272 TraceCheckUtils]: 36: Hoare triple {19662#(and (= main_~i~1 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} is VALID [2022-04-07 17:21:47,305 INFO L290 TraceCheckUtils]: 37: Hoare triple {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} is VALID [2022-04-07 17:21:47,305 INFO L290 TraceCheckUtils]: 38: Hoare triple {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} is VALID [2022-04-07 17:21:47,305 INFO L290 TraceCheckUtils]: 39: Hoare triple {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} is VALID [2022-04-07 17:21:47,306 INFO L284 TraceCheckUtils]: 40: Hoare quadruple {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} {19662#(and (= main_~i~1 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19662#(and (= main_~i~1 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} is VALID [2022-04-07 17:21:47,306 INFO L290 TraceCheckUtils]: 41: Hoare triple {19662#(and (= main_~i~1 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {19662#(and (= main_~i~1 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} is VALID [2022-04-07 17:21:47,307 INFO L290 TraceCheckUtils]: 42: Hoare triple {19662#(and (= main_~i~1 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {19687#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} is VALID [2022-04-07 17:21:47,307 INFO L290 TraceCheckUtils]: 43: Hoare triple {19687#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19687#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} is VALID [2022-04-07 17:21:47,308 INFO L272 TraceCheckUtils]: 44: Hoare triple {19687#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} is VALID [2022-04-07 17:21:47,308 INFO L290 TraceCheckUtils]: 45: Hoare triple {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} is VALID [2022-04-07 17:21:47,309 INFO L290 TraceCheckUtils]: 46: Hoare triple {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} is VALID [2022-04-07 17:21:47,309 INFO L290 TraceCheckUtils]: 47: Hoare triple {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} is VALID [2022-04-07 17:21:47,309 INFO L284 TraceCheckUtils]: 48: Hoare quadruple {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} {19687#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19687#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} is VALID [2022-04-07 17:21:47,310 INFO L290 TraceCheckUtils]: 49: Hoare triple {19687#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {19687#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} is VALID [2022-04-07 17:21:47,310 INFO L290 TraceCheckUtils]: 50: Hoare triple {19687#(and (= 1 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {19712#(and (= (+ (- 2) main_~i~1) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} is VALID [2022-04-07 17:21:47,311 INFO L290 TraceCheckUtils]: 51: Hoare triple {19712#(and (= (+ (- 2) main_~i~1) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19712#(and (= (+ (- 2) main_~i~1) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} is VALID [2022-04-07 17:21:47,311 INFO L272 TraceCheckUtils]: 52: Hoare triple {19712#(and (= (+ (- 2) main_~i~1) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} is VALID [2022-04-07 17:21:47,312 INFO L290 TraceCheckUtils]: 53: Hoare triple {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} is VALID [2022-04-07 17:21:47,312 INFO L290 TraceCheckUtils]: 54: Hoare triple {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} is VALID [2022-04-07 17:21:47,312 INFO L290 TraceCheckUtils]: 55: Hoare triple {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} is VALID [2022-04-07 17:21:47,313 INFO L284 TraceCheckUtils]: 56: Hoare quadruple {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} {19712#(and (= (+ (- 2) main_~i~1) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19712#(and (= (+ (- 2) main_~i~1) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} is VALID [2022-04-07 17:21:47,313 INFO L290 TraceCheckUtils]: 57: Hoare triple {19712#(and (= (+ (- 2) main_~i~1) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {19712#(and (= (+ (- 2) main_~i~1) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} is VALID [2022-04-07 17:21:47,314 INFO L290 TraceCheckUtils]: 58: Hoare triple {19712#(and (= (+ (- 2) main_~i~1) 1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {19737#(and (= main_~i~1 4) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} is VALID [2022-04-07 17:21:47,314 INFO L290 TraceCheckUtils]: 59: Hoare triple {19737#(and (= main_~i~1 4) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19737#(and (= main_~i~1 4) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} is VALID [2022-04-07 17:21:47,315 INFO L272 TraceCheckUtils]: 60: Hoare triple {19737#(and (= main_~i~1 4) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} is VALID [2022-04-07 17:21:47,315 INFO L290 TraceCheckUtils]: 61: Hoare triple {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} is VALID [2022-04-07 17:21:47,315 INFO L290 TraceCheckUtils]: 62: Hoare triple {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} is VALID [2022-04-07 17:21:47,316 INFO L290 TraceCheckUtils]: 63: Hoare triple {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} is VALID [2022-04-07 17:21:47,316 INFO L284 TraceCheckUtils]: 64: Hoare quadruple {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} {19737#(and (= main_~i~1 4) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19737#(and (= main_~i~1 4) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} is VALID [2022-04-07 17:21:47,317 INFO L290 TraceCheckUtils]: 65: Hoare triple {19737#(and (= main_~i~1 4) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {19737#(and (= main_~i~1 4) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} is VALID [2022-04-07 17:21:47,317 INFO L290 TraceCheckUtils]: 66: Hoare triple {19737#(and (= main_~i~1 4) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {19762#(and (= 4 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} is VALID [2022-04-07 17:21:47,317 INFO L290 TraceCheckUtils]: 67: Hoare triple {19762#(and (= 4 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19762#(and (= 4 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} is VALID [2022-04-07 17:21:47,318 INFO L272 TraceCheckUtils]: 68: Hoare triple {19762#(and (= 4 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} is VALID [2022-04-07 17:21:47,319 INFO L290 TraceCheckUtils]: 69: Hoare triple {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} is VALID [2022-04-07 17:21:47,319 INFO L290 TraceCheckUtils]: 70: Hoare triple {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} is VALID [2022-04-07 17:21:47,319 INFO L290 TraceCheckUtils]: 71: Hoare triple {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} is VALID [2022-04-07 17:21:47,320 INFO L284 TraceCheckUtils]: 72: Hoare quadruple {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} {19762#(and (= 4 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19762#(and (= 4 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} is VALID [2022-04-07 17:21:47,320 INFO L290 TraceCheckUtils]: 73: Hoare triple {19762#(and (= 4 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {19762#(and (= 4 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} is VALID [2022-04-07 17:21:47,321 INFO L290 TraceCheckUtils]: 74: Hoare triple {19762#(and (= 4 (+ (- 1) main_~i~1)) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {19787#(and (= main_~i~1 6) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} is VALID [2022-04-07 17:21:47,321 INFO L290 TraceCheckUtils]: 75: Hoare triple {19787#(and (= main_~i~1 6) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19787#(and (= main_~i~1 6) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} is VALID [2022-04-07 17:21:47,322 INFO L272 TraceCheckUtils]: 76: Hoare triple {19787#(and (= main_~i~1 6) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} is VALID [2022-04-07 17:21:47,323 INFO L290 TraceCheckUtils]: 77: Hoare triple {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} is VALID [2022-04-07 17:21:47,323 INFO L290 TraceCheckUtils]: 78: Hoare triple {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} is VALID [2022-04-07 17:21:47,323 INFO L290 TraceCheckUtils]: 79: Hoare triple {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} is VALID [2022-04-07 17:21:47,324 INFO L284 TraceCheckUtils]: 80: Hoare quadruple {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} {19787#(and (= main_~i~1 6) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19787#(and (= main_~i~1 6) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} is VALID [2022-04-07 17:21:47,324 INFO L290 TraceCheckUtils]: 81: Hoare triple {19787#(and (= main_~i~1 6) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {19787#(and (= main_~i~1 6) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} is VALID [2022-04-07 17:21:47,325 INFO L290 TraceCheckUtils]: 82: Hoare triple {19787#(and (= main_~i~1 6) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {19812#(and (= 7 main_~i~1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} is VALID [2022-04-07 17:21:47,325 INFO L290 TraceCheckUtils]: 83: Hoare triple {19812#(and (= 7 main_~i~1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19812#(and (= 7 main_~i~1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} is VALID [2022-04-07 17:21:47,326 INFO L272 TraceCheckUtils]: 84: Hoare triple {19812#(and (= 7 main_~i~1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} is VALID [2022-04-07 17:21:47,326 INFO L290 TraceCheckUtils]: 85: Hoare triple {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} is VALID [2022-04-07 17:21:47,327 INFO L290 TraceCheckUtils]: 86: Hoare triple {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} is VALID [2022-04-07 17:21:47,327 INFO L290 TraceCheckUtils]: 87: Hoare triple {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} is VALID [2022-04-07 17:21:47,327 INFO L284 TraceCheckUtils]: 88: Hoare quadruple {19643#(exists ((v_main_~x~0.offset_BEFORE_CALL_127 Int) (v_main_~x~0.base_BEFORE_CALL_127 Int)) (= (select (select |#memory_int| v_main_~x~0.base_BEFORE_CALL_127) (+ 32 v_main_~x~0.offset_BEFORE_CALL_127)) 0))} {19812#(and (= 7 main_~i~1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19812#(and (= 7 main_~i~1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} is VALID [2022-04-07 17:21:47,328 INFO L290 TraceCheckUtils]: 89: Hoare triple {19812#(and (= 7 main_~i~1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {19812#(and (= 7 main_~i~1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} is VALID [2022-04-07 17:21:47,329 INFO L290 TraceCheckUtils]: 90: Hoare triple {19812#(and (= 7 main_~i~1) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {19837#(and (= main_~i~1 8) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} is VALID [2022-04-07 17:21:47,329 INFO L290 TraceCheckUtils]: 91: Hoare triple {19837#(and (= main_~i~1 8) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19552#(= |main_#t~mem5| 0)} is VALID [2022-04-07 17:21:47,330 INFO L272 TraceCheckUtils]: 92: Hoare triple {19552#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19844#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:21:47,330 INFO L290 TraceCheckUtils]: 93: Hoare triple {19844#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19848#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:21:47,330 INFO L290 TraceCheckUtils]: 94: Hoare triple {19848#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {19496#false} is VALID [2022-04-07 17:21:47,331 INFO L290 TraceCheckUtils]: 95: Hoare triple {19496#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19496#false} is VALID [2022-04-07 17:21:47,334 INFO L134 CoverageAnalysis]: Checked inductivity of 337 backedges. 0 proven. 225 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2022-04-07 17:21:47,334 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 17:21:49,649 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2022-04-07 17:21:49,652 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2022-04-07 17:21:49,785 INFO L290 TraceCheckUtils]: 95: Hoare triple {19496#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19496#false} is VALID [2022-04-07 17:21:49,786 INFO L290 TraceCheckUtils]: 94: Hoare triple {19848#(<= 1 __VERIFIER_assert_~cond)} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {19496#false} is VALID [2022-04-07 17:21:49,786 INFO L290 TraceCheckUtils]: 93: Hoare triple {19844#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19848#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:21:49,787 INFO L272 TraceCheckUtils]: 92: Hoare triple {19552#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19844#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:21:49,787 INFO L290 TraceCheckUtils]: 91: Hoare triple {19551#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19552#(= |main_#t~mem5| 0)} is VALID [2022-04-07 17:21:49,788 INFO L290 TraceCheckUtils]: 90: Hoare triple {19546#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {19551#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:21:49,788 INFO L290 TraceCheckUtils]: 89: Hoare triple {19546#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {19546#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:21:49,789 INFO L284 TraceCheckUtils]: 88: Hoare quadruple {19495#true} {19546#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19546#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:21:49,789 INFO L290 TraceCheckUtils]: 87: Hoare triple {19495#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-07 17:21:49,789 INFO L290 TraceCheckUtils]: 86: Hoare triple {19495#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-07 17:21:49,789 INFO L290 TraceCheckUtils]: 85: Hoare triple {19495#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19495#true} is VALID [2022-04-07 17:21:49,789 INFO L272 TraceCheckUtils]: 84: Hoare triple {19546#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19495#true} is VALID [2022-04-07 17:21:49,789 INFO L290 TraceCheckUtils]: 83: Hoare triple {19546#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19546#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:21:49,790 INFO L290 TraceCheckUtils]: 82: Hoare triple {19541#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {19546#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:21:49,790 INFO L290 TraceCheckUtils]: 81: Hoare triple {19541#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {19541#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:21:49,791 INFO L284 TraceCheckUtils]: 80: Hoare quadruple {19495#true} {19541#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19541#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:21:49,791 INFO L290 TraceCheckUtils]: 79: Hoare triple {19495#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-07 17:21:49,791 INFO L290 TraceCheckUtils]: 78: Hoare triple {19495#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-07 17:21:49,791 INFO L290 TraceCheckUtils]: 77: Hoare triple {19495#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19495#true} is VALID [2022-04-07 17:21:49,791 INFO L272 TraceCheckUtils]: 76: Hoare triple {19541#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19495#true} is VALID [2022-04-07 17:21:49,791 INFO L290 TraceCheckUtils]: 75: Hoare triple {19541#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19541#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:21:49,792 INFO L290 TraceCheckUtils]: 74: Hoare triple {19536#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {19541#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:21:49,792 INFO L290 TraceCheckUtils]: 73: Hoare triple {19536#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {19536#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:21:49,793 INFO L284 TraceCheckUtils]: 72: Hoare quadruple {19495#true} {19536#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19536#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:21:49,793 INFO L290 TraceCheckUtils]: 71: Hoare triple {19495#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-07 17:21:49,793 INFO L290 TraceCheckUtils]: 70: Hoare triple {19495#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-07 17:21:49,793 INFO L290 TraceCheckUtils]: 69: Hoare triple {19495#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19495#true} is VALID [2022-04-07 17:21:49,793 INFO L272 TraceCheckUtils]: 68: Hoare triple {19536#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19495#true} is VALID [2022-04-07 17:21:49,793 INFO L290 TraceCheckUtils]: 67: Hoare triple {19536#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19536#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:21:49,794 INFO L290 TraceCheckUtils]: 66: Hoare triple {19531#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {19536#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:21:49,794 INFO L290 TraceCheckUtils]: 65: Hoare triple {19531#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {19531#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:21:49,795 INFO L284 TraceCheckUtils]: 64: Hoare quadruple {19495#true} {19531#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19531#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:21:49,795 INFO L290 TraceCheckUtils]: 63: Hoare triple {19495#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-07 17:21:49,795 INFO L290 TraceCheckUtils]: 62: Hoare triple {19495#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-07 17:21:49,795 INFO L290 TraceCheckUtils]: 61: Hoare triple {19495#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19495#true} is VALID [2022-04-07 17:21:49,795 INFO L272 TraceCheckUtils]: 60: Hoare triple {19531#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19495#true} is VALID [2022-04-07 17:21:49,796 INFO L290 TraceCheckUtils]: 59: Hoare triple {19531#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19531#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:21:49,796 INFO L290 TraceCheckUtils]: 58: Hoare triple {19526#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {19531#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:21:49,796 INFO L290 TraceCheckUtils]: 57: Hoare triple {19526#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {19526#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 17:21:49,797 INFO L284 TraceCheckUtils]: 56: Hoare quadruple {19495#true} {19526#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19526#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 17:21:49,797 INFO L290 TraceCheckUtils]: 55: Hoare triple {19495#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-07 17:21:49,797 INFO L290 TraceCheckUtils]: 54: Hoare triple {19495#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-07 17:21:49,797 INFO L290 TraceCheckUtils]: 53: Hoare triple {19495#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19495#true} is VALID [2022-04-07 17:21:49,797 INFO L272 TraceCheckUtils]: 52: Hoare triple {19526#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19495#true} is VALID [2022-04-07 17:21:49,798 INFO L290 TraceCheckUtils]: 51: Hoare triple {19526#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19526#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 17:21:49,798 INFO L290 TraceCheckUtils]: 50: Hoare triple {19521#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {19526#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 17:21:49,798 INFO L290 TraceCheckUtils]: 49: Hoare triple {19521#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {19521#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 17:21:49,799 INFO L284 TraceCheckUtils]: 48: Hoare quadruple {19495#true} {19521#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19521#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 17:21:49,799 INFO L290 TraceCheckUtils]: 47: Hoare triple {19495#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-07 17:21:49,799 INFO L290 TraceCheckUtils]: 46: Hoare triple {19495#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-07 17:21:49,799 INFO L290 TraceCheckUtils]: 45: Hoare triple {19495#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19495#true} is VALID [2022-04-07 17:21:49,799 INFO L272 TraceCheckUtils]: 44: Hoare triple {19521#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19495#true} is VALID [2022-04-07 17:21:49,799 INFO L290 TraceCheckUtils]: 43: Hoare triple {19521#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19521#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 17:21:49,800 INFO L290 TraceCheckUtils]: 42: Hoare triple {19516#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {19521#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 17:21:49,800 INFO L290 TraceCheckUtils]: 41: Hoare triple {19516#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {19516#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-07 17:21:49,801 INFO L284 TraceCheckUtils]: 40: Hoare quadruple {19495#true} {19516#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19516#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-07 17:21:49,801 INFO L290 TraceCheckUtils]: 39: Hoare triple {19495#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-07 17:21:49,801 INFO L290 TraceCheckUtils]: 38: Hoare triple {19495#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-07 17:21:49,801 INFO L290 TraceCheckUtils]: 37: Hoare triple {19495#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19495#true} is VALID [2022-04-07 17:21:49,801 INFO L272 TraceCheckUtils]: 36: Hoare triple {19516#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19495#true} is VALID [2022-04-07 17:21:49,801 INFO L290 TraceCheckUtils]: 35: Hoare triple {19516#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {19516#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-07 17:21:49,802 INFO L290 TraceCheckUtils]: 34: Hoare triple {20038#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {19516#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-07 17:21:49,802 INFO L290 TraceCheckUtils]: 33: Hoare triple {20038#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {20038#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:21:49,803 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {19495#true} {20038#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20038#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:21:49,803 INFO L290 TraceCheckUtils]: 31: Hoare triple {19495#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-07 17:21:49,803 INFO L290 TraceCheckUtils]: 30: Hoare triple {19495#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-07 17:21:49,803 INFO L290 TraceCheckUtils]: 29: Hoare triple {19495#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19495#true} is VALID [2022-04-07 17:21:49,803 INFO L272 TraceCheckUtils]: 28: Hoare triple {20038#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {19495#true} is VALID [2022-04-07 17:21:49,804 INFO L290 TraceCheckUtils]: 27: Hoare triple {20038#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {20038#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:21:49,804 INFO L290 TraceCheckUtils]: 26: Hoare triple {19510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {20038#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:21:49,804 INFO L290 TraceCheckUtils]: 25: Hoare triple {19510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {19510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0)} is VALID [2022-04-07 17:21:49,805 INFO L290 TraceCheckUtils]: 24: Hoare triple {19510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0)} is VALID [2022-04-07 17:21:49,805 INFO L290 TraceCheckUtils]: 23: Hoare triple {19508#(and (<= 8 main_~i~0) (<= main_~i~0 8))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19510#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0)} is VALID [2022-04-07 17:21:49,806 INFO L290 TraceCheckUtils]: 22: Hoare triple {19507#(and (<= main_~i~0 7) (<= 7 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19508#(and (<= 8 main_~i~0) (<= main_~i~0 8))} is VALID [2022-04-07 17:21:49,806 INFO L290 TraceCheckUtils]: 21: Hoare triple {19507#(and (<= main_~i~0 7) (<= 7 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19507#(and (<= main_~i~0 7) (<= 7 main_~i~0))} is VALID [2022-04-07 17:21:49,806 INFO L290 TraceCheckUtils]: 20: Hoare triple {19506#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19507#(and (<= main_~i~0 7) (<= 7 main_~i~0))} is VALID [2022-04-07 17:21:49,807 INFO L290 TraceCheckUtils]: 19: Hoare triple {19506#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19506#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-07 17:21:49,807 INFO L290 TraceCheckUtils]: 18: Hoare triple {19505#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19506#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-07 17:21:49,808 INFO L290 TraceCheckUtils]: 17: Hoare triple {19505#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19505#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 17:21:49,808 INFO L290 TraceCheckUtils]: 16: Hoare triple {19504#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19505#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 17:21:49,808 INFO L290 TraceCheckUtils]: 15: Hoare triple {19504#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19504#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 17:21:49,809 INFO L290 TraceCheckUtils]: 14: Hoare triple {19503#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19504#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 17:21:49,809 INFO L290 TraceCheckUtils]: 13: Hoare triple {19503#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19503#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 17:21:49,810 INFO L290 TraceCheckUtils]: 12: Hoare triple {19502#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19503#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 17:21:49,810 INFO L290 TraceCheckUtils]: 11: Hoare triple {19502#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19502#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:21:49,810 INFO L290 TraceCheckUtils]: 10: Hoare triple {19501#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19502#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:21:49,811 INFO L290 TraceCheckUtils]: 9: Hoare triple {19501#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19501#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:21:49,811 INFO L290 TraceCheckUtils]: 8: Hoare triple {19500#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {19501#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:21:49,812 INFO L290 TraceCheckUtils]: 7: Hoare triple {19500#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {19500#(= main_~i~0 0)} is VALID [2022-04-07 17:21:49,812 INFO L290 TraceCheckUtils]: 6: Hoare triple {19495#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {19500#(= main_~i~0 0)} is VALID [2022-04-07 17:21:49,812 INFO L290 TraceCheckUtils]: 5: Hoare triple {19495#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {19495#true} is VALID [2022-04-07 17:21:49,812 INFO L272 TraceCheckUtils]: 4: Hoare triple {19495#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-07 17:21:49,812 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19495#true} {19495#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-07 17:21:49,812 INFO L290 TraceCheckUtils]: 2: Hoare triple {19495#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-07 17:21:49,812 INFO L290 TraceCheckUtils]: 1: Hoare triple {19495#true} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {19495#true} is VALID [2022-04-07 17:21:49,812 INFO L272 TraceCheckUtils]: 0: Hoare triple {19495#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19495#true} is VALID [2022-04-07 17:21:49,813 INFO L134 CoverageAnalysis]: Checked inductivity of 337 backedges. 16 proven. 209 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2022-04-07 17:21:49,813 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [768484667] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 17:21:49,813 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 17:21:49,813 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 25, 24] total 38 [2022-04-07 17:21:49,813 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [349177846] [2022-04-07 17:21:49,813 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 17:21:49,814 INFO L78 Accepts]: Start accepts. Automaton has has 38 states, 37 states have (on average 2.4324324324324325) internal successors, (90), 35 states have internal predecessors, (90), 18 states have call successors, (22), 5 states have call predecessors, (22), 2 states have return successors, (18), 17 states have call predecessors, (18), 17 states have call successors, (18) Word has length 96 [2022-04-07 17:21:49,814 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:21:49,814 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 38 states, 37 states have (on average 2.4324324324324325) internal successors, (90), 35 states have internal predecessors, (90), 18 states have call successors, (22), 5 states have call predecessors, (22), 2 states have return successors, (18), 17 states have call predecessors, (18), 17 states have call successors, (18) [2022-04-07 17:21:49,902 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 130 edges. 130 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:21:49,902 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 38 states [2022-04-07 17:21:49,902 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:21:49,902 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2022-04-07 17:21:49,903 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=106, Invalid=1291, Unknown=9, NotChecked=0, Total=1406 [2022-04-07 17:21:49,903 INFO L87 Difference]: Start difference. First operand 152 states and 155 transitions. Second operand has 38 states, 37 states have (on average 2.4324324324324325) internal successors, (90), 35 states have internal predecessors, (90), 18 states have call successors, (22), 5 states have call predecessors, (22), 2 states have return successors, (18), 17 states have call predecessors, (18), 17 states have call successors, (18) [2022-04-07 17:22:00,290 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:22:00,290 INFO L93 Difference]: Finished difference Result 174 states and 176 transitions. [2022-04-07 17:22:00,290 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2022-04-07 17:22:00,291 INFO L78 Accepts]: Start accepts. Automaton has has 38 states, 37 states have (on average 2.4324324324324325) internal successors, (90), 35 states have internal predecessors, (90), 18 states have call successors, (22), 5 states have call predecessors, (22), 2 states have return successors, (18), 17 states have call predecessors, (18), 17 states have call successors, (18) Word has length 96 [2022-04-07 17:22:00,291 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:22:00,291 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 38 states, 37 states have (on average 2.4324324324324325) internal successors, (90), 35 states have internal predecessors, (90), 18 states have call successors, (22), 5 states have call predecessors, (22), 2 states have return successors, (18), 17 states have call predecessors, (18), 17 states have call successors, (18) [2022-04-07 17:22:00,292 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 94 transitions. [2022-04-07 17:22:00,293 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 38 states, 37 states have (on average 2.4324324324324325) internal successors, (90), 35 states have internal predecessors, (90), 18 states have call successors, (22), 5 states have call predecessors, (22), 2 states have return successors, (18), 17 states have call predecessors, (18), 17 states have call successors, (18) [2022-04-07 17:22:00,294 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 94 transitions. [2022-04-07 17:22:00,294 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 38 states and 94 transitions. [2022-04-07 17:22:00,390 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 94 edges. 94 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:22:00,392 INFO L225 Difference]: With dead ends: 174 [2022-04-07 17:22:00,392 INFO L226 Difference]: Without dead ends: 174 [2022-04-07 17:22:00,393 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 269 GetRequests, 186 SyntacticMatches, 20 SemanticMatches, 63 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 921 ImplicationChecksByTransitivity, 108.0s TimeCoverageRelationStatistics Valid=285, Invalid=3862, Unknown=13, NotChecked=0, Total=4160 [2022-04-07 17:22:00,393 INFO L913 BasicCegarLoop]: 35 mSDtfsCounter, 69 mSDsluCounter, 302 mSDsCounter, 0 mSdLazyCounter, 1342 mSolverCounterSat, 26 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 70 SdHoareTripleChecker+Valid, 337 SdHoareTripleChecker+Invalid, 1485 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 26 IncrementalHoareTripleChecker+Valid, 1342 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 117 IncrementalHoareTripleChecker+Unchecked, 1.0s IncrementalHoareTripleChecker+Time [2022-04-07 17:22:00,394 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [70 Valid, 337 Invalid, 1485 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [26 Valid, 1342 Invalid, 0 Unknown, 117 Unchecked, 1.0s Time] [2022-04-07 17:22:00,394 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 174 states. [2022-04-07 17:22:00,396 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 174 to 110. [2022-04-07 17:22:00,396 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:22:00,396 INFO L82 GeneralOperation]: Start isEquivalent. First operand 174 states. Second operand has 110 states, 86 states have (on average 1.0348837209302326) internal successors, (89), 87 states have internal predecessors, (89), 12 states have call successors, (12), 12 states have call predecessors, (12), 11 states have return successors, (11), 10 states have call predecessors, (11), 11 states have call successors, (11) [2022-04-07 17:22:00,396 INFO L74 IsIncluded]: Start isIncluded. First operand 174 states. Second operand has 110 states, 86 states have (on average 1.0348837209302326) internal successors, (89), 87 states have internal predecessors, (89), 12 states have call successors, (12), 12 states have call predecessors, (12), 11 states have return successors, (11), 10 states have call predecessors, (11), 11 states have call successors, (11) [2022-04-07 17:22:00,397 INFO L87 Difference]: Start difference. First operand 174 states. Second operand has 110 states, 86 states have (on average 1.0348837209302326) internal successors, (89), 87 states have internal predecessors, (89), 12 states have call successors, (12), 12 states have call predecessors, (12), 11 states have return successors, (11), 10 states have call predecessors, (11), 11 states have call successors, (11) [2022-04-07 17:22:00,399 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:22:00,399 INFO L93 Difference]: Finished difference Result 174 states and 176 transitions. [2022-04-07 17:22:00,399 INFO L276 IsEmpty]: Start isEmpty. Operand 174 states and 176 transitions. [2022-04-07 17:22:00,400 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:22:00,400 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:22:00,400 INFO L74 IsIncluded]: Start isIncluded. First operand has 110 states, 86 states have (on average 1.0348837209302326) internal successors, (89), 87 states have internal predecessors, (89), 12 states have call successors, (12), 12 states have call predecessors, (12), 11 states have return successors, (11), 10 states have call predecessors, (11), 11 states have call successors, (11) Second operand 174 states. [2022-04-07 17:22:00,400 INFO L87 Difference]: Start difference. First operand has 110 states, 86 states have (on average 1.0348837209302326) internal successors, (89), 87 states have internal predecessors, (89), 12 states have call successors, (12), 12 states have call predecessors, (12), 11 states have return successors, (11), 10 states have call predecessors, (11), 11 states have call successors, (11) Second operand 174 states. [2022-04-07 17:22:00,402 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:22:00,402 INFO L93 Difference]: Finished difference Result 174 states and 176 transitions. [2022-04-07 17:22:00,402 INFO L276 IsEmpty]: Start isEmpty. Operand 174 states and 176 transitions. [2022-04-07 17:22:00,403 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:22:00,403 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:22:00,403 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:22:00,403 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:22:00,403 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 110 states, 86 states have (on average 1.0348837209302326) internal successors, (89), 87 states have internal predecessors, (89), 12 states have call successors, (12), 12 states have call predecessors, (12), 11 states have return successors, (11), 10 states have call predecessors, (11), 11 states have call successors, (11) [2022-04-07 17:22:00,404 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 110 states to 110 states and 112 transitions. [2022-04-07 17:22:00,404 INFO L78 Accepts]: Start accepts. Automaton has 110 states and 112 transitions. Word has length 96 [2022-04-07 17:22:00,405 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:22:00,405 INFO L478 AbstractCegarLoop]: Abstraction has 110 states and 112 transitions. [2022-04-07 17:22:00,405 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 38 states, 37 states have (on average 2.4324324324324325) internal successors, (90), 35 states have internal predecessors, (90), 18 states have call successors, (22), 5 states have call predecessors, (22), 2 states have return successors, (18), 17 states have call predecessors, (18), 17 states have call successors, (18) [2022-04-07 17:22:00,405 INFO L276 IsEmpty]: Start isEmpty. Operand 110 states and 112 transitions. [2022-04-07 17:22:00,405 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2022-04-07 17:22:00,406 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:22:00,406 INFO L499 BasicCegarLoop]: trace histogram [10, 10, 9, 9, 9, 8, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:22:00,431 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Forceful destruction successful, exit code 0 [2022-04-07 17:22:00,629 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 25 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable25 [2022-04-07 17:22:00,629 INFO L403 AbstractCegarLoop]: === Iteration 27 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:22:00,629 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:22:00,629 INFO L85 PathProgramCache]: Analyzing trace with hash 406127555, now seen corresponding path program 24 times [2022-04-07 17:22:00,629 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:22:00,630 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1389179239] [2022-04-07 17:22:00,630 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:22:00,630 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:22:00,652 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:22:01,067 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:22:01,069 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:22:01,076 INFO L290 TraceCheckUtils]: 0: Hoare triple {20898#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {20837#true} is VALID [2022-04-07 17:22:01,076 INFO L290 TraceCheckUtils]: 1: Hoare triple {20837#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-07 17:22:01,076 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {20837#true} {20837#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-07 17:22:01,076 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 30 [2022-04-07 17:22:01,077 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:22:01,079 INFO L290 TraceCheckUtils]: 0: Hoare triple {20837#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {20837#true} is VALID [2022-04-07 17:22:01,080 INFO L290 TraceCheckUtils]: 1: Hoare triple {20837#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-07 17:22:01,080 INFO L290 TraceCheckUtils]: 2: Hoare triple {20837#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-07 17:22:01,080 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {20837#true} {20854#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20854#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:22:01,080 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 38 [2022-04-07 17:22:01,081 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:22:01,083 INFO L290 TraceCheckUtils]: 0: Hoare triple {20837#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {20837#true} is VALID [2022-04-07 17:22:01,083 INFO L290 TraceCheckUtils]: 1: Hoare triple {20837#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-07 17:22:01,083 INFO L290 TraceCheckUtils]: 2: Hoare triple {20837#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-07 17:22:01,084 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {20837#true} {20859#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20859#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-07 17:22:01,084 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 46 [2022-04-07 17:22:01,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:22:01,086 INFO L290 TraceCheckUtils]: 0: Hoare triple {20837#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {20837#true} is VALID [2022-04-07 17:22:01,087 INFO L290 TraceCheckUtils]: 1: Hoare triple {20837#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-07 17:22:01,087 INFO L290 TraceCheckUtils]: 2: Hoare triple {20837#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-07 17:22:01,087 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {20837#true} {20864#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20864#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 17:22:01,087 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 54 [2022-04-07 17:22:01,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:22:01,090 INFO L290 TraceCheckUtils]: 0: Hoare triple {20837#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {20837#true} is VALID [2022-04-07 17:22:01,090 INFO L290 TraceCheckUtils]: 1: Hoare triple {20837#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-07 17:22:01,090 INFO L290 TraceCheckUtils]: 2: Hoare triple {20837#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-07 17:22:01,090 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {20837#true} {20869#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20869#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 17:22:01,091 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 62 [2022-04-07 17:22:01,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:22:01,093 INFO L290 TraceCheckUtils]: 0: Hoare triple {20837#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {20837#true} is VALID [2022-04-07 17:22:01,093 INFO L290 TraceCheckUtils]: 1: Hoare triple {20837#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-07 17:22:01,093 INFO L290 TraceCheckUtils]: 2: Hoare triple {20837#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-07 17:22:01,094 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {20837#true} {20874#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20874#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:22:01,094 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 70 [2022-04-07 17:22:01,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:22:01,096 INFO L290 TraceCheckUtils]: 0: Hoare triple {20837#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {20837#true} is VALID [2022-04-07 17:22:01,096 INFO L290 TraceCheckUtils]: 1: Hoare triple {20837#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-07 17:22:01,096 INFO L290 TraceCheckUtils]: 2: Hoare triple {20837#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-07 17:22:01,097 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {20837#true} {20879#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20879#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:22:01,097 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 78 [2022-04-07 17:22:01,098 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:22:01,099 INFO L290 TraceCheckUtils]: 0: Hoare triple {20837#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {20837#true} is VALID [2022-04-07 17:22:01,099 INFO L290 TraceCheckUtils]: 1: Hoare triple {20837#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-07 17:22:01,099 INFO L290 TraceCheckUtils]: 2: Hoare triple {20837#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-07 17:22:01,100 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {20837#true} {20884#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20884#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:22:01,100 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 86 [2022-04-07 17:22:01,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:22:01,103 INFO L290 TraceCheckUtils]: 0: Hoare triple {20837#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {20837#true} is VALID [2022-04-07 17:22:01,103 INFO L290 TraceCheckUtils]: 1: Hoare triple {20837#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-07 17:22:01,103 INFO L290 TraceCheckUtils]: 2: Hoare triple {20837#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-07 17:22:01,103 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {20837#true} {20889#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20889#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:22:01,104 INFO L272 TraceCheckUtils]: 0: Hoare triple {20837#true} [73] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20898#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:22:01,104 INFO L290 TraceCheckUtils]: 1: Hoare triple {20898#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [75] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_4| 1))) (and (= 2 (select |v_#length_3| 1)) (< 0 |v_#StackHeapBarrier_2|) (= (select |v_#valid_3| 1) 1) (= (select .cse0 1) 0) (= |v_#NULL.base_1| 0) (= 9 (select |v_#length_3| 2)) (= (select |v_#valid_3| 0) 0) (= 48 (select .cse0 0)) (= (select |v_#valid_3| 2) 1) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_4|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_3|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {20837#true} is VALID [2022-04-07 17:22:01,104 INFO L290 TraceCheckUtils]: 2: Hoare triple {20837#true} [78] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-07 17:22:01,104 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {20837#true} {20837#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-07 17:22:01,104 INFO L272 TraceCheckUtils]: 4: Hoare triple {20837#true} [74] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-07 17:22:01,104 INFO L290 TraceCheckUtils]: 5: Hoare triple {20837#true} [77] mainENTRY-->L28: Formula: (and (<= |v_main_#t~nondet1_2| 2147483647) (= v_main_~n~0_3 |v_main_#t~nondet1_2|) (<= 0 (+ |v_main_#t~nondet1_2| 2147483648))) InVars {main_#t~nondet1=|v_main_#t~nondet1_2|} OutVars{main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_#t~nondet1, main_~n~0] {20837#true} is VALID [2022-04-07 17:22:01,105 INFO L290 TraceCheckUtils]: 6: Hoare triple {20837#true} [80] L28-->L30-3: Formula: (and (< v_main_~x~0.base_2 |v_#StackHeapBarrier_1|) (= (select |v_#valid_2| v_main_~x~0.base_2) 0) (not (= v_main_~x~0.base_2 0)) (= v_main_~i~0_1 0) (<= 0 v_main_~n~0_5) (= v_main_~x~0.offset_2 0) (= (store |v_#length_2| v_main_~x~0.base_2 (* v_main_~n~0_5 4)) |v_#length_1|) (<= v_main_~n~0_5 1000) (= (store |v_#valid_2| v_main_~x~0.base_2 1) |v_#valid_1|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, main_~n~0=v_main_~n~0_5, #valid=|v_#valid_2|} OutVars{main_#t~malloc2.base=|v_main_#t~malloc2.base_1|, main_~x~0.offset=v_main_~x~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~x~0.base=v_main_~x~0.base_2, #length=|v_#length_1|, main_~n~0=v_main_~n~0_5, main_#t~malloc2.offset=|v_main_#t~malloc2.offset_1|} AuxVars[] AssignedVars[main_#t~malloc2.base, main_~x~0.offset, #valid, main_~i~0, main_~x~0.base, #length, main_#t~malloc2.offset] {20842#(= main_~i~0 0)} is VALID [2022-04-07 17:22:01,105 INFO L290 TraceCheckUtils]: 7: Hoare triple {20842#(= main_~i~0 0)} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {20842#(= main_~i~0 0)} is VALID [2022-04-07 17:22:01,105 INFO L290 TraceCheckUtils]: 8: Hoare triple {20842#(= main_~i~0 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {20843#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:22:01,106 INFO L290 TraceCheckUtils]: 9: Hoare triple {20843#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {20843#(and (<= main_~i~0 1) (<= 1 main_~i~0))} is VALID [2022-04-07 17:22:01,106 INFO L290 TraceCheckUtils]: 10: Hoare triple {20843#(and (<= main_~i~0 1) (<= 1 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {20844#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:22:01,107 INFO L290 TraceCheckUtils]: 11: Hoare triple {20844#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {20844#(and (<= 2 main_~i~0) (<= main_~i~0 2))} is VALID [2022-04-07 17:22:01,107 INFO L290 TraceCheckUtils]: 12: Hoare triple {20844#(and (<= 2 main_~i~0) (<= main_~i~0 2))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {20845#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 17:22:01,108 INFO L290 TraceCheckUtils]: 13: Hoare triple {20845#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {20845#(and (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 17:22:01,108 INFO L290 TraceCheckUtils]: 14: Hoare triple {20845#(and (<= 3 main_~i~0) (<= main_~i~0 3))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {20846#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 17:22:01,109 INFO L290 TraceCheckUtils]: 15: Hoare triple {20846#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {20846#(and (<= main_~i~0 4) (<= 4 main_~i~0))} is VALID [2022-04-07 17:22:01,109 INFO L290 TraceCheckUtils]: 16: Hoare triple {20846#(and (<= main_~i~0 4) (<= 4 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {20847#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 17:22:01,110 INFO L290 TraceCheckUtils]: 17: Hoare triple {20847#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {20847#(and (<= main_~i~0 5) (<= 5 main_~i~0))} is VALID [2022-04-07 17:22:01,110 INFO L290 TraceCheckUtils]: 18: Hoare triple {20847#(and (<= main_~i~0 5) (<= 5 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {20848#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-07 17:22:01,110 INFO L290 TraceCheckUtils]: 19: Hoare triple {20848#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {20848#(and (<= main_~i~0 6) (<= 6 main_~i~0))} is VALID [2022-04-07 17:22:01,111 INFO L290 TraceCheckUtils]: 20: Hoare triple {20848#(and (<= main_~i~0 6) (<= 6 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {20849#(and (<= main_~i~0 7) (<= 7 main_~i~0))} is VALID [2022-04-07 17:22:01,111 INFO L290 TraceCheckUtils]: 21: Hoare triple {20849#(and (<= main_~i~0 7) (<= 7 main_~i~0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {20849#(and (<= main_~i~0 7) (<= 7 main_~i~0))} is VALID [2022-04-07 17:22:01,112 INFO L290 TraceCheckUtils]: 22: Hoare triple {20849#(and (<= main_~i~0 7) (<= 7 main_~i~0))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {20850#(and (<= 8 main_~i~0) (<= main_~i~0 8))} is VALID [2022-04-07 17:22:01,113 INFO L290 TraceCheckUtils]: 23: Hoare triple {20850#(and (<= 8 main_~i~0) (<= main_~i~0 8))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {20851#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 8 main_~i~0) (<= main_~i~0 8))} is VALID [2022-04-07 17:22:01,113 INFO L290 TraceCheckUtils]: 24: Hoare triple {20851#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~0 4))) 0) (<= 8 main_~i~0) (<= main_~i~0 8))} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {20852#(and (not (= (+ main_~x~0.offset (* main_~i~0 4)) (+ main_~x~0.offset 32))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} is VALID [2022-04-07 17:22:01,114 INFO L290 TraceCheckUtils]: 25: Hoare triple {20852#(and (not (= (+ main_~x~0.offset (* main_~i~0 4)) (+ main_~x~0.offset 32))) (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0))} [84] L30-3-->L30-2: Formula: (and (< v_main_~i~0_3 v_main_~n~0_7) (= (store |v_#memory_int_3| v_main_~x~0.base_3 (store (select |v_#memory_int_3| v_main_~x~0.base_3) (+ v_main_~x~0.offset_3 (* v_main_~i~0_3 4)) 0)) |v_#memory_int_2|)) InVars {main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_3|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} OutVars{main_~x~0.offset=v_main_~x~0.offset_3, #memory_int=|v_#memory_int_2|, main_~x~0.base=v_main_~x~0.base_3, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_7} AuxVars[] AssignedVars[#memory_int] {20853#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0)} is VALID [2022-04-07 17:22:01,114 INFO L290 TraceCheckUtils]: 26: Hoare triple {20853#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0)} [86] L30-2-->L30-3: Formula: (= v_main_~i~0_4 (+ v_main_~i~0_5 1)) InVars {main_~i~0=v_main_~i~0_5} OutVars{main_~i~0=v_main_~i~0_4, main_#t~post3=|v_main_#t~post3_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post3] {20853#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0)} is VALID [2022-04-07 17:22:01,115 INFO L290 TraceCheckUtils]: 27: Hoare triple {20853#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0)} [83] L30-3-->L30-4: Formula: (not (< v_main_~i~0_2 v_main_~n~0_6)) InVars {main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_6} AuxVars[] AssignedVars[] {20853#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0)} is VALID [2022-04-07 17:22:01,115 INFO L290 TraceCheckUtils]: 28: Hoare triple {20853#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0)} [85] L30-4-->L31-5: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] {20854#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:22:01,115 INFO L290 TraceCheckUtils]: 29: Hoare triple {20854#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {20854#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:22:01,116 INFO L272 TraceCheckUtils]: 30: Hoare triple {20854#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20837#true} is VALID [2022-04-07 17:22:01,116 INFO L290 TraceCheckUtils]: 31: Hoare triple {20837#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {20837#true} is VALID [2022-04-07 17:22:01,116 INFO L290 TraceCheckUtils]: 32: Hoare triple {20837#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-07 17:22:01,116 INFO L290 TraceCheckUtils]: 33: Hoare triple {20837#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-07 17:22:01,116 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {20837#true} {20854#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20854#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:22:01,117 INFO L290 TraceCheckUtils]: 35: Hoare triple {20854#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {20854#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} is VALID [2022-04-07 17:22:01,117 INFO L290 TraceCheckUtils]: 36: Hoare triple {20854#(and (= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 32)) 0) (= main_~i~1 0))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {20859#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-07 17:22:01,118 INFO L290 TraceCheckUtils]: 37: Hoare triple {20859#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {20859#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-07 17:22:01,118 INFO L272 TraceCheckUtils]: 38: Hoare triple {20859#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20837#true} is VALID [2022-04-07 17:22:01,118 INFO L290 TraceCheckUtils]: 39: Hoare triple {20837#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {20837#true} is VALID [2022-04-07 17:22:01,118 INFO L290 TraceCheckUtils]: 40: Hoare triple {20837#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-07 17:22:01,118 INFO L290 TraceCheckUtils]: 41: Hoare triple {20837#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-07 17:22:01,119 INFO L284 TraceCheckUtils]: 42: Hoare quadruple {20837#true} {20859#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20859#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-07 17:22:01,119 INFO L290 TraceCheckUtils]: 43: Hoare triple {20859#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {20859#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} is VALID [2022-04-07 17:22:01,120 INFO L290 TraceCheckUtils]: 44: Hoare triple {20859#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 28)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {20864#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 17:22:01,120 INFO L290 TraceCheckUtils]: 45: Hoare triple {20864#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {20864#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 17:22:01,120 INFO L272 TraceCheckUtils]: 46: Hoare triple {20864#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20837#true} is VALID [2022-04-07 17:22:01,120 INFO L290 TraceCheckUtils]: 47: Hoare triple {20837#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {20837#true} is VALID [2022-04-07 17:22:01,120 INFO L290 TraceCheckUtils]: 48: Hoare triple {20837#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-07 17:22:01,120 INFO L290 TraceCheckUtils]: 49: Hoare triple {20837#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-07 17:22:01,121 INFO L284 TraceCheckUtils]: 50: Hoare quadruple {20837#true} {20864#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20864#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 17:22:01,121 INFO L290 TraceCheckUtils]: 51: Hoare triple {20864#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {20864#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} is VALID [2022-04-07 17:22:01,122 INFO L290 TraceCheckUtils]: 52: Hoare triple {20864#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 24)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {20869#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 17:22:01,122 INFO L290 TraceCheckUtils]: 53: Hoare triple {20869#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {20869#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 17:22:01,122 INFO L272 TraceCheckUtils]: 54: Hoare triple {20869#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20837#true} is VALID [2022-04-07 17:22:01,122 INFO L290 TraceCheckUtils]: 55: Hoare triple {20837#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {20837#true} is VALID [2022-04-07 17:22:01,122 INFO L290 TraceCheckUtils]: 56: Hoare triple {20837#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-07 17:22:01,122 INFO L290 TraceCheckUtils]: 57: Hoare triple {20837#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-07 17:22:01,123 INFO L284 TraceCheckUtils]: 58: Hoare quadruple {20837#true} {20869#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20869#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 17:22:01,123 INFO L290 TraceCheckUtils]: 59: Hoare triple {20869#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {20869#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} is VALID [2022-04-07 17:22:01,124 INFO L290 TraceCheckUtils]: 60: Hoare triple {20869#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 20)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {20874#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:22:01,124 INFO L290 TraceCheckUtils]: 61: Hoare triple {20874#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {20874#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:22:01,124 INFO L272 TraceCheckUtils]: 62: Hoare triple {20874#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20837#true} is VALID [2022-04-07 17:22:01,124 INFO L290 TraceCheckUtils]: 63: Hoare triple {20837#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {20837#true} is VALID [2022-04-07 17:22:01,124 INFO L290 TraceCheckUtils]: 64: Hoare triple {20837#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-07 17:22:01,124 INFO L290 TraceCheckUtils]: 65: Hoare triple {20837#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-07 17:22:01,125 INFO L284 TraceCheckUtils]: 66: Hoare quadruple {20837#true} {20874#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20874#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:22:01,125 INFO L290 TraceCheckUtils]: 67: Hoare triple {20874#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {20874#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:22:01,126 INFO L290 TraceCheckUtils]: 68: Hoare triple {20874#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset 16 (* main_~i~1 4))) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {20879#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:22:01,126 INFO L290 TraceCheckUtils]: 69: Hoare triple {20879#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {20879#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:22:01,126 INFO L272 TraceCheckUtils]: 70: Hoare triple {20879#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20837#true} is VALID [2022-04-07 17:22:01,126 INFO L290 TraceCheckUtils]: 71: Hoare triple {20837#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {20837#true} is VALID [2022-04-07 17:22:01,126 INFO L290 TraceCheckUtils]: 72: Hoare triple {20837#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-07 17:22:01,126 INFO L290 TraceCheckUtils]: 73: Hoare triple {20837#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-07 17:22:01,127 INFO L284 TraceCheckUtils]: 74: Hoare quadruple {20837#true} {20879#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20879#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:22:01,127 INFO L290 TraceCheckUtils]: 75: Hoare triple {20879#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {20879#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} is VALID [2022-04-07 17:22:01,128 INFO L290 TraceCheckUtils]: 76: Hoare triple {20879#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 12)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {20884#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:22:01,128 INFO L290 TraceCheckUtils]: 77: Hoare triple {20884#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {20884#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:22:01,128 INFO L272 TraceCheckUtils]: 78: Hoare triple {20884#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20837#true} is VALID [2022-04-07 17:22:01,128 INFO L290 TraceCheckUtils]: 79: Hoare triple {20837#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {20837#true} is VALID [2022-04-07 17:22:01,128 INFO L290 TraceCheckUtils]: 80: Hoare triple {20837#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-07 17:22:01,128 INFO L290 TraceCheckUtils]: 81: Hoare triple {20837#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-07 17:22:01,129 INFO L284 TraceCheckUtils]: 82: Hoare quadruple {20837#true} {20884#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20884#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:22:01,129 INFO L290 TraceCheckUtils]: 83: Hoare triple {20884#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {20884#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} is VALID [2022-04-07 17:22:01,130 INFO L290 TraceCheckUtils]: 84: Hoare triple {20884#(= 0 (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 8)))} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {20889#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:22:01,130 INFO L290 TraceCheckUtils]: 85: Hoare triple {20889#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {20889#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:22:01,130 INFO L272 TraceCheckUtils]: 86: Hoare triple {20889#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20837#true} is VALID [2022-04-07 17:22:01,130 INFO L290 TraceCheckUtils]: 87: Hoare triple {20837#true} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {20837#true} is VALID [2022-04-07 17:22:01,130 INFO L290 TraceCheckUtils]: 88: Hoare triple {20837#true} [96] L19-->L19-2: Formula: (not (= v___VERIFIER_assert_~cond_1 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-07 17:22:01,130 INFO L290 TraceCheckUtils]: 89: Hoare triple {20837#true} [99] L19-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20837#true} is VALID [2022-04-07 17:22:01,131 INFO L284 TraceCheckUtils]: 90: Hoare quadruple {20837#true} {20889#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [102] __VERIFIER_assertEXIT-->L31-3: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20889#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:22:01,131 INFO L290 TraceCheckUtils]: 91: Hoare triple {20889#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [92] L31-3-->L31-4: Formula: true InVars {} OutVars{main_#t~mem5=|v_main_#t~mem5_3|} AuxVars[] AssignedVars[main_#t~mem5] {20889#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} is VALID [2022-04-07 17:22:01,132 INFO L290 TraceCheckUtils]: 92: Hoare triple {20889#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4) 4)) 0)} [94] L31-4-->L31-5: Formula: (= v_main_~i~1_4 (+ v_main_~i~1_5 1)) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[main_#t~post4, main_~i~1] {20894#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} is VALID [2022-04-07 17:22:01,132 INFO L290 TraceCheckUtils]: 93: Hoare triple {20894#(= (select (select |#memory_int| main_~x~0.base) (+ main_~x~0.offset (* main_~i~1 4))) 0)} [89] L31-5-->L31-2: Formula: (and (< v_main_~i~1_3 v_main_~n~0_2) (= (select (select |v_#memory_int_1| v_main_~x~0.base_1) (+ (* v_main_~i~1_3 4) v_main_~x~0.offset_1)) |v_main_#t~mem5_1|)) InVars {main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_~n~0=v_main_~n~0_2} OutVars{main_~x~0.offset=v_main_~x~0.offset_1, main_~x~0.base=v_main_~x~0.base_1, #memory_int=|v_#memory_int_1|, main_~i~1=v_main_~i~1_3, main_#t~mem5=|v_main_#t~mem5_1|, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[main_#t~mem5] {20895#(= |main_#t~mem5| 0)} is VALID [2022-04-07 17:22:01,133 INFO L272 TraceCheckUtils]: 94: Hoare triple {20895#(= |main_#t~mem5| 0)} [91] L31-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem5_4| 0) 1 0)) InVars {main_#t~mem5=|v_main_#t~mem5_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem5] {20896#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 17:22:01,133 INFO L290 TraceCheckUtils]: 95: Hoare triple {20896#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L19: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {20897#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 17:22:01,133 INFO L290 TraceCheckUtils]: 96: Hoare triple {20897#(not (= __VERIFIER_assert_~cond 0))} [95] L19-->L20: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {20838#false} is VALID [2022-04-07 17:22:01,133 INFO L290 TraceCheckUtils]: 97: Hoare triple {20838#false} [97] L20-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20838#false} is VALID [2022-04-07 17:22:01,134 INFO L134 CoverageAnalysis]: Checked inductivity of 356 backedges. 16 proven. 228 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2022-04-07 17:22:01,134 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:22:01,134 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1389179239] [2022-04-07 17:22:01,134 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1389179239] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 17:22:01,134 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1184174836] [2022-04-07 17:22:01,135 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-07 17:22:01,135 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:22:01,135 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:22:01,139 INFO L229 MonitoredProcess]: Starting monitored process 26 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:22:01,143 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (26)] Waiting until timeout for monitored process [2022-04-07 17:22:01,314 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 11 check-sat command(s) [2022-04-07 17:22:01,315 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 17:22:01,316 INFO L263 TraceCheckSpWp]: Trace formula consists of 264 conjuncts, 48 conjunts are in the unsatisfiable core [2022-04-07 17:22:01,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:22:01,339 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:22:01,493 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-04-07 17:22:01,712 INFO L356 Elim1Store]: treesize reduction 37, result has 22.9 percent of original size [2022-04-07 17:22:01,713 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 27 treesize of output 26