/usr/bin/java -ea -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --core.log.level.for.class de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN -tc ../../../trunk/examples/toolchains/AutomizerCTransformed.xml -s ../../../trunk/examples/settings/automizer/LoopAccelerationJordanC.epf -i ../../../trunk/examples/svcomp/locks/test_locks_11.c -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-34549b5 [2022-04-07 21:19:21,501 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-04-07 21:19:21,502 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-04-07 21:19:21,527 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... 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[2022-04-07 21:19:21,535 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-04-07 21:19:21,538 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-04-07 21:19:21,539 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-04-07 21:19:21,541 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-04-07 21:19:21,541 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-04-07 21:19:21,543 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-04-07 21:19:21,545 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-04-07 21:19:21,546 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-04-07 21:19:21,547 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-04-07 21:19:21,548 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-04-07 21:19:21,549 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-04-07 21:19:21,549 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-04-07 21:19:21,550 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-04-07 21:19:21,551 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2022-04-07 21:19:21,555 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-04-07 21:19:21,555 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-04-07 21:19:21,560 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-04-07 21:19:21,560 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/automizer/LoopAccelerationJordanC.epf [2022-04-07 21:19:21,568 INFO L113 SettingsManager]: Loading preferences was successful [2022-04-07 21:19:21,568 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-04-07 21:19:21,569 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-04-07 21:19:21,569 INFO L138 SettingsManager]: * sizeof long=4 [2022-04-07 21:19:21,569 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-04-07 21:19:21,569 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-04-07 21:19:21,570 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-04-07 21:19:21,570 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-04-07 21:19:21,570 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-04-07 21:19:21,570 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-04-07 21:19:21,570 INFO L138 SettingsManager]: * sizeof long double=12 [2022-04-07 21:19:21,570 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-04-07 21:19:21,571 INFO L138 SettingsManager]: * Use constant arrays=true [2022-04-07 21:19:21,571 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-04-07 21:19:21,571 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-04-07 21:19:21,571 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-04-07 21:19:21,571 INFO L138 SettingsManager]: * To the following directory=./dump/ [2022-04-07 21:19:21,571 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-04-07 21:19:21,571 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-07 21:19:21,571 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-04-07 21:19:21,571 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-04-07 21:19:21,572 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-04-07 21:19:21,572 INFO L138 SettingsManager]: * TransformationType=LOOP_ACCELERATION_JORDAN WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.core: Log level for class -> de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN; [2022-04-07 21:19:21,765 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-04-07 21:19:21,784 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-04-07 21:19:21,788 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-04-07 21:19:21,788 INFO L271 PluginConnector]: Initializing CDTParser... [2022-04-07 21:19:21,789 INFO L275 PluginConnector]: CDTParser initialized [2022-04-07 21:19:21,790 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/locks/test_locks_11.c [2022-04-07 21:19:21,844 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/dbbc700d8/d1245685ae644a5ebcc399931d5ee7e8/FLAGa30c785ed [2022-04-07 21:19:22,194 INFO L306 CDTParser]: Found 1 translation units. [2022-04-07 21:19:22,195 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/locks/test_locks_11.c [2022-04-07 21:19:22,200 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/dbbc700d8/d1245685ae644a5ebcc399931d5ee7e8/FLAGa30c785ed [2022-04-07 21:19:22,628 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/dbbc700d8/d1245685ae644a5ebcc399931d5ee7e8 [2022-04-07 21:19:22,630 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-04-07 21:19:22,630 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2022-04-07 21:19:22,633 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-04-07 21:19:22,633 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-04-07 21:19:22,635 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-04-07 21:19:22,636 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.04 09:19:22" (1/1) ... [2022-04-07 21:19:22,637 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@600cf6bd and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 09:19:22, skipping insertion in model container [2022-04-07 21:19:22,637 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.04 09:19:22" (1/1) ... [2022-04-07 21:19:22,642 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-04-07 21:19:22,660 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-04-07 21:19:22,779 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/locks/test_locks_11.c[4246,4259] [2022-04-07 21:19:22,781 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-07 21:19:22,787 INFO L203 MainTranslator]: Completed pre-run [2022-04-07 21:19:22,803 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/locks/test_locks_11.c[4246,4259] [2022-04-07 21:19:22,804 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-07 21:19:22,812 INFO L208 MainTranslator]: Completed translation [2022-04-07 21:19:22,812 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 09:19:22 WrapperNode [2022-04-07 21:19:22,812 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-04-07 21:19:22,813 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-04-07 21:19:22,813 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-04-07 21:19:22,813 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-04-07 21:19:22,819 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 09:19:22" (1/1) ... [2022-04-07 21:19:22,819 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 09:19:22" (1/1) ... [2022-04-07 21:19:22,824 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 09:19:22" (1/1) ... [2022-04-07 21:19:22,824 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 09:19:22" (1/1) ... [2022-04-07 21:19:22,829 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 09:19:22" (1/1) ... [2022-04-07 21:19:22,834 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 09:19:22" (1/1) ... [2022-04-07 21:19:22,835 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 09:19:22" (1/1) ... [2022-04-07 21:19:22,836 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-04-07 21:19:22,837 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-04-07 21:19:22,837 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-04-07 21:19:22,837 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-04-07 21:19:22,841 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 09:19:22" (1/1) ... [2022-04-07 21:19:22,846 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-07 21:19:22,856 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 21:19:22,865 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-04-07 21:19:22,866 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-04-07 21:19:22,905 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2022-04-07 21:19:22,906 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-04-07 21:19:22,906 INFO L138 BoogieDeclarations]: Found implementation of procedure reach_error [2022-04-07 21:19:22,906 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2022-04-07 21:19:22,906 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2022-04-07 21:19:22,906 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_fail [2022-04-07 21:19:22,906 INFO L130 BoogieDeclarations]: Found specification of procedure reach_error [2022-04-07 21:19:22,907 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-04-07 21:19:22,907 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2022-04-07 21:19:22,907 INFO L130 BoogieDeclarations]: Found specification of procedure main [2022-04-07 21:19:22,908 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2022-04-07 21:19:22,908 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-04-07 21:19:22,908 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-04-07 21:19:22,908 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-04-07 21:19:22,909 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-04-07 21:19:22,910 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-04-07 21:19:22,955 INFO L234 CfgBuilder]: Building ICFG [2022-04-07 21:19:22,956 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-04-07 21:19:23,120 INFO L275 CfgBuilder]: Performing block encoding [2022-04-07 21:19:23,125 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-04-07 21:19:23,125 INFO L299 CfgBuilder]: Removed 1 assume(true) statements. [2022-04-07 21:19:23,126 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.04 09:19:23 BoogieIcfgContainer [2022-04-07 21:19:23,126 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-04-07 21:19:23,127 INFO L113 PluginConnector]: ------------------------IcfgTransformer---------------------------- [2022-04-07 21:19:23,127 INFO L271 PluginConnector]: Initializing IcfgTransformer... [2022-04-07 21:19:23,127 INFO L275 PluginConnector]: IcfgTransformer initialized [2022-04-07 21:19:23,129 INFO L185 PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.04 09:19:23" (1/1) ... [2022-04-07 21:19:23,131 INFO L168 ansformationObserver]: Applying ICFG transformation LOOP_ACCELERATION_JORDAN [2022-04-07 21:19:23,159 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 07.04 09:19:23 BasicIcfg [2022-04-07 21:19:23,159 INFO L132 PluginConnector]: ------------------------ END IcfgTransformer---------------------------- [2022-04-07 21:19:23,160 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-04-07 21:19:23,160 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-04-07 21:19:23,162 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-04-07 21:19:23,162 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.04 09:19:22" (1/4) ... [2022-04-07 21:19:23,163 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7b8adc83 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.04 09:19:23, skipping insertion in model container [2022-04-07 21:19:23,163 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 09:19:22" (2/4) ... [2022-04-07 21:19:23,163 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7b8adc83 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.04 09:19:23, skipping insertion in model container [2022-04-07 21:19:23,163 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.04 09:19:23" (3/4) ... [2022-04-07 21:19:23,163 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7b8adc83 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.04 09:19:23, skipping insertion in model container [2022-04-07 21:19:23,163 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 07.04 09:19:23" (4/4) ... [2022-04-07 21:19:23,164 INFO L111 eAbstractionObserver]: Analyzing ICFG test_locks_11.cJordan [2022-04-07 21:19:23,167 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:ForwardPredicates Determinization: PREDICATE_ABSTRACTION [2022-04-07 21:19:23,167 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-04-07 21:19:23,192 INFO L339 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-04-07 21:19:23,197 INFO L340 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=ForwardPredicates, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=false, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=All, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP [2022-04-07 21:19:23,197 INFO L341 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-04-07 21:19:23,217 INFO L276 IsEmpty]: Start isEmpty. Operand has 48 states, 42 states have (on average 1.880952380952381) internal successors, (79), 43 states have internal predecessors, (79), 2 states have call successors, (2), 2 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 21:19:23,222 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2022-04-07 21:19:23,222 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 21:19:23,222 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 21:19:23,223 INFO L403 AbstractCegarLoop]: === Iteration 1 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 21:19:23,226 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 21:19:23,226 INFO L85 PathProgramCache]: Analyzing trace with hash -1766201146, now seen corresponding path program 1 times [2022-04-07 21:19:23,232 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 21:19:23,232 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1821707673] [2022-04-07 21:19:23,232 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 21:19:23,233 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 21:19:23,342 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:19:23,431 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 21:19:23,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:19:23,443 INFO L290 TraceCheckUtils]: 0: Hoare triple {57#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [222] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {51#true} is VALID [2022-04-07 21:19:23,443 INFO L290 TraceCheckUtils]: 1: Hoare triple {51#true} [225] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {51#true} is VALID [2022-04-07 21:19:23,443 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {51#true} {51#true} [301] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {51#true} is VALID [2022-04-07 21:19:23,444 INFO L272 TraceCheckUtils]: 0: Hoare triple {51#true} [220] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {57#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 21:19:23,445 INFO L290 TraceCheckUtils]: 1: Hoare triple {57#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [222] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {51#true} is VALID [2022-04-07 21:19:23,445 INFO L290 TraceCheckUtils]: 2: Hoare triple {51#true} [225] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {51#true} is VALID [2022-04-07 21:19:23,445 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {51#true} {51#true} [301] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {51#true} is VALID [2022-04-07 21:19:23,445 INFO L272 TraceCheckUtils]: 4: Hoare triple {51#true} [221] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {51#true} is VALID [2022-04-07 21:19:23,446 INFO L290 TraceCheckUtils]: 5: Hoare triple {51#true} [224] mainENTRY-->L169-1: Formula: (and (= v_main_~p5~0_2 |v_main_#t~nondet8_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (= v_main_~p4~0_2 |v_main_#t~nondet7_2|)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~lk3~0=v_main_~lk3~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p2~0=v_main_~p2~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_2, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p5~0=v_main_~p5~0_2, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~lk4~0=v_main_~lk4~0_3, main_~p3~0=v_main_~p3~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet14, main_#t~nondet13, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {51#true} is VALID [2022-04-07 21:19:23,446 INFO L290 TraceCheckUtils]: 6: Hoare triple {51#true} [228] L169-1-->L46: Formula: (and (= |v_main_#t~nondet15_2| v_main_~cond~0_2) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet15=|v_main_#t~nondet15_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet15, main_~cond~0] {51#true} is VALID [2022-04-07 21:19:23,446 INFO L290 TraceCheckUtils]: 7: Hoare triple {51#true} [231] L46-->L73: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_3 0) (= v_main_~lk5~0_5 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0) (= v_main_~lk4~0_4 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk1~0=v_main_~lk1~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_5, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk4~0=v_main_~lk4~0_4, main_~lk6~0=v_main_~lk6~0_3, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk2~0, main_~lk3~0, main_~lk11~0, main_~lk1~0, main_~lk10~0, main_~lk5~0, main_~lk4~0, main_~lk6~0, main_~lk9~0, main_~lk8~0, main_~lk7~0] {51#true} is VALID [2022-04-07 21:19:23,447 INFO L290 TraceCheckUtils]: 8: Hoare triple {51#true} [233] L73-->L73-2: Formula: (and (= v_main_~lk1~0_3 1) (not (= v_main_~p1~0_2 0))) InVars {main_~p1~0=v_main_~p1~0_2} OutVars{main_~p1~0=v_main_~p1~0_2, main_~lk1~0=v_main_~lk1~0_3} AuxVars[] AssignedVars[main_~lk1~0] {56#(= main_~lk1~0 1)} is VALID [2022-04-07 21:19:23,447 INFO L290 TraceCheckUtils]: 9: Hoare triple {56#(= main_~lk1~0 1)} [235] L73-2-->L77-1: Formula: (and (= v_main_~lk2~0_3 1) (not (= v_main_~p2~0_2 0))) InVars {main_~p2~0=v_main_~p2~0_2} OutVars{main_~lk2~0=v_main_~lk2~0_3, main_~p2~0=v_main_~p2~0_2} AuxVars[] AssignedVars[main_~lk2~0] {56#(= main_~lk1~0 1)} is VALID [2022-04-07 21:19:23,448 INFO L290 TraceCheckUtils]: 10: Hoare triple {56#(= main_~lk1~0 1)} [237] L77-1-->L81-1: Formula: (and (not (= v_main_~p3~0_2 0)) (= v_main_~lk3~0_3 1)) InVars {main_~p3~0=v_main_~p3~0_2} OutVars{main_~p3~0=v_main_~p3~0_2, main_~lk3~0=v_main_~lk3~0_3} AuxVars[] AssignedVars[main_~lk3~0] {56#(= main_~lk1~0 1)} is VALID [2022-04-07 21:19:23,448 INFO L290 TraceCheckUtils]: 11: Hoare triple {56#(= main_~lk1~0 1)} [240] L81-1-->L85-1: Formula: (= v_main_~p4~0_4 0) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4} AuxVars[] AssignedVars[] {56#(= main_~lk1~0 1)} is VALID [2022-04-07 21:19:23,449 INFO L290 TraceCheckUtils]: 12: Hoare triple {56#(= main_~lk1~0 1)} [241] L85-1-->L89-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {56#(= main_~lk1~0 1)} is VALID [2022-04-07 21:19:23,449 INFO L290 TraceCheckUtils]: 13: Hoare triple {56#(= main_~lk1~0 1)} [243] L89-1-->L93-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {56#(= main_~lk1~0 1)} is VALID [2022-04-07 21:19:23,450 INFO L290 TraceCheckUtils]: 14: Hoare triple {56#(= main_~lk1~0 1)} [245] L93-1-->L97-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {56#(= main_~lk1~0 1)} is VALID [2022-04-07 21:19:23,450 INFO L290 TraceCheckUtils]: 15: Hoare triple {56#(= main_~lk1~0 1)} [247] L97-1-->L101-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {56#(= main_~lk1~0 1)} is VALID [2022-04-07 21:19:23,450 INFO L290 TraceCheckUtils]: 16: Hoare triple {56#(= main_~lk1~0 1)} [249] L101-1-->L105-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {56#(= main_~lk1~0 1)} is VALID [2022-04-07 21:19:23,451 INFO L290 TraceCheckUtils]: 17: Hoare triple {56#(= main_~lk1~0 1)} [251] L105-1-->L109-1: Formula: (and (= v_main_~lk10~0_6 1) (not (= v_main_~p10~0_4 0))) InVars {main_~p10~0=v_main_~p10~0_4} OutVars{main_~lk10~0=v_main_~lk10~0_6, main_~p10~0=v_main_~p10~0_4} AuxVars[] AssignedVars[main_~lk10~0] {56#(= main_~lk1~0 1)} is VALID [2022-04-07 21:19:23,451 INFO L290 TraceCheckUtils]: 18: Hoare triple {56#(= main_~lk1~0 1)} [253] L109-1-->L113-1: Formula: (and (= v_main_~lk11~0_6 1) (not (= v_main_~p11~0_4 0))) InVars {main_~p11~0=v_main_~p11~0_4} OutVars{main_~lk11~0=v_main_~lk11~0_6, main_~p11~0=v_main_~p11~0_4} AuxVars[] AssignedVars[main_~lk11~0] {56#(= main_~lk1~0 1)} is VALID [2022-04-07 21:19:23,452 INFO L290 TraceCheckUtils]: 19: Hoare triple {56#(= main_~lk1~0 1)} [255] L113-1-->L120: Formula: (not (= v_main_~p1~0_4 0)) InVars {main_~p1~0=v_main_~p1~0_4} OutVars{main_~p1~0=v_main_~p1~0_4} AuxVars[] AssignedVars[] {56#(= main_~lk1~0 1)} is VALID [2022-04-07 21:19:23,452 INFO L290 TraceCheckUtils]: 20: Hoare triple {56#(= main_~lk1~0 1)} [257] L120-->L170-1: Formula: (not (= v_main_~lk1~0_4 1)) InVars {main_~lk1~0=v_main_~lk1~0_4} OutVars{main_~lk1~0=v_main_~lk1~0_4} AuxVars[] AssignedVars[] {52#false} is VALID [2022-04-07 21:19:23,452 INFO L290 TraceCheckUtils]: 21: Hoare triple {52#false} [261] L170-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {52#false} is VALID [2022-04-07 21:19:23,453 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 21:19:23,453 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 21:19:23,453 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1821707673] [2022-04-07 21:19:23,454 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1821707673] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 21:19:23,454 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 21:19:23,454 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-07 21:19:23,455 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [673101781] [2022-04-07 21:19:23,455 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 21:19:23,459 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 4.75) internal successors, (19), 3 states have internal predecessors, (19), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 22 [2022-04-07 21:19:23,460 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 21:19:23,462 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 4.75) internal successors, (19), 3 states have internal predecessors, (19), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:23,481 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 22 edges. 22 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:19:23,482 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-07 21:19:23,482 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 21:19:23,507 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-07 21:19:23,508 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-07 21:19:23,511 INFO L87 Difference]: Start difference. First operand has 48 states, 42 states have (on average 1.880952380952381) internal successors, (79), 43 states have internal predecessors, (79), 2 states have call successors, (2), 2 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand has 4 states, 4 states have (on average 4.75) internal successors, (19), 3 states have internal predecessors, (19), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:23,811 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:19:23,811 INFO L93 Difference]: Finished difference Result 87 states and 150 transitions. [2022-04-07 21:19:23,811 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-07 21:19:23,811 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 4.75) internal successors, (19), 3 states have internal predecessors, (19), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 22 [2022-04-07 21:19:23,812 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 21:19:23,813 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 4.75) internal successors, (19), 3 states have internal predecessors, (19), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:23,820 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 157 transitions. [2022-04-07 21:19:23,820 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 4.75) internal successors, (19), 3 states have internal predecessors, (19), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:23,823 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 157 transitions. [2022-04-07 21:19:23,823 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 157 transitions. [2022-04-07 21:19:23,939 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 157 edges. 157 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:19:23,946 INFO L225 Difference]: With dead ends: 87 [2022-04-07 21:19:23,946 INFO L226 Difference]: Without dead ends: 79 [2022-04-07 21:19:23,948 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-07 21:19:23,950 INFO L913 BasicCegarLoop]: 86 mSDtfsCounter, 191 mSDsluCounter, 9 mSDsCounter, 0 mSdLazyCounter, 79 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 191 SdHoareTripleChecker+Valid, 95 SdHoareTripleChecker+Invalid, 81 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 79 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 21:19:23,951 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [191 Valid, 95 Invalid, 81 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 79 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-07 21:19:23,963 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 79 states. [2022-04-07 21:19:23,972 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 79 to 55. [2022-04-07 21:19:23,972 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 21:19:23,973 INFO L82 GeneralOperation]: Start isEquivalent. First operand 79 states. Second operand has 55 states, 51 states have (on average 1.8627450980392157) internal successors, (95), 51 states have internal predecessors, (95), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:23,974 INFO L74 IsIncluded]: Start isIncluded. First operand 79 states. Second operand has 55 states, 51 states have (on average 1.8627450980392157) internal successors, (95), 51 states have internal predecessors, (95), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:23,974 INFO L87 Difference]: Start difference. First operand 79 states. Second operand has 55 states, 51 states have (on average 1.8627450980392157) internal successors, (95), 51 states have internal predecessors, (95), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:23,979 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:19:23,979 INFO L93 Difference]: Finished difference Result 79 states and 141 transitions. [2022-04-07 21:19:23,979 INFO L276 IsEmpty]: Start isEmpty. Operand 79 states and 141 transitions. [2022-04-07 21:19:23,980 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:19:23,980 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:19:23,981 INFO L74 IsIncluded]: Start isIncluded. First operand has 55 states, 51 states have (on average 1.8627450980392157) internal successors, (95), 51 states have internal predecessors, (95), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 79 states. [2022-04-07 21:19:23,983 INFO L87 Difference]: Start difference. First operand has 55 states, 51 states have (on average 1.8627450980392157) internal successors, (95), 51 states have internal predecessors, (95), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 79 states. [2022-04-07 21:19:23,987 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:19:23,987 INFO L93 Difference]: Finished difference Result 79 states and 141 transitions. [2022-04-07 21:19:23,987 INFO L276 IsEmpty]: Start isEmpty. Operand 79 states and 141 transitions. [2022-04-07 21:19:23,988 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:19:23,988 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:19:23,988 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 21:19:23,988 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 21:19:23,989 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 55 states, 51 states have (on average 1.8627450980392157) internal successors, (95), 51 states have internal predecessors, (95), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:23,990 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55 states to 55 states and 98 transitions. [2022-04-07 21:19:23,991 INFO L78 Accepts]: Start accepts. Automaton has 55 states and 98 transitions. Word has length 22 [2022-04-07 21:19:23,992 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 21:19:23,992 INFO L478 AbstractCegarLoop]: Abstraction has 55 states and 98 transitions. [2022-04-07 21:19:23,992 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 4.75) internal successors, (19), 3 states have internal predecessors, (19), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:23,992 INFO L276 IsEmpty]: Start isEmpty. Operand 55 states and 98 transitions. [2022-04-07 21:19:23,992 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2022-04-07 21:19:23,993 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 21:19:23,993 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 21:19:23,993 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-04-07 21:19:23,993 INFO L403 AbstractCegarLoop]: === Iteration 2 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 21:19:23,994 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 21:19:23,994 INFO L85 PathProgramCache]: Analyzing trace with hash 2023207525, now seen corresponding path program 1 times [2022-04-07 21:19:23,994 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 21:19:23,994 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2086725187] [2022-04-07 21:19:23,994 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 21:19:23,994 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 21:19:24,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:19:24,074 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 21:19:24,082 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:19:24,092 INFO L290 TraceCheckUtils]: 0: Hoare triple {369#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [222] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {363#true} is VALID [2022-04-07 21:19:24,093 INFO L290 TraceCheckUtils]: 1: Hoare triple {363#true} [225] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {363#true} is VALID [2022-04-07 21:19:24,093 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {363#true} {363#true} [301] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {363#true} is VALID [2022-04-07 21:19:24,093 INFO L272 TraceCheckUtils]: 0: Hoare triple {363#true} [220] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {369#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 21:19:24,094 INFO L290 TraceCheckUtils]: 1: Hoare triple {369#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [222] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {363#true} is VALID [2022-04-07 21:19:24,094 INFO L290 TraceCheckUtils]: 2: Hoare triple {363#true} [225] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {363#true} is VALID [2022-04-07 21:19:24,094 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {363#true} {363#true} [301] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {363#true} is VALID [2022-04-07 21:19:24,094 INFO L272 TraceCheckUtils]: 4: Hoare triple {363#true} [221] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {363#true} is VALID [2022-04-07 21:19:24,095 INFO L290 TraceCheckUtils]: 5: Hoare triple {363#true} [224] mainENTRY-->L169-1: Formula: (and (= v_main_~p5~0_2 |v_main_#t~nondet8_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (= v_main_~p4~0_2 |v_main_#t~nondet7_2|)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~lk3~0=v_main_~lk3~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p2~0=v_main_~p2~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_2, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p5~0=v_main_~p5~0_2, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~lk4~0=v_main_~lk4~0_3, main_~p3~0=v_main_~p3~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet14, main_#t~nondet13, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {363#true} is VALID [2022-04-07 21:19:24,095 INFO L290 TraceCheckUtils]: 6: Hoare triple {363#true} [228] L169-1-->L46: Formula: (and (= |v_main_#t~nondet15_2| v_main_~cond~0_2) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet15=|v_main_#t~nondet15_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet15, main_~cond~0] {363#true} is VALID [2022-04-07 21:19:24,096 INFO L290 TraceCheckUtils]: 7: Hoare triple {363#true} [231] L46-->L73: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_3 0) (= v_main_~lk5~0_5 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0) (= v_main_~lk4~0_4 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk1~0=v_main_~lk1~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_5, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk4~0=v_main_~lk4~0_4, main_~lk6~0=v_main_~lk6~0_3, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk2~0, main_~lk3~0, main_~lk11~0, main_~lk1~0, main_~lk10~0, main_~lk5~0, main_~lk4~0, main_~lk6~0, main_~lk9~0, main_~lk8~0, main_~lk7~0] {363#true} is VALID [2022-04-07 21:19:24,096 INFO L290 TraceCheckUtils]: 8: Hoare triple {363#true} [234] L73-->L73-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {368#(= main_~p1~0 0)} is VALID [2022-04-07 21:19:24,097 INFO L290 TraceCheckUtils]: 9: Hoare triple {368#(= main_~p1~0 0)} [235] L73-2-->L77-1: Formula: (and (= v_main_~lk2~0_3 1) (not (= v_main_~p2~0_2 0))) InVars {main_~p2~0=v_main_~p2~0_2} OutVars{main_~lk2~0=v_main_~lk2~0_3, main_~p2~0=v_main_~p2~0_2} AuxVars[] AssignedVars[main_~lk2~0] {368#(= main_~p1~0 0)} is VALID [2022-04-07 21:19:24,098 INFO L290 TraceCheckUtils]: 10: Hoare triple {368#(= main_~p1~0 0)} [237] L77-1-->L81-1: Formula: (and (not (= v_main_~p3~0_2 0)) (= v_main_~lk3~0_3 1)) InVars {main_~p3~0=v_main_~p3~0_2} OutVars{main_~p3~0=v_main_~p3~0_2, main_~lk3~0=v_main_~lk3~0_3} AuxVars[] AssignedVars[main_~lk3~0] {368#(= main_~p1~0 0)} is VALID [2022-04-07 21:19:24,099 INFO L290 TraceCheckUtils]: 11: Hoare triple {368#(= main_~p1~0 0)} [240] L81-1-->L85-1: Formula: (= v_main_~p4~0_4 0) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4} AuxVars[] AssignedVars[] {368#(= main_~p1~0 0)} is VALID [2022-04-07 21:19:24,099 INFO L290 TraceCheckUtils]: 12: Hoare triple {368#(= main_~p1~0 0)} [241] L85-1-->L89-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {368#(= main_~p1~0 0)} is VALID [2022-04-07 21:19:24,100 INFO L290 TraceCheckUtils]: 13: Hoare triple {368#(= main_~p1~0 0)} [243] L89-1-->L93-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {368#(= main_~p1~0 0)} is VALID [2022-04-07 21:19:24,100 INFO L290 TraceCheckUtils]: 14: Hoare triple {368#(= main_~p1~0 0)} [245] L93-1-->L97-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {368#(= main_~p1~0 0)} is VALID [2022-04-07 21:19:24,101 INFO L290 TraceCheckUtils]: 15: Hoare triple {368#(= main_~p1~0 0)} [247] L97-1-->L101-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {368#(= main_~p1~0 0)} is VALID [2022-04-07 21:19:24,101 INFO L290 TraceCheckUtils]: 16: Hoare triple {368#(= main_~p1~0 0)} [249] L101-1-->L105-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {368#(= main_~p1~0 0)} is VALID [2022-04-07 21:19:24,102 INFO L290 TraceCheckUtils]: 17: Hoare triple {368#(= main_~p1~0 0)} [251] L105-1-->L109-1: Formula: (and (= v_main_~lk10~0_6 1) (not (= v_main_~p10~0_4 0))) InVars {main_~p10~0=v_main_~p10~0_4} OutVars{main_~lk10~0=v_main_~lk10~0_6, main_~p10~0=v_main_~p10~0_4} AuxVars[] AssignedVars[main_~lk10~0] {368#(= main_~p1~0 0)} is VALID [2022-04-07 21:19:24,102 INFO L290 TraceCheckUtils]: 18: Hoare triple {368#(= main_~p1~0 0)} [253] L109-1-->L113-1: Formula: (and (= v_main_~lk11~0_6 1) (not (= v_main_~p11~0_4 0))) InVars {main_~p11~0=v_main_~p11~0_4} OutVars{main_~lk11~0=v_main_~lk11~0_6, main_~p11~0=v_main_~p11~0_4} AuxVars[] AssignedVars[main_~lk11~0] {368#(= main_~p1~0 0)} is VALID [2022-04-07 21:19:24,102 INFO L290 TraceCheckUtils]: 19: Hoare triple {368#(= main_~p1~0 0)} [255] L113-1-->L120: Formula: (not (= v_main_~p1~0_4 0)) InVars {main_~p1~0=v_main_~p1~0_4} OutVars{main_~p1~0=v_main_~p1~0_4} AuxVars[] AssignedVars[] {364#false} is VALID [2022-04-07 21:19:24,102 INFO L290 TraceCheckUtils]: 20: Hoare triple {364#false} [257] L120-->L170-1: Formula: (not (= v_main_~lk1~0_4 1)) InVars {main_~lk1~0=v_main_~lk1~0_4} OutVars{main_~lk1~0=v_main_~lk1~0_4} AuxVars[] AssignedVars[] {364#false} is VALID [2022-04-07 21:19:24,103 INFO L290 TraceCheckUtils]: 21: Hoare triple {364#false} [261] L170-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {364#false} is VALID [2022-04-07 21:19:24,104 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 21:19:24,104 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 21:19:24,105 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2086725187] [2022-04-07 21:19:24,106 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2086725187] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 21:19:24,106 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 21:19:24,106 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-07 21:19:24,106 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1638268726] [2022-04-07 21:19:24,106 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 21:19:24,107 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 4.75) internal successors, (19), 3 states have internal predecessors, (19), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 22 [2022-04-07 21:19:24,107 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 21:19:24,107 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 4.75) internal successors, (19), 3 states have internal predecessors, (19), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:24,130 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 22 edges. 22 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:19:24,131 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-07 21:19:24,131 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 21:19:24,131 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-07 21:19:24,132 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-07 21:19:24,132 INFO L87 Difference]: Start difference. First operand 55 states and 98 transitions. Second operand has 4 states, 4 states have (on average 4.75) internal successors, (19), 3 states have internal predecessors, (19), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:24,307 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:19:24,307 INFO L93 Difference]: Finished difference Result 79 states and 139 transitions. [2022-04-07 21:19:24,307 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-07 21:19:24,307 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 4.75) internal successors, (19), 3 states have internal predecessors, (19), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 22 [2022-04-07 21:19:24,307 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 21:19:24,308 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 4.75) internal successors, (19), 3 states have internal predecessors, (19), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:24,311 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 141 transitions. [2022-04-07 21:19:24,312 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 4.75) internal successors, (19), 3 states have internal predecessors, (19), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:24,314 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 141 transitions. [2022-04-07 21:19:24,314 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 141 transitions. [2022-04-07 21:19:24,404 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 141 edges. 141 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:19:24,406 INFO L225 Difference]: With dead ends: 79 [2022-04-07 21:19:24,406 INFO L226 Difference]: Without dead ends: 79 [2022-04-07 21:19:24,406 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-07 21:19:24,407 INFO L913 BasicCegarLoop]: 96 mSDtfsCounter, 163 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 70 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 163 SdHoareTripleChecker+Valid, 103 SdHoareTripleChecker+Invalid, 73 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 70 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 21:19:24,408 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [163 Valid, 103 Invalid, 73 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 70 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 21:19:24,408 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 79 states. [2022-04-07 21:19:24,411 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 79 to 77. [2022-04-07 21:19:24,411 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 21:19:24,412 INFO L82 GeneralOperation]: Start isEquivalent. First operand 79 states. Second operand has 77 states, 73 states have (on average 1.8493150684931507) internal successors, (135), 73 states have internal predecessors, (135), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:24,412 INFO L74 IsIncluded]: Start isIncluded. First operand 79 states. Second operand has 77 states, 73 states have (on average 1.8493150684931507) internal successors, (135), 73 states have internal predecessors, (135), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:24,412 INFO L87 Difference]: Start difference. First operand 79 states. Second operand has 77 states, 73 states have (on average 1.8493150684931507) internal successors, (135), 73 states have internal predecessors, (135), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:24,415 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:19:24,415 INFO L93 Difference]: Finished difference Result 79 states and 139 transitions. [2022-04-07 21:19:24,415 INFO L276 IsEmpty]: Start isEmpty. Operand 79 states and 139 transitions. [2022-04-07 21:19:24,415 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:19:24,415 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:19:24,416 INFO L74 IsIncluded]: Start isIncluded. First operand has 77 states, 73 states have (on average 1.8493150684931507) internal successors, (135), 73 states have internal predecessors, (135), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 79 states. [2022-04-07 21:19:24,416 INFO L87 Difference]: Start difference. First operand has 77 states, 73 states have (on average 1.8493150684931507) internal successors, (135), 73 states have internal predecessors, (135), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 79 states. [2022-04-07 21:19:24,418 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:19:24,418 INFO L93 Difference]: Finished difference Result 79 states and 139 transitions. [2022-04-07 21:19:24,418 INFO L276 IsEmpty]: Start isEmpty. Operand 79 states and 139 transitions. [2022-04-07 21:19:24,419 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:19:24,419 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:19:24,419 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 21:19:24,419 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 21:19:24,419 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 77 states, 73 states have (on average 1.8493150684931507) internal successors, (135), 73 states have internal predecessors, (135), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:24,421 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77 states to 77 states and 138 transitions. [2022-04-07 21:19:24,421 INFO L78 Accepts]: Start accepts. Automaton has 77 states and 138 transitions. Word has length 22 [2022-04-07 21:19:24,421 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 21:19:24,421 INFO L478 AbstractCegarLoop]: Abstraction has 77 states and 138 transitions. [2022-04-07 21:19:24,422 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 4.75) internal successors, (19), 3 states have internal predecessors, (19), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:24,422 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 138 transitions. [2022-04-07 21:19:24,422 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2022-04-07 21:19:24,422 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 21:19:24,422 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 21:19:24,422 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-04-07 21:19:24,423 INFO L403 AbstractCegarLoop]: === Iteration 3 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 21:19:24,423 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 21:19:24,423 INFO L85 PathProgramCache]: Analyzing trace with hash 1082371358, now seen corresponding path program 1 times [2022-04-07 21:19:24,423 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 21:19:24,423 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [855698545] [2022-04-07 21:19:24,423 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 21:19:24,423 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 21:19:24,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:19:24,461 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 21:19:24,463 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:19:24,468 INFO L290 TraceCheckUtils]: 0: Hoare triple {695#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [222] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {689#true} is VALID [2022-04-07 21:19:24,468 INFO L290 TraceCheckUtils]: 1: Hoare triple {689#true} [225] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {689#true} is VALID [2022-04-07 21:19:24,468 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {689#true} {689#true} [301] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {689#true} is VALID [2022-04-07 21:19:24,470 INFO L272 TraceCheckUtils]: 0: Hoare triple {689#true} [220] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {695#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 21:19:24,471 INFO L290 TraceCheckUtils]: 1: Hoare triple {695#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [222] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {689#true} is VALID [2022-04-07 21:19:24,471 INFO L290 TraceCheckUtils]: 2: Hoare triple {689#true} [225] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {689#true} is VALID [2022-04-07 21:19:24,471 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {689#true} {689#true} [301] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {689#true} is VALID [2022-04-07 21:19:24,471 INFO L272 TraceCheckUtils]: 4: Hoare triple {689#true} [221] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {689#true} is VALID [2022-04-07 21:19:24,471 INFO L290 TraceCheckUtils]: 5: Hoare triple {689#true} [224] mainENTRY-->L169-1: Formula: (and (= v_main_~p5~0_2 |v_main_#t~nondet8_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (= v_main_~p4~0_2 |v_main_#t~nondet7_2|)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~lk3~0=v_main_~lk3~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p2~0=v_main_~p2~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_2, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p5~0=v_main_~p5~0_2, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~lk4~0=v_main_~lk4~0_3, main_~p3~0=v_main_~p3~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet14, main_#t~nondet13, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {689#true} is VALID [2022-04-07 21:19:24,471 INFO L290 TraceCheckUtils]: 6: Hoare triple {689#true} [228] L169-1-->L46: Formula: (and (= |v_main_#t~nondet15_2| v_main_~cond~0_2) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet15=|v_main_#t~nondet15_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet15, main_~cond~0] {689#true} is VALID [2022-04-07 21:19:24,472 INFO L290 TraceCheckUtils]: 7: Hoare triple {689#true} [231] L46-->L73: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_3 0) (= v_main_~lk5~0_5 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0) (= v_main_~lk4~0_4 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk1~0=v_main_~lk1~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_5, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk4~0=v_main_~lk4~0_4, main_~lk6~0=v_main_~lk6~0_3, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk2~0, main_~lk3~0, main_~lk11~0, main_~lk1~0, main_~lk10~0, main_~lk5~0, main_~lk4~0, main_~lk6~0, main_~lk9~0, main_~lk8~0, main_~lk7~0] {689#true} is VALID [2022-04-07 21:19:24,473 INFO L290 TraceCheckUtils]: 8: Hoare triple {689#true} [233] L73-->L73-2: Formula: (and (= v_main_~lk1~0_3 1) (not (= v_main_~p1~0_2 0))) InVars {main_~p1~0=v_main_~p1~0_2} OutVars{main_~p1~0=v_main_~p1~0_2, main_~lk1~0=v_main_~lk1~0_3} AuxVars[] AssignedVars[main_~lk1~0] {694#(not (= main_~p1~0 0))} is VALID [2022-04-07 21:19:24,474 INFO L290 TraceCheckUtils]: 9: Hoare triple {694#(not (= main_~p1~0 0))} [235] L73-2-->L77-1: Formula: (and (= v_main_~lk2~0_3 1) (not (= v_main_~p2~0_2 0))) InVars {main_~p2~0=v_main_~p2~0_2} OutVars{main_~lk2~0=v_main_~lk2~0_3, main_~p2~0=v_main_~p2~0_2} AuxVars[] AssignedVars[main_~lk2~0] {694#(not (= main_~p1~0 0))} is VALID [2022-04-07 21:19:24,477 INFO L290 TraceCheckUtils]: 10: Hoare triple {694#(not (= main_~p1~0 0))} [237] L77-1-->L81-1: Formula: (and (not (= v_main_~p3~0_2 0)) (= v_main_~lk3~0_3 1)) InVars {main_~p3~0=v_main_~p3~0_2} OutVars{main_~p3~0=v_main_~p3~0_2, main_~lk3~0=v_main_~lk3~0_3} AuxVars[] AssignedVars[main_~lk3~0] {694#(not (= main_~p1~0 0))} is VALID [2022-04-07 21:19:24,477 INFO L290 TraceCheckUtils]: 11: Hoare triple {694#(not (= main_~p1~0 0))} [240] L81-1-->L85-1: Formula: (= v_main_~p4~0_4 0) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4} AuxVars[] AssignedVars[] {694#(not (= main_~p1~0 0))} is VALID [2022-04-07 21:19:24,477 INFO L290 TraceCheckUtils]: 12: Hoare triple {694#(not (= main_~p1~0 0))} [241] L85-1-->L89-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {694#(not (= main_~p1~0 0))} is VALID [2022-04-07 21:19:24,478 INFO L290 TraceCheckUtils]: 13: Hoare triple {694#(not (= main_~p1~0 0))} [243] L89-1-->L93-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {694#(not (= main_~p1~0 0))} is VALID [2022-04-07 21:19:24,478 INFO L290 TraceCheckUtils]: 14: Hoare triple {694#(not (= main_~p1~0 0))} [245] L93-1-->L97-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {694#(not (= main_~p1~0 0))} is VALID [2022-04-07 21:19:24,478 INFO L290 TraceCheckUtils]: 15: Hoare triple {694#(not (= main_~p1~0 0))} [247] L97-1-->L101-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {694#(not (= main_~p1~0 0))} is VALID [2022-04-07 21:19:24,479 INFO L290 TraceCheckUtils]: 16: Hoare triple {694#(not (= main_~p1~0 0))} [249] L101-1-->L105-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {694#(not (= main_~p1~0 0))} is VALID [2022-04-07 21:19:24,479 INFO L290 TraceCheckUtils]: 17: Hoare triple {694#(not (= main_~p1~0 0))} [251] L105-1-->L109-1: Formula: (and (= v_main_~lk10~0_6 1) (not (= v_main_~p10~0_4 0))) InVars {main_~p10~0=v_main_~p10~0_4} OutVars{main_~lk10~0=v_main_~lk10~0_6, main_~p10~0=v_main_~p10~0_4} AuxVars[] AssignedVars[main_~lk10~0] {694#(not (= main_~p1~0 0))} is VALID [2022-04-07 21:19:24,479 INFO L290 TraceCheckUtils]: 18: Hoare triple {694#(not (= main_~p1~0 0))} [253] L109-1-->L113-1: Formula: (and (= v_main_~lk11~0_6 1) (not (= v_main_~p11~0_4 0))) InVars {main_~p11~0=v_main_~p11~0_4} OutVars{main_~lk11~0=v_main_~lk11~0_6, main_~p11~0=v_main_~p11~0_4} AuxVars[] AssignedVars[main_~lk11~0] {694#(not (= main_~p1~0 0))} is VALID [2022-04-07 21:19:24,480 INFO L290 TraceCheckUtils]: 19: Hoare triple {694#(not (= main_~p1~0 0))} [256] L113-1-->L119-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {690#false} is VALID [2022-04-07 21:19:24,480 INFO L290 TraceCheckUtils]: 20: Hoare triple {690#false} [259] L119-1-->L125: Formula: (not (= v_main_~p2~0_4 0)) InVars {main_~p2~0=v_main_~p2~0_4} OutVars{main_~p2~0=v_main_~p2~0_4} AuxVars[] AssignedVars[] {690#false} is VALID [2022-04-07 21:19:24,480 INFO L290 TraceCheckUtils]: 21: Hoare triple {690#false} [263] L125-->L170-1: Formula: (not (= v_main_~lk2~0_4 1)) InVars {main_~lk2~0=v_main_~lk2~0_4} OutVars{main_~lk2~0=v_main_~lk2~0_4} AuxVars[] AssignedVars[] {690#false} is VALID [2022-04-07 21:19:24,480 INFO L290 TraceCheckUtils]: 22: Hoare triple {690#false} [261] L170-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {690#false} is VALID [2022-04-07 21:19:24,481 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 21:19:24,481 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 21:19:24,481 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [855698545] [2022-04-07 21:19:24,481 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [855698545] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 21:19:24,481 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 21:19:24,481 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-07 21:19:24,481 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1586634195] [2022-04-07 21:19:24,481 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 21:19:24,482 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.0) internal successors, (20), 3 states have internal predecessors, (20), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 23 [2022-04-07 21:19:24,482 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 21:19:24,482 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 5.0) internal successors, (20), 3 states have internal predecessors, (20), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:24,494 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 23 edges. 23 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:19:24,494 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-07 21:19:24,494 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 21:19:24,495 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-07 21:19:24,495 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-07 21:19:24,495 INFO L87 Difference]: Start difference. First operand 77 states and 138 transitions. Second operand has 4 states, 4 states have (on average 5.0) internal successors, (20), 3 states have internal predecessors, (20), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:24,648 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:19:24,648 INFO L93 Difference]: Finished difference Result 82 states and 141 transitions. [2022-04-07 21:19:24,648 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-07 21:19:24,649 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.0) internal successors, (20), 3 states have internal predecessors, (20), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 23 [2022-04-07 21:19:24,649 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 21:19:24,649 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.0) internal successors, (20), 3 states have internal predecessors, (20), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:24,651 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 140 transitions. [2022-04-07 21:19:24,651 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.0) internal successors, (20), 3 states have internal predecessors, (20), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:24,652 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 140 transitions. [2022-04-07 21:19:24,652 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 140 transitions. [2022-04-07 21:19:24,759 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 140 edges. 140 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:19:24,761 INFO L225 Difference]: With dead ends: 82 [2022-04-07 21:19:24,761 INFO L226 Difference]: Without dead ends: 82 [2022-04-07 21:19:24,761 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-07 21:19:24,762 INFO L913 BasicCegarLoop]: 116 mSDtfsCounter, 144 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 69 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 144 SdHoareTripleChecker+Valid, 123 SdHoareTripleChecker+Invalid, 71 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 69 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 21:19:24,762 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [144 Valid, 123 Invalid, 71 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 69 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 21:19:24,763 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82 states. [2022-04-07 21:19:24,766 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82 to 80. [2022-04-07 21:19:24,766 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 21:19:24,766 INFO L82 GeneralOperation]: Start isEquivalent. First operand 82 states. Second operand has 80 states, 76 states have (on average 1.8026315789473684) internal successors, (137), 76 states have internal predecessors, (137), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:24,766 INFO L74 IsIncluded]: Start isIncluded. First operand 82 states. Second operand has 80 states, 76 states have (on average 1.8026315789473684) internal successors, (137), 76 states have internal predecessors, (137), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:24,767 INFO L87 Difference]: Start difference. First operand 82 states. Second operand has 80 states, 76 states have (on average 1.8026315789473684) internal successors, (137), 76 states have internal predecessors, (137), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:24,769 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:19:24,769 INFO L93 Difference]: Finished difference Result 82 states and 141 transitions. [2022-04-07 21:19:24,769 INFO L276 IsEmpty]: Start isEmpty. Operand 82 states and 141 transitions. [2022-04-07 21:19:24,769 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:19:24,769 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:19:24,770 INFO L74 IsIncluded]: Start isIncluded. First operand has 80 states, 76 states have (on average 1.8026315789473684) internal successors, (137), 76 states have internal predecessors, (137), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 82 states. [2022-04-07 21:19:24,770 INFO L87 Difference]: Start difference. First operand has 80 states, 76 states have (on average 1.8026315789473684) internal successors, (137), 76 states have internal predecessors, (137), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 82 states. [2022-04-07 21:19:24,772 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:19:24,772 INFO L93 Difference]: Finished difference Result 82 states and 141 transitions. [2022-04-07 21:19:24,772 INFO L276 IsEmpty]: Start isEmpty. Operand 82 states and 141 transitions. [2022-04-07 21:19:24,772 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:19:24,773 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:19:24,773 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 21:19:24,773 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 21:19:24,773 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 80 states, 76 states have (on average 1.8026315789473684) internal successors, (137), 76 states have internal predecessors, (137), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:24,775 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 80 states to 80 states and 140 transitions. [2022-04-07 21:19:24,775 INFO L78 Accepts]: Start accepts. Automaton has 80 states and 140 transitions. Word has length 23 [2022-04-07 21:19:24,775 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 21:19:24,775 INFO L478 AbstractCegarLoop]: Abstraction has 80 states and 140 transitions. [2022-04-07 21:19:24,775 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 5.0) internal successors, (20), 3 states have internal predecessors, (20), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:24,775 INFO L276 IsEmpty]: Start isEmpty. Operand 80 states and 140 transitions. [2022-04-07 21:19:24,776 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2022-04-07 21:19:24,776 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 21:19:24,776 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 21:19:24,776 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2022-04-07 21:19:24,776 INFO L403 AbstractCegarLoop]: === Iteration 4 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 21:19:24,776 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 21:19:24,776 INFO L85 PathProgramCache]: Analyzing trace with hash -1705044129, now seen corresponding path program 1 times [2022-04-07 21:19:24,777 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 21:19:24,777 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [913953467] [2022-04-07 21:19:24,777 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 21:19:24,777 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 21:19:24,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:19:24,810 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 21:19:24,812 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:19:24,817 INFO L290 TraceCheckUtils]: 0: Hoare triple {1033#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [222] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1027#true} is VALID [2022-04-07 21:19:24,817 INFO L290 TraceCheckUtils]: 1: Hoare triple {1027#true} [225] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1027#true} is VALID [2022-04-07 21:19:24,817 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1027#true} {1027#true} [301] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1027#true} is VALID [2022-04-07 21:19:24,818 INFO L272 TraceCheckUtils]: 0: Hoare triple {1027#true} [220] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1033#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 21:19:24,818 INFO L290 TraceCheckUtils]: 1: Hoare triple {1033#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [222] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1027#true} is VALID [2022-04-07 21:19:24,819 INFO L290 TraceCheckUtils]: 2: Hoare triple {1027#true} [225] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1027#true} is VALID [2022-04-07 21:19:24,819 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1027#true} {1027#true} [301] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1027#true} is VALID [2022-04-07 21:19:24,819 INFO L272 TraceCheckUtils]: 4: Hoare triple {1027#true} [221] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1027#true} is VALID [2022-04-07 21:19:24,819 INFO L290 TraceCheckUtils]: 5: Hoare triple {1027#true} [224] mainENTRY-->L169-1: Formula: (and (= v_main_~p5~0_2 |v_main_#t~nondet8_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (= v_main_~p4~0_2 |v_main_#t~nondet7_2|)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~lk3~0=v_main_~lk3~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p2~0=v_main_~p2~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_2, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p5~0=v_main_~p5~0_2, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~lk4~0=v_main_~lk4~0_3, main_~p3~0=v_main_~p3~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet14, main_#t~nondet13, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {1027#true} is VALID [2022-04-07 21:19:24,819 INFO L290 TraceCheckUtils]: 6: Hoare triple {1027#true} [228] L169-1-->L46: Formula: (and (= |v_main_#t~nondet15_2| v_main_~cond~0_2) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet15=|v_main_#t~nondet15_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet15, main_~cond~0] {1027#true} is VALID [2022-04-07 21:19:24,819 INFO L290 TraceCheckUtils]: 7: Hoare triple {1027#true} [231] L46-->L73: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_3 0) (= v_main_~lk5~0_5 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0) (= v_main_~lk4~0_4 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk1~0=v_main_~lk1~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_5, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk4~0=v_main_~lk4~0_4, main_~lk6~0=v_main_~lk6~0_3, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk2~0, main_~lk3~0, main_~lk11~0, main_~lk1~0, main_~lk10~0, main_~lk5~0, main_~lk4~0, main_~lk6~0, main_~lk9~0, main_~lk8~0, main_~lk7~0] {1027#true} is VALID [2022-04-07 21:19:24,820 INFO L290 TraceCheckUtils]: 8: Hoare triple {1027#true} [234] L73-->L73-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {1027#true} is VALID [2022-04-07 21:19:24,820 INFO L290 TraceCheckUtils]: 9: Hoare triple {1027#true} [235] L73-2-->L77-1: Formula: (and (= v_main_~lk2~0_3 1) (not (= v_main_~p2~0_2 0))) InVars {main_~p2~0=v_main_~p2~0_2} OutVars{main_~lk2~0=v_main_~lk2~0_3, main_~p2~0=v_main_~p2~0_2} AuxVars[] AssignedVars[main_~lk2~0] {1032#(= main_~lk2~0 1)} is VALID [2022-04-07 21:19:24,820 INFO L290 TraceCheckUtils]: 10: Hoare triple {1032#(= main_~lk2~0 1)} [237] L77-1-->L81-1: Formula: (and (not (= v_main_~p3~0_2 0)) (= v_main_~lk3~0_3 1)) InVars {main_~p3~0=v_main_~p3~0_2} OutVars{main_~p3~0=v_main_~p3~0_2, main_~lk3~0=v_main_~lk3~0_3} AuxVars[] AssignedVars[main_~lk3~0] {1032#(= main_~lk2~0 1)} is VALID [2022-04-07 21:19:24,821 INFO L290 TraceCheckUtils]: 11: Hoare triple {1032#(= main_~lk2~0 1)} [240] L81-1-->L85-1: Formula: (= v_main_~p4~0_4 0) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4} AuxVars[] AssignedVars[] {1032#(= main_~lk2~0 1)} is VALID [2022-04-07 21:19:24,821 INFO L290 TraceCheckUtils]: 12: Hoare triple {1032#(= main_~lk2~0 1)} [241] L85-1-->L89-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {1032#(= main_~lk2~0 1)} is VALID [2022-04-07 21:19:24,821 INFO L290 TraceCheckUtils]: 13: Hoare triple {1032#(= main_~lk2~0 1)} [243] L89-1-->L93-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {1032#(= main_~lk2~0 1)} is VALID [2022-04-07 21:19:24,821 INFO L290 TraceCheckUtils]: 14: Hoare triple {1032#(= main_~lk2~0 1)} [245] L93-1-->L97-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {1032#(= main_~lk2~0 1)} is VALID [2022-04-07 21:19:24,822 INFO L290 TraceCheckUtils]: 15: Hoare triple {1032#(= main_~lk2~0 1)} [247] L97-1-->L101-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {1032#(= main_~lk2~0 1)} is VALID [2022-04-07 21:19:24,822 INFO L290 TraceCheckUtils]: 16: Hoare triple {1032#(= main_~lk2~0 1)} [249] L101-1-->L105-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {1032#(= main_~lk2~0 1)} is VALID [2022-04-07 21:19:24,822 INFO L290 TraceCheckUtils]: 17: Hoare triple {1032#(= main_~lk2~0 1)} [251] L105-1-->L109-1: Formula: (and (= v_main_~lk10~0_6 1) (not (= v_main_~p10~0_4 0))) InVars {main_~p10~0=v_main_~p10~0_4} OutVars{main_~lk10~0=v_main_~lk10~0_6, main_~p10~0=v_main_~p10~0_4} AuxVars[] AssignedVars[main_~lk10~0] {1032#(= main_~lk2~0 1)} is VALID [2022-04-07 21:19:24,823 INFO L290 TraceCheckUtils]: 18: Hoare triple {1032#(= main_~lk2~0 1)} [253] L109-1-->L113-1: Formula: (and (= v_main_~lk11~0_6 1) (not (= v_main_~p11~0_4 0))) InVars {main_~p11~0=v_main_~p11~0_4} OutVars{main_~lk11~0=v_main_~lk11~0_6, main_~p11~0=v_main_~p11~0_4} AuxVars[] AssignedVars[main_~lk11~0] {1032#(= main_~lk2~0 1)} is VALID [2022-04-07 21:19:24,823 INFO L290 TraceCheckUtils]: 19: Hoare triple {1032#(= main_~lk2~0 1)} [256] L113-1-->L119-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {1032#(= main_~lk2~0 1)} is VALID [2022-04-07 21:19:24,824 INFO L290 TraceCheckUtils]: 20: Hoare triple {1032#(= main_~lk2~0 1)} [259] L119-1-->L125: Formula: (not (= v_main_~p2~0_4 0)) InVars {main_~p2~0=v_main_~p2~0_4} OutVars{main_~p2~0=v_main_~p2~0_4} AuxVars[] AssignedVars[] {1032#(= main_~lk2~0 1)} is VALID [2022-04-07 21:19:24,824 INFO L290 TraceCheckUtils]: 21: Hoare triple {1032#(= main_~lk2~0 1)} [263] L125-->L170-1: Formula: (not (= v_main_~lk2~0_4 1)) InVars {main_~lk2~0=v_main_~lk2~0_4} OutVars{main_~lk2~0=v_main_~lk2~0_4} AuxVars[] AssignedVars[] {1028#false} is VALID [2022-04-07 21:19:24,824 INFO L290 TraceCheckUtils]: 22: Hoare triple {1028#false} [261] L170-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1028#false} is VALID [2022-04-07 21:19:24,824 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 21:19:24,824 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 21:19:24,825 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [913953467] [2022-04-07 21:19:24,825 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [913953467] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 21:19:24,825 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 21:19:24,825 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-07 21:19:24,825 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [301611235] [2022-04-07 21:19:24,825 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 21:19:24,825 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.0) internal successors, (20), 3 states have internal predecessors, (20), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 23 [2022-04-07 21:19:24,826 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 21:19:24,826 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 5.0) internal successors, (20), 3 states have internal predecessors, (20), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:24,837 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 23 edges. 23 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:19:24,837 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-07 21:19:24,838 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 21:19:24,838 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-07 21:19:24,838 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-07 21:19:24,838 INFO L87 Difference]: Start difference. First operand 80 states and 140 transitions. Second operand has 4 states, 4 states have (on average 5.0) internal successors, (20), 3 states have internal predecessors, (20), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:25,003 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:19:25,003 INFO L93 Difference]: Finished difference Result 147 states and 262 transitions. [2022-04-07 21:19:25,004 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-07 21:19:25,004 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.0) internal successors, (20), 3 states have internal predecessors, (20), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 23 [2022-04-07 21:19:25,004 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 21:19:25,004 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.0) internal successors, (20), 3 states have internal predecessors, (20), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:25,006 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 138 transitions. [2022-04-07 21:19:25,006 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.0) internal successors, (20), 3 states have internal predecessors, (20), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:25,007 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 138 transitions. [2022-04-07 21:19:25,007 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 138 transitions. [2022-04-07 21:19:25,103 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 138 edges. 138 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:19:25,105 INFO L225 Difference]: With dead ends: 147 [2022-04-07 21:19:25,105 INFO L226 Difference]: Without dead ends: 147 [2022-04-07 21:19:25,105 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-07 21:19:25,106 INFO L913 BasicCegarLoop]: 76 mSDtfsCounter, 178 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 71 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 178 SdHoareTripleChecker+Valid, 83 SdHoareTripleChecker+Invalid, 73 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 71 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 21:19:25,106 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [178 Valid, 83 Invalid, 73 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 71 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 21:19:25,107 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 147 states. [2022-04-07 21:19:25,110 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 147 to 105. [2022-04-07 21:19:25,110 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 21:19:25,111 INFO L82 GeneralOperation]: Start isEquivalent. First operand 147 states. Second operand has 105 states, 101 states have (on average 1.801980198019802) internal successors, (182), 101 states have internal predecessors, (182), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:25,111 INFO L74 IsIncluded]: Start isIncluded. First operand 147 states. Second operand has 105 states, 101 states have (on average 1.801980198019802) internal successors, (182), 101 states have internal predecessors, (182), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:25,111 INFO L87 Difference]: Start difference. First operand 147 states. Second operand has 105 states, 101 states have (on average 1.801980198019802) internal successors, (182), 101 states have internal predecessors, (182), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:25,115 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:19:25,115 INFO L93 Difference]: Finished difference Result 147 states and 262 transitions. [2022-04-07 21:19:25,115 INFO L276 IsEmpty]: Start isEmpty. Operand 147 states and 262 transitions. [2022-04-07 21:19:25,116 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:19:25,116 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:19:25,116 INFO L74 IsIncluded]: Start isIncluded. First operand has 105 states, 101 states have (on average 1.801980198019802) internal successors, (182), 101 states have internal predecessors, (182), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 147 states. [2022-04-07 21:19:25,116 INFO L87 Difference]: Start difference. First operand has 105 states, 101 states have (on average 1.801980198019802) internal successors, (182), 101 states have internal predecessors, (182), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 147 states. [2022-04-07 21:19:25,120 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:19:25,120 INFO L93 Difference]: Finished difference Result 147 states and 262 transitions. [2022-04-07 21:19:25,120 INFO L276 IsEmpty]: Start isEmpty. Operand 147 states and 262 transitions. [2022-04-07 21:19:25,120 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:19:25,120 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:19:25,120 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 21:19:25,120 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 21:19:25,121 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 105 states, 101 states have (on average 1.801980198019802) internal successors, (182), 101 states have internal predecessors, (182), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:25,123 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 105 states to 105 states and 185 transitions. [2022-04-07 21:19:25,123 INFO L78 Accepts]: Start accepts. Automaton has 105 states and 185 transitions. Word has length 23 [2022-04-07 21:19:25,123 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 21:19:25,123 INFO L478 AbstractCegarLoop]: Abstraction has 105 states and 185 transitions. [2022-04-07 21:19:25,123 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 5.0) internal successors, (20), 3 states have internal predecessors, (20), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:25,123 INFO L276 IsEmpty]: Start isEmpty. Operand 105 states and 185 transitions. [2022-04-07 21:19:25,124 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2022-04-07 21:19:25,124 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 21:19:25,124 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 21:19:25,124 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2022-04-07 21:19:25,124 INFO L403 AbstractCegarLoop]: === Iteration 5 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 21:19:25,124 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 21:19:25,124 INFO L85 PathProgramCache]: Analyzing trace with hash 2084364542, now seen corresponding path program 1 times [2022-04-07 21:19:25,124 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 21:19:25,124 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1850434243] [2022-04-07 21:19:25,125 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 21:19:25,125 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 21:19:25,139 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:19:25,156 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 21:19:25,157 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:19:25,160 INFO L290 TraceCheckUtils]: 0: Hoare triple {1591#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [222] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1585#true} is VALID [2022-04-07 21:19:25,160 INFO L290 TraceCheckUtils]: 1: Hoare triple {1585#true} [225] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1585#true} is VALID [2022-04-07 21:19:25,160 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1585#true} {1585#true} [301] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1585#true} is VALID [2022-04-07 21:19:25,161 INFO L272 TraceCheckUtils]: 0: Hoare triple {1585#true} [220] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1591#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 21:19:25,161 INFO L290 TraceCheckUtils]: 1: Hoare triple {1591#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [222] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1585#true} is VALID [2022-04-07 21:19:25,161 INFO L290 TraceCheckUtils]: 2: Hoare triple {1585#true} [225] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1585#true} is VALID [2022-04-07 21:19:25,161 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1585#true} {1585#true} [301] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1585#true} is VALID [2022-04-07 21:19:25,161 INFO L272 TraceCheckUtils]: 4: Hoare triple {1585#true} [221] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1585#true} is VALID [2022-04-07 21:19:25,161 INFO L290 TraceCheckUtils]: 5: Hoare triple {1585#true} [224] mainENTRY-->L169-1: Formula: (and (= v_main_~p5~0_2 |v_main_#t~nondet8_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (= v_main_~p4~0_2 |v_main_#t~nondet7_2|)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~lk3~0=v_main_~lk3~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p2~0=v_main_~p2~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_2, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p5~0=v_main_~p5~0_2, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~lk4~0=v_main_~lk4~0_3, main_~p3~0=v_main_~p3~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet14, main_#t~nondet13, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {1585#true} is VALID [2022-04-07 21:19:25,161 INFO L290 TraceCheckUtils]: 6: Hoare triple {1585#true} [228] L169-1-->L46: Formula: (and (= |v_main_#t~nondet15_2| v_main_~cond~0_2) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet15=|v_main_#t~nondet15_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet15, main_~cond~0] {1585#true} is VALID [2022-04-07 21:19:25,162 INFO L290 TraceCheckUtils]: 7: Hoare triple {1585#true} [231] L46-->L73: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_3 0) (= v_main_~lk5~0_5 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0) (= v_main_~lk4~0_4 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk1~0=v_main_~lk1~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_5, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk4~0=v_main_~lk4~0_4, main_~lk6~0=v_main_~lk6~0_3, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk2~0, main_~lk3~0, main_~lk11~0, main_~lk1~0, main_~lk10~0, main_~lk5~0, main_~lk4~0, main_~lk6~0, main_~lk9~0, main_~lk8~0, main_~lk7~0] {1585#true} is VALID [2022-04-07 21:19:25,162 INFO L290 TraceCheckUtils]: 8: Hoare triple {1585#true} [234] L73-->L73-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {1585#true} is VALID [2022-04-07 21:19:25,162 INFO L290 TraceCheckUtils]: 9: Hoare triple {1585#true} [236] L73-2-->L77-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {1590#(= main_~p2~0 0)} is VALID [2022-04-07 21:19:25,162 INFO L290 TraceCheckUtils]: 10: Hoare triple {1590#(= main_~p2~0 0)} [237] L77-1-->L81-1: Formula: (and (not (= v_main_~p3~0_2 0)) (= v_main_~lk3~0_3 1)) InVars {main_~p3~0=v_main_~p3~0_2} OutVars{main_~p3~0=v_main_~p3~0_2, main_~lk3~0=v_main_~lk3~0_3} AuxVars[] AssignedVars[main_~lk3~0] {1590#(= main_~p2~0 0)} is VALID [2022-04-07 21:19:25,162 INFO L290 TraceCheckUtils]: 11: Hoare triple {1590#(= main_~p2~0 0)} [240] L81-1-->L85-1: Formula: (= v_main_~p4~0_4 0) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4} AuxVars[] AssignedVars[] {1590#(= main_~p2~0 0)} is VALID [2022-04-07 21:19:25,163 INFO L290 TraceCheckUtils]: 12: Hoare triple {1590#(= main_~p2~0 0)} [241] L85-1-->L89-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {1590#(= main_~p2~0 0)} is VALID [2022-04-07 21:19:25,163 INFO L290 TraceCheckUtils]: 13: Hoare triple {1590#(= main_~p2~0 0)} [243] L89-1-->L93-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {1590#(= main_~p2~0 0)} is VALID [2022-04-07 21:19:25,163 INFO L290 TraceCheckUtils]: 14: Hoare triple {1590#(= main_~p2~0 0)} [245] L93-1-->L97-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {1590#(= main_~p2~0 0)} is VALID [2022-04-07 21:19:25,164 INFO L290 TraceCheckUtils]: 15: Hoare triple {1590#(= main_~p2~0 0)} [247] L97-1-->L101-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {1590#(= main_~p2~0 0)} is VALID [2022-04-07 21:19:25,164 INFO L290 TraceCheckUtils]: 16: Hoare triple {1590#(= main_~p2~0 0)} [249] L101-1-->L105-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {1590#(= main_~p2~0 0)} is VALID [2022-04-07 21:19:25,167 INFO L290 TraceCheckUtils]: 17: Hoare triple {1590#(= main_~p2~0 0)} [251] L105-1-->L109-1: Formula: (and (= v_main_~lk10~0_6 1) (not (= v_main_~p10~0_4 0))) InVars {main_~p10~0=v_main_~p10~0_4} OutVars{main_~lk10~0=v_main_~lk10~0_6, main_~p10~0=v_main_~p10~0_4} AuxVars[] AssignedVars[main_~lk10~0] {1590#(= main_~p2~0 0)} is VALID [2022-04-07 21:19:25,168 INFO L290 TraceCheckUtils]: 18: Hoare triple {1590#(= main_~p2~0 0)} [253] L109-1-->L113-1: Formula: (and (= v_main_~lk11~0_6 1) (not (= v_main_~p11~0_4 0))) InVars {main_~p11~0=v_main_~p11~0_4} OutVars{main_~lk11~0=v_main_~lk11~0_6, main_~p11~0=v_main_~p11~0_4} AuxVars[] AssignedVars[main_~lk11~0] {1590#(= main_~p2~0 0)} is VALID [2022-04-07 21:19:25,168 INFO L290 TraceCheckUtils]: 19: Hoare triple {1590#(= main_~p2~0 0)} [256] L113-1-->L119-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {1590#(= main_~p2~0 0)} is VALID [2022-04-07 21:19:25,170 INFO L290 TraceCheckUtils]: 20: Hoare triple {1590#(= main_~p2~0 0)} [259] L119-1-->L125: Formula: (not (= v_main_~p2~0_4 0)) InVars {main_~p2~0=v_main_~p2~0_4} OutVars{main_~p2~0=v_main_~p2~0_4} AuxVars[] AssignedVars[] {1586#false} is VALID [2022-04-07 21:19:25,170 INFO L290 TraceCheckUtils]: 21: Hoare triple {1586#false} [263] L125-->L170-1: Formula: (not (= v_main_~lk2~0_4 1)) InVars {main_~lk2~0=v_main_~lk2~0_4} OutVars{main_~lk2~0=v_main_~lk2~0_4} AuxVars[] AssignedVars[] {1586#false} is VALID [2022-04-07 21:19:25,170 INFO L290 TraceCheckUtils]: 22: Hoare triple {1586#false} [261] L170-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1586#false} is VALID [2022-04-07 21:19:25,170 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 21:19:25,170 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 21:19:25,170 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1850434243] [2022-04-07 21:19:25,171 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1850434243] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 21:19:25,171 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 21:19:25,171 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-07 21:19:25,171 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [708406973] [2022-04-07 21:19:25,171 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 21:19:25,171 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.0) internal successors, (20), 3 states have internal predecessors, (20), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 23 [2022-04-07 21:19:25,171 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 21:19:25,171 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 5.0) internal successors, (20), 3 states have internal predecessors, (20), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:25,190 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 23 edges. 23 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:19:25,190 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-07 21:19:25,190 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 21:19:25,191 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-07 21:19:25,191 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-07 21:19:25,191 INFO L87 Difference]: Start difference. First operand 105 states and 185 transitions. Second operand has 4 states, 4 states have (on average 5.0) internal successors, (20), 3 states have internal predecessors, (20), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:25,334 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:19:25,335 INFO L93 Difference]: Finished difference Result 149 states and 260 transitions. [2022-04-07 21:19:25,335 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-07 21:19:25,335 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.0) internal successors, (20), 3 states have internal predecessors, (20), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 23 [2022-04-07 21:19:25,336 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 21:19:25,336 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.0) internal successors, (20), 3 states have internal predecessors, (20), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:25,337 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 139 transitions. [2022-04-07 21:19:25,338 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.0) internal successors, (20), 3 states have internal predecessors, (20), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:25,340 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 139 transitions. [2022-04-07 21:19:25,340 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 139 transitions. [2022-04-07 21:19:25,432 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 139 edges. 139 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:19:25,433 INFO L225 Difference]: With dead ends: 149 [2022-04-07 21:19:25,434 INFO L226 Difference]: Without dead ends: 149 [2022-04-07 21:19:25,434 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-07 21:19:25,434 INFO L913 BasicCegarLoop]: 98 mSDtfsCounter, 157 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 69 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 157 SdHoareTripleChecker+Valid, 105 SdHoareTripleChecker+Invalid, 72 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 69 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 21:19:25,435 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [157 Valid, 105 Invalid, 72 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 69 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 21:19:25,435 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 149 states. [2022-04-07 21:19:25,439 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 149 to 147. [2022-04-07 21:19:25,439 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 21:19:25,439 INFO L82 GeneralOperation]: Start isEquivalent. First operand 149 states. Second operand has 147 states, 143 states have (on average 1.7902097902097902) internal successors, (256), 143 states have internal predecessors, (256), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:25,439 INFO L74 IsIncluded]: Start isIncluded. First operand 149 states. Second operand has 147 states, 143 states have (on average 1.7902097902097902) internal successors, (256), 143 states have internal predecessors, (256), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:25,440 INFO L87 Difference]: Start difference. First operand 149 states. Second operand has 147 states, 143 states have (on average 1.7902097902097902) internal successors, (256), 143 states have internal predecessors, (256), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:25,443 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:19:25,443 INFO L93 Difference]: Finished difference Result 149 states and 260 transitions. [2022-04-07 21:19:25,443 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 260 transitions. [2022-04-07 21:19:25,443 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:19:25,443 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:19:25,443 INFO L74 IsIncluded]: Start isIncluded. First operand has 147 states, 143 states have (on average 1.7902097902097902) internal successors, (256), 143 states have internal predecessors, (256), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 149 states. [2022-04-07 21:19:25,444 INFO L87 Difference]: Start difference. First operand has 147 states, 143 states have (on average 1.7902097902097902) internal successors, (256), 143 states have internal predecessors, (256), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 149 states. [2022-04-07 21:19:25,447 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:19:25,447 INFO L93 Difference]: Finished difference Result 149 states and 260 transitions. [2022-04-07 21:19:25,447 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 260 transitions. [2022-04-07 21:19:25,447 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:19:25,447 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:19:25,447 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 21:19:25,447 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 21:19:25,448 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 147 states, 143 states have (on average 1.7902097902097902) internal successors, (256), 143 states have internal predecessors, (256), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:25,450 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 147 states to 147 states and 259 transitions. [2022-04-07 21:19:25,451 INFO L78 Accepts]: Start accepts. Automaton has 147 states and 259 transitions. Word has length 23 [2022-04-07 21:19:25,451 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 21:19:25,451 INFO L478 AbstractCegarLoop]: Abstraction has 147 states and 259 transitions. [2022-04-07 21:19:25,451 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 5.0) internal successors, (20), 3 states have internal predecessors, (20), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:25,451 INFO L276 IsEmpty]: Start isEmpty. Operand 147 states and 259 transitions. [2022-04-07 21:19:25,451 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2022-04-07 21:19:25,451 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 21:19:25,451 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 21:19:25,451 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2022-04-07 21:19:25,452 INFO L403 AbstractCegarLoop]: === Iteration 6 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 21:19:25,452 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 21:19:25,452 INFO L85 PathProgramCache]: Analyzing trace with hash -1316728287, now seen corresponding path program 1 times [2022-04-07 21:19:25,452 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 21:19:25,452 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1356013431] [2022-04-07 21:19:25,452 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 21:19:25,452 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 21:19:25,467 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:19:25,483 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 21:19:25,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:19:25,487 INFO L290 TraceCheckUtils]: 0: Hoare triple {2197#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [222] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2191#true} is VALID [2022-04-07 21:19:25,487 INFO L290 TraceCheckUtils]: 1: Hoare triple {2191#true} [225] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2191#true} is VALID [2022-04-07 21:19:25,487 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2191#true} {2191#true} [301] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2191#true} is VALID [2022-04-07 21:19:25,488 INFO L272 TraceCheckUtils]: 0: Hoare triple {2191#true} [220] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2197#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 21:19:25,488 INFO L290 TraceCheckUtils]: 1: Hoare triple {2197#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [222] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2191#true} is VALID [2022-04-07 21:19:25,488 INFO L290 TraceCheckUtils]: 2: Hoare triple {2191#true} [225] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2191#true} is VALID [2022-04-07 21:19:25,488 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2191#true} {2191#true} [301] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2191#true} is VALID [2022-04-07 21:19:25,488 INFO L272 TraceCheckUtils]: 4: Hoare triple {2191#true} [221] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2191#true} is VALID [2022-04-07 21:19:25,488 INFO L290 TraceCheckUtils]: 5: Hoare triple {2191#true} [224] mainENTRY-->L169-1: Formula: (and (= v_main_~p5~0_2 |v_main_#t~nondet8_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (= v_main_~p4~0_2 |v_main_#t~nondet7_2|)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~lk3~0=v_main_~lk3~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p2~0=v_main_~p2~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_2, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p5~0=v_main_~p5~0_2, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~lk4~0=v_main_~lk4~0_3, main_~p3~0=v_main_~p3~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet14, main_#t~nondet13, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {2191#true} is VALID [2022-04-07 21:19:25,488 INFO L290 TraceCheckUtils]: 6: Hoare triple {2191#true} [228] L169-1-->L46: Formula: (and (= |v_main_#t~nondet15_2| v_main_~cond~0_2) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet15=|v_main_#t~nondet15_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet15, main_~cond~0] {2191#true} is VALID [2022-04-07 21:19:25,488 INFO L290 TraceCheckUtils]: 7: Hoare triple {2191#true} [231] L46-->L73: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_3 0) (= v_main_~lk5~0_5 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0) (= v_main_~lk4~0_4 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk1~0=v_main_~lk1~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_5, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk4~0=v_main_~lk4~0_4, main_~lk6~0=v_main_~lk6~0_3, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk2~0, main_~lk3~0, main_~lk11~0, main_~lk1~0, main_~lk10~0, main_~lk5~0, main_~lk4~0, main_~lk6~0, main_~lk9~0, main_~lk8~0, main_~lk7~0] {2191#true} is VALID [2022-04-07 21:19:25,489 INFO L290 TraceCheckUtils]: 8: Hoare triple {2191#true} [234] L73-->L73-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {2191#true} is VALID [2022-04-07 21:19:25,489 INFO L290 TraceCheckUtils]: 9: Hoare triple {2191#true} [235] L73-2-->L77-1: Formula: (and (= v_main_~lk2~0_3 1) (not (= v_main_~p2~0_2 0))) InVars {main_~p2~0=v_main_~p2~0_2} OutVars{main_~lk2~0=v_main_~lk2~0_3, main_~p2~0=v_main_~p2~0_2} AuxVars[] AssignedVars[main_~lk2~0] {2196#(not (= main_~p2~0 0))} is VALID [2022-04-07 21:19:25,489 INFO L290 TraceCheckUtils]: 10: Hoare triple {2196#(not (= main_~p2~0 0))} [237] L77-1-->L81-1: Formula: (and (not (= v_main_~p3~0_2 0)) (= v_main_~lk3~0_3 1)) InVars {main_~p3~0=v_main_~p3~0_2} OutVars{main_~p3~0=v_main_~p3~0_2, main_~lk3~0=v_main_~lk3~0_3} AuxVars[] AssignedVars[main_~lk3~0] {2196#(not (= main_~p2~0 0))} is VALID [2022-04-07 21:19:25,489 INFO L290 TraceCheckUtils]: 11: Hoare triple {2196#(not (= main_~p2~0 0))} [240] L81-1-->L85-1: Formula: (= v_main_~p4~0_4 0) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4} AuxVars[] AssignedVars[] {2196#(not (= main_~p2~0 0))} is VALID [2022-04-07 21:19:25,490 INFO L290 TraceCheckUtils]: 12: Hoare triple {2196#(not (= main_~p2~0 0))} [241] L85-1-->L89-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {2196#(not (= main_~p2~0 0))} is VALID [2022-04-07 21:19:25,490 INFO L290 TraceCheckUtils]: 13: Hoare triple {2196#(not (= main_~p2~0 0))} [243] L89-1-->L93-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {2196#(not (= main_~p2~0 0))} is VALID [2022-04-07 21:19:25,490 INFO L290 TraceCheckUtils]: 14: Hoare triple {2196#(not (= main_~p2~0 0))} [245] L93-1-->L97-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {2196#(not (= main_~p2~0 0))} is VALID [2022-04-07 21:19:25,490 INFO L290 TraceCheckUtils]: 15: Hoare triple {2196#(not (= main_~p2~0 0))} [247] L97-1-->L101-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {2196#(not (= main_~p2~0 0))} is VALID [2022-04-07 21:19:25,491 INFO L290 TraceCheckUtils]: 16: Hoare triple {2196#(not (= main_~p2~0 0))} [249] L101-1-->L105-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {2196#(not (= main_~p2~0 0))} is VALID [2022-04-07 21:19:25,491 INFO L290 TraceCheckUtils]: 17: Hoare triple {2196#(not (= main_~p2~0 0))} [251] L105-1-->L109-1: Formula: (and (= v_main_~lk10~0_6 1) (not (= v_main_~p10~0_4 0))) InVars {main_~p10~0=v_main_~p10~0_4} OutVars{main_~lk10~0=v_main_~lk10~0_6, main_~p10~0=v_main_~p10~0_4} AuxVars[] AssignedVars[main_~lk10~0] {2196#(not (= main_~p2~0 0))} is VALID [2022-04-07 21:19:25,491 INFO L290 TraceCheckUtils]: 18: Hoare triple {2196#(not (= main_~p2~0 0))} [253] L109-1-->L113-1: Formula: (and (= v_main_~lk11~0_6 1) (not (= v_main_~p11~0_4 0))) InVars {main_~p11~0=v_main_~p11~0_4} OutVars{main_~lk11~0=v_main_~lk11~0_6, main_~p11~0=v_main_~p11~0_4} AuxVars[] AssignedVars[main_~lk11~0] {2196#(not (= main_~p2~0 0))} is VALID [2022-04-07 21:19:25,492 INFO L290 TraceCheckUtils]: 19: Hoare triple {2196#(not (= main_~p2~0 0))} [256] L113-1-->L119-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {2196#(not (= main_~p2~0 0))} is VALID [2022-04-07 21:19:25,492 INFO L290 TraceCheckUtils]: 20: Hoare triple {2196#(not (= main_~p2~0 0))} [260] L119-1-->L124-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {2192#false} is VALID [2022-04-07 21:19:25,492 INFO L290 TraceCheckUtils]: 21: Hoare triple {2192#false} [265] L124-1-->L130: Formula: (not (= v_main_~p3~0_4 0)) InVars {main_~p3~0=v_main_~p3~0_4} OutVars{main_~p3~0=v_main_~p3~0_4} AuxVars[] AssignedVars[] {2192#false} is VALID [2022-04-07 21:19:25,492 INFO L290 TraceCheckUtils]: 22: Hoare triple {2192#false} [267] L130-->L170-1: Formula: (not (= v_main_~lk3~0_4 1)) InVars {main_~lk3~0=v_main_~lk3~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_4} AuxVars[] AssignedVars[] {2192#false} is VALID [2022-04-07 21:19:25,492 INFO L290 TraceCheckUtils]: 23: Hoare triple {2192#false} [261] L170-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2192#false} is VALID [2022-04-07 21:19:25,492 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 21:19:25,492 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 21:19:25,492 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1356013431] [2022-04-07 21:19:25,493 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1356013431] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 21:19:25,493 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 21:19:25,493 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-07 21:19:25,493 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1923229998] [2022-04-07 21:19:25,493 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 21:19:25,493 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.25) internal successors, (21), 3 states have internal predecessors, (21), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 24 [2022-04-07 21:19:25,493 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 21:19:25,493 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 5.25) internal successors, (21), 3 states have internal predecessors, (21), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:25,506 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 24 edges. 24 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:19:25,506 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-07 21:19:25,506 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 21:19:25,507 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-07 21:19:25,507 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-07 21:19:25,507 INFO L87 Difference]: Start difference. First operand 147 states and 259 transitions. Second operand has 4 states, 4 states have (on average 5.25) internal successors, (21), 3 states have internal predecessors, (21), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:25,654 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:19:25,654 INFO L93 Difference]: Finished difference Result 151 states and 260 transitions. [2022-04-07 21:19:25,654 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-07 21:19:25,654 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.25) internal successors, (21), 3 states have internal predecessors, (21), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 24 [2022-04-07 21:19:25,654 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 21:19:25,655 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.25) internal successors, (21), 3 states have internal predecessors, (21), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:25,656 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 138 transitions. [2022-04-07 21:19:25,656 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.25) internal successors, (21), 3 states have internal predecessors, (21), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:25,657 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 138 transitions. [2022-04-07 21:19:25,657 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 138 transitions. [2022-04-07 21:19:25,746 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 138 edges. 138 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:19:25,748 INFO L225 Difference]: With dead ends: 151 [2022-04-07 21:19:25,748 INFO L226 Difference]: Without dead ends: 151 [2022-04-07 21:19:25,748 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-07 21:19:25,749 INFO L913 BasicCegarLoop]: 113 mSDtfsCounter, 143 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 68 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 143 SdHoareTripleChecker+Valid, 120 SdHoareTripleChecker+Invalid, 70 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 68 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 21:19:25,749 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [143 Valid, 120 Invalid, 70 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 68 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 21:19:25,749 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 151 states. [2022-04-07 21:19:25,752 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 151 to 149. [2022-04-07 21:19:25,752 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 21:19:25,753 INFO L82 GeneralOperation]: Start isEquivalent. First operand 151 states. Second operand has 149 states, 145 states have (on average 1.7655172413793103) internal successors, (256), 145 states have internal predecessors, (256), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:25,753 INFO L74 IsIncluded]: Start isIncluded. First operand 151 states. Second operand has 149 states, 145 states have (on average 1.7655172413793103) internal successors, (256), 145 states have internal predecessors, (256), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:25,753 INFO L87 Difference]: Start difference. First operand 151 states. Second operand has 149 states, 145 states have (on average 1.7655172413793103) internal successors, (256), 145 states have internal predecessors, (256), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:25,756 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:19:25,756 INFO L93 Difference]: Finished difference Result 151 states and 260 transitions. [2022-04-07 21:19:25,756 INFO L276 IsEmpty]: Start isEmpty. Operand 151 states and 260 transitions. [2022-04-07 21:19:25,757 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:19:25,757 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:19:25,757 INFO L74 IsIncluded]: Start isIncluded. First operand has 149 states, 145 states have (on average 1.7655172413793103) internal successors, (256), 145 states have internal predecessors, (256), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 151 states. [2022-04-07 21:19:25,757 INFO L87 Difference]: Start difference. First operand has 149 states, 145 states have (on average 1.7655172413793103) internal successors, (256), 145 states have internal predecessors, (256), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 151 states. [2022-04-07 21:19:25,760 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:19:25,760 INFO L93 Difference]: Finished difference Result 151 states and 260 transitions. [2022-04-07 21:19:25,760 INFO L276 IsEmpty]: Start isEmpty. Operand 151 states and 260 transitions. [2022-04-07 21:19:25,760 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:19:25,760 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:19:25,761 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 21:19:25,761 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 21:19:25,761 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 149 states, 145 states have (on average 1.7655172413793103) internal successors, (256), 145 states have internal predecessors, (256), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:25,764 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149 states to 149 states and 259 transitions. [2022-04-07 21:19:25,764 INFO L78 Accepts]: Start accepts. Automaton has 149 states and 259 transitions. Word has length 24 [2022-04-07 21:19:25,764 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 21:19:25,764 INFO L478 AbstractCegarLoop]: Abstraction has 149 states and 259 transitions. [2022-04-07 21:19:25,764 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 5.25) internal successors, (21), 3 states have internal predecessors, (21), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:25,764 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 259 transitions. [2022-04-07 21:19:25,764 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2022-04-07 21:19:25,764 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 21:19:25,764 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 21:19:25,765 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2022-04-07 21:19:25,765 INFO L403 AbstractCegarLoop]: === Iteration 7 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 21:19:25,765 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 21:19:25,765 INFO L85 PathProgramCache]: Analyzing trace with hash 190823522, now seen corresponding path program 1 times [2022-04-07 21:19:25,765 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 21:19:25,765 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1074875474] [2022-04-07 21:19:25,765 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 21:19:25,765 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 21:19:25,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:19:25,796 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 21:19:25,797 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:19:25,799 INFO L290 TraceCheckUtils]: 0: Hoare triple {2811#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [222] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2805#true} is VALID [2022-04-07 21:19:25,800 INFO L290 TraceCheckUtils]: 1: Hoare triple {2805#true} [225] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2805#true} is VALID [2022-04-07 21:19:25,800 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2805#true} {2805#true} [301] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2805#true} is VALID [2022-04-07 21:19:25,800 INFO L272 TraceCheckUtils]: 0: Hoare triple {2805#true} [220] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2811#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 21:19:25,800 INFO L290 TraceCheckUtils]: 1: Hoare triple {2811#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [222] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2805#true} is VALID [2022-04-07 21:19:25,800 INFO L290 TraceCheckUtils]: 2: Hoare triple {2805#true} [225] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2805#true} is VALID [2022-04-07 21:19:25,800 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2805#true} {2805#true} [301] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2805#true} is VALID [2022-04-07 21:19:25,801 INFO L272 TraceCheckUtils]: 4: Hoare triple {2805#true} [221] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2805#true} is VALID [2022-04-07 21:19:25,801 INFO L290 TraceCheckUtils]: 5: Hoare triple {2805#true} [224] mainENTRY-->L169-1: Formula: (and (= v_main_~p5~0_2 |v_main_#t~nondet8_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (= v_main_~p4~0_2 |v_main_#t~nondet7_2|)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~lk3~0=v_main_~lk3~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p2~0=v_main_~p2~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_2, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p5~0=v_main_~p5~0_2, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~lk4~0=v_main_~lk4~0_3, main_~p3~0=v_main_~p3~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet14, main_#t~nondet13, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {2805#true} is VALID [2022-04-07 21:19:25,801 INFO L290 TraceCheckUtils]: 6: Hoare triple {2805#true} [228] L169-1-->L46: Formula: (and (= |v_main_#t~nondet15_2| v_main_~cond~0_2) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet15=|v_main_#t~nondet15_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet15, main_~cond~0] {2805#true} is VALID [2022-04-07 21:19:25,801 INFO L290 TraceCheckUtils]: 7: Hoare triple {2805#true} [231] L46-->L73: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_3 0) (= v_main_~lk5~0_5 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0) (= v_main_~lk4~0_4 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk1~0=v_main_~lk1~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_5, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk4~0=v_main_~lk4~0_4, main_~lk6~0=v_main_~lk6~0_3, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk2~0, main_~lk3~0, main_~lk11~0, main_~lk1~0, main_~lk10~0, main_~lk5~0, main_~lk4~0, main_~lk6~0, main_~lk9~0, main_~lk8~0, main_~lk7~0] {2805#true} is VALID [2022-04-07 21:19:25,801 INFO L290 TraceCheckUtils]: 8: Hoare triple {2805#true} [234] L73-->L73-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {2805#true} is VALID [2022-04-07 21:19:25,801 INFO L290 TraceCheckUtils]: 9: Hoare triple {2805#true} [236] L73-2-->L77-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {2805#true} is VALID [2022-04-07 21:19:25,801 INFO L290 TraceCheckUtils]: 10: Hoare triple {2805#true} [237] L77-1-->L81-1: Formula: (and (not (= v_main_~p3~0_2 0)) (= v_main_~lk3~0_3 1)) InVars {main_~p3~0=v_main_~p3~0_2} OutVars{main_~p3~0=v_main_~p3~0_2, main_~lk3~0=v_main_~lk3~0_3} AuxVars[] AssignedVars[main_~lk3~0] {2810#(= main_~lk3~0 1)} is VALID [2022-04-07 21:19:25,802 INFO L290 TraceCheckUtils]: 11: Hoare triple {2810#(= main_~lk3~0 1)} [240] L81-1-->L85-1: Formula: (= v_main_~p4~0_4 0) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4} AuxVars[] AssignedVars[] {2810#(= main_~lk3~0 1)} is VALID [2022-04-07 21:19:25,802 INFO L290 TraceCheckUtils]: 12: Hoare triple {2810#(= main_~lk3~0 1)} [241] L85-1-->L89-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {2810#(= main_~lk3~0 1)} is VALID [2022-04-07 21:19:25,802 INFO L290 TraceCheckUtils]: 13: Hoare triple {2810#(= main_~lk3~0 1)} [243] L89-1-->L93-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {2810#(= main_~lk3~0 1)} is VALID [2022-04-07 21:19:25,802 INFO L290 TraceCheckUtils]: 14: Hoare triple {2810#(= main_~lk3~0 1)} [245] L93-1-->L97-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {2810#(= main_~lk3~0 1)} is VALID [2022-04-07 21:19:25,803 INFO L290 TraceCheckUtils]: 15: Hoare triple {2810#(= main_~lk3~0 1)} [247] L97-1-->L101-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {2810#(= main_~lk3~0 1)} is VALID [2022-04-07 21:19:25,803 INFO L290 TraceCheckUtils]: 16: Hoare triple {2810#(= main_~lk3~0 1)} [249] L101-1-->L105-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {2810#(= main_~lk3~0 1)} is VALID [2022-04-07 21:19:25,803 INFO L290 TraceCheckUtils]: 17: Hoare triple {2810#(= main_~lk3~0 1)} [251] L105-1-->L109-1: Formula: (and (= v_main_~lk10~0_6 1) (not (= v_main_~p10~0_4 0))) InVars {main_~p10~0=v_main_~p10~0_4} OutVars{main_~lk10~0=v_main_~lk10~0_6, main_~p10~0=v_main_~p10~0_4} AuxVars[] AssignedVars[main_~lk10~0] {2810#(= main_~lk3~0 1)} is VALID [2022-04-07 21:19:25,804 INFO L290 TraceCheckUtils]: 18: Hoare triple {2810#(= main_~lk3~0 1)} [253] L109-1-->L113-1: Formula: (and (= v_main_~lk11~0_6 1) (not (= v_main_~p11~0_4 0))) InVars {main_~p11~0=v_main_~p11~0_4} OutVars{main_~lk11~0=v_main_~lk11~0_6, main_~p11~0=v_main_~p11~0_4} AuxVars[] AssignedVars[main_~lk11~0] {2810#(= main_~lk3~0 1)} is VALID [2022-04-07 21:19:25,804 INFO L290 TraceCheckUtils]: 19: Hoare triple {2810#(= main_~lk3~0 1)} [256] L113-1-->L119-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {2810#(= main_~lk3~0 1)} is VALID [2022-04-07 21:19:25,804 INFO L290 TraceCheckUtils]: 20: Hoare triple {2810#(= main_~lk3~0 1)} [260] L119-1-->L124-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {2810#(= main_~lk3~0 1)} is VALID [2022-04-07 21:19:25,804 INFO L290 TraceCheckUtils]: 21: Hoare triple {2810#(= main_~lk3~0 1)} [265] L124-1-->L130: Formula: (not (= v_main_~p3~0_4 0)) InVars {main_~p3~0=v_main_~p3~0_4} OutVars{main_~p3~0=v_main_~p3~0_4} AuxVars[] AssignedVars[] {2810#(= main_~lk3~0 1)} is VALID [2022-04-07 21:19:25,805 INFO L290 TraceCheckUtils]: 22: Hoare triple {2810#(= main_~lk3~0 1)} [267] L130-->L170-1: Formula: (not (= v_main_~lk3~0_4 1)) InVars {main_~lk3~0=v_main_~lk3~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_4} AuxVars[] AssignedVars[] {2806#false} is VALID [2022-04-07 21:19:25,805 INFO L290 TraceCheckUtils]: 23: Hoare triple {2806#false} [261] L170-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2806#false} is VALID [2022-04-07 21:19:25,805 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 21:19:25,805 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 21:19:25,805 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1074875474] [2022-04-07 21:19:25,805 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1074875474] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 21:19:25,805 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 21:19:25,805 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-07 21:19:25,805 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [852230676] [2022-04-07 21:19:25,806 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 21:19:25,806 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.25) internal successors, (21), 3 states have internal predecessors, (21), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 24 [2022-04-07 21:19:25,806 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 21:19:25,806 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 5.25) internal successors, (21), 3 states have internal predecessors, (21), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:25,819 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 24 edges. 24 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:19:25,819 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-07 21:19:25,819 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 21:19:25,819 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-07 21:19:25,820 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-07 21:19:25,820 INFO L87 Difference]: Start difference. First operand 149 states and 259 transitions. Second operand has 4 states, 4 states have (on average 5.25) internal successors, (21), 3 states have internal predecessors, (21), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:25,985 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:19:25,985 INFO L93 Difference]: Finished difference Result 275 states and 484 transitions. [2022-04-07 21:19:25,985 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-07 21:19:25,985 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.25) internal successors, (21), 3 states have internal predecessors, (21), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 24 [2022-04-07 21:19:25,985 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 21:19:25,985 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.25) internal successors, (21), 3 states have internal predecessors, (21), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:25,987 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 134 transitions. [2022-04-07 21:19:25,987 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.25) internal successors, (21), 3 states have internal predecessors, (21), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:25,988 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 134 transitions. [2022-04-07 21:19:25,988 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 134 transitions. [2022-04-07 21:19:26,084 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 134 edges. 134 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:19:26,088 INFO L225 Difference]: With dead ends: 275 [2022-04-07 21:19:26,088 INFO L226 Difference]: Without dead ends: 275 [2022-04-07 21:19:26,088 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-07 21:19:26,089 INFO L913 BasicCegarLoop]: 75 mSDtfsCounter, 171 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 70 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 171 SdHoareTripleChecker+Valid, 82 SdHoareTripleChecker+Invalid, 72 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 70 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 21:19:26,089 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [171 Valid, 82 Invalid, 72 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 70 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 21:19:26,090 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 275 states. [2022-04-07 21:19:26,113 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 275 to 201. [2022-04-07 21:19:26,113 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 21:19:26,114 INFO L82 GeneralOperation]: Start isEquivalent. First operand 275 states. Second operand has 201 states, 197 states have (on average 1.7461928934010151) internal successors, (344), 197 states have internal predecessors, (344), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:26,114 INFO L74 IsIncluded]: Start isIncluded. First operand 275 states. Second operand has 201 states, 197 states have (on average 1.7461928934010151) internal successors, (344), 197 states have internal predecessors, (344), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:26,114 INFO L87 Difference]: Start difference. First operand 275 states. Second operand has 201 states, 197 states have (on average 1.7461928934010151) internal successors, (344), 197 states have internal predecessors, (344), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:26,119 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:19:26,120 INFO L93 Difference]: Finished difference Result 275 states and 484 transitions. [2022-04-07 21:19:26,120 INFO L276 IsEmpty]: Start isEmpty. Operand 275 states and 484 transitions. [2022-04-07 21:19:26,120 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:19:26,120 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:19:26,120 INFO L74 IsIncluded]: Start isIncluded. First operand has 201 states, 197 states have (on average 1.7461928934010151) internal successors, (344), 197 states have internal predecessors, (344), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 275 states. [2022-04-07 21:19:26,121 INFO L87 Difference]: Start difference. First operand has 201 states, 197 states have (on average 1.7461928934010151) internal successors, (344), 197 states have internal predecessors, (344), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 275 states. [2022-04-07 21:19:26,126 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:19:26,126 INFO L93 Difference]: Finished difference Result 275 states and 484 transitions. [2022-04-07 21:19:26,126 INFO L276 IsEmpty]: Start isEmpty. Operand 275 states and 484 transitions. [2022-04-07 21:19:26,126 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:19:26,126 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:19:26,126 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 21:19:26,126 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 21:19:26,127 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 201 states, 197 states have (on average 1.7461928934010151) internal successors, (344), 197 states have internal predecessors, (344), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:26,129 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 201 states to 201 states and 347 transitions. [2022-04-07 21:19:26,129 INFO L78 Accepts]: Start accepts. Automaton has 201 states and 347 transitions. Word has length 24 [2022-04-07 21:19:26,129 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 21:19:26,129 INFO L478 AbstractCegarLoop]: Abstraction has 201 states and 347 transitions. [2022-04-07 21:19:26,130 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 5.25) internal successors, (21), 3 states have internal predecessors, (21), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:26,130 INFO L276 IsEmpty]: Start isEmpty. Operand 201 states and 347 transitions. [2022-04-07 21:19:26,130 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2022-04-07 21:19:26,130 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 21:19:26,130 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 21:19:26,130 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2022-04-07 21:19:26,130 INFO L403 AbstractCegarLoop]: === Iteration 8 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 21:19:26,131 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 21:19:26,131 INFO L85 PathProgramCache]: Analyzing trace with hash -314735103, now seen corresponding path program 1 times [2022-04-07 21:19:26,131 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 21:19:26,131 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [813890670] [2022-04-07 21:19:26,131 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 21:19:26,131 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 21:19:26,144 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:19:26,157 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 21:19:26,158 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:19:26,160 INFO L290 TraceCheckUtils]: 0: Hoare triple {3849#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [222] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3843#true} is VALID [2022-04-07 21:19:26,160 INFO L290 TraceCheckUtils]: 1: Hoare triple {3843#true} [225] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3843#true} is VALID [2022-04-07 21:19:26,160 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {3843#true} {3843#true} [301] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3843#true} is VALID [2022-04-07 21:19:26,161 INFO L272 TraceCheckUtils]: 0: Hoare triple {3843#true} [220] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3849#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 21:19:26,161 INFO L290 TraceCheckUtils]: 1: Hoare triple {3849#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [222] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3843#true} is VALID [2022-04-07 21:19:26,161 INFO L290 TraceCheckUtils]: 2: Hoare triple {3843#true} [225] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3843#true} is VALID [2022-04-07 21:19:26,161 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3843#true} {3843#true} [301] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3843#true} is VALID [2022-04-07 21:19:26,161 INFO L272 TraceCheckUtils]: 4: Hoare triple {3843#true} [221] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3843#true} is VALID [2022-04-07 21:19:26,161 INFO L290 TraceCheckUtils]: 5: Hoare triple {3843#true} [224] mainENTRY-->L169-1: Formula: (and (= v_main_~p5~0_2 |v_main_#t~nondet8_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (= v_main_~p4~0_2 |v_main_#t~nondet7_2|)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~lk3~0=v_main_~lk3~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p2~0=v_main_~p2~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_2, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p5~0=v_main_~p5~0_2, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~lk4~0=v_main_~lk4~0_3, main_~p3~0=v_main_~p3~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet14, main_#t~nondet13, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {3843#true} is VALID [2022-04-07 21:19:26,161 INFO L290 TraceCheckUtils]: 6: Hoare triple {3843#true} [228] L169-1-->L46: Formula: (and (= |v_main_#t~nondet15_2| v_main_~cond~0_2) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet15=|v_main_#t~nondet15_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet15, main_~cond~0] {3843#true} is VALID [2022-04-07 21:19:26,162 INFO L290 TraceCheckUtils]: 7: Hoare triple {3843#true} [231] L46-->L73: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_3 0) (= v_main_~lk5~0_5 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0) (= v_main_~lk4~0_4 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk1~0=v_main_~lk1~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_5, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk4~0=v_main_~lk4~0_4, main_~lk6~0=v_main_~lk6~0_3, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk2~0, main_~lk3~0, main_~lk11~0, main_~lk1~0, main_~lk10~0, main_~lk5~0, main_~lk4~0, main_~lk6~0, main_~lk9~0, main_~lk8~0, main_~lk7~0] {3843#true} is VALID [2022-04-07 21:19:26,162 INFO L290 TraceCheckUtils]: 8: Hoare triple {3843#true} [234] L73-->L73-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {3843#true} is VALID [2022-04-07 21:19:26,162 INFO L290 TraceCheckUtils]: 9: Hoare triple {3843#true} [236] L73-2-->L77-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {3843#true} is VALID [2022-04-07 21:19:26,162 INFO L290 TraceCheckUtils]: 10: Hoare triple {3843#true} [238] L77-1-->L81-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {3848#(= main_~p3~0 0)} is VALID [2022-04-07 21:19:26,162 INFO L290 TraceCheckUtils]: 11: Hoare triple {3848#(= main_~p3~0 0)} [240] L81-1-->L85-1: Formula: (= v_main_~p4~0_4 0) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4} AuxVars[] AssignedVars[] {3848#(= main_~p3~0 0)} is VALID [2022-04-07 21:19:26,162 INFO L290 TraceCheckUtils]: 12: Hoare triple {3848#(= main_~p3~0 0)} [241] L85-1-->L89-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {3848#(= main_~p3~0 0)} is VALID [2022-04-07 21:19:26,163 INFO L290 TraceCheckUtils]: 13: Hoare triple {3848#(= main_~p3~0 0)} [243] L89-1-->L93-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {3848#(= main_~p3~0 0)} is VALID [2022-04-07 21:19:26,163 INFO L290 TraceCheckUtils]: 14: Hoare triple {3848#(= main_~p3~0 0)} [245] L93-1-->L97-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {3848#(= main_~p3~0 0)} is VALID [2022-04-07 21:19:26,163 INFO L290 TraceCheckUtils]: 15: Hoare triple {3848#(= main_~p3~0 0)} [247] L97-1-->L101-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {3848#(= main_~p3~0 0)} is VALID [2022-04-07 21:19:26,163 INFO L290 TraceCheckUtils]: 16: Hoare triple {3848#(= main_~p3~0 0)} [249] L101-1-->L105-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {3848#(= main_~p3~0 0)} is VALID [2022-04-07 21:19:26,164 INFO L290 TraceCheckUtils]: 17: Hoare triple {3848#(= main_~p3~0 0)} [251] L105-1-->L109-1: Formula: (and (= v_main_~lk10~0_6 1) (not (= v_main_~p10~0_4 0))) InVars {main_~p10~0=v_main_~p10~0_4} OutVars{main_~lk10~0=v_main_~lk10~0_6, main_~p10~0=v_main_~p10~0_4} AuxVars[] AssignedVars[main_~lk10~0] {3848#(= main_~p3~0 0)} is VALID [2022-04-07 21:19:26,164 INFO L290 TraceCheckUtils]: 18: Hoare triple {3848#(= main_~p3~0 0)} [253] L109-1-->L113-1: Formula: (and (= v_main_~lk11~0_6 1) (not (= v_main_~p11~0_4 0))) InVars {main_~p11~0=v_main_~p11~0_4} OutVars{main_~lk11~0=v_main_~lk11~0_6, main_~p11~0=v_main_~p11~0_4} AuxVars[] AssignedVars[main_~lk11~0] {3848#(= main_~p3~0 0)} is VALID [2022-04-07 21:19:26,164 INFO L290 TraceCheckUtils]: 19: Hoare triple {3848#(= main_~p3~0 0)} [256] L113-1-->L119-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {3848#(= main_~p3~0 0)} is VALID [2022-04-07 21:19:26,164 INFO L290 TraceCheckUtils]: 20: Hoare triple {3848#(= main_~p3~0 0)} [260] L119-1-->L124-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {3848#(= main_~p3~0 0)} is VALID [2022-04-07 21:19:26,165 INFO L290 TraceCheckUtils]: 21: Hoare triple {3848#(= main_~p3~0 0)} [265] L124-1-->L130: Formula: (not (= v_main_~p3~0_4 0)) InVars {main_~p3~0=v_main_~p3~0_4} OutVars{main_~p3~0=v_main_~p3~0_4} AuxVars[] AssignedVars[] {3844#false} is VALID [2022-04-07 21:19:26,165 INFO L290 TraceCheckUtils]: 22: Hoare triple {3844#false} [267] L130-->L170-1: Formula: (not (= v_main_~lk3~0_4 1)) InVars {main_~lk3~0=v_main_~lk3~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_4} AuxVars[] AssignedVars[] {3844#false} is VALID [2022-04-07 21:19:26,165 INFO L290 TraceCheckUtils]: 23: Hoare triple {3844#false} [261] L170-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3844#false} is VALID [2022-04-07 21:19:26,165 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 21:19:26,165 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 21:19:26,165 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [813890670] [2022-04-07 21:19:26,165 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [813890670] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 21:19:26,165 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 21:19:26,165 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-07 21:19:26,165 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [199492671] [2022-04-07 21:19:26,165 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 21:19:26,166 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.25) internal successors, (21), 3 states have internal predecessors, (21), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 24 [2022-04-07 21:19:26,166 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 21:19:26,166 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 5.25) internal successors, (21), 3 states have internal predecessors, (21), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:26,178 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 24 edges. 24 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:19:26,178 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-07 21:19:26,178 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 21:19:26,178 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-07 21:19:26,178 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-07 21:19:26,179 INFO L87 Difference]: Start difference. First operand 201 states and 347 transitions. Second operand has 4 states, 4 states have (on average 5.25) internal successors, (21), 3 states have internal predecessors, (21), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:26,331 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:19:26,331 INFO L93 Difference]: Finished difference Result 283 states and 484 transitions. [2022-04-07 21:19:26,331 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-07 21:19:26,331 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.25) internal successors, (21), 3 states have internal predecessors, (21), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 24 [2022-04-07 21:19:26,331 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 21:19:26,331 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.25) internal successors, (21), 3 states have internal predecessors, (21), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:26,332 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 137 transitions. [2022-04-07 21:19:26,332 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.25) internal successors, (21), 3 states have internal predecessors, (21), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:26,333 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 137 transitions. [2022-04-07 21:19:26,333 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 137 transitions. [2022-04-07 21:19:26,433 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 137 edges. 137 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:19:26,437 INFO L225 Difference]: With dead ends: 283 [2022-04-07 21:19:26,437 INFO L226 Difference]: Without dead ends: 283 [2022-04-07 21:19:26,437 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-07 21:19:26,438 INFO L913 BasicCegarLoop]: 100 mSDtfsCounter, 151 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 68 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 151 SdHoareTripleChecker+Valid, 107 SdHoareTripleChecker+Invalid, 71 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 68 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 21:19:26,438 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [151 Valid, 107 Invalid, 71 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 68 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 21:19:26,438 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 283 states. [2022-04-07 21:19:26,442 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 283 to 281. [2022-04-07 21:19:26,442 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 21:19:26,442 INFO L82 GeneralOperation]: Start isEquivalent. First operand 283 states. Second operand has 281 states, 277 states have (on average 1.7328519855595668) internal successors, (480), 277 states have internal predecessors, (480), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:26,443 INFO L74 IsIncluded]: Start isIncluded. First operand 283 states. Second operand has 281 states, 277 states have (on average 1.7328519855595668) internal successors, (480), 277 states have internal predecessors, (480), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:26,443 INFO L87 Difference]: Start difference. First operand 283 states. Second operand has 281 states, 277 states have (on average 1.7328519855595668) internal successors, (480), 277 states have internal predecessors, (480), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:26,447 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:19:26,448 INFO L93 Difference]: Finished difference Result 283 states and 484 transitions. [2022-04-07 21:19:26,448 INFO L276 IsEmpty]: Start isEmpty. Operand 283 states and 484 transitions. [2022-04-07 21:19:26,448 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:19:26,448 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:19:26,448 INFO L74 IsIncluded]: Start isIncluded. First operand has 281 states, 277 states have (on average 1.7328519855595668) internal successors, (480), 277 states have internal predecessors, (480), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 283 states. [2022-04-07 21:19:26,449 INFO L87 Difference]: Start difference. First operand has 281 states, 277 states have (on average 1.7328519855595668) internal successors, (480), 277 states have internal predecessors, (480), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 283 states. [2022-04-07 21:19:26,453 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:19:26,453 INFO L93 Difference]: Finished difference Result 283 states and 484 transitions. [2022-04-07 21:19:26,453 INFO L276 IsEmpty]: Start isEmpty. Operand 283 states and 484 transitions. [2022-04-07 21:19:26,453 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:19:26,453 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:19:26,453 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 21:19:26,453 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 21:19:26,454 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 281 states, 277 states have (on average 1.7328519855595668) internal successors, (480), 277 states have internal predecessors, (480), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:26,458 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 281 states to 281 states and 483 transitions. [2022-04-07 21:19:26,458 INFO L78 Accepts]: Start accepts. Automaton has 281 states and 483 transitions. Word has length 24 [2022-04-07 21:19:26,458 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 21:19:26,458 INFO L478 AbstractCegarLoop]: Abstraction has 281 states and 483 transitions. [2022-04-07 21:19:26,458 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 5.25) internal successors, (21), 3 states have internal predecessors, (21), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:26,458 INFO L276 IsEmpty]: Start isEmpty. Operand 281 states and 483 transitions. [2022-04-07 21:19:26,459 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2022-04-07 21:19:26,459 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 21:19:26,459 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 21:19:26,459 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2022-04-07 21:19:26,459 INFO L403 AbstractCegarLoop]: === Iteration 9 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 21:19:26,459 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 21:19:26,459 INFO L85 PathProgramCache]: Analyzing trace with hash 1620594170, now seen corresponding path program 1 times [2022-04-07 21:19:26,459 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 21:19:26,459 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2001799488] [2022-04-07 21:19:26,459 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 21:19:26,460 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 21:19:26,475 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:19:26,487 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 21:19:26,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:19:26,491 INFO L290 TraceCheckUtils]: 0: Hoare triple {4991#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [222] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4985#true} is VALID [2022-04-07 21:19:26,491 INFO L290 TraceCheckUtils]: 1: Hoare triple {4985#true} [225] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4985#true} is VALID [2022-04-07 21:19:26,491 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {4985#true} {4985#true} [301] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4985#true} is VALID [2022-04-07 21:19:26,491 INFO L272 TraceCheckUtils]: 0: Hoare triple {4985#true} [220] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4991#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 21:19:26,491 INFO L290 TraceCheckUtils]: 1: Hoare triple {4991#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [222] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4985#true} is VALID [2022-04-07 21:19:26,492 INFO L290 TraceCheckUtils]: 2: Hoare triple {4985#true} [225] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4985#true} is VALID [2022-04-07 21:19:26,492 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4985#true} {4985#true} [301] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4985#true} is VALID [2022-04-07 21:19:26,492 INFO L272 TraceCheckUtils]: 4: Hoare triple {4985#true} [221] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4985#true} is VALID [2022-04-07 21:19:26,492 INFO L290 TraceCheckUtils]: 5: Hoare triple {4985#true} [224] mainENTRY-->L169-1: Formula: (and (= v_main_~p5~0_2 |v_main_#t~nondet8_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (= v_main_~p4~0_2 |v_main_#t~nondet7_2|)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~lk3~0=v_main_~lk3~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p2~0=v_main_~p2~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_2, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p5~0=v_main_~p5~0_2, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~lk4~0=v_main_~lk4~0_3, main_~p3~0=v_main_~p3~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet14, main_#t~nondet13, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {4985#true} is VALID [2022-04-07 21:19:26,492 INFO L290 TraceCheckUtils]: 6: Hoare triple {4985#true} [228] L169-1-->L46: Formula: (and (= |v_main_#t~nondet15_2| v_main_~cond~0_2) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet15=|v_main_#t~nondet15_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet15, main_~cond~0] {4985#true} is VALID [2022-04-07 21:19:26,492 INFO L290 TraceCheckUtils]: 7: Hoare triple {4985#true} [231] L46-->L73: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_3 0) (= v_main_~lk5~0_5 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0) (= v_main_~lk4~0_4 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk1~0=v_main_~lk1~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_5, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk4~0=v_main_~lk4~0_4, main_~lk6~0=v_main_~lk6~0_3, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk2~0, main_~lk3~0, main_~lk11~0, main_~lk1~0, main_~lk10~0, main_~lk5~0, main_~lk4~0, main_~lk6~0, main_~lk9~0, main_~lk8~0, main_~lk7~0] {4985#true} is VALID [2022-04-07 21:19:26,492 INFO L290 TraceCheckUtils]: 8: Hoare triple {4985#true} [234] L73-->L73-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {4985#true} is VALID [2022-04-07 21:19:26,492 INFO L290 TraceCheckUtils]: 9: Hoare triple {4985#true} [236] L73-2-->L77-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {4985#true} is VALID [2022-04-07 21:19:26,493 INFO L290 TraceCheckUtils]: 10: Hoare triple {4985#true} [237] L77-1-->L81-1: Formula: (and (not (= v_main_~p3~0_2 0)) (= v_main_~lk3~0_3 1)) InVars {main_~p3~0=v_main_~p3~0_2} OutVars{main_~p3~0=v_main_~p3~0_2, main_~lk3~0=v_main_~lk3~0_3} AuxVars[] AssignedVars[main_~lk3~0] {4990#(not (= main_~p3~0 0))} is VALID [2022-04-07 21:19:26,493 INFO L290 TraceCheckUtils]: 11: Hoare triple {4990#(not (= main_~p3~0 0))} [240] L81-1-->L85-1: Formula: (= v_main_~p4~0_4 0) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4} AuxVars[] AssignedVars[] {4990#(not (= main_~p3~0 0))} is VALID [2022-04-07 21:19:26,493 INFO L290 TraceCheckUtils]: 12: Hoare triple {4990#(not (= main_~p3~0 0))} [241] L85-1-->L89-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {4990#(not (= main_~p3~0 0))} is VALID [2022-04-07 21:19:26,493 INFO L290 TraceCheckUtils]: 13: Hoare triple {4990#(not (= main_~p3~0 0))} [243] L89-1-->L93-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {4990#(not (= main_~p3~0 0))} is VALID [2022-04-07 21:19:26,494 INFO L290 TraceCheckUtils]: 14: Hoare triple {4990#(not (= main_~p3~0 0))} [245] L93-1-->L97-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {4990#(not (= main_~p3~0 0))} is VALID [2022-04-07 21:19:26,494 INFO L290 TraceCheckUtils]: 15: Hoare triple {4990#(not (= main_~p3~0 0))} [247] L97-1-->L101-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {4990#(not (= main_~p3~0 0))} is VALID [2022-04-07 21:19:26,494 INFO L290 TraceCheckUtils]: 16: Hoare triple {4990#(not (= main_~p3~0 0))} [249] L101-1-->L105-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {4990#(not (= main_~p3~0 0))} is VALID [2022-04-07 21:19:26,494 INFO L290 TraceCheckUtils]: 17: Hoare triple {4990#(not (= main_~p3~0 0))} [251] L105-1-->L109-1: Formula: (and (= v_main_~lk10~0_6 1) (not (= v_main_~p10~0_4 0))) InVars {main_~p10~0=v_main_~p10~0_4} OutVars{main_~lk10~0=v_main_~lk10~0_6, main_~p10~0=v_main_~p10~0_4} AuxVars[] AssignedVars[main_~lk10~0] {4990#(not (= main_~p3~0 0))} is VALID [2022-04-07 21:19:26,495 INFO L290 TraceCheckUtils]: 18: Hoare triple {4990#(not (= main_~p3~0 0))} [253] L109-1-->L113-1: Formula: (and (= v_main_~lk11~0_6 1) (not (= v_main_~p11~0_4 0))) InVars {main_~p11~0=v_main_~p11~0_4} OutVars{main_~lk11~0=v_main_~lk11~0_6, main_~p11~0=v_main_~p11~0_4} AuxVars[] AssignedVars[main_~lk11~0] {4990#(not (= main_~p3~0 0))} is VALID [2022-04-07 21:19:26,495 INFO L290 TraceCheckUtils]: 19: Hoare triple {4990#(not (= main_~p3~0 0))} [256] L113-1-->L119-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {4990#(not (= main_~p3~0 0))} is VALID [2022-04-07 21:19:26,495 INFO L290 TraceCheckUtils]: 20: Hoare triple {4990#(not (= main_~p3~0 0))} [260] L119-1-->L124-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {4990#(not (= main_~p3~0 0))} is VALID [2022-04-07 21:19:26,495 INFO L290 TraceCheckUtils]: 21: Hoare triple {4990#(not (= main_~p3~0 0))} [266] L124-1-->L129-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {4986#false} is VALID [2022-04-07 21:19:26,496 INFO L290 TraceCheckUtils]: 22: Hoare triple {4986#false} [269] L129-1-->L135: Formula: (not (= v_main_~p4~0_5 0)) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {4986#false} is VALID [2022-04-07 21:19:26,496 INFO L290 TraceCheckUtils]: 23: Hoare triple {4986#false} [271] L135-->L170-1: Formula: (not (= v_main_~lk4~0_6 1)) InVars {main_~lk4~0=v_main_~lk4~0_6} OutVars{main_~lk4~0=v_main_~lk4~0_6} AuxVars[] AssignedVars[] {4986#false} is VALID [2022-04-07 21:19:26,496 INFO L290 TraceCheckUtils]: 24: Hoare triple {4986#false} [261] L170-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4986#false} is VALID [2022-04-07 21:19:26,496 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 21:19:26,496 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 21:19:26,496 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2001799488] [2022-04-07 21:19:26,496 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2001799488] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 21:19:26,496 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 21:19:26,496 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-07 21:19:26,496 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [875972935] [2022-04-07 21:19:26,496 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 21:19:26,497 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-07 21:19:26,497 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 21:19:26,497 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:26,509 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 25 edges. 25 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:19:26,509 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-07 21:19:26,509 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 21:19:26,510 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-07 21:19:26,510 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-07 21:19:26,510 INFO L87 Difference]: Start difference. First operand 281 states and 483 transitions. Second operand has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:26,645 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:19:26,645 INFO L93 Difference]: Finished difference Result 287 states and 484 transitions. [2022-04-07 21:19:26,645 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-07 21:19:26,646 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-07 21:19:26,646 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 21:19:26,646 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:26,647 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 136 transitions. [2022-04-07 21:19:26,647 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:26,647 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 136 transitions. [2022-04-07 21:19:26,648 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 136 transitions. [2022-04-07 21:19:26,733 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 136 edges. 136 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:19:26,737 INFO L225 Difference]: With dead ends: 287 [2022-04-07 21:19:26,737 INFO L226 Difference]: Without dead ends: 287 [2022-04-07 21:19:26,737 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-07 21:19:26,737 INFO L913 BasicCegarLoop]: 110 mSDtfsCounter, 142 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 67 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 142 SdHoareTripleChecker+Valid, 117 SdHoareTripleChecker+Invalid, 69 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 67 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 21:19:26,738 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [142 Valid, 117 Invalid, 69 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 67 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 21:19:26,738 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 287 states. [2022-04-07 21:19:26,741 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 287 to 285. [2022-04-07 21:19:26,741 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 21:19:26,741 INFO L82 GeneralOperation]: Start isEquivalent. First operand 287 states. Second operand has 285 states, 281 states have (on average 1.708185053380783) internal successors, (480), 281 states have internal predecessors, (480), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:26,742 INFO L74 IsIncluded]: Start isIncluded. First operand 287 states. Second operand has 285 states, 281 states have (on average 1.708185053380783) internal successors, (480), 281 states have internal predecessors, (480), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:26,742 INFO L87 Difference]: Start difference. First operand 287 states. Second operand has 285 states, 281 states have (on average 1.708185053380783) internal successors, (480), 281 states have internal predecessors, (480), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:26,746 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:19:26,746 INFO L93 Difference]: Finished difference Result 287 states and 484 transitions. [2022-04-07 21:19:26,746 INFO L276 IsEmpty]: Start isEmpty. Operand 287 states and 484 transitions. [2022-04-07 21:19:26,747 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:19:26,747 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:19:26,747 INFO L74 IsIncluded]: Start isIncluded. First operand has 285 states, 281 states have (on average 1.708185053380783) internal successors, (480), 281 states have internal predecessors, (480), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 287 states. [2022-04-07 21:19:26,747 INFO L87 Difference]: Start difference. First operand has 285 states, 281 states have (on average 1.708185053380783) internal successors, (480), 281 states have internal predecessors, (480), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 287 states. [2022-04-07 21:19:26,751 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:19:26,751 INFO L93 Difference]: Finished difference Result 287 states and 484 transitions. [2022-04-07 21:19:26,751 INFO L276 IsEmpty]: Start isEmpty. Operand 287 states and 484 transitions. [2022-04-07 21:19:26,752 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:19:26,752 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:19:26,752 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 21:19:26,752 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 21:19:26,752 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 285 states, 281 states have (on average 1.708185053380783) internal successors, (480), 281 states have internal predecessors, (480), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:26,756 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 285 states to 285 states and 483 transitions. [2022-04-07 21:19:26,756 INFO L78 Accepts]: Start accepts. Automaton has 285 states and 483 transitions. Word has length 25 [2022-04-07 21:19:26,756 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 21:19:26,756 INFO L478 AbstractCegarLoop]: Abstraction has 285 states and 483 transitions. [2022-04-07 21:19:26,756 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:26,756 INFO L276 IsEmpty]: Start isEmpty. Operand 285 states and 483 transitions. [2022-04-07 21:19:26,757 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2022-04-07 21:19:26,757 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 21:19:26,757 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 21:19:26,757 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2022-04-07 21:19:26,757 INFO L403 AbstractCegarLoop]: === Iteration 10 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 21:19:26,757 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 21:19:26,757 INFO L85 PathProgramCache]: Analyzing trace with hash -1166821317, now seen corresponding path program 1 times [2022-04-07 21:19:26,757 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 21:19:26,757 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [68468005] [2022-04-07 21:19:26,758 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 21:19:26,758 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 21:19:26,769 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:19:26,781 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 21:19:26,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:19:26,784 INFO L290 TraceCheckUtils]: 0: Hoare triple {6149#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [222] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6143#true} is VALID [2022-04-07 21:19:26,784 INFO L290 TraceCheckUtils]: 1: Hoare triple {6143#true} [225] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6143#true} is VALID [2022-04-07 21:19:26,784 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {6143#true} {6143#true} [301] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6143#true} is VALID [2022-04-07 21:19:26,786 INFO L272 TraceCheckUtils]: 0: Hoare triple {6143#true} [220] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6149#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 21:19:26,786 INFO L290 TraceCheckUtils]: 1: Hoare triple {6149#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [222] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6143#true} is VALID [2022-04-07 21:19:26,786 INFO L290 TraceCheckUtils]: 2: Hoare triple {6143#true} [225] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6143#true} is VALID [2022-04-07 21:19:26,786 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6143#true} {6143#true} [301] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6143#true} is VALID [2022-04-07 21:19:26,786 INFO L272 TraceCheckUtils]: 4: Hoare triple {6143#true} [221] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6143#true} is VALID [2022-04-07 21:19:26,786 INFO L290 TraceCheckUtils]: 5: Hoare triple {6143#true} [224] mainENTRY-->L169-1: Formula: (and (= v_main_~p5~0_2 |v_main_#t~nondet8_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (= v_main_~p4~0_2 |v_main_#t~nondet7_2|)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~lk3~0=v_main_~lk3~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p2~0=v_main_~p2~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_2, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p5~0=v_main_~p5~0_2, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~lk4~0=v_main_~lk4~0_3, main_~p3~0=v_main_~p3~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet14, main_#t~nondet13, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {6143#true} is VALID [2022-04-07 21:19:26,786 INFO L290 TraceCheckUtils]: 6: Hoare triple {6143#true} [228] L169-1-->L46: Formula: (and (= |v_main_#t~nondet15_2| v_main_~cond~0_2) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet15=|v_main_#t~nondet15_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet15, main_~cond~0] {6143#true} is VALID [2022-04-07 21:19:26,786 INFO L290 TraceCheckUtils]: 7: Hoare triple {6143#true} [231] L46-->L73: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_3 0) (= v_main_~lk5~0_5 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0) (= v_main_~lk4~0_4 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk1~0=v_main_~lk1~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_5, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk4~0=v_main_~lk4~0_4, main_~lk6~0=v_main_~lk6~0_3, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk2~0, main_~lk3~0, main_~lk11~0, main_~lk1~0, main_~lk10~0, main_~lk5~0, main_~lk4~0, main_~lk6~0, main_~lk9~0, main_~lk8~0, main_~lk7~0] {6143#true} is VALID [2022-04-07 21:19:26,787 INFO L290 TraceCheckUtils]: 8: Hoare triple {6143#true} [234] L73-->L73-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {6143#true} is VALID [2022-04-07 21:19:26,787 INFO L290 TraceCheckUtils]: 9: Hoare triple {6143#true} [236] L73-2-->L77-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {6143#true} is VALID [2022-04-07 21:19:26,787 INFO L290 TraceCheckUtils]: 10: Hoare triple {6143#true} [238] L77-1-->L81-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {6143#true} is VALID [2022-04-07 21:19:26,788 INFO L290 TraceCheckUtils]: 11: Hoare triple {6143#true} [240] L81-1-->L85-1: Formula: (= v_main_~p4~0_4 0) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4} AuxVars[] AssignedVars[] {6148#(= main_~p4~0 0)} is VALID [2022-04-07 21:19:26,788 INFO L290 TraceCheckUtils]: 12: Hoare triple {6148#(= main_~p4~0 0)} [241] L85-1-->L89-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {6148#(= main_~p4~0 0)} is VALID [2022-04-07 21:19:26,789 INFO L290 TraceCheckUtils]: 13: Hoare triple {6148#(= main_~p4~0 0)} [243] L89-1-->L93-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {6148#(= main_~p4~0 0)} is VALID [2022-04-07 21:19:26,789 INFO L290 TraceCheckUtils]: 14: Hoare triple {6148#(= main_~p4~0 0)} [245] L93-1-->L97-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {6148#(= main_~p4~0 0)} is VALID [2022-04-07 21:19:26,789 INFO L290 TraceCheckUtils]: 15: Hoare triple {6148#(= main_~p4~0 0)} [247] L97-1-->L101-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {6148#(= main_~p4~0 0)} is VALID [2022-04-07 21:19:26,789 INFO L290 TraceCheckUtils]: 16: Hoare triple {6148#(= main_~p4~0 0)} [249] L101-1-->L105-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {6148#(= main_~p4~0 0)} is VALID [2022-04-07 21:19:26,790 INFO L290 TraceCheckUtils]: 17: Hoare triple {6148#(= main_~p4~0 0)} [251] L105-1-->L109-1: Formula: (and (= v_main_~lk10~0_6 1) (not (= v_main_~p10~0_4 0))) InVars {main_~p10~0=v_main_~p10~0_4} OutVars{main_~lk10~0=v_main_~lk10~0_6, main_~p10~0=v_main_~p10~0_4} AuxVars[] AssignedVars[main_~lk10~0] {6148#(= main_~p4~0 0)} is VALID [2022-04-07 21:19:26,790 INFO L290 TraceCheckUtils]: 18: Hoare triple {6148#(= main_~p4~0 0)} [253] L109-1-->L113-1: Formula: (and (= v_main_~lk11~0_6 1) (not (= v_main_~p11~0_4 0))) InVars {main_~p11~0=v_main_~p11~0_4} OutVars{main_~lk11~0=v_main_~lk11~0_6, main_~p11~0=v_main_~p11~0_4} AuxVars[] AssignedVars[main_~lk11~0] {6148#(= main_~p4~0 0)} is VALID [2022-04-07 21:19:26,790 INFO L290 TraceCheckUtils]: 19: Hoare triple {6148#(= main_~p4~0 0)} [256] L113-1-->L119-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {6148#(= main_~p4~0 0)} is VALID [2022-04-07 21:19:26,790 INFO L290 TraceCheckUtils]: 20: Hoare triple {6148#(= main_~p4~0 0)} [260] L119-1-->L124-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {6148#(= main_~p4~0 0)} is VALID [2022-04-07 21:19:26,791 INFO L290 TraceCheckUtils]: 21: Hoare triple {6148#(= main_~p4~0 0)} [266] L124-1-->L129-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {6148#(= main_~p4~0 0)} is VALID [2022-04-07 21:19:26,791 INFO L290 TraceCheckUtils]: 22: Hoare triple {6148#(= main_~p4~0 0)} [269] L129-1-->L135: Formula: (not (= v_main_~p4~0_5 0)) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {6144#false} is VALID [2022-04-07 21:19:26,791 INFO L290 TraceCheckUtils]: 23: Hoare triple {6144#false} [271] L135-->L170-1: Formula: (not (= v_main_~lk4~0_6 1)) InVars {main_~lk4~0=v_main_~lk4~0_6} OutVars{main_~lk4~0=v_main_~lk4~0_6} AuxVars[] AssignedVars[] {6144#false} is VALID [2022-04-07 21:19:26,791 INFO L290 TraceCheckUtils]: 24: Hoare triple {6144#false} [261] L170-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6144#false} is VALID [2022-04-07 21:19:26,791 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 21:19:26,791 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 21:19:26,791 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [68468005] [2022-04-07 21:19:26,791 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [68468005] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 21:19:26,791 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 21:19:26,791 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-07 21:19:26,792 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2017862147] [2022-04-07 21:19:26,792 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 21:19:26,792 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-07 21:19:26,792 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 21:19:26,792 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:26,804 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 25 edges. 25 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:19:26,804 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-07 21:19:26,804 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 21:19:26,805 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-07 21:19:26,805 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-07 21:19:26,805 INFO L87 Difference]: Start difference. First operand 285 states and 483 transitions. Second operand has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:26,949 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:19:26,949 INFO L93 Difference]: Finished difference Result 547 states and 912 transitions. [2022-04-07 21:19:26,950 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-07 21:19:26,950 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-07 21:19:26,950 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 21:19:26,950 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:26,951 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 136 transitions. [2022-04-07 21:19:26,951 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:26,952 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 136 transitions. [2022-04-07 21:19:26,952 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 136 transitions. [2022-04-07 21:19:27,034 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 136 edges. 136 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:19:27,044 INFO L225 Difference]: With dead ends: 547 [2022-04-07 21:19:27,070 INFO L226 Difference]: Without dead ends: 547 [2022-04-07 21:19:27,070 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-07 21:19:27,070 INFO L913 BasicCegarLoop]: 80 mSDtfsCounter, 170 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 68 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 170 SdHoareTripleChecker+Valid, 87 SdHoareTripleChecker+Invalid, 71 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 68 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 21:19:27,071 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [170 Valid, 87 Invalid, 71 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 68 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 21:19:27,071 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 547 states. [2022-04-07 21:19:27,076 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 547 to 545. [2022-04-07 21:19:27,076 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 21:19:27,077 INFO L82 GeneralOperation]: Start isEquivalent. First operand 547 states. Second operand has 545 states, 541 states have (on average 1.6783733826247689) internal successors, (908), 541 states have internal predecessors, (908), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:27,078 INFO L74 IsIncluded]: Start isIncluded. First operand 547 states. Second operand has 545 states, 541 states have (on average 1.6783733826247689) internal successors, (908), 541 states have internal predecessors, (908), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:27,078 INFO L87 Difference]: Start difference. First operand 547 states. Second operand has 545 states, 541 states have (on average 1.6783733826247689) internal successors, (908), 541 states have internal predecessors, (908), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:27,089 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:19:27,089 INFO L93 Difference]: Finished difference Result 547 states and 912 transitions. [2022-04-07 21:19:27,089 INFO L276 IsEmpty]: Start isEmpty. Operand 547 states and 912 transitions. [2022-04-07 21:19:27,090 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:19:27,090 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:19:27,091 INFO L74 IsIncluded]: Start isIncluded. First operand has 545 states, 541 states have (on average 1.6783733826247689) internal successors, (908), 541 states have internal predecessors, (908), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 547 states. [2022-04-07 21:19:27,091 INFO L87 Difference]: Start difference. First operand has 545 states, 541 states have (on average 1.6783733826247689) internal successors, (908), 541 states have internal predecessors, (908), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 547 states. [2022-04-07 21:19:27,102 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:19:27,102 INFO L93 Difference]: Finished difference Result 547 states and 912 transitions. [2022-04-07 21:19:27,103 INFO L276 IsEmpty]: Start isEmpty. Operand 547 states and 912 transitions. [2022-04-07 21:19:27,103 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:19:27,103 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:19:27,103 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 21:19:27,103 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 21:19:27,104 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 545 states, 541 states have (on average 1.6783733826247689) internal successors, (908), 541 states have internal predecessors, (908), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:27,115 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 545 states to 545 states and 911 transitions. [2022-04-07 21:19:27,115 INFO L78 Accepts]: Start accepts. Automaton has 545 states and 911 transitions. Word has length 25 [2022-04-07 21:19:27,115 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 21:19:27,115 INFO L478 AbstractCegarLoop]: Abstraction has 545 states and 911 transitions. [2022-04-07 21:19:27,115 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:27,115 INFO L276 IsEmpty]: Start isEmpty. Operand 545 states and 911 transitions. [2022-04-07 21:19:27,116 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2022-04-07 21:19:27,116 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 21:19:27,116 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 21:19:27,116 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2022-04-07 21:19:27,116 INFO L403 AbstractCegarLoop]: === Iteration 11 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 21:19:27,116 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 21:19:27,116 INFO L85 PathProgramCache]: Analyzing trace with hash -661262692, now seen corresponding path program 1 times [2022-04-07 21:19:27,117 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 21:19:27,117 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1530659891] [2022-04-07 21:19:27,117 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 21:19:27,117 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 21:19:27,137 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:19:27,158 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 21:19:27,160 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:19:27,165 INFO L290 TraceCheckUtils]: 0: Hoare triple {8347#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [222] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {8341#true} is VALID [2022-04-07 21:19:27,165 INFO L290 TraceCheckUtils]: 1: Hoare triple {8341#true} [225] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8341#true} is VALID [2022-04-07 21:19:27,166 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {8341#true} {8341#true} [301] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8341#true} is VALID [2022-04-07 21:19:27,166 INFO L272 TraceCheckUtils]: 0: Hoare triple {8341#true} [220] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8347#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 21:19:27,166 INFO L290 TraceCheckUtils]: 1: Hoare triple {8347#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [222] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {8341#true} is VALID [2022-04-07 21:19:27,166 INFO L290 TraceCheckUtils]: 2: Hoare triple {8341#true} [225] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8341#true} is VALID [2022-04-07 21:19:27,166 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8341#true} {8341#true} [301] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8341#true} is VALID [2022-04-07 21:19:27,166 INFO L272 TraceCheckUtils]: 4: Hoare triple {8341#true} [221] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8341#true} is VALID [2022-04-07 21:19:27,167 INFO L290 TraceCheckUtils]: 5: Hoare triple {8341#true} [224] mainENTRY-->L169-1: Formula: (and (= v_main_~p5~0_2 |v_main_#t~nondet8_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (= v_main_~p4~0_2 |v_main_#t~nondet7_2|)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~lk3~0=v_main_~lk3~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p2~0=v_main_~p2~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_2, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p5~0=v_main_~p5~0_2, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~lk4~0=v_main_~lk4~0_3, main_~p3~0=v_main_~p3~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet14, main_#t~nondet13, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {8341#true} is VALID [2022-04-07 21:19:27,167 INFO L290 TraceCheckUtils]: 6: Hoare triple {8341#true} [228] L169-1-->L46: Formula: (and (= |v_main_#t~nondet15_2| v_main_~cond~0_2) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet15=|v_main_#t~nondet15_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet15, main_~cond~0] {8341#true} is VALID [2022-04-07 21:19:27,167 INFO L290 TraceCheckUtils]: 7: Hoare triple {8341#true} [231] L46-->L73: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_3 0) (= v_main_~lk5~0_5 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0) (= v_main_~lk4~0_4 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk1~0=v_main_~lk1~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_5, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk4~0=v_main_~lk4~0_4, main_~lk6~0=v_main_~lk6~0_3, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk2~0, main_~lk3~0, main_~lk11~0, main_~lk1~0, main_~lk10~0, main_~lk5~0, main_~lk4~0, main_~lk6~0, main_~lk9~0, main_~lk8~0, main_~lk7~0] {8341#true} is VALID [2022-04-07 21:19:27,167 INFO L290 TraceCheckUtils]: 8: Hoare triple {8341#true} [234] L73-->L73-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {8341#true} is VALID [2022-04-07 21:19:27,167 INFO L290 TraceCheckUtils]: 9: Hoare triple {8341#true} [236] L73-2-->L77-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {8341#true} is VALID [2022-04-07 21:19:27,167 INFO L290 TraceCheckUtils]: 10: Hoare triple {8341#true} [238] L77-1-->L81-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {8341#true} is VALID [2022-04-07 21:19:27,167 INFO L290 TraceCheckUtils]: 11: Hoare triple {8341#true} [239] L81-1-->L85-1: Formula: (and (= v_main_~lk4~0_5 1) (not (= v_main_~p4~0_3 0))) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3, main_~lk4~0=v_main_~lk4~0_5} AuxVars[] AssignedVars[main_~lk4~0] {8346#(= main_~lk4~0 1)} is VALID [2022-04-07 21:19:27,167 INFO L290 TraceCheckUtils]: 12: Hoare triple {8346#(= main_~lk4~0 1)} [241] L85-1-->L89-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {8346#(= main_~lk4~0 1)} is VALID [2022-04-07 21:19:27,168 INFO L290 TraceCheckUtils]: 13: Hoare triple {8346#(= main_~lk4~0 1)} [243] L89-1-->L93-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {8346#(= main_~lk4~0 1)} is VALID [2022-04-07 21:19:27,168 INFO L290 TraceCheckUtils]: 14: Hoare triple {8346#(= main_~lk4~0 1)} [245] L93-1-->L97-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {8346#(= main_~lk4~0 1)} is VALID [2022-04-07 21:19:27,168 INFO L290 TraceCheckUtils]: 15: Hoare triple {8346#(= main_~lk4~0 1)} [247] L97-1-->L101-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {8346#(= main_~lk4~0 1)} is VALID [2022-04-07 21:19:27,168 INFO L290 TraceCheckUtils]: 16: Hoare triple {8346#(= main_~lk4~0 1)} [249] L101-1-->L105-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {8346#(= main_~lk4~0 1)} is VALID [2022-04-07 21:19:27,169 INFO L290 TraceCheckUtils]: 17: Hoare triple {8346#(= main_~lk4~0 1)} [251] L105-1-->L109-1: Formula: (and (= v_main_~lk10~0_6 1) (not (= v_main_~p10~0_4 0))) InVars {main_~p10~0=v_main_~p10~0_4} OutVars{main_~lk10~0=v_main_~lk10~0_6, main_~p10~0=v_main_~p10~0_4} AuxVars[] AssignedVars[main_~lk10~0] {8346#(= main_~lk4~0 1)} is VALID [2022-04-07 21:19:27,169 INFO L290 TraceCheckUtils]: 18: Hoare triple {8346#(= main_~lk4~0 1)} [253] L109-1-->L113-1: Formula: (and (= v_main_~lk11~0_6 1) (not (= v_main_~p11~0_4 0))) InVars {main_~p11~0=v_main_~p11~0_4} OutVars{main_~lk11~0=v_main_~lk11~0_6, main_~p11~0=v_main_~p11~0_4} AuxVars[] AssignedVars[main_~lk11~0] {8346#(= main_~lk4~0 1)} is VALID [2022-04-07 21:19:27,169 INFO L290 TraceCheckUtils]: 19: Hoare triple {8346#(= main_~lk4~0 1)} [256] L113-1-->L119-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {8346#(= main_~lk4~0 1)} is VALID [2022-04-07 21:19:27,169 INFO L290 TraceCheckUtils]: 20: Hoare triple {8346#(= main_~lk4~0 1)} [260] L119-1-->L124-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {8346#(= main_~lk4~0 1)} is VALID [2022-04-07 21:19:27,170 INFO L290 TraceCheckUtils]: 21: Hoare triple {8346#(= main_~lk4~0 1)} [266] L124-1-->L129-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {8346#(= main_~lk4~0 1)} is VALID [2022-04-07 21:19:27,170 INFO L290 TraceCheckUtils]: 22: Hoare triple {8346#(= main_~lk4~0 1)} [269] L129-1-->L135: Formula: (not (= v_main_~p4~0_5 0)) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {8346#(= main_~lk4~0 1)} is VALID [2022-04-07 21:19:27,170 INFO L290 TraceCheckUtils]: 23: Hoare triple {8346#(= main_~lk4~0 1)} [271] L135-->L170-1: Formula: (not (= v_main_~lk4~0_6 1)) InVars {main_~lk4~0=v_main_~lk4~0_6} OutVars{main_~lk4~0=v_main_~lk4~0_6} AuxVars[] AssignedVars[] {8342#false} is VALID [2022-04-07 21:19:27,170 INFO L290 TraceCheckUtils]: 24: Hoare triple {8342#false} [261] L170-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8342#false} is VALID [2022-04-07 21:19:27,172 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 21:19:27,172 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 21:19:27,172 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1530659891] [2022-04-07 21:19:27,172 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1530659891] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 21:19:27,172 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 21:19:27,172 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-07 21:19:27,172 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1244758992] [2022-04-07 21:19:27,172 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 21:19:27,173 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-07 21:19:27,173 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 21:19:27,173 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:27,185 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 25 edges. 25 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:19:27,185 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-07 21:19:27,186 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 21:19:27,186 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-07 21:19:27,186 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-07 21:19:27,186 INFO L87 Difference]: Start difference. First operand 545 states and 911 transitions. Second operand has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:27,331 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:19:27,331 INFO L93 Difference]: Finished difference Result 675 states and 1144 transitions. [2022-04-07 21:19:27,331 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-07 21:19:27,331 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-07 21:19:27,332 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 21:19:27,332 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:27,333 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 127 transitions. [2022-04-07 21:19:27,333 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:27,334 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 127 transitions. [2022-04-07 21:19:27,334 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 127 transitions. [2022-04-07 21:19:27,408 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 127 edges. 127 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:19:27,421 INFO L225 Difference]: With dead ends: 675 [2022-04-07 21:19:27,422 INFO L226 Difference]: Without dead ends: 675 [2022-04-07 21:19:27,422 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-07 21:19:27,423 INFO L913 BasicCegarLoop]: 125 mSDtfsCounter, 109 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 67 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 109 SdHoareTripleChecker+Valid, 132 SdHoareTripleChecker+Invalid, 69 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 67 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 21:19:27,423 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [109 Valid, 132 Invalid, 69 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 67 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 21:19:27,424 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 675 states. [2022-04-07 21:19:27,429 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 675 to 545. [2022-04-07 21:19:27,429 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 21:19:27,430 INFO L82 GeneralOperation]: Start isEquivalent. First operand 675 states. Second operand has 545 states, 541 states have (on average 1.6635859519408502) internal successors, (900), 541 states have internal predecessors, (900), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:27,441 INFO L74 IsIncluded]: Start isIncluded. First operand 675 states. Second operand has 545 states, 541 states have (on average 1.6635859519408502) internal successors, (900), 541 states have internal predecessors, (900), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:27,442 INFO L87 Difference]: Start difference. First operand 675 states. Second operand has 545 states, 541 states have (on average 1.6635859519408502) internal successors, (900), 541 states have internal predecessors, (900), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:27,458 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:19:27,458 INFO L93 Difference]: Finished difference Result 675 states and 1144 transitions. [2022-04-07 21:19:27,458 INFO L276 IsEmpty]: Start isEmpty. Operand 675 states and 1144 transitions. [2022-04-07 21:19:27,459 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:19:27,459 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:19:27,460 INFO L74 IsIncluded]: Start isIncluded. First operand has 545 states, 541 states have (on average 1.6635859519408502) internal successors, (900), 541 states have internal predecessors, (900), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 675 states. [2022-04-07 21:19:27,461 INFO L87 Difference]: Start difference. First operand has 545 states, 541 states have (on average 1.6635859519408502) internal successors, (900), 541 states have internal predecessors, (900), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 675 states. [2022-04-07 21:19:27,476 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:19:27,476 INFO L93 Difference]: Finished difference Result 675 states and 1144 transitions. [2022-04-07 21:19:27,477 INFO L276 IsEmpty]: Start isEmpty. Operand 675 states and 1144 transitions. [2022-04-07 21:19:27,477 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:19:27,477 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:19:27,477 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 21:19:27,477 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 21:19:27,478 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 545 states, 541 states have (on average 1.6635859519408502) internal successors, (900), 541 states have internal predecessors, (900), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:27,489 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 545 states to 545 states and 903 transitions. [2022-04-07 21:19:27,489 INFO L78 Accepts]: Start accepts. Automaton has 545 states and 903 transitions. Word has length 25 [2022-04-07 21:19:27,489 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 21:19:27,489 INFO L478 AbstractCegarLoop]: Abstraction has 545 states and 903 transitions. [2022-04-07 21:19:27,490 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:27,490 INFO L276 IsEmpty]: Start isEmpty. Operand 545 states and 903 transitions. [2022-04-07 21:19:27,490 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2022-04-07 21:19:27,490 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 21:19:27,491 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 21:19:27,491 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2022-04-07 21:19:27,491 INFO L403 AbstractCegarLoop]: === Iteration 12 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 21:19:27,491 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 21:19:27,491 INFO L85 PathProgramCache]: Analyzing trace with hash -1811690051, now seen corresponding path program 1 times [2022-04-07 21:19:27,491 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 21:19:27,491 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1119121924] [2022-04-07 21:19:27,491 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 21:19:27,491 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 21:19:27,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:19:27,525 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 21:19:27,526 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:19:27,528 INFO L290 TraceCheckUtils]: 0: Hoare triple {10929#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [222] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10923#true} is VALID [2022-04-07 21:19:27,528 INFO L290 TraceCheckUtils]: 1: Hoare triple {10923#true} [225] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10923#true} is VALID [2022-04-07 21:19:27,528 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {10923#true} {10923#true} [301] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10923#true} is VALID [2022-04-07 21:19:27,528 INFO L272 TraceCheckUtils]: 0: Hoare triple {10923#true} [220] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10929#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 21:19:27,529 INFO L290 TraceCheckUtils]: 1: Hoare triple {10929#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [222] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10923#true} is VALID [2022-04-07 21:19:27,529 INFO L290 TraceCheckUtils]: 2: Hoare triple {10923#true} [225] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10923#true} is VALID [2022-04-07 21:19:27,529 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10923#true} {10923#true} [301] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10923#true} is VALID [2022-04-07 21:19:27,529 INFO L272 TraceCheckUtils]: 4: Hoare triple {10923#true} [221] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10923#true} is VALID [2022-04-07 21:19:27,529 INFO L290 TraceCheckUtils]: 5: Hoare triple {10923#true} [224] mainENTRY-->L169-1: Formula: (and (= v_main_~p5~0_2 |v_main_#t~nondet8_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (= v_main_~p4~0_2 |v_main_#t~nondet7_2|)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~lk3~0=v_main_~lk3~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p2~0=v_main_~p2~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_2, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p5~0=v_main_~p5~0_2, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~lk4~0=v_main_~lk4~0_3, main_~p3~0=v_main_~p3~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet14, main_#t~nondet13, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {10923#true} is VALID [2022-04-07 21:19:27,529 INFO L290 TraceCheckUtils]: 6: Hoare triple {10923#true} [228] L169-1-->L46: Formula: (and (= |v_main_#t~nondet15_2| v_main_~cond~0_2) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet15=|v_main_#t~nondet15_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet15, main_~cond~0] {10923#true} is VALID [2022-04-07 21:19:27,529 INFO L290 TraceCheckUtils]: 7: Hoare triple {10923#true} [231] L46-->L73: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_3 0) (= v_main_~lk5~0_5 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0) (= v_main_~lk4~0_4 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk1~0=v_main_~lk1~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_5, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk4~0=v_main_~lk4~0_4, main_~lk6~0=v_main_~lk6~0_3, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk2~0, main_~lk3~0, main_~lk11~0, main_~lk1~0, main_~lk10~0, main_~lk5~0, main_~lk4~0, main_~lk6~0, main_~lk9~0, main_~lk8~0, main_~lk7~0] {10923#true} is VALID [2022-04-07 21:19:27,529 INFO L290 TraceCheckUtils]: 8: Hoare triple {10923#true} [234] L73-->L73-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {10923#true} is VALID [2022-04-07 21:19:27,529 INFO L290 TraceCheckUtils]: 9: Hoare triple {10923#true} [236] L73-2-->L77-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {10923#true} is VALID [2022-04-07 21:19:27,529 INFO L290 TraceCheckUtils]: 10: Hoare triple {10923#true} [238] L77-1-->L81-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {10923#true} is VALID [2022-04-07 21:19:27,529 INFO L290 TraceCheckUtils]: 11: Hoare triple {10923#true} [240] L81-1-->L85-1: Formula: (= v_main_~p4~0_4 0) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4} AuxVars[] AssignedVars[] {10923#true} is VALID [2022-04-07 21:19:27,530 INFO L290 TraceCheckUtils]: 12: Hoare triple {10923#true} [241] L85-1-->L89-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {10928#(= main_~lk5~0 1)} is VALID [2022-04-07 21:19:27,530 INFO L290 TraceCheckUtils]: 13: Hoare triple {10928#(= main_~lk5~0 1)} [243] L89-1-->L93-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {10928#(= main_~lk5~0 1)} is VALID [2022-04-07 21:19:27,531 INFO L290 TraceCheckUtils]: 14: Hoare triple {10928#(= main_~lk5~0 1)} [245] L93-1-->L97-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {10928#(= main_~lk5~0 1)} is VALID [2022-04-07 21:19:27,531 INFO L290 TraceCheckUtils]: 15: Hoare triple {10928#(= main_~lk5~0 1)} [247] L97-1-->L101-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {10928#(= main_~lk5~0 1)} is VALID [2022-04-07 21:19:27,531 INFO L290 TraceCheckUtils]: 16: Hoare triple {10928#(= main_~lk5~0 1)} [249] L101-1-->L105-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {10928#(= main_~lk5~0 1)} is VALID [2022-04-07 21:19:27,531 INFO L290 TraceCheckUtils]: 17: Hoare triple {10928#(= main_~lk5~0 1)} [251] L105-1-->L109-1: Formula: (and (= v_main_~lk10~0_6 1) (not (= v_main_~p10~0_4 0))) InVars {main_~p10~0=v_main_~p10~0_4} OutVars{main_~lk10~0=v_main_~lk10~0_6, main_~p10~0=v_main_~p10~0_4} AuxVars[] AssignedVars[main_~lk10~0] {10928#(= main_~lk5~0 1)} is VALID [2022-04-07 21:19:27,532 INFO L290 TraceCheckUtils]: 18: Hoare triple {10928#(= main_~lk5~0 1)} [253] L109-1-->L113-1: Formula: (and (= v_main_~lk11~0_6 1) (not (= v_main_~p11~0_4 0))) InVars {main_~p11~0=v_main_~p11~0_4} OutVars{main_~lk11~0=v_main_~lk11~0_6, main_~p11~0=v_main_~p11~0_4} AuxVars[] AssignedVars[main_~lk11~0] {10928#(= main_~lk5~0 1)} is VALID [2022-04-07 21:19:27,532 INFO L290 TraceCheckUtils]: 19: Hoare triple {10928#(= main_~lk5~0 1)} [256] L113-1-->L119-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {10928#(= main_~lk5~0 1)} is VALID [2022-04-07 21:19:27,532 INFO L290 TraceCheckUtils]: 20: Hoare triple {10928#(= main_~lk5~0 1)} [260] L119-1-->L124-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {10928#(= main_~lk5~0 1)} is VALID [2022-04-07 21:19:27,532 INFO L290 TraceCheckUtils]: 21: Hoare triple {10928#(= main_~lk5~0 1)} [266] L124-1-->L129-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {10928#(= main_~lk5~0 1)} is VALID [2022-04-07 21:19:27,532 INFO L290 TraceCheckUtils]: 22: Hoare triple {10928#(= main_~lk5~0 1)} [270] L129-1-->L134-1: Formula: (= v_main_~p4~0_1 0) InVars {main_~p4~0=v_main_~p4~0_1} OutVars{main_~p4~0=v_main_~p4~0_1} AuxVars[] AssignedVars[] {10928#(= main_~lk5~0 1)} is VALID [2022-04-07 21:19:27,533 INFO L290 TraceCheckUtils]: 23: Hoare triple {10928#(= main_~lk5~0 1)} [273] L134-1-->L140: Formula: (not (= v_main_~p5~0_1 0)) InVars {main_~p5~0=v_main_~p5~0_1} OutVars{main_~p5~0=v_main_~p5~0_1} AuxVars[] AssignedVars[] {10928#(= main_~lk5~0 1)} is VALID [2022-04-07 21:19:27,533 INFO L290 TraceCheckUtils]: 24: Hoare triple {10928#(= main_~lk5~0 1)} [275] L140-->L170-1: Formula: (not (= v_main_~lk5~0_2 1)) InVars {main_~lk5~0=v_main_~lk5~0_2} OutVars{main_~lk5~0=v_main_~lk5~0_2} AuxVars[] AssignedVars[] {10924#false} is VALID [2022-04-07 21:19:27,533 INFO L290 TraceCheckUtils]: 25: Hoare triple {10924#false} [261] L170-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10924#false} is VALID [2022-04-07 21:19:27,533 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 21:19:27,533 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 21:19:27,533 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1119121924] [2022-04-07 21:19:27,533 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1119121924] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 21:19:27,533 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 21:19:27,534 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-07 21:19:27,534 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1253783683] [2022-04-07 21:19:27,534 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 21:19:27,534 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-07 21:19:27,534 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 21:19:27,534 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:27,547 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 26 edges. 26 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:19:27,547 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-07 21:19:27,547 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 21:19:27,547 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-07 21:19:27,547 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-07 21:19:27,547 INFO L87 Difference]: Start difference. First operand 545 states and 903 transitions. Second operand has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:27,706 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:19:27,706 INFO L93 Difference]: Finished difference Result 995 states and 1664 transitions. [2022-04-07 21:19:27,706 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-07 21:19:27,706 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-07 21:19:27,706 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 21:19:27,706 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:27,707 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 126 transitions. [2022-04-07 21:19:27,707 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:27,708 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 126 transitions. [2022-04-07 21:19:27,708 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 126 transitions. [2022-04-07 21:19:27,783 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 126 edges. 126 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:19:27,811 INFO L225 Difference]: With dead ends: 995 [2022-04-07 21:19:27,811 INFO L226 Difference]: Without dead ends: 995 [2022-04-07 21:19:27,811 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-07 21:19:27,811 INFO L913 BasicCegarLoop]: 73 mSDtfsCounter, 157 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 68 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 157 SdHoareTripleChecker+Valid, 80 SdHoareTripleChecker+Invalid, 70 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 68 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 21:19:27,812 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [157 Valid, 80 Invalid, 70 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 68 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 21:19:27,812 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 995 states. [2022-04-07 21:19:27,820 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 995 to 769. [2022-04-07 21:19:27,821 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 21:19:27,822 INFO L82 GeneralOperation]: Start isEquivalent. First operand 995 states. Second operand has 769 states, 765 states have (on average 1.6261437908496732) internal successors, (1244), 765 states have internal predecessors, (1244), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:27,823 INFO L74 IsIncluded]: Start isIncluded. First operand 995 states. Second operand has 769 states, 765 states have (on average 1.6261437908496732) internal successors, (1244), 765 states have internal predecessors, (1244), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:27,824 INFO L87 Difference]: Start difference. First operand 995 states. Second operand has 769 states, 765 states have (on average 1.6261437908496732) internal successors, (1244), 765 states have internal predecessors, (1244), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:27,854 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:19:27,854 INFO L93 Difference]: Finished difference Result 995 states and 1664 transitions. [2022-04-07 21:19:27,854 INFO L276 IsEmpty]: Start isEmpty. Operand 995 states and 1664 transitions. [2022-04-07 21:19:27,855 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:19:27,855 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:19:27,856 INFO L74 IsIncluded]: Start isIncluded. First operand has 769 states, 765 states have (on average 1.6261437908496732) internal successors, (1244), 765 states have internal predecessors, (1244), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 995 states. [2022-04-07 21:19:27,857 INFO L87 Difference]: Start difference. First operand has 769 states, 765 states have (on average 1.6261437908496732) internal successors, (1244), 765 states have internal predecessors, (1244), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 995 states. [2022-04-07 21:19:27,886 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:19:27,886 INFO L93 Difference]: Finished difference Result 995 states and 1664 transitions. [2022-04-07 21:19:27,886 INFO L276 IsEmpty]: Start isEmpty. Operand 995 states and 1664 transitions. [2022-04-07 21:19:27,887 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:19:27,887 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:19:27,887 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 21:19:27,887 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 21:19:27,888 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 769 states, 765 states have (on average 1.6261437908496732) internal successors, (1244), 765 states have internal predecessors, (1244), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:27,907 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 769 states to 769 states and 1247 transitions. [2022-04-07 21:19:27,907 INFO L78 Accepts]: Start accepts. Automaton has 769 states and 1247 transitions. Word has length 26 [2022-04-07 21:19:27,907 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 21:19:27,907 INFO L478 AbstractCegarLoop]: Abstraction has 769 states and 1247 transitions. [2022-04-07 21:19:27,907 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:27,907 INFO L276 IsEmpty]: Start isEmpty. Operand 769 states and 1247 transitions. [2022-04-07 21:19:27,908 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2022-04-07 21:19:27,908 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 21:19:27,908 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 21:19:27,908 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2022-04-07 21:19:27,908 INFO L403 AbstractCegarLoop]: === Iteration 13 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 21:19:27,909 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 21:19:27,909 INFO L85 PathProgramCache]: Analyzing trace with hash 1977718620, now seen corresponding path program 1 times [2022-04-07 21:19:27,909 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 21:19:27,909 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1617070365] [2022-04-07 21:19:27,909 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 21:19:27,909 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 21:19:27,923 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:19:27,948 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 21:19:27,950 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:19:27,954 INFO L290 TraceCheckUtils]: 0: Hoare triple {14695#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [222] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {14689#true} is VALID [2022-04-07 21:19:27,954 INFO L290 TraceCheckUtils]: 1: Hoare triple {14689#true} [225] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14689#true} is VALID [2022-04-07 21:19:27,954 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {14689#true} {14689#true} [301] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14689#true} is VALID [2022-04-07 21:19:27,954 INFO L272 TraceCheckUtils]: 0: Hoare triple {14689#true} [220] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14695#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 21:19:27,955 INFO L290 TraceCheckUtils]: 1: Hoare triple {14695#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [222] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {14689#true} is VALID [2022-04-07 21:19:27,955 INFO L290 TraceCheckUtils]: 2: Hoare triple {14689#true} [225] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14689#true} is VALID [2022-04-07 21:19:27,955 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14689#true} {14689#true} [301] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14689#true} is VALID [2022-04-07 21:19:27,955 INFO L272 TraceCheckUtils]: 4: Hoare triple {14689#true} [221] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14689#true} is VALID [2022-04-07 21:19:27,955 INFO L290 TraceCheckUtils]: 5: Hoare triple {14689#true} [224] mainENTRY-->L169-1: Formula: (and (= v_main_~p5~0_2 |v_main_#t~nondet8_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (= v_main_~p4~0_2 |v_main_#t~nondet7_2|)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~lk3~0=v_main_~lk3~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p2~0=v_main_~p2~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_2, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p5~0=v_main_~p5~0_2, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~lk4~0=v_main_~lk4~0_3, main_~p3~0=v_main_~p3~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet14, main_#t~nondet13, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {14689#true} is VALID [2022-04-07 21:19:27,955 INFO L290 TraceCheckUtils]: 6: Hoare triple {14689#true} [228] L169-1-->L46: Formula: (and (= |v_main_#t~nondet15_2| v_main_~cond~0_2) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet15=|v_main_#t~nondet15_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet15, main_~cond~0] {14689#true} is VALID [2022-04-07 21:19:27,955 INFO L290 TraceCheckUtils]: 7: Hoare triple {14689#true} [231] L46-->L73: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_3 0) (= v_main_~lk5~0_5 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0) (= v_main_~lk4~0_4 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk1~0=v_main_~lk1~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_5, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk4~0=v_main_~lk4~0_4, main_~lk6~0=v_main_~lk6~0_3, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk2~0, main_~lk3~0, main_~lk11~0, main_~lk1~0, main_~lk10~0, main_~lk5~0, main_~lk4~0, main_~lk6~0, main_~lk9~0, main_~lk8~0, main_~lk7~0] {14689#true} is VALID [2022-04-07 21:19:27,960 INFO L290 TraceCheckUtils]: 8: Hoare triple {14689#true} [234] L73-->L73-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {14689#true} is VALID [2022-04-07 21:19:27,960 INFO L290 TraceCheckUtils]: 9: Hoare triple {14689#true} [236] L73-2-->L77-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {14689#true} is VALID [2022-04-07 21:19:27,960 INFO L290 TraceCheckUtils]: 10: Hoare triple {14689#true} [238] L77-1-->L81-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {14689#true} is VALID [2022-04-07 21:19:27,960 INFO L290 TraceCheckUtils]: 11: Hoare triple {14689#true} [240] L81-1-->L85-1: Formula: (= v_main_~p4~0_4 0) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4} AuxVars[] AssignedVars[] {14689#true} is VALID [2022-04-07 21:19:27,960 INFO L290 TraceCheckUtils]: 12: Hoare triple {14689#true} [242] L85-1-->L89-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {14694#(= main_~p5~0 0)} is VALID [2022-04-07 21:19:27,961 INFO L290 TraceCheckUtils]: 13: Hoare triple {14694#(= main_~p5~0 0)} [243] L89-1-->L93-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {14694#(= main_~p5~0 0)} is VALID [2022-04-07 21:19:27,961 INFO L290 TraceCheckUtils]: 14: Hoare triple {14694#(= main_~p5~0 0)} [245] L93-1-->L97-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {14694#(= main_~p5~0 0)} is VALID [2022-04-07 21:19:27,961 INFO L290 TraceCheckUtils]: 15: Hoare triple {14694#(= main_~p5~0 0)} [247] L97-1-->L101-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {14694#(= main_~p5~0 0)} is VALID [2022-04-07 21:19:27,961 INFO L290 TraceCheckUtils]: 16: Hoare triple {14694#(= main_~p5~0 0)} [249] L101-1-->L105-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {14694#(= main_~p5~0 0)} is VALID [2022-04-07 21:19:27,962 INFO L290 TraceCheckUtils]: 17: Hoare triple {14694#(= main_~p5~0 0)} [251] L105-1-->L109-1: Formula: (and (= v_main_~lk10~0_6 1) (not (= v_main_~p10~0_4 0))) InVars {main_~p10~0=v_main_~p10~0_4} OutVars{main_~lk10~0=v_main_~lk10~0_6, main_~p10~0=v_main_~p10~0_4} AuxVars[] AssignedVars[main_~lk10~0] {14694#(= main_~p5~0 0)} is VALID [2022-04-07 21:19:27,962 INFO L290 TraceCheckUtils]: 18: Hoare triple {14694#(= main_~p5~0 0)} [253] L109-1-->L113-1: Formula: (and (= v_main_~lk11~0_6 1) (not (= v_main_~p11~0_4 0))) InVars {main_~p11~0=v_main_~p11~0_4} OutVars{main_~lk11~0=v_main_~lk11~0_6, main_~p11~0=v_main_~p11~0_4} AuxVars[] AssignedVars[main_~lk11~0] {14694#(= main_~p5~0 0)} is VALID [2022-04-07 21:19:27,962 INFO L290 TraceCheckUtils]: 19: Hoare triple {14694#(= main_~p5~0 0)} [256] L113-1-->L119-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {14694#(= main_~p5~0 0)} is VALID [2022-04-07 21:19:27,963 INFO L290 TraceCheckUtils]: 20: Hoare triple {14694#(= main_~p5~0 0)} [260] L119-1-->L124-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {14694#(= main_~p5~0 0)} is VALID [2022-04-07 21:19:27,963 INFO L290 TraceCheckUtils]: 21: Hoare triple {14694#(= main_~p5~0 0)} [266] L124-1-->L129-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {14694#(= main_~p5~0 0)} is VALID [2022-04-07 21:19:27,963 INFO L290 TraceCheckUtils]: 22: Hoare triple {14694#(= main_~p5~0 0)} [270] L129-1-->L134-1: Formula: (= v_main_~p4~0_1 0) InVars {main_~p4~0=v_main_~p4~0_1} OutVars{main_~p4~0=v_main_~p4~0_1} AuxVars[] AssignedVars[] {14694#(= main_~p5~0 0)} is VALID [2022-04-07 21:19:27,963 INFO L290 TraceCheckUtils]: 23: Hoare triple {14694#(= main_~p5~0 0)} [273] L134-1-->L140: Formula: (not (= v_main_~p5~0_1 0)) InVars {main_~p5~0=v_main_~p5~0_1} OutVars{main_~p5~0=v_main_~p5~0_1} AuxVars[] AssignedVars[] {14690#false} is VALID [2022-04-07 21:19:27,964 INFO L290 TraceCheckUtils]: 24: Hoare triple {14690#false} [275] L140-->L170-1: Formula: (not (= v_main_~lk5~0_2 1)) InVars {main_~lk5~0=v_main_~lk5~0_2} OutVars{main_~lk5~0=v_main_~lk5~0_2} AuxVars[] AssignedVars[] {14690#false} is VALID [2022-04-07 21:19:27,964 INFO L290 TraceCheckUtils]: 25: Hoare triple {14690#false} [261] L170-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14690#false} is VALID [2022-04-07 21:19:27,964 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 21:19:27,964 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 21:19:27,964 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1617070365] [2022-04-07 21:19:27,964 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1617070365] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 21:19:27,964 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 21:19:27,964 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-07 21:19:27,964 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1140106700] [2022-04-07 21:19:27,964 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 21:19:27,965 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-07 21:19:27,965 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 21:19:27,965 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:27,978 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 26 edges. 26 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:19:27,978 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-07 21:19:27,978 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 21:19:27,979 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-07 21:19:27,979 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-07 21:19:27,979 INFO L87 Difference]: Start difference. First operand 769 states and 1247 transitions. Second operand has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:28,141 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:19:28,141 INFO L93 Difference]: Finished difference Result 1059 states and 1704 transitions. [2022-04-07 21:19:28,141 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-07 21:19:28,141 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-07 21:19:28,142 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 21:19:28,142 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:28,143 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 133 transitions. [2022-04-07 21:19:28,143 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:28,144 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 133 transitions. [2022-04-07 21:19:28,144 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 133 transitions. [2022-04-07 21:19:28,223 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 133 edges. 133 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:19:28,254 INFO L225 Difference]: With dead ends: 1059 [2022-04-07 21:19:28,254 INFO L226 Difference]: Without dead ends: 1059 [2022-04-07 21:19:28,254 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-07 21:19:28,255 INFO L913 BasicCegarLoop]: 104 mSDtfsCounter, 139 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 66 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 139 SdHoareTripleChecker+Valid, 111 SdHoareTripleChecker+Invalid, 69 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 66 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 21:19:28,255 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [139 Valid, 111 Invalid, 69 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 66 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 21:19:28,256 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1059 states. [2022-04-07 21:19:28,268 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1059 to 1057. [2022-04-07 21:19:28,268 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 21:19:28,269 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1059 states. Second operand has 1057 states, 1053 states have (on average 1.6144349477682811) internal successors, (1700), 1053 states have internal predecessors, (1700), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:28,270 INFO L74 IsIncluded]: Start isIncluded. First operand 1059 states. Second operand has 1057 states, 1053 states have (on average 1.6144349477682811) internal successors, (1700), 1053 states have internal predecessors, (1700), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:28,271 INFO L87 Difference]: Start difference. First operand 1059 states. Second operand has 1057 states, 1053 states have (on average 1.6144349477682811) internal successors, (1700), 1053 states have internal predecessors, (1700), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:28,305 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:19:28,305 INFO L93 Difference]: Finished difference Result 1059 states and 1704 transitions. [2022-04-07 21:19:28,305 INFO L276 IsEmpty]: Start isEmpty. Operand 1059 states and 1704 transitions. [2022-04-07 21:19:28,306 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:19:28,306 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:19:28,308 INFO L74 IsIncluded]: Start isIncluded. First operand has 1057 states, 1053 states have (on average 1.6144349477682811) internal successors, (1700), 1053 states have internal predecessors, (1700), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 1059 states. [2022-04-07 21:19:28,309 INFO L87 Difference]: Start difference. First operand has 1057 states, 1053 states have (on average 1.6144349477682811) internal successors, (1700), 1053 states have internal predecessors, (1700), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 1059 states. [2022-04-07 21:19:28,342 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:19:28,342 INFO L93 Difference]: Finished difference Result 1059 states and 1704 transitions. [2022-04-07 21:19:28,343 INFO L276 IsEmpty]: Start isEmpty. Operand 1059 states and 1704 transitions. [2022-04-07 21:19:28,344 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:19:28,344 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:19:28,344 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 21:19:28,344 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 21:19:28,346 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1057 states, 1053 states have (on average 1.6144349477682811) internal successors, (1700), 1053 states have internal predecessors, (1700), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:28,376 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1057 states to 1057 states and 1703 transitions. [2022-04-07 21:19:28,377 INFO L78 Accepts]: Start accepts. Automaton has 1057 states and 1703 transitions. Word has length 26 [2022-04-07 21:19:28,377 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 21:19:28,377 INFO L478 AbstractCegarLoop]: Abstraction has 1057 states and 1703 transitions. [2022-04-07 21:19:28,377 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:28,377 INFO L276 IsEmpty]: Start isEmpty. Operand 1057 states and 1703 transitions. [2022-04-07 21:19:28,378 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2022-04-07 21:19:28,378 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 21:19:28,378 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 21:19:28,378 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2022-04-07 21:19:28,378 INFO L403 AbstractCegarLoop]: === Iteration 14 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 21:19:28,378 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 21:19:28,378 INFO L85 PathProgramCache]: Analyzing trace with hash -327784201, now seen corresponding path program 1 times [2022-04-07 21:19:28,378 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 21:19:28,379 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [157799935] [2022-04-07 21:19:28,379 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 21:19:28,379 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 21:19:28,388 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:19:28,399 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 21:19:28,400 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:19:28,402 INFO L290 TraceCheckUtils]: 0: Hoare triple {18941#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [222] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {18935#true} is VALID [2022-04-07 21:19:28,403 INFO L290 TraceCheckUtils]: 1: Hoare triple {18935#true} [225] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18935#true} is VALID [2022-04-07 21:19:28,403 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {18935#true} {18935#true} [301] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18935#true} is VALID [2022-04-07 21:19:28,403 INFO L272 TraceCheckUtils]: 0: Hoare triple {18935#true} [220] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18941#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 21:19:28,403 INFO L290 TraceCheckUtils]: 1: Hoare triple {18941#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [222] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {18935#true} is VALID [2022-04-07 21:19:28,403 INFO L290 TraceCheckUtils]: 2: Hoare triple {18935#true} [225] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18935#true} is VALID [2022-04-07 21:19:28,403 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {18935#true} {18935#true} [301] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18935#true} is VALID [2022-04-07 21:19:28,403 INFO L272 TraceCheckUtils]: 4: Hoare triple {18935#true} [221] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18935#true} is VALID [2022-04-07 21:19:28,404 INFO L290 TraceCheckUtils]: 5: Hoare triple {18935#true} [224] mainENTRY-->L169-1: Formula: (and (= v_main_~p5~0_2 |v_main_#t~nondet8_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (= v_main_~p4~0_2 |v_main_#t~nondet7_2|)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~lk3~0=v_main_~lk3~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p2~0=v_main_~p2~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_2, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p5~0=v_main_~p5~0_2, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~lk4~0=v_main_~lk4~0_3, main_~p3~0=v_main_~p3~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet14, main_#t~nondet13, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {18935#true} is VALID [2022-04-07 21:19:28,404 INFO L290 TraceCheckUtils]: 6: Hoare triple {18935#true} [228] L169-1-->L46: Formula: (and (= |v_main_#t~nondet15_2| v_main_~cond~0_2) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet15=|v_main_#t~nondet15_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet15, main_~cond~0] {18935#true} is VALID [2022-04-07 21:19:28,404 INFO L290 TraceCheckUtils]: 7: Hoare triple {18935#true} [231] L46-->L73: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_3 0) (= v_main_~lk5~0_5 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0) (= v_main_~lk4~0_4 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk1~0=v_main_~lk1~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_5, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk4~0=v_main_~lk4~0_4, main_~lk6~0=v_main_~lk6~0_3, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk2~0, main_~lk3~0, main_~lk11~0, main_~lk1~0, main_~lk10~0, main_~lk5~0, main_~lk4~0, main_~lk6~0, main_~lk9~0, main_~lk8~0, main_~lk7~0] {18935#true} is VALID [2022-04-07 21:19:28,404 INFO L290 TraceCheckUtils]: 8: Hoare triple {18935#true} [234] L73-->L73-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {18935#true} is VALID [2022-04-07 21:19:28,404 INFO L290 TraceCheckUtils]: 9: Hoare triple {18935#true} [236] L73-2-->L77-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {18935#true} is VALID [2022-04-07 21:19:28,404 INFO L290 TraceCheckUtils]: 10: Hoare triple {18935#true} [238] L77-1-->L81-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {18935#true} is VALID [2022-04-07 21:19:28,404 INFO L290 TraceCheckUtils]: 11: Hoare triple {18935#true} [240] L81-1-->L85-1: Formula: (= v_main_~p4~0_4 0) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4} AuxVars[] AssignedVars[] {18935#true} is VALID [2022-04-07 21:19:28,404 INFO L290 TraceCheckUtils]: 12: Hoare triple {18935#true} [241] L85-1-->L89-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {18940#(not (= main_~p5~0 0))} is VALID [2022-04-07 21:19:28,405 INFO L290 TraceCheckUtils]: 13: Hoare triple {18940#(not (= main_~p5~0 0))} [243] L89-1-->L93-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {18940#(not (= main_~p5~0 0))} is VALID [2022-04-07 21:19:28,405 INFO L290 TraceCheckUtils]: 14: Hoare triple {18940#(not (= main_~p5~0 0))} [245] L93-1-->L97-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {18940#(not (= main_~p5~0 0))} is VALID [2022-04-07 21:19:28,405 INFO L290 TraceCheckUtils]: 15: Hoare triple {18940#(not (= main_~p5~0 0))} [247] L97-1-->L101-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {18940#(not (= main_~p5~0 0))} is VALID [2022-04-07 21:19:28,405 INFO L290 TraceCheckUtils]: 16: Hoare triple {18940#(not (= main_~p5~0 0))} [249] L101-1-->L105-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {18940#(not (= main_~p5~0 0))} is VALID [2022-04-07 21:19:28,406 INFO L290 TraceCheckUtils]: 17: Hoare triple {18940#(not (= main_~p5~0 0))} [251] L105-1-->L109-1: Formula: (and (= v_main_~lk10~0_6 1) (not (= v_main_~p10~0_4 0))) InVars {main_~p10~0=v_main_~p10~0_4} OutVars{main_~lk10~0=v_main_~lk10~0_6, main_~p10~0=v_main_~p10~0_4} AuxVars[] AssignedVars[main_~lk10~0] {18940#(not (= main_~p5~0 0))} is VALID [2022-04-07 21:19:28,406 INFO L290 TraceCheckUtils]: 18: Hoare triple {18940#(not (= main_~p5~0 0))} [253] L109-1-->L113-1: Formula: (and (= v_main_~lk11~0_6 1) (not (= v_main_~p11~0_4 0))) InVars {main_~p11~0=v_main_~p11~0_4} OutVars{main_~lk11~0=v_main_~lk11~0_6, main_~p11~0=v_main_~p11~0_4} AuxVars[] AssignedVars[main_~lk11~0] {18940#(not (= main_~p5~0 0))} is VALID [2022-04-07 21:19:28,406 INFO L290 TraceCheckUtils]: 19: Hoare triple {18940#(not (= main_~p5~0 0))} [256] L113-1-->L119-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {18940#(not (= main_~p5~0 0))} is VALID [2022-04-07 21:19:28,406 INFO L290 TraceCheckUtils]: 20: Hoare triple {18940#(not (= main_~p5~0 0))} [260] L119-1-->L124-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {18940#(not (= main_~p5~0 0))} is VALID [2022-04-07 21:19:28,407 INFO L290 TraceCheckUtils]: 21: Hoare triple {18940#(not (= main_~p5~0 0))} [266] L124-1-->L129-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {18940#(not (= main_~p5~0 0))} is VALID [2022-04-07 21:19:28,407 INFO L290 TraceCheckUtils]: 22: Hoare triple {18940#(not (= main_~p5~0 0))} [270] L129-1-->L134-1: Formula: (= v_main_~p4~0_1 0) InVars {main_~p4~0=v_main_~p4~0_1} OutVars{main_~p4~0=v_main_~p4~0_1} AuxVars[] AssignedVars[] {18940#(not (= main_~p5~0 0))} is VALID [2022-04-07 21:19:28,407 INFO L290 TraceCheckUtils]: 23: Hoare triple {18940#(not (= main_~p5~0 0))} [274] L134-1-->L139-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {18936#false} is VALID [2022-04-07 21:19:28,407 INFO L290 TraceCheckUtils]: 24: Hoare triple {18936#false} [277] L139-1-->L145: Formula: (not (= v_main_~p6~0_2 0)) InVars {main_~p6~0=v_main_~p6~0_2} OutVars{main_~p6~0=v_main_~p6~0_2} AuxVars[] AssignedVars[] {18936#false} is VALID [2022-04-07 21:19:28,407 INFO L290 TraceCheckUtils]: 25: Hoare triple {18936#false} [279] L145-->L170-1: Formula: (not (= v_main_~lk6~0_2 1)) InVars {main_~lk6~0=v_main_~lk6~0_2} OutVars{main_~lk6~0=v_main_~lk6~0_2} AuxVars[] AssignedVars[] {18936#false} is VALID [2022-04-07 21:19:28,408 INFO L290 TraceCheckUtils]: 26: Hoare triple {18936#false} [261] L170-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18936#false} is VALID [2022-04-07 21:19:28,408 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 21:19:28,408 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 21:19:28,408 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [157799935] [2022-04-07 21:19:28,408 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [157799935] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 21:19:28,408 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 21:19:28,408 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-07 21:19:28,408 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1825391357] [2022-04-07 21:19:28,408 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 21:19:28,408 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-07 21:19:28,409 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 21:19:28,409 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:28,422 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 27 edges. 27 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:19:28,422 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-07 21:19:28,423 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 21:19:28,423 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-07 21:19:28,423 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-07 21:19:28,423 INFO L87 Difference]: Start difference. First operand 1057 states and 1703 transitions. Second operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:28,601 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:19:28,602 INFO L93 Difference]: Finished difference Result 1083 states and 1720 transitions. [2022-04-07 21:19:28,602 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-07 21:19:28,602 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-07 21:19:28,602 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 21:19:28,602 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:28,603 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 132 transitions. [2022-04-07 21:19:28,603 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:28,604 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 132 transitions. [2022-04-07 21:19:28,604 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 132 transitions. [2022-04-07 21:19:28,693 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 132 edges. 132 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:19:28,725 INFO L225 Difference]: With dead ends: 1083 [2022-04-07 21:19:28,726 INFO L226 Difference]: Without dead ends: 1083 [2022-04-07 21:19:28,726 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-07 21:19:28,726 INFO L913 BasicCegarLoop]: 104 mSDtfsCounter, 140 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 65 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 140 SdHoareTripleChecker+Valid, 111 SdHoareTripleChecker+Invalid, 67 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 65 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 21:19:28,726 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [140 Valid, 111 Invalid, 67 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 65 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 21:19:28,727 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1083 states. [2022-04-07 21:19:28,737 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1083 to 1081. [2022-04-07 21:19:28,737 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 21:19:28,738 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1083 states. Second operand has 1081 states, 1077 states have (on average 1.5933147632311977) internal successors, (1716), 1077 states have internal predecessors, (1716), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:28,739 INFO L74 IsIncluded]: Start isIncluded. First operand 1083 states. Second operand has 1081 states, 1077 states have (on average 1.5933147632311977) internal successors, (1716), 1077 states have internal predecessors, (1716), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:28,740 INFO L87 Difference]: Start difference. First operand 1083 states. Second operand has 1081 states, 1077 states have (on average 1.5933147632311977) internal successors, (1716), 1077 states have internal predecessors, (1716), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:28,772 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:19:28,772 INFO L93 Difference]: Finished difference Result 1083 states and 1720 transitions. [2022-04-07 21:19:28,772 INFO L276 IsEmpty]: Start isEmpty. Operand 1083 states and 1720 transitions. [2022-04-07 21:19:28,773 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:19:28,774 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:19:28,775 INFO L74 IsIncluded]: Start isIncluded. First operand has 1081 states, 1077 states have (on average 1.5933147632311977) internal successors, (1716), 1077 states have internal predecessors, (1716), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 1083 states. [2022-04-07 21:19:28,776 INFO L87 Difference]: Start difference. First operand has 1081 states, 1077 states have (on average 1.5933147632311977) internal successors, (1716), 1077 states have internal predecessors, (1716), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 1083 states. [2022-04-07 21:19:28,808 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:19:28,808 INFO L93 Difference]: Finished difference Result 1083 states and 1720 transitions. [2022-04-07 21:19:28,808 INFO L276 IsEmpty]: Start isEmpty. Operand 1083 states and 1720 transitions. [2022-04-07 21:19:28,809 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:19:28,809 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:19:28,810 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 21:19:28,810 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 21:19:28,811 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1081 states, 1077 states have (on average 1.5933147632311977) internal successors, (1716), 1077 states have internal predecessors, (1716), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:28,842 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1081 states to 1081 states and 1719 transitions. [2022-04-07 21:19:28,842 INFO L78 Accepts]: Start accepts. Automaton has 1081 states and 1719 transitions. Word has length 27 [2022-04-07 21:19:28,842 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 21:19:28,842 INFO L478 AbstractCegarLoop]: Abstraction has 1081 states and 1719 transitions. [2022-04-07 21:19:28,843 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:28,843 INFO L276 IsEmpty]: Start isEmpty. Operand 1081 states and 1719 transitions. [2022-04-07 21:19:28,843 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2022-04-07 21:19:28,844 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 21:19:28,844 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 21:19:28,844 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2022-04-07 21:19:28,844 INFO L403 AbstractCegarLoop]: === Iteration 15 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 21:19:28,844 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 21:19:28,844 INFO L85 PathProgramCache]: Analyzing trace with hash 1179767608, now seen corresponding path program 1 times [2022-04-07 21:19:28,844 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 21:19:28,844 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [790093726] [2022-04-07 21:19:28,844 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 21:19:28,844 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 21:19:28,854 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:19:28,865 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 21:19:28,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:19:28,868 INFO L290 TraceCheckUtils]: 0: Hoare triple {23283#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [222] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {23277#true} is VALID [2022-04-07 21:19:28,868 INFO L290 TraceCheckUtils]: 1: Hoare triple {23277#true} [225] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23277#true} is VALID [2022-04-07 21:19:28,869 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {23277#true} {23277#true} [301] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23277#true} is VALID [2022-04-07 21:19:28,869 INFO L272 TraceCheckUtils]: 0: Hoare triple {23277#true} [220] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23283#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 21:19:28,869 INFO L290 TraceCheckUtils]: 1: Hoare triple {23283#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [222] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {23277#true} is VALID [2022-04-07 21:19:28,869 INFO L290 TraceCheckUtils]: 2: Hoare triple {23277#true} [225] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23277#true} is VALID [2022-04-07 21:19:28,869 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {23277#true} {23277#true} [301] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23277#true} is VALID [2022-04-07 21:19:28,869 INFO L272 TraceCheckUtils]: 4: Hoare triple {23277#true} [221] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23277#true} is VALID [2022-04-07 21:19:28,869 INFO L290 TraceCheckUtils]: 5: Hoare triple {23277#true} [224] mainENTRY-->L169-1: Formula: (and (= v_main_~p5~0_2 |v_main_#t~nondet8_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (= v_main_~p4~0_2 |v_main_#t~nondet7_2|)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~lk3~0=v_main_~lk3~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p2~0=v_main_~p2~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_2, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p5~0=v_main_~p5~0_2, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~lk4~0=v_main_~lk4~0_3, main_~p3~0=v_main_~p3~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet14, main_#t~nondet13, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {23277#true} is VALID [2022-04-07 21:19:28,870 INFO L290 TraceCheckUtils]: 6: Hoare triple {23277#true} [228] L169-1-->L46: Formula: (and (= |v_main_#t~nondet15_2| v_main_~cond~0_2) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet15=|v_main_#t~nondet15_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet15, main_~cond~0] {23277#true} is VALID [2022-04-07 21:19:28,870 INFO L290 TraceCheckUtils]: 7: Hoare triple {23277#true} [231] L46-->L73: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_3 0) (= v_main_~lk5~0_5 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0) (= v_main_~lk4~0_4 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk1~0=v_main_~lk1~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_5, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk4~0=v_main_~lk4~0_4, main_~lk6~0=v_main_~lk6~0_3, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk2~0, main_~lk3~0, main_~lk11~0, main_~lk1~0, main_~lk10~0, main_~lk5~0, main_~lk4~0, main_~lk6~0, main_~lk9~0, main_~lk8~0, main_~lk7~0] {23277#true} is VALID [2022-04-07 21:19:28,870 INFO L290 TraceCheckUtils]: 8: Hoare triple {23277#true} [234] L73-->L73-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {23277#true} is VALID [2022-04-07 21:19:28,870 INFO L290 TraceCheckUtils]: 9: Hoare triple {23277#true} [236] L73-2-->L77-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {23277#true} is VALID [2022-04-07 21:19:28,870 INFO L290 TraceCheckUtils]: 10: Hoare triple {23277#true} [238] L77-1-->L81-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {23277#true} is VALID [2022-04-07 21:19:28,870 INFO L290 TraceCheckUtils]: 11: Hoare triple {23277#true} [240] L81-1-->L85-1: Formula: (= v_main_~p4~0_4 0) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4} AuxVars[] AssignedVars[] {23277#true} is VALID [2022-04-07 21:19:28,870 INFO L290 TraceCheckUtils]: 12: Hoare triple {23277#true} [242] L85-1-->L89-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {23277#true} is VALID [2022-04-07 21:19:28,870 INFO L290 TraceCheckUtils]: 13: Hoare triple {23277#true} [243] L89-1-->L93-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {23282#(= main_~lk6~0 1)} is VALID [2022-04-07 21:19:28,871 INFO L290 TraceCheckUtils]: 14: Hoare triple {23282#(= main_~lk6~0 1)} [245] L93-1-->L97-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {23282#(= main_~lk6~0 1)} is VALID [2022-04-07 21:19:28,871 INFO L290 TraceCheckUtils]: 15: Hoare triple {23282#(= main_~lk6~0 1)} [247] L97-1-->L101-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {23282#(= main_~lk6~0 1)} is VALID [2022-04-07 21:19:28,875 INFO L290 TraceCheckUtils]: 16: Hoare triple {23282#(= main_~lk6~0 1)} [249] L101-1-->L105-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {23282#(= main_~lk6~0 1)} is VALID [2022-04-07 21:19:28,875 INFO L290 TraceCheckUtils]: 17: Hoare triple {23282#(= main_~lk6~0 1)} [251] L105-1-->L109-1: Formula: (and (= v_main_~lk10~0_6 1) (not (= v_main_~p10~0_4 0))) InVars {main_~p10~0=v_main_~p10~0_4} OutVars{main_~lk10~0=v_main_~lk10~0_6, main_~p10~0=v_main_~p10~0_4} AuxVars[] AssignedVars[main_~lk10~0] {23282#(= main_~lk6~0 1)} is VALID [2022-04-07 21:19:28,876 INFO L290 TraceCheckUtils]: 18: Hoare triple {23282#(= main_~lk6~0 1)} [253] L109-1-->L113-1: Formula: (and (= v_main_~lk11~0_6 1) (not (= v_main_~p11~0_4 0))) InVars {main_~p11~0=v_main_~p11~0_4} OutVars{main_~lk11~0=v_main_~lk11~0_6, main_~p11~0=v_main_~p11~0_4} AuxVars[] AssignedVars[main_~lk11~0] {23282#(= main_~lk6~0 1)} is VALID [2022-04-07 21:19:28,876 INFO L290 TraceCheckUtils]: 19: Hoare triple {23282#(= main_~lk6~0 1)} [256] L113-1-->L119-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {23282#(= main_~lk6~0 1)} is VALID [2022-04-07 21:19:28,876 INFO L290 TraceCheckUtils]: 20: Hoare triple {23282#(= main_~lk6~0 1)} [260] L119-1-->L124-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {23282#(= main_~lk6~0 1)} is VALID [2022-04-07 21:19:28,876 INFO L290 TraceCheckUtils]: 21: Hoare triple {23282#(= main_~lk6~0 1)} [266] L124-1-->L129-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {23282#(= main_~lk6~0 1)} is VALID [2022-04-07 21:19:28,877 INFO L290 TraceCheckUtils]: 22: Hoare triple {23282#(= main_~lk6~0 1)} [270] L129-1-->L134-1: Formula: (= v_main_~p4~0_1 0) InVars {main_~p4~0=v_main_~p4~0_1} OutVars{main_~p4~0=v_main_~p4~0_1} AuxVars[] AssignedVars[] {23282#(= main_~lk6~0 1)} is VALID [2022-04-07 21:19:28,877 INFO L290 TraceCheckUtils]: 23: Hoare triple {23282#(= main_~lk6~0 1)} [274] L134-1-->L139-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {23282#(= main_~lk6~0 1)} is VALID [2022-04-07 21:19:28,877 INFO L290 TraceCheckUtils]: 24: Hoare triple {23282#(= main_~lk6~0 1)} [277] L139-1-->L145: Formula: (not (= v_main_~p6~0_2 0)) InVars {main_~p6~0=v_main_~p6~0_2} OutVars{main_~p6~0=v_main_~p6~0_2} AuxVars[] AssignedVars[] {23282#(= main_~lk6~0 1)} is VALID [2022-04-07 21:19:28,877 INFO L290 TraceCheckUtils]: 25: Hoare triple {23282#(= main_~lk6~0 1)} [279] L145-->L170-1: Formula: (not (= v_main_~lk6~0_2 1)) InVars {main_~lk6~0=v_main_~lk6~0_2} OutVars{main_~lk6~0=v_main_~lk6~0_2} AuxVars[] AssignedVars[] {23278#false} is VALID [2022-04-07 21:19:28,877 INFO L290 TraceCheckUtils]: 26: Hoare triple {23278#false} [261] L170-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23278#false} is VALID [2022-04-07 21:19:28,878 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 21:19:28,878 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 21:19:28,878 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [790093726] [2022-04-07 21:19:28,878 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [790093726] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 21:19:28,878 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 21:19:28,878 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-07 21:19:28,878 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2071947773] [2022-04-07 21:19:28,878 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 21:19:28,878 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-07 21:19:28,878 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 21:19:28,879 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:28,890 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 27 edges. 27 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:19:28,891 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-07 21:19:28,891 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 21:19:28,891 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-07 21:19:28,891 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-07 21:19:28,891 INFO L87 Difference]: Start difference. First operand 1081 states and 1719 transitions. Second operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:29,103 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:19:29,103 INFO L93 Difference]: Finished difference Result 1931 states and 3096 transitions. [2022-04-07 21:19:29,103 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-07 21:19:29,103 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-07 21:19:29,103 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 21:19:29,103 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:29,104 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 122 transitions. [2022-04-07 21:19:29,104 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:29,105 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 122 transitions. [2022-04-07 21:19:29,105 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 122 transitions. [2022-04-07 21:19:29,191 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 122 edges. 122 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:19:29,287 INFO L225 Difference]: With dead ends: 1931 [2022-04-07 21:19:29,287 INFO L226 Difference]: Without dead ends: 1931 [2022-04-07 21:19:29,287 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-07 21:19:29,288 INFO L913 BasicCegarLoop]: 72 mSDtfsCounter, 150 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 67 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 150 SdHoareTripleChecker+Valid, 79 SdHoareTripleChecker+Invalid, 69 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 67 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 21:19:29,288 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [150 Valid, 79 Invalid, 69 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 67 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 21:19:29,289 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1931 states. [2022-04-07 21:19:29,308 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1931 to 1545. [2022-04-07 21:19:29,308 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 21:19:29,310 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1931 states. Second operand has 1545 states, 1541 states have (on average 1.5496430889033095) internal successors, (2388), 1541 states have internal predecessors, (2388), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:29,312 INFO L74 IsIncluded]: Start isIncluded. First operand 1931 states. Second operand has 1545 states, 1541 states have (on average 1.5496430889033095) internal successors, (2388), 1541 states have internal predecessors, (2388), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:29,313 INFO L87 Difference]: Start difference. First operand 1931 states. Second operand has 1545 states, 1541 states have (on average 1.5496430889033095) internal successors, (2388), 1541 states have internal predecessors, (2388), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:29,405 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:19:29,405 INFO L93 Difference]: Finished difference Result 1931 states and 3096 transitions. [2022-04-07 21:19:29,405 INFO L276 IsEmpty]: Start isEmpty. Operand 1931 states and 3096 transitions. [2022-04-07 21:19:29,407 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:19:29,407 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:19:29,409 INFO L74 IsIncluded]: Start isIncluded. First operand has 1545 states, 1541 states have (on average 1.5496430889033095) internal successors, (2388), 1541 states have internal predecessors, (2388), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 1931 states. [2022-04-07 21:19:29,410 INFO L87 Difference]: Start difference. First operand has 1545 states, 1541 states have (on average 1.5496430889033095) internal successors, (2388), 1541 states have internal predecessors, (2388), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 1931 states. [2022-04-07 21:19:29,500 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:19:29,500 INFO L93 Difference]: Finished difference Result 1931 states and 3096 transitions. [2022-04-07 21:19:29,500 INFO L276 IsEmpty]: Start isEmpty. Operand 1931 states and 3096 transitions. [2022-04-07 21:19:29,504 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:19:29,504 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:19:29,504 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 21:19:29,504 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 21:19:29,506 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1545 states, 1541 states have (on average 1.5496430889033095) internal successors, (2388), 1541 states have internal predecessors, (2388), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:29,568 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1545 states to 1545 states and 2391 transitions. [2022-04-07 21:19:29,568 INFO L78 Accepts]: Start accepts. Automaton has 1545 states and 2391 transitions. Word has length 27 [2022-04-07 21:19:29,568 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 21:19:29,568 INFO L478 AbstractCegarLoop]: Abstraction has 1545 states and 2391 transitions. [2022-04-07 21:19:29,568 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:29,568 INFO L276 IsEmpty]: Start isEmpty. Operand 1545 states and 2391 transitions. [2022-04-07 21:19:29,570 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2022-04-07 21:19:29,570 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 21:19:29,570 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 21:19:29,570 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2022-04-07 21:19:29,570 INFO L403 AbstractCegarLoop]: === Iteration 16 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 21:19:29,570 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 21:19:29,570 INFO L85 PathProgramCache]: Analyzing trace with hash 674208983, now seen corresponding path program 1 times [2022-04-07 21:19:29,570 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 21:19:29,570 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2145086674] [2022-04-07 21:19:29,570 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 21:19:29,571 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 21:19:29,583 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:19:29,599 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 21:19:29,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:19:29,602 INFO L290 TraceCheckUtils]: 0: Hoare triple {30633#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [222] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {30627#true} is VALID [2022-04-07 21:19:29,602 INFO L290 TraceCheckUtils]: 1: Hoare triple {30627#true} [225] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30627#true} is VALID [2022-04-07 21:19:29,602 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {30627#true} {30627#true} [301] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30627#true} is VALID [2022-04-07 21:19:29,603 INFO L272 TraceCheckUtils]: 0: Hoare triple {30627#true} [220] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30633#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 21:19:29,603 INFO L290 TraceCheckUtils]: 1: Hoare triple {30633#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [222] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {30627#true} is VALID [2022-04-07 21:19:29,603 INFO L290 TraceCheckUtils]: 2: Hoare triple {30627#true} [225] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30627#true} is VALID [2022-04-07 21:19:29,603 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {30627#true} {30627#true} [301] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30627#true} is VALID [2022-04-07 21:19:29,603 INFO L272 TraceCheckUtils]: 4: Hoare triple {30627#true} [221] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30627#true} is VALID [2022-04-07 21:19:29,603 INFO L290 TraceCheckUtils]: 5: Hoare triple {30627#true} [224] mainENTRY-->L169-1: Formula: (and (= v_main_~p5~0_2 |v_main_#t~nondet8_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (= v_main_~p4~0_2 |v_main_#t~nondet7_2|)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~lk3~0=v_main_~lk3~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p2~0=v_main_~p2~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_2, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p5~0=v_main_~p5~0_2, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~lk4~0=v_main_~lk4~0_3, main_~p3~0=v_main_~p3~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet14, main_#t~nondet13, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {30627#true} is VALID [2022-04-07 21:19:29,603 INFO L290 TraceCheckUtils]: 6: Hoare triple {30627#true} [228] L169-1-->L46: Formula: (and (= |v_main_#t~nondet15_2| v_main_~cond~0_2) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet15=|v_main_#t~nondet15_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet15, main_~cond~0] {30627#true} is VALID [2022-04-07 21:19:29,603 INFO L290 TraceCheckUtils]: 7: Hoare triple {30627#true} [231] L46-->L73: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_3 0) (= v_main_~lk5~0_5 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0) (= v_main_~lk4~0_4 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk1~0=v_main_~lk1~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_5, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk4~0=v_main_~lk4~0_4, main_~lk6~0=v_main_~lk6~0_3, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk2~0, main_~lk3~0, main_~lk11~0, main_~lk1~0, main_~lk10~0, main_~lk5~0, main_~lk4~0, main_~lk6~0, main_~lk9~0, main_~lk8~0, main_~lk7~0] {30627#true} is VALID [2022-04-07 21:19:29,603 INFO L290 TraceCheckUtils]: 8: Hoare triple {30627#true} [234] L73-->L73-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {30627#true} is VALID [2022-04-07 21:19:29,603 INFO L290 TraceCheckUtils]: 9: Hoare triple {30627#true} [236] L73-2-->L77-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {30627#true} is VALID [2022-04-07 21:19:29,604 INFO L290 TraceCheckUtils]: 10: Hoare triple {30627#true} [238] L77-1-->L81-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {30627#true} is VALID [2022-04-07 21:19:29,604 INFO L290 TraceCheckUtils]: 11: Hoare triple {30627#true} [240] L81-1-->L85-1: Formula: (= v_main_~p4~0_4 0) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4} AuxVars[] AssignedVars[] {30627#true} is VALID [2022-04-07 21:19:29,604 INFO L290 TraceCheckUtils]: 12: Hoare triple {30627#true} [242] L85-1-->L89-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {30627#true} is VALID [2022-04-07 21:19:29,604 INFO L290 TraceCheckUtils]: 13: Hoare triple {30627#true} [244] L89-1-->L93-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {30632#(= main_~p6~0 0)} is VALID [2022-04-07 21:19:29,604 INFO L290 TraceCheckUtils]: 14: Hoare triple {30632#(= main_~p6~0 0)} [245] L93-1-->L97-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {30632#(= main_~p6~0 0)} is VALID [2022-04-07 21:19:29,604 INFO L290 TraceCheckUtils]: 15: Hoare triple {30632#(= main_~p6~0 0)} [247] L97-1-->L101-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {30632#(= main_~p6~0 0)} is VALID [2022-04-07 21:19:29,605 INFO L290 TraceCheckUtils]: 16: Hoare triple {30632#(= main_~p6~0 0)} [249] L101-1-->L105-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {30632#(= main_~p6~0 0)} is VALID [2022-04-07 21:19:29,605 INFO L290 TraceCheckUtils]: 17: Hoare triple {30632#(= main_~p6~0 0)} [251] L105-1-->L109-1: Formula: (and (= v_main_~lk10~0_6 1) (not (= v_main_~p10~0_4 0))) InVars {main_~p10~0=v_main_~p10~0_4} OutVars{main_~lk10~0=v_main_~lk10~0_6, main_~p10~0=v_main_~p10~0_4} AuxVars[] AssignedVars[main_~lk10~0] {30632#(= main_~p6~0 0)} is VALID [2022-04-07 21:19:29,605 INFO L290 TraceCheckUtils]: 18: Hoare triple {30632#(= main_~p6~0 0)} [253] L109-1-->L113-1: Formula: (and (= v_main_~lk11~0_6 1) (not (= v_main_~p11~0_4 0))) InVars {main_~p11~0=v_main_~p11~0_4} OutVars{main_~lk11~0=v_main_~lk11~0_6, main_~p11~0=v_main_~p11~0_4} AuxVars[] AssignedVars[main_~lk11~0] {30632#(= main_~p6~0 0)} is VALID [2022-04-07 21:19:29,605 INFO L290 TraceCheckUtils]: 19: Hoare triple {30632#(= main_~p6~0 0)} [256] L113-1-->L119-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {30632#(= main_~p6~0 0)} is VALID [2022-04-07 21:19:29,606 INFO L290 TraceCheckUtils]: 20: Hoare triple {30632#(= main_~p6~0 0)} [260] L119-1-->L124-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {30632#(= main_~p6~0 0)} is VALID [2022-04-07 21:19:29,606 INFO L290 TraceCheckUtils]: 21: Hoare triple {30632#(= main_~p6~0 0)} [266] L124-1-->L129-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {30632#(= main_~p6~0 0)} is VALID [2022-04-07 21:19:29,606 INFO L290 TraceCheckUtils]: 22: Hoare triple {30632#(= main_~p6~0 0)} [270] L129-1-->L134-1: Formula: (= v_main_~p4~0_1 0) InVars {main_~p4~0=v_main_~p4~0_1} OutVars{main_~p4~0=v_main_~p4~0_1} AuxVars[] AssignedVars[] {30632#(= main_~p6~0 0)} is VALID [2022-04-07 21:19:29,606 INFO L290 TraceCheckUtils]: 23: Hoare triple {30632#(= main_~p6~0 0)} [274] L134-1-->L139-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {30632#(= main_~p6~0 0)} is VALID [2022-04-07 21:19:29,607 INFO L290 TraceCheckUtils]: 24: Hoare triple {30632#(= main_~p6~0 0)} [277] L139-1-->L145: Formula: (not (= v_main_~p6~0_2 0)) InVars {main_~p6~0=v_main_~p6~0_2} OutVars{main_~p6~0=v_main_~p6~0_2} AuxVars[] AssignedVars[] {30628#false} is VALID [2022-04-07 21:19:29,607 INFO L290 TraceCheckUtils]: 25: Hoare triple {30628#false} [279] L145-->L170-1: Formula: (not (= v_main_~lk6~0_2 1)) InVars {main_~lk6~0=v_main_~lk6~0_2} OutVars{main_~lk6~0=v_main_~lk6~0_2} AuxVars[] AssignedVars[] {30628#false} is VALID [2022-04-07 21:19:29,607 INFO L290 TraceCheckUtils]: 26: Hoare triple {30628#false} [261] L170-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30628#false} is VALID [2022-04-07 21:19:29,607 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 21:19:29,607 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 21:19:29,607 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2145086674] [2022-04-07 21:19:29,607 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2145086674] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 21:19:29,607 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 21:19:29,607 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-07 21:19:29,607 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1159529947] [2022-04-07 21:19:29,607 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 21:19:29,608 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-07 21:19:29,608 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 21:19:29,608 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:29,620 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 27 edges. 27 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:19:29,621 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-07 21:19:29,621 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 21:19:29,621 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-07 21:19:29,621 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-07 21:19:29,621 INFO L87 Difference]: Start difference. First operand 1545 states and 2391 transitions. Second operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:29,858 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:19:29,859 INFO L93 Difference]: Finished difference Result 2091 states and 3208 transitions. [2022-04-07 21:19:29,859 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-07 21:19:29,859 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-07 21:19:29,859 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 21:19:29,859 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:29,860 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 131 transitions. [2022-04-07 21:19:29,860 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:29,861 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 131 transitions. [2022-04-07 21:19:29,861 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 131 transitions. [2022-04-07 21:19:29,945 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 131 edges. 131 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:19:30,056 INFO L225 Difference]: With dead ends: 2091 [2022-04-07 21:19:30,056 INFO L226 Difference]: Without dead ends: 2091 [2022-04-07 21:19:30,057 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-07 21:19:30,057 INFO L913 BasicCegarLoop]: 106 mSDtfsCounter, 133 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 65 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 133 SdHoareTripleChecker+Valid, 113 SdHoareTripleChecker+Invalid, 68 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 65 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 21:19:30,057 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [133 Valid, 113 Invalid, 68 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 65 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 21:19:30,058 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2091 states. [2022-04-07 21:19:30,079 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2091 to 2089. [2022-04-07 21:19:30,079 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 21:19:30,081 INFO L82 GeneralOperation]: Start isEquivalent. First operand 2091 states. Second operand has 2089 states, 2085 states have (on average 1.5366906474820143) internal successors, (3204), 2085 states have internal predecessors, (3204), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:30,083 INFO L74 IsIncluded]: Start isIncluded. First operand 2091 states. Second operand has 2089 states, 2085 states have (on average 1.5366906474820143) internal successors, (3204), 2085 states have internal predecessors, (3204), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:30,084 INFO L87 Difference]: Start difference. First operand 2091 states. Second operand has 2089 states, 2085 states have (on average 1.5366906474820143) internal successors, (3204), 2085 states have internal predecessors, (3204), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:30,185 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:19:30,186 INFO L93 Difference]: Finished difference Result 2091 states and 3208 transitions. [2022-04-07 21:19:30,186 INFO L276 IsEmpty]: Start isEmpty. Operand 2091 states and 3208 transitions. [2022-04-07 21:19:30,188 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:19:30,188 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:19:30,190 INFO L74 IsIncluded]: Start isIncluded. First operand has 2089 states, 2085 states have (on average 1.5366906474820143) internal successors, (3204), 2085 states have internal predecessors, (3204), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 2091 states. [2022-04-07 21:19:30,192 INFO L87 Difference]: Start difference. First operand has 2089 states, 2085 states have (on average 1.5366906474820143) internal successors, (3204), 2085 states have internal predecessors, (3204), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 2091 states. [2022-04-07 21:19:30,294 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:19:30,295 INFO L93 Difference]: Finished difference Result 2091 states and 3208 transitions. [2022-04-07 21:19:30,295 INFO L276 IsEmpty]: Start isEmpty. Operand 2091 states and 3208 transitions. [2022-04-07 21:19:30,297 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:19:30,297 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:19:30,297 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 21:19:30,297 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 21:19:30,299 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2089 states, 2085 states have (on average 1.5366906474820143) internal successors, (3204), 2085 states have internal predecessors, (3204), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:30,404 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2089 states to 2089 states and 3207 transitions. [2022-04-07 21:19:30,404 INFO L78 Accepts]: Start accepts. Automaton has 2089 states and 3207 transitions. Word has length 27 [2022-04-07 21:19:30,405 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 21:19:30,405 INFO L478 AbstractCegarLoop]: Abstraction has 2089 states and 3207 transitions. [2022-04-07 21:19:30,405 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:30,405 INFO L276 IsEmpty]: Start isEmpty. Operand 2089 states and 3207 transitions. [2022-04-07 21:19:30,406 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2022-04-07 21:19:30,406 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 21:19:30,406 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 21:19:30,406 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2022-04-07 21:19:30,406 INFO L403 AbstractCegarLoop]: === Iteration 17 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 21:19:30,407 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 21:19:30,407 INFO L85 PathProgramCache]: Analyzing trace with hash -2081877160, now seen corresponding path program 1 times [2022-04-07 21:19:30,407 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 21:19:30,407 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1423086006] [2022-04-07 21:19:30,407 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 21:19:30,407 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 21:19:30,418 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:19:30,428 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 21:19:30,429 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:19:30,431 INFO L290 TraceCheckUtils]: 0: Hoare triple {39007#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [222] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {39001#true} is VALID [2022-04-07 21:19:30,431 INFO L290 TraceCheckUtils]: 1: Hoare triple {39001#true} [225] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {39001#true} is VALID [2022-04-07 21:19:30,431 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {39001#true} {39001#true} [301] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {39001#true} is VALID [2022-04-07 21:19:30,432 INFO L272 TraceCheckUtils]: 0: Hoare triple {39001#true} [220] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {39007#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 21:19:30,432 INFO L290 TraceCheckUtils]: 1: Hoare triple {39007#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [222] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {39001#true} is VALID [2022-04-07 21:19:30,432 INFO L290 TraceCheckUtils]: 2: Hoare triple {39001#true} [225] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {39001#true} is VALID [2022-04-07 21:19:30,432 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {39001#true} {39001#true} [301] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {39001#true} is VALID [2022-04-07 21:19:30,432 INFO L272 TraceCheckUtils]: 4: Hoare triple {39001#true} [221] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {39001#true} is VALID [2022-04-07 21:19:30,432 INFO L290 TraceCheckUtils]: 5: Hoare triple {39001#true} [224] mainENTRY-->L169-1: Formula: (and (= v_main_~p5~0_2 |v_main_#t~nondet8_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (= v_main_~p4~0_2 |v_main_#t~nondet7_2|)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~lk3~0=v_main_~lk3~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p2~0=v_main_~p2~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_2, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p5~0=v_main_~p5~0_2, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~lk4~0=v_main_~lk4~0_3, main_~p3~0=v_main_~p3~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet14, main_#t~nondet13, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {39001#true} is VALID [2022-04-07 21:19:30,432 INFO L290 TraceCheckUtils]: 6: Hoare triple {39001#true} [228] L169-1-->L46: Formula: (and (= |v_main_#t~nondet15_2| v_main_~cond~0_2) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet15=|v_main_#t~nondet15_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet15, main_~cond~0] {39001#true} is VALID [2022-04-07 21:19:30,432 INFO L290 TraceCheckUtils]: 7: Hoare triple {39001#true} [231] L46-->L73: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_3 0) (= v_main_~lk5~0_5 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0) (= v_main_~lk4~0_4 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk1~0=v_main_~lk1~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_5, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk4~0=v_main_~lk4~0_4, main_~lk6~0=v_main_~lk6~0_3, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk2~0, main_~lk3~0, main_~lk11~0, main_~lk1~0, main_~lk10~0, main_~lk5~0, main_~lk4~0, main_~lk6~0, main_~lk9~0, main_~lk8~0, main_~lk7~0] {39001#true} is VALID [2022-04-07 21:19:30,433 INFO L290 TraceCheckUtils]: 8: Hoare triple {39001#true} [234] L73-->L73-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {39001#true} is VALID [2022-04-07 21:19:30,433 INFO L290 TraceCheckUtils]: 9: Hoare triple {39001#true} [236] L73-2-->L77-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {39001#true} is VALID [2022-04-07 21:19:30,433 INFO L290 TraceCheckUtils]: 10: Hoare triple {39001#true} [238] L77-1-->L81-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {39001#true} is VALID [2022-04-07 21:19:30,433 INFO L290 TraceCheckUtils]: 11: Hoare triple {39001#true} [240] L81-1-->L85-1: Formula: (= v_main_~p4~0_4 0) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4} AuxVars[] AssignedVars[] {39001#true} is VALID [2022-04-07 21:19:30,433 INFO L290 TraceCheckUtils]: 12: Hoare triple {39001#true} [242] L85-1-->L89-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {39001#true} is VALID [2022-04-07 21:19:30,433 INFO L290 TraceCheckUtils]: 13: Hoare triple {39001#true} [243] L89-1-->L93-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {39006#(not (= main_~p6~0 0))} is VALID [2022-04-07 21:19:30,433 INFO L290 TraceCheckUtils]: 14: Hoare triple {39006#(not (= main_~p6~0 0))} [245] L93-1-->L97-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {39006#(not (= main_~p6~0 0))} is VALID [2022-04-07 21:19:30,434 INFO L290 TraceCheckUtils]: 15: Hoare triple {39006#(not (= main_~p6~0 0))} [247] L97-1-->L101-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {39006#(not (= main_~p6~0 0))} is VALID [2022-04-07 21:19:30,434 INFO L290 TraceCheckUtils]: 16: Hoare triple {39006#(not (= main_~p6~0 0))} [249] L101-1-->L105-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {39006#(not (= main_~p6~0 0))} is VALID [2022-04-07 21:19:30,434 INFO L290 TraceCheckUtils]: 17: Hoare triple {39006#(not (= main_~p6~0 0))} [251] L105-1-->L109-1: Formula: (and (= v_main_~lk10~0_6 1) (not (= v_main_~p10~0_4 0))) InVars {main_~p10~0=v_main_~p10~0_4} OutVars{main_~lk10~0=v_main_~lk10~0_6, main_~p10~0=v_main_~p10~0_4} AuxVars[] AssignedVars[main_~lk10~0] {39006#(not (= main_~p6~0 0))} is VALID [2022-04-07 21:19:30,434 INFO L290 TraceCheckUtils]: 18: Hoare triple {39006#(not (= main_~p6~0 0))} [253] L109-1-->L113-1: Formula: (and (= v_main_~lk11~0_6 1) (not (= v_main_~p11~0_4 0))) InVars {main_~p11~0=v_main_~p11~0_4} OutVars{main_~lk11~0=v_main_~lk11~0_6, main_~p11~0=v_main_~p11~0_4} AuxVars[] AssignedVars[main_~lk11~0] {39006#(not (= main_~p6~0 0))} is VALID [2022-04-07 21:19:30,435 INFO L290 TraceCheckUtils]: 19: Hoare triple {39006#(not (= main_~p6~0 0))} [256] L113-1-->L119-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {39006#(not (= main_~p6~0 0))} is VALID [2022-04-07 21:19:30,435 INFO L290 TraceCheckUtils]: 20: Hoare triple {39006#(not (= main_~p6~0 0))} [260] L119-1-->L124-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {39006#(not (= main_~p6~0 0))} is VALID [2022-04-07 21:19:30,435 INFO L290 TraceCheckUtils]: 21: Hoare triple {39006#(not (= main_~p6~0 0))} [266] L124-1-->L129-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {39006#(not (= main_~p6~0 0))} is VALID [2022-04-07 21:19:30,435 INFO L290 TraceCheckUtils]: 22: Hoare triple {39006#(not (= main_~p6~0 0))} [270] L129-1-->L134-1: Formula: (= v_main_~p4~0_1 0) InVars {main_~p4~0=v_main_~p4~0_1} OutVars{main_~p4~0=v_main_~p4~0_1} AuxVars[] AssignedVars[] {39006#(not (= main_~p6~0 0))} is VALID [2022-04-07 21:19:30,436 INFO L290 TraceCheckUtils]: 23: Hoare triple {39006#(not (= main_~p6~0 0))} [274] L134-1-->L139-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {39006#(not (= main_~p6~0 0))} is VALID [2022-04-07 21:19:30,436 INFO L290 TraceCheckUtils]: 24: Hoare triple {39006#(not (= main_~p6~0 0))} [278] L139-1-->L144-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {39002#false} is VALID [2022-04-07 21:19:30,436 INFO L290 TraceCheckUtils]: 25: Hoare triple {39002#false} [281] L144-1-->L150: Formula: (not (= v_main_~p7~0_2 0)) InVars {main_~p7~0=v_main_~p7~0_2} OutVars{main_~p7~0=v_main_~p7~0_2} AuxVars[] AssignedVars[] {39002#false} is VALID [2022-04-07 21:19:30,436 INFO L290 TraceCheckUtils]: 26: Hoare triple {39002#false} [283] L150-->L170-1: Formula: (not (= v_main_~lk7~0_3 1)) InVars {main_~lk7~0=v_main_~lk7~0_3} OutVars{main_~lk7~0=v_main_~lk7~0_3} AuxVars[] AssignedVars[] {39002#false} is VALID [2022-04-07 21:19:30,436 INFO L290 TraceCheckUtils]: 27: Hoare triple {39002#false} [261] L170-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {39002#false} is VALID [2022-04-07 21:19:30,436 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 21:19:30,436 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 21:19:30,436 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1423086006] [2022-04-07 21:19:30,436 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1423086006] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 21:19:30,436 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 21:19:30,436 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-07 21:19:30,437 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [711294761] [2022-04-07 21:19:30,437 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 21:19:30,437 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-07 21:19:30,437 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 21:19:30,437 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:30,451 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 28 edges. 28 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:19:30,451 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-07 21:19:30,451 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 21:19:30,452 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-07 21:19:30,452 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-07 21:19:30,452 INFO L87 Difference]: Start difference. First operand 2089 states and 3207 transitions. Second operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:30,721 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:19:30,722 INFO L93 Difference]: Finished difference Result 2123 states and 3208 transitions. [2022-04-07 21:19:30,722 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-07 21:19:30,722 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-07 21:19:30,722 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 21:19:30,722 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:30,723 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 130 transitions. [2022-04-07 21:19:30,723 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:30,723 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 130 transitions. [2022-04-07 21:19:30,723 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 130 transitions. [2022-04-07 21:19:30,799 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 130 edges. 130 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:19:30,915 INFO L225 Difference]: With dead ends: 2123 [2022-04-07 21:19:30,915 INFO L226 Difference]: Without dead ends: 2123 [2022-04-07 21:19:30,915 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-07 21:19:30,915 INFO L913 BasicCegarLoop]: 101 mSDtfsCounter, 139 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 64 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 139 SdHoareTripleChecker+Valid, 108 SdHoareTripleChecker+Invalid, 66 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 64 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 21:19:30,916 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [139 Valid, 108 Invalid, 66 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 64 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 21:19:30,917 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2123 states. [2022-04-07 21:19:30,934 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2123 to 2121. [2022-04-07 21:19:30,934 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 21:19:30,936 INFO L82 GeneralOperation]: Start isEquivalent. First operand 2123 states. Second operand has 2121 states, 2117 states have (on average 1.5134624468587623) internal successors, (3204), 2117 states have internal predecessors, (3204), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:30,938 INFO L74 IsIncluded]: Start isIncluded. First operand 2123 states. Second operand has 2121 states, 2117 states have (on average 1.5134624468587623) internal successors, (3204), 2117 states have internal predecessors, (3204), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:30,940 INFO L87 Difference]: Start difference. First operand 2123 states. Second operand has 2121 states, 2117 states have (on average 1.5134624468587623) internal successors, (3204), 2117 states have internal predecessors, (3204), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:31,044 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:19:31,044 INFO L93 Difference]: Finished difference Result 2123 states and 3208 transitions. [2022-04-07 21:19:31,044 INFO L276 IsEmpty]: Start isEmpty. Operand 2123 states and 3208 transitions. [2022-04-07 21:19:31,046 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:19:31,046 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:19:31,049 INFO L74 IsIncluded]: Start isIncluded. First operand has 2121 states, 2117 states have (on average 1.5134624468587623) internal successors, (3204), 2117 states have internal predecessors, (3204), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 2123 states. [2022-04-07 21:19:31,050 INFO L87 Difference]: Start difference. First operand has 2121 states, 2117 states have (on average 1.5134624468587623) internal successors, (3204), 2117 states have internal predecessors, (3204), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 2123 states. [2022-04-07 21:19:31,155 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:19:31,155 INFO L93 Difference]: Finished difference Result 2123 states and 3208 transitions. [2022-04-07 21:19:31,155 INFO L276 IsEmpty]: Start isEmpty. Operand 2123 states and 3208 transitions. [2022-04-07 21:19:31,157 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:19:31,157 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:19:31,157 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 21:19:31,157 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 21:19:31,159 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2121 states, 2117 states have (on average 1.5134624468587623) internal successors, (3204), 2117 states have internal predecessors, (3204), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:31,266 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2121 states to 2121 states and 3207 transitions. [2022-04-07 21:19:31,267 INFO L78 Accepts]: Start accepts. Automaton has 2121 states and 3207 transitions. Word has length 28 [2022-04-07 21:19:31,267 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 21:19:31,267 INFO L478 AbstractCegarLoop]: Abstraction has 2121 states and 3207 transitions. [2022-04-07 21:19:31,267 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:31,267 INFO L276 IsEmpty]: Start isEmpty. Operand 2121 states and 3207 transitions. [2022-04-07 21:19:31,268 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2022-04-07 21:19:31,268 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 21:19:31,268 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 21:19:31,268 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2022-04-07 21:19:31,268 INFO L403 AbstractCegarLoop]: === Iteration 18 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 21:19:31,269 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 21:19:31,269 INFO L85 PathProgramCache]: Analyzing trace with hash -574325351, now seen corresponding path program 1 times [2022-04-07 21:19:31,269 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 21:19:31,269 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [828428201] [2022-04-07 21:19:31,269 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 21:19:31,269 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 21:19:31,278 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:19:31,288 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 21:19:31,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:19:31,291 INFO L290 TraceCheckUtils]: 0: Hoare triple {47509#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [222] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {47503#true} is VALID [2022-04-07 21:19:31,291 INFO L290 TraceCheckUtils]: 1: Hoare triple {47503#true} [225] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {47503#true} is VALID [2022-04-07 21:19:31,291 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {47503#true} {47503#true} [301] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {47503#true} is VALID [2022-04-07 21:19:31,291 INFO L272 TraceCheckUtils]: 0: Hoare triple {47503#true} [220] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {47509#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 21:19:31,291 INFO L290 TraceCheckUtils]: 1: Hoare triple {47509#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [222] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {47503#true} is VALID [2022-04-07 21:19:31,291 INFO L290 TraceCheckUtils]: 2: Hoare triple {47503#true} [225] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {47503#true} is VALID [2022-04-07 21:19:31,292 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {47503#true} {47503#true} [301] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {47503#true} is VALID [2022-04-07 21:19:31,292 INFO L272 TraceCheckUtils]: 4: Hoare triple {47503#true} [221] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {47503#true} is VALID [2022-04-07 21:19:31,292 INFO L290 TraceCheckUtils]: 5: Hoare triple {47503#true} [224] mainENTRY-->L169-1: Formula: (and (= v_main_~p5~0_2 |v_main_#t~nondet8_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (= v_main_~p4~0_2 |v_main_#t~nondet7_2|)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~lk3~0=v_main_~lk3~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p2~0=v_main_~p2~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_2, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p5~0=v_main_~p5~0_2, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~lk4~0=v_main_~lk4~0_3, main_~p3~0=v_main_~p3~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet14, main_#t~nondet13, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {47503#true} is VALID [2022-04-07 21:19:31,292 INFO L290 TraceCheckUtils]: 6: Hoare triple {47503#true} [228] L169-1-->L46: Formula: (and (= |v_main_#t~nondet15_2| v_main_~cond~0_2) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet15=|v_main_#t~nondet15_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet15, main_~cond~0] {47503#true} is VALID [2022-04-07 21:19:31,292 INFO L290 TraceCheckUtils]: 7: Hoare triple {47503#true} [231] L46-->L73: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_3 0) (= v_main_~lk5~0_5 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0) (= v_main_~lk4~0_4 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk1~0=v_main_~lk1~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_5, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk4~0=v_main_~lk4~0_4, main_~lk6~0=v_main_~lk6~0_3, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk2~0, main_~lk3~0, main_~lk11~0, main_~lk1~0, main_~lk10~0, main_~lk5~0, main_~lk4~0, main_~lk6~0, main_~lk9~0, main_~lk8~0, main_~lk7~0] {47503#true} is VALID [2022-04-07 21:19:31,292 INFO L290 TraceCheckUtils]: 8: Hoare triple {47503#true} [234] L73-->L73-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {47503#true} is VALID [2022-04-07 21:19:31,292 INFO L290 TraceCheckUtils]: 9: Hoare triple {47503#true} [236] L73-2-->L77-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {47503#true} is VALID [2022-04-07 21:19:31,292 INFO L290 TraceCheckUtils]: 10: Hoare triple {47503#true} [238] L77-1-->L81-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {47503#true} is VALID [2022-04-07 21:19:31,292 INFO L290 TraceCheckUtils]: 11: Hoare triple {47503#true} [240] L81-1-->L85-1: Formula: (= v_main_~p4~0_4 0) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4} AuxVars[] AssignedVars[] {47503#true} is VALID [2022-04-07 21:19:31,292 INFO L290 TraceCheckUtils]: 12: Hoare triple {47503#true} [242] L85-1-->L89-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {47503#true} is VALID [2022-04-07 21:19:31,292 INFO L290 TraceCheckUtils]: 13: Hoare triple {47503#true} [244] L89-1-->L93-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {47503#true} is VALID [2022-04-07 21:19:31,293 INFO L290 TraceCheckUtils]: 14: Hoare triple {47503#true} [245] L93-1-->L97-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {47508#(= main_~lk7~0 1)} is VALID [2022-04-07 21:19:31,293 INFO L290 TraceCheckUtils]: 15: Hoare triple {47508#(= main_~lk7~0 1)} [247] L97-1-->L101-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {47508#(= main_~lk7~0 1)} is VALID [2022-04-07 21:19:31,293 INFO L290 TraceCheckUtils]: 16: Hoare triple {47508#(= main_~lk7~0 1)} [249] L101-1-->L105-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {47508#(= main_~lk7~0 1)} is VALID [2022-04-07 21:19:31,293 INFO L290 TraceCheckUtils]: 17: Hoare triple {47508#(= main_~lk7~0 1)} [251] L105-1-->L109-1: Formula: (and (= v_main_~lk10~0_6 1) (not (= v_main_~p10~0_4 0))) InVars {main_~p10~0=v_main_~p10~0_4} OutVars{main_~lk10~0=v_main_~lk10~0_6, main_~p10~0=v_main_~p10~0_4} AuxVars[] AssignedVars[main_~lk10~0] {47508#(= main_~lk7~0 1)} is VALID [2022-04-07 21:19:31,293 INFO L290 TraceCheckUtils]: 18: Hoare triple {47508#(= main_~lk7~0 1)} [253] L109-1-->L113-1: Formula: (and (= v_main_~lk11~0_6 1) (not (= v_main_~p11~0_4 0))) InVars {main_~p11~0=v_main_~p11~0_4} OutVars{main_~lk11~0=v_main_~lk11~0_6, main_~p11~0=v_main_~p11~0_4} AuxVars[] AssignedVars[main_~lk11~0] {47508#(= main_~lk7~0 1)} is VALID [2022-04-07 21:19:31,294 INFO L290 TraceCheckUtils]: 19: Hoare triple {47508#(= main_~lk7~0 1)} [256] L113-1-->L119-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {47508#(= main_~lk7~0 1)} is VALID [2022-04-07 21:19:31,294 INFO L290 TraceCheckUtils]: 20: Hoare triple {47508#(= main_~lk7~0 1)} [260] L119-1-->L124-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {47508#(= main_~lk7~0 1)} is VALID [2022-04-07 21:19:31,294 INFO L290 TraceCheckUtils]: 21: Hoare triple {47508#(= main_~lk7~0 1)} [266] L124-1-->L129-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {47508#(= main_~lk7~0 1)} is VALID [2022-04-07 21:19:31,294 INFO L290 TraceCheckUtils]: 22: Hoare triple {47508#(= main_~lk7~0 1)} [270] L129-1-->L134-1: Formula: (= v_main_~p4~0_1 0) InVars {main_~p4~0=v_main_~p4~0_1} OutVars{main_~p4~0=v_main_~p4~0_1} AuxVars[] AssignedVars[] {47508#(= main_~lk7~0 1)} is VALID [2022-04-07 21:19:31,295 INFO L290 TraceCheckUtils]: 23: Hoare triple {47508#(= main_~lk7~0 1)} [274] L134-1-->L139-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {47508#(= main_~lk7~0 1)} is VALID [2022-04-07 21:19:31,295 INFO L290 TraceCheckUtils]: 24: Hoare triple {47508#(= main_~lk7~0 1)} [278] L139-1-->L144-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {47508#(= main_~lk7~0 1)} is VALID [2022-04-07 21:19:31,295 INFO L290 TraceCheckUtils]: 25: Hoare triple {47508#(= main_~lk7~0 1)} [281] L144-1-->L150: Formula: (not (= v_main_~p7~0_2 0)) InVars {main_~p7~0=v_main_~p7~0_2} OutVars{main_~p7~0=v_main_~p7~0_2} AuxVars[] AssignedVars[] {47508#(= main_~lk7~0 1)} is VALID [2022-04-07 21:19:31,295 INFO L290 TraceCheckUtils]: 26: Hoare triple {47508#(= main_~lk7~0 1)} [283] L150-->L170-1: Formula: (not (= v_main_~lk7~0_3 1)) InVars {main_~lk7~0=v_main_~lk7~0_3} OutVars{main_~lk7~0=v_main_~lk7~0_3} AuxVars[] AssignedVars[] {47504#false} is VALID [2022-04-07 21:19:31,295 INFO L290 TraceCheckUtils]: 27: Hoare triple {47504#false} [261] L170-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {47504#false} is VALID [2022-04-07 21:19:31,295 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 21:19:31,296 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 21:19:31,296 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [828428201] [2022-04-07 21:19:31,296 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [828428201] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 21:19:31,296 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 21:19:31,296 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-07 21:19:31,296 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [976713761] [2022-04-07 21:19:31,296 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 21:19:31,296 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-07 21:19:31,296 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 21:19:31,296 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:31,309 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 28 edges. 28 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:19:31,309 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-07 21:19:31,309 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 21:19:31,309 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-07 21:19:31,309 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-07 21:19:31,309 INFO L87 Difference]: Start difference. First operand 2121 states and 3207 transitions. Second operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:31,769 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:19:31,770 INFO L93 Difference]: Finished difference Result 3723 states and 5672 transitions. [2022-04-07 21:19:31,770 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-07 21:19:31,770 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-07 21:19:31,770 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 21:19:31,770 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:31,771 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 118 transitions. [2022-04-07 21:19:31,772 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:31,772 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 118 transitions. [2022-04-07 21:19:31,772 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 118 transitions. [2022-04-07 21:19:31,843 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 118 edges. 118 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:19:32,210 INFO L225 Difference]: With dead ends: 3723 [2022-04-07 21:19:32,211 INFO L226 Difference]: Without dead ends: 3723 [2022-04-07 21:19:32,211 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-07 21:19:32,211 INFO L913 BasicCegarLoop]: 71 mSDtfsCounter, 143 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 66 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 143 SdHoareTripleChecker+Valid, 78 SdHoareTripleChecker+Invalid, 68 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 66 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 21:19:32,211 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [143 Valid, 78 Invalid, 68 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 66 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 21:19:32,213 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3723 states. [2022-04-07 21:19:32,243 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3723 to 3081. [2022-04-07 21:19:32,243 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 21:19:32,246 INFO L82 GeneralOperation]: Start isEquivalent. First operand 3723 states. Second operand has 3081 states, 3077 states have (on average 1.4676633084172896) internal successors, (4516), 3077 states have internal predecessors, (4516), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:32,248 INFO L74 IsIncluded]: Start isIncluded. First operand 3723 states. Second operand has 3081 states, 3077 states have (on average 1.4676633084172896) internal successors, (4516), 3077 states have internal predecessors, (4516), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:32,250 INFO L87 Difference]: Start difference. First operand 3723 states. Second operand has 3081 states, 3077 states have (on average 1.4676633084172896) internal successors, (4516), 3077 states have internal predecessors, (4516), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:32,581 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:19:32,581 INFO L93 Difference]: Finished difference Result 3723 states and 5672 transitions. [2022-04-07 21:19:32,581 INFO L276 IsEmpty]: Start isEmpty. Operand 3723 states and 5672 transitions. [2022-04-07 21:19:32,585 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:19:32,585 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:19:32,589 INFO L74 IsIncluded]: Start isIncluded. First operand has 3081 states, 3077 states have (on average 1.4676633084172896) internal successors, (4516), 3077 states have internal predecessors, (4516), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 3723 states. [2022-04-07 21:19:32,592 INFO L87 Difference]: Start difference. First operand has 3081 states, 3077 states have (on average 1.4676633084172896) internal successors, (4516), 3077 states have internal predecessors, (4516), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 3723 states. [2022-04-07 21:19:32,938 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:19:32,938 INFO L93 Difference]: Finished difference Result 3723 states and 5672 transitions. [2022-04-07 21:19:32,938 INFO L276 IsEmpty]: Start isEmpty. Operand 3723 states and 5672 transitions. [2022-04-07 21:19:32,941 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:19:32,941 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:19:32,941 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 21:19:32,941 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 21:19:32,944 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3081 states, 3077 states have (on average 1.4676633084172896) internal successors, (4516), 3077 states have internal predecessors, (4516), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:33,192 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3081 states to 3081 states and 4519 transitions. [2022-04-07 21:19:33,193 INFO L78 Accepts]: Start accepts. Automaton has 3081 states and 4519 transitions. Word has length 28 [2022-04-07 21:19:33,193 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 21:19:33,193 INFO L478 AbstractCegarLoop]: Abstraction has 3081 states and 4519 transitions. [2022-04-07 21:19:33,193 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:33,193 INFO L276 IsEmpty]: Start isEmpty. Operand 3081 states and 4519 transitions. [2022-04-07 21:19:33,195 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2022-04-07 21:19:33,195 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 21:19:33,195 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 21:19:33,195 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2022-04-07 21:19:33,195 INFO L403 AbstractCegarLoop]: === Iteration 19 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 21:19:33,196 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 21:19:33,196 INFO L85 PathProgramCache]: Analyzing trace with hash -1079883976, now seen corresponding path program 1 times [2022-04-07 21:19:33,196 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 21:19:33,196 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1802948298] [2022-04-07 21:19:33,196 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 21:19:33,196 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 21:19:33,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:19:33,219 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 21:19:33,220 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:19:33,222 INFO L290 TraceCheckUtils]: 0: Hoare triple {61771#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [222] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {61765#true} is VALID [2022-04-07 21:19:33,223 INFO L290 TraceCheckUtils]: 1: Hoare triple {61765#true} [225] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {61765#true} is VALID [2022-04-07 21:19:33,223 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {61765#true} {61765#true} [301] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {61765#true} is VALID [2022-04-07 21:19:33,228 INFO L272 TraceCheckUtils]: 0: Hoare triple {61765#true} [220] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {61771#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 21:19:33,228 INFO L290 TraceCheckUtils]: 1: Hoare triple {61771#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [222] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {61765#true} is VALID [2022-04-07 21:19:33,229 INFO L290 TraceCheckUtils]: 2: Hoare triple {61765#true} [225] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {61765#true} is VALID [2022-04-07 21:19:33,229 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {61765#true} {61765#true} [301] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {61765#true} is VALID [2022-04-07 21:19:33,229 INFO L272 TraceCheckUtils]: 4: Hoare triple {61765#true} [221] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {61765#true} is VALID [2022-04-07 21:19:33,229 INFO L290 TraceCheckUtils]: 5: Hoare triple {61765#true} [224] mainENTRY-->L169-1: Formula: (and (= v_main_~p5~0_2 |v_main_#t~nondet8_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (= v_main_~p4~0_2 |v_main_#t~nondet7_2|)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~lk3~0=v_main_~lk3~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p2~0=v_main_~p2~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_2, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p5~0=v_main_~p5~0_2, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~lk4~0=v_main_~lk4~0_3, main_~p3~0=v_main_~p3~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet14, main_#t~nondet13, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {61765#true} is VALID [2022-04-07 21:19:33,229 INFO L290 TraceCheckUtils]: 6: Hoare triple {61765#true} [228] L169-1-->L46: Formula: (and (= |v_main_#t~nondet15_2| v_main_~cond~0_2) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet15=|v_main_#t~nondet15_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet15, main_~cond~0] {61765#true} is VALID [2022-04-07 21:19:33,229 INFO L290 TraceCheckUtils]: 7: Hoare triple {61765#true} [231] L46-->L73: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_3 0) (= v_main_~lk5~0_5 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0) (= v_main_~lk4~0_4 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk1~0=v_main_~lk1~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_5, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk4~0=v_main_~lk4~0_4, main_~lk6~0=v_main_~lk6~0_3, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk2~0, main_~lk3~0, main_~lk11~0, main_~lk1~0, main_~lk10~0, main_~lk5~0, main_~lk4~0, main_~lk6~0, main_~lk9~0, main_~lk8~0, main_~lk7~0] {61765#true} is VALID [2022-04-07 21:19:33,229 INFO L290 TraceCheckUtils]: 8: Hoare triple {61765#true} [234] L73-->L73-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {61765#true} is VALID [2022-04-07 21:19:33,229 INFO L290 TraceCheckUtils]: 9: Hoare triple {61765#true} [236] L73-2-->L77-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {61765#true} is VALID [2022-04-07 21:19:33,229 INFO L290 TraceCheckUtils]: 10: Hoare triple {61765#true} [238] L77-1-->L81-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {61765#true} is VALID [2022-04-07 21:19:33,229 INFO L290 TraceCheckUtils]: 11: Hoare triple {61765#true} [240] L81-1-->L85-1: Formula: (= v_main_~p4~0_4 0) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4} AuxVars[] AssignedVars[] {61765#true} is VALID [2022-04-07 21:19:33,229 INFO L290 TraceCheckUtils]: 12: Hoare triple {61765#true} [242] L85-1-->L89-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {61765#true} is VALID [2022-04-07 21:19:33,229 INFO L290 TraceCheckUtils]: 13: Hoare triple {61765#true} [244] L89-1-->L93-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {61765#true} is VALID [2022-04-07 21:19:33,230 INFO L290 TraceCheckUtils]: 14: Hoare triple {61765#true} [246] L93-1-->L97-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {61770#(= main_~p7~0 0)} is VALID [2022-04-07 21:19:33,230 INFO L290 TraceCheckUtils]: 15: Hoare triple {61770#(= main_~p7~0 0)} [247] L97-1-->L101-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {61770#(= main_~p7~0 0)} is VALID [2022-04-07 21:19:33,230 INFO L290 TraceCheckUtils]: 16: Hoare triple {61770#(= main_~p7~0 0)} [249] L101-1-->L105-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {61770#(= main_~p7~0 0)} is VALID [2022-04-07 21:19:33,230 INFO L290 TraceCheckUtils]: 17: Hoare triple {61770#(= main_~p7~0 0)} [251] L105-1-->L109-1: Formula: (and (= v_main_~lk10~0_6 1) (not (= v_main_~p10~0_4 0))) InVars {main_~p10~0=v_main_~p10~0_4} OutVars{main_~lk10~0=v_main_~lk10~0_6, main_~p10~0=v_main_~p10~0_4} AuxVars[] AssignedVars[main_~lk10~0] {61770#(= main_~p7~0 0)} is VALID [2022-04-07 21:19:33,231 INFO L290 TraceCheckUtils]: 18: Hoare triple {61770#(= main_~p7~0 0)} [253] L109-1-->L113-1: Formula: (and (= v_main_~lk11~0_6 1) (not (= v_main_~p11~0_4 0))) InVars {main_~p11~0=v_main_~p11~0_4} OutVars{main_~lk11~0=v_main_~lk11~0_6, main_~p11~0=v_main_~p11~0_4} AuxVars[] AssignedVars[main_~lk11~0] {61770#(= main_~p7~0 0)} is VALID [2022-04-07 21:19:33,231 INFO L290 TraceCheckUtils]: 19: Hoare triple {61770#(= main_~p7~0 0)} [256] L113-1-->L119-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {61770#(= main_~p7~0 0)} is VALID [2022-04-07 21:19:33,231 INFO L290 TraceCheckUtils]: 20: Hoare triple {61770#(= main_~p7~0 0)} [260] L119-1-->L124-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {61770#(= main_~p7~0 0)} is VALID [2022-04-07 21:19:33,231 INFO L290 TraceCheckUtils]: 21: Hoare triple {61770#(= main_~p7~0 0)} [266] L124-1-->L129-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {61770#(= main_~p7~0 0)} is VALID [2022-04-07 21:19:33,231 INFO L290 TraceCheckUtils]: 22: Hoare triple {61770#(= main_~p7~0 0)} [270] L129-1-->L134-1: Formula: (= v_main_~p4~0_1 0) InVars {main_~p4~0=v_main_~p4~0_1} OutVars{main_~p4~0=v_main_~p4~0_1} AuxVars[] AssignedVars[] {61770#(= main_~p7~0 0)} is VALID [2022-04-07 21:19:33,232 INFO L290 TraceCheckUtils]: 23: Hoare triple {61770#(= main_~p7~0 0)} [274] L134-1-->L139-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {61770#(= main_~p7~0 0)} is VALID [2022-04-07 21:19:33,232 INFO L290 TraceCheckUtils]: 24: Hoare triple {61770#(= main_~p7~0 0)} [278] L139-1-->L144-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {61770#(= main_~p7~0 0)} is VALID [2022-04-07 21:19:33,232 INFO L290 TraceCheckUtils]: 25: Hoare triple {61770#(= main_~p7~0 0)} [281] L144-1-->L150: Formula: (not (= v_main_~p7~0_2 0)) InVars {main_~p7~0=v_main_~p7~0_2} OutVars{main_~p7~0=v_main_~p7~0_2} AuxVars[] AssignedVars[] {61766#false} is VALID [2022-04-07 21:19:33,232 INFO L290 TraceCheckUtils]: 26: Hoare triple {61766#false} [283] L150-->L170-1: Formula: (not (= v_main_~lk7~0_3 1)) InVars {main_~lk7~0=v_main_~lk7~0_3} OutVars{main_~lk7~0=v_main_~lk7~0_3} AuxVars[] AssignedVars[] {61766#false} is VALID [2022-04-07 21:19:33,232 INFO L290 TraceCheckUtils]: 27: Hoare triple {61766#false} [261] L170-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {61766#false} is VALID [2022-04-07 21:19:33,232 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 21:19:33,233 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 21:19:33,233 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1802948298] [2022-04-07 21:19:33,233 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1802948298] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 21:19:33,233 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 21:19:33,233 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-07 21:19:33,233 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1327114617] [2022-04-07 21:19:33,233 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 21:19:33,233 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-07 21:19:33,233 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 21:19:33,234 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:33,247 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 28 edges. 28 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:19:33,247 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-07 21:19:33,247 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 21:19:33,247 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-07 21:19:33,247 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-07 21:19:33,247 INFO L87 Difference]: Start difference. First operand 3081 states and 4519 transitions. Second operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:33,782 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:19:33,782 INFO L93 Difference]: Finished difference Result 4107 states and 5960 transitions. [2022-04-07 21:19:33,782 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-07 21:19:33,782 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-07 21:19:33,782 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 21:19:33,782 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:33,783 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 129 transitions. [2022-04-07 21:19:33,783 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:33,784 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 129 transitions. [2022-04-07 21:19:33,784 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 129 transitions. [2022-04-07 21:19:33,860 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 129 edges. 129 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:19:34,298 INFO L225 Difference]: With dead ends: 4107 [2022-04-07 21:19:34,298 INFO L226 Difference]: Without dead ends: 4107 [2022-04-07 21:19:34,298 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-07 21:19:34,299 INFO L913 BasicCegarLoop]: 108 mSDtfsCounter, 127 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 64 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 127 SdHoareTripleChecker+Valid, 115 SdHoareTripleChecker+Invalid, 67 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 64 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 21:19:34,299 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [127 Valid, 115 Invalid, 67 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 64 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 21:19:34,301 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4107 states. [2022-04-07 21:19:34,335 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4107 to 4105. [2022-04-07 21:19:34,335 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 21:19:34,339 INFO L82 GeneralOperation]: Start isEquivalent. First operand 4107 states. Second operand has 4105 states, 4101 states have (on average 1.4523287003169958) internal successors, (5956), 4101 states have internal predecessors, (5956), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:34,341 INFO L74 IsIncluded]: Start isIncluded. First operand 4107 states. Second operand has 4105 states, 4101 states have (on average 1.4523287003169958) internal successors, (5956), 4101 states have internal predecessors, (5956), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:34,343 INFO L87 Difference]: Start difference. First operand 4107 states. Second operand has 4105 states, 4101 states have (on average 1.4523287003169958) internal successors, (5956), 4101 states have internal predecessors, (5956), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:34,765 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:19:34,765 INFO L93 Difference]: Finished difference Result 4107 states and 5960 transitions. [2022-04-07 21:19:34,765 INFO L276 IsEmpty]: Start isEmpty. Operand 4107 states and 5960 transitions. [2022-04-07 21:19:34,768 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:19:34,769 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:19:34,772 INFO L74 IsIncluded]: Start isIncluded. First operand has 4105 states, 4101 states have (on average 1.4523287003169958) internal successors, (5956), 4101 states have internal predecessors, (5956), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 4107 states. [2022-04-07 21:19:34,774 INFO L87 Difference]: Start difference. First operand has 4105 states, 4101 states have (on average 1.4523287003169958) internal successors, (5956), 4101 states have internal predecessors, (5956), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 4107 states. [2022-04-07 21:19:35,196 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:19:35,197 INFO L93 Difference]: Finished difference Result 4107 states and 5960 transitions. [2022-04-07 21:19:35,197 INFO L276 IsEmpty]: Start isEmpty. Operand 4107 states and 5960 transitions. [2022-04-07 21:19:35,201 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:19:35,201 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:19:35,201 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 21:19:35,201 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 21:19:35,205 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4105 states, 4101 states have (on average 1.4523287003169958) internal successors, (5956), 4101 states have internal predecessors, (5956), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:35,613 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4105 states to 4105 states and 5959 transitions. [2022-04-07 21:19:35,613 INFO L78 Accepts]: Start accepts. Automaton has 4105 states and 5959 transitions. Word has length 28 [2022-04-07 21:19:35,613 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 21:19:35,613 INFO L478 AbstractCegarLoop]: Abstraction has 4105 states and 5959 transitions. [2022-04-07 21:19:35,613 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:35,614 INFO L276 IsEmpty]: Start isEmpty. Operand 4105 states and 5959 transitions. [2022-04-07 21:19:35,615 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2022-04-07 21:19:35,616 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 21:19:35,616 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 21:19:35,616 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2022-04-07 21:19:35,616 INFO L403 AbstractCegarLoop]: === Iteration 20 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 21:19:35,616 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 21:19:35,616 INFO L85 PathProgramCache]: Analyzing trace with hash -624183917, now seen corresponding path program 1 times [2022-04-07 21:19:35,616 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 21:19:35,616 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1397568692] [2022-04-07 21:19:35,616 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 21:19:35,617 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 21:19:35,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:19:35,641 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 21:19:35,642 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:19:35,645 INFO L290 TraceCheckUtils]: 0: Hoare triple {78209#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [222] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {78203#true} is VALID [2022-04-07 21:19:35,645 INFO L290 TraceCheckUtils]: 1: Hoare triple {78203#true} [225] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {78203#true} is VALID [2022-04-07 21:19:35,645 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {78203#true} {78203#true} [301] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {78203#true} is VALID [2022-04-07 21:19:35,645 INFO L272 TraceCheckUtils]: 0: Hoare triple {78203#true} [220] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {78209#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 21:19:35,645 INFO L290 TraceCheckUtils]: 1: Hoare triple {78209#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [222] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {78203#true} is VALID [2022-04-07 21:19:35,645 INFO L290 TraceCheckUtils]: 2: Hoare triple {78203#true} [225] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {78203#true} is VALID [2022-04-07 21:19:35,645 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {78203#true} {78203#true} [301] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {78203#true} is VALID [2022-04-07 21:19:35,646 INFO L272 TraceCheckUtils]: 4: Hoare triple {78203#true} [221] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {78203#true} is VALID [2022-04-07 21:19:35,646 INFO L290 TraceCheckUtils]: 5: Hoare triple {78203#true} [224] mainENTRY-->L169-1: Formula: (and (= v_main_~p5~0_2 |v_main_#t~nondet8_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (= v_main_~p4~0_2 |v_main_#t~nondet7_2|)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~lk3~0=v_main_~lk3~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p2~0=v_main_~p2~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_2, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p5~0=v_main_~p5~0_2, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~lk4~0=v_main_~lk4~0_3, main_~p3~0=v_main_~p3~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet14, main_#t~nondet13, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {78203#true} is VALID [2022-04-07 21:19:35,646 INFO L290 TraceCheckUtils]: 6: Hoare triple {78203#true} [228] L169-1-->L46: Formula: (and (= |v_main_#t~nondet15_2| v_main_~cond~0_2) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet15=|v_main_#t~nondet15_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet15, main_~cond~0] {78203#true} is VALID [2022-04-07 21:19:35,646 INFO L290 TraceCheckUtils]: 7: Hoare triple {78203#true} [231] L46-->L73: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_3 0) (= v_main_~lk5~0_5 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0) (= v_main_~lk4~0_4 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk1~0=v_main_~lk1~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_5, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk4~0=v_main_~lk4~0_4, main_~lk6~0=v_main_~lk6~0_3, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk2~0, main_~lk3~0, main_~lk11~0, main_~lk1~0, main_~lk10~0, main_~lk5~0, main_~lk4~0, main_~lk6~0, main_~lk9~0, main_~lk8~0, main_~lk7~0] {78203#true} is VALID [2022-04-07 21:19:35,646 INFO L290 TraceCheckUtils]: 8: Hoare triple {78203#true} [234] L73-->L73-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {78203#true} is VALID [2022-04-07 21:19:35,646 INFO L290 TraceCheckUtils]: 9: Hoare triple {78203#true} [236] L73-2-->L77-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {78203#true} is VALID [2022-04-07 21:19:35,646 INFO L290 TraceCheckUtils]: 10: Hoare triple {78203#true} [238] L77-1-->L81-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {78203#true} is VALID [2022-04-07 21:19:35,646 INFO L290 TraceCheckUtils]: 11: Hoare triple {78203#true} [240] L81-1-->L85-1: Formula: (= v_main_~p4~0_4 0) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4} AuxVars[] AssignedVars[] {78203#true} is VALID [2022-04-07 21:19:35,646 INFO L290 TraceCheckUtils]: 12: Hoare triple {78203#true} [242] L85-1-->L89-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {78203#true} is VALID [2022-04-07 21:19:35,646 INFO L290 TraceCheckUtils]: 13: Hoare triple {78203#true} [244] L89-1-->L93-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {78203#true} is VALID [2022-04-07 21:19:35,647 INFO L290 TraceCheckUtils]: 14: Hoare triple {78203#true} [245] L93-1-->L97-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {78208#(not (= main_~p7~0 0))} is VALID [2022-04-07 21:19:35,647 INFO L290 TraceCheckUtils]: 15: Hoare triple {78208#(not (= main_~p7~0 0))} [247] L97-1-->L101-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {78208#(not (= main_~p7~0 0))} is VALID [2022-04-07 21:19:35,647 INFO L290 TraceCheckUtils]: 16: Hoare triple {78208#(not (= main_~p7~0 0))} [249] L101-1-->L105-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {78208#(not (= main_~p7~0 0))} is VALID [2022-04-07 21:19:35,647 INFO L290 TraceCheckUtils]: 17: Hoare triple {78208#(not (= main_~p7~0 0))} [251] L105-1-->L109-1: Formula: (and (= v_main_~lk10~0_6 1) (not (= v_main_~p10~0_4 0))) InVars {main_~p10~0=v_main_~p10~0_4} OutVars{main_~lk10~0=v_main_~lk10~0_6, main_~p10~0=v_main_~p10~0_4} AuxVars[] AssignedVars[main_~lk10~0] {78208#(not (= main_~p7~0 0))} is VALID [2022-04-07 21:19:35,648 INFO L290 TraceCheckUtils]: 18: Hoare triple {78208#(not (= main_~p7~0 0))} [253] L109-1-->L113-1: Formula: (and (= v_main_~lk11~0_6 1) (not (= v_main_~p11~0_4 0))) InVars {main_~p11~0=v_main_~p11~0_4} OutVars{main_~lk11~0=v_main_~lk11~0_6, main_~p11~0=v_main_~p11~0_4} AuxVars[] AssignedVars[main_~lk11~0] {78208#(not (= main_~p7~0 0))} is VALID [2022-04-07 21:19:35,648 INFO L290 TraceCheckUtils]: 19: Hoare triple {78208#(not (= main_~p7~0 0))} [256] L113-1-->L119-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {78208#(not (= main_~p7~0 0))} is VALID [2022-04-07 21:19:35,648 INFO L290 TraceCheckUtils]: 20: Hoare triple {78208#(not (= main_~p7~0 0))} [260] L119-1-->L124-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {78208#(not (= main_~p7~0 0))} is VALID [2022-04-07 21:19:35,648 INFO L290 TraceCheckUtils]: 21: Hoare triple {78208#(not (= main_~p7~0 0))} [266] L124-1-->L129-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {78208#(not (= main_~p7~0 0))} is VALID [2022-04-07 21:19:35,649 INFO L290 TraceCheckUtils]: 22: Hoare triple {78208#(not (= main_~p7~0 0))} [270] L129-1-->L134-1: Formula: (= v_main_~p4~0_1 0) InVars {main_~p4~0=v_main_~p4~0_1} OutVars{main_~p4~0=v_main_~p4~0_1} AuxVars[] AssignedVars[] {78208#(not (= main_~p7~0 0))} is VALID [2022-04-07 21:19:35,649 INFO L290 TraceCheckUtils]: 23: Hoare triple {78208#(not (= main_~p7~0 0))} [274] L134-1-->L139-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {78208#(not (= main_~p7~0 0))} is VALID [2022-04-07 21:19:35,649 INFO L290 TraceCheckUtils]: 24: Hoare triple {78208#(not (= main_~p7~0 0))} [278] L139-1-->L144-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {78208#(not (= main_~p7~0 0))} is VALID [2022-04-07 21:19:35,649 INFO L290 TraceCheckUtils]: 25: Hoare triple {78208#(not (= main_~p7~0 0))} [282] L144-1-->L149-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {78204#false} is VALID [2022-04-07 21:19:35,649 INFO L290 TraceCheckUtils]: 26: Hoare triple {78204#false} [285] L149-1-->L155: Formula: (not (= v_main_~p8~0_2 0)) InVars {main_~p8~0=v_main_~p8~0_2} OutVars{main_~p8~0=v_main_~p8~0_2} AuxVars[] AssignedVars[] {78204#false} is VALID [2022-04-07 21:19:35,650 INFO L290 TraceCheckUtils]: 27: Hoare triple {78204#false} [287] L155-->L170-1: Formula: (not (= v_main_~lk8~0_3 1)) InVars {main_~lk8~0=v_main_~lk8~0_3} OutVars{main_~lk8~0=v_main_~lk8~0_3} AuxVars[] AssignedVars[] {78204#false} is VALID [2022-04-07 21:19:35,650 INFO L290 TraceCheckUtils]: 28: Hoare triple {78204#false} [261] L170-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {78204#false} is VALID [2022-04-07 21:19:35,650 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 21:19:35,650 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 21:19:35,650 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1397568692] [2022-04-07 21:19:35,650 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1397568692] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 21:19:35,650 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 21:19:35,650 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-07 21:19:35,650 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1985274869] [2022-04-07 21:19:35,650 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 21:19:35,651 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-07 21:19:35,651 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 21:19:35,651 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:35,666 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 29 edges. 29 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:19:35,666 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-07 21:19:35,666 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 21:19:35,666 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-07 21:19:35,666 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-07 21:19:35,666 INFO L87 Difference]: Start difference. First operand 4105 states and 5959 transitions. Second operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:36,222 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:19:36,222 INFO L93 Difference]: Finished difference Result 4171 states and 5960 transitions. [2022-04-07 21:19:36,222 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-07 21:19:36,223 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-07 21:19:36,223 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 21:19:36,223 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:36,224 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 128 transitions. [2022-04-07 21:19:36,224 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:36,225 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 128 transitions. [2022-04-07 21:19:36,225 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 128 transitions. [2022-04-07 21:19:36,323 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 128 edges. 128 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:19:36,793 INFO L225 Difference]: With dead ends: 4171 [2022-04-07 21:19:36,794 INFO L226 Difference]: Without dead ends: 4171 [2022-04-07 21:19:36,794 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-07 21:19:36,794 INFO L913 BasicCegarLoop]: 98 mSDtfsCounter, 138 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 63 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 138 SdHoareTripleChecker+Valid, 105 SdHoareTripleChecker+Invalid, 65 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 63 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 21:19:36,794 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [138 Valid, 105 Invalid, 65 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 63 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 21:19:36,796 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4171 states. [2022-04-07 21:19:36,831 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4171 to 4169. [2022-04-07 21:19:36,831 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 21:19:36,835 INFO L82 GeneralOperation]: Start isEquivalent. First operand 4171 states. Second operand has 4169 states, 4165 states have (on average 1.4300120048019207) internal successors, (5956), 4165 states have internal predecessors, (5956), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:36,838 INFO L74 IsIncluded]: Start isIncluded. First operand 4171 states. Second operand has 4169 states, 4165 states have (on average 1.4300120048019207) internal successors, (5956), 4165 states have internal predecessors, (5956), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:36,840 INFO L87 Difference]: Start difference. First operand 4171 states. Second operand has 4169 states, 4165 states have (on average 1.4300120048019207) internal successors, (5956), 4165 states have internal predecessors, (5956), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:37,266 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:19:37,266 INFO L93 Difference]: Finished difference Result 4171 states and 5960 transitions. [2022-04-07 21:19:37,266 INFO L276 IsEmpty]: Start isEmpty. Operand 4171 states and 5960 transitions. [2022-04-07 21:19:37,270 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:19:37,270 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:19:37,274 INFO L74 IsIncluded]: Start isIncluded. First operand has 4169 states, 4165 states have (on average 1.4300120048019207) internal successors, (5956), 4165 states have internal predecessors, (5956), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 4171 states. [2022-04-07 21:19:37,276 INFO L87 Difference]: Start difference. First operand has 4169 states, 4165 states have (on average 1.4300120048019207) internal successors, (5956), 4165 states have internal predecessors, (5956), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 4171 states. [2022-04-07 21:19:37,699 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:19:37,699 INFO L93 Difference]: Finished difference Result 4171 states and 5960 transitions. [2022-04-07 21:19:37,699 INFO L276 IsEmpty]: Start isEmpty. Operand 4171 states and 5960 transitions. [2022-04-07 21:19:37,703 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:19:37,703 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:19:37,703 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 21:19:37,703 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 21:19:37,707 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4169 states, 4165 states have (on average 1.4300120048019207) internal successors, (5956), 4165 states have internal predecessors, (5956), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:38,169 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4169 states to 4169 states and 5959 transitions. [2022-04-07 21:19:38,169 INFO L78 Accepts]: Start accepts. Automaton has 4169 states and 5959 transitions. Word has length 29 [2022-04-07 21:19:38,170 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 21:19:38,170 INFO L478 AbstractCegarLoop]: Abstraction has 4169 states and 5959 transitions. [2022-04-07 21:19:38,170 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:38,170 INFO L276 IsEmpty]: Start isEmpty. Operand 4169 states and 5959 transitions. [2022-04-07 21:19:38,173 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2022-04-07 21:19:38,173 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 21:19:38,173 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 21:19:38,173 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2022-04-07 21:19:38,173 INFO L403 AbstractCegarLoop]: === Iteration 21 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 21:19:38,173 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 21:19:38,173 INFO L85 PathProgramCache]: Analyzing trace with hash 883367892, now seen corresponding path program 1 times [2022-04-07 21:19:38,174 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 21:19:38,174 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [715327537] [2022-04-07 21:19:38,174 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 21:19:38,174 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 21:19:38,186 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:19:38,198 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 21:19:38,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:19:38,201 INFO L290 TraceCheckUtils]: 0: Hoare triple {94903#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [222] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {94897#true} is VALID [2022-04-07 21:19:38,201 INFO L290 TraceCheckUtils]: 1: Hoare triple {94897#true} [225] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {94897#true} is VALID [2022-04-07 21:19:38,201 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {94897#true} {94897#true} [301] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {94897#true} is VALID [2022-04-07 21:19:38,202 INFO L272 TraceCheckUtils]: 0: Hoare triple {94897#true} [220] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {94903#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 21:19:38,202 INFO L290 TraceCheckUtils]: 1: Hoare triple {94903#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [222] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {94897#true} is VALID [2022-04-07 21:19:38,202 INFO L290 TraceCheckUtils]: 2: Hoare triple {94897#true} [225] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {94897#true} is VALID [2022-04-07 21:19:38,202 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {94897#true} {94897#true} [301] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {94897#true} is VALID [2022-04-07 21:19:38,202 INFO L272 TraceCheckUtils]: 4: Hoare triple {94897#true} [221] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {94897#true} is VALID [2022-04-07 21:19:38,202 INFO L290 TraceCheckUtils]: 5: Hoare triple {94897#true} [224] mainENTRY-->L169-1: Formula: (and (= v_main_~p5~0_2 |v_main_#t~nondet8_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (= v_main_~p4~0_2 |v_main_#t~nondet7_2|)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~lk3~0=v_main_~lk3~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p2~0=v_main_~p2~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_2, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p5~0=v_main_~p5~0_2, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~lk4~0=v_main_~lk4~0_3, main_~p3~0=v_main_~p3~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet14, main_#t~nondet13, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {94897#true} is VALID [2022-04-07 21:19:38,202 INFO L290 TraceCheckUtils]: 6: Hoare triple {94897#true} [228] L169-1-->L46: Formula: (and (= |v_main_#t~nondet15_2| v_main_~cond~0_2) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet15=|v_main_#t~nondet15_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet15, main_~cond~0] {94897#true} is VALID [2022-04-07 21:19:38,202 INFO L290 TraceCheckUtils]: 7: Hoare triple {94897#true} [231] L46-->L73: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_3 0) (= v_main_~lk5~0_5 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0) (= v_main_~lk4~0_4 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk1~0=v_main_~lk1~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_5, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk4~0=v_main_~lk4~0_4, main_~lk6~0=v_main_~lk6~0_3, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk2~0, main_~lk3~0, main_~lk11~0, main_~lk1~0, main_~lk10~0, main_~lk5~0, main_~lk4~0, main_~lk6~0, main_~lk9~0, main_~lk8~0, main_~lk7~0] {94897#true} is VALID [2022-04-07 21:19:38,202 INFO L290 TraceCheckUtils]: 8: Hoare triple {94897#true} [234] L73-->L73-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {94897#true} is VALID [2022-04-07 21:19:38,203 INFO L290 TraceCheckUtils]: 9: Hoare triple {94897#true} [236] L73-2-->L77-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {94897#true} is VALID [2022-04-07 21:19:38,203 INFO L290 TraceCheckUtils]: 10: Hoare triple {94897#true} [238] L77-1-->L81-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {94897#true} is VALID [2022-04-07 21:19:38,203 INFO L290 TraceCheckUtils]: 11: Hoare triple {94897#true} [240] L81-1-->L85-1: Formula: (= v_main_~p4~0_4 0) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4} AuxVars[] AssignedVars[] {94897#true} is VALID [2022-04-07 21:19:38,203 INFO L290 TraceCheckUtils]: 12: Hoare triple {94897#true} [242] L85-1-->L89-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {94897#true} is VALID [2022-04-07 21:19:38,203 INFO L290 TraceCheckUtils]: 13: Hoare triple {94897#true} [244] L89-1-->L93-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {94897#true} is VALID [2022-04-07 21:19:38,203 INFO L290 TraceCheckUtils]: 14: Hoare triple {94897#true} [246] L93-1-->L97-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {94897#true} is VALID [2022-04-07 21:19:38,203 INFO L290 TraceCheckUtils]: 15: Hoare triple {94897#true} [247] L97-1-->L101-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {94902#(= main_~lk8~0 1)} is VALID [2022-04-07 21:19:38,203 INFO L290 TraceCheckUtils]: 16: Hoare triple {94902#(= main_~lk8~0 1)} [249] L101-1-->L105-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {94902#(= main_~lk8~0 1)} is VALID [2022-04-07 21:19:38,204 INFO L290 TraceCheckUtils]: 17: Hoare triple {94902#(= main_~lk8~0 1)} [251] L105-1-->L109-1: Formula: (and (= v_main_~lk10~0_6 1) (not (= v_main_~p10~0_4 0))) InVars {main_~p10~0=v_main_~p10~0_4} OutVars{main_~lk10~0=v_main_~lk10~0_6, main_~p10~0=v_main_~p10~0_4} AuxVars[] AssignedVars[main_~lk10~0] {94902#(= main_~lk8~0 1)} is VALID [2022-04-07 21:19:38,204 INFO L290 TraceCheckUtils]: 18: Hoare triple {94902#(= main_~lk8~0 1)} [253] L109-1-->L113-1: Formula: (and (= v_main_~lk11~0_6 1) (not (= v_main_~p11~0_4 0))) InVars {main_~p11~0=v_main_~p11~0_4} OutVars{main_~lk11~0=v_main_~lk11~0_6, main_~p11~0=v_main_~p11~0_4} AuxVars[] AssignedVars[main_~lk11~0] {94902#(= main_~lk8~0 1)} is VALID [2022-04-07 21:19:38,204 INFO L290 TraceCheckUtils]: 19: Hoare triple {94902#(= main_~lk8~0 1)} [256] L113-1-->L119-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {94902#(= main_~lk8~0 1)} is VALID [2022-04-07 21:19:38,204 INFO L290 TraceCheckUtils]: 20: Hoare triple {94902#(= main_~lk8~0 1)} [260] L119-1-->L124-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {94902#(= main_~lk8~0 1)} is VALID [2022-04-07 21:19:38,204 INFO L290 TraceCheckUtils]: 21: Hoare triple {94902#(= main_~lk8~0 1)} [266] L124-1-->L129-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {94902#(= main_~lk8~0 1)} is VALID [2022-04-07 21:19:38,205 INFO L290 TraceCheckUtils]: 22: Hoare triple {94902#(= main_~lk8~0 1)} [270] L129-1-->L134-1: Formula: (= v_main_~p4~0_1 0) InVars {main_~p4~0=v_main_~p4~0_1} OutVars{main_~p4~0=v_main_~p4~0_1} AuxVars[] AssignedVars[] {94902#(= main_~lk8~0 1)} is VALID [2022-04-07 21:19:38,205 INFO L290 TraceCheckUtils]: 23: Hoare triple {94902#(= main_~lk8~0 1)} [274] L134-1-->L139-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {94902#(= main_~lk8~0 1)} is VALID [2022-04-07 21:19:38,205 INFO L290 TraceCheckUtils]: 24: Hoare triple {94902#(= main_~lk8~0 1)} [278] L139-1-->L144-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {94902#(= main_~lk8~0 1)} is VALID [2022-04-07 21:19:38,205 INFO L290 TraceCheckUtils]: 25: Hoare triple {94902#(= main_~lk8~0 1)} [282] L144-1-->L149-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {94902#(= main_~lk8~0 1)} is VALID [2022-04-07 21:19:38,206 INFO L290 TraceCheckUtils]: 26: Hoare triple {94902#(= main_~lk8~0 1)} [285] L149-1-->L155: Formula: (not (= v_main_~p8~0_2 0)) InVars {main_~p8~0=v_main_~p8~0_2} OutVars{main_~p8~0=v_main_~p8~0_2} AuxVars[] AssignedVars[] {94902#(= main_~lk8~0 1)} is VALID [2022-04-07 21:19:38,206 INFO L290 TraceCheckUtils]: 27: Hoare triple {94902#(= main_~lk8~0 1)} [287] L155-->L170-1: Formula: (not (= v_main_~lk8~0_3 1)) InVars {main_~lk8~0=v_main_~lk8~0_3} OutVars{main_~lk8~0=v_main_~lk8~0_3} AuxVars[] AssignedVars[] {94898#false} is VALID [2022-04-07 21:19:38,206 INFO L290 TraceCheckUtils]: 28: Hoare triple {94898#false} [261] L170-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {94898#false} is VALID [2022-04-07 21:19:38,206 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 21:19:38,206 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 21:19:38,206 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [715327537] [2022-04-07 21:19:38,206 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [715327537] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 21:19:38,206 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 21:19:38,206 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-07 21:19:38,206 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [60367706] [2022-04-07 21:19:38,206 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 21:19:38,207 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-07 21:19:38,207 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 21:19:38,207 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:38,221 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 29 edges. 29 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:19:38,221 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-07 21:19:38,221 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 21:19:38,221 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-07 21:19:38,221 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-07 21:19:38,221 INFO L87 Difference]: Start difference. First operand 4169 states and 5959 transitions. Second operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:39,648 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:19:39,648 INFO L93 Difference]: Finished difference Result 7179 states and 10312 transitions. [2022-04-07 21:19:39,648 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-07 21:19:39,648 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-07 21:19:39,649 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 21:19:39,649 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:39,649 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 114 transitions. [2022-04-07 21:19:39,649 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:39,650 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 114 transitions. [2022-04-07 21:19:39,650 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 114 transitions. [2022-04-07 21:19:39,717 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 114 edges. 114 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:19:41,093 INFO L225 Difference]: With dead ends: 7179 [2022-04-07 21:19:41,093 INFO L226 Difference]: Without dead ends: 7179 [2022-04-07 21:19:41,094 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-07 21:19:41,094 INFO L913 BasicCegarLoop]: 70 mSDtfsCounter, 136 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 65 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 136 SdHoareTripleChecker+Valid, 77 SdHoareTripleChecker+Invalid, 67 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 65 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 21:19:41,094 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [136 Valid, 77 Invalid, 67 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 65 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 21:19:41,097 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7179 states. [2022-04-07 21:19:41,145 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7179 to 6153. [2022-04-07 21:19:41,145 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 21:19:41,151 INFO L82 GeneralOperation]: Start isEquivalent. First operand 7179 states. Second operand has 6153 states, 6149 states have (on average 1.3849406407545943) internal successors, (8516), 6149 states have internal predecessors, (8516), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:41,154 INFO L74 IsIncluded]: Start isIncluded. First operand 7179 states. Second operand has 6153 states, 6149 states have (on average 1.3849406407545943) internal successors, (8516), 6149 states have internal predecessors, (8516), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:41,158 INFO L87 Difference]: Start difference. First operand 7179 states. Second operand has 6153 states, 6149 states have (on average 1.3849406407545943) internal successors, (8516), 6149 states have internal predecessors, (8516), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:42,467 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:19:42,467 INFO L93 Difference]: Finished difference Result 7179 states and 10312 transitions. [2022-04-07 21:19:42,467 INFO L276 IsEmpty]: Start isEmpty. Operand 7179 states and 10312 transitions. [2022-04-07 21:19:42,473 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:19:42,473 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:19:42,479 INFO L74 IsIncluded]: Start isIncluded. First operand has 6153 states, 6149 states have (on average 1.3849406407545943) internal successors, (8516), 6149 states have internal predecessors, (8516), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 7179 states. [2022-04-07 21:19:42,482 INFO L87 Difference]: Start difference. First operand has 6153 states, 6149 states have (on average 1.3849406407545943) internal successors, (8516), 6149 states have internal predecessors, (8516), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 7179 states. [2022-04-07 21:19:43,803 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:19:43,804 INFO L93 Difference]: Finished difference Result 7179 states and 10312 transitions. [2022-04-07 21:19:43,804 INFO L276 IsEmpty]: Start isEmpty. Operand 7179 states and 10312 transitions. [2022-04-07 21:19:43,809 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:19:43,809 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:19:43,809 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 21:19:43,809 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 21:19:43,814 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6153 states, 6149 states have (on average 1.3849406407545943) internal successors, (8516), 6149 states have internal predecessors, (8516), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:44,913 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6153 states to 6153 states and 8519 transitions. [2022-04-07 21:19:44,913 INFO L78 Accepts]: Start accepts. Automaton has 6153 states and 8519 transitions. Word has length 29 [2022-04-07 21:19:44,914 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 21:19:44,914 INFO L478 AbstractCegarLoop]: Abstraction has 6153 states and 8519 transitions. [2022-04-07 21:19:44,914 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:44,914 INFO L276 IsEmpty]: Start isEmpty. Operand 6153 states and 8519 transitions. [2022-04-07 21:19:44,916 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2022-04-07 21:19:44,917 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 21:19:44,917 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 21:19:44,917 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2022-04-07 21:19:44,917 INFO L403 AbstractCegarLoop]: === Iteration 22 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 21:19:44,917 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 21:19:44,917 INFO L85 PathProgramCache]: Analyzing trace with hash 377809267, now seen corresponding path program 1 times [2022-04-07 21:19:44,917 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 21:19:44,917 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1913932495] [2022-04-07 21:19:44,917 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 21:19:44,917 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 21:19:44,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:19:44,937 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 21:19:44,938 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:19:44,939 INFO L290 TraceCheckUtils]: 0: Hoare triple {122605#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [222] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {122599#true} is VALID [2022-04-07 21:19:44,939 INFO L290 TraceCheckUtils]: 1: Hoare triple {122599#true} [225] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {122599#true} is VALID [2022-04-07 21:19:44,940 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {122599#true} {122599#true} [301] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {122599#true} is VALID [2022-04-07 21:19:44,940 INFO L272 TraceCheckUtils]: 0: Hoare triple {122599#true} [220] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {122605#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 21:19:44,940 INFO L290 TraceCheckUtils]: 1: Hoare triple {122605#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [222] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {122599#true} is VALID [2022-04-07 21:19:44,940 INFO L290 TraceCheckUtils]: 2: Hoare triple {122599#true} [225] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {122599#true} is VALID [2022-04-07 21:19:44,940 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {122599#true} {122599#true} [301] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {122599#true} is VALID [2022-04-07 21:19:44,940 INFO L272 TraceCheckUtils]: 4: Hoare triple {122599#true} [221] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {122599#true} is VALID [2022-04-07 21:19:44,940 INFO L290 TraceCheckUtils]: 5: Hoare triple {122599#true} [224] mainENTRY-->L169-1: Formula: (and (= v_main_~p5~0_2 |v_main_#t~nondet8_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (= v_main_~p4~0_2 |v_main_#t~nondet7_2|)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~lk3~0=v_main_~lk3~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p2~0=v_main_~p2~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_2, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p5~0=v_main_~p5~0_2, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~lk4~0=v_main_~lk4~0_3, main_~p3~0=v_main_~p3~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet14, main_#t~nondet13, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {122599#true} is VALID [2022-04-07 21:19:44,940 INFO L290 TraceCheckUtils]: 6: Hoare triple {122599#true} [228] L169-1-->L46: Formula: (and (= |v_main_#t~nondet15_2| v_main_~cond~0_2) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet15=|v_main_#t~nondet15_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet15, main_~cond~0] {122599#true} is VALID [2022-04-07 21:19:44,940 INFO L290 TraceCheckUtils]: 7: Hoare triple {122599#true} [231] L46-->L73: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_3 0) (= v_main_~lk5~0_5 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0) (= v_main_~lk4~0_4 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk1~0=v_main_~lk1~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_5, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk4~0=v_main_~lk4~0_4, main_~lk6~0=v_main_~lk6~0_3, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk2~0, main_~lk3~0, main_~lk11~0, main_~lk1~0, main_~lk10~0, main_~lk5~0, main_~lk4~0, main_~lk6~0, main_~lk9~0, main_~lk8~0, main_~lk7~0] {122599#true} is VALID [2022-04-07 21:19:44,941 INFO L290 TraceCheckUtils]: 8: Hoare triple {122599#true} [234] L73-->L73-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {122599#true} is VALID [2022-04-07 21:19:44,941 INFO L290 TraceCheckUtils]: 9: Hoare triple {122599#true} [236] L73-2-->L77-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {122599#true} is VALID [2022-04-07 21:19:44,941 INFO L290 TraceCheckUtils]: 10: Hoare triple {122599#true} [238] L77-1-->L81-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {122599#true} is VALID [2022-04-07 21:19:44,941 INFO L290 TraceCheckUtils]: 11: Hoare triple {122599#true} [240] L81-1-->L85-1: Formula: (= v_main_~p4~0_4 0) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4} AuxVars[] AssignedVars[] {122599#true} is VALID [2022-04-07 21:19:44,941 INFO L290 TraceCheckUtils]: 12: Hoare triple {122599#true} [242] L85-1-->L89-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {122599#true} is VALID [2022-04-07 21:19:44,941 INFO L290 TraceCheckUtils]: 13: Hoare triple {122599#true} [244] L89-1-->L93-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {122599#true} is VALID [2022-04-07 21:19:44,941 INFO L290 TraceCheckUtils]: 14: Hoare triple {122599#true} [246] L93-1-->L97-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {122599#true} is VALID [2022-04-07 21:19:44,941 INFO L290 TraceCheckUtils]: 15: Hoare triple {122599#true} [248] L97-1-->L101-1: Formula: (= v_main_~p8~0_5 0) InVars {main_~p8~0=v_main_~p8~0_5} OutVars{main_~p8~0=v_main_~p8~0_5} AuxVars[] AssignedVars[] {122604#(= main_~p8~0 0)} is VALID [2022-04-07 21:19:44,941 INFO L290 TraceCheckUtils]: 16: Hoare triple {122604#(= main_~p8~0 0)} [249] L101-1-->L105-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {122604#(= main_~p8~0 0)} is VALID [2022-04-07 21:19:44,942 INFO L290 TraceCheckUtils]: 17: Hoare triple {122604#(= main_~p8~0 0)} [251] L105-1-->L109-1: Formula: (and (= v_main_~lk10~0_6 1) (not (= v_main_~p10~0_4 0))) InVars {main_~p10~0=v_main_~p10~0_4} OutVars{main_~lk10~0=v_main_~lk10~0_6, main_~p10~0=v_main_~p10~0_4} AuxVars[] AssignedVars[main_~lk10~0] {122604#(= main_~p8~0 0)} is VALID [2022-04-07 21:19:44,942 INFO L290 TraceCheckUtils]: 18: Hoare triple {122604#(= main_~p8~0 0)} [253] L109-1-->L113-1: Formula: (and (= v_main_~lk11~0_6 1) (not (= v_main_~p11~0_4 0))) InVars {main_~p11~0=v_main_~p11~0_4} OutVars{main_~lk11~0=v_main_~lk11~0_6, main_~p11~0=v_main_~p11~0_4} AuxVars[] AssignedVars[main_~lk11~0] {122604#(= main_~p8~0 0)} is VALID [2022-04-07 21:19:44,942 INFO L290 TraceCheckUtils]: 19: Hoare triple {122604#(= main_~p8~0 0)} [256] L113-1-->L119-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {122604#(= main_~p8~0 0)} is VALID [2022-04-07 21:19:44,942 INFO L290 TraceCheckUtils]: 20: Hoare triple {122604#(= main_~p8~0 0)} [260] L119-1-->L124-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {122604#(= main_~p8~0 0)} is VALID [2022-04-07 21:19:44,942 INFO L290 TraceCheckUtils]: 21: Hoare triple {122604#(= main_~p8~0 0)} [266] L124-1-->L129-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {122604#(= main_~p8~0 0)} is VALID [2022-04-07 21:19:44,943 INFO L290 TraceCheckUtils]: 22: Hoare triple {122604#(= main_~p8~0 0)} [270] L129-1-->L134-1: Formula: (= v_main_~p4~0_1 0) InVars {main_~p4~0=v_main_~p4~0_1} OutVars{main_~p4~0=v_main_~p4~0_1} AuxVars[] AssignedVars[] {122604#(= main_~p8~0 0)} is VALID [2022-04-07 21:19:44,943 INFO L290 TraceCheckUtils]: 23: Hoare triple {122604#(= main_~p8~0 0)} [274] L134-1-->L139-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {122604#(= main_~p8~0 0)} is VALID [2022-04-07 21:19:44,943 INFO L290 TraceCheckUtils]: 24: Hoare triple {122604#(= main_~p8~0 0)} [278] L139-1-->L144-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {122604#(= main_~p8~0 0)} is VALID [2022-04-07 21:19:44,943 INFO L290 TraceCheckUtils]: 25: Hoare triple {122604#(= main_~p8~0 0)} [282] L144-1-->L149-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {122604#(= main_~p8~0 0)} is VALID [2022-04-07 21:19:44,944 INFO L290 TraceCheckUtils]: 26: Hoare triple {122604#(= main_~p8~0 0)} [285] L149-1-->L155: Formula: (not (= v_main_~p8~0_2 0)) InVars {main_~p8~0=v_main_~p8~0_2} OutVars{main_~p8~0=v_main_~p8~0_2} AuxVars[] AssignedVars[] {122600#false} is VALID [2022-04-07 21:19:44,944 INFO L290 TraceCheckUtils]: 27: Hoare triple {122600#false} [287] L155-->L170-1: Formula: (not (= v_main_~lk8~0_3 1)) InVars {main_~lk8~0=v_main_~lk8~0_3} OutVars{main_~lk8~0=v_main_~lk8~0_3} AuxVars[] AssignedVars[] {122600#false} is VALID [2022-04-07 21:19:44,944 INFO L290 TraceCheckUtils]: 28: Hoare triple {122600#false} [261] L170-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {122600#false} is VALID [2022-04-07 21:19:44,944 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 21:19:44,944 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 21:19:44,944 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1913932495] [2022-04-07 21:19:44,944 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1913932495] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 21:19:44,944 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 21:19:44,944 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-07 21:19:44,944 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1527993496] [2022-04-07 21:19:44,944 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 21:19:44,945 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-07 21:19:44,945 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 21:19:44,945 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:44,958 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 29 edges. 29 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:19:44,958 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-07 21:19:44,958 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 21:19:44,959 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-07 21:19:44,959 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-07 21:19:44,959 INFO L87 Difference]: Start difference. First operand 6153 states and 8519 transitions. Second operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:46,594 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:19:46,594 INFO L93 Difference]: Finished difference Result 8075 states and 11016 transitions. [2022-04-07 21:19:46,594 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-07 21:19:46,594 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-07 21:19:46,594 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 21:19:46,594 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:46,595 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 127 transitions. [2022-04-07 21:19:46,595 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:46,596 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 127 transitions. [2022-04-07 21:19:46,596 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 127 transitions. [2022-04-07 21:19:46,670 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 127 edges. 127 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:19:48,321 INFO L225 Difference]: With dead ends: 8075 [2022-04-07 21:19:48,321 INFO L226 Difference]: Without dead ends: 8075 [2022-04-07 21:19:48,321 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-07 21:19:48,321 INFO L913 BasicCegarLoop]: 110 mSDtfsCounter, 121 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 63 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 121 SdHoareTripleChecker+Valid, 117 SdHoareTripleChecker+Invalid, 66 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 63 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 21:19:48,322 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [121 Valid, 117 Invalid, 66 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 63 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 21:19:48,324 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8075 states. [2022-04-07 21:19:48,377 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8075 to 8073. [2022-04-07 21:19:48,377 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 21:19:48,385 INFO L82 GeneralOperation]: Start isEquivalent. First operand 8075 states. Second operand has 8073 states, 8069 states have (on average 1.3647292105589293) internal successors, (11012), 8069 states have internal predecessors, (11012), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:48,392 INFO L74 IsIncluded]: Start isIncluded. First operand 8075 states. Second operand has 8073 states, 8069 states have (on average 1.3647292105589293) internal successors, (11012), 8069 states have internal predecessors, (11012), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:48,398 INFO L87 Difference]: Start difference. First operand 8075 states. Second operand has 8073 states, 8069 states have (on average 1.3647292105589293) internal successors, (11012), 8069 states have internal predecessors, (11012), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:50,021 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:19:50,022 INFO L93 Difference]: Finished difference Result 8075 states and 11016 transitions. [2022-04-07 21:19:50,022 INFO L276 IsEmpty]: Start isEmpty. Operand 8075 states and 11016 transitions. [2022-04-07 21:19:50,027 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:19:50,027 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:19:50,035 INFO L74 IsIncluded]: Start isIncluded. First operand has 8073 states, 8069 states have (on average 1.3647292105589293) internal successors, (11012), 8069 states have internal predecessors, (11012), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 8075 states. [2022-04-07 21:19:50,040 INFO L87 Difference]: Start difference. First operand has 8073 states, 8069 states have (on average 1.3647292105589293) internal successors, (11012), 8069 states have internal predecessors, (11012), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 8075 states. [2022-04-07 21:19:51,748 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:19:51,748 INFO L93 Difference]: Finished difference Result 8075 states and 11016 transitions. [2022-04-07 21:19:51,748 INFO L276 IsEmpty]: Start isEmpty. Operand 8075 states and 11016 transitions. [2022-04-07 21:19:51,754 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:19:51,754 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:19:51,754 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 21:19:51,754 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 21:19:51,761 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8073 states, 8069 states have (on average 1.3647292105589293) internal successors, (11012), 8069 states have internal predecessors, (11012), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:53,514 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8073 states to 8073 states and 11015 transitions. [2022-04-07 21:19:53,514 INFO L78 Accepts]: Start accepts. Automaton has 8073 states and 11015 transitions. Word has length 29 [2022-04-07 21:19:53,514 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 21:19:53,514 INFO L478 AbstractCegarLoop]: Abstraction has 8073 states and 11015 transitions. [2022-04-07 21:19:53,514 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:53,514 INFO L276 IsEmpty]: Start isEmpty. Operand 8073 states and 11015 transitions. [2022-04-07 21:19:53,517 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2022-04-07 21:19:53,517 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 21:19:53,517 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 21:19:53,517 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2022-04-07 21:19:53,517 INFO L403 AbstractCegarLoop]: === Iteration 23 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 21:19:53,517 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 21:19:53,518 INFO L85 PathProgramCache]: Analyzing trace with hash 1614633780, now seen corresponding path program 1 times [2022-04-07 21:19:53,518 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 21:19:53,518 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [352677172] [2022-04-07 21:19:53,518 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 21:19:53,518 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 21:19:53,531 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:19:53,542 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 21:19:53,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:19:53,545 INFO L290 TraceCheckUtils]: 0: Hoare triple {154915#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [222] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {154909#true} is VALID [2022-04-07 21:19:53,545 INFO L290 TraceCheckUtils]: 1: Hoare triple {154909#true} [225] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {154909#true} is VALID [2022-04-07 21:19:53,545 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {154909#true} {154909#true} [301] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {154909#true} is VALID [2022-04-07 21:19:53,546 INFO L272 TraceCheckUtils]: 0: Hoare triple {154909#true} [220] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {154915#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 21:19:53,546 INFO L290 TraceCheckUtils]: 1: Hoare triple {154915#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [222] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {154909#true} is VALID [2022-04-07 21:19:53,546 INFO L290 TraceCheckUtils]: 2: Hoare triple {154909#true} [225] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {154909#true} is VALID [2022-04-07 21:19:53,546 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {154909#true} {154909#true} [301] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {154909#true} is VALID [2022-04-07 21:19:53,546 INFO L272 TraceCheckUtils]: 4: Hoare triple {154909#true} [221] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {154909#true} is VALID [2022-04-07 21:19:53,546 INFO L290 TraceCheckUtils]: 5: Hoare triple {154909#true} [224] mainENTRY-->L169-1: Formula: (and (= v_main_~p5~0_2 |v_main_#t~nondet8_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (= v_main_~p4~0_2 |v_main_#t~nondet7_2|)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~lk3~0=v_main_~lk3~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p2~0=v_main_~p2~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_2, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p5~0=v_main_~p5~0_2, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~lk4~0=v_main_~lk4~0_3, main_~p3~0=v_main_~p3~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet14, main_#t~nondet13, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {154909#true} is VALID [2022-04-07 21:19:53,546 INFO L290 TraceCheckUtils]: 6: Hoare triple {154909#true} [228] L169-1-->L46: Formula: (and (= |v_main_#t~nondet15_2| v_main_~cond~0_2) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet15=|v_main_#t~nondet15_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet15, main_~cond~0] {154909#true} is VALID [2022-04-07 21:19:53,546 INFO L290 TraceCheckUtils]: 7: Hoare triple {154909#true} [231] L46-->L73: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_3 0) (= v_main_~lk5~0_5 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0) (= v_main_~lk4~0_4 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk1~0=v_main_~lk1~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_5, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk4~0=v_main_~lk4~0_4, main_~lk6~0=v_main_~lk6~0_3, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk2~0, main_~lk3~0, main_~lk11~0, main_~lk1~0, main_~lk10~0, main_~lk5~0, main_~lk4~0, main_~lk6~0, main_~lk9~0, main_~lk8~0, main_~lk7~0] {154909#true} is VALID [2022-04-07 21:19:53,546 INFO L290 TraceCheckUtils]: 8: Hoare triple {154909#true} [234] L73-->L73-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {154909#true} is VALID [2022-04-07 21:19:53,546 INFO L290 TraceCheckUtils]: 9: Hoare triple {154909#true} [236] L73-2-->L77-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {154909#true} is VALID [2022-04-07 21:19:53,546 INFO L290 TraceCheckUtils]: 10: Hoare triple {154909#true} [238] L77-1-->L81-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {154909#true} is VALID [2022-04-07 21:19:53,546 INFO L290 TraceCheckUtils]: 11: Hoare triple {154909#true} [240] L81-1-->L85-1: Formula: (= v_main_~p4~0_4 0) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4} AuxVars[] AssignedVars[] {154909#true} is VALID [2022-04-07 21:19:53,547 INFO L290 TraceCheckUtils]: 12: Hoare triple {154909#true} [242] L85-1-->L89-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {154909#true} is VALID [2022-04-07 21:19:53,547 INFO L290 TraceCheckUtils]: 13: Hoare triple {154909#true} [244] L89-1-->L93-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {154909#true} is VALID [2022-04-07 21:19:53,547 INFO L290 TraceCheckUtils]: 14: Hoare triple {154909#true} [246] L93-1-->L97-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {154909#true} is VALID [2022-04-07 21:19:53,547 INFO L290 TraceCheckUtils]: 15: Hoare triple {154909#true} [247] L97-1-->L101-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {154914#(not (= main_~p8~0 0))} is VALID [2022-04-07 21:19:53,547 INFO L290 TraceCheckUtils]: 16: Hoare triple {154914#(not (= main_~p8~0 0))} [249] L101-1-->L105-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {154914#(not (= main_~p8~0 0))} is VALID [2022-04-07 21:19:53,547 INFO L290 TraceCheckUtils]: 17: Hoare triple {154914#(not (= main_~p8~0 0))} [251] L105-1-->L109-1: Formula: (and (= v_main_~lk10~0_6 1) (not (= v_main_~p10~0_4 0))) InVars {main_~p10~0=v_main_~p10~0_4} OutVars{main_~lk10~0=v_main_~lk10~0_6, main_~p10~0=v_main_~p10~0_4} AuxVars[] AssignedVars[main_~lk10~0] {154914#(not (= main_~p8~0 0))} is VALID [2022-04-07 21:19:53,548 INFO L290 TraceCheckUtils]: 18: Hoare triple {154914#(not (= main_~p8~0 0))} [253] L109-1-->L113-1: Formula: (and (= v_main_~lk11~0_6 1) (not (= v_main_~p11~0_4 0))) InVars {main_~p11~0=v_main_~p11~0_4} OutVars{main_~lk11~0=v_main_~lk11~0_6, main_~p11~0=v_main_~p11~0_4} AuxVars[] AssignedVars[main_~lk11~0] {154914#(not (= main_~p8~0 0))} is VALID [2022-04-07 21:19:53,548 INFO L290 TraceCheckUtils]: 19: Hoare triple {154914#(not (= main_~p8~0 0))} [256] L113-1-->L119-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {154914#(not (= main_~p8~0 0))} is VALID [2022-04-07 21:19:53,548 INFO L290 TraceCheckUtils]: 20: Hoare triple {154914#(not (= main_~p8~0 0))} [260] L119-1-->L124-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {154914#(not (= main_~p8~0 0))} is VALID [2022-04-07 21:19:53,548 INFO L290 TraceCheckUtils]: 21: Hoare triple {154914#(not (= main_~p8~0 0))} [266] L124-1-->L129-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {154914#(not (= main_~p8~0 0))} is VALID [2022-04-07 21:19:53,548 INFO L290 TraceCheckUtils]: 22: Hoare triple {154914#(not (= main_~p8~0 0))} [270] L129-1-->L134-1: Formula: (= v_main_~p4~0_1 0) InVars {main_~p4~0=v_main_~p4~0_1} OutVars{main_~p4~0=v_main_~p4~0_1} AuxVars[] AssignedVars[] {154914#(not (= main_~p8~0 0))} is VALID [2022-04-07 21:19:53,549 INFO L290 TraceCheckUtils]: 23: Hoare triple {154914#(not (= main_~p8~0 0))} [274] L134-1-->L139-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {154914#(not (= main_~p8~0 0))} is VALID [2022-04-07 21:19:53,549 INFO L290 TraceCheckUtils]: 24: Hoare triple {154914#(not (= main_~p8~0 0))} [278] L139-1-->L144-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {154914#(not (= main_~p8~0 0))} is VALID [2022-04-07 21:19:53,549 INFO L290 TraceCheckUtils]: 25: Hoare triple {154914#(not (= main_~p8~0 0))} [282] L144-1-->L149-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {154914#(not (= main_~p8~0 0))} is VALID [2022-04-07 21:19:53,549 INFO L290 TraceCheckUtils]: 26: Hoare triple {154914#(not (= main_~p8~0 0))} [286] L149-1-->L154-1: Formula: (= v_main_~p8~0_3 0) InVars {main_~p8~0=v_main_~p8~0_3} OutVars{main_~p8~0=v_main_~p8~0_3} AuxVars[] AssignedVars[] {154910#false} is VALID [2022-04-07 21:19:53,549 INFO L290 TraceCheckUtils]: 27: Hoare triple {154910#false} [289] L154-1-->L160: Formula: (not (= v_main_~p9~0_2 0)) InVars {main_~p9~0=v_main_~p9~0_2} OutVars{main_~p9~0=v_main_~p9~0_2} AuxVars[] AssignedVars[] {154910#false} is VALID [2022-04-07 21:19:53,549 INFO L290 TraceCheckUtils]: 28: Hoare triple {154910#false} [291] L160-->L170-1: Formula: (not (= v_main_~lk9~0_3 1)) InVars {main_~lk9~0=v_main_~lk9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_3} AuxVars[] AssignedVars[] {154910#false} is VALID [2022-04-07 21:19:53,550 INFO L290 TraceCheckUtils]: 29: Hoare triple {154910#false} [261] L170-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {154910#false} is VALID [2022-04-07 21:19:53,550 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 21:19:53,550 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 21:19:53,550 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [352677172] [2022-04-07 21:19:53,550 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [352677172] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 21:19:53,550 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 21:19:53,550 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-07 21:19:53,550 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [290386753] [2022-04-07 21:19:53,550 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 21:19:53,550 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-07 21:19:53,550 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 21:19:53,550 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:53,565 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 30 edges. 30 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:19:53,566 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-07 21:19:53,566 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 21:19:53,566 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-07 21:19:53,566 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-07 21:19:53,566 INFO L87 Difference]: Start difference. First operand 8073 states and 11015 transitions. Second operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:55,411 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:19:55,411 INFO L93 Difference]: Finished difference Result 8203 states and 11016 transitions. [2022-04-07 21:19:55,411 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-07 21:19:55,411 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-07 21:19:55,411 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 21:19:55,412 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:55,412 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 126 transitions. [2022-04-07 21:19:55,412 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:55,413 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 126 transitions. [2022-04-07 21:19:55,413 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 126 transitions. [2022-04-07 21:19:55,494 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 126 edges. 126 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:19:57,388 INFO L225 Difference]: With dead ends: 8203 [2022-04-07 21:19:57,388 INFO L226 Difference]: Without dead ends: 8203 [2022-04-07 21:19:57,389 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-07 21:19:57,389 INFO L913 BasicCegarLoop]: 95 mSDtfsCounter, 137 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 62 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 137 SdHoareTripleChecker+Valid, 102 SdHoareTripleChecker+Invalid, 64 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 62 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 21:19:57,389 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [137 Valid, 102 Invalid, 64 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 62 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 21:19:57,392 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8203 states. [2022-04-07 21:19:57,448 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8203 to 8201. [2022-04-07 21:19:57,449 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 21:19:57,456 INFO L82 GeneralOperation]: Start isEquivalent. First operand 8203 states. Second operand has 8201 states, 8197 states have (on average 1.3434183237769917) internal successors, (11012), 8197 states have internal predecessors, (11012), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:57,462 INFO L74 IsIncluded]: Start isIncluded. First operand 8203 states. Second operand has 8201 states, 8197 states have (on average 1.3434183237769917) internal successors, (11012), 8197 states have internal predecessors, (11012), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:57,468 INFO L87 Difference]: Start difference. First operand 8203 states. Second operand has 8201 states, 8197 states have (on average 1.3434183237769917) internal successors, (11012), 8197 states have internal predecessors, (11012), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:19:59,135 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:19:59,135 INFO L93 Difference]: Finished difference Result 8203 states and 11016 transitions. [2022-04-07 21:19:59,135 INFO L276 IsEmpty]: Start isEmpty. Operand 8203 states and 11016 transitions. [2022-04-07 21:19:59,141 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:19:59,141 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:19:59,149 INFO L74 IsIncluded]: Start isIncluded. First operand has 8201 states, 8197 states have (on average 1.3434183237769917) internal successors, (11012), 8197 states have internal predecessors, (11012), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 8203 states. [2022-04-07 21:19:59,155 INFO L87 Difference]: Start difference. First operand has 8201 states, 8197 states have (on average 1.3434183237769917) internal successors, (11012), 8197 states have internal predecessors, (11012), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 8203 states. [2022-04-07 21:20:00,709 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:00,709 INFO L93 Difference]: Finished difference Result 8203 states and 11016 transitions. [2022-04-07 21:20:00,709 INFO L276 IsEmpty]: Start isEmpty. Operand 8203 states and 11016 transitions. [2022-04-07 21:20:00,715 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:20:00,715 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:20:00,715 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 21:20:00,715 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 21:20:00,721 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8201 states, 8197 states have (on average 1.3434183237769917) internal successors, (11012), 8197 states have internal predecessors, (11012), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:02,457 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8201 states to 8201 states and 11015 transitions. [2022-04-07 21:20:02,458 INFO L78 Accepts]: Start accepts. Automaton has 8201 states and 11015 transitions. Word has length 30 [2022-04-07 21:20:02,458 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 21:20:02,458 INFO L478 AbstractCegarLoop]: Abstraction has 8201 states and 11015 transitions. [2022-04-07 21:20:02,458 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:02,458 INFO L276 IsEmpty]: Start isEmpty. Operand 8201 states and 11015 transitions. [2022-04-07 21:20:02,461 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2022-04-07 21:20:02,461 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 21:20:02,461 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 21:20:02,461 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2022-04-07 21:20:02,461 INFO L403 AbstractCegarLoop]: === Iteration 24 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 21:20:02,461 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 21:20:02,461 INFO L85 PathProgramCache]: Analyzing trace with hash -1172781707, now seen corresponding path program 1 times [2022-04-07 21:20:02,462 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 21:20:02,462 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1107348551] [2022-04-07 21:20:02,462 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 21:20:02,462 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 21:20:02,473 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:20:02,492 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 21:20:02,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:20:02,498 INFO L290 TraceCheckUtils]: 0: Hoare triple {187737#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [222] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {187731#true} is VALID [2022-04-07 21:20:02,498 INFO L290 TraceCheckUtils]: 1: Hoare triple {187731#true} [225] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {187731#true} is VALID [2022-04-07 21:20:02,498 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {187731#true} {187731#true} [301] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {187731#true} is VALID [2022-04-07 21:20:02,498 INFO L272 TraceCheckUtils]: 0: Hoare triple {187731#true} [220] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {187737#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 21:20:02,499 INFO L290 TraceCheckUtils]: 1: Hoare triple {187737#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [222] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {187731#true} is VALID [2022-04-07 21:20:02,499 INFO L290 TraceCheckUtils]: 2: Hoare triple {187731#true} [225] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {187731#true} is VALID [2022-04-07 21:20:02,499 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {187731#true} {187731#true} [301] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {187731#true} is VALID [2022-04-07 21:20:02,499 INFO L272 TraceCheckUtils]: 4: Hoare triple {187731#true} [221] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {187731#true} is VALID [2022-04-07 21:20:02,499 INFO L290 TraceCheckUtils]: 5: Hoare triple {187731#true} [224] mainENTRY-->L169-1: Formula: (and (= v_main_~p5~0_2 |v_main_#t~nondet8_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (= v_main_~p4~0_2 |v_main_#t~nondet7_2|)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~lk3~0=v_main_~lk3~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p2~0=v_main_~p2~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_2, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p5~0=v_main_~p5~0_2, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~lk4~0=v_main_~lk4~0_3, main_~p3~0=v_main_~p3~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet14, main_#t~nondet13, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {187731#true} is VALID [2022-04-07 21:20:02,499 INFO L290 TraceCheckUtils]: 6: Hoare triple {187731#true} [228] L169-1-->L46: Formula: (and (= |v_main_#t~nondet15_2| v_main_~cond~0_2) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet15=|v_main_#t~nondet15_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet15, main_~cond~0] {187731#true} is VALID [2022-04-07 21:20:02,499 INFO L290 TraceCheckUtils]: 7: Hoare triple {187731#true} [231] L46-->L73: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_3 0) (= v_main_~lk5~0_5 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0) (= v_main_~lk4~0_4 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk1~0=v_main_~lk1~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_5, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk4~0=v_main_~lk4~0_4, main_~lk6~0=v_main_~lk6~0_3, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk2~0, main_~lk3~0, main_~lk11~0, main_~lk1~0, main_~lk10~0, main_~lk5~0, main_~lk4~0, main_~lk6~0, main_~lk9~0, main_~lk8~0, main_~lk7~0] {187731#true} is VALID [2022-04-07 21:20:02,499 INFO L290 TraceCheckUtils]: 8: Hoare triple {187731#true} [234] L73-->L73-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {187731#true} is VALID [2022-04-07 21:20:02,499 INFO L290 TraceCheckUtils]: 9: Hoare triple {187731#true} [236] L73-2-->L77-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {187731#true} is VALID [2022-04-07 21:20:02,499 INFO L290 TraceCheckUtils]: 10: Hoare triple {187731#true} [238] L77-1-->L81-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {187731#true} is VALID [2022-04-07 21:20:02,499 INFO L290 TraceCheckUtils]: 11: Hoare triple {187731#true} [240] L81-1-->L85-1: Formula: (= v_main_~p4~0_4 0) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4} AuxVars[] AssignedVars[] {187731#true} is VALID [2022-04-07 21:20:02,499 INFO L290 TraceCheckUtils]: 12: Hoare triple {187731#true} [242] L85-1-->L89-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {187731#true} is VALID [2022-04-07 21:20:02,499 INFO L290 TraceCheckUtils]: 13: Hoare triple {187731#true} [244] L89-1-->L93-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {187731#true} is VALID [2022-04-07 21:20:02,499 INFO L290 TraceCheckUtils]: 14: Hoare triple {187731#true} [246] L93-1-->L97-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {187731#true} is VALID [2022-04-07 21:20:02,500 INFO L290 TraceCheckUtils]: 15: Hoare triple {187731#true} [248] L97-1-->L101-1: Formula: (= v_main_~p8~0_5 0) InVars {main_~p8~0=v_main_~p8~0_5} OutVars{main_~p8~0=v_main_~p8~0_5} AuxVars[] AssignedVars[] {187731#true} is VALID [2022-04-07 21:20:02,500 INFO L290 TraceCheckUtils]: 16: Hoare triple {187731#true} [249] L101-1-->L105-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {187736#(= main_~lk9~0 1)} is VALID [2022-04-07 21:20:02,500 INFO L290 TraceCheckUtils]: 17: Hoare triple {187736#(= main_~lk9~0 1)} [251] L105-1-->L109-1: Formula: (and (= v_main_~lk10~0_6 1) (not (= v_main_~p10~0_4 0))) InVars {main_~p10~0=v_main_~p10~0_4} OutVars{main_~lk10~0=v_main_~lk10~0_6, main_~p10~0=v_main_~p10~0_4} AuxVars[] AssignedVars[main_~lk10~0] {187736#(= main_~lk9~0 1)} is VALID [2022-04-07 21:20:02,500 INFO L290 TraceCheckUtils]: 18: Hoare triple {187736#(= main_~lk9~0 1)} [253] L109-1-->L113-1: Formula: (and (= v_main_~lk11~0_6 1) (not (= v_main_~p11~0_4 0))) InVars {main_~p11~0=v_main_~p11~0_4} OutVars{main_~lk11~0=v_main_~lk11~0_6, main_~p11~0=v_main_~p11~0_4} AuxVars[] AssignedVars[main_~lk11~0] {187736#(= main_~lk9~0 1)} is VALID [2022-04-07 21:20:02,500 INFO L290 TraceCheckUtils]: 19: Hoare triple {187736#(= main_~lk9~0 1)} [256] L113-1-->L119-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {187736#(= main_~lk9~0 1)} is VALID [2022-04-07 21:20:02,501 INFO L290 TraceCheckUtils]: 20: Hoare triple {187736#(= main_~lk9~0 1)} [260] L119-1-->L124-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {187736#(= main_~lk9~0 1)} is VALID [2022-04-07 21:20:02,501 INFO L290 TraceCheckUtils]: 21: Hoare triple {187736#(= main_~lk9~0 1)} [266] L124-1-->L129-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {187736#(= main_~lk9~0 1)} is VALID [2022-04-07 21:20:02,501 INFO L290 TraceCheckUtils]: 22: Hoare triple {187736#(= main_~lk9~0 1)} [270] L129-1-->L134-1: Formula: (= v_main_~p4~0_1 0) InVars {main_~p4~0=v_main_~p4~0_1} OutVars{main_~p4~0=v_main_~p4~0_1} AuxVars[] AssignedVars[] {187736#(= main_~lk9~0 1)} is VALID [2022-04-07 21:20:02,501 INFO L290 TraceCheckUtils]: 23: Hoare triple {187736#(= main_~lk9~0 1)} [274] L134-1-->L139-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {187736#(= main_~lk9~0 1)} is VALID [2022-04-07 21:20:02,502 INFO L290 TraceCheckUtils]: 24: Hoare triple {187736#(= main_~lk9~0 1)} [278] L139-1-->L144-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {187736#(= main_~lk9~0 1)} is VALID [2022-04-07 21:20:02,502 INFO L290 TraceCheckUtils]: 25: Hoare triple {187736#(= main_~lk9~0 1)} [282] L144-1-->L149-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {187736#(= main_~lk9~0 1)} is VALID [2022-04-07 21:20:02,502 INFO L290 TraceCheckUtils]: 26: Hoare triple {187736#(= main_~lk9~0 1)} [286] L149-1-->L154-1: Formula: (= v_main_~p8~0_3 0) InVars {main_~p8~0=v_main_~p8~0_3} OutVars{main_~p8~0=v_main_~p8~0_3} AuxVars[] AssignedVars[] {187736#(= main_~lk9~0 1)} is VALID [2022-04-07 21:20:02,502 INFO L290 TraceCheckUtils]: 27: Hoare triple {187736#(= main_~lk9~0 1)} [289] L154-1-->L160: Formula: (not (= v_main_~p9~0_2 0)) InVars {main_~p9~0=v_main_~p9~0_2} OutVars{main_~p9~0=v_main_~p9~0_2} AuxVars[] AssignedVars[] {187736#(= main_~lk9~0 1)} is VALID [2022-04-07 21:20:02,502 INFO L290 TraceCheckUtils]: 28: Hoare triple {187736#(= main_~lk9~0 1)} [291] L160-->L170-1: Formula: (not (= v_main_~lk9~0_3 1)) InVars {main_~lk9~0=v_main_~lk9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_3} AuxVars[] AssignedVars[] {187732#false} is VALID [2022-04-07 21:20:02,503 INFO L290 TraceCheckUtils]: 29: Hoare triple {187732#false} [261] L170-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {187732#false} is VALID [2022-04-07 21:20:02,503 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 21:20:02,503 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 21:20:02,503 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1107348551] [2022-04-07 21:20:02,503 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1107348551] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 21:20:02,503 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 21:20:02,503 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-07 21:20:02,503 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1213109247] [2022-04-07 21:20:02,503 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 21:20:02,504 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-07 21:20:02,504 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 21:20:02,505 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:02,526 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 30 edges. 30 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:20:02,526 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-07 21:20:02,526 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 21:20:02,527 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-07 21:20:02,527 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-07 21:20:02,527 INFO L87 Difference]: Start difference. First operand 8201 states and 11015 transitions. Second operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:07,777 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:07,778 INFO L93 Difference]: Finished difference Result 13835 states and 18568 transitions. [2022-04-07 21:20:07,778 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-07 21:20:07,778 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-07 21:20:07,778 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 21:20:07,778 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:07,779 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 110 transitions. [2022-04-07 21:20:07,779 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:07,779 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 110 transitions. [2022-04-07 21:20:07,779 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 110 transitions. [2022-04-07 21:20:07,850 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 110 edges. 110 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:20:13,492 INFO L225 Difference]: With dead ends: 13835 [2022-04-07 21:20:13,493 INFO L226 Difference]: Without dead ends: 13835 [2022-04-07 21:20:13,493 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-07 21:20:13,493 INFO L913 BasicCegarLoop]: 69 mSDtfsCounter, 129 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 64 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 129 SdHoareTripleChecker+Valid, 76 SdHoareTripleChecker+Invalid, 66 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 64 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 21:20:13,494 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [129 Valid, 76 Invalid, 66 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 64 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 21:20:13,501 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13835 states. [2022-04-07 21:20:13,611 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13835 to 12297. [2022-04-07 21:20:13,611 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 21:20:13,623 INFO L82 GeneralOperation]: Start isEquivalent. First operand 13835 states. Second operand has 12297 states, 12293 states have (on average 1.3018791181973481) internal successors, (16004), 12293 states have internal predecessors, (16004), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:13,637 INFO L74 IsIncluded]: Start isIncluded. First operand 13835 states. Second operand has 12297 states, 12293 states have (on average 1.3018791181973481) internal successors, (16004), 12293 states have internal predecessors, (16004), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:13,649 INFO L87 Difference]: Start difference. First operand 13835 states. Second operand has 12297 states, 12293 states have (on average 1.3018791181973481) internal successors, (16004), 12293 states have internal predecessors, (16004), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:18,532 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:18,532 INFO L93 Difference]: Finished difference Result 13835 states and 18568 transitions. [2022-04-07 21:20:18,532 INFO L276 IsEmpty]: Start isEmpty. Operand 13835 states and 18568 transitions. [2022-04-07 21:20:18,543 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:20:18,544 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:20:18,557 INFO L74 IsIncluded]: Start isIncluded. First operand has 12297 states, 12293 states have (on average 1.3018791181973481) internal successors, (16004), 12293 states have internal predecessors, (16004), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 13835 states. [2022-04-07 21:20:18,569 INFO L87 Difference]: Start difference. First operand has 12297 states, 12293 states have (on average 1.3018791181973481) internal successors, (16004), 12293 states have internal predecessors, (16004), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 13835 states. [2022-04-07 21:20:23,554 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:23,554 INFO L93 Difference]: Finished difference Result 13835 states and 18568 transitions. [2022-04-07 21:20:23,554 INFO L276 IsEmpty]: Start isEmpty. Operand 13835 states and 18568 transitions. [2022-04-07 21:20:23,564 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:20:23,565 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:20:23,565 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 21:20:23,565 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 21:20:23,577 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12297 states, 12293 states have (on average 1.3018791181973481) internal successors, (16004), 12293 states have internal predecessors, (16004), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:27,437 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12297 states to 12297 states and 16007 transitions. [2022-04-07 21:20:27,437 INFO L78 Accepts]: Start accepts. Automaton has 12297 states and 16007 transitions. Word has length 30 [2022-04-07 21:20:27,437 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 21:20:27,437 INFO L478 AbstractCegarLoop]: Abstraction has 12297 states and 16007 transitions. [2022-04-07 21:20:27,437 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:27,437 INFO L276 IsEmpty]: Start isEmpty. Operand 12297 states and 16007 transitions. [2022-04-07 21:20:27,443 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2022-04-07 21:20:27,443 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 21:20:27,444 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 21:20:27,444 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2022-04-07 21:20:27,444 INFO L403 AbstractCegarLoop]: === Iteration 25 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 21:20:27,444 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 21:20:27,444 INFO L85 PathProgramCache]: Analyzing trace with hash -1678340332, now seen corresponding path program 1 times [2022-04-07 21:20:27,444 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 21:20:27,444 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1417582398] [2022-04-07 21:20:27,444 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 21:20:27,444 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 21:20:27,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:20:27,468 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 21:20:27,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:20:27,470 INFO L290 TraceCheckUtils]: 0: Hoare triple {241551#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [222] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {241545#true} is VALID [2022-04-07 21:20:27,471 INFO L290 TraceCheckUtils]: 1: Hoare triple {241545#true} [225] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {241545#true} is VALID [2022-04-07 21:20:27,471 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {241545#true} {241545#true} [301] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {241545#true} is VALID [2022-04-07 21:20:27,471 INFO L272 TraceCheckUtils]: 0: Hoare triple {241545#true} [220] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {241551#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 21:20:27,471 INFO L290 TraceCheckUtils]: 1: Hoare triple {241551#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [222] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {241545#true} is VALID [2022-04-07 21:20:27,471 INFO L290 TraceCheckUtils]: 2: Hoare triple {241545#true} [225] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {241545#true} is VALID [2022-04-07 21:20:27,471 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {241545#true} {241545#true} [301] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {241545#true} is VALID [2022-04-07 21:20:27,471 INFO L272 TraceCheckUtils]: 4: Hoare triple {241545#true} [221] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {241545#true} is VALID [2022-04-07 21:20:27,471 INFO L290 TraceCheckUtils]: 5: Hoare triple {241545#true} [224] mainENTRY-->L169-1: Formula: (and (= v_main_~p5~0_2 |v_main_#t~nondet8_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (= v_main_~p4~0_2 |v_main_#t~nondet7_2|)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~lk3~0=v_main_~lk3~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p2~0=v_main_~p2~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_2, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p5~0=v_main_~p5~0_2, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~lk4~0=v_main_~lk4~0_3, main_~p3~0=v_main_~p3~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet14, main_#t~nondet13, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {241545#true} is VALID [2022-04-07 21:20:27,472 INFO L290 TraceCheckUtils]: 6: Hoare triple {241545#true} [228] L169-1-->L46: Formula: (and (= |v_main_#t~nondet15_2| v_main_~cond~0_2) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet15=|v_main_#t~nondet15_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet15, main_~cond~0] {241545#true} is VALID [2022-04-07 21:20:27,472 INFO L290 TraceCheckUtils]: 7: Hoare triple {241545#true} [231] L46-->L73: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_3 0) (= v_main_~lk5~0_5 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0) (= v_main_~lk4~0_4 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk1~0=v_main_~lk1~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_5, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk4~0=v_main_~lk4~0_4, main_~lk6~0=v_main_~lk6~0_3, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk2~0, main_~lk3~0, main_~lk11~0, main_~lk1~0, main_~lk10~0, main_~lk5~0, main_~lk4~0, main_~lk6~0, main_~lk9~0, main_~lk8~0, main_~lk7~0] {241545#true} is VALID [2022-04-07 21:20:27,472 INFO L290 TraceCheckUtils]: 8: Hoare triple {241545#true} [234] L73-->L73-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {241545#true} is VALID [2022-04-07 21:20:27,472 INFO L290 TraceCheckUtils]: 9: Hoare triple {241545#true} [236] L73-2-->L77-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {241545#true} is VALID [2022-04-07 21:20:27,472 INFO L290 TraceCheckUtils]: 10: Hoare triple {241545#true} [238] L77-1-->L81-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {241545#true} is VALID [2022-04-07 21:20:27,472 INFO L290 TraceCheckUtils]: 11: Hoare triple {241545#true} [240] L81-1-->L85-1: Formula: (= v_main_~p4~0_4 0) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4} AuxVars[] AssignedVars[] {241545#true} is VALID [2022-04-07 21:20:27,472 INFO L290 TraceCheckUtils]: 12: Hoare triple {241545#true} [242] L85-1-->L89-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {241545#true} is VALID [2022-04-07 21:20:27,472 INFO L290 TraceCheckUtils]: 13: Hoare triple {241545#true} [244] L89-1-->L93-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {241545#true} is VALID [2022-04-07 21:20:27,472 INFO L290 TraceCheckUtils]: 14: Hoare triple {241545#true} [246] L93-1-->L97-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {241545#true} is VALID [2022-04-07 21:20:27,472 INFO L290 TraceCheckUtils]: 15: Hoare triple {241545#true} [248] L97-1-->L101-1: Formula: (= v_main_~p8~0_5 0) InVars {main_~p8~0=v_main_~p8~0_5} OutVars{main_~p8~0=v_main_~p8~0_5} AuxVars[] AssignedVars[] {241545#true} is VALID [2022-04-07 21:20:27,475 INFO L290 TraceCheckUtils]: 16: Hoare triple {241545#true} [250] L101-1-->L105-1: Formula: (= v_main_~p9~0_5 0) InVars {main_~p9~0=v_main_~p9~0_5} OutVars{main_~p9~0=v_main_~p9~0_5} AuxVars[] AssignedVars[] {241550#(= main_~p9~0 0)} is VALID [2022-04-07 21:20:27,475 INFO L290 TraceCheckUtils]: 17: Hoare triple {241550#(= main_~p9~0 0)} [251] L105-1-->L109-1: Formula: (and (= v_main_~lk10~0_6 1) (not (= v_main_~p10~0_4 0))) InVars {main_~p10~0=v_main_~p10~0_4} OutVars{main_~lk10~0=v_main_~lk10~0_6, main_~p10~0=v_main_~p10~0_4} AuxVars[] AssignedVars[main_~lk10~0] {241550#(= main_~p9~0 0)} is VALID [2022-04-07 21:20:27,475 INFO L290 TraceCheckUtils]: 18: Hoare triple {241550#(= main_~p9~0 0)} [253] L109-1-->L113-1: Formula: (and (= v_main_~lk11~0_6 1) (not (= v_main_~p11~0_4 0))) InVars {main_~p11~0=v_main_~p11~0_4} OutVars{main_~lk11~0=v_main_~lk11~0_6, main_~p11~0=v_main_~p11~0_4} AuxVars[] AssignedVars[main_~lk11~0] {241550#(= main_~p9~0 0)} is VALID [2022-04-07 21:20:27,476 INFO L290 TraceCheckUtils]: 19: Hoare triple {241550#(= main_~p9~0 0)} [256] L113-1-->L119-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {241550#(= main_~p9~0 0)} is VALID [2022-04-07 21:20:27,476 INFO L290 TraceCheckUtils]: 20: Hoare triple {241550#(= main_~p9~0 0)} [260] L119-1-->L124-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {241550#(= main_~p9~0 0)} is VALID [2022-04-07 21:20:27,476 INFO L290 TraceCheckUtils]: 21: Hoare triple {241550#(= main_~p9~0 0)} [266] L124-1-->L129-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {241550#(= main_~p9~0 0)} is VALID [2022-04-07 21:20:27,476 INFO L290 TraceCheckUtils]: 22: Hoare triple {241550#(= main_~p9~0 0)} [270] L129-1-->L134-1: Formula: (= v_main_~p4~0_1 0) InVars {main_~p4~0=v_main_~p4~0_1} OutVars{main_~p4~0=v_main_~p4~0_1} AuxVars[] AssignedVars[] {241550#(= main_~p9~0 0)} is VALID [2022-04-07 21:20:27,477 INFO L290 TraceCheckUtils]: 23: Hoare triple {241550#(= main_~p9~0 0)} [274] L134-1-->L139-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {241550#(= main_~p9~0 0)} is VALID [2022-04-07 21:20:27,477 INFO L290 TraceCheckUtils]: 24: Hoare triple {241550#(= main_~p9~0 0)} [278] L139-1-->L144-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {241550#(= main_~p9~0 0)} is VALID [2022-04-07 21:20:27,477 INFO L290 TraceCheckUtils]: 25: Hoare triple {241550#(= main_~p9~0 0)} [282] L144-1-->L149-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {241550#(= main_~p9~0 0)} is VALID [2022-04-07 21:20:27,477 INFO L290 TraceCheckUtils]: 26: Hoare triple {241550#(= main_~p9~0 0)} [286] L149-1-->L154-1: Formula: (= v_main_~p8~0_3 0) InVars {main_~p8~0=v_main_~p8~0_3} OutVars{main_~p8~0=v_main_~p8~0_3} AuxVars[] AssignedVars[] {241550#(= main_~p9~0 0)} is VALID [2022-04-07 21:20:27,478 INFO L290 TraceCheckUtils]: 27: Hoare triple {241550#(= main_~p9~0 0)} [289] L154-1-->L160: Formula: (not (= v_main_~p9~0_2 0)) InVars {main_~p9~0=v_main_~p9~0_2} OutVars{main_~p9~0=v_main_~p9~0_2} AuxVars[] AssignedVars[] {241546#false} is VALID [2022-04-07 21:20:27,478 INFO L290 TraceCheckUtils]: 28: Hoare triple {241546#false} [291] L160-->L170-1: Formula: (not (= v_main_~lk9~0_3 1)) InVars {main_~lk9~0=v_main_~lk9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_3} AuxVars[] AssignedVars[] {241546#false} is VALID [2022-04-07 21:20:27,478 INFO L290 TraceCheckUtils]: 29: Hoare triple {241546#false} [261] L170-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {241546#false} is VALID [2022-04-07 21:20:27,478 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 21:20:27,478 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 21:20:27,478 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1417582398] [2022-04-07 21:20:27,478 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1417582398] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 21:20:27,478 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 21:20:27,478 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-07 21:20:27,478 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1956186985] [2022-04-07 21:20:27,478 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 21:20:27,479 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-07 21:20:27,479 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 21:20:27,479 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:27,494 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 30 edges. 30 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:20:27,494 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-07 21:20:27,494 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 21:20:27,495 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-07 21:20:27,495 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-07 21:20:27,495 INFO L87 Difference]: Start difference. First operand 12297 states and 16007 transitions. Second operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:34,131 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:34,131 INFO L93 Difference]: Finished difference Result 15883 states and 20232 transitions. [2022-04-07 21:20:34,131 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-07 21:20:34,132 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-07 21:20:34,132 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 21:20:34,132 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:34,132 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 125 transitions. [2022-04-07 21:20:34,132 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:34,133 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 125 transitions. [2022-04-07 21:20:34,133 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 125 transitions. [2022-04-07 21:20:34,230 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 125 edges. 125 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:20:41,376 INFO L225 Difference]: With dead ends: 15883 [2022-04-07 21:20:41,377 INFO L226 Difference]: Without dead ends: 15883 [2022-04-07 21:20:41,377 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-07 21:20:41,377 INFO L913 BasicCegarLoop]: 112 mSDtfsCounter, 115 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 62 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 115 SdHoareTripleChecker+Valid, 119 SdHoareTripleChecker+Invalid, 65 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 62 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 21:20:41,377 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [115 Valid, 119 Invalid, 65 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 62 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 21:20:41,382 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15883 states. [2022-04-07 21:20:41,501 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15883 to 15881. [2022-04-07 21:20:41,501 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 21:20:41,519 INFO L82 GeneralOperation]: Start isEquivalent. First operand 15883 states. Second operand has 15881 states, 15877 states have (on average 1.2740442149020597) internal successors, (20228), 15877 states have internal predecessors, (20228), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:41,535 INFO L74 IsIncluded]: Start isIncluded. First operand 15883 states. Second operand has 15881 states, 15877 states have (on average 1.2740442149020597) internal successors, (20228), 15877 states have internal predecessors, (20228), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:41,552 INFO L87 Difference]: Start difference. First operand 15883 states. Second operand has 15881 states, 15877 states have (on average 1.2740442149020597) internal successors, (20228), 15877 states have internal predecessors, (20228), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:47,581 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:47,581 INFO L93 Difference]: Finished difference Result 15883 states and 20232 transitions. [2022-04-07 21:20:47,581 INFO L276 IsEmpty]: Start isEmpty. Operand 15883 states and 20232 transitions. [2022-04-07 21:20:47,636 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:20:47,636 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:20:47,647 INFO L74 IsIncluded]: Start isIncluded. First operand has 15881 states, 15877 states have (on average 1.2740442149020597) internal successors, (20228), 15877 states have internal predecessors, (20228), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 15883 states. [2022-04-07 21:20:47,655 INFO L87 Difference]: Start difference. First operand has 15881 states, 15877 states have (on average 1.2740442149020597) internal successors, (20228), 15877 states have internal predecessors, (20228), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 15883 states. [2022-04-07 21:20:53,481 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:53,482 INFO L93 Difference]: Finished difference Result 15883 states and 20232 transitions. [2022-04-07 21:20:53,482 INFO L276 IsEmpty]: Start isEmpty. Operand 15883 states and 20232 transitions. [2022-04-07 21:20:53,492 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:20:53,492 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:20:53,492 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 21:20:53,492 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 21:20:53,502 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15881 states, 15877 states have (on average 1.2740442149020597) internal successors, (20228), 15877 states have internal predecessors, (20228), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:59,802 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15881 states to 15881 states and 20231 transitions. [2022-04-07 21:20:59,802 INFO L78 Accepts]: Start accepts. Automaton has 15881 states and 20231 transitions. Word has length 30 [2022-04-07 21:20:59,802 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 21:20:59,802 INFO L478 AbstractCegarLoop]: Abstraction has 15881 states and 20231 transitions. [2022-04-07 21:20:59,803 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:59,803 INFO L276 IsEmpty]: Start isEmpty. Operand 15881 states and 20231 transitions. [2022-04-07 21:20:59,809 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-04-07 21:20:59,809 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 21:20:59,809 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 21:20:59,809 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2022-04-07 21:20:59,809 INFO L403 AbstractCegarLoop]: === Iteration 26 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 21:20:59,810 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 21:20:59,810 INFO L85 PathProgramCache]: Analyzing trace with hash -1996461521, now seen corresponding path program 1 times [2022-04-07 21:20:59,810 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 21:20:59,810 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [301022491] [2022-04-07 21:20:59,810 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 21:20:59,810 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 21:20:59,819 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:20:59,837 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 21:20:59,850 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:20:59,852 INFO L290 TraceCheckUtils]: 0: Hoare triple {305093#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [222] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {305087#true} is VALID [2022-04-07 21:20:59,852 INFO L290 TraceCheckUtils]: 1: Hoare triple {305087#true} [225] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {305087#true} is VALID [2022-04-07 21:20:59,852 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {305087#true} {305087#true} [301] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {305087#true} is VALID [2022-04-07 21:20:59,853 INFO L272 TraceCheckUtils]: 0: Hoare triple {305087#true} [220] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {305093#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 21:20:59,853 INFO L290 TraceCheckUtils]: 1: Hoare triple {305093#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [222] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {305087#true} is VALID [2022-04-07 21:20:59,853 INFO L290 TraceCheckUtils]: 2: Hoare triple {305087#true} [225] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {305087#true} is VALID [2022-04-07 21:20:59,853 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {305087#true} {305087#true} [301] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {305087#true} is VALID [2022-04-07 21:20:59,853 INFO L272 TraceCheckUtils]: 4: Hoare triple {305087#true} [221] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {305087#true} is VALID [2022-04-07 21:20:59,853 INFO L290 TraceCheckUtils]: 5: Hoare triple {305087#true} [224] mainENTRY-->L169-1: Formula: (and (= v_main_~p5~0_2 |v_main_#t~nondet8_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (= v_main_~p4~0_2 |v_main_#t~nondet7_2|)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~lk3~0=v_main_~lk3~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p2~0=v_main_~p2~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_2, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p5~0=v_main_~p5~0_2, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~lk4~0=v_main_~lk4~0_3, main_~p3~0=v_main_~p3~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet14, main_#t~nondet13, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {305087#true} is VALID [2022-04-07 21:20:59,853 INFO L290 TraceCheckUtils]: 6: Hoare triple {305087#true} [228] L169-1-->L46: Formula: (and (= |v_main_#t~nondet15_2| v_main_~cond~0_2) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet15=|v_main_#t~nondet15_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet15, main_~cond~0] {305087#true} is VALID [2022-04-07 21:20:59,853 INFO L290 TraceCheckUtils]: 7: Hoare triple {305087#true} [231] L46-->L73: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_3 0) (= v_main_~lk5~0_5 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0) (= v_main_~lk4~0_4 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk1~0=v_main_~lk1~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_5, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk4~0=v_main_~lk4~0_4, main_~lk6~0=v_main_~lk6~0_3, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk2~0, main_~lk3~0, main_~lk11~0, main_~lk1~0, main_~lk10~0, main_~lk5~0, main_~lk4~0, main_~lk6~0, main_~lk9~0, main_~lk8~0, main_~lk7~0] {305087#true} is VALID [2022-04-07 21:20:59,853 INFO L290 TraceCheckUtils]: 8: Hoare triple {305087#true} [234] L73-->L73-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {305087#true} is VALID [2022-04-07 21:20:59,853 INFO L290 TraceCheckUtils]: 9: Hoare triple {305087#true} [236] L73-2-->L77-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {305087#true} is VALID [2022-04-07 21:20:59,854 INFO L290 TraceCheckUtils]: 10: Hoare triple {305087#true} [238] L77-1-->L81-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {305087#true} is VALID [2022-04-07 21:20:59,854 INFO L290 TraceCheckUtils]: 11: Hoare triple {305087#true} [240] L81-1-->L85-1: Formula: (= v_main_~p4~0_4 0) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4} AuxVars[] AssignedVars[] {305087#true} is VALID [2022-04-07 21:20:59,854 INFO L290 TraceCheckUtils]: 12: Hoare triple {305087#true} [242] L85-1-->L89-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {305087#true} is VALID [2022-04-07 21:20:59,854 INFO L290 TraceCheckUtils]: 13: Hoare triple {305087#true} [244] L89-1-->L93-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {305087#true} is VALID [2022-04-07 21:20:59,854 INFO L290 TraceCheckUtils]: 14: Hoare triple {305087#true} [246] L93-1-->L97-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {305087#true} is VALID [2022-04-07 21:20:59,854 INFO L290 TraceCheckUtils]: 15: Hoare triple {305087#true} [248] L97-1-->L101-1: Formula: (= v_main_~p8~0_5 0) InVars {main_~p8~0=v_main_~p8~0_5} OutVars{main_~p8~0=v_main_~p8~0_5} AuxVars[] AssignedVars[] {305087#true} is VALID [2022-04-07 21:20:59,854 INFO L290 TraceCheckUtils]: 16: Hoare triple {305087#true} [249] L101-1-->L105-1: Formula: (and (= v_main_~lk9~0_6 1) (not (= v_main_~p9~0_4 0))) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_6, main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[main_~lk9~0] {305092#(not (= main_~p9~0 0))} is VALID [2022-04-07 21:20:59,854 INFO L290 TraceCheckUtils]: 17: Hoare triple {305092#(not (= main_~p9~0 0))} [251] L105-1-->L109-1: Formula: (and (= v_main_~lk10~0_6 1) (not (= v_main_~p10~0_4 0))) InVars {main_~p10~0=v_main_~p10~0_4} OutVars{main_~lk10~0=v_main_~lk10~0_6, main_~p10~0=v_main_~p10~0_4} AuxVars[] AssignedVars[main_~lk10~0] {305092#(not (= main_~p9~0 0))} is VALID [2022-04-07 21:20:59,855 INFO L290 TraceCheckUtils]: 18: Hoare triple {305092#(not (= main_~p9~0 0))} [253] L109-1-->L113-1: Formula: (and (= v_main_~lk11~0_6 1) (not (= v_main_~p11~0_4 0))) InVars {main_~p11~0=v_main_~p11~0_4} OutVars{main_~lk11~0=v_main_~lk11~0_6, main_~p11~0=v_main_~p11~0_4} AuxVars[] AssignedVars[main_~lk11~0] {305092#(not (= main_~p9~0 0))} is VALID [2022-04-07 21:20:59,855 INFO L290 TraceCheckUtils]: 19: Hoare triple {305092#(not (= main_~p9~0 0))} [256] L113-1-->L119-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {305092#(not (= main_~p9~0 0))} is VALID [2022-04-07 21:20:59,855 INFO L290 TraceCheckUtils]: 20: Hoare triple {305092#(not (= main_~p9~0 0))} [260] L119-1-->L124-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {305092#(not (= main_~p9~0 0))} is VALID [2022-04-07 21:20:59,855 INFO L290 TraceCheckUtils]: 21: Hoare triple {305092#(not (= main_~p9~0 0))} [266] L124-1-->L129-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {305092#(not (= main_~p9~0 0))} is VALID [2022-04-07 21:20:59,855 INFO L290 TraceCheckUtils]: 22: Hoare triple {305092#(not (= main_~p9~0 0))} [270] L129-1-->L134-1: Formula: (= v_main_~p4~0_1 0) InVars {main_~p4~0=v_main_~p4~0_1} OutVars{main_~p4~0=v_main_~p4~0_1} AuxVars[] AssignedVars[] {305092#(not (= main_~p9~0 0))} is VALID [2022-04-07 21:20:59,856 INFO L290 TraceCheckUtils]: 23: Hoare triple {305092#(not (= main_~p9~0 0))} [274] L134-1-->L139-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {305092#(not (= main_~p9~0 0))} is VALID [2022-04-07 21:20:59,856 INFO L290 TraceCheckUtils]: 24: Hoare triple {305092#(not (= main_~p9~0 0))} [278] L139-1-->L144-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {305092#(not (= main_~p9~0 0))} is VALID [2022-04-07 21:20:59,856 INFO L290 TraceCheckUtils]: 25: Hoare triple {305092#(not (= main_~p9~0 0))} [282] L144-1-->L149-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {305092#(not (= main_~p9~0 0))} is VALID [2022-04-07 21:20:59,856 INFO L290 TraceCheckUtils]: 26: Hoare triple {305092#(not (= main_~p9~0 0))} [286] L149-1-->L154-1: Formula: (= v_main_~p8~0_3 0) InVars {main_~p8~0=v_main_~p8~0_3} OutVars{main_~p8~0=v_main_~p8~0_3} AuxVars[] AssignedVars[] {305092#(not (= main_~p9~0 0))} is VALID [2022-04-07 21:20:59,857 INFO L290 TraceCheckUtils]: 27: Hoare triple {305092#(not (= main_~p9~0 0))} [290] L154-1-->L159-1: Formula: (= v_main_~p9~0_3 0) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[] {305088#false} is VALID [2022-04-07 21:20:59,857 INFO L290 TraceCheckUtils]: 28: Hoare triple {305088#false} [293] L159-1-->L165: Formula: (not (= v_main_~p10~0_2 0)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[] {305088#false} is VALID [2022-04-07 21:20:59,857 INFO L290 TraceCheckUtils]: 29: Hoare triple {305088#false} [295] L165-->L170-1: Formula: (not (= v_main_~lk10~0_3 1)) InVars {main_~lk10~0=v_main_~lk10~0_3} OutVars{main_~lk10~0=v_main_~lk10~0_3} AuxVars[] AssignedVars[] {305088#false} is VALID [2022-04-07 21:20:59,857 INFO L290 TraceCheckUtils]: 30: Hoare triple {305088#false} [261] L170-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {305088#false} is VALID [2022-04-07 21:20:59,857 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 21:20:59,857 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 21:20:59,857 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [301022491] [2022-04-07 21:20:59,857 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [301022491] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 21:20:59,857 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 21:20:59,857 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-07 21:20:59,857 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1645834167] [2022-04-07 21:20:59,857 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 21:20:59,858 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-07 21:20:59,858 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 21:20:59,858 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:59,877 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 31 edges. 31 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:20:59,877 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-07 21:20:59,877 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 21:20:59,877 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-07 21:20:59,877 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-07 21:20:59,877 INFO L87 Difference]: Start difference. First operand 15881 states and 20231 transitions. Second operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:21:06,075 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:21:06,076 INFO L93 Difference]: Finished difference Result 16139 states and 20232 transitions. [2022-04-07 21:21:06,076 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-07 21:21:06,076 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-07 21:21:06,076 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 21:21:06,076 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:21:06,077 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 124 transitions. [2022-04-07 21:21:06,077 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:21:06,077 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 124 transitions. [2022-04-07 21:21:06,077 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 124 transitions. [2022-04-07 21:21:06,160 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 124 edges. 124 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:21:12,875 INFO L225 Difference]: With dead ends: 16139 [2022-04-07 21:21:12,875 INFO L226 Difference]: Without dead ends: 16139 [2022-04-07 21:21:12,875 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-07 21:21:12,876 INFO L913 BasicCegarLoop]: 92 mSDtfsCounter, 136 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 61 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 136 SdHoareTripleChecker+Valid, 99 SdHoareTripleChecker+Invalid, 63 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 61 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 21:21:12,876 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [136 Valid, 99 Invalid, 63 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 61 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 21:21:12,880 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16139 states. [2022-04-07 21:21:12,985 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16139 to 16137. [2022-04-07 21:21:12,985 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 21:21:13,002 INFO L82 GeneralOperation]: Start isEquivalent. First operand 16139 states. Second operand has 16137 states, 16133 states have (on average 1.2538275584206284) internal successors, (20228), 16133 states have internal predecessors, (20228), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:21:13,019 INFO L74 IsIncluded]: Start isIncluded. First operand 16139 states. Second operand has 16137 states, 16133 states have (on average 1.2538275584206284) internal successors, (20228), 16133 states have internal predecessors, (20228), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:21:13,036 INFO L87 Difference]: Start difference. First operand 16139 states. Second operand has 16137 states, 16133 states have (on average 1.2538275584206284) internal successors, (20228), 16133 states have internal predecessors, (20228), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:21:18,876 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:21:18,876 INFO L93 Difference]: Finished difference Result 16139 states and 20232 transitions. [2022-04-07 21:21:18,876 INFO L276 IsEmpty]: Start isEmpty. Operand 16139 states and 20232 transitions. [2022-04-07 21:21:18,886 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:21:18,887 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:21:18,897 INFO L74 IsIncluded]: Start isIncluded. First operand has 16137 states, 16133 states have (on average 1.2538275584206284) internal successors, (20228), 16133 states have internal predecessors, (20228), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 16139 states. [2022-04-07 21:21:18,906 INFO L87 Difference]: Start difference. First operand has 16137 states, 16133 states have (on average 1.2538275584206284) internal successors, (20228), 16133 states have internal predecessors, (20228), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 16139 states. [2022-04-07 21:21:25,250 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:21:25,250 INFO L93 Difference]: Finished difference Result 16139 states and 20232 transitions. [2022-04-07 21:21:25,250 INFO L276 IsEmpty]: Start isEmpty. Operand 16139 states and 20232 transitions. [2022-04-07 21:21:25,262 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:21:25,262 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:21:25,262 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 21:21:25,262 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 21:21:25,273 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16137 states, 16133 states have (on average 1.2538275584206284) internal successors, (20228), 16133 states have internal predecessors, (20228), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:21:31,501 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16137 states to 16137 states and 20231 transitions. [2022-04-07 21:21:31,501 INFO L78 Accepts]: Start accepts. Automaton has 16137 states and 20231 transitions. Word has length 31 [2022-04-07 21:21:31,501 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 21:21:31,501 INFO L478 AbstractCegarLoop]: Abstraction has 16137 states and 20231 transitions. [2022-04-07 21:21:31,501 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:21:31,501 INFO L276 IsEmpty]: Start isEmpty. Operand 16137 states and 20231 transitions. [2022-04-07 21:21:31,507 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-04-07 21:21:31,507 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 21:21:31,507 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 21:21:31,508 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2022-04-07 21:21:31,508 INFO L403 AbstractCegarLoop]: === Iteration 27 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 21:21:31,508 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 21:21:31,508 INFO L85 PathProgramCache]: Analyzing trace with hash -488909712, now seen corresponding path program 1 times [2022-04-07 21:21:31,508 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 21:21:31,508 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1577185761] [2022-04-07 21:21:31,508 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 21:21:31,508 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 21:21:31,517 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:21:31,544 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 21:21:31,545 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:21:31,547 INFO L290 TraceCheckUtils]: 0: Hoare triple {369659#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [222] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {369653#true} is VALID [2022-04-07 21:21:31,547 INFO L290 TraceCheckUtils]: 1: Hoare triple {369653#true} [225] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {369653#true} is VALID [2022-04-07 21:21:31,547 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {369653#true} {369653#true} [301] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {369653#true} is VALID [2022-04-07 21:21:31,547 INFO L272 TraceCheckUtils]: 0: Hoare triple {369653#true} [220] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {369659#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 21:21:31,547 INFO L290 TraceCheckUtils]: 1: Hoare triple {369659#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [222] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {369653#true} is VALID [2022-04-07 21:21:31,547 INFO L290 TraceCheckUtils]: 2: Hoare triple {369653#true} [225] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {369653#true} is VALID [2022-04-07 21:21:31,547 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {369653#true} {369653#true} [301] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {369653#true} is VALID [2022-04-07 21:21:31,547 INFO L272 TraceCheckUtils]: 4: Hoare triple {369653#true} [221] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {369653#true} is VALID [2022-04-07 21:21:31,548 INFO L290 TraceCheckUtils]: 5: Hoare triple {369653#true} [224] mainENTRY-->L169-1: Formula: (and (= v_main_~p5~0_2 |v_main_#t~nondet8_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (= v_main_~p4~0_2 |v_main_#t~nondet7_2|)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~lk3~0=v_main_~lk3~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p2~0=v_main_~p2~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_2, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p5~0=v_main_~p5~0_2, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~lk4~0=v_main_~lk4~0_3, main_~p3~0=v_main_~p3~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet14, main_#t~nondet13, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {369653#true} is VALID [2022-04-07 21:21:31,548 INFO L290 TraceCheckUtils]: 6: Hoare triple {369653#true} [228] L169-1-->L46: Formula: (and (= |v_main_#t~nondet15_2| v_main_~cond~0_2) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet15=|v_main_#t~nondet15_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet15, main_~cond~0] {369653#true} is VALID [2022-04-07 21:21:31,548 INFO L290 TraceCheckUtils]: 7: Hoare triple {369653#true} [231] L46-->L73: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_3 0) (= v_main_~lk5~0_5 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0) (= v_main_~lk4~0_4 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk1~0=v_main_~lk1~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_5, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk4~0=v_main_~lk4~0_4, main_~lk6~0=v_main_~lk6~0_3, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk2~0, main_~lk3~0, main_~lk11~0, main_~lk1~0, main_~lk10~0, main_~lk5~0, main_~lk4~0, main_~lk6~0, main_~lk9~0, main_~lk8~0, main_~lk7~0] {369653#true} is VALID [2022-04-07 21:21:31,548 INFO L290 TraceCheckUtils]: 8: Hoare triple {369653#true} [234] L73-->L73-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {369653#true} is VALID [2022-04-07 21:21:31,548 INFO L290 TraceCheckUtils]: 9: Hoare triple {369653#true} [236] L73-2-->L77-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {369653#true} is VALID [2022-04-07 21:21:31,548 INFO L290 TraceCheckUtils]: 10: Hoare triple {369653#true} [238] L77-1-->L81-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {369653#true} is VALID [2022-04-07 21:21:31,548 INFO L290 TraceCheckUtils]: 11: Hoare triple {369653#true} [240] L81-1-->L85-1: Formula: (= v_main_~p4~0_4 0) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4} AuxVars[] AssignedVars[] {369653#true} is VALID [2022-04-07 21:21:31,548 INFO L290 TraceCheckUtils]: 12: Hoare triple {369653#true} [242] L85-1-->L89-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {369653#true} is VALID [2022-04-07 21:21:31,548 INFO L290 TraceCheckUtils]: 13: Hoare triple {369653#true} [244] L89-1-->L93-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {369653#true} is VALID [2022-04-07 21:21:31,548 INFO L290 TraceCheckUtils]: 14: Hoare triple {369653#true} [246] L93-1-->L97-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {369653#true} is VALID [2022-04-07 21:21:31,548 INFO L290 TraceCheckUtils]: 15: Hoare triple {369653#true} [248] L97-1-->L101-1: Formula: (= v_main_~p8~0_5 0) InVars {main_~p8~0=v_main_~p8~0_5} OutVars{main_~p8~0=v_main_~p8~0_5} AuxVars[] AssignedVars[] {369653#true} is VALID [2022-04-07 21:21:31,548 INFO L290 TraceCheckUtils]: 16: Hoare triple {369653#true} [250] L101-1-->L105-1: Formula: (= v_main_~p9~0_5 0) InVars {main_~p9~0=v_main_~p9~0_5} OutVars{main_~p9~0=v_main_~p9~0_5} AuxVars[] AssignedVars[] {369653#true} is VALID [2022-04-07 21:21:31,548 INFO L290 TraceCheckUtils]: 17: Hoare triple {369653#true} [251] L105-1-->L109-1: Formula: (and (= v_main_~lk10~0_6 1) (not (= v_main_~p10~0_4 0))) InVars {main_~p10~0=v_main_~p10~0_4} OutVars{main_~lk10~0=v_main_~lk10~0_6, main_~p10~0=v_main_~p10~0_4} AuxVars[] AssignedVars[main_~lk10~0] {369658#(= main_~lk10~0 1)} is VALID [2022-04-07 21:21:31,549 INFO L290 TraceCheckUtils]: 18: Hoare triple {369658#(= main_~lk10~0 1)} [253] L109-1-->L113-1: Formula: (and (= v_main_~lk11~0_6 1) (not (= v_main_~p11~0_4 0))) InVars {main_~p11~0=v_main_~p11~0_4} OutVars{main_~lk11~0=v_main_~lk11~0_6, main_~p11~0=v_main_~p11~0_4} AuxVars[] AssignedVars[main_~lk11~0] {369658#(= main_~lk10~0 1)} is VALID [2022-04-07 21:21:31,549 INFO L290 TraceCheckUtils]: 19: Hoare triple {369658#(= main_~lk10~0 1)} [256] L113-1-->L119-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {369658#(= main_~lk10~0 1)} is VALID [2022-04-07 21:21:31,549 INFO L290 TraceCheckUtils]: 20: Hoare triple {369658#(= main_~lk10~0 1)} [260] L119-1-->L124-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {369658#(= main_~lk10~0 1)} is VALID [2022-04-07 21:21:31,549 INFO L290 TraceCheckUtils]: 21: Hoare triple {369658#(= main_~lk10~0 1)} [266] L124-1-->L129-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {369658#(= main_~lk10~0 1)} is VALID [2022-04-07 21:21:31,550 INFO L290 TraceCheckUtils]: 22: Hoare triple {369658#(= main_~lk10~0 1)} [270] L129-1-->L134-1: Formula: (= v_main_~p4~0_1 0) InVars {main_~p4~0=v_main_~p4~0_1} OutVars{main_~p4~0=v_main_~p4~0_1} AuxVars[] AssignedVars[] {369658#(= main_~lk10~0 1)} is VALID [2022-04-07 21:21:31,550 INFO L290 TraceCheckUtils]: 23: Hoare triple {369658#(= main_~lk10~0 1)} [274] L134-1-->L139-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {369658#(= main_~lk10~0 1)} is VALID [2022-04-07 21:21:31,550 INFO L290 TraceCheckUtils]: 24: Hoare triple {369658#(= main_~lk10~0 1)} [278] L139-1-->L144-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {369658#(= main_~lk10~0 1)} is VALID [2022-04-07 21:21:31,550 INFO L290 TraceCheckUtils]: 25: Hoare triple {369658#(= main_~lk10~0 1)} [282] L144-1-->L149-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {369658#(= main_~lk10~0 1)} is VALID [2022-04-07 21:21:31,550 INFO L290 TraceCheckUtils]: 26: Hoare triple {369658#(= main_~lk10~0 1)} [286] L149-1-->L154-1: Formula: (= v_main_~p8~0_3 0) InVars {main_~p8~0=v_main_~p8~0_3} OutVars{main_~p8~0=v_main_~p8~0_3} AuxVars[] AssignedVars[] {369658#(= main_~lk10~0 1)} is VALID [2022-04-07 21:21:31,551 INFO L290 TraceCheckUtils]: 27: Hoare triple {369658#(= main_~lk10~0 1)} [290] L154-1-->L159-1: Formula: (= v_main_~p9~0_3 0) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[] {369658#(= main_~lk10~0 1)} is VALID [2022-04-07 21:21:31,551 INFO L290 TraceCheckUtils]: 28: Hoare triple {369658#(= main_~lk10~0 1)} [293] L159-1-->L165: Formula: (not (= v_main_~p10~0_2 0)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[] {369658#(= main_~lk10~0 1)} is VALID [2022-04-07 21:21:31,551 INFO L290 TraceCheckUtils]: 29: Hoare triple {369658#(= main_~lk10~0 1)} [295] L165-->L170-1: Formula: (not (= v_main_~lk10~0_3 1)) InVars {main_~lk10~0=v_main_~lk10~0_3} OutVars{main_~lk10~0=v_main_~lk10~0_3} AuxVars[] AssignedVars[] {369654#false} is VALID [2022-04-07 21:21:31,551 INFO L290 TraceCheckUtils]: 30: Hoare triple {369654#false} [261] L170-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {369654#false} is VALID [2022-04-07 21:21:31,551 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 21:21:31,551 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 21:21:31,551 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1577185761] [2022-04-07 21:21:31,552 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1577185761] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 21:21:31,552 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 21:21:31,552 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-07 21:21:31,552 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1676812589] [2022-04-07 21:21:31,552 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 21:21:31,552 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-07 21:21:31,552 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 21:21:31,552 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:21:31,568 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 31 edges. 31 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:21:31,568 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-07 21:21:31,568 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 21:21:31,568 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-07 21:21:31,568 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-07 21:21:31,568 INFO L87 Difference]: Start difference. First operand 16137 states and 20231 transitions. Second operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:21:51,572 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:21:51,572 INFO L93 Difference]: Finished difference Result 26635 states and 33032 transitions. [2022-04-07 21:21:51,572 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-07 21:21:51,572 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-07 21:21:51,572 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 21:21:51,572 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:21:51,573 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 106 transitions. [2022-04-07 21:21:51,573 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:21:51,574 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 106 transitions. [2022-04-07 21:21:51,574 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 106 transitions. [2022-04-07 21:21:51,665 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 106 edges. 106 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:22:11,226 INFO L225 Difference]: With dead ends: 26635 [2022-04-07 21:22:11,226 INFO L226 Difference]: Without dead ends: 26635 [2022-04-07 21:22:11,227 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-07 21:22:11,227 INFO L913 BasicCegarLoop]: 68 mSDtfsCounter, 122 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 63 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 122 SdHoareTripleChecker+Valid, 75 SdHoareTripleChecker+Invalid, 65 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 63 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 21:22:11,227 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [122 Valid, 75 Invalid, 65 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 63 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 21:22:11,235 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26635 states. [2022-04-07 21:22:11,398 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26635 to 24585. [2022-04-07 21:22:11,398 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 21:22:11,423 INFO L82 GeneralOperation]: Start isEquivalent. First operand 26635 states. Second operand has 24585 states, 24581 states have (on average 1.2186648224238232) internal successors, (29956), 24581 states have internal predecessors, (29956), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:22:11,448 INFO L74 IsIncluded]: Start isIncluded. First operand 26635 states. Second operand has 24585 states, 24581 states have (on average 1.2186648224238232) internal successors, (29956), 24581 states have internal predecessors, (29956), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:22:11,473 INFO L87 Difference]: Start difference. First operand 26635 states. Second operand has 24585 states, 24581 states have (on average 1.2186648224238232) internal successors, (29956), 24581 states have internal predecessors, (29956), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:22:28,295 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:22:28,295 INFO L93 Difference]: Finished difference Result 26635 states and 33032 transitions. [2022-04-07 21:22:28,295 INFO L276 IsEmpty]: Start isEmpty. Operand 26635 states and 33032 transitions. [2022-04-07 21:22:28,315 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:22:28,316 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:22:28,333 INFO L74 IsIncluded]: Start isIncluded. First operand has 24585 states, 24581 states have (on average 1.2186648224238232) internal successors, (29956), 24581 states have internal predecessors, (29956), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 26635 states. [2022-04-07 21:22:28,351 INFO L87 Difference]: Start difference. First operand has 24585 states, 24581 states have (on average 1.2186648224238232) internal successors, (29956), 24581 states have internal predecessors, (29956), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 26635 states. [2022-04-07 21:22:46,107 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:22:46,108 INFO L93 Difference]: Finished difference Result 26635 states and 33032 transitions. [2022-04-07 21:22:46,108 INFO L276 IsEmpty]: Start isEmpty. Operand 26635 states and 33032 transitions. [2022-04-07 21:22:46,157 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:22:46,158 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:22:46,158 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 21:22:46,158 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 21:22:46,174 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24585 states, 24581 states have (on average 1.2186648224238232) internal successors, (29956), 24581 states have internal predecessors, (29956), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:23:06,212 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24585 states to 24585 states and 29959 transitions. [2022-04-07 21:23:06,212 INFO L78 Accepts]: Start accepts. Automaton has 24585 states and 29959 transitions. Word has length 31 [2022-04-07 21:23:06,212 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 21:23:06,212 INFO L478 AbstractCegarLoop]: Abstraction has 24585 states and 29959 transitions. [2022-04-07 21:23:06,212 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:23:06,212 INFO L276 IsEmpty]: Start isEmpty. Operand 24585 states and 29959 transitions. [2022-04-07 21:23:06,260 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-04-07 21:23:06,260 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 21:23:06,260 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 21:23:06,260 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable26 [2022-04-07 21:23:06,260 INFO L403 AbstractCegarLoop]: === Iteration 28 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 21:23:06,260 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 21:23:06,260 INFO L85 PathProgramCache]: Analyzing trace with hash -994468337, now seen corresponding path program 1 times [2022-04-07 21:23:06,261 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 21:23:06,261 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [916224948] [2022-04-07 21:23:06,261 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 21:23:06,261 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 21:23:06,283 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:23:06,297 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 21:23:06,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:23:06,300 INFO L290 TraceCheckUtils]: 0: Hoare triple {474161#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [222] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {474155#true} is VALID [2022-04-07 21:23:06,300 INFO L290 TraceCheckUtils]: 1: Hoare triple {474155#true} [225] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {474155#true} is VALID [2022-04-07 21:23:06,300 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {474155#true} {474155#true} [301] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {474155#true} is VALID [2022-04-07 21:23:06,300 INFO L272 TraceCheckUtils]: 0: Hoare triple {474155#true} [220] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {474161#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 21:23:06,300 INFO L290 TraceCheckUtils]: 1: Hoare triple {474161#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [222] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {474155#true} is VALID [2022-04-07 21:23:06,300 INFO L290 TraceCheckUtils]: 2: Hoare triple {474155#true} [225] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {474155#true} is VALID [2022-04-07 21:23:06,301 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {474155#true} {474155#true} [301] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {474155#true} is VALID [2022-04-07 21:23:06,301 INFO L272 TraceCheckUtils]: 4: Hoare triple {474155#true} [221] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {474155#true} is VALID [2022-04-07 21:23:06,301 INFO L290 TraceCheckUtils]: 5: Hoare triple {474155#true} [224] mainENTRY-->L169-1: Formula: (and (= v_main_~p5~0_2 |v_main_#t~nondet8_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (= v_main_~p4~0_2 |v_main_#t~nondet7_2|)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~lk3~0=v_main_~lk3~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p2~0=v_main_~p2~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_2, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p5~0=v_main_~p5~0_2, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~lk4~0=v_main_~lk4~0_3, main_~p3~0=v_main_~p3~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet14, main_#t~nondet13, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {474155#true} is VALID [2022-04-07 21:23:06,301 INFO L290 TraceCheckUtils]: 6: Hoare triple {474155#true} [228] L169-1-->L46: Formula: (and (= |v_main_#t~nondet15_2| v_main_~cond~0_2) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet15=|v_main_#t~nondet15_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet15, main_~cond~0] {474155#true} is VALID [2022-04-07 21:23:06,301 INFO L290 TraceCheckUtils]: 7: Hoare triple {474155#true} [231] L46-->L73: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_3 0) (= v_main_~lk5~0_5 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0) (= v_main_~lk4~0_4 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk1~0=v_main_~lk1~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_5, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk4~0=v_main_~lk4~0_4, main_~lk6~0=v_main_~lk6~0_3, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk2~0, main_~lk3~0, main_~lk11~0, main_~lk1~0, main_~lk10~0, main_~lk5~0, main_~lk4~0, main_~lk6~0, main_~lk9~0, main_~lk8~0, main_~lk7~0] {474155#true} is VALID [2022-04-07 21:23:06,301 INFO L290 TraceCheckUtils]: 8: Hoare triple {474155#true} [234] L73-->L73-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {474155#true} is VALID [2022-04-07 21:23:06,301 INFO L290 TraceCheckUtils]: 9: Hoare triple {474155#true} [236] L73-2-->L77-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {474155#true} is VALID [2022-04-07 21:23:06,301 INFO L290 TraceCheckUtils]: 10: Hoare triple {474155#true} [238] L77-1-->L81-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {474155#true} is VALID [2022-04-07 21:23:06,301 INFO L290 TraceCheckUtils]: 11: Hoare triple {474155#true} [240] L81-1-->L85-1: Formula: (= v_main_~p4~0_4 0) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4} AuxVars[] AssignedVars[] {474155#true} is VALID [2022-04-07 21:23:06,301 INFO L290 TraceCheckUtils]: 12: Hoare triple {474155#true} [242] L85-1-->L89-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {474155#true} is VALID [2022-04-07 21:23:06,301 INFO L290 TraceCheckUtils]: 13: Hoare triple {474155#true} [244] L89-1-->L93-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {474155#true} is VALID [2022-04-07 21:23:06,301 INFO L290 TraceCheckUtils]: 14: Hoare triple {474155#true} [246] L93-1-->L97-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {474155#true} is VALID [2022-04-07 21:23:06,301 INFO L290 TraceCheckUtils]: 15: Hoare triple {474155#true} [248] L97-1-->L101-1: Formula: (= v_main_~p8~0_5 0) InVars {main_~p8~0=v_main_~p8~0_5} OutVars{main_~p8~0=v_main_~p8~0_5} AuxVars[] AssignedVars[] {474155#true} is VALID [2022-04-07 21:23:06,301 INFO L290 TraceCheckUtils]: 16: Hoare triple {474155#true} [250] L101-1-->L105-1: Formula: (= v_main_~p9~0_5 0) InVars {main_~p9~0=v_main_~p9~0_5} OutVars{main_~p9~0=v_main_~p9~0_5} AuxVars[] AssignedVars[] {474155#true} is VALID [2022-04-07 21:23:06,302 INFO L290 TraceCheckUtils]: 17: Hoare triple {474155#true} [252] L105-1-->L109-1: Formula: (= v_main_~p10~0_5 0) InVars {main_~p10~0=v_main_~p10~0_5} OutVars{main_~p10~0=v_main_~p10~0_5} AuxVars[] AssignedVars[] {474160#(= main_~p10~0 0)} is VALID [2022-04-07 21:23:06,302 INFO L290 TraceCheckUtils]: 18: Hoare triple {474160#(= main_~p10~0 0)} [253] L109-1-->L113-1: Formula: (and (= v_main_~lk11~0_6 1) (not (= v_main_~p11~0_4 0))) InVars {main_~p11~0=v_main_~p11~0_4} OutVars{main_~lk11~0=v_main_~lk11~0_6, main_~p11~0=v_main_~p11~0_4} AuxVars[] AssignedVars[main_~lk11~0] {474160#(= main_~p10~0 0)} is VALID [2022-04-07 21:23:06,302 INFO L290 TraceCheckUtils]: 19: Hoare triple {474160#(= main_~p10~0 0)} [256] L113-1-->L119-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {474160#(= main_~p10~0 0)} is VALID [2022-04-07 21:23:06,303 INFO L290 TraceCheckUtils]: 20: Hoare triple {474160#(= main_~p10~0 0)} [260] L119-1-->L124-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {474160#(= main_~p10~0 0)} is VALID [2022-04-07 21:23:06,303 INFO L290 TraceCheckUtils]: 21: Hoare triple {474160#(= main_~p10~0 0)} [266] L124-1-->L129-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {474160#(= main_~p10~0 0)} is VALID [2022-04-07 21:23:06,303 INFO L290 TraceCheckUtils]: 22: Hoare triple {474160#(= main_~p10~0 0)} [270] L129-1-->L134-1: Formula: (= v_main_~p4~0_1 0) InVars {main_~p4~0=v_main_~p4~0_1} OutVars{main_~p4~0=v_main_~p4~0_1} AuxVars[] AssignedVars[] {474160#(= main_~p10~0 0)} is VALID [2022-04-07 21:23:06,303 INFO L290 TraceCheckUtils]: 23: Hoare triple {474160#(= main_~p10~0 0)} [274] L134-1-->L139-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {474160#(= main_~p10~0 0)} is VALID [2022-04-07 21:23:06,304 INFO L290 TraceCheckUtils]: 24: Hoare triple {474160#(= main_~p10~0 0)} [278] L139-1-->L144-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {474160#(= main_~p10~0 0)} is VALID [2022-04-07 21:23:06,304 INFO L290 TraceCheckUtils]: 25: Hoare triple {474160#(= main_~p10~0 0)} [282] L144-1-->L149-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {474160#(= main_~p10~0 0)} is VALID [2022-04-07 21:23:06,304 INFO L290 TraceCheckUtils]: 26: Hoare triple {474160#(= main_~p10~0 0)} [286] L149-1-->L154-1: Formula: (= v_main_~p8~0_3 0) InVars {main_~p8~0=v_main_~p8~0_3} OutVars{main_~p8~0=v_main_~p8~0_3} AuxVars[] AssignedVars[] {474160#(= main_~p10~0 0)} is VALID [2022-04-07 21:23:06,304 INFO L290 TraceCheckUtils]: 27: Hoare triple {474160#(= main_~p10~0 0)} [290] L154-1-->L159-1: Formula: (= v_main_~p9~0_3 0) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[] {474160#(= main_~p10~0 0)} is VALID [2022-04-07 21:23:06,305 INFO L290 TraceCheckUtils]: 28: Hoare triple {474160#(= main_~p10~0 0)} [293] L159-1-->L165: Formula: (not (= v_main_~p10~0_2 0)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[] {474156#false} is VALID [2022-04-07 21:23:06,305 INFO L290 TraceCheckUtils]: 29: Hoare triple {474156#false} [295] L165-->L170-1: Formula: (not (= v_main_~lk10~0_3 1)) InVars {main_~lk10~0=v_main_~lk10~0_3} OutVars{main_~lk10~0=v_main_~lk10~0_3} AuxVars[] AssignedVars[] {474156#false} is VALID [2022-04-07 21:23:06,305 INFO L290 TraceCheckUtils]: 30: Hoare triple {474156#false} [261] L170-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {474156#false} is VALID [2022-04-07 21:23:06,305 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 21:23:06,305 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 21:23:06,305 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [916224948] [2022-04-07 21:23:06,305 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [916224948] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 21:23:06,305 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 21:23:06,305 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-07 21:23:06,305 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2046715234] [2022-04-07 21:23:06,305 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 21:23:06,306 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-07 21:23:06,306 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 21:23:06,306 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:23:06,322 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 31 edges. 31 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:23:06,322 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-07 21:23:06,322 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 21:23:06,322 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-07 21:23:06,322 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-07 21:23:06,323 INFO L87 Difference]: Start difference. First operand 24585 states and 29959 transitions. Second operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:23:30,700 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:23:30,700 INFO L93 Difference]: Finished difference Result 31243 states and 36872 transitions. [2022-04-07 21:23:30,700 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-07 21:23:30,700 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-07 21:23:30,700 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 21:23:30,700 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:23:30,701 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 123 transitions. [2022-04-07 21:23:30,701 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:23:30,702 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 123 transitions. [2022-04-07 21:23:30,702 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 123 transitions. [2022-04-07 21:23:30,781 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 123 edges. 123 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:23:55,566 INFO L225 Difference]: With dead ends: 31243 [2022-04-07 21:23:55,566 INFO L226 Difference]: Without dead ends: 31243 [2022-04-07 21:23:55,566 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-07 21:23:55,567 INFO L913 BasicCegarLoop]: 114 mSDtfsCounter, 109 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 61 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 109 SdHoareTripleChecker+Valid, 121 SdHoareTripleChecker+Invalid, 64 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 61 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 21:23:55,567 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [109 Valid, 121 Invalid, 64 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 61 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 21:23:55,580 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31243 states. [2022-04-07 21:23:55,778 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31243 to 31241. [2022-04-07 21:23:55,778 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 21:23:55,810 INFO L82 GeneralOperation]: Start isEquivalent. First operand 31243 states. Second operand has 31241 states, 31237 states have (on average 1.1802669910682844) internal successors, (36868), 31237 states have internal predecessors, (36868), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:23:55,841 INFO L74 IsIncluded]: Start isIncluded. First operand 31243 states. Second operand has 31241 states, 31237 states have (on average 1.1802669910682844) internal successors, (36868), 31237 states have internal predecessors, (36868), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:23:55,872 INFO L87 Difference]: Start difference. First operand 31243 states. Second operand has 31241 states, 31237 states have (on average 1.1802669910682844) internal successors, (36868), 31237 states have internal predecessors, (36868), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:24:19,831 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:24:19,832 INFO L93 Difference]: Finished difference Result 31243 states and 36872 transitions. [2022-04-07 21:24:19,832 INFO L276 IsEmpty]: Start isEmpty. Operand 31243 states and 36872 transitions. [2022-04-07 21:24:19,850 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:24:19,850 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:24:19,874 INFO L74 IsIncluded]: Start isIncluded. First operand has 31241 states, 31237 states have (on average 1.1802669910682844) internal successors, (36868), 31237 states have internal predecessors, (36868), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 31243 states. [2022-04-07 21:24:19,897 INFO L87 Difference]: Start difference. First operand has 31241 states, 31237 states have (on average 1.1802669910682844) internal successors, (36868), 31237 states have internal predecessors, (36868), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 31243 states. [2022-04-07 21:24:46,475 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:24:46,475 INFO L93 Difference]: Finished difference Result 31243 states and 36872 transitions. [2022-04-07 21:24:46,475 INFO L276 IsEmpty]: Start isEmpty. Operand 31243 states and 36872 transitions. [2022-04-07 21:24:46,527 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:24:46,527 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:24:46,527 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 21:24:46,527 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 21:24:46,551 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 31241 states, 31237 states have (on average 1.1802669910682844) internal successors, (36868), 31237 states have internal predecessors, (36868), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:26:10,177 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31241 states to 31241 states and 36871 transitions. [2022-04-07 21:26:10,177 INFO L78 Accepts]: Start accepts. Automaton has 31241 states and 36871 transitions. Word has length 31 [2022-04-07 21:26:10,177 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 21:26:10,177 INFO L478 AbstractCegarLoop]: Abstraction has 31241 states and 36871 transitions. [2022-04-07 21:26:10,177 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:26:10,177 INFO L276 IsEmpty]: Start isEmpty. Operand 31241 states and 36871 transitions. [2022-04-07 21:26:10,192 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2022-04-07 21:26:10,193 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 21:26:10,193 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 21:26:10,193 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable27 [2022-04-07 21:26:10,193 INFO L403 AbstractCegarLoop]: === Iteration 29 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 21:26:10,193 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 21:26:10,193 INFO L85 PathProgramCache]: Analyzing trace with hash 2023701264, now seen corresponding path program 1 times [2022-04-07 21:26:10,193 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 21:26:10,193 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1976972357] [2022-04-07 21:26:10,193 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 21:26:10,194 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 21:26:10,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:26:10,226 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 21:26:10,227 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:26:10,230 INFO L290 TraceCheckUtils]: 0: Hoare triple {599143#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [222] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {599137#true} is VALID [2022-04-07 21:26:10,230 INFO L290 TraceCheckUtils]: 1: Hoare triple {599137#true} [225] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {599137#true} is VALID [2022-04-07 21:26:10,230 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {599137#true} {599137#true} [301] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {599137#true} is VALID [2022-04-07 21:26:10,231 INFO L272 TraceCheckUtils]: 0: Hoare triple {599137#true} [220] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {599143#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 21:26:10,231 INFO L290 TraceCheckUtils]: 1: Hoare triple {599143#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [222] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {599137#true} is VALID [2022-04-07 21:26:10,231 INFO L290 TraceCheckUtils]: 2: Hoare triple {599137#true} [225] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {599137#true} is VALID [2022-04-07 21:26:10,231 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {599137#true} {599137#true} [301] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {599137#true} is VALID [2022-04-07 21:26:10,231 INFO L272 TraceCheckUtils]: 4: Hoare triple {599137#true} [221] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {599137#true} is VALID [2022-04-07 21:26:10,232 INFO L290 TraceCheckUtils]: 5: Hoare triple {599137#true} [224] mainENTRY-->L169-1: Formula: (and (= v_main_~p5~0_2 |v_main_#t~nondet8_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (= v_main_~p4~0_2 |v_main_#t~nondet7_2|)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~lk3~0=v_main_~lk3~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p2~0=v_main_~p2~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_2, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p5~0=v_main_~p5~0_2, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~lk4~0=v_main_~lk4~0_3, main_~p3~0=v_main_~p3~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet14, main_#t~nondet13, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {599137#true} is VALID [2022-04-07 21:26:10,232 INFO L290 TraceCheckUtils]: 6: Hoare triple {599137#true} [228] L169-1-->L46: Formula: (and (= |v_main_#t~nondet15_2| v_main_~cond~0_2) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet15=|v_main_#t~nondet15_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet15, main_~cond~0] {599137#true} is VALID [2022-04-07 21:26:10,232 INFO L290 TraceCheckUtils]: 7: Hoare triple {599137#true} [231] L46-->L73: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_3 0) (= v_main_~lk5~0_5 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0) (= v_main_~lk4~0_4 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk1~0=v_main_~lk1~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_5, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk4~0=v_main_~lk4~0_4, main_~lk6~0=v_main_~lk6~0_3, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk2~0, main_~lk3~0, main_~lk11~0, main_~lk1~0, main_~lk10~0, main_~lk5~0, main_~lk4~0, main_~lk6~0, main_~lk9~0, main_~lk8~0, main_~lk7~0] {599137#true} is VALID [2022-04-07 21:26:10,232 INFO L290 TraceCheckUtils]: 8: Hoare triple {599137#true} [234] L73-->L73-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {599137#true} is VALID [2022-04-07 21:26:10,232 INFO L290 TraceCheckUtils]: 9: Hoare triple {599137#true} [236] L73-2-->L77-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {599137#true} is VALID [2022-04-07 21:26:10,232 INFO L290 TraceCheckUtils]: 10: Hoare triple {599137#true} [238] L77-1-->L81-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {599137#true} is VALID [2022-04-07 21:26:10,232 INFO L290 TraceCheckUtils]: 11: Hoare triple {599137#true} [240] L81-1-->L85-1: Formula: (= v_main_~p4~0_4 0) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4} AuxVars[] AssignedVars[] {599137#true} is VALID [2022-04-07 21:26:10,232 INFO L290 TraceCheckUtils]: 12: Hoare triple {599137#true} [242] L85-1-->L89-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {599137#true} is VALID [2022-04-07 21:26:10,232 INFO L290 TraceCheckUtils]: 13: Hoare triple {599137#true} [244] L89-1-->L93-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {599137#true} is VALID [2022-04-07 21:26:10,232 INFO L290 TraceCheckUtils]: 14: Hoare triple {599137#true} [246] L93-1-->L97-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {599137#true} is VALID [2022-04-07 21:26:10,232 INFO L290 TraceCheckUtils]: 15: Hoare triple {599137#true} [248] L97-1-->L101-1: Formula: (= v_main_~p8~0_5 0) InVars {main_~p8~0=v_main_~p8~0_5} OutVars{main_~p8~0=v_main_~p8~0_5} AuxVars[] AssignedVars[] {599137#true} is VALID [2022-04-07 21:26:10,232 INFO L290 TraceCheckUtils]: 16: Hoare triple {599137#true} [250] L101-1-->L105-1: Formula: (= v_main_~p9~0_5 0) InVars {main_~p9~0=v_main_~p9~0_5} OutVars{main_~p9~0=v_main_~p9~0_5} AuxVars[] AssignedVars[] {599137#true} is VALID [2022-04-07 21:26:10,233 INFO L290 TraceCheckUtils]: 17: Hoare triple {599137#true} [251] L105-1-->L109-1: Formula: (and (= v_main_~lk10~0_6 1) (not (= v_main_~p10~0_4 0))) InVars {main_~p10~0=v_main_~p10~0_4} OutVars{main_~lk10~0=v_main_~lk10~0_6, main_~p10~0=v_main_~p10~0_4} AuxVars[] AssignedVars[main_~lk10~0] {599142#(not (= main_~p10~0 0))} is VALID [2022-04-07 21:26:10,233 INFO L290 TraceCheckUtils]: 18: Hoare triple {599142#(not (= main_~p10~0 0))} [253] L109-1-->L113-1: Formula: (and (= v_main_~lk11~0_6 1) (not (= v_main_~p11~0_4 0))) InVars {main_~p11~0=v_main_~p11~0_4} OutVars{main_~lk11~0=v_main_~lk11~0_6, main_~p11~0=v_main_~p11~0_4} AuxVars[] AssignedVars[main_~lk11~0] {599142#(not (= main_~p10~0 0))} is VALID [2022-04-07 21:26:10,233 INFO L290 TraceCheckUtils]: 19: Hoare triple {599142#(not (= main_~p10~0 0))} [256] L113-1-->L119-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {599142#(not (= main_~p10~0 0))} is VALID [2022-04-07 21:26:10,233 INFO L290 TraceCheckUtils]: 20: Hoare triple {599142#(not (= main_~p10~0 0))} [260] L119-1-->L124-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {599142#(not (= main_~p10~0 0))} is VALID [2022-04-07 21:26:10,234 INFO L290 TraceCheckUtils]: 21: Hoare triple {599142#(not (= main_~p10~0 0))} [266] L124-1-->L129-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {599142#(not (= main_~p10~0 0))} is VALID [2022-04-07 21:26:10,234 INFO L290 TraceCheckUtils]: 22: Hoare triple {599142#(not (= main_~p10~0 0))} [270] L129-1-->L134-1: Formula: (= v_main_~p4~0_1 0) InVars {main_~p4~0=v_main_~p4~0_1} OutVars{main_~p4~0=v_main_~p4~0_1} AuxVars[] AssignedVars[] {599142#(not (= main_~p10~0 0))} is VALID [2022-04-07 21:26:10,234 INFO L290 TraceCheckUtils]: 23: Hoare triple {599142#(not (= main_~p10~0 0))} [274] L134-1-->L139-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {599142#(not (= main_~p10~0 0))} is VALID [2022-04-07 21:26:10,234 INFO L290 TraceCheckUtils]: 24: Hoare triple {599142#(not (= main_~p10~0 0))} [278] L139-1-->L144-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {599142#(not (= main_~p10~0 0))} is VALID [2022-04-07 21:26:10,235 INFO L290 TraceCheckUtils]: 25: Hoare triple {599142#(not (= main_~p10~0 0))} [282] L144-1-->L149-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {599142#(not (= main_~p10~0 0))} is VALID [2022-04-07 21:26:10,235 INFO L290 TraceCheckUtils]: 26: Hoare triple {599142#(not (= main_~p10~0 0))} [286] L149-1-->L154-1: Formula: (= v_main_~p8~0_3 0) InVars {main_~p8~0=v_main_~p8~0_3} OutVars{main_~p8~0=v_main_~p8~0_3} AuxVars[] AssignedVars[] {599142#(not (= main_~p10~0 0))} is VALID [2022-04-07 21:26:10,235 INFO L290 TraceCheckUtils]: 27: Hoare triple {599142#(not (= main_~p10~0 0))} [290] L154-1-->L159-1: Formula: (= v_main_~p9~0_3 0) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[] {599142#(not (= main_~p10~0 0))} is VALID [2022-04-07 21:26:10,235 INFO L290 TraceCheckUtils]: 28: Hoare triple {599142#(not (= main_~p10~0 0))} [294] L159-1-->L164-1: Formula: (= v_main_~p10~0_3 0) InVars {main_~p10~0=v_main_~p10~0_3} OutVars{main_~p10~0=v_main_~p10~0_3} AuxVars[] AssignedVars[] {599138#false} is VALID [2022-04-07 21:26:10,236 INFO L290 TraceCheckUtils]: 29: Hoare triple {599138#false} [297] L164-1-->L170: Formula: (not (= v_main_~p11~0_2 0)) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[] {599138#false} is VALID [2022-04-07 21:26:10,236 INFO L290 TraceCheckUtils]: 30: Hoare triple {599138#false} [299] L170-->L170-1: Formula: (not (= v_main_~lk11~0_3 1)) InVars {main_~lk11~0=v_main_~lk11~0_3} OutVars{main_~lk11~0=v_main_~lk11~0_3} AuxVars[] AssignedVars[] {599138#false} is VALID [2022-04-07 21:26:10,236 INFO L290 TraceCheckUtils]: 31: Hoare triple {599138#false} [261] L170-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {599138#false} is VALID [2022-04-07 21:26:10,236 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 21:26:10,236 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 21:26:10,236 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1976972357] [2022-04-07 21:26:10,236 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1976972357] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 21:26:10,236 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 21:26:10,236 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-07 21:26:10,236 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [824385975] [2022-04-07 21:26:10,236 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 21:26:10,237 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-07 21:26:10,238 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 21:26:10,238 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:26:10,253 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 32 edges. 32 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:26:10,254 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-07 21:26:10,254 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 21:26:10,255 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-07 21:26:10,255 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-07 21:26:10,256 INFO L87 Difference]: Start difference. First operand 31241 states and 36871 transitions. Second operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:26:33,086 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:26:33,087 INFO L93 Difference]: Finished difference Result 31755 states and 36872 transitions. [2022-04-07 21:26:33,087 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-07 21:26:33,087 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-07 21:26:33,087 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 21:26:33,087 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:26:33,088 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 122 transitions. [2022-04-07 21:26:33,088 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:26:33,088 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 122 transitions. [2022-04-07 21:26:33,088 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 122 transitions. [2022-04-07 21:26:33,169 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 122 edges. 122 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:26:58,192 INFO L225 Difference]: With dead ends: 31755 [2022-04-07 21:26:58,193 INFO L226 Difference]: Without dead ends: 31755 [2022-04-07 21:26:58,193 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-07 21:26:58,193 INFO L913 BasicCegarLoop]: 89 mSDtfsCounter, 135 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 60 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 135 SdHoareTripleChecker+Valid, 96 SdHoareTripleChecker+Invalid, 62 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 60 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 21:26:58,194 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [135 Valid, 96 Invalid, 62 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 60 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 21:26:58,200 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31755 states. [2022-04-07 21:26:58,382 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31755 to 31753. [2022-04-07 21:26:58,383 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 21:26:58,415 INFO L82 GeneralOperation]: Start isEquivalent. First operand 31755 states. Second operand has 31753 states, 31749 states have (on average 1.1612334246747928) internal successors, (36868), 31749 states have internal predecessors, (36868), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:26:58,447 INFO L74 IsIncluded]: Start isIncluded. First operand 31755 states. Second operand has 31753 states, 31749 states have (on average 1.1612334246747928) internal successors, (36868), 31749 states have internal predecessors, (36868), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:26:58,479 INFO L87 Difference]: Start difference. First operand 31755 states. Second operand has 31753 states, 31749 states have (on average 1.1612334246747928) internal successors, (36868), 31749 states have internal predecessors, (36868), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:27:24,120 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:27:24,120 INFO L93 Difference]: Finished difference Result 31755 states and 36872 transitions. [2022-04-07 21:27:24,120 INFO L276 IsEmpty]: Start isEmpty. Operand 31755 states and 36872 transitions. [2022-04-07 21:27:24,200 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:27:24,200 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:27:24,222 INFO L74 IsIncluded]: Start isIncluded. First operand has 31753 states, 31749 states have (on average 1.1612334246747928) internal successors, (36868), 31749 states have internal predecessors, (36868), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 31755 states. [2022-04-07 21:27:24,243 INFO L87 Difference]: Start difference. First operand has 31753 states, 31749 states have (on average 1.1612334246747928) internal successors, (36868), 31749 states have internal predecessors, (36868), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 31755 states. [2022-04-07 21:28:28,136 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:28:28,136 INFO L93 Difference]: Finished difference Result 31755 states and 36872 transitions. [2022-04-07 21:28:28,136 INFO L276 IsEmpty]: Start isEmpty. Operand 31755 states and 36872 transitions. [2022-04-07 21:28:28,163 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:28:28,163 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:28:28,163 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 21:28:28,163 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 21:28:28,202 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 31753 states, 31749 states have (on average 1.1612334246747928) internal successors, (36868), 31749 states have internal predecessors, (36868), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:28:53,807 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31753 states to 31753 states and 36871 transitions. [2022-04-07 21:28:53,808 INFO L78 Accepts]: Start accepts. Automaton has 31753 states and 36871 transitions. Word has length 32 [2022-04-07 21:28:53,808 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 21:28:53,808 INFO L478 AbstractCegarLoop]: Abstraction has 31753 states and 36871 transitions. [2022-04-07 21:28:53,808 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:28:53,808 INFO L276 IsEmpty]: Start isEmpty. Operand 31753 states and 36871 transitions. [2022-04-07 21:28:53,842 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2022-04-07 21:28:53,842 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 21:28:53,842 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 21:28:53,843 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable28 [2022-04-07 21:28:53,843 INFO L403 AbstractCegarLoop]: === Iteration 30 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 21:28:53,843 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 21:28:53,843 INFO L85 PathProgramCache]: Analyzing trace with hash -763714223, now seen corresponding path program 1 times [2022-04-07 21:28:53,843 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 21:28:53,843 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1425579373] [2022-04-07 21:28:53,843 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 21:28:53,843 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 21:28:53,890 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:28:53,938 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 21:28:53,939 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:28:53,941 INFO L290 TraceCheckUtils]: 0: Hoare triple {726173#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [222] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {726167#true} is VALID [2022-04-07 21:28:53,941 INFO L290 TraceCheckUtils]: 1: Hoare triple {726167#true} [225] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {726167#true} is VALID [2022-04-07 21:28:53,941 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {726167#true} {726167#true} [301] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {726167#true} is VALID [2022-04-07 21:28:53,941 INFO L272 TraceCheckUtils]: 0: Hoare triple {726167#true} [220] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {726173#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 21:28:53,941 INFO L290 TraceCheckUtils]: 1: Hoare triple {726173#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [222] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 16) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {726167#true} is VALID [2022-04-07 21:28:53,942 INFO L290 TraceCheckUtils]: 2: Hoare triple {726167#true} [225] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {726167#true} is VALID [2022-04-07 21:28:53,942 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {726167#true} {726167#true} [301] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {726167#true} is VALID [2022-04-07 21:28:53,942 INFO L272 TraceCheckUtils]: 4: Hoare triple {726167#true} [221] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {726167#true} is VALID [2022-04-07 21:28:53,942 INFO L290 TraceCheckUtils]: 5: Hoare triple {726167#true} [224] mainENTRY-->L169-1: Formula: (and (= v_main_~p5~0_2 |v_main_#t~nondet8_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (= v_main_~p4~0_2 |v_main_#t~nondet7_2|)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~lk3~0=v_main_~lk3~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p2~0=v_main_~p2~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_2, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p5~0=v_main_~p5~0_2, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~lk4~0=v_main_~lk4~0_3, main_~p3~0=v_main_~p3~0_1, main_~p10~0=v_main_~p10~0_1, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet14, main_#t~nondet13, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {726167#true} is VALID [2022-04-07 21:28:53,942 INFO L290 TraceCheckUtils]: 6: Hoare triple {726167#true} [228] L169-1-->L46: Formula: (and (= |v_main_#t~nondet15_2| v_main_~cond~0_2) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet15=|v_main_#t~nondet15_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet15, main_~cond~0] {726167#true} is VALID [2022-04-07 21:28:53,942 INFO L290 TraceCheckUtils]: 7: Hoare triple {726167#true} [231] L46-->L73: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_3 0) (= v_main_~lk5~0_5 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0) (= v_main_~lk4~0_4 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk1~0=v_main_~lk1~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_5, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk4~0=v_main_~lk4~0_4, main_~lk6~0=v_main_~lk6~0_3, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk2~0, main_~lk3~0, main_~lk11~0, main_~lk1~0, main_~lk10~0, main_~lk5~0, main_~lk4~0, main_~lk6~0, main_~lk9~0, main_~lk8~0, main_~lk7~0] {726167#true} is VALID [2022-04-07 21:28:53,942 INFO L290 TraceCheckUtils]: 8: Hoare triple {726167#true} [234] L73-->L73-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {726167#true} is VALID [2022-04-07 21:28:53,942 INFO L290 TraceCheckUtils]: 9: Hoare triple {726167#true} [236] L73-2-->L77-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {726167#true} is VALID [2022-04-07 21:28:53,942 INFO L290 TraceCheckUtils]: 10: Hoare triple {726167#true} [238] L77-1-->L81-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {726167#true} is VALID [2022-04-07 21:28:53,942 INFO L290 TraceCheckUtils]: 11: Hoare triple {726167#true} [240] L81-1-->L85-1: Formula: (= v_main_~p4~0_4 0) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4} AuxVars[] AssignedVars[] {726167#true} is VALID [2022-04-07 21:28:53,942 INFO L290 TraceCheckUtils]: 12: Hoare triple {726167#true} [242] L85-1-->L89-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {726167#true} is VALID [2022-04-07 21:28:53,942 INFO L290 TraceCheckUtils]: 13: Hoare triple {726167#true} [244] L89-1-->L93-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {726167#true} is VALID [2022-04-07 21:28:53,942 INFO L290 TraceCheckUtils]: 14: Hoare triple {726167#true} [246] L93-1-->L97-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {726167#true} is VALID [2022-04-07 21:28:53,942 INFO L290 TraceCheckUtils]: 15: Hoare triple {726167#true} [248] L97-1-->L101-1: Formula: (= v_main_~p8~0_5 0) InVars {main_~p8~0=v_main_~p8~0_5} OutVars{main_~p8~0=v_main_~p8~0_5} AuxVars[] AssignedVars[] {726167#true} is VALID [2022-04-07 21:28:53,942 INFO L290 TraceCheckUtils]: 16: Hoare triple {726167#true} [250] L101-1-->L105-1: Formula: (= v_main_~p9~0_5 0) InVars {main_~p9~0=v_main_~p9~0_5} OutVars{main_~p9~0=v_main_~p9~0_5} AuxVars[] AssignedVars[] {726167#true} is VALID [2022-04-07 21:28:53,942 INFO L290 TraceCheckUtils]: 17: Hoare triple {726167#true} [252] L105-1-->L109-1: Formula: (= v_main_~p10~0_5 0) InVars {main_~p10~0=v_main_~p10~0_5} OutVars{main_~p10~0=v_main_~p10~0_5} AuxVars[] AssignedVars[] {726167#true} is VALID [2022-04-07 21:28:53,943 INFO L290 TraceCheckUtils]: 18: Hoare triple {726167#true} [253] L109-1-->L113-1: Formula: (and (= v_main_~lk11~0_6 1) (not (= v_main_~p11~0_4 0))) InVars {main_~p11~0=v_main_~p11~0_4} OutVars{main_~lk11~0=v_main_~lk11~0_6, main_~p11~0=v_main_~p11~0_4} AuxVars[] AssignedVars[main_~lk11~0] {726172#(= main_~lk11~0 1)} is VALID [2022-04-07 21:28:53,943 INFO L290 TraceCheckUtils]: 19: Hoare triple {726172#(= main_~lk11~0 1)} [256] L113-1-->L119-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {726172#(= main_~lk11~0 1)} is VALID [2022-04-07 21:28:53,943 INFO L290 TraceCheckUtils]: 20: Hoare triple {726172#(= main_~lk11~0 1)} [260] L119-1-->L124-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {726172#(= main_~lk11~0 1)} is VALID [2022-04-07 21:28:53,943 INFO L290 TraceCheckUtils]: 21: Hoare triple {726172#(= main_~lk11~0 1)} [266] L124-1-->L129-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {726172#(= main_~lk11~0 1)} is VALID [2022-04-07 21:28:53,944 INFO L290 TraceCheckUtils]: 22: Hoare triple {726172#(= main_~lk11~0 1)} [270] L129-1-->L134-1: Formula: (= v_main_~p4~0_1 0) InVars {main_~p4~0=v_main_~p4~0_1} OutVars{main_~p4~0=v_main_~p4~0_1} AuxVars[] AssignedVars[] {726172#(= main_~lk11~0 1)} is VALID [2022-04-07 21:28:53,944 INFO L290 TraceCheckUtils]: 23: Hoare triple {726172#(= main_~lk11~0 1)} [274] L134-1-->L139-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {726172#(= main_~lk11~0 1)} is VALID [2022-04-07 21:28:53,944 INFO L290 TraceCheckUtils]: 24: Hoare triple {726172#(= main_~lk11~0 1)} [278] L139-1-->L144-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {726172#(= main_~lk11~0 1)} is VALID [2022-04-07 21:28:53,944 INFO L290 TraceCheckUtils]: 25: Hoare triple {726172#(= main_~lk11~0 1)} [282] L144-1-->L149-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {726172#(= main_~lk11~0 1)} is VALID [2022-04-07 21:28:53,945 INFO L290 TraceCheckUtils]: 26: Hoare triple {726172#(= main_~lk11~0 1)} [286] L149-1-->L154-1: Formula: (= v_main_~p8~0_3 0) InVars {main_~p8~0=v_main_~p8~0_3} OutVars{main_~p8~0=v_main_~p8~0_3} AuxVars[] AssignedVars[] {726172#(= main_~lk11~0 1)} is VALID [2022-04-07 21:28:53,945 INFO L290 TraceCheckUtils]: 27: Hoare triple {726172#(= main_~lk11~0 1)} [290] L154-1-->L159-1: Formula: (= v_main_~p9~0_3 0) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[] {726172#(= main_~lk11~0 1)} is VALID [2022-04-07 21:28:53,945 INFO L290 TraceCheckUtils]: 28: Hoare triple {726172#(= main_~lk11~0 1)} [294] L159-1-->L164-1: Formula: (= v_main_~p10~0_3 0) InVars {main_~p10~0=v_main_~p10~0_3} OutVars{main_~p10~0=v_main_~p10~0_3} AuxVars[] AssignedVars[] {726172#(= main_~lk11~0 1)} is VALID [2022-04-07 21:28:53,945 INFO L290 TraceCheckUtils]: 29: Hoare triple {726172#(= main_~lk11~0 1)} [297] L164-1-->L170: Formula: (not (= v_main_~p11~0_2 0)) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[] {726172#(= main_~lk11~0 1)} is VALID [2022-04-07 21:28:53,946 INFO L290 TraceCheckUtils]: 30: Hoare triple {726172#(= main_~lk11~0 1)} [299] L170-->L170-1: Formula: (not (= v_main_~lk11~0_3 1)) InVars {main_~lk11~0=v_main_~lk11~0_3} OutVars{main_~lk11~0=v_main_~lk11~0_3} AuxVars[] AssignedVars[] {726168#false} is VALID [2022-04-07 21:28:53,946 INFO L290 TraceCheckUtils]: 31: Hoare triple {726168#false} [261] L170-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {726168#false} is VALID [2022-04-07 21:28:53,946 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 21:28:53,946 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 21:28:53,946 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1425579373] [2022-04-07 21:28:53,946 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1425579373] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 21:28:53,946 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 21:28:53,946 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-07 21:28:53,946 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [412109786] [2022-04-07 21:28:53,946 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 21:28:53,947 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-07 21:28:53,947 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 21:28:53,948 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:28:53,977 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 32 edges. 32 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:28:53,977 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-07 21:28:53,977 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 21:28:53,977 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-07 21:28:53,977 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-07 21:28:53,977 INFO L87 Difference]: Start difference. First operand 31753 states and 36871 transitions. Second operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:30:14,046 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:30:14,046 INFO L93 Difference]: Finished difference Result 51209 states and 57863 transitions. [2022-04-07 21:30:14,046 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-07 21:30:14,047 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-07 21:30:14,047 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 21:30:14,047 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:30:14,047 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 101 transitions. [2022-04-07 21:30:14,047 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:30:14,048 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 101 transitions. [2022-04-07 21:30:14,048 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 101 transitions. [2022-04-07 21:30:14,173 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 101 edges. 101 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:32:42,191 INFO L225 Difference]: With dead ends: 51209 [2022-04-07 21:32:42,191 INFO L226 Difference]: Without dead ends: 51209 [2022-04-07 21:32:42,191 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-07 21:32:42,192 INFO L913 BasicCegarLoop]: 66 mSDtfsCounter, 114 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 62 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 114 SdHoareTripleChecker+Valid, 73 SdHoareTripleChecker+Invalid, 64 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 62 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 21:32:42,192 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [114 Valid, 73 Invalid, 64 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 62 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 21:32:42,207 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51209 states. [2022-04-07 21:32:42,659 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51209 to 49161. [2022-04-07 21:32:42,659 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 21:32:42,826 INFO L82 GeneralOperation]: Start isEquivalent. First operand 51209 states. Second operand has 49161 states, 49157 states have (on average 1.13538254978945) internal successors, (55812), 49157 states have internal predecessors, (55812), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:32:42,853 INFO L74 IsIncluded]: Start isIncluded. First operand 51209 states. Second operand has 49161 states, 49157 states have (on average 1.13538254978945) internal successors, (55812), 49157 states have internal predecessors, (55812), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:32:42,880 INFO L87 Difference]: Start difference. First operand 51209 states. Second operand has 49161 states, 49157 states have (on average 1.13538254978945) internal successors, (55812), 49157 states have internal predecessors, (55812), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1)