/usr/bin/java -ea -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --core.log.level.for.class de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN -tc ../../../trunk/examples/toolchains/AutomizerCTransformed.xml -s ../../../trunk/examples/settings/automizer/LoopAccelerationJordanC.epf -i ../../../trunk/examples/svcomp/locks/test_locks_14-1.c -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-34549b5 [2022-04-07 21:20:11,342 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-04-07 21:20:11,343 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-04-07 21:20:11,377 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... 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[2022-04-07 21:20:11,389 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-04-07 21:20:11,390 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-04-07 21:20:11,391 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-04-07 21:20:11,393 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-04-07 21:20:11,393 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-04-07 21:20:11,394 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-04-07 21:20:11,395 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-04-07 21:20:11,399 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-04-07 21:20:11,400 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-04-07 21:20:11,401 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-04-07 21:20:11,402 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-04-07 21:20:11,402 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-04-07 21:20:11,403 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-04-07 21:20:11,408 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2022-04-07 21:20:11,413 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-04-07 21:20:11,414 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-04-07 21:20:11,414 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-04-07 21:20:11,415 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/automizer/LoopAccelerationJordanC.epf [2022-04-07 21:20:11,423 INFO L113 SettingsManager]: Loading preferences was successful [2022-04-07 21:20:11,424 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-04-07 21:20:11,424 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-04-07 21:20:11,424 INFO L138 SettingsManager]: * sizeof long=4 [2022-04-07 21:20:11,424 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-04-07 21:20:11,425 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-04-07 21:20:11,425 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-04-07 21:20:11,425 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-04-07 21:20:11,425 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-04-07 21:20:11,425 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-04-07 21:20:11,425 INFO L138 SettingsManager]: * sizeof long double=12 [2022-04-07 21:20:11,425 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-04-07 21:20:11,426 INFO L138 SettingsManager]: * Use constant arrays=true [2022-04-07 21:20:11,426 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-04-07 21:20:11,426 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-04-07 21:20:11,426 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-04-07 21:20:11,426 INFO L138 SettingsManager]: * To the following directory=./dump/ [2022-04-07 21:20:11,426 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-04-07 21:20:11,426 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-07 21:20:11,426 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-04-07 21:20:11,426 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-04-07 21:20:11,427 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-04-07 21:20:11,427 INFO L138 SettingsManager]: * TransformationType=LOOP_ACCELERATION_JORDAN WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.core: Log level for class -> de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN; [2022-04-07 21:20:11,590 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-04-07 21:20:11,603 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-04-07 21:20:11,604 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-04-07 21:20:11,605 INFO L271 PluginConnector]: Initializing CDTParser... [2022-04-07 21:20:11,605 INFO L275 PluginConnector]: CDTParser initialized [2022-04-07 21:20:11,606 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/locks/test_locks_14-1.c [2022-04-07 21:20:11,661 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/8472b6338/1b0ca73975344ce0a80e8b392cfbfa11/FLAG3fed7dec2 [2022-04-07 21:20:12,059 INFO L306 CDTParser]: Found 1 translation units. [2022-04-07 21:20:12,059 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/locks/test_locks_14-1.c [2022-04-07 21:20:12,070 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/8472b6338/1b0ca73975344ce0a80e8b392cfbfa11/FLAG3fed7dec2 [2022-04-07 21:20:12,474 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/8472b6338/1b0ca73975344ce0a80e8b392cfbfa11 [2022-04-07 21:20:12,476 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-04-07 21:20:12,477 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2022-04-07 21:20:12,484 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-04-07 21:20:12,484 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-04-07 21:20:12,487 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-04-07 21:20:12,488 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.04 09:20:12" (1/1) ... [2022-04-07 21:20:12,488 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7fd56d3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 09:20:12, skipping insertion in model container [2022-04-07 21:20:12,488 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.04 09:20:12" (1/1) ... [2022-04-07 21:20:12,498 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-04-07 21:20:12,525 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-04-07 21:20:12,665 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/locks/test_locks_14-1.c[5283,5296] [2022-04-07 21:20:12,667 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-07 21:20:12,673 INFO L203 MainTranslator]: Completed pre-run [2022-04-07 21:20:12,695 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/locks/test_locks_14-1.c[5283,5296] [2022-04-07 21:20:12,696 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-07 21:20:12,712 INFO L208 MainTranslator]: Completed translation [2022-04-07 21:20:12,713 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 09:20:12 WrapperNode [2022-04-07 21:20:12,713 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-04-07 21:20:12,713 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-04-07 21:20:12,713 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-04-07 21:20:12,714 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-04-07 21:20:12,721 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 09:20:12" (1/1) ... [2022-04-07 21:20:12,722 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 09:20:12" (1/1) ... [2022-04-07 21:20:12,726 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 09:20:12" (1/1) ... [2022-04-07 21:20:12,727 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 09:20:12" (1/1) ... [2022-04-07 21:20:12,735 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 09:20:12" (1/1) ... [2022-04-07 21:20:12,753 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 09:20:12" (1/1) ... [2022-04-07 21:20:12,754 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 09:20:12" (1/1) ... [2022-04-07 21:20:12,756 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-04-07 21:20:12,757 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-04-07 21:20:12,757 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-04-07 21:20:12,757 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-04-07 21:20:12,759 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 09:20:12" (1/1) ... [2022-04-07 21:20:12,771 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-07 21:20:12,790 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 21:20:12,798 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-04-07 21:20:12,832 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-04-07 21:20:12,847 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2022-04-07 21:20:12,847 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-04-07 21:20:12,848 INFO L138 BoogieDeclarations]: Found implementation of procedure reach_error [2022-04-07 21:20:12,848 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2022-04-07 21:20:12,848 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2022-04-07 21:20:12,848 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_fail [2022-04-07 21:20:12,848 INFO L130 BoogieDeclarations]: Found specification of procedure reach_error [2022-04-07 21:20:12,849 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-04-07 21:20:12,849 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2022-04-07 21:20:12,849 INFO L130 BoogieDeclarations]: Found specification of procedure main [2022-04-07 21:20:12,849 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2022-04-07 21:20:12,849 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-04-07 21:20:12,849 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-04-07 21:20:12,849 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-04-07 21:20:12,850 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-04-07 21:20:12,851 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-04-07 21:20:12,920 INFO L234 CfgBuilder]: Building ICFG [2022-04-07 21:20:12,921 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-04-07 21:20:13,085 INFO L275 CfgBuilder]: Performing block encoding [2022-04-07 21:20:13,090 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-04-07 21:20:13,090 INFO L299 CfgBuilder]: Removed 1 assume(true) statements. [2022-04-07 21:20:13,091 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.04 09:20:13 BoogieIcfgContainer [2022-04-07 21:20:13,091 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-04-07 21:20:13,092 INFO L113 PluginConnector]: ------------------------IcfgTransformer---------------------------- [2022-04-07 21:20:13,092 INFO L271 PluginConnector]: Initializing IcfgTransformer... [2022-04-07 21:20:13,093 INFO L275 PluginConnector]: IcfgTransformer initialized [2022-04-07 21:20:13,095 INFO L185 PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.04 09:20:13" (1/1) ... [2022-04-07 21:20:13,096 INFO L168 ansformationObserver]: Applying ICFG transformation LOOP_ACCELERATION_JORDAN [2022-04-07 21:20:13,132 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 07.04 09:20:13 BasicIcfg [2022-04-07 21:20:13,132 INFO L132 PluginConnector]: ------------------------ END IcfgTransformer---------------------------- [2022-04-07 21:20:13,133 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-04-07 21:20:13,134 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-04-07 21:20:13,136 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-04-07 21:20:13,136 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.04 09:20:12" (1/4) ... [2022-04-07 21:20:13,136 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5d85a6d5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.04 09:20:13, skipping insertion in model container [2022-04-07 21:20:13,136 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 09:20:12" (2/4) ... [2022-04-07 21:20:13,136 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5d85a6d5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.04 09:20:13, skipping insertion in model container [2022-04-07 21:20:13,137 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.04 09:20:13" (3/4) ... [2022-04-07 21:20:13,137 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5d85a6d5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.04 09:20:13, skipping insertion in model container [2022-04-07 21:20:13,137 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 07.04 09:20:13" (4/4) ... [2022-04-07 21:20:13,137 INFO L111 eAbstractionObserver]: Analyzing ICFG test_locks_14-1.cJordan [2022-04-07 21:20:13,140 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:ForwardPredicates Determinization: PREDICATE_ABSTRACTION [2022-04-07 21:20:13,141 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-04-07 21:20:13,175 INFO L339 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-04-07 21:20:13,178 INFO L340 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=ForwardPredicates, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=false, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=All, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP [2022-04-07 21:20:13,179 INFO L341 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-04-07 21:20:13,193 INFO L276 IsEmpty]: Start isEmpty. Operand has 57 states, 51 states have (on average 1.9019607843137254) internal successors, (97), 52 states have internal predecessors, (97), 2 states have call successors, (2), 2 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 21:20:13,198 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2022-04-07 21:20:13,198 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 21:20:13,198 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 21:20:13,199 INFO L403 AbstractCegarLoop]: === Iteration 1 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 21:20:13,202 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 21:20:13,202 INFO L85 PathProgramCache]: Analyzing trace with hash 267710119, now seen corresponding path program 1 times [2022-04-07 21:20:13,208 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 21:20:13,208 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1958850136] [2022-04-07 21:20:13,208 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 21:20:13,209 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 21:20:13,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:20:13,453 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 21:20:13,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:20:13,470 INFO L290 TraceCheckUtils]: 0: Hoare triple {66#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {60#true} is VALID [2022-04-07 21:20:13,471 INFO L290 TraceCheckUtils]: 1: Hoare triple {60#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {60#true} is VALID [2022-04-07 21:20:13,471 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {60#true} {60#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {60#true} is VALID [2022-04-07 21:20:13,472 INFO L272 TraceCheckUtils]: 0: Hoare triple {60#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {66#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 21:20:13,473 INFO L290 TraceCheckUtils]: 1: Hoare triple {66#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {60#true} is VALID [2022-04-07 21:20:13,474 INFO L290 TraceCheckUtils]: 2: Hoare triple {60#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {60#true} is VALID [2022-04-07 21:20:13,474 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {60#true} {60#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {60#true} is VALID [2022-04-07 21:20:13,474 INFO L272 TraceCheckUtils]: 4: Hoare triple {60#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {60#true} is VALID [2022-04-07 21:20:13,476 INFO L290 TraceCheckUtils]: 5: Hoare triple {60#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {60#true} is VALID [2022-04-07 21:20:13,476 INFO L290 TraceCheckUtils]: 6: Hoare triple {60#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {60#true} is VALID [2022-04-07 21:20:13,476 INFO L290 TraceCheckUtils]: 7: Hoare triple {60#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {60#true} is VALID [2022-04-07 21:20:13,478 INFO L290 TraceCheckUtils]: 8: Hoare triple {60#true} [284] L88-->L88-2: Formula: (and (= v_main_~lk1~0_3 1) (not (= v_main_~p1~0_2 0))) InVars {main_~p1~0=v_main_~p1~0_2} OutVars{main_~p1~0=v_main_~p1~0_2, main_~lk1~0=v_main_~lk1~0_3} AuxVars[] AssignedVars[main_~lk1~0] {65#(= main_~lk1~0 1)} is VALID [2022-04-07 21:20:13,479 INFO L290 TraceCheckUtils]: 9: Hoare triple {65#(= main_~lk1~0 1)} [286] L88-2-->L92-1: Formula: (and (= v_main_~lk2~0_3 1) (not (= v_main_~p2~0_2 0))) InVars {main_~p2~0=v_main_~p2~0_2} OutVars{main_~lk2~0=v_main_~lk2~0_3, main_~p2~0=v_main_~p2~0_2} AuxVars[] AssignedVars[main_~lk2~0] {65#(= main_~lk1~0 1)} is VALID [2022-04-07 21:20:13,480 INFO L290 TraceCheckUtils]: 10: Hoare triple {65#(= main_~lk1~0 1)} [288] L92-1-->L96-1: Formula: (and (= v_main_~lk3~0_6 1) (not (= v_main_~p3~0_4 0))) InVars {main_~p3~0=v_main_~p3~0_4} OutVars{main_~p3~0=v_main_~p3~0_4, main_~lk3~0=v_main_~lk3~0_6} AuxVars[] AssignedVars[main_~lk3~0] {65#(= main_~lk1~0 1)} is VALID [2022-04-07 21:20:13,480 INFO L290 TraceCheckUtils]: 11: Hoare triple {65#(= main_~lk1~0 1)} [290] L96-1-->L100-1: Formula: (and (not (= v_main_~p4~0_4 0)) (= v_main_~lk4~0_6 1)) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4, main_~lk4~0=v_main_~lk4~0_6} AuxVars[] AssignedVars[main_~lk4~0] {65#(= main_~lk1~0 1)} is VALID [2022-04-07 21:20:13,481 INFO L290 TraceCheckUtils]: 12: Hoare triple {65#(= main_~lk1~0 1)} [292] L100-1-->L104-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {65#(= main_~lk1~0 1)} is VALID [2022-04-07 21:20:13,482 INFO L290 TraceCheckUtils]: 13: Hoare triple {65#(= main_~lk1~0 1)} [294] L104-1-->L108-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {65#(= main_~lk1~0 1)} is VALID [2022-04-07 21:20:13,482 INFO L290 TraceCheckUtils]: 14: Hoare triple {65#(= main_~lk1~0 1)} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {65#(= main_~lk1~0 1)} is VALID [2022-04-07 21:20:13,484 INFO L290 TraceCheckUtils]: 15: Hoare triple {65#(= main_~lk1~0 1)} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {65#(= main_~lk1~0 1)} is VALID [2022-04-07 21:20:13,485 INFO L290 TraceCheckUtils]: 16: Hoare triple {65#(= main_~lk1~0 1)} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {65#(= main_~lk1~0 1)} is VALID [2022-04-07 21:20:13,488 INFO L290 TraceCheckUtils]: 17: Hoare triple {65#(= main_~lk1~0 1)} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {65#(= main_~lk1~0 1)} is VALID [2022-04-07 21:20:13,488 INFO L290 TraceCheckUtils]: 18: Hoare triple {65#(= main_~lk1~0 1)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {65#(= main_~lk1~0 1)} is VALID [2022-04-07 21:20:13,489 INFO L290 TraceCheckUtils]: 19: Hoare triple {65#(= main_~lk1~0 1)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {65#(= main_~lk1~0 1)} is VALID [2022-04-07 21:20:13,489 INFO L290 TraceCheckUtils]: 20: Hoare triple {65#(= main_~lk1~0 1)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {65#(= main_~lk1~0 1)} is VALID [2022-04-07 21:20:13,490 INFO L290 TraceCheckUtils]: 21: Hoare triple {65#(= main_~lk1~0 1)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {65#(= main_~lk1~0 1)} is VALID [2022-04-07 21:20:13,491 INFO L290 TraceCheckUtils]: 22: Hoare triple {65#(= main_~lk1~0 1)} [312] L140-1-->L147: Formula: (not (= v_main_~p1~0_4 0)) InVars {main_~p1~0=v_main_~p1~0_4} OutVars{main_~p1~0=v_main_~p1~0_4} AuxVars[] AssignedVars[] {65#(= main_~lk1~0 1)} is VALID [2022-04-07 21:20:13,491 INFO L290 TraceCheckUtils]: 23: Hoare triple {65#(= main_~lk1~0 1)} [314] L147-->L212-1: Formula: (not (= v_main_~lk1~0_4 1)) InVars {main_~lk1~0=v_main_~lk1~0_4} OutVars{main_~lk1~0=v_main_~lk1~0_4} AuxVars[] AssignedVars[] {61#false} is VALID [2022-04-07 21:20:13,491 INFO L290 TraceCheckUtils]: 24: Hoare triple {61#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {61#false} is VALID [2022-04-07 21:20:13,492 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 21:20:13,492 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 21:20:13,493 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1958850136] [2022-04-07 21:20:13,493 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1958850136] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 21:20:13,494 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 21:20:13,494 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-07 21:20:13,496 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [921699422] [2022-04-07 21:20:13,497 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 21:20:13,502 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-07 21:20:13,503 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 21:20:13,506 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:13,541 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 25 edges. 25 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:20:13,541 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-07 21:20:13,541 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 21:20:13,558 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-07 21:20:13,558 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-07 21:20:13,560 INFO L87 Difference]: Start difference. First operand has 57 states, 51 states have (on average 1.9019607843137254) internal successors, (97), 52 states have internal predecessors, (97), 2 states have call successors, (2), 2 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:13,857 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:13,857 INFO L93 Difference]: Finished difference Result 105 states and 186 transitions. [2022-04-07 21:20:13,857 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-07 21:20:13,857 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-07 21:20:13,858 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 21:20:13,858 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:13,875 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 193 transitions. [2022-04-07 21:20:13,875 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:13,914 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 193 transitions. [2022-04-07 21:20:13,914 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 193 transitions. [2022-04-07 21:20:14,081 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 193 edges. 193 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:20:14,088 INFO L225 Difference]: With dead ends: 105 [2022-04-07 21:20:14,088 INFO L226 Difference]: Without dead ends: 97 [2022-04-07 21:20:14,089 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-07 21:20:14,092 INFO L913 BasicCegarLoop]: 104 mSDtfsCounter, 242 mSDsluCounter, 9 mSDsCounter, 0 mSdLazyCounter, 97 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 242 SdHoareTripleChecker+Valid, 113 SdHoareTripleChecker+Invalid, 99 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 97 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 21:20:14,092 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [242 Valid, 113 Invalid, 99 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 97 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-07 21:20:14,102 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 97 states. [2022-04-07 21:20:14,111 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 97 to 67. [2022-04-07 21:20:14,111 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 21:20:14,112 INFO L82 GeneralOperation]: Start isEquivalent. First operand 97 states. Second operand has 67 states, 63 states have (on average 1.8888888888888888) internal successors, (119), 63 states have internal predecessors, (119), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:14,113 INFO L74 IsIncluded]: Start isIncluded. First operand 97 states. Second operand has 67 states, 63 states have (on average 1.8888888888888888) internal successors, (119), 63 states have internal predecessors, (119), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:14,113 INFO L87 Difference]: Start difference. First operand 97 states. Second operand has 67 states, 63 states have (on average 1.8888888888888888) internal successors, (119), 63 states have internal predecessors, (119), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:14,118 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:14,118 INFO L93 Difference]: Finished difference Result 97 states and 177 transitions. [2022-04-07 21:20:14,118 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 177 transitions. [2022-04-07 21:20:14,119 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:20:14,119 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:20:14,119 INFO L74 IsIncluded]: Start isIncluded. First operand has 67 states, 63 states have (on average 1.8888888888888888) internal successors, (119), 63 states have internal predecessors, (119), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 97 states. [2022-04-07 21:20:14,120 INFO L87 Difference]: Start difference. First operand has 67 states, 63 states have (on average 1.8888888888888888) internal successors, (119), 63 states have internal predecessors, (119), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 97 states. [2022-04-07 21:20:14,126 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:14,126 INFO L93 Difference]: Finished difference Result 97 states and 177 transitions. [2022-04-07 21:20:14,127 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 177 transitions. [2022-04-07 21:20:14,127 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:20:14,127 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:20:14,127 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 21:20:14,127 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 21:20:14,128 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 67 states, 63 states have (on average 1.8888888888888888) internal successors, (119), 63 states have internal predecessors, (119), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:14,130 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 67 states to 67 states and 122 transitions. [2022-04-07 21:20:14,130 INFO L78 Accepts]: Start accepts. Automaton has 67 states and 122 transitions. Word has length 25 [2022-04-07 21:20:14,131 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 21:20:14,131 INFO L478 AbstractCegarLoop]: Abstraction has 67 states and 122 transitions. [2022-04-07 21:20:14,131 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:14,131 INFO L276 IsEmpty]: Start isEmpty. Operand 67 states and 122 transitions. [2022-04-07 21:20:14,132 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2022-04-07 21:20:14,132 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 21:20:14,132 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 21:20:14,132 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-04-07 21:20:14,132 INFO L403 AbstractCegarLoop]: === Iteration 2 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 21:20:14,133 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 21:20:14,133 INFO L85 PathProgramCache]: Analyzing trace with hash 1621019816, now seen corresponding path program 1 times [2022-04-07 21:20:14,133 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 21:20:14,133 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [37303513] [2022-04-07 21:20:14,133 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 21:20:14,133 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 21:20:14,158 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:20:14,185 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 21:20:14,188 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:20:14,196 INFO L290 TraceCheckUtils]: 0: Hoare triple {444#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {438#true} is VALID [2022-04-07 21:20:14,196 INFO L290 TraceCheckUtils]: 1: Hoare triple {438#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {438#true} is VALID [2022-04-07 21:20:14,196 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {438#true} {438#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {438#true} is VALID [2022-04-07 21:20:14,197 INFO L272 TraceCheckUtils]: 0: Hoare triple {438#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {444#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 21:20:14,197 INFO L290 TraceCheckUtils]: 1: Hoare triple {444#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {438#true} is VALID [2022-04-07 21:20:14,198 INFO L290 TraceCheckUtils]: 2: Hoare triple {438#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {438#true} is VALID [2022-04-07 21:20:14,198 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {438#true} {438#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {438#true} is VALID [2022-04-07 21:20:14,198 INFO L272 TraceCheckUtils]: 4: Hoare triple {438#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {438#true} is VALID [2022-04-07 21:20:14,198 INFO L290 TraceCheckUtils]: 5: Hoare triple {438#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {438#true} is VALID [2022-04-07 21:20:14,198 INFO L290 TraceCheckUtils]: 6: Hoare triple {438#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {438#true} is VALID [2022-04-07 21:20:14,199 INFO L290 TraceCheckUtils]: 7: Hoare triple {438#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {438#true} is VALID [2022-04-07 21:20:14,199 INFO L290 TraceCheckUtils]: 8: Hoare triple {438#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {443#(= main_~p1~0 0)} is VALID [2022-04-07 21:20:14,200 INFO L290 TraceCheckUtils]: 9: Hoare triple {443#(= main_~p1~0 0)} [286] L88-2-->L92-1: Formula: (and (= v_main_~lk2~0_3 1) (not (= v_main_~p2~0_2 0))) InVars {main_~p2~0=v_main_~p2~0_2} OutVars{main_~lk2~0=v_main_~lk2~0_3, main_~p2~0=v_main_~p2~0_2} AuxVars[] AssignedVars[main_~lk2~0] {443#(= main_~p1~0 0)} is VALID [2022-04-07 21:20:14,200 INFO L290 TraceCheckUtils]: 10: Hoare triple {443#(= main_~p1~0 0)} [288] L92-1-->L96-1: Formula: (and (= v_main_~lk3~0_6 1) (not (= v_main_~p3~0_4 0))) InVars {main_~p3~0=v_main_~p3~0_4} OutVars{main_~p3~0=v_main_~p3~0_4, main_~lk3~0=v_main_~lk3~0_6} AuxVars[] AssignedVars[main_~lk3~0] {443#(= main_~p1~0 0)} is VALID [2022-04-07 21:20:14,201 INFO L290 TraceCheckUtils]: 11: Hoare triple {443#(= main_~p1~0 0)} [290] L96-1-->L100-1: Formula: (and (not (= v_main_~p4~0_4 0)) (= v_main_~lk4~0_6 1)) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4, main_~lk4~0=v_main_~lk4~0_6} AuxVars[] AssignedVars[main_~lk4~0] {443#(= main_~p1~0 0)} is VALID [2022-04-07 21:20:14,202 INFO L290 TraceCheckUtils]: 12: Hoare triple {443#(= main_~p1~0 0)} [292] L100-1-->L104-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {443#(= main_~p1~0 0)} is VALID [2022-04-07 21:20:14,202 INFO L290 TraceCheckUtils]: 13: Hoare triple {443#(= main_~p1~0 0)} [294] L104-1-->L108-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {443#(= main_~p1~0 0)} is VALID [2022-04-07 21:20:14,202 INFO L290 TraceCheckUtils]: 14: Hoare triple {443#(= main_~p1~0 0)} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {443#(= main_~p1~0 0)} is VALID [2022-04-07 21:20:14,203 INFO L290 TraceCheckUtils]: 15: Hoare triple {443#(= main_~p1~0 0)} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {443#(= main_~p1~0 0)} is VALID [2022-04-07 21:20:14,203 INFO L290 TraceCheckUtils]: 16: Hoare triple {443#(= main_~p1~0 0)} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {443#(= main_~p1~0 0)} is VALID [2022-04-07 21:20:14,203 INFO L290 TraceCheckUtils]: 17: Hoare triple {443#(= main_~p1~0 0)} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {443#(= main_~p1~0 0)} is VALID [2022-04-07 21:20:14,204 INFO L290 TraceCheckUtils]: 18: Hoare triple {443#(= main_~p1~0 0)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {443#(= main_~p1~0 0)} is VALID [2022-04-07 21:20:14,207 INFO L290 TraceCheckUtils]: 19: Hoare triple {443#(= main_~p1~0 0)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {443#(= main_~p1~0 0)} is VALID [2022-04-07 21:20:14,207 INFO L290 TraceCheckUtils]: 20: Hoare triple {443#(= main_~p1~0 0)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {443#(= main_~p1~0 0)} is VALID [2022-04-07 21:20:14,208 INFO L290 TraceCheckUtils]: 21: Hoare triple {443#(= main_~p1~0 0)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {443#(= main_~p1~0 0)} is VALID [2022-04-07 21:20:14,208 INFO L290 TraceCheckUtils]: 22: Hoare triple {443#(= main_~p1~0 0)} [312] L140-1-->L147: Formula: (not (= v_main_~p1~0_4 0)) InVars {main_~p1~0=v_main_~p1~0_4} OutVars{main_~p1~0=v_main_~p1~0_4} AuxVars[] AssignedVars[] {439#false} is VALID [2022-04-07 21:20:14,208 INFO L290 TraceCheckUtils]: 23: Hoare triple {439#false} [314] L147-->L212-1: Formula: (not (= v_main_~lk1~0_4 1)) InVars {main_~lk1~0=v_main_~lk1~0_4} OutVars{main_~lk1~0=v_main_~lk1~0_4} AuxVars[] AssignedVars[] {439#false} is VALID [2022-04-07 21:20:14,208 INFO L290 TraceCheckUtils]: 24: Hoare triple {439#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {439#false} is VALID [2022-04-07 21:20:14,209 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 21:20:14,209 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 21:20:14,209 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [37303513] [2022-04-07 21:20:14,209 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [37303513] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 21:20:14,209 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 21:20:14,209 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-07 21:20:14,209 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [343792277] [2022-04-07 21:20:14,210 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 21:20:14,210 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-07 21:20:14,211 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 21:20:14,211 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:14,227 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 25 edges. 25 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:20:14,228 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-07 21:20:14,228 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 21:20:14,228 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-07 21:20:14,229 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-07 21:20:14,230 INFO L87 Difference]: Start difference. First operand 67 states and 122 transitions. Second operand has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:14,456 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:14,456 INFO L93 Difference]: Finished difference Result 97 states and 175 transitions. [2022-04-07 21:20:14,456 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-07 21:20:14,457 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-07 21:20:14,457 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 21:20:14,457 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:14,459 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 177 transitions. [2022-04-07 21:20:14,459 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:14,461 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 177 transitions. [2022-04-07 21:20:14,461 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 177 transitions. [2022-04-07 21:20:14,594 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 177 edges. 177 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:20:14,597 INFO L225 Difference]: With dead ends: 97 [2022-04-07 21:20:14,597 INFO L226 Difference]: Without dead ends: 97 [2022-04-07 21:20:14,597 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-07 21:20:14,598 INFO L913 BasicCegarLoop]: 120 mSDtfsCounter, 208 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 88 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 208 SdHoareTripleChecker+Valid, 127 SdHoareTripleChecker+Invalid, 91 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 88 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 21:20:14,598 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [208 Valid, 127 Invalid, 91 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 88 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-07 21:20:14,599 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 97 states. [2022-04-07 21:20:14,603 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 97 to 95. [2022-04-07 21:20:14,603 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 21:20:14,604 INFO L82 GeneralOperation]: Start isEquivalent. First operand 97 states. Second operand has 95 states, 91 states have (on average 1.879120879120879) internal successors, (171), 91 states have internal predecessors, (171), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:14,604 INFO L74 IsIncluded]: Start isIncluded. First operand 97 states. Second operand has 95 states, 91 states have (on average 1.879120879120879) internal successors, (171), 91 states have internal predecessors, (171), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:14,604 INFO L87 Difference]: Start difference. First operand 97 states. Second operand has 95 states, 91 states have (on average 1.879120879120879) internal successors, (171), 91 states have internal predecessors, (171), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:14,607 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:14,607 INFO L93 Difference]: Finished difference Result 97 states and 175 transitions. [2022-04-07 21:20:14,607 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 175 transitions. [2022-04-07 21:20:14,608 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:20:14,608 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:20:14,608 INFO L74 IsIncluded]: Start isIncluded. First operand has 95 states, 91 states have (on average 1.879120879120879) internal successors, (171), 91 states have internal predecessors, (171), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 97 states. [2022-04-07 21:20:14,609 INFO L87 Difference]: Start difference. First operand has 95 states, 91 states have (on average 1.879120879120879) internal successors, (171), 91 states have internal predecessors, (171), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 97 states. [2022-04-07 21:20:14,611 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:14,611 INFO L93 Difference]: Finished difference Result 97 states and 175 transitions. [2022-04-07 21:20:14,611 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 175 transitions. [2022-04-07 21:20:14,612 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:20:14,612 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:20:14,612 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 21:20:14,612 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 21:20:14,612 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 95 states, 91 states have (on average 1.879120879120879) internal successors, (171), 91 states have internal predecessors, (171), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:14,615 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 95 states to 95 states and 174 transitions. [2022-04-07 21:20:14,615 INFO L78 Accepts]: Start accepts. Automaton has 95 states and 174 transitions. Word has length 25 [2022-04-07 21:20:14,615 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 21:20:14,615 INFO L478 AbstractCegarLoop]: Abstraction has 95 states and 174 transitions. [2022-04-07 21:20:14,615 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:14,615 INFO L276 IsEmpty]: Start isEmpty. Operand 95 states and 174 transitions. [2022-04-07 21:20:14,616 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2022-04-07 21:20:14,616 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 21:20:14,616 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 21:20:14,616 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-04-07 21:20:14,616 INFO L403 AbstractCegarLoop]: === Iteration 3 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 21:20:14,617 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 21:20:14,617 INFO L85 PathProgramCache]: Analyzing trace with hash -290888810, now seen corresponding path program 1 times [2022-04-07 21:20:14,617 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 21:20:14,617 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1293147070] [2022-04-07 21:20:14,617 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 21:20:14,617 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 21:20:14,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:20:14,660 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 21:20:14,662 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:20:14,665 INFO L290 TraceCheckUtils]: 0: Hoare triple {842#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {836#true} is VALID [2022-04-07 21:20:14,665 INFO L290 TraceCheckUtils]: 1: Hoare triple {836#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {836#true} is VALID [2022-04-07 21:20:14,665 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {836#true} {836#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {836#true} is VALID [2022-04-07 21:20:14,666 INFO L272 TraceCheckUtils]: 0: Hoare triple {836#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {842#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 21:20:14,666 INFO L290 TraceCheckUtils]: 1: Hoare triple {842#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {836#true} is VALID [2022-04-07 21:20:14,666 INFO L290 TraceCheckUtils]: 2: Hoare triple {836#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {836#true} is VALID [2022-04-07 21:20:14,667 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {836#true} {836#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {836#true} is VALID [2022-04-07 21:20:14,667 INFO L272 TraceCheckUtils]: 4: Hoare triple {836#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {836#true} is VALID [2022-04-07 21:20:14,667 INFO L290 TraceCheckUtils]: 5: Hoare triple {836#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {836#true} is VALID [2022-04-07 21:20:14,667 INFO L290 TraceCheckUtils]: 6: Hoare triple {836#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {836#true} is VALID [2022-04-07 21:20:14,667 INFO L290 TraceCheckUtils]: 7: Hoare triple {836#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {836#true} is VALID [2022-04-07 21:20:14,668 INFO L290 TraceCheckUtils]: 8: Hoare triple {836#true} [284] L88-->L88-2: Formula: (and (= v_main_~lk1~0_3 1) (not (= v_main_~p1~0_2 0))) InVars {main_~p1~0=v_main_~p1~0_2} OutVars{main_~p1~0=v_main_~p1~0_2, main_~lk1~0=v_main_~lk1~0_3} AuxVars[] AssignedVars[main_~lk1~0] {841#(not (= main_~p1~0 0))} is VALID [2022-04-07 21:20:14,668 INFO L290 TraceCheckUtils]: 9: Hoare triple {841#(not (= main_~p1~0 0))} [286] L88-2-->L92-1: Formula: (and (= v_main_~lk2~0_3 1) (not (= v_main_~p2~0_2 0))) InVars {main_~p2~0=v_main_~p2~0_2} OutVars{main_~lk2~0=v_main_~lk2~0_3, main_~p2~0=v_main_~p2~0_2} AuxVars[] AssignedVars[main_~lk2~0] {841#(not (= main_~p1~0 0))} is VALID [2022-04-07 21:20:14,669 INFO L290 TraceCheckUtils]: 10: Hoare triple {841#(not (= main_~p1~0 0))} [288] L92-1-->L96-1: Formula: (and (= v_main_~lk3~0_6 1) (not (= v_main_~p3~0_4 0))) InVars {main_~p3~0=v_main_~p3~0_4} OutVars{main_~p3~0=v_main_~p3~0_4, main_~lk3~0=v_main_~lk3~0_6} AuxVars[] AssignedVars[main_~lk3~0] {841#(not (= main_~p1~0 0))} is VALID [2022-04-07 21:20:14,669 INFO L290 TraceCheckUtils]: 11: Hoare triple {841#(not (= main_~p1~0 0))} [290] L96-1-->L100-1: Formula: (and (not (= v_main_~p4~0_4 0)) (= v_main_~lk4~0_6 1)) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4, main_~lk4~0=v_main_~lk4~0_6} AuxVars[] AssignedVars[main_~lk4~0] {841#(not (= main_~p1~0 0))} is VALID [2022-04-07 21:20:14,669 INFO L290 TraceCheckUtils]: 12: Hoare triple {841#(not (= main_~p1~0 0))} [292] L100-1-->L104-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {841#(not (= main_~p1~0 0))} is VALID [2022-04-07 21:20:14,670 INFO L290 TraceCheckUtils]: 13: Hoare triple {841#(not (= main_~p1~0 0))} [294] L104-1-->L108-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {841#(not (= main_~p1~0 0))} is VALID [2022-04-07 21:20:14,670 INFO L290 TraceCheckUtils]: 14: Hoare triple {841#(not (= main_~p1~0 0))} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {841#(not (= main_~p1~0 0))} is VALID [2022-04-07 21:20:14,670 INFO L290 TraceCheckUtils]: 15: Hoare triple {841#(not (= main_~p1~0 0))} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {841#(not (= main_~p1~0 0))} is VALID [2022-04-07 21:20:14,671 INFO L290 TraceCheckUtils]: 16: Hoare triple {841#(not (= main_~p1~0 0))} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {841#(not (= main_~p1~0 0))} is VALID [2022-04-07 21:20:14,671 INFO L290 TraceCheckUtils]: 17: Hoare triple {841#(not (= main_~p1~0 0))} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {841#(not (= main_~p1~0 0))} is VALID [2022-04-07 21:20:14,671 INFO L290 TraceCheckUtils]: 18: Hoare triple {841#(not (= main_~p1~0 0))} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {841#(not (= main_~p1~0 0))} is VALID [2022-04-07 21:20:14,672 INFO L290 TraceCheckUtils]: 19: Hoare triple {841#(not (= main_~p1~0 0))} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {841#(not (= main_~p1~0 0))} is VALID [2022-04-07 21:20:14,672 INFO L290 TraceCheckUtils]: 20: Hoare triple {841#(not (= main_~p1~0 0))} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {841#(not (= main_~p1~0 0))} is VALID [2022-04-07 21:20:14,673 INFO L290 TraceCheckUtils]: 21: Hoare triple {841#(not (= main_~p1~0 0))} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {841#(not (= main_~p1~0 0))} is VALID [2022-04-07 21:20:14,673 INFO L290 TraceCheckUtils]: 22: Hoare triple {841#(not (= main_~p1~0 0))} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {837#false} is VALID [2022-04-07 21:20:14,673 INFO L290 TraceCheckUtils]: 23: Hoare triple {837#false} [316] L146-1-->L152: Formula: (not (= v_main_~p2~0_4 0)) InVars {main_~p2~0=v_main_~p2~0_4} OutVars{main_~p2~0=v_main_~p2~0_4} AuxVars[] AssignedVars[] {837#false} is VALID [2022-04-07 21:20:14,673 INFO L290 TraceCheckUtils]: 24: Hoare triple {837#false} [320] L152-->L212-1: Formula: (not (= v_main_~lk2~0_4 1)) InVars {main_~lk2~0=v_main_~lk2~0_4} OutVars{main_~lk2~0=v_main_~lk2~0_4} AuxVars[] AssignedVars[] {837#false} is VALID [2022-04-07 21:20:14,674 INFO L290 TraceCheckUtils]: 25: Hoare triple {837#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {837#false} is VALID [2022-04-07 21:20:14,674 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 21:20:14,674 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 21:20:14,674 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1293147070] [2022-04-07 21:20:14,674 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1293147070] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 21:20:14,674 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 21:20:14,674 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-07 21:20:14,675 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [411631711] [2022-04-07 21:20:14,675 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 21:20:14,675 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-07 21:20:14,675 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 21:20:14,676 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:14,690 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 26 edges. 26 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:20:14,691 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-07 21:20:14,691 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 21:20:14,691 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-07 21:20:14,691 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-07 21:20:14,691 INFO L87 Difference]: Start difference. First operand 95 states and 174 transitions. Second operand has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:14,894 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:14,894 INFO L93 Difference]: Finished difference Result 100 states and 177 transitions. [2022-04-07 21:20:14,894 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-07 21:20:14,894 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-07 21:20:14,894 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 21:20:14,895 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:14,896 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 176 transitions. [2022-04-07 21:20:14,896 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:14,898 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 176 transitions. [2022-04-07 21:20:14,898 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 176 transitions. [2022-04-07 21:20:15,025 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 176 edges. 176 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:20:15,027 INFO L225 Difference]: With dead ends: 100 [2022-04-07 21:20:15,027 INFO L226 Difference]: Without dead ends: 100 [2022-04-07 21:20:15,027 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-07 21:20:15,028 INFO L913 BasicCegarLoop]: 146 mSDtfsCounter, 183 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 87 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 183 SdHoareTripleChecker+Valid, 153 SdHoareTripleChecker+Invalid, 89 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 87 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 21:20:15,029 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [183 Valid, 153 Invalid, 89 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 87 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-07 21:20:15,029 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100 states. [2022-04-07 21:20:15,032 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100 to 98. [2022-04-07 21:20:15,032 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 21:20:15,033 INFO L82 GeneralOperation]: Start isEquivalent. First operand 100 states. Second operand has 98 states, 94 states have (on average 1.8404255319148937) internal successors, (173), 94 states have internal predecessors, (173), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:15,033 INFO L74 IsIncluded]: Start isIncluded. First operand 100 states. Second operand has 98 states, 94 states have (on average 1.8404255319148937) internal successors, (173), 94 states have internal predecessors, (173), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:15,033 INFO L87 Difference]: Start difference. First operand 100 states. Second operand has 98 states, 94 states have (on average 1.8404255319148937) internal successors, (173), 94 states have internal predecessors, (173), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:15,036 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:15,036 INFO L93 Difference]: Finished difference Result 100 states and 177 transitions. [2022-04-07 21:20:15,036 INFO L276 IsEmpty]: Start isEmpty. Operand 100 states and 177 transitions. [2022-04-07 21:20:15,036 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:20:15,036 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:20:15,037 INFO L74 IsIncluded]: Start isIncluded. First operand has 98 states, 94 states have (on average 1.8404255319148937) internal successors, (173), 94 states have internal predecessors, (173), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 100 states. [2022-04-07 21:20:15,037 INFO L87 Difference]: Start difference. First operand has 98 states, 94 states have (on average 1.8404255319148937) internal successors, (173), 94 states have internal predecessors, (173), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 100 states. [2022-04-07 21:20:15,039 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:15,040 INFO L93 Difference]: Finished difference Result 100 states and 177 transitions. [2022-04-07 21:20:15,040 INFO L276 IsEmpty]: Start isEmpty. Operand 100 states and 177 transitions. [2022-04-07 21:20:15,058 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:20:15,058 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:20:15,058 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 21:20:15,058 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 21:20:15,058 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 98 states, 94 states have (on average 1.8404255319148937) internal successors, (173), 94 states have internal predecessors, (173), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:15,061 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 98 states to 98 states and 176 transitions. [2022-04-07 21:20:15,061 INFO L78 Accepts]: Start accepts. Automaton has 98 states and 176 transitions. Word has length 26 [2022-04-07 21:20:15,061 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 21:20:15,061 INFO L478 AbstractCegarLoop]: Abstraction has 98 states and 176 transitions. [2022-04-07 21:20:15,061 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:15,061 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 176 transitions. [2022-04-07 21:20:15,062 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2022-04-07 21:20:15,062 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 21:20:15,062 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 21:20:15,062 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2022-04-07 21:20:15,062 INFO L403 AbstractCegarLoop]: === Iteration 4 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 21:20:15,063 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 21:20:15,063 INFO L85 PathProgramCache]: Analyzing trace with hash -1287961163, now seen corresponding path program 1 times [2022-04-07 21:20:15,063 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 21:20:15,063 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [344482240] [2022-04-07 21:20:15,063 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 21:20:15,063 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 21:20:15,083 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:20:15,103 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 21:20:15,105 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:20:15,108 INFO L290 TraceCheckUtils]: 0: Hoare triple {1252#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1246#true} is VALID [2022-04-07 21:20:15,108 INFO L290 TraceCheckUtils]: 1: Hoare triple {1246#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1246#true} is VALID [2022-04-07 21:20:15,108 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1246#true} {1246#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1246#true} is VALID [2022-04-07 21:20:15,109 INFO L272 TraceCheckUtils]: 0: Hoare triple {1246#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1252#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 21:20:15,109 INFO L290 TraceCheckUtils]: 1: Hoare triple {1252#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1246#true} is VALID [2022-04-07 21:20:15,109 INFO L290 TraceCheckUtils]: 2: Hoare triple {1246#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1246#true} is VALID [2022-04-07 21:20:15,109 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1246#true} {1246#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1246#true} is VALID [2022-04-07 21:20:15,109 INFO L272 TraceCheckUtils]: 4: Hoare triple {1246#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1246#true} is VALID [2022-04-07 21:20:15,110 INFO L290 TraceCheckUtils]: 5: Hoare triple {1246#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {1246#true} is VALID [2022-04-07 21:20:15,110 INFO L290 TraceCheckUtils]: 6: Hoare triple {1246#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {1246#true} is VALID [2022-04-07 21:20:15,110 INFO L290 TraceCheckUtils]: 7: Hoare triple {1246#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {1246#true} is VALID [2022-04-07 21:20:15,110 INFO L290 TraceCheckUtils]: 8: Hoare triple {1246#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {1246#true} is VALID [2022-04-07 21:20:15,110 INFO L290 TraceCheckUtils]: 9: Hoare triple {1246#true} [286] L88-2-->L92-1: Formula: (and (= v_main_~lk2~0_3 1) (not (= v_main_~p2~0_2 0))) InVars {main_~p2~0=v_main_~p2~0_2} OutVars{main_~lk2~0=v_main_~lk2~0_3, main_~p2~0=v_main_~p2~0_2} AuxVars[] AssignedVars[main_~lk2~0] {1251#(= main_~lk2~0 1)} is VALID [2022-04-07 21:20:15,111 INFO L290 TraceCheckUtils]: 10: Hoare triple {1251#(= main_~lk2~0 1)} [288] L92-1-->L96-1: Formula: (and (= v_main_~lk3~0_6 1) (not (= v_main_~p3~0_4 0))) InVars {main_~p3~0=v_main_~p3~0_4} OutVars{main_~p3~0=v_main_~p3~0_4, main_~lk3~0=v_main_~lk3~0_6} AuxVars[] AssignedVars[main_~lk3~0] {1251#(= main_~lk2~0 1)} is VALID [2022-04-07 21:20:15,111 INFO L290 TraceCheckUtils]: 11: Hoare triple {1251#(= main_~lk2~0 1)} [290] L96-1-->L100-1: Formula: (and (not (= v_main_~p4~0_4 0)) (= v_main_~lk4~0_6 1)) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4, main_~lk4~0=v_main_~lk4~0_6} AuxVars[] AssignedVars[main_~lk4~0] {1251#(= main_~lk2~0 1)} is VALID [2022-04-07 21:20:15,111 INFO L290 TraceCheckUtils]: 12: Hoare triple {1251#(= main_~lk2~0 1)} [292] L100-1-->L104-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {1251#(= main_~lk2~0 1)} is VALID [2022-04-07 21:20:15,112 INFO L290 TraceCheckUtils]: 13: Hoare triple {1251#(= main_~lk2~0 1)} [294] L104-1-->L108-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {1251#(= main_~lk2~0 1)} is VALID [2022-04-07 21:20:15,112 INFO L290 TraceCheckUtils]: 14: Hoare triple {1251#(= main_~lk2~0 1)} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {1251#(= main_~lk2~0 1)} is VALID [2022-04-07 21:20:15,112 INFO L290 TraceCheckUtils]: 15: Hoare triple {1251#(= main_~lk2~0 1)} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {1251#(= main_~lk2~0 1)} is VALID [2022-04-07 21:20:15,113 INFO L290 TraceCheckUtils]: 16: Hoare triple {1251#(= main_~lk2~0 1)} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {1251#(= main_~lk2~0 1)} is VALID [2022-04-07 21:20:15,113 INFO L290 TraceCheckUtils]: 17: Hoare triple {1251#(= main_~lk2~0 1)} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {1251#(= main_~lk2~0 1)} is VALID [2022-04-07 21:20:15,113 INFO L290 TraceCheckUtils]: 18: Hoare triple {1251#(= main_~lk2~0 1)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {1251#(= main_~lk2~0 1)} is VALID [2022-04-07 21:20:15,114 INFO L290 TraceCheckUtils]: 19: Hoare triple {1251#(= main_~lk2~0 1)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {1251#(= main_~lk2~0 1)} is VALID [2022-04-07 21:20:15,114 INFO L290 TraceCheckUtils]: 20: Hoare triple {1251#(= main_~lk2~0 1)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {1251#(= main_~lk2~0 1)} is VALID [2022-04-07 21:20:15,114 INFO L290 TraceCheckUtils]: 21: Hoare triple {1251#(= main_~lk2~0 1)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {1251#(= main_~lk2~0 1)} is VALID [2022-04-07 21:20:15,115 INFO L290 TraceCheckUtils]: 22: Hoare triple {1251#(= main_~lk2~0 1)} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {1251#(= main_~lk2~0 1)} is VALID [2022-04-07 21:20:15,115 INFO L290 TraceCheckUtils]: 23: Hoare triple {1251#(= main_~lk2~0 1)} [316] L146-1-->L152: Formula: (not (= v_main_~p2~0_4 0)) InVars {main_~p2~0=v_main_~p2~0_4} OutVars{main_~p2~0=v_main_~p2~0_4} AuxVars[] AssignedVars[] {1251#(= main_~lk2~0 1)} is VALID [2022-04-07 21:20:15,115 INFO L290 TraceCheckUtils]: 24: Hoare triple {1251#(= main_~lk2~0 1)} [320] L152-->L212-1: Formula: (not (= v_main_~lk2~0_4 1)) InVars {main_~lk2~0=v_main_~lk2~0_4} OutVars{main_~lk2~0=v_main_~lk2~0_4} AuxVars[] AssignedVars[] {1247#false} is VALID [2022-04-07 21:20:15,116 INFO L290 TraceCheckUtils]: 25: Hoare triple {1247#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1247#false} is VALID [2022-04-07 21:20:15,116 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 21:20:15,116 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 21:20:15,116 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [344482240] [2022-04-07 21:20:15,116 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [344482240] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 21:20:15,116 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 21:20:15,116 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-07 21:20:15,117 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1732960447] [2022-04-07 21:20:15,117 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 21:20:15,117 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-07 21:20:15,117 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 21:20:15,117 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:15,132 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 26 edges. 26 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:20:15,132 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-07 21:20:15,132 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 21:20:15,132 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-07 21:20:15,132 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-07 21:20:15,133 INFO L87 Difference]: Start difference. First operand 98 states and 176 transitions. Second operand has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:15,342 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:15,343 INFO L93 Difference]: Finished difference Result 183 states and 334 transitions. [2022-04-07 21:20:15,343 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-07 21:20:15,343 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-07 21:20:15,343 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 21:20:15,343 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:15,345 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 174 transitions. [2022-04-07 21:20:15,345 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:15,346 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 174 transitions. [2022-04-07 21:20:15,346 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 174 transitions. [2022-04-07 21:20:15,468 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 174 edges. 174 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:20:15,470 INFO L225 Difference]: With dead ends: 183 [2022-04-07 21:20:15,471 INFO L226 Difference]: Without dead ends: 183 [2022-04-07 21:20:15,471 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-07 21:20:15,472 INFO L913 BasicCegarLoop]: 94 mSDtfsCounter, 229 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 89 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 229 SdHoareTripleChecker+Valid, 101 SdHoareTripleChecker+Invalid, 91 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 89 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 21:20:15,472 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [229 Valid, 101 Invalid, 91 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 89 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-07 21:20:15,472 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 183 states. [2022-04-07 21:20:15,476 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 183 to 129. [2022-04-07 21:20:15,476 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 21:20:15,476 INFO L82 GeneralOperation]: Start isEquivalent. First operand 183 states. Second operand has 129 states, 125 states have (on average 1.84) internal successors, (230), 125 states have internal predecessors, (230), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:15,477 INFO L74 IsIncluded]: Start isIncluded. First operand 183 states. Second operand has 129 states, 125 states have (on average 1.84) internal successors, (230), 125 states have internal predecessors, (230), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:15,477 INFO L87 Difference]: Start difference. First operand 183 states. Second operand has 129 states, 125 states have (on average 1.84) internal successors, (230), 125 states have internal predecessors, (230), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:15,481 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:15,481 INFO L93 Difference]: Finished difference Result 183 states and 334 transitions. [2022-04-07 21:20:15,481 INFO L276 IsEmpty]: Start isEmpty. Operand 183 states and 334 transitions. [2022-04-07 21:20:15,481 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:20:15,482 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:20:15,482 INFO L74 IsIncluded]: Start isIncluded. First operand has 129 states, 125 states have (on average 1.84) internal successors, (230), 125 states have internal predecessors, (230), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 183 states. [2022-04-07 21:20:15,482 INFO L87 Difference]: Start difference. First operand has 129 states, 125 states have (on average 1.84) internal successors, (230), 125 states have internal predecessors, (230), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 183 states. [2022-04-07 21:20:15,486 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:15,486 INFO L93 Difference]: Finished difference Result 183 states and 334 transitions. [2022-04-07 21:20:15,486 INFO L276 IsEmpty]: Start isEmpty. Operand 183 states and 334 transitions. [2022-04-07 21:20:15,487 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:20:15,487 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:20:15,487 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 21:20:15,487 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 21:20:15,487 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 129 states, 125 states have (on average 1.84) internal successors, (230), 125 states have internal predecessors, (230), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:15,490 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 233 transitions. [2022-04-07 21:20:15,490 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 233 transitions. Word has length 26 [2022-04-07 21:20:15,490 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 21:20:15,490 INFO L478 AbstractCegarLoop]: Abstraction has 129 states and 233 transitions. [2022-04-07 21:20:15,490 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:15,490 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 233 transitions. [2022-04-07 21:20:15,491 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2022-04-07 21:20:15,491 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 21:20:15,491 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 21:20:15,491 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2022-04-07 21:20:15,491 INFO L403 AbstractCegarLoop]: === Iteration 5 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 21:20:15,491 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 21:20:15,491 INFO L85 PathProgramCache]: Analyzing trace with hash 65348534, now seen corresponding path program 1 times [2022-04-07 21:20:15,492 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 21:20:15,492 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1852470853] [2022-04-07 21:20:15,492 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 21:20:15,492 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 21:20:15,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:20:15,526 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 21:20:15,527 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:20:15,530 INFO L290 TraceCheckUtils]: 0: Hoare triple {1942#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1936#true} is VALID [2022-04-07 21:20:15,530 INFO L290 TraceCheckUtils]: 1: Hoare triple {1936#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1936#true} is VALID [2022-04-07 21:20:15,530 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1936#true} {1936#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1936#true} is VALID [2022-04-07 21:20:15,530 INFO L272 TraceCheckUtils]: 0: Hoare triple {1936#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1942#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 21:20:15,531 INFO L290 TraceCheckUtils]: 1: Hoare triple {1942#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1936#true} is VALID [2022-04-07 21:20:15,531 INFO L290 TraceCheckUtils]: 2: Hoare triple {1936#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1936#true} is VALID [2022-04-07 21:20:15,531 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1936#true} {1936#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1936#true} is VALID [2022-04-07 21:20:15,531 INFO L272 TraceCheckUtils]: 4: Hoare triple {1936#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1936#true} is VALID [2022-04-07 21:20:15,531 INFO L290 TraceCheckUtils]: 5: Hoare triple {1936#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {1936#true} is VALID [2022-04-07 21:20:15,531 INFO L290 TraceCheckUtils]: 6: Hoare triple {1936#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {1936#true} is VALID [2022-04-07 21:20:15,531 INFO L290 TraceCheckUtils]: 7: Hoare triple {1936#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {1936#true} is VALID [2022-04-07 21:20:15,531 INFO L290 TraceCheckUtils]: 8: Hoare triple {1936#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {1936#true} is VALID [2022-04-07 21:20:15,532 INFO L290 TraceCheckUtils]: 9: Hoare triple {1936#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {1941#(= main_~p2~0 0)} is VALID [2022-04-07 21:20:15,532 INFO L290 TraceCheckUtils]: 10: Hoare triple {1941#(= main_~p2~0 0)} [288] L92-1-->L96-1: Formula: (and (= v_main_~lk3~0_6 1) (not (= v_main_~p3~0_4 0))) InVars {main_~p3~0=v_main_~p3~0_4} OutVars{main_~p3~0=v_main_~p3~0_4, main_~lk3~0=v_main_~lk3~0_6} AuxVars[] AssignedVars[main_~lk3~0] {1941#(= main_~p2~0 0)} is VALID [2022-04-07 21:20:15,532 INFO L290 TraceCheckUtils]: 11: Hoare triple {1941#(= main_~p2~0 0)} [290] L96-1-->L100-1: Formula: (and (not (= v_main_~p4~0_4 0)) (= v_main_~lk4~0_6 1)) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4, main_~lk4~0=v_main_~lk4~0_6} AuxVars[] AssignedVars[main_~lk4~0] {1941#(= main_~p2~0 0)} is VALID [2022-04-07 21:20:15,533 INFO L290 TraceCheckUtils]: 12: Hoare triple {1941#(= main_~p2~0 0)} [292] L100-1-->L104-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {1941#(= main_~p2~0 0)} is VALID [2022-04-07 21:20:15,533 INFO L290 TraceCheckUtils]: 13: Hoare triple {1941#(= main_~p2~0 0)} [294] L104-1-->L108-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {1941#(= main_~p2~0 0)} is VALID [2022-04-07 21:20:15,533 INFO L290 TraceCheckUtils]: 14: Hoare triple {1941#(= main_~p2~0 0)} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {1941#(= main_~p2~0 0)} is VALID [2022-04-07 21:20:15,534 INFO L290 TraceCheckUtils]: 15: Hoare triple {1941#(= main_~p2~0 0)} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {1941#(= main_~p2~0 0)} is VALID [2022-04-07 21:20:15,534 INFO L290 TraceCheckUtils]: 16: Hoare triple {1941#(= main_~p2~0 0)} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {1941#(= main_~p2~0 0)} is VALID [2022-04-07 21:20:15,534 INFO L290 TraceCheckUtils]: 17: Hoare triple {1941#(= main_~p2~0 0)} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {1941#(= main_~p2~0 0)} is VALID [2022-04-07 21:20:15,534 INFO L290 TraceCheckUtils]: 18: Hoare triple {1941#(= main_~p2~0 0)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {1941#(= main_~p2~0 0)} is VALID [2022-04-07 21:20:15,535 INFO L290 TraceCheckUtils]: 19: Hoare triple {1941#(= main_~p2~0 0)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {1941#(= main_~p2~0 0)} is VALID [2022-04-07 21:20:15,535 INFO L290 TraceCheckUtils]: 20: Hoare triple {1941#(= main_~p2~0 0)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {1941#(= main_~p2~0 0)} is VALID [2022-04-07 21:20:15,535 INFO L290 TraceCheckUtils]: 21: Hoare triple {1941#(= main_~p2~0 0)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {1941#(= main_~p2~0 0)} is VALID [2022-04-07 21:20:15,536 INFO L290 TraceCheckUtils]: 22: Hoare triple {1941#(= main_~p2~0 0)} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {1941#(= main_~p2~0 0)} is VALID [2022-04-07 21:20:15,536 INFO L290 TraceCheckUtils]: 23: Hoare triple {1941#(= main_~p2~0 0)} [316] L146-1-->L152: Formula: (not (= v_main_~p2~0_4 0)) InVars {main_~p2~0=v_main_~p2~0_4} OutVars{main_~p2~0=v_main_~p2~0_4} AuxVars[] AssignedVars[] {1937#false} is VALID [2022-04-07 21:20:15,536 INFO L290 TraceCheckUtils]: 24: Hoare triple {1937#false} [320] L152-->L212-1: Formula: (not (= v_main_~lk2~0_4 1)) InVars {main_~lk2~0=v_main_~lk2~0_4} OutVars{main_~lk2~0=v_main_~lk2~0_4} AuxVars[] AssignedVars[] {1937#false} is VALID [2022-04-07 21:20:15,536 INFO L290 TraceCheckUtils]: 25: Hoare triple {1937#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1937#false} is VALID [2022-04-07 21:20:15,536 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 21:20:15,537 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 21:20:15,537 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1852470853] [2022-04-07 21:20:15,537 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1852470853] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 21:20:15,537 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 21:20:15,537 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-07 21:20:15,537 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [654425514] [2022-04-07 21:20:15,537 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 21:20:15,537 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-07 21:20:15,538 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 21:20:15,538 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:15,551 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 26 edges. 26 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:20:15,551 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-07 21:20:15,551 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 21:20:15,552 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-07 21:20:15,552 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-07 21:20:15,552 INFO L87 Difference]: Start difference. First operand 129 states and 233 transitions. Second operand has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:15,744 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:15,744 INFO L93 Difference]: Finished difference Result 185 states and 332 transitions. [2022-04-07 21:20:15,744 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-07 21:20:15,744 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-07 21:20:15,744 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 21:20:15,744 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:15,746 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 175 transitions. [2022-04-07 21:20:15,746 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:15,747 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 175 transitions. [2022-04-07 21:20:15,747 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 175 transitions. [2022-04-07 21:20:15,864 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 175 edges. 175 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:20:15,869 INFO L225 Difference]: With dead ends: 185 [2022-04-07 21:20:15,869 INFO L226 Difference]: Without dead ends: 185 [2022-04-07 21:20:15,869 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-07 21:20:15,870 INFO L913 BasicCegarLoop]: 122 mSDtfsCounter, 202 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 87 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 202 SdHoareTripleChecker+Valid, 129 SdHoareTripleChecker+Invalid, 90 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 87 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 21:20:15,870 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [202 Valid, 129 Invalid, 90 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 87 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-07 21:20:15,871 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 185 states. [2022-04-07 21:20:15,874 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 185 to 183. [2022-04-07 21:20:15,874 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 21:20:15,875 INFO L82 GeneralOperation]: Start isEquivalent. First operand 185 states. Second operand has 183 states, 179 states have (on average 1.8324022346368716) internal successors, (328), 179 states have internal predecessors, (328), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:15,875 INFO L74 IsIncluded]: Start isIncluded. First operand 185 states. Second operand has 183 states, 179 states have (on average 1.8324022346368716) internal successors, (328), 179 states have internal predecessors, (328), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:15,876 INFO L87 Difference]: Start difference. First operand 185 states. Second operand has 183 states, 179 states have (on average 1.8324022346368716) internal successors, (328), 179 states have internal predecessors, (328), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:15,882 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:15,882 INFO L93 Difference]: Finished difference Result 185 states and 332 transitions. [2022-04-07 21:20:15,882 INFO L276 IsEmpty]: Start isEmpty. Operand 185 states and 332 transitions. [2022-04-07 21:20:15,882 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:20:15,882 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:20:15,882 INFO L74 IsIncluded]: Start isIncluded. First operand has 183 states, 179 states have (on average 1.8324022346368716) internal successors, (328), 179 states have internal predecessors, (328), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 185 states. [2022-04-07 21:20:15,883 INFO L87 Difference]: Start difference. First operand has 183 states, 179 states have (on average 1.8324022346368716) internal successors, (328), 179 states have internal predecessors, (328), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 185 states. [2022-04-07 21:20:15,889 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:15,889 INFO L93 Difference]: Finished difference Result 185 states and 332 transitions. [2022-04-07 21:20:15,889 INFO L276 IsEmpty]: Start isEmpty. Operand 185 states and 332 transitions. [2022-04-07 21:20:15,889 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:20:15,889 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:20:15,889 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 21:20:15,889 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 21:20:15,889 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 183 states, 179 states have (on average 1.8324022346368716) internal successors, (328), 179 states have internal predecessors, (328), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:15,895 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 183 states to 183 states and 331 transitions. [2022-04-07 21:20:15,895 INFO L78 Accepts]: Start accepts. Automaton has 183 states and 331 transitions. Word has length 26 [2022-04-07 21:20:15,895 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 21:20:15,895 INFO L478 AbstractCegarLoop]: Abstraction has 183 states and 331 transitions. [2022-04-07 21:20:15,896 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:15,896 INFO L276 IsEmpty]: Start isEmpty. Operand 183 states and 331 transitions. [2022-04-07 21:20:15,896 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2022-04-07 21:20:15,896 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 21:20:15,896 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 21:20:15,896 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2022-04-07 21:20:15,896 INFO L403 AbstractCegarLoop]: === Iteration 6 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 21:20:15,897 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 21:20:15,897 INFO L85 PathProgramCache]: Analyzing trace with hash -1272058172, now seen corresponding path program 1 times [2022-04-07 21:20:15,897 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 21:20:15,897 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [36487121] [2022-04-07 21:20:15,897 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 21:20:15,897 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 21:20:15,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:20:15,928 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 21:20:15,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:20:15,932 INFO L290 TraceCheckUtils]: 0: Hoare triple {2692#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2686#true} is VALID [2022-04-07 21:20:15,932 INFO L290 TraceCheckUtils]: 1: Hoare triple {2686#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2686#true} is VALID [2022-04-07 21:20:15,932 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2686#true} {2686#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2686#true} is VALID [2022-04-07 21:20:15,932 INFO L272 TraceCheckUtils]: 0: Hoare triple {2686#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2692#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 21:20:15,932 INFO L290 TraceCheckUtils]: 1: Hoare triple {2692#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2686#true} is VALID [2022-04-07 21:20:15,933 INFO L290 TraceCheckUtils]: 2: Hoare triple {2686#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2686#true} is VALID [2022-04-07 21:20:15,933 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2686#true} {2686#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2686#true} is VALID [2022-04-07 21:20:15,933 INFO L272 TraceCheckUtils]: 4: Hoare triple {2686#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2686#true} is VALID [2022-04-07 21:20:15,933 INFO L290 TraceCheckUtils]: 5: Hoare triple {2686#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {2686#true} is VALID [2022-04-07 21:20:15,933 INFO L290 TraceCheckUtils]: 6: Hoare triple {2686#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {2686#true} is VALID [2022-04-07 21:20:15,933 INFO L290 TraceCheckUtils]: 7: Hoare triple {2686#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {2686#true} is VALID [2022-04-07 21:20:15,933 INFO L290 TraceCheckUtils]: 8: Hoare triple {2686#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {2686#true} is VALID [2022-04-07 21:20:15,934 INFO L290 TraceCheckUtils]: 9: Hoare triple {2686#true} [286] L88-2-->L92-1: Formula: (and (= v_main_~lk2~0_3 1) (not (= v_main_~p2~0_2 0))) InVars {main_~p2~0=v_main_~p2~0_2} OutVars{main_~lk2~0=v_main_~lk2~0_3, main_~p2~0=v_main_~p2~0_2} AuxVars[] AssignedVars[main_~lk2~0] {2691#(not (= main_~p2~0 0))} is VALID [2022-04-07 21:20:15,934 INFO L290 TraceCheckUtils]: 10: Hoare triple {2691#(not (= main_~p2~0 0))} [288] L92-1-->L96-1: Formula: (and (= v_main_~lk3~0_6 1) (not (= v_main_~p3~0_4 0))) InVars {main_~p3~0=v_main_~p3~0_4} OutVars{main_~p3~0=v_main_~p3~0_4, main_~lk3~0=v_main_~lk3~0_6} AuxVars[] AssignedVars[main_~lk3~0] {2691#(not (= main_~p2~0 0))} is VALID [2022-04-07 21:20:15,934 INFO L290 TraceCheckUtils]: 11: Hoare triple {2691#(not (= main_~p2~0 0))} [290] L96-1-->L100-1: Formula: (and (not (= v_main_~p4~0_4 0)) (= v_main_~lk4~0_6 1)) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4, main_~lk4~0=v_main_~lk4~0_6} AuxVars[] AssignedVars[main_~lk4~0] {2691#(not (= main_~p2~0 0))} is VALID [2022-04-07 21:20:15,934 INFO L290 TraceCheckUtils]: 12: Hoare triple {2691#(not (= main_~p2~0 0))} [292] L100-1-->L104-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {2691#(not (= main_~p2~0 0))} is VALID [2022-04-07 21:20:15,935 INFO L290 TraceCheckUtils]: 13: Hoare triple {2691#(not (= main_~p2~0 0))} [294] L104-1-->L108-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {2691#(not (= main_~p2~0 0))} is VALID [2022-04-07 21:20:15,935 INFO L290 TraceCheckUtils]: 14: Hoare triple {2691#(not (= main_~p2~0 0))} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {2691#(not (= main_~p2~0 0))} is VALID [2022-04-07 21:20:15,935 INFO L290 TraceCheckUtils]: 15: Hoare triple {2691#(not (= main_~p2~0 0))} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {2691#(not (= main_~p2~0 0))} is VALID [2022-04-07 21:20:15,936 INFO L290 TraceCheckUtils]: 16: Hoare triple {2691#(not (= main_~p2~0 0))} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {2691#(not (= main_~p2~0 0))} is VALID [2022-04-07 21:20:15,936 INFO L290 TraceCheckUtils]: 17: Hoare triple {2691#(not (= main_~p2~0 0))} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {2691#(not (= main_~p2~0 0))} is VALID [2022-04-07 21:20:15,936 INFO L290 TraceCheckUtils]: 18: Hoare triple {2691#(not (= main_~p2~0 0))} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {2691#(not (= main_~p2~0 0))} is VALID [2022-04-07 21:20:15,936 INFO L290 TraceCheckUtils]: 19: Hoare triple {2691#(not (= main_~p2~0 0))} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {2691#(not (= main_~p2~0 0))} is VALID [2022-04-07 21:20:15,937 INFO L290 TraceCheckUtils]: 20: Hoare triple {2691#(not (= main_~p2~0 0))} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {2691#(not (= main_~p2~0 0))} is VALID [2022-04-07 21:20:15,937 INFO L290 TraceCheckUtils]: 21: Hoare triple {2691#(not (= main_~p2~0 0))} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {2691#(not (= main_~p2~0 0))} is VALID [2022-04-07 21:20:15,937 INFO L290 TraceCheckUtils]: 22: Hoare triple {2691#(not (= main_~p2~0 0))} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {2691#(not (= main_~p2~0 0))} is VALID [2022-04-07 21:20:15,938 INFO L290 TraceCheckUtils]: 23: Hoare triple {2691#(not (= main_~p2~0 0))} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {2687#false} is VALID [2022-04-07 21:20:15,938 INFO L290 TraceCheckUtils]: 24: Hoare triple {2687#false} [322] L151-1-->L157: Formula: (not (= v_main_~p3~0_1 0)) InVars {main_~p3~0=v_main_~p3~0_1} OutVars{main_~p3~0=v_main_~p3~0_1} AuxVars[] AssignedVars[] {2687#false} is VALID [2022-04-07 21:20:15,938 INFO L290 TraceCheckUtils]: 25: Hoare triple {2687#false} [324] L157-->L212-1: Formula: (not (= v_main_~lk3~0_1 1)) InVars {main_~lk3~0=v_main_~lk3~0_1} OutVars{main_~lk3~0=v_main_~lk3~0_1} AuxVars[] AssignedVars[] {2687#false} is VALID [2022-04-07 21:20:15,938 INFO L290 TraceCheckUtils]: 26: Hoare triple {2687#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2687#false} is VALID [2022-04-07 21:20:15,938 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 21:20:15,938 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 21:20:15,938 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [36487121] [2022-04-07 21:20:15,938 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [36487121] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 21:20:15,939 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 21:20:15,939 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-07 21:20:15,939 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [191282795] [2022-04-07 21:20:15,939 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 21:20:15,939 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-07 21:20:15,939 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 21:20:15,939 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:15,953 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 27 edges. 27 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:20:15,953 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-07 21:20:15,953 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 21:20:15,953 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-07 21:20:15,953 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-07 21:20:15,954 INFO L87 Difference]: Start difference. First operand 183 states and 331 transitions. Second operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:16,149 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:16,150 INFO L93 Difference]: Finished difference Result 187 states and 332 transitions. [2022-04-07 21:20:16,150 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-07 21:20:16,150 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-07 21:20:16,150 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 21:20:16,150 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:16,151 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 174 transitions. [2022-04-07 21:20:16,152 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:16,153 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 174 transitions. [2022-04-07 21:20:16,153 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 174 transitions. [2022-04-07 21:20:16,265 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 174 edges. 174 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:20:16,267 INFO L225 Difference]: With dead ends: 187 [2022-04-07 21:20:16,267 INFO L226 Difference]: Without dead ends: 187 [2022-04-07 21:20:16,268 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-07 21:20:16,268 INFO L913 BasicCegarLoop]: 143 mSDtfsCounter, 182 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 86 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 182 SdHoareTripleChecker+Valid, 150 SdHoareTripleChecker+Invalid, 88 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 86 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 21:20:16,268 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [182 Valid, 150 Invalid, 88 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 86 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-07 21:20:16,269 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 187 states. [2022-04-07 21:20:16,272 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 187 to 185. [2022-04-07 21:20:16,272 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 21:20:16,272 INFO L82 GeneralOperation]: Start isEquivalent. First operand 187 states. Second operand has 185 states, 181 states have (on average 1.8121546961325967) internal successors, (328), 181 states have internal predecessors, (328), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:16,273 INFO L74 IsIncluded]: Start isIncluded. First operand 187 states. Second operand has 185 states, 181 states have (on average 1.8121546961325967) internal successors, (328), 181 states have internal predecessors, (328), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:16,273 INFO L87 Difference]: Start difference. First operand 187 states. Second operand has 185 states, 181 states have (on average 1.8121546961325967) internal successors, (328), 181 states have internal predecessors, (328), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:16,276 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:16,276 INFO L93 Difference]: Finished difference Result 187 states and 332 transitions. [2022-04-07 21:20:16,277 INFO L276 IsEmpty]: Start isEmpty. Operand 187 states and 332 transitions. [2022-04-07 21:20:16,277 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:20:16,277 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:20:16,277 INFO L74 IsIncluded]: Start isIncluded. First operand has 185 states, 181 states have (on average 1.8121546961325967) internal successors, (328), 181 states have internal predecessors, (328), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 187 states. [2022-04-07 21:20:16,278 INFO L87 Difference]: Start difference. First operand has 185 states, 181 states have (on average 1.8121546961325967) internal successors, (328), 181 states have internal predecessors, (328), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 187 states. [2022-04-07 21:20:16,281 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:16,281 INFO L93 Difference]: Finished difference Result 187 states and 332 transitions. [2022-04-07 21:20:16,281 INFO L276 IsEmpty]: Start isEmpty. Operand 187 states and 332 transitions. [2022-04-07 21:20:16,282 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:20:16,282 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:20:16,282 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 21:20:16,282 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 21:20:16,282 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 185 states, 181 states have (on average 1.8121546961325967) internal successors, (328), 181 states have internal predecessors, (328), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:16,285 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 185 states to 185 states and 331 transitions. [2022-04-07 21:20:16,285 INFO L78 Accepts]: Start accepts. Automaton has 185 states and 331 transitions. Word has length 27 [2022-04-07 21:20:16,285 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 21:20:16,285 INFO L478 AbstractCegarLoop]: Abstraction has 185 states and 331 transitions. [2022-04-07 21:20:16,286 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:16,286 INFO L276 IsEmpty]: Start isEmpty. Operand 185 states and 331 transitions. [2022-04-07 21:20:16,286 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2022-04-07 21:20:16,286 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 21:20:16,286 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 21:20:16,286 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2022-04-07 21:20:16,286 INFO L403 AbstractCegarLoop]: === Iteration 7 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 21:20:16,287 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 21:20:16,287 INFO L85 PathProgramCache]: Analyzing trace with hash 2025836771, now seen corresponding path program 1 times [2022-04-07 21:20:16,287 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 21:20:16,287 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [935930236] [2022-04-07 21:20:16,287 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 21:20:16,287 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 21:20:16,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:20:16,338 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 21:20:16,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:20:16,342 INFO L290 TraceCheckUtils]: 0: Hoare triple {3450#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3444#true} is VALID [2022-04-07 21:20:16,342 INFO L290 TraceCheckUtils]: 1: Hoare triple {3444#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3444#true} is VALID [2022-04-07 21:20:16,342 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {3444#true} {3444#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3444#true} is VALID [2022-04-07 21:20:16,342 INFO L272 TraceCheckUtils]: 0: Hoare triple {3444#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3450#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 21:20:16,342 INFO L290 TraceCheckUtils]: 1: Hoare triple {3450#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3444#true} is VALID [2022-04-07 21:20:16,343 INFO L290 TraceCheckUtils]: 2: Hoare triple {3444#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3444#true} is VALID [2022-04-07 21:20:16,343 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3444#true} {3444#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3444#true} is VALID [2022-04-07 21:20:16,343 INFO L272 TraceCheckUtils]: 4: Hoare triple {3444#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3444#true} is VALID [2022-04-07 21:20:16,343 INFO L290 TraceCheckUtils]: 5: Hoare triple {3444#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {3444#true} is VALID [2022-04-07 21:20:16,343 INFO L290 TraceCheckUtils]: 6: Hoare triple {3444#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {3444#true} is VALID [2022-04-07 21:20:16,343 INFO L290 TraceCheckUtils]: 7: Hoare triple {3444#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {3444#true} is VALID [2022-04-07 21:20:16,343 INFO L290 TraceCheckUtils]: 8: Hoare triple {3444#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {3444#true} is VALID [2022-04-07 21:20:16,343 INFO L290 TraceCheckUtils]: 9: Hoare triple {3444#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {3444#true} is VALID [2022-04-07 21:20:16,344 INFO L290 TraceCheckUtils]: 10: Hoare triple {3444#true} [288] L92-1-->L96-1: Formula: (and (= v_main_~lk3~0_6 1) (not (= v_main_~p3~0_4 0))) InVars {main_~p3~0=v_main_~p3~0_4} OutVars{main_~p3~0=v_main_~p3~0_4, main_~lk3~0=v_main_~lk3~0_6} AuxVars[] AssignedVars[main_~lk3~0] {3449#(= main_~lk3~0 1)} is VALID [2022-04-07 21:20:16,344 INFO L290 TraceCheckUtils]: 11: Hoare triple {3449#(= main_~lk3~0 1)} [290] L96-1-->L100-1: Formula: (and (not (= v_main_~p4~0_4 0)) (= v_main_~lk4~0_6 1)) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4, main_~lk4~0=v_main_~lk4~0_6} AuxVars[] AssignedVars[main_~lk4~0] {3449#(= main_~lk3~0 1)} is VALID [2022-04-07 21:20:16,344 INFO L290 TraceCheckUtils]: 12: Hoare triple {3449#(= main_~lk3~0 1)} [292] L100-1-->L104-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {3449#(= main_~lk3~0 1)} is VALID [2022-04-07 21:20:16,345 INFO L290 TraceCheckUtils]: 13: Hoare triple {3449#(= main_~lk3~0 1)} [294] L104-1-->L108-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {3449#(= main_~lk3~0 1)} is VALID [2022-04-07 21:20:16,345 INFO L290 TraceCheckUtils]: 14: Hoare triple {3449#(= main_~lk3~0 1)} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {3449#(= main_~lk3~0 1)} is VALID [2022-04-07 21:20:16,345 INFO L290 TraceCheckUtils]: 15: Hoare triple {3449#(= main_~lk3~0 1)} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {3449#(= main_~lk3~0 1)} is VALID [2022-04-07 21:20:16,346 INFO L290 TraceCheckUtils]: 16: Hoare triple {3449#(= main_~lk3~0 1)} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {3449#(= main_~lk3~0 1)} is VALID [2022-04-07 21:20:16,346 INFO L290 TraceCheckUtils]: 17: Hoare triple {3449#(= main_~lk3~0 1)} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {3449#(= main_~lk3~0 1)} is VALID [2022-04-07 21:20:16,346 INFO L290 TraceCheckUtils]: 18: Hoare triple {3449#(= main_~lk3~0 1)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {3449#(= main_~lk3~0 1)} is VALID [2022-04-07 21:20:16,346 INFO L290 TraceCheckUtils]: 19: Hoare triple {3449#(= main_~lk3~0 1)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {3449#(= main_~lk3~0 1)} is VALID [2022-04-07 21:20:16,347 INFO L290 TraceCheckUtils]: 20: Hoare triple {3449#(= main_~lk3~0 1)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {3449#(= main_~lk3~0 1)} is VALID [2022-04-07 21:20:16,347 INFO L290 TraceCheckUtils]: 21: Hoare triple {3449#(= main_~lk3~0 1)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {3449#(= main_~lk3~0 1)} is VALID [2022-04-07 21:20:16,347 INFO L290 TraceCheckUtils]: 22: Hoare triple {3449#(= main_~lk3~0 1)} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {3449#(= main_~lk3~0 1)} is VALID [2022-04-07 21:20:16,348 INFO L290 TraceCheckUtils]: 23: Hoare triple {3449#(= main_~lk3~0 1)} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {3449#(= main_~lk3~0 1)} is VALID [2022-04-07 21:20:16,348 INFO L290 TraceCheckUtils]: 24: Hoare triple {3449#(= main_~lk3~0 1)} [322] L151-1-->L157: Formula: (not (= v_main_~p3~0_1 0)) InVars {main_~p3~0=v_main_~p3~0_1} OutVars{main_~p3~0=v_main_~p3~0_1} AuxVars[] AssignedVars[] {3449#(= main_~lk3~0 1)} is VALID [2022-04-07 21:20:16,348 INFO L290 TraceCheckUtils]: 25: Hoare triple {3449#(= main_~lk3~0 1)} [324] L157-->L212-1: Formula: (not (= v_main_~lk3~0_1 1)) InVars {main_~lk3~0=v_main_~lk3~0_1} OutVars{main_~lk3~0=v_main_~lk3~0_1} AuxVars[] AssignedVars[] {3445#false} is VALID [2022-04-07 21:20:16,348 INFO L290 TraceCheckUtils]: 26: Hoare triple {3445#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3445#false} is VALID [2022-04-07 21:20:16,348 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 21:20:16,349 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 21:20:16,349 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [935930236] [2022-04-07 21:20:16,349 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [935930236] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 21:20:16,349 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 21:20:16,349 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-07 21:20:16,349 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1285499615] [2022-04-07 21:20:16,349 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 21:20:16,349 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-07 21:20:16,349 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 21:20:16,350 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:16,374 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 27 edges. 27 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:20:16,374 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-07 21:20:16,374 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 21:20:16,374 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-07 21:20:16,374 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-07 21:20:16,374 INFO L87 Difference]: Start difference. First operand 185 states and 331 transitions. Second operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:16,553 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:16,553 INFO L93 Difference]: Finished difference Result 347 states and 628 transitions. [2022-04-07 21:20:16,553 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-07 21:20:16,554 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-07 21:20:16,554 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 21:20:16,554 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:16,555 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 170 transitions. [2022-04-07 21:20:16,555 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:16,556 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 170 transitions. [2022-04-07 21:20:16,556 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 170 transitions. [2022-04-07 21:20:16,662 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 170 edges. 170 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:20:16,667 INFO L225 Difference]: With dead ends: 347 [2022-04-07 21:20:16,667 INFO L226 Difference]: Without dead ends: 347 [2022-04-07 21:20:16,667 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-07 21:20:16,668 INFO L913 BasicCegarLoop]: 93 mSDtfsCounter, 222 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 88 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 222 SdHoareTripleChecker+Valid, 100 SdHoareTripleChecker+Invalid, 90 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 88 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 21:20:16,668 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [222 Valid, 100 Invalid, 90 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 88 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-07 21:20:16,668 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 347 states. [2022-04-07 21:20:16,672 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 347 to 249. [2022-04-07 21:20:16,672 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 21:20:16,672 INFO L82 GeneralOperation]: Start isEquivalent. First operand 347 states. Second operand has 249 states, 245 states have (on average 1.7959183673469388) internal successors, (440), 245 states have internal predecessors, (440), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:16,673 INFO L74 IsIncluded]: Start isIncluded. First operand 347 states. Second operand has 249 states, 245 states have (on average 1.7959183673469388) internal successors, (440), 245 states have internal predecessors, (440), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:16,673 INFO L87 Difference]: Start difference. First operand 347 states. Second operand has 249 states, 245 states have (on average 1.7959183673469388) internal successors, (440), 245 states have internal predecessors, (440), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:16,679 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:16,679 INFO L93 Difference]: Finished difference Result 347 states and 628 transitions. [2022-04-07 21:20:16,679 INFO L276 IsEmpty]: Start isEmpty. Operand 347 states and 628 transitions. [2022-04-07 21:20:16,679 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:20:16,679 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:20:16,680 INFO L74 IsIncluded]: Start isIncluded. First operand has 249 states, 245 states have (on average 1.7959183673469388) internal successors, (440), 245 states have internal predecessors, (440), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 347 states. [2022-04-07 21:20:16,680 INFO L87 Difference]: Start difference. First operand has 249 states, 245 states have (on average 1.7959183673469388) internal successors, (440), 245 states have internal predecessors, (440), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 347 states. [2022-04-07 21:20:16,685 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:16,685 INFO L93 Difference]: Finished difference Result 347 states and 628 transitions. [2022-04-07 21:20:16,685 INFO L276 IsEmpty]: Start isEmpty. Operand 347 states and 628 transitions. [2022-04-07 21:20:16,686 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:20:16,686 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:20:16,686 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 21:20:16,686 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 21:20:16,686 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 249 states, 245 states have (on average 1.7959183673469388) internal successors, (440), 245 states have internal predecessors, (440), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:16,690 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 249 states to 249 states and 443 transitions. [2022-04-07 21:20:16,690 INFO L78 Accepts]: Start accepts. Automaton has 249 states and 443 transitions. Word has length 27 [2022-04-07 21:20:16,690 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 21:20:16,690 INFO L478 AbstractCegarLoop]: Abstraction has 249 states and 443 transitions. [2022-04-07 21:20:16,690 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:16,690 INFO L276 IsEmpty]: Start isEmpty. Operand 249 states and 443 transitions. [2022-04-07 21:20:16,690 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2022-04-07 21:20:16,690 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 21:20:16,691 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 21:20:16,691 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2022-04-07 21:20:16,691 INFO L403 AbstractCegarLoop]: === Iteration 8 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 21:20:16,691 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 21:20:16,691 INFO L85 PathProgramCache]: Analyzing trace with hash -915820828, now seen corresponding path program 1 times [2022-04-07 21:20:16,691 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 21:20:16,691 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [932261149] [2022-04-07 21:20:16,691 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 21:20:16,691 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 21:20:16,706 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:20:16,719 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 21:20:16,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:20:16,722 INFO L290 TraceCheckUtils]: 0: Hoare triple {4752#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4746#true} is VALID [2022-04-07 21:20:16,722 INFO L290 TraceCheckUtils]: 1: Hoare triple {4746#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4746#true} is VALID [2022-04-07 21:20:16,723 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {4746#true} {4746#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4746#true} is VALID [2022-04-07 21:20:16,723 INFO L272 TraceCheckUtils]: 0: Hoare triple {4746#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4752#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 21:20:16,723 INFO L290 TraceCheckUtils]: 1: Hoare triple {4752#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4746#true} is VALID [2022-04-07 21:20:16,723 INFO L290 TraceCheckUtils]: 2: Hoare triple {4746#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4746#true} is VALID [2022-04-07 21:20:16,723 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4746#true} {4746#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4746#true} is VALID [2022-04-07 21:20:16,723 INFO L272 TraceCheckUtils]: 4: Hoare triple {4746#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4746#true} is VALID [2022-04-07 21:20:16,724 INFO L290 TraceCheckUtils]: 5: Hoare triple {4746#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {4746#true} is VALID [2022-04-07 21:20:16,724 INFO L290 TraceCheckUtils]: 6: Hoare triple {4746#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {4746#true} is VALID [2022-04-07 21:20:16,724 INFO L290 TraceCheckUtils]: 7: Hoare triple {4746#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {4746#true} is VALID [2022-04-07 21:20:16,724 INFO L290 TraceCheckUtils]: 8: Hoare triple {4746#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {4746#true} is VALID [2022-04-07 21:20:16,724 INFO L290 TraceCheckUtils]: 9: Hoare triple {4746#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {4746#true} is VALID [2022-04-07 21:20:16,724 INFO L290 TraceCheckUtils]: 10: Hoare triple {4746#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {4751#(= main_~p3~0 0)} is VALID [2022-04-07 21:20:16,725 INFO L290 TraceCheckUtils]: 11: Hoare triple {4751#(= main_~p3~0 0)} [290] L96-1-->L100-1: Formula: (and (not (= v_main_~p4~0_4 0)) (= v_main_~lk4~0_6 1)) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4, main_~lk4~0=v_main_~lk4~0_6} AuxVars[] AssignedVars[main_~lk4~0] {4751#(= main_~p3~0 0)} is VALID [2022-04-07 21:20:16,725 INFO L290 TraceCheckUtils]: 12: Hoare triple {4751#(= main_~p3~0 0)} [292] L100-1-->L104-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {4751#(= main_~p3~0 0)} is VALID [2022-04-07 21:20:16,725 INFO L290 TraceCheckUtils]: 13: Hoare triple {4751#(= main_~p3~0 0)} [294] L104-1-->L108-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {4751#(= main_~p3~0 0)} is VALID [2022-04-07 21:20:16,725 INFO L290 TraceCheckUtils]: 14: Hoare triple {4751#(= main_~p3~0 0)} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {4751#(= main_~p3~0 0)} is VALID [2022-04-07 21:20:16,726 INFO L290 TraceCheckUtils]: 15: Hoare triple {4751#(= main_~p3~0 0)} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {4751#(= main_~p3~0 0)} is VALID [2022-04-07 21:20:16,726 INFO L290 TraceCheckUtils]: 16: Hoare triple {4751#(= main_~p3~0 0)} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {4751#(= main_~p3~0 0)} is VALID [2022-04-07 21:20:16,726 INFO L290 TraceCheckUtils]: 17: Hoare triple {4751#(= main_~p3~0 0)} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {4751#(= main_~p3~0 0)} is VALID [2022-04-07 21:20:16,726 INFO L290 TraceCheckUtils]: 18: Hoare triple {4751#(= main_~p3~0 0)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {4751#(= main_~p3~0 0)} is VALID [2022-04-07 21:20:16,727 INFO L290 TraceCheckUtils]: 19: Hoare triple {4751#(= main_~p3~0 0)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {4751#(= main_~p3~0 0)} is VALID [2022-04-07 21:20:16,727 INFO L290 TraceCheckUtils]: 20: Hoare triple {4751#(= main_~p3~0 0)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {4751#(= main_~p3~0 0)} is VALID [2022-04-07 21:20:16,727 INFO L290 TraceCheckUtils]: 21: Hoare triple {4751#(= main_~p3~0 0)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {4751#(= main_~p3~0 0)} is VALID [2022-04-07 21:20:16,728 INFO L290 TraceCheckUtils]: 22: Hoare triple {4751#(= main_~p3~0 0)} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {4751#(= main_~p3~0 0)} is VALID [2022-04-07 21:20:16,728 INFO L290 TraceCheckUtils]: 23: Hoare triple {4751#(= main_~p3~0 0)} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {4751#(= main_~p3~0 0)} is VALID [2022-04-07 21:20:16,728 INFO L290 TraceCheckUtils]: 24: Hoare triple {4751#(= main_~p3~0 0)} [322] L151-1-->L157: Formula: (not (= v_main_~p3~0_1 0)) InVars {main_~p3~0=v_main_~p3~0_1} OutVars{main_~p3~0=v_main_~p3~0_1} AuxVars[] AssignedVars[] {4747#false} is VALID [2022-04-07 21:20:16,728 INFO L290 TraceCheckUtils]: 25: Hoare triple {4747#false} [324] L157-->L212-1: Formula: (not (= v_main_~lk3~0_1 1)) InVars {main_~lk3~0=v_main_~lk3~0_1} OutVars{main_~lk3~0=v_main_~lk3~0_1} AuxVars[] AssignedVars[] {4747#false} is VALID [2022-04-07 21:20:16,728 INFO L290 TraceCheckUtils]: 26: Hoare triple {4747#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4747#false} is VALID [2022-04-07 21:20:16,729 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 21:20:16,729 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 21:20:16,729 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [932261149] [2022-04-07 21:20:16,729 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [932261149] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 21:20:16,729 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 21:20:16,729 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-07 21:20:16,729 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [267732091] [2022-04-07 21:20:16,729 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 21:20:16,729 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-07 21:20:16,730 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 21:20:16,730 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:16,743 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 27 edges. 27 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:20:16,743 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-07 21:20:16,743 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 21:20:16,743 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-07 21:20:16,744 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-07 21:20:16,744 INFO L87 Difference]: Start difference. First operand 249 states and 443 transitions. Second operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:16,912 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:16,912 INFO L93 Difference]: Finished difference Result 355 states and 628 transitions. [2022-04-07 21:20:16,912 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-07 21:20:16,912 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-07 21:20:16,912 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 21:20:16,912 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:16,913 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 173 transitions. [2022-04-07 21:20:16,913 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:16,914 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 173 transitions. [2022-04-07 21:20:16,914 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 173 transitions. [2022-04-07 21:20:17,035 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 173 edges. 173 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:20:17,039 INFO L225 Difference]: With dead ends: 355 [2022-04-07 21:20:17,039 INFO L226 Difference]: Without dead ends: 355 [2022-04-07 21:20:17,040 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-07 21:20:17,040 INFO L913 BasicCegarLoop]: 124 mSDtfsCounter, 196 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 86 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 196 SdHoareTripleChecker+Valid, 131 SdHoareTripleChecker+Invalid, 89 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 86 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 21:20:17,040 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [196 Valid, 131 Invalid, 89 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 86 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 21:20:17,041 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 355 states. [2022-04-07 21:20:17,045 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 355 to 353. [2022-04-07 21:20:17,045 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 21:20:17,046 INFO L82 GeneralOperation]: Start isEquivalent. First operand 355 states. Second operand has 353 states, 349 states have (on average 1.7879656160458453) internal successors, (624), 349 states have internal predecessors, (624), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:17,046 INFO L74 IsIncluded]: Start isIncluded. First operand 355 states. Second operand has 353 states, 349 states have (on average 1.7879656160458453) internal successors, (624), 349 states have internal predecessors, (624), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:17,047 INFO L87 Difference]: Start difference. First operand 355 states. Second operand has 353 states, 349 states have (on average 1.7879656160458453) internal successors, (624), 349 states have internal predecessors, (624), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:17,052 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:17,053 INFO L93 Difference]: Finished difference Result 355 states and 628 transitions. [2022-04-07 21:20:17,053 INFO L276 IsEmpty]: Start isEmpty. Operand 355 states and 628 transitions. [2022-04-07 21:20:17,053 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:20:17,053 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:20:17,054 INFO L74 IsIncluded]: Start isIncluded. First operand has 353 states, 349 states have (on average 1.7879656160458453) internal successors, (624), 349 states have internal predecessors, (624), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 355 states. [2022-04-07 21:20:17,055 INFO L87 Difference]: Start difference. First operand has 353 states, 349 states have (on average 1.7879656160458453) internal successors, (624), 349 states have internal predecessors, (624), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 355 states. [2022-04-07 21:20:17,061 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:17,061 INFO L93 Difference]: Finished difference Result 355 states and 628 transitions. [2022-04-07 21:20:17,061 INFO L276 IsEmpty]: Start isEmpty. Operand 355 states and 628 transitions. [2022-04-07 21:20:17,061 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:20:17,061 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:20:17,061 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 21:20:17,062 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 21:20:17,062 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 353 states, 349 states have (on average 1.7879656160458453) internal successors, (624), 349 states have internal predecessors, (624), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:17,067 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 353 states to 353 states and 627 transitions. [2022-04-07 21:20:17,067 INFO L78 Accepts]: Start accepts. Automaton has 353 states and 627 transitions. Word has length 27 [2022-04-07 21:20:17,068 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 21:20:17,068 INFO L478 AbstractCegarLoop]: Abstraction has 353 states and 627 transitions. [2022-04-07 21:20:17,068 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:17,068 INFO L276 IsEmpty]: Start isEmpty. Operand 353 states and 627 transitions. [2022-04-07 21:20:17,068 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2022-04-07 21:20:17,068 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 21:20:17,069 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 21:20:17,069 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2022-04-07 21:20:17,069 INFO L403 AbstractCegarLoop]: === Iteration 9 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 21:20:17,069 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 21:20:17,069 INFO L85 PathProgramCache]: Analyzing trace with hash -1623537198, now seen corresponding path program 1 times [2022-04-07 21:20:17,069 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 21:20:17,069 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2114410492] [2022-04-07 21:20:17,069 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 21:20:17,070 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 21:20:17,087 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:20:17,116 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 21:20:17,118 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:20:17,120 INFO L290 TraceCheckUtils]: 0: Hoare triple {6182#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6176#true} is VALID [2022-04-07 21:20:17,120 INFO L290 TraceCheckUtils]: 1: Hoare triple {6176#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6176#true} is VALID [2022-04-07 21:20:17,120 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {6176#true} {6176#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6176#true} is VALID [2022-04-07 21:20:17,121 INFO L272 TraceCheckUtils]: 0: Hoare triple {6176#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6182#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 21:20:17,121 INFO L290 TraceCheckUtils]: 1: Hoare triple {6182#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6176#true} is VALID [2022-04-07 21:20:17,121 INFO L290 TraceCheckUtils]: 2: Hoare triple {6176#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6176#true} is VALID [2022-04-07 21:20:17,121 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6176#true} {6176#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6176#true} is VALID [2022-04-07 21:20:17,121 INFO L272 TraceCheckUtils]: 4: Hoare triple {6176#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6176#true} is VALID [2022-04-07 21:20:17,122 INFO L290 TraceCheckUtils]: 5: Hoare triple {6176#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {6176#true} is VALID [2022-04-07 21:20:17,122 INFO L290 TraceCheckUtils]: 6: Hoare triple {6176#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {6176#true} is VALID [2022-04-07 21:20:17,122 INFO L290 TraceCheckUtils]: 7: Hoare triple {6176#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {6176#true} is VALID [2022-04-07 21:20:17,122 INFO L290 TraceCheckUtils]: 8: Hoare triple {6176#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {6176#true} is VALID [2022-04-07 21:20:17,122 INFO L290 TraceCheckUtils]: 9: Hoare triple {6176#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {6176#true} is VALID [2022-04-07 21:20:17,123 INFO L290 TraceCheckUtils]: 10: Hoare triple {6176#true} [288] L92-1-->L96-1: Formula: (and (= v_main_~lk3~0_6 1) (not (= v_main_~p3~0_4 0))) InVars {main_~p3~0=v_main_~p3~0_4} OutVars{main_~p3~0=v_main_~p3~0_4, main_~lk3~0=v_main_~lk3~0_6} AuxVars[] AssignedVars[main_~lk3~0] {6181#(not (= main_~p3~0 0))} is VALID [2022-04-07 21:20:17,123 INFO L290 TraceCheckUtils]: 11: Hoare triple {6181#(not (= main_~p3~0 0))} [290] L96-1-->L100-1: Formula: (and (not (= v_main_~p4~0_4 0)) (= v_main_~lk4~0_6 1)) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4, main_~lk4~0=v_main_~lk4~0_6} AuxVars[] AssignedVars[main_~lk4~0] {6181#(not (= main_~p3~0 0))} is VALID [2022-04-07 21:20:17,123 INFO L290 TraceCheckUtils]: 12: Hoare triple {6181#(not (= main_~p3~0 0))} [292] L100-1-->L104-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {6181#(not (= main_~p3~0 0))} is VALID [2022-04-07 21:20:17,123 INFO L290 TraceCheckUtils]: 13: Hoare triple {6181#(not (= main_~p3~0 0))} [294] L104-1-->L108-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {6181#(not (= main_~p3~0 0))} is VALID [2022-04-07 21:20:17,124 INFO L290 TraceCheckUtils]: 14: Hoare triple {6181#(not (= main_~p3~0 0))} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {6181#(not (= main_~p3~0 0))} is VALID [2022-04-07 21:20:17,124 INFO L290 TraceCheckUtils]: 15: Hoare triple {6181#(not (= main_~p3~0 0))} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {6181#(not (= main_~p3~0 0))} is VALID [2022-04-07 21:20:17,124 INFO L290 TraceCheckUtils]: 16: Hoare triple {6181#(not (= main_~p3~0 0))} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {6181#(not (= main_~p3~0 0))} is VALID [2022-04-07 21:20:17,125 INFO L290 TraceCheckUtils]: 17: Hoare triple {6181#(not (= main_~p3~0 0))} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {6181#(not (= main_~p3~0 0))} is VALID [2022-04-07 21:20:17,125 INFO L290 TraceCheckUtils]: 18: Hoare triple {6181#(not (= main_~p3~0 0))} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {6181#(not (= main_~p3~0 0))} is VALID [2022-04-07 21:20:17,125 INFO L290 TraceCheckUtils]: 19: Hoare triple {6181#(not (= main_~p3~0 0))} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {6181#(not (= main_~p3~0 0))} is VALID [2022-04-07 21:20:17,126 INFO L290 TraceCheckUtils]: 20: Hoare triple {6181#(not (= main_~p3~0 0))} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {6181#(not (= main_~p3~0 0))} is VALID [2022-04-07 21:20:17,126 INFO L290 TraceCheckUtils]: 21: Hoare triple {6181#(not (= main_~p3~0 0))} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {6181#(not (= main_~p3~0 0))} is VALID [2022-04-07 21:20:17,126 INFO L290 TraceCheckUtils]: 22: Hoare triple {6181#(not (= main_~p3~0 0))} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {6181#(not (= main_~p3~0 0))} is VALID [2022-04-07 21:20:17,127 INFO L290 TraceCheckUtils]: 23: Hoare triple {6181#(not (= main_~p3~0 0))} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {6181#(not (= main_~p3~0 0))} is VALID [2022-04-07 21:20:17,127 INFO L290 TraceCheckUtils]: 24: Hoare triple {6181#(not (= main_~p3~0 0))} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {6177#false} is VALID [2022-04-07 21:20:17,127 INFO L290 TraceCheckUtils]: 25: Hoare triple {6177#false} [326] L156-1-->L162: Formula: (not (= v_main_~p4~0_2 0)) InVars {main_~p4~0=v_main_~p4~0_2} OutVars{main_~p4~0=v_main_~p4~0_2} AuxVars[] AssignedVars[] {6177#false} is VALID [2022-04-07 21:20:17,127 INFO L290 TraceCheckUtils]: 26: Hoare triple {6177#false} [328] L162-->L212-1: Formula: (not (= v_main_~lk4~0_2 1)) InVars {main_~lk4~0=v_main_~lk4~0_2} OutVars{main_~lk4~0=v_main_~lk4~0_2} AuxVars[] AssignedVars[] {6177#false} is VALID [2022-04-07 21:20:17,127 INFO L290 TraceCheckUtils]: 27: Hoare triple {6177#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6177#false} is VALID [2022-04-07 21:20:17,127 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 21:20:17,128 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 21:20:17,128 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2114410492] [2022-04-07 21:20:17,128 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2114410492] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 21:20:17,128 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 21:20:17,128 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-07 21:20:17,128 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [248142135] [2022-04-07 21:20:17,139 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 21:20:17,139 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-07 21:20:17,139 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 21:20:17,140 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:17,154 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 28 edges. 28 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:20:17,154 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-07 21:20:17,154 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 21:20:17,155 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-07 21:20:17,155 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-07 21:20:17,155 INFO L87 Difference]: Start difference. First operand 353 states and 627 transitions. Second operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:17,340 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:17,340 INFO L93 Difference]: Finished difference Result 359 states and 628 transitions. [2022-04-07 21:20:17,340 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-07 21:20:17,340 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-07 21:20:17,340 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 21:20:17,340 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:17,341 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 172 transitions. [2022-04-07 21:20:17,342 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:17,343 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 172 transitions. [2022-04-07 21:20:17,343 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 172 transitions. [2022-04-07 21:20:17,445 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 172 edges. 172 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:20:17,450 INFO L225 Difference]: With dead ends: 359 [2022-04-07 21:20:17,450 INFO L226 Difference]: Without dead ends: 359 [2022-04-07 21:20:17,451 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-07 21:20:17,451 INFO L913 BasicCegarLoop]: 140 mSDtfsCounter, 181 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 85 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 181 SdHoareTripleChecker+Valid, 147 SdHoareTripleChecker+Invalid, 87 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 85 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 21:20:17,451 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [181 Valid, 147 Invalid, 87 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 85 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 21:20:17,452 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 359 states. [2022-04-07 21:20:17,455 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 359 to 357. [2022-04-07 21:20:17,455 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 21:20:17,456 INFO L82 GeneralOperation]: Start isEquivalent. First operand 359 states. Second operand has 357 states, 353 states have (on average 1.7677053824362605) internal successors, (624), 353 states have internal predecessors, (624), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:17,456 INFO L74 IsIncluded]: Start isIncluded. First operand 359 states. Second operand has 357 states, 353 states have (on average 1.7677053824362605) internal successors, (624), 353 states have internal predecessors, (624), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:17,456 INFO L87 Difference]: Start difference. First operand 359 states. Second operand has 357 states, 353 states have (on average 1.7677053824362605) internal successors, (624), 353 states have internal predecessors, (624), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:17,462 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:17,462 INFO L93 Difference]: Finished difference Result 359 states and 628 transitions. [2022-04-07 21:20:17,462 INFO L276 IsEmpty]: Start isEmpty. Operand 359 states and 628 transitions. [2022-04-07 21:20:17,462 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:20:17,462 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:20:17,463 INFO L74 IsIncluded]: Start isIncluded. First operand has 357 states, 353 states have (on average 1.7677053824362605) internal successors, (624), 353 states have internal predecessors, (624), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 359 states. [2022-04-07 21:20:17,463 INFO L87 Difference]: Start difference. First operand has 357 states, 353 states have (on average 1.7677053824362605) internal successors, (624), 353 states have internal predecessors, (624), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 359 states. [2022-04-07 21:20:17,468 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:17,468 INFO L93 Difference]: Finished difference Result 359 states and 628 transitions. [2022-04-07 21:20:17,468 INFO L276 IsEmpty]: Start isEmpty. Operand 359 states and 628 transitions. [2022-04-07 21:20:17,469 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:20:17,469 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:20:17,469 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 21:20:17,469 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 21:20:17,469 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 357 states, 353 states have (on average 1.7677053824362605) internal successors, (624), 353 states have internal predecessors, (624), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:17,474 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 357 states to 357 states and 627 transitions. [2022-04-07 21:20:17,474 INFO L78 Accepts]: Start accepts. Automaton has 357 states and 627 transitions. Word has length 28 [2022-04-07 21:20:17,474 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 21:20:17,474 INFO L478 AbstractCegarLoop]: Abstraction has 357 states and 627 transitions. [2022-04-07 21:20:17,475 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:17,475 INFO L276 IsEmpty]: Start isEmpty. Operand 357 states and 627 transitions. [2022-04-07 21:20:17,475 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2022-04-07 21:20:17,475 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 21:20:17,475 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 21:20:17,475 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2022-04-07 21:20:17,475 INFO L403 AbstractCegarLoop]: === Iteration 10 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 21:20:17,476 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 21:20:17,476 INFO L85 PathProgramCache]: Analyzing trace with hash 1674357745, now seen corresponding path program 1 times [2022-04-07 21:20:17,476 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 21:20:17,476 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1937230545] [2022-04-07 21:20:17,476 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 21:20:17,476 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 21:20:17,488 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:20:17,501 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 21:20:17,502 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:20:17,504 INFO L290 TraceCheckUtils]: 0: Hoare triple {7628#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7622#true} is VALID [2022-04-07 21:20:17,504 INFO L290 TraceCheckUtils]: 1: Hoare triple {7622#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7622#true} is VALID [2022-04-07 21:20:17,504 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {7622#true} {7622#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7622#true} is VALID [2022-04-07 21:20:17,504 INFO L272 TraceCheckUtils]: 0: Hoare triple {7622#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7628#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 21:20:17,505 INFO L290 TraceCheckUtils]: 1: Hoare triple {7628#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7622#true} is VALID [2022-04-07 21:20:17,505 INFO L290 TraceCheckUtils]: 2: Hoare triple {7622#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7622#true} is VALID [2022-04-07 21:20:17,505 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7622#true} {7622#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7622#true} is VALID [2022-04-07 21:20:17,505 INFO L272 TraceCheckUtils]: 4: Hoare triple {7622#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7622#true} is VALID [2022-04-07 21:20:17,505 INFO L290 TraceCheckUtils]: 5: Hoare triple {7622#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {7622#true} is VALID [2022-04-07 21:20:17,505 INFO L290 TraceCheckUtils]: 6: Hoare triple {7622#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {7622#true} is VALID [2022-04-07 21:20:17,505 INFO L290 TraceCheckUtils]: 7: Hoare triple {7622#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {7622#true} is VALID [2022-04-07 21:20:17,505 INFO L290 TraceCheckUtils]: 8: Hoare triple {7622#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {7622#true} is VALID [2022-04-07 21:20:17,505 INFO L290 TraceCheckUtils]: 9: Hoare triple {7622#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {7622#true} is VALID [2022-04-07 21:20:17,505 INFO L290 TraceCheckUtils]: 10: Hoare triple {7622#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {7622#true} is VALID [2022-04-07 21:20:17,506 INFO L290 TraceCheckUtils]: 11: Hoare triple {7622#true} [290] L96-1-->L100-1: Formula: (and (not (= v_main_~p4~0_4 0)) (= v_main_~lk4~0_6 1)) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4, main_~lk4~0=v_main_~lk4~0_6} AuxVars[] AssignedVars[main_~lk4~0] {7627#(= main_~lk4~0 1)} is VALID [2022-04-07 21:20:17,506 INFO L290 TraceCheckUtils]: 12: Hoare triple {7627#(= main_~lk4~0 1)} [292] L100-1-->L104-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {7627#(= main_~lk4~0 1)} is VALID [2022-04-07 21:20:17,506 INFO L290 TraceCheckUtils]: 13: Hoare triple {7627#(= main_~lk4~0 1)} [294] L104-1-->L108-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {7627#(= main_~lk4~0 1)} is VALID [2022-04-07 21:20:17,506 INFO L290 TraceCheckUtils]: 14: Hoare triple {7627#(= main_~lk4~0 1)} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {7627#(= main_~lk4~0 1)} is VALID [2022-04-07 21:20:17,507 INFO L290 TraceCheckUtils]: 15: Hoare triple {7627#(= main_~lk4~0 1)} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {7627#(= main_~lk4~0 1)} is VALID [2022-04-07 21:20:17,507 INFO L290 TraceCheckUtils]: 16: Hoare triple {7627#(= main_~lk4~0 1)} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {7627#(= main_~lk4~0 1)} is VALID [2022-04-07 21:20:17,507 INFO L290 TraceCheckUtils]: 17: Hoare triple {7627#(= main_~lk4~0 1)} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {7627#(= main_~lk4~0 1)} is VALID [2022-04-07 21:20:17,508 INFO L290 TraceCheckUtils]: 18: Hoare triple {7627#(= main_~lk4~0 1)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {7627#(= main_~lk4~0 1)} is VALID [2022-04-07 21:20:17,508 INFO L290 TraceCheckUtils]: 19: Hoare triple {7627#(= main_~lk4~0 1)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {7627#(= main_~lk4~0 1)} is VALID [2022-04-07 21:20:17,508 INFO L290 TraceCheckUtils]: 20: Hoare triple {7627#(= main_~lk4~0 1)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {7627#(= main_~lk4~0 1)} is VALID [2022-04-07 21:20:17,508 INFO L290 TraceCheckUtils]: 21: Hoare triple {7627#(= main_~lk4~0 1)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {7627#(= main_~lk4~0 1)} is VALID [2022-04-07 21:20:17,509 INFO L290 TraceCheckUtils]: 22: Hoare triple {7627#(= main_~lk4~0 1)} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {7627#(= main_~lk4~0 1)} is VALID [2022-04-07 21:20:17,509 INFO L290 TraceCheckUtils]: 23: Hoare triple {7627#(= main_~lk4~0 1)} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {7627#(= main_~lk4~0 1)} is VALID [2022-04-07 21:20:17,509 INFO L290 TraceCheckUtils]: 24: Hoare triple {7627#(= main_~lk4~0 1)} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {7627#(= main_~lk4~0 1)} is VALID [2022-04-07 21:20:17,509 INFO L290 TraceCheckUtils]: 25: Hoare triple {7627#(= main_~lk4~0 1)} [326] L156-1-->L162: Formula: (not (= v_main_~p4~0_2 0)) InVars {main_~p4~0=v_main_~p4~0_2} OutVars{main_~p4~0=v_main_~p4~0_2} AuxVars[] AssignedVars[] {7627#(= main_~lk4~0 1)} is VALID [2022-04-07 21:20:17,510 INFO L290 TraceCheckUtils]: 26: Hoare triple {7627#(= main_~lk4~0 1)} [328] L162-->L212-1: Formula: (not (= v_main_~lk4~0_2 1)) InVars {main_~lk4~0=v_main_~lk4~0_2} OutVars{main_~lk4~0=v_main_~lk4~0_2} AuxVars[] AssignedVars[] {7623#false} is VALID [2022-04-07 21:20:17,510 INFO L290 TraceCheckUtils]: 27: Hoare triple {7623#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7623#false} is VALID [2022-04-07 21:20:17,510 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 21:20:17,510 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 21:20:17,510 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1937230545] [2022-04-07 21:20:17,510 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1937230545] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 21:20:17,510 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 21:20:17,510 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-07 21:20:17,510 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [122743119] [2022-04-07 21:20:17,510 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 21:20:17,511 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-07 21:20:17,511 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 21:20:17,511 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:17,525 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 28 edges. 28 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:20:17,525 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-07 21:20:17,525 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 21:20:17,525 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-07 21:20:17,525 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-07 21:20:17,525 INFO L87 Difference]: Start difference. First operand 357 states and 627 transitions. Second operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:17,716 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:17,717 INFO L93 Difference]: Finished difference Result 667 states and 1184 transitions. [2022-04-07 21:20:17,717 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-07 21:20:17,717 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-07 21:20:17,717 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 21:20:17,717 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:17,718 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 166 transitions. [2022-04-07 21:20:17,718 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:17,719 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 166 transitions. [2022-04-07 21:20:17,719 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 166 transitions. [2022-04-07 21:20:17,830 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 166 edges. 166 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:20:17,843 INFO L225 Difference]: With dead ends: 667 [2022-04-07 21:20:17,843 INFO L226 Difference]: Without dead ends: 667 [2022-04-07 21:20:17,843 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-07 21:20:17,844 INFO L913 BasicCegarLoop]: 92 mSDtfsCounter, 215 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 87 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 215 SdHoareTripleChecker+Valid, 99 SdHoareTripleChecker+Invalid, 89 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 87 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 21:20:17,844 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [215 Valid, 99 Invalid, 89 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 87 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-07 21:20:17,844 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 667 states. [2022-04-07 21:20:17,849 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 667 to 489. [2022-04-07 21:20:17,849 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 21:20:17,850 INFO L82 GeneralOperation]: Start isEquivalent. First operand 667 states. Second operand has 489 states, 485 states have (on average 1.7402061855670103) internal successors, (844), 485 states have internal predecessors, (844), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:17,851 INFO L74 IsIncluded]: Start isIncluded. First operand 667 states. Second operand has 489 states, 485 states have (on average 1.7402061855670103) internal successors, (844), 485 states have internal predecessors, (844), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:17,851 INFO L87 Difference]: Start difference. First operand 667 states. Second operand has 489 states, 485 states have (on average 1.7402061855670103) internal successors, (844), 485 states have internal predecessors, (844), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:17,865 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:17,865 INFO L93 Difference]: Finished difference Result 667 states and 1184 transitions. [2022-04-07 21:20:17,865 INFO L276 IsEmpty]: Start isEmpty. Operand 667 states and 1184 transitions. [2022-04-07 21:20:17,866 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:20:17,866 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:20:17,866 INFO L74 IsIncluded]: Start isIncluded. First operand has 489 states, 485 states have (on average 1.7402061855670103) internal successors, (844), 485 states have internal predecessors, (844), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 667 states. [2022-04-07 21:20:17,867 INFO L87 Difference]: Start difference. First operand has 489 states, 485 states have (on average 1.7402061855670103) internal successors, (844), 485 states have internal predecessors, (844), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 667 states. [2022-04-07 21:20:17,881 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:17,881 INFO L93 Difference]: Finished difference Result 667 states and 1184 transitions. [2022-04-07 21:20:17,881 INFO L276 IsEmpty]: Start isEmpty. Operand 667 states and 1184 transitions. [2022-04-07 21:20:17,882 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:20:17,882 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:20:17,882 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 21:20:17,882 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 21:20:17,882 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 489 states, 485 states have (on average 1.7402061855670103) internal successors, (844), 485 states have internal predecessors, (844), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:17,891 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 489 states to 489 states and 847 transitions. [2022-04-07 21:20:17,891 INFO L78 Accepts]: Start accepts. Automaton has 489 states and 847 transitions. Word has length 28 [2022-04-07 21:20:17,891 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 21:20:17,891 INFO L478 AbstractCegarLoop]: Abstraction has 489 states and 847 transitions. [2022-04-07 21:20:17,891 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:17,891 INFO L276 IsEmpty]: Start isEmpty. Operand 489 states and 847 transitions. [2022-04-07 21:20:17,892 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2022-04-07 21:20:17,892 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 21:20:17,892 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 21:20:17,892 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2022-04-07 21:20:17,892 INFO L403 AbstractCegarLoop]: === Iteration 11 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 21:20:17,892 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 21:20:17,892 INFO L85 PathProgramCache]: Analyzing trace with hash -1267299854, now seen corresponding path program 1 times [2022-04-07 21:20:17,892 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 21:20:17,893 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [916186838] [2022-04-07 21:20:17,893 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 21:20:17,893 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 21:20:17,904 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:20:17,917 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 21:20:17,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:20:17,919 INFO L290 TraceCheckUtils]: 0: Hoare triple {10130#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10124#true} is VALID [2022-04-07 21:20:17,919 INFO L290 TraceCheckUtils]: 1: Hoare triple {10124#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10124#true} is VALID [2022-04-07 21:20:17,920 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {10124#true} {10124#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10124#true} is VALID [2022-04-07 21:20:17,920 INFO L272 TraceCheckUtils]: 0: Hoare triple {10124#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10130#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 21:20:17,920 INFO L290 TraceCheckUtils]: 1: Hoare triple {10130#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10124#true} is VALID [2022-04-07 21:20:17,920 INFO L290 TraceCheckUtils]: 2: Hoare triple {10124#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10124#true} is VALID [2022-04-07 21:20:17,920 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10124#true} {10124#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10124#true} is VALID [2022-04-07 21:20:17,920 INFO L272 TraceCheckUtils]: 4: Hoare triple {10124#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10124#true} is VALID [2022-04-07 21:20:17,921 INFO L290 TraceCheckUtils]: 5: Hoare triple {10124#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {10124#true} is VALID [2022-04-07 21:20:17,921 INFO L290 TraceCheckUtils]: 6: Hoare triple {10124#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {10124#true} is VALID [2022-04-07 21:20:17,921 INFO L290 TraceCheckUtils]: 7: Hoare triple {10124#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {10124#true} is VALID [2022-04-07 21:20:17,921 INFO L290 TraceCheckUtils]: 8: Hoare triple {10124#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {10124#true} is VALID [2022-04-07 21:20:17,921 INFO L290 TraceCheckUtils]: 9: Hoare triple {10124#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {10124#true} is VALID [2022-04-07 21:20:17,921 INFO L290 TraceCheckUtils]: 10: Hoare triple {10124#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {10124#true} is VALID [2022-04-07 21:20:17,921 INFO L290 TraceCheckUtils]: 11: Hoare triple {10124#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {10129#(= main_~p4~0 0)} is VALID [2022-04-07 21:20:17,922 INFO L290 TraceCheckUtils]: 12: Hoare triple {10129#(= main_~p4~0 0)} [292] L100-1-->L104-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {10129#(= main_~p4~0 0)} is VALID [2022-04-07 21:20:17,922 INFO L290 TraceCheckUtils]: 13: Hoare triple {10129#(= main_~p4~0 0)} [294] L104-1-->L108-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {10129#(= main_~p4~0 0)} is VALID [2022-04-07 21:20:17,922 INFO L290 TraceCheckUtils]: 14: Hoare triple {10129#(= main_~p4~0 0)} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {10129#(= main_~p4~0 0)} is VALID [2022-04-07 21:20:17,922 INFO L290 TraceCheckUtils]: 15: Hoare triple {10129#(= main_~p4~0 0)} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {10129#(= main_~p4~0 0)} is VALID [2022-04-07 21:20:17,923 INFO L290 TraceCheckUtils]: 16: Hoare triple {10129#(= main_~p4~0 0)} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {10129#(= main_~p4~0 0)} is VALID [2022-04-07 21:20:17,923 INFO L290 TraceCheckUtils]: 17: Hoare triple {10129#(= main_~p4~0 0)} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {10129#(= main_~p4~0 0)} is VALID [2022-04-07 21:20:17,923 INFO L290 TraceCheckUtils]: 18: Hoare triple {10129#(= main_~p4~0 0)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {10129#(= main_~p4~0 0)} is VALID [2022-04-07 21:20:17,923 INFO L290 TraceCheckUtils]: 19: Hoare triple {10129#(= main_~p4~0 0)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {10129#(= main_~p4~0 0)} is VALID [2022-04-07 21:20:17,924 INFO L290 TraceCheckUtils]: 20: Hoare triple {10129#(= main_~p4~0 0)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {10129#(= main_~p4~0 0)} is VALID [2022-04-07 21:20:17,924 INFO L290 TraceCheckUtils]: 21: Hoare triple {10129#(= main_~p4~0 0)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {10129#(= main_~p4~0 0)} is VALID [2022-04-07 21:20:17,924 INFO L290 TraceCheckUtils]: 22: Hoare triple {10129#(= main_~p4~0 0)} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {10129#(= main_~p4~0 0)} is VALID [2022-04-07 21:20:17,924 INFO L290 TraceCheckUtils]: 23: Hoare triple {10129#(= main_~p4~0 0)} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {10129#(= main_~p4~0 0)} is VALID [2022-04-07 21:20:17,925 INFO L290 TraceCheckUtils]: 24: Hoare triple {10129#(= main_~p4~0 0)} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {10129#(= main_~p4~0 0)} is VALID [2022-04-07 21:20:17,925 INFO L290 TraceCheckUtils]: 25: Hoare triple {10129#(= main_~p4~0 0)} [326] L156-1-->L162: Formula: (not (= v_main_~p4~0_2 0)) InVars {main_~p4~0=v_main_~p4~0_2} OutVars{main_~p4~0=v_main_~p4~0_2} AuxVars[] AssignedVars[] {10125#false} is VALID [2022-04-07 21:20:17,925 INFO L290 TraceCheckUtils]: 26: Hoare triple {10125#false} [328] L162-->L212-1: Formula: (not (= v_main_~lk4~0_2 1)) InVars {main_~lk4~0=v_main_~lk4~0_2} OutVars{main_~lk4~0=v_main_~lk4~0_2} AuxVars[] AssignedVars[] {10125#false} is VALID [2022-04-07 21:20:17,925 INFO L290 TraceCheckUtils]: 27: Hoare triple {10125#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10125#false} is VALID [2022-04-07 21:20:17,925 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 21:20:17,925 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 21:20:17,925 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [916186838] [2022-04-07 21:20:17,926 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [916186838] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 21:20:17,926 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 21:20:17,926 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-07 21:20:17,926 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1969288218] [2022-04-07 21:20:17,926 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 21:20:17,926 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-07 21:20:17,926 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 21:20:17,926 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:17,940 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 28 edges. 28 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:20:17,940 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-07 21:20:17,940 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 21:20:17,941 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-07 21:20:17,941 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-07 21:20:17,941 INFO L87 Difference]: Start difference. First operand 489 states and 847 transitions. Second operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:18,144 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:18,144 INFO L93 Difference]: Finished difference Result 691 states and 1192 transitions. [2022-04-07 21:20:18,144 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-07 21:20:18,144 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-07 21:20:18,145 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 21:20:18,145 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:18,145 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 171 transitions. [2022-04-07 21:20:18,146 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:18,146 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 171 transitions. [2022-04-07 21:20:18,146 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 171 transitions. [2022-04-07 21:20:18,246 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 171 edges. 171 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:20:18,260 INFO L225 Difference]: With dead ends: 691 [2022-04-07 21:20:18,260 INFO L226 Difference]: Without dead ends: 691 [2022-04-07 21:20:18,260 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-07 21:20:18,261 INFO L913 BasicCegarLoop]: 126 mSDtfsCounter, 190 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 85 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 190 SdHoareTripleChecker+Valid, 133 SdHoareTripleChecker+Invalid, 88 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 85 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 21:20:18,261 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [190 Valid, 133 Invalid, 88 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 85 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 21:20:18,261 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 691 states. [2022-04-07 21:20:18,267 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 691 to 689. [2022-04-07 21:20:18,267 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 21:20:18,268 INFO L82 GeneralOperation]: Start isEquivalent. First operand 691 states. Second operand has 689 states, 685 states have (on average 1.7343065693430657) internal successors, (1188), 685 states have internal predecessors, (1188), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:18,269 INFO L74 IsIncluded]: Start isIncluded. First operand 691 states. Second operand has 689 states, 685 states have (on average 1.7343065693430657) internal successors, (1188), 685 states have internal predecessors, (1188), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:18,269 INFO L87 Difference]: Start difference. First operand 691 states. Second operand has 689 states, 685 states have (on average 1.7343065693430657) internal successors, (1188), 685 states have internal predecessors, (1188), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:18,286 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:18,286 INFO L93 Difference]: Finished difference Result 691 states and 1192 transitions. [2022-04-07 21:20:18,286 INFO L276 IsEmpty]: Start isEmpty. Operand 691 states and 1192 transitions. [2022-04-07 21:20:18,286 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:20:18,287 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:20:18,287 INFO L74 IsIncluded]: Start isIncluded. First operand has 689 states, 685 states have (on average 1.7343065693430657) internal successors, (1188), 685 states have internal predecessors, (1188), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 691 states. [2022-04-07 21:20:18,288 INFO L87 Difference]: Start difference. First operand has 689 states, 685 states have (on average 1.7343065693430657) internal successors, (1188), 685 states have internal predecessors, (1188), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 691 states. [2022-04-07 21:20:18,303 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:18,303 INFO L93 Difference]: Finished difference Result 691 states and 1192 transitions. [2022-04-07 21:20:18,303 INFO L276 IsEmpty]: Start isEmpty. Operand 691 states and 1192 transitions. [2022-04-07 21:20:18,304 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:20:18,304 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:20:18,304 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 21:20:18,304 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 21:20:18,305 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 689 states, 685 states have (on average 1.7343065693430657) internal successors, (1188), 685 states have internal predecessors, (1188), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:18,319 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 689 states to 689 states and 1191 transitions. [2022-04-07 21:20:18,319 INFO L78 Accepts]: Start accepts. Automaton has 689 states and 1191 transitions. Word has length 28 [2022-04-07 21:20:18,319 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 21:20:18,319 INFO L478 AbstractCegarLoop]: Abstraction has 689 states and 1191 transitions. [2022-04-07 21:20:18,319 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:18,319 INFO L276 IsEmpty]: Start isEmpty. Operand 689 states and 1191 transitions. [2022-04-07 21:20:18,320 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2022-04-07 21:20:18,320 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 21:20:18,320 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 21:20:18,320 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2022-04-07 21:20:18,320 INFO L403 AbstractCegarLoop]: === Iteration 12 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 21:20:18,320 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 21:20:18,321 INFO L85 PathProgramCache]: Analyzing trace with hash 365515008, now seen corresponding path program 1 times [2022-04-07 21:20:18,321 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 21:20:18,321 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2003491346] [2022-04-07 21:20:18,321 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 21:20:18,321 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 21:20:18,337 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:20:18,354 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 21:20:18,355 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:20:18,358 INFO L290 TraceCheckUtils]: 0: Hoare triple {12904#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {12898#true} is VALID [2022-04-07 21:20:18,358 INFO L290 TraceCheckUtils]: 1: Hoare triple {12898#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12898#true} is VALID [2022-04-07 21:20:18,358 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {12898#true} {12898#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12898#true} is VALID [2022-04-07 21:20:18,359 INFO L272 TraceCheckUtils]: 0: Hoare triple {12898#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12904#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 21:20:18,359 INFO L290 TraceCheckUtils]: 1: Hoare triple {12904#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {12898#true} is VALID [2022-04-07 21:20:18,359 INFO L290 TraceCheckUtils]: 2: Hoare triple {12898#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12898#true} is VALID [2022-04-07 21:20:18,359 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12898#true} {12898#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12898#true} is VALID [2022-04-07 21:20:18,359 INFO L272 TraceCheckUtils]: 4: Hoare triple {12898#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12898#true} is VALID [2022-04-07 21:20:18,359 INFO L290 TraceCheckUtils]: 5: Hoare triple {12898#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {12898#true} is VALID [2022-04-07 21:20:18,359 INFO L290 TraceCheckUtils]: 6: Hoare triple {12898#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {12898#true} is VALID [2022-04-07 21:20:18,359 INFO L290 TraceCheckUtils]: 7: Hoare triple {12898#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {12898#true} is VALID [2022-04-07 21:20:18,364 INFO L290 TraceCheckUtils]: 8: Hoare triple {12898#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {12898#true} is VALID [2022-04-07 21:20:18,364 INFO L290 TraceCheckUtils]: 9: Hoare triple {12898#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {12898#true} is VALID [2022-04-07 21:20:18,364 INFO L290 TraceCheckUtils]: 10: Hoare triple {12898#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {12898#true} is VALID [2022-04-07 21:20:18,364 INFO L290 TraceCheckUtils]: 11: Hoare triple {12898#true} [290] L96-1-->L100-1: Formula: (and (not (= v_main_~p4~0_4 0)) (= v_main_~lk4~0_6 1)) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4, main_~lk4~0=v_main_~lk4~0_6} AuxVars[] AssignedVars[main_~lk4~0] {12903#(not (= main_~p4~0 0))} is VALID [2022-04-07 21:20:18,364 INFO L290 TraceCheckUtils]: 12: Hoare triple {12903#(not (= main_~p4~0 0))} [292] L100-1-->L104-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {12903#(not (= main_~p4~0 0))} is VALID [2022-04-07 21:20:18,365 INFO L290 TraceCheckUtils]: 13: Hoare triple {12903#(not (= main_~p4~0 0))} [294] L104-1-->L108-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {12903#(not (= main_~p4~0 0))} is VALID [2022-04-07 21:20:18,365 INFO L290 TraceCheckUtils]: 14: Hoare triple {12903#(not (= main_~p4~0 0))} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {12903#(not (= main_~p4~0 0))} is VALID [2022-04-07 21:20:18,365 INFO L290 TraceCheckUtils]: 15: Hoare triple {12903#(not (= main_~p4~0 0))} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {12903#(not (= main_~p4~0 0))} is VALID [2022-04-07 21:20:18,365 INFO L290 TraceCheckUtils]: 16: Hoare triple {12903#(not (= main_~p4~0 0))} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {12903#(not (= main_~p4~0 0))} is VALID [2022-04-07 21:20:18,366 INFO L290 TraceCheckUtils]: 17: Hoare triple {12903#(not (= main_~p4~0 0))} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {12903#(not (= main_~p4~0 0))} is VALID [2022-04-07 21:20:18,366 INFO L290 TraceCheckUtils]: 18: Hoare triple {12903#(not (= main_~p4~0 0))} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {12903#(not (= main_~p4~0 0))} is VALID [2022-04-07 21:20:18,366 INFO L290 TraceCheckUtils]: 19: Hoare triple {12903#(not (= main_~p4~0 0))} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {12903#(not (= main_~p4~0 0))} is VALID [2022-04-07 21:20:18,367 INFO L290 TraceCheckUtils]: 20: Hoare triple {12903#(not (= main_~p4~0 0))} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {12903#(not (= main_~p4~0 0))} is VALID [2022-04-07 21:20:18,367 INFO L290 TraceCheckUtils]: 21: Hoare triple {12903#(not (= main_~p4~0 0))} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {12903#(not (= main_~p4~0 0))} is VALID [2022-04-07 21:20:18,367 INFO L290 TraceCheckUtils]: 22: Hoare triple {12903#(not (= main_~p4~0 0))} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {12903#(not (= main_~p4~0 0))} is VALID [2022-04-07 21:20:18,367 INFO L290 TraceCheckUtils]: 23: Hoare triple {12903#(not (= main_~p4~0 0))} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {12903#(not (= main_~p4~0 0))} is VALID [2022-04-07 21:20:18,368 INFO L290 TraceCheckUtils]: 24: Hoare triple {12903#(not (= main_~p4~0 0))} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {12903#(not (= main_~p4~0 0))} is VALID [2022-04-07 21:20:18,368 INFO L290 TraceCheckUtils]: 25: Hoare triple {12903#(not (= main_~p4~0 0))} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {12899#false} is VALID [2022-04-07 21:20:18,368 INFO L290 TraceCheckUtils]: 26: Hoare triple {12899#false} [330] L161-1-->L167: Formula: (not (= v_main_~p5~0_2 0)) InVars {main_~p5~0=v_main_~p5~0_2} OutVars{main_~p5~0=v_main_~p5~0_2} AuxVars[] AssignedVars[] {12899#false} is VALID [2022-04-07 21:20:18,368 INFO L290 TraceCheckUtils]: 27: Hoare triple {12899#false} [332] L167-->L212-1: Formula: (not (= v_main_~lk5~0_3 1)) InVars {main_~lk5~0=v_main_~lk5~0_3} OutVars{main_~lk5~0=v_main_~lk5~0_3} AuxVars[] AssignedVars[] {12899#false} is VALID [2022-04-07 21:20:18,368 INFO L290 TraceCheckUtils]: 28: Hoare triple {12899#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12899#false} is VALID [2022-04-07 21:20:18,368 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 21:20:18,369 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 21:20:18,369 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2003491346] [2022-04-07 21:20:18,369 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2003491346] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 21:20:18,369 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 21:20:18,369 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-07 21:20:18,369 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1014500875] [2022-04-07 21:20:18,369 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 21:20:18,369 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-07 21:20:18,369 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 21:20:18,370 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:18,384 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 29 edges. 29 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:20:18,384 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-07 21:20:18,384 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 21:20:18,384 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-07 21:20:18,385 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-07 21:20:18,385 INFO L87 Difference]: Start difference. First operand 689 states and 1191 transitions. Second operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:18,562 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:18,563 INFO L93 Difference]: Finished difference Result 699 states and 1192 transitions. [2022-04-07 21:20:18,563 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-07 21:20:18,563 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-07 21:20:18,563 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 21:20:18,563 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:18,564 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 170 transitions. [2022-04-07 21:20:18,564 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:18,565 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 170 transitions. [2022-04-07 21:20:18,565 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 170 transitions. [2022-04-07 21:20:18,669 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 170 edges. 170 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:20:18,683 INFO L225 Difference]: With dead ends: 699 [2022-04-07 21:20:18,683 INFO L226 Difference]: Without dead ends: 699 [2022-04-07 21:20:18,683 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-07 21:20:18,684 INFO L913 BasicCegarLoop]: 137 mSDtfsCounter, 180 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 84 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 180 SdHoareTripleChecker+Valid, 144 SdHoareTripleChecker+Invalid, 86 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 84 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 21:20:18,684 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [180 Valid, 144 Invalid, 86 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 84 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-07 21:20:18,684 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 699 states. [2022-04-07 21:20:18,690 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 699 to 697. [2022-04-07 21:20:18,690 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 21:20:18,691 INFO L82 GeneralOperation]: Start isEquivalent. First operand 699 states. Second operand has 697 states, 693 states have (on average 1.7142857142857142) internal successors, (1188), 693 states have internal predecessors, (1188), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:18,692 INFO L74 IsIncluded]: Start isIncluded. First operand 699 states. Second operand has 697 states, 693 states have (on average 1.7142857142857142) internal successors, (1188), 693 states have internal predecessors, (1188), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:18,692 INFO L87 Difference]: Start difference. First operand 699 states. Second operand has 697 states, 693 states have (on average 1.7142857142857142) internal successors, (1188), 693 states have internal predecessors, (1188), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:18,707 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:18,707 INFO L93 Difference]: Finished difference Result 699 states and 1192 transitions. [2022-04-07 21:20:18,707 INFO L276 IsEmpty]: Start isEmpty. Operand 699 states and 1192 transitions. [2022-04-07 21:20:18,708 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:20:18,708 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:20:18,708 INFO L74 IsIncluded]: Start isIncluded. First operand has 697 states, 693 states have (on average 1.7142857142857142) internal successors, (1188), 693 states have internal predecessors, (1188), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 699 states. [2022-04-07 21:20:18,709 INFO L87 Difference]: Start difference. First operand has 697 states, 693 states have (on average 1.7142857142857142) internal successors, (1188), 693 states have internal predecessors, (1188), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 699 states. [2022-04-07 21:20:18,724 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:18,724 INFO L93 Difference]: Finished difference Result 699 states and 1192 transitions. [2022-04-07 21:20:18,724 INFO L276 IsEmpty]: Start isEmpty. Operand 699 states and 1192 transitions. [2022-04-07 21:20:18,725 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:20:18,725 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:20:18,725 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 21:20:18,726 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 21:20:18,726 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 697 states, 693 states have (on average 1.7142857142857142) internal successors, (1188), 693 states have internal predecessors, (1188), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:18,741 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 697 states to 697 states and 1191 transitions. [2022-04-07 21:20:18,741 INFO L78 Accepts]: Start accepts. Automaton has 697 states and 1191 transitions. Word has length 29 [2022-04-07 21:20:18,741 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 21:20:18,741 INFO L478 AbstractCegarLoop]: Abstraction has 697 states and 1191 transitions. [2022-04-07 21:20:18,741 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:18,741 INFO L276 IsEmpty]: Start isEmpty. Operand 697 states and 1191 transitions. [2022-04-07 21:20:18,742 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2022-04-07 21:20:18,742 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 21:20:18,742 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 21:20:18,742 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2022-04-07 21:20:18,742 INFO L403 AbstractCegarLoop]: === Iteration 13 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 21:20:18,742 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 21:20:18,742 INFO L85 PathProgramCache]: Analyzing trace with hash -631557345, now seen corresponding path program 1 times [2022-04-07 21:20:18,743 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 21:20:18,743 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [913401869] [2022-04-07 21:20:18,743 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 21:20:18,743 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 21:20:18,764 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:20:18,782 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 21:20:18,786 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:20:18,789 INFO L290 TraceCheckUtils]: 0: Hoare triple {15710#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {15704#true} is VALID [2022-04-07 21:20:18,789 INFO L290 TraceCheckUtils]: 1: Hoare triple {15704#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15704#true} is VALID [2022-04-07 21:20:18,789 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {15704#true} {15704#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15704#true} is VALID [2022-04-07 21:20:18,789 INFO L272 TraceCheckUtils]: 0: Hoare triple {15704#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15710#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 21:20:18,789 INFO L290 TraceCheckUtils]: 1: Hoare triple {15710#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {15704#true} is VALID [2022-04-07 21:20:18,790 INFO L290 TraceCheckUtils]: 2: Hoare triple {15704#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15704#true} is VALID [2022-04-07 21:20:18,790 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15704#true} {15704#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15704#true} is VALID [2022-04-07 21:20:18,790 INFO L272 TraceCheckUtils]: 4: Hoare triple {15704#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15704#true} is VALID [2022-04-07 21:20:18,790 INFO L290 TraceCheckUtils]: 5: Hoare triple {15704#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {15704#true} is VALID [2022-04-07 21:20:18,790 INFO L290 TraceCheckUtils]: 6: Hoare triple {15704#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {15704#true} is VALID [2022-04-07 21:20:18,790 INFO L290 TraceCheckUtils]: 7: Hoare triple {15704#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {15704#true} is VALID [2022-04-07 21:20:18,790 INFO L290 TraceCheckUtils]: 8: Hoare triple {15704#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {15704#true} is VALID [2022-04-07 21:20:18,790 INFO L290 TraceCheckUtils]: 9: Hoare triple {15704#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {15704#true} is VALID [2022-04-07 21:20:18,790 INFO L290 TraceCheckUtils]: 10: Hoare triple {15704#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {15704#true} is VALID [2022-04-07 21:20:18,790 INFO L290 TraceCheckUtils]: 11: Hoare triple {15704#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {15704#true} is VALID [2022-04-07 21:20:18,791 INFO L290 TraceCheckUtils]: 12: Hoare triple {15704#true} [292] L100-1-->L104-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {15709#(= main_~lk5~0 1)} is VALID [2022-04-07 21:20:18,792 INFO L290 TraceCheckUtils]: 13: Hoare triple {15709#(= main_~lk5~0 1)} [294] L104-1-->L108-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {15709#(= main_~lk5~0 1)} is VALID [2022-04-07 21:20:18,793 INFO L290 TraceCheckUtils]: 14: Hoare triple {15709#(= main_~lk5~0 1)} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {15709#(= main_~lk5~0 1)} is VALID [2022-04-07 21:20:18,794 INFO L290 TraceCheckUtils]: 15: Hoare triple {15709#(= main_~lk5~0 1)} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {15709#(= main_~lk5~0 1)} is VALID [2022-04-07 21:20:18,800 INFO L290 TraceCheckUtils]: 16: Hoare triple {15709#(= main_~lk5~0 1)} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {15709#(= main_~lk5~0 1)} is VALID [2022-04-07 21:20:18,800 INFO L290 TraceCheckUtils]: 17: Hoare triple {15709#(= main_~lk5~0 1)} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {15709#(= main_~lk5~0 1)} is VALID [2022-04-07 21:20:18,801 INFO L290 TraceCheckUtils]: 18: Hoare triple {15709#(= main_~lk5~0 1)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {15709#(= main_~lk5~0 1)} is VALID [2022-04-07 21:20:18,801 INFO L290 TraceCheckUtils]: 19: Hoare triple {15709#(= main_~lk5~0 1)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {15709#(= main_~lk5~0 1)} is VALID [2022-04-07 21:20:18,801 INFO L290 TraceCheckUtils]: 20: Hoare triple {15709#(= main_~lk5~0 1)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {15709#(= main_~lk5~0 1)} is VALID [2022-04-07 21:20:18,802 INFO L290 TraceCheckUtils]: 21: Hoare triple {15709#(= main_~lk5~0 1)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {15709#(= main_~lk5~0 1)} is VALID [2022-04-07 21:20:18,803 INFO L290 TraceCheckUtils]: 22: Hoare triple {15709#(= main_~lk5~0 1)} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {15709#(= main_~lk5~0 1)} is VALID [2022-04-07 21:20:18,803 INFO L290 TraceCheckUtils]: 23: Hoare triple {15709#(= main_~lk5~0 1)} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {15709#(= main_~lk5~0 1)} is VALID [2022-04-07 21:20:18,803 INFO L290 TraceCheckUtils]: 24: Hoare triple {15709#(= main_~lk5~0 1)} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {15709#(= main_~lk5~0 1)} is VALID [2022-04-07 21:20:18,804 INFO L290 TraceCheckUtils]: 25: Hoare triple {15709#(= main_~lk5~0 1)} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {15709#(= main_~lk5~0 1)} is VALID [2022-04-07 21:20:18,804 INFO L290 TraceCheckUtils]: 26: Hoare triple {15709#(= main_~lk5~0 1)} [330] L161-1-->L167: Formula: (not (= v_main_~p5~0_2 0)) InVars {main_~p5~0=v_main_~p5~0_2} OutVars{main_~p5~0=v_main_~p5~0_2} AuxVars[] AssignedVars[] {15709#(= main_~lk5~0 1)} is VALID [2022-04-07 21:20:18,804 INFO L290 TraceCheckUtils]: 27: Hoare triple {15709#(= main_~lk5~0 1)} [332] L167-->L212-1: Formula: (not (= v_main_~lk5~0_3 1)) InVars {main_~lk5~0=v_main_~lk5~0_3} OutVars{main_~lk5~0=v_main_~lk5~0_3} AuxVars[] AssignedVars[] {15705#false} is VALID [2022-04-07 21:20:18,804 INFO L290 TraceCheckUtils]: 28: Hoare triple {15705#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15705#false} is VALID [2022-04-07 21:20:18,805 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 21:20:18,805 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 21:20:18,805 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [913401869] [2022-04-07 21:20:18,805 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [913401869] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 21:20:18,805 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 21:20:18,805 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-07 21:20:18,805 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1743249332] [2022-04-07 21:20:18,805 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 21:20:18,806 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-07 21:20:18,806 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 21:20:18,806 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:18,820 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 29 edges. 29 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:20:18,820 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-07 21:20:18,820 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 21:20:18,821 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-07 21:20:18,821 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-07 21:20:18,821 INFO L87 Difference]: Start difference. First operand 697 states and 1191 transitions. Second operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:19,012 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:19,013 INFO L93 Difference]: Finished difference Result 1291 states and 2232 transitions. [2022-04-07 21:20:19,013 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-07 21:20:19,013 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-07 21:20:19,013 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 21:20:19,013 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:19,014 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 162 transitions. [2022-04-07 21:20:19,014 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:19,015 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 162 transitions. [2022-04-07 21:20:19,015 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 162 transitions. [2022-04-07 21:20:19,144 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 162 edges. 162 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:20:19,220 INFO L225 Difference]: With dead ends: 1291 [2022-04-07 21:20:19,220 INFO L226 Difference]: Without dead ends: 1291 [2022-04-07 21:20:19,220 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-07 21:20:19,221 INFO L913 BasicCegarLoop]: 91 mSDtfsCounter, 208 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 86 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 208 SdHoareTripleChecker+Valid, 98 SdHoareTripleChecker+Invalid, 88 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 86 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 21:20:19,232 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [208 Valid, 98 Invalid, 88 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 86 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 21:20:19,233 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1291 states. [2022-04-07 21:20:19,242 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1291 to 969. [2022-04-07 21:20:19,242 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 21:20:19,243 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1291 states. Second operand has 969 states, 965 states have (on average 1.6787564766839378) internal successors, (1620), 965 states have internal predecessors, (1620), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:19,244 INFO L74 IsIncluded]: Start isIncluded. First operand 1291 states. Second operand has 969 states, 965 states have (on average 1.6787564766839378) internal successors, (1620), 965 states have internal predecessors, (1620), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:19,245 INFO L87 Difference]: Start difference. First operand 1291 states. Second operand has 969 states, 965 states have (on average 1.6787564766839378) internal successors, (1620), 965 states have internal predecessors, (1620), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:19,306 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:19,306 INFO L93 Difference]: Finished difference Result 1291 states and 2232 transitions. [2022-04-07 21:20:19,306 INFO L276 IsEmpty]: Start isEmpty. Operand 1291 states and 2232 transitions. [2022-04-07 21:20:19,307 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:20:19,307 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:20:19,309 INFO L74 IsIncluded]: Start isIncluded. First operand has 969 states, 965 states have (on average 1.6787564766839378) internal successors, (1620), 965 states have internal predecessors, (1620), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 1291 states. [2022-04-07 21:20:19,309 INFO L87 Difference]: Start difference. First operand has 969 states, 965 states have (on average 1.6787564766839378) internal successors, (1620), 965 states have internal predecessors, (1620), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 1291 states. [2022-04-07 21:20:19,353 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:19,353 INFO L93 Difference]: Finished difference Result 1291 states and 2232 transitions. [2022-04-07 21:20:19,353 INFO L276 IsEmpty]: Start isEmpty. Operand 1291 states and 2232 transitions. [2022-04-07 21:20:19,354 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:20:19,354 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:20:19,354 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 21:20:19,354 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 21:20:19,355 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 969 states, 965 states have (on average 1.6787564766839378) internal successors, (1620), 965 states have internal predecessors, (1620), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:19,381 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 969 states to 969 states and 1623 transitions. [2022-04-07 21:20:19,381 INFO L78 Accepts]: Start accepts. Automaton has 969 states and 1623 transitions. Word has length 29 [2022-04-07 21:20:19,381 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 21:20:19,382 INFO L478 AbstractCegarLoop]: Abstraction has 969 states and 1623 transitions. [2022-04-07 21:20:19,382 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:19,382 INFO L276 IsEmpty]: Start isEmpty. Operand 969 states and 1623 transitions. [2022-04-07 21:20:19,383 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2022-04-07 21:20:19,383 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 21:20:19,383 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 21:20:19,383 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2022-04-07 21:20:19,383 INFO L403 AbstractCegarLoop]: === Iteration 14 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 21:20:19,383 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 21:20:19,383 INFO L85 PathProgramCache]: Analyzing trace with hash 721752352, now seen corresponding path program 1 times [2022-04-07 21:20:19,383 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 21:20:19,383 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [521194483] [2022-04-07 21:20:19,383 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 21:20:19,384 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 21:20:19,399 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:20:19,416 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 21:20:19,417 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:20:19,419 INFO L290 TraceCheckUtils]: 0: Hoare triple {20564#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {20558#true} is VALID [2022-04-07 21:20:19,419 INFO L290 TraceCheckUtils]: 1: Hoare triple {20558#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20558#true} is VALID [2022-04-07 21:20:19,419 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {20558#true} {20558#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20558#true} is VALID [2022-04-07 21:20:19,419 INFO L272 TraceCheckUtils]: 0: Hoare triple {20558#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20564#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 21:20:19,419 INFO L290 TraceCheckUtils]: 1: Hoare triple {20564#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {20558#true} is VALID [2022-04-07 21:20:19,419 INFO L290 TraceCheckUtils]: 2: Hoare triple {20558#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20558#true} is VALID [2022-04-07 21:20:19,420 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {20558#true} {20558#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20558#true} is VALID [2022-04-07 21:20:19,420 INFO L272 TraceCheckUtils]: 4: Hoare triple {20558#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20558#true} is VALID [2022-04-07 21:20:19,420 INFO L290 TraceCheckUtils]: 5: Hoare triple {20558#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {20558#true} is VALID [2022-04-07 21:20:19,420 INFO L290 TraceCheckUtils]: 6: Hoare triple {20558#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {20558#true} is VALID [2022-04-07 21:20:19,420 INFO L290 TraceCheckUtils]: 7: Hoare triple {20558#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {20558#true} is VALID [2022-04-07 21:20:19,420 INFO L290 TraceCheckUtils]: 8: Hoare triple {20558#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {20558#true} is VALID [2022-04-07 21:20:19,420 INFO L290 TraceCheckUtils]: 9: Hoare triple {20558#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {20558#true} is VALID [2022-04-07 21:20:19,420 INFO L290 TraceCheckUtils]: 10: Hoare triple {20558#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {20558#true} is VALID [2022-04-07 21:20:19,420 INFO L290 TraceCheckUtils]: 11: Hoare triple {20558#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {20558#true} is VALID [2022-04-07 21:20:19,421 INFO L290 TraceCheckUtils]: 12: Hoare triple {20558#true} [293] L100-1-->L104-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {20563#(= main_~p5~0 0)} is VALID [2022-04-07 21:20:19,421 INFO L290 TraceCheckUtils]: 13: Hoare triple {20563#(= main_~p5~0 0)} [294] L104-1-->L108-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {20563#(= main_~p5~0 0)} is VALID [2022-04-07 21:20:19,421 INFO L290 TraceCheckUtils]: 14: Hoare triple {20563#(= main_~p5~0 0)} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {20563#(= main_~p5~0 0)} is VALID [2022-04-07 21:20:19,421 INFO L290 TraceCheckUtils]: 15: Hoare triple {20563#(= main_~p5~0 0)} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {20563#(= main_~p5~0 0)} is VALID [2022-04-07 21:20:19,422 INFO L290 TraceCheckUtils]: 16: Hoare triple {20563#(= main_~p5~0 0)} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {20563#(= main_~p5~0 0)} is VALID [2022-04-07 21:20:19,422 INFO L290 TraceCheckUtils]: 17: Hoare triple {20563#(= main_~p5~0 0)} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {20563#(= main_~p5~0 0)} is VALID [2022-04-07 21:20:19,422 INFO L290 TraceCheckUtils]: 18: Hoare triple {20563#(= main_~p5~0 0)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {20563#(= main_~p5~0 0)} is VALID [2022-04-07 21:20:19,422 INFO L290 TraceCheckUtils]: 19: Hoare triple {20563#(= main_~p5~0 0)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {20563#(= main_~p5~0 0)} is VALID [2022-04-07 21:20:19,423 INFO L290 TraceCheckUtils]: 20: Hoare triple {20563#(= main_~p5~0 0)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {20563#(= main_~p5~0 0)} is VALID [2022-04-07 21:20:19,423 INFO L290 TraceCheckUtils]: 21: Hoare triple {20563#(= main_~p5~0 0)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {20563#(= main_~p5~0 0)} is VALID [2022-04-07 21:20:19,423 INFO L290 TraceCheckUtils]: 22: Hoare triple {20563#(= main_~p5~0 0)} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {20563#(= main_~p5~0 0)} is VALID [2022-04-07 21:20:19,423 INFO L290 TraceCheckUtils]: 23: Hoare triple {20563#(= main_~p5~0 0)} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {20563#(= main_~p5~0 0)} is VALID [2022-04-07 21:20:19,424 INFO L290 TraceCheckUtils]: 24: Hoare triple {20563#(= main_~p5~0 0)} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {20563#(= main_~p5~0 0)} is VALID [2022-04-07 21:20:19,424 INFO L290 TraceCheckUtils]: 25: Hoare triple {20563#(= main_~p5~0 0)} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {20563#(= main_~p5~0 0)} is VALID [2022-04-07 21:20:19,424 INFO L290 TraceCheckUtils]: 26: Hoare triple {20563#(= main_~p5~0 0)} [330] L161-1-->L167: Formula: (not (= v_main_~p5~0_2 0)) InVars {main_~p5~0=v_main_~p5~0_2} OutVars{main_~p5~0=v_main_~p5~0_2} AuxVars[] AssignedVars[] {20559#false} is VALID [2022-04-07 21:20:19,424 INFO L290 TraceCheckUtils]: 27: Hoare triple {20559#false} [332] L167-->L212-1: Formula: (not (= v_main_~lk5~0_3 1)) InVars {main_~lk5~0=v_main_~lk5~0_3} OutVars{main_~lk5~0=v_main_~lk5~0_3} AuxVars[] AssignedVars[] {20559#false} is VALID [2022-04-07 21:20:19,424 INFO L290 TraceCheckUtils]: 28: Hoare triple {20559#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20559#false} is VALID [2022-04-07 21:20:19,424 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 21:20:19,424 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 21:20:19,425 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [521194483] [2022-04-07 21:20:19,425 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [521194483] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 21:20:19,425 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 21:20:19,425 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-07 21:20:19,425 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [583641649] [2022-04-07 21:20:19,425 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 21:20:19,425 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-07 21:20:19,425 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 21:20:19,425 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:19,439 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 29 edges. 29 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:20:19,439 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-07 21:20:19,439 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 21:20:19,440 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-07 21:20:19,440 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-07 21:20:19,440 INFO L87 Difference]: Start difference. First operand 969 states and 1623 transitions. Second operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:19,646 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:19,646 INFO L93 Difference]: Finished difference Result 1355 states and 2264 transitions. [2022-04-07 21:20:19,646 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-07 21:20:19,646 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-07 21:20:19,646 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 21:20:19,646 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:19,648 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 169 transitions. [2022-04-07 21:20:19,648 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:19,648 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 169 transitions. [2022-04-07 21:20:19,649 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 169 transitions. [2022-04-07 21:20:19,750 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 169 edges. 169 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:20:19,797 INFO L225 Difference]: With dead ends: 1355 [2022-04-07 21:20:19,798 INFO L226 Difference]: Without dead ends: 1355 [2022-04-07 21:20:19,798 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-07 21:20:19,798 INFO L913 BasicCegarLoop]: 128 mSDtfsCounter, 184 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 84 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 184 SdHoareTripleChecker+Valid, 135 SdHoareTripleChecker+Invalid, 87 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 84 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 21:20:19,799 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [184 Valid, 135 Invalid, 87 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 84 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 21:20:19,799 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1355 states. [2022-04-07 21:20:19,811 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1355 to 1353. [2022-04-07 21:20:19,811 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 21:20:19,813 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1355 states. Second operand has 1353 states, 1349 states have (on average 1.67531504818384) internal successors, (2260), 1349 states have internal predecessors, (2260), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:19,814 INFO L74 IsIncluded]: Start isIncluded. First operand 1355 states. Second operand has 1353 states, 1349 states have (on average 1.67531504818384) internal successors, (2260), 1349 states have internal predecessors, (2260), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:19,815 INFO L87 Difference]: Start difference. First operand 1355 states. Second operand has 1353 states, 1349 states have (on average 1.67531504818384) internal successors, (2260), 1349 states have internal predecessors, (2260), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:19,859 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:19,859 INFO L93 Difference]: Finished difference Result 1355 states and 2264 transitions. [2022-04-07 21:20:19,859 INFO L276 IsEmpty]: Start isEmpty. Operand 1355 states and 2264 transitions. [2022-04-07 21:20:19,861 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:20:19,861 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:20:19,862 INFO L74 IsIncluded]: Start isIncluded. First operand has 1353 states, 1349 states have (on average 1.67531504818384) internal successors, (2260), 1349 states have internal predecessors, (2260), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 1355 states. [2022-04-07 21:20:19,863 INFO L87 Difference]: Start difference. First operand has 1353 states, 1349 states have (on average 1.67531504818384) internal successors, (2260), 1349 states have internal predecessors, (2260), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 1355 states. [2022-04-07 21:20:19,907 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:19,907 INFO L93 Difference]: Finished difference Result 1355 states and 2264 transitions. [2022-04-07 21:20:19,907 INFO L276 IsEmpty]: Start isEmpty. Operand 1355 states and 2264 transitions. [2022-04-07 21:20:19,909 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:20:19,909 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:20:19,909 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 21:20:19,909 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 21:20:19,910 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1353 states, 1349 states have (on average 1.67531504818384) internal successors, (2260), 1349 states have internal predecessors, (2260), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:19,954 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1353 states to 1353 states and 2263 transitions. [2022-04-07 21:20:19,954 INFO L78 Accepts]: Start accepts. Automaton has 1353 states and 2263 transitions. Word has length 29 [2022-04-07 21:20:19,954 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 21:20:19,954 INFO L478 AbstractCegarLoop]: Abstraction has 1353 states and 2263 transitions. [2022-04-07 21:20:19,954 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:19,954 INFO L276 IsEmpty]: Start isEmpty. Operand 1353 states and 2263 transitions. [2022-04-07 21:20:19,956 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2022-04-07 21:20:19,956 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 21:20:19,956 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 21:20:19,956 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2022-04-07 21:20:19,956 INFO L403 AbstractCegarLoop]: === Iteration 15 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 21:20:19,957 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 21:20:19,957 INFO L85 PathProgramCache]: Analyzing trace with hash 1896591374, now seen corresponding path program 1 times [2022-04-07 21:20:19,957 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 21:20:19,957 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1436828728] [2022-04-07 21:20:19,957 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 21:20:19,957 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 21:20:19,971 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:20:19,986 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 21:20:19,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:20:19,990 INFO L290 TraceCheckUtils]: 0: Hoare triple {25994#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {25988#true} is VALID [2022-04-07 21:20:19,990 INFO L290 TraceCheckUtils]: 1: Hoare triple {25988#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25988#true} is VALID [2022-04-07 21:20:19,990 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {25988#true} {25988#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25988#true} is VALID [2022-04-07 21:20:19,990 INFO L272 TraceCheckUtils]: 0: Hoare triple {25988#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25994#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 21:20:19,990 INFO L290 TraceCheckUtils]: 1: Hoare triple {25994#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {25988#true} is VALID [2022-04-07 21:20:19,991 INFO L290 TraceCheckUtils]: 2: Hoare triple {25988#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25988#true} is VALID [2022-04-07 21:20:19,991 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {25988#true} {25988#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25988#true} is VALID [2022-04-07 21:20:19,991 INFO L272 TraceCheckUtils]: 4: Hoare triple {25988#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25988#true} is VALID [2022-04-07 21:20:19,992 INFO L290 TraceCheckUtils]: 5: Hoare triple {25988#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {25988#true} is VALID [2022-04-07 21:20:19,992 INFO L290 TraceCheckUtils]: 6: Hoare triple {25988#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {25988#true} is VALID [2022-04-07 21:20:19,992 INFO L290 TraceCheckUtils]: 7: Hoare triple {25988#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {25988#true} is VALID [2022-04-07 21:20:19,992 INFO L290 TraceCheckUtils]: 8: Hoare triple {25988#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {25988#true} is VALID [2022-04-07 21:20:19,992 INFO L290 TraceCheckUtils]: 9: Hoare triple {25988#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {25988#true} is VALID [2022-04-07 21:20:19,992 INFO L290 TraceCheckUtils]: 10: Hoare triple {25988#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {25988#true} is VALID [2022-04-07 21:20:19,992 INFO L290 TraceCheckUtils]: 11: Hoare triple {25988#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {25988#true} is VALID [2022-04-07 21:20:19,992 INFO L290 TraceCheckUtils]: 12: Hoare triple {25988#true} [292] L100-1-->L104-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {25993#(not (= main_~p5~0 0))} is VALID [2022-04-07 21:20:19,993 INFO L290 TraceCheckUtils]: 13: Hoare triple {25993#(not (= main_~p5~0 0))} [294] L104-1-->L108-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {25993#(not (= main_~p5~0 0))} is VALID [2022-04-07 21:20:19,993 INFO L290 TraceCheckUtils]: 14: Hoare triple {25993#(not (= main_~p5~0 0))} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {25993#(not (= main_~p5~0 0))} is VALID [2022-04-07 21:20:19,993 INFO L290 TraceCheckUtils]: 15: Hoare triple {25993#(not (= main_~p5~0 0))} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {25993#(not (= main_~p5~0 0))} is VALID [2022-04-07 21:20:19,993 INFO L290 TraceCheckUtils]: 16: Hoare triple {25993#(not (= main_~p5~0 0))} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {25993#(not (= main_~p5~0 0))} is VALID [2022-04-07 21:20:19,994 INFO L290 TraceCheckUtils]: 17: Hoare triple {25993#(not (= main_~p5~0 0))} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {25993#(not (= main_~p5~0 0))} is VALID [2022-04-07 21:20:19,994 INFO L290 TraceCheckUtils]: 18: Hoare triple {25993#(not (= main_~p5~0 0))} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {25993#(not (= main_~p5~0 0))} is VALID [2022-04-07 21:20:19,994 INFO L290 TraceCheckUtils]: 19: Hoare triple {25993#(not (= main_~p5~0 0))} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {25993#(not (= main_~p5~0 0))} is VALID [2022-04-07 21:20:19,995 INFO L290 TraceCheckUtils]: 20: Hoare triple {25993#(not (= main_~p5~0 0))} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {25993#(not (= main_~p5~0 0))} is VALID [2022-04-07 21:20:19,995 INFO L290 TraceCheckUtils]: 21: Hoare triple {25993#(not (= main_~p5~0 0))} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {25993#(not (= main_~p5~0 0))} is VALID [2022-04-07 21:20:19,995 INFO L290 TraceCheckUtils]: 22: Hoare triple {25993#(not (= main_~p5~0 0))} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {25993#(not (= main_~p5~0 0))} is VALID [2022-04-07 21:20:19,995 INFO L290 TraceCheckUtils]: 23: Hoare triple {25993#(not (= main_~p5~0 0))} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {25993#(not (= main_~p5~0 0))} is VALID [2022-04-07 21:20:19,996 INFO L290 TraceCheckUtils]: 24: Hoare triple {25993#(not (= main_~p5~0 0))} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {25993#(not (= main_~p5~0 0))} is VALID [2022-04-07 21:20:19,996 INFO L290 TraceCheckUtils]: 25: Hoare triple {25993#(not (= main_~p5~0 0))} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {25993#(not (= main_~p5~0 0))} is VALID [2022-04-07 21:20:19,996 INFO L290 TraceCheckUtils]: 26: Hoare triple {25993#(not (= main_~p5~0 0))} [331] L161-1-->L166-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {25989#false} is VALID [2022-04-07 21:20:19,996 INFO L290 TraceCheckUtils]: 27: Hoare triple {25989#false} [334] L166-1-->L172: Formula: (not (= v_main_~p6~0_2 0)) InVars {main_~p6~0=v_main_~p6~0_2} OutVars{main_~p6~0=v_main_~p6~0_2} AuxVars[] AssignedVars[] {25989#false} is VALID [2022-04-07 21:20:19,996 INFO L290 TraceCheckUtils]: 28: Hoare triple {25989#false} [336] L172-->L212-1: Formula: (not (= v_main_~lk6~0_3 1)) InVars {main_~lk6~0=v_main_~lk6~0_3} OutVars{main_~lk6~0=v_main_~lk6~0_3} AuxVars[] AssignedVars[] {25989#false} is VALID [2022-04-07 21:20:19,996 INFO L290 TraceCheckUtils]: 29: Hoare triple {25989#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25989#false} is VALID [2022-04-07 21:20:19,997 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 21:20:19,997 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 21:20:19,997 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1436828728] [2022-04-07 21:20:19,997 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1436828728] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 21:20:19,997 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 21:20:19,997 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-07 21:20:19,997 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1277408234] [2022-04-07 21:20:19,997 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 21:20:19,998 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-07 21:20:19,998 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 21:20:19,998 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:20,014 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 30 edges. 30 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:20:20,014 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-07 21:20:20,014 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 21:20:20,014 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-07 21:20:20,014 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-07 21:20:20,015 INFO L87 Difference]: Start difference. First operand 1353 states and 2263 transitions. Second operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:20,228 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:20,229 INFO L93 Difference]: Finished difference Result 1371 states and 2264 transitions. [2022-04-07 21:20:20,229 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-07 21:20:20,229 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-07 21:20:20,229 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 21:20:20,229 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:20,230 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 168 transitions. [2022-04-07 21:20:20,230 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:20,231 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 168 transitions. [2022-04-07 21:20:20,231 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 168 transitions. [2022-04-07 21:20:20,341 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 168 edges. 168 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:20:20,389 INFO L225 Difference]: With dead ends: 1371 [2022-04-07 21:20:20,389 INFO L226 Difference]: Without dead ends: 1371 [2022-04-07 21:20:20,389 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-07 21:20:20,390 INFO L913 BasicCegarLoop]: 134 mSDtfsCounter, 179 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 83 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 179 SdHoareTripleChecker+Valid, 141 SdHoareTripleChecker+Invalid, 85 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 83 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 21:20:20,390 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [179 Valid, 141 Invalid, 85 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 83 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 21:20:20,391 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1371 states. [2022-04-07 21:20:20,402 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1371 to 1369. [2022-04-07 21:20:20,402 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 21:20:20,403 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1371 states. Second operand has 1369 states, 1365 states have (on average 1.6556776556776556) internal successors, (2260), 1365 states have internal predecessors, (2260), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:20,404 INFO L74 IsIncluded]: Start isIncluded. First operand 1371 states. Second operand has 1369 states, 1365 states have (on average 1.6556776556776556) internal successors, (2260), 1365 states have internal predecessors, (2260), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:20,405 INFO L87 Difference]: Start difference. First operand 1371 states. Second operand has 1369 states, 1365 states have (on average 1.6556776556776556) internal successors, (2260), 1365 states have internal predecessors, (2260), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:20,449 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:20,450 INFO L93 Difference]: Finished difference Result 1371 states and 2264 transitions. [2022-04-07 21:20:20,450 INFO L276 IsEmpty]: Start isEmpty. Operand 1371 states and 2264 transitions. [2022-04-07 21:20:20,451 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:20:20,451 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:20:20,452 INFO L74 IsIncluded]: Start isIncluded. First operand has 1369 states, 1365 states have (on average 1.6556776556776556) internal successors, (2260), 1365 states have internal predecessors, (2260), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 1371 states. [2022-04-07 21:20:20,453 INFO L87 Difference]: Start difference. First operand has 1369 states, 1365 states have (on average 1.6556776556776556) internal successors, (2260), 1365 states have internal predecessors, (2260), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 1371 states. [2022-04-07 21:20:20,498 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:20,498 INFO L93 Difference]: Finished difference Result 1371 states and 2264 transitions. [2022-04-07 21:20:20,498 INFO L276 IsEmpty]: Start isEmpty. Operand 1371 states and 2264 transitions. [2022-04-07 21:20:20,500 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:20:20,500 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:20:20,500 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 21:20:20,500 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 21:20:20,502 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1369 states, 1365 states have (on average 1.6556776556776556) internal successors, (2260), 1365 states have internal predecessors, (2260), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:20,546 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1369 states to 1369 states and 2263 transitions. [2022-04-07 21:20:20,546 INFO L78 Accepts]: Start accepts. Automaton has 1369 states and 2263 transitions. Word has length 30 [2022-04-07 21:20:20,546 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 21:20:20,546 INFO L478 AbstractCegarLoop]: Abstraction has 1369 states and 2263 transitions. [2022-04-07 21:20:20,546 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:20,546 INFO L276 IsEmpty]: Start isEmpty. Operand 1369 states and 2263 transitions. [2022-04-07 21:20:20,547 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2022-04-07 21:20:20,547 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 21:20:20,547 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 21:20:20,548 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2022-04-07 21:20:20,548 INFO L403 AbstractCegarLoop]: === Iteration 16 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 21:20:20,548 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 21:20:20,548 INFO L85 PathProgramCache]: Analyzing trace with hash 899519021, now seen corresponding path program 1 times [2022-04-07 21:20:20,548 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 21:20:20,548 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [372629034] [2022-04-07 21:20:20,548 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 21:20:20,548 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 21:20:20,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:20:20,575 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 21:20:20,576 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:20:20,578 INFO L290 TraceCheckUtils]: 0: Hoare triple {31488#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {31482#true} is VALID [2022-04-07 21:20:20,578 INFO L290 TraceCheckUtils]: 1: Hoare triple {31482#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31482#true} is VALID [2022-04-07 21:20:20,578 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {31482#true} {31482#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31482#true} is VALID [2022-04-07 21:20:20,578 INFO L272 TraceCheckUtils]: 0: Hoare triple {31482#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31488#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 21:20:20,578 INFO L290 TraceCheckUtils]: 1: Hoare triple {31488#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {31482#true} is VALID [2022-04-07 21:20:20,578 INFO L290 TraceCheckUtils]: 2: Hoare triple {31482#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31482#true} is VALID [2022-04-07 21:20:20,578 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {31482#true} {31482#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31482#true} is VALID [2022-04-07 21:20:20,578 INFO L272 TraceCheckUtils]: 4: Hoare triple {31482#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31482#true} is VALID [2022-04-07 21:20:20,579 INFO L290 TraceCheckUtils]: 5: Hoare triple {31482#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {31482#true} is VALID [2022-04-07 21:20:20,579 INFO L290 TraceCheckUtils]: 6: Hoare triple {31482#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {31482#true} is VALID [2022-04-07 21:20:20,579 INFO L290 TraceCheckUtils]: 7: Hoare triple {31482#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {31482#true} is VALID [2022-04-07 21:20:20,579 INFO L290 TraceCheckUtils]: 8: Hoare triple {31482#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {31482#true} is VALID [2022-04-07 21:20:20,579 INFO L290 TraceCheckUtils]: 9: Hoare triple {31482#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {31482#true} is VALID [2022-04-07 21:20:20,579 INFO L290 TraceCheckUtils]: 10: Hoare triple {31482#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {31482#true} is VALID [2022-04-07 21:20:20,579 INFO L290 TraceCheckUtils]: 11: Hoare triple {31482#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {31482#true} is VALID [2022-04-07 21:20:20,579 INFO L290 TraceCheckUtils]: 12: Hoare triple {31482#true} [293] L100-1-->L104-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {31482#true} is VALID [2022-04-07 21:20:20,579 INFO L290 TraceCheckUtils]: 13: Hoare triple {31482#true} [294] L104-1-->L108-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {31487#(= main_~lk6~0 1)} is VALID [2022-04-07 21:20:20,580 INFO L290 TraceCheckUtils]: 14: Hoare triple {31487#(= main_~lk6~0 1)} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {31487#(= main_~lk6~0 1)} is VALID [2022-04-07 21:20:20,580 INFO L290 TraceCheckUtils]: 15: Hoare triple {31487#(= main_~lk6~0 1)} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {31487#(= main_~lk6~0 1)} is VALID [2022-04-07 21:20:20,580 INFO L290 TraceCheckUtils]: 16: Hoare triple {31487#(= main_~lk6~0 1)} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {31487#(= main_~lk6~0 1)} is VALID [2022-04-07 21:20:20,580 INFO L290 TraceCheckUtils]: 17: Hoare triple {31487#(= main_~lk6~0 1)} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {31487#(= main_~lk6~0 1)} is VALID [2022-04-07 21:20:20,581 INFO L290 TraceCheckUtils]: 18: Hoare triple {31487#(= main_~lk6~0 1)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {31487#(= main_~lk6~0 1)} is VALID [2022-04-07 21:20:20,581 INFO L290 TraceCheckUtils]: 19: Hoare triple {31487#(= main_~lk6~0 1)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {31487#(= main_~lk6~0 1)} is VALID [2022-04-07 21:20:20,581 INFO L290 TraceCheckUtils]: 20: Hoare triple {31487#(= main_~lk6~0 1)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {31487#(= main_~lk6~0 1)} is VALID [2022-04-07 21:20:20,581 INFO L290 TraceCheckUtils]: 21: Hoare triple {31487#(= main_~lk6~0 1)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {31487#(= main_~lk6~0 1)} is VALID [2022-04-07 21:20:20,582 INFO L290 TraceCheckUtils]: 22: Hoare triple {31487#(= main_~lk6~0 1)} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {31487#(= main_~lk6~0 1)} is VALID [2022-04-07 21:20:20,582 INFO L290 TraceCheckUtils]: 23: Hoare triple {31487#(= main_~lk6~0 1)} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {31487#(= main_~lk6~0 1)} is VALID [2022-04-07 21:20:20,582 INFO L290 TraceCheckUtils]: 24: Hoare triple {31487#(= main_~lk6~0 1)} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {31487#(= main_~lk6~0 1)} is VALID [2022-04-07 21:20:20,582 INFO L290 TraceCheckUtils]: 25: Hoare triple {31487#(= main_~lk6~0 1)} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {31487#(= main_~lk6~0 1)} is VALID [2022-04-07 21:20:20,583 INFO L290 TraceCheckUtils]: 26: Hoare triple {31487#(= main_~lk6~0 1)} [331] L161-1-->L166-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {31487#(= main_~lk6~0 1)} is VALID [2022-04-07 21:20:20,583 INFO L290 TraceCheckUtils]: 27: Hoare triple {31487#(= main_~lk6~0 1)} [334] L166-1-->L172: Formula: (not (= v_main_~p6~0_2 0)) InVars {main_~p6~0=v_main_~p6~0_2} OutVars{main_~p6~0=v_main_~p6~0_2} AuxVars[] AssignedVars[] {31487#(= main_~lk6~0 1)} is VALID [2022-04-07 21:20:20,583 INFO L290 TraceCheckUtils]: 28: Hoare triple {31487#(= main_~lk6~0 1)} [336] L172-->L212-1: Formula: (not (= v_main_~lk6~0_3 1)) InVars {main_~lk6~0=v_main_~lk6~0_3} OutVars{main_~lk6~0=v_main_~lk6~0_3} AuxVars[] AssignedVars[] {31483#false} is VALID [2022-04-07 21:20:20,583 INFO L290 TraceCheckUtils]: 29: Hoare triple {31483#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31483#false} is VALID [2022-04-07 21:20:20,583 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 21:20:20,584 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 21:20:20,584 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [372629034] [2022-04-07 21:20:20,584 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [372629034] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 21:20:20,584 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 21:20:20,584 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-07 21:20:20,584 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1751870726] [2022-04-07 21:20:20,584 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 21:20:20,584 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-07 21:20:20,584 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 21:20:20,584 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:20,599 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 30 edges. 30 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:20:20,599 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-07 21:20:20,599 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 21:20:20,599 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-07 21:20:20,599 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-07 21:20:20,600 INFO L87 Difference]: Start difference. First operand 1369 states and 2263 transitions. Second operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:20,904 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:20,905 INFO L93 Difference]: Finished difference Result 2507 states and 4200 transitions. [2022-04-07 21:20:20,905 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-07 21:20:20,905 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-07 21:20:20,905 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 21:20:20,905 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:20,906 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 158 transitions. [2022-04-07 21:20:20,906 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:20,907 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 158 transitions. [2022-04-07 21:20:20,907 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 158 transitions. [2022-04-07 21:20:21,016 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 158 edges. 158 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:20:21,199 INFO L225 Difference]: With dead ends: 2507 [2022-04-07 21:20:21,199 INFO L226 Difference]: Without dead ends: 2507 [2022-04-07 21:20:21,199 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-07 21:20:21,201 INFO L913 BasicCegarLoop]: 90 mSDtfsCounter, 201 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 85 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 201 SdHoareTripleChecker+Valid, 97 SdHoareTripleChecker+Invalid, 87 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 85 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 21:20:21,201 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [201 Valid, 97 Invalid, 87 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 85 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 21:20:21,203 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2507 states. [2022-04-07 21:20:21,220 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2507 to 1929. [2022-04-07 21:20:21,220 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 21:20:21,222 INFO L82 GeneralOperation]: Start isEquivalent. First operand 2507 states. Second operand has 1929 states, 1925 states have (on average 1.6145454545454545) internal successors, (3108), 1925 states have internal predecessors, (3108), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:21,223 INFO L74 IsIncluded]: Start isIncluded. First operand 2507 states. Second operand has 1929 states, 1925 states have (on average 1.6145454545454545) internal successors, (3108), 1925 states have internal predecessors, (3108), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:21,225 INFO L87 Difference]: Start difference. First operand 2507 states. Second operand has 1929 states, 1925 states have (on average 1.6145454545454545) internal successors, (3108), 1925 states have internal predecessors, (3108), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:21,367 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:21,367 INFO L93 Difference]: Finished difference Result 2507 states and 4200 transitions. [2022-04-07 21:20:21,367 INFO L276 IsEmpty]: Start isEmpty. Operand 2507 states and 4200 transitions. [2022-04-07 21:20:21,369 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:20:21,369 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:20:21,372 INFO L74 IsIncluded]: Start isIncluded. First operand has 1929 states, 1925 states have (on average 1.6145454545454545) internal successors, (3108), 1925 states have internal predecessors, (3108), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 2507 states. [2022-04-07 21:20:21,373 INFO L87 Difference]: Start difference. First operand has 1929 states, 1925 states have (on average 1.6145454545454545) internal successors, (3108), 1925 states have internal predecessors, (3108), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 2507 states. [2022-04-07 21:20:21,516 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:21,516 INFO L93 Difference]: Finished difference Result 2507 states and 4200 transitions. [2022-04-07 21:20:21,516 INFO L276 IsEmpty]: Start isEmpty. Operand 2507 states and 4200 transitions. [2022-04-07 21:20:21,518 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:20:21,518 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:20:21,518 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 21:20:21,518 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 21:20:21,521 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1929 states, 1925 states have (on average 1.6145454545454545) internal successors, (3108), 1925 states have internal predecessors, (3108), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:21,623 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1929 states to 1929 states and 3111 transitions. [2022-04-07 21:20:21,624 INFO L78 Accepts]: Start accepts. Automaton has 1929 states and 3111 transitions. Word has length 30 [2022-04-07 21:20:21,624 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 21:20:21,624 INFO L478 AbstractCegarLoop]: Abstraction has 1929 states and 3111 transitions. [2022-04-07 21:20:21,624 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:21,624 INFO L276 IsEmpty]: Start isEmpty. Operand 1929 states and 3111 transitions. [2022-04-07 21:20:21,626 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2022-04-07 21:20:21,626 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 21:20:21,626 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 21:20:21,626 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2022-04-07 21:20:21,626 INFO L403 AbstractCegarLoop]: === Iteration 17 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 21:20:21,626 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 21:20:21,626 INFO L85 PathProgramCache]: Analyzing trace with hash -2042138578, now seen corresponding path program 1 times [2022-04-07 21:20:21,626 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 21:20:21,626 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1639361589] [2022-04-07 21:20:21,627 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 21:20:21,627 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 21:20:21,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:20:21,655 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 21:20:21,656 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:20:21,658 INFO L290 TraceCheckUtils]: 0: Hoare triple {40950#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {40944#true} is VALID [2022-04-07 21:20:21,658 INFO L290 TraceCheckUtils]: 1: Hoare triple {40944#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40944#true} is VALID [2022-04-07 21:20:21,658 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {40944#true} {40944#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40944#true} is VALID [2022-04-07 21:20:21,658 INFO L272 TraceCheckUtils]: 0: Hoare triple {40944#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40950#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 21:20:21,659 INFO L290 TraceCheckUtils]: 1: Hoare triple {40950#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {40944#true} is VALID [2022-04-07 21:20:21,659 INFO L290 TraceCheckUtils]: 2: Hoare triple {40944#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40944#true} is VALID [2022-04-07 21:20:21,659 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {40944#true} {40944#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40944#true} is VALID [2022-04-07 21:20:21,659 INFO L272 TraceCheckUtils]: 4: Hoare triple {40944#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40944#true} is VALID [2022-04-07 21:20:21,659 INFO L290 TraceCheckUtils]: 5: Hoare triple {40944#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {40944#true} is VALID [2022-04-07 21:20:21,659 INFO L290 TraceCheckUtils]: 6: Hoare triple {40944#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {40944#true} is VALID [2022-04-07 21:20:21,659 INFO L290 TraceCheckUtils]: 7: Hoare triple {40944#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {40944#true} is VALID [2022-04-07 21:20:21,659 INFO L290 TraceCheckUtils]: 8: Hoare triple {40944#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {40944#true} is VALID [2022-04-07 21:20:21,659 INFO L290 TraceCheckUtils]: 9: Hoare triple {40944#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {40944#true} is VALID [2022-04-07 21:20:21,660 INFO L290 TraceCheckUtils]: 10: Hoare triple {40944#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {40944#true} is VALID [2022-04-07 21:20:21,660 INFO L290 TraceCheckUtils]: 11: Hoare triple {40944#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {40944#true} is VALID [2022-04-07 21:20:21,660 INFO L290 TraceCheckUtils]: 12: Hoare triple {40944#true} [293] L100-1-->L104-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {40944#true} is VALID [2022-04-07 21:20:21,660 INFO L290 TraceCheckUtils]: 13: Hoare triple {40944#true} [295] L104-1-->L108-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {40949#(= main_~p6~0 0)} is VALID [2022-04-07 21:20:21,660 INFO L290 TraceCheckUtils]: 14: Hoare triple {40949#(= main_~p6~0 0)} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {40949#(= main_~p6~0 0)} is VALID [2022-04-07 21:20:21,661 INFO L290 TraceCheckUtils]: 15: Hoare triple {40949#(= main_~p6~0 0)} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {40949#(= main_~p6~0 0)} is VALID [2022-04-07 21:20:21,661 INFO L290 TraceCheckUtils]: 16: Hoare triple {40949#(= main_~p6~0 0)} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {40949#(= main_~p6~0 0)} is VALID [2022-04-07 21:20:21,661 INFO L290 TraceCheckUtils]: 17: Hoare triple {40949#(= main_~p6~0 0)} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {40949#(= main_~p6~0 0)} is VALID [2022-04-07 21:20:21,662 INFO L290 TraceCheckUtils]: 18: Hoare triple {40949#(= main_~p6~0 0)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {40949#(= main_~p6~0 0)} is VALID [2022-04-07 21:20:21,662 INFO L290 TraceCheckUtils]: 19: Hoare triple {40949#(= main_~p6~0 0)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {40949#(= main_~p6~0 0)} is VALID [2022-04-07 21:20:21,662 INFO L290 TraceCheckUtils]: 20: Hoare triple {40949#(= main_~p6~0 0)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {40949#(= main_~p6~0 0)} is VALID [2022-04-07 21:20:21,662 INFO L290 TraceCheckUtils]: 21: Hoare triple {40949#(= main_~p6~0 0)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {40949#(= main_~p6~0 0)} is VALID [2022-04-07 21:20:21,663 INFO L290 TraceCheckUtils]: 22: Hoare triple {40949#(= main_~p6~0 0)} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {40949#(= main_~p6~0 0)} is VALID [2022-04-07 21:20:21,663 INFO L290 TraceCheckUtils]: 23: Hoare triple {40949#(= main_~p6~0 0)} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {40949#(= main_~p6~0 0)} is VALID [2022-04-07 21:20:21,663 INFO L290 TraceCheckUtils]: 24: Hoare triple {40949#(= main_~p6~0 0)} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {40949#(= main_~p6~0 0)} is VALID [2022-04-07 21:20:21,664 INFO L290 TraceCheckUtils]: 25: Hoare triple {40949#(= main_~p6~0 0)} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {40949#(= main_~p6~0 0)} is VALID [2022-04-07 21:20:21,664 INFO L290 TraceCheckUtils]: 26: Hoare triple {40949#(= main_~p6~0 0)} [331] L161-1-->L166-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {40949#(= main_~p6~0 0)} is VALID [2022-04-07 21:20:21,664 INFO L290 TraceCheckUtils]: 27: Hoare triple {40949#(= main_~p6~0 0)} [334] L166-1-->L172: Formula: (not (= v_main_~p6~0_2 0)) InVars {main_~p6~0=v_main_~p6~0_2} OutVars{main_~p6~0=v_main_~p6~0_2} AuxVars[] AssignedVars[] {40945#false} is VALID [2022-04-07 21:20:21,664 INFO L290 TraceCheckUtils]: 28: Hoare triple {40945#false} [336] L172-->L212-1: Formula: (not (= v_main_~lk6~0_3 1)) InVars {main_~lk6~0=v_main_~lk6~0_3} OutVars{main_~lk6~0=v_main_~lk6~0_3} AuxVars[] AssignedVars[] {40945#false} is VALID [2022-04-07 21:20:21,664 INFO L290 TraceCheckUtils]: 29: Hoare triple {40945#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40945#false} is VALID [2022-04-07 21:20:21,665 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 21:20:21,665 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 21:20:21,665 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1639361589] [2022-04-07 21:20:21,665 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1639361589] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 21:20:21,665 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 21:20:21,665 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-07 21:20:21,665 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1970844189] [2022-04-07 21:20:21,665 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 21:20:21,665 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-07 21:20:21,666 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 21:20:21,666 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:21,683 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 30 edges. 30 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:20:21,683 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-07 21:20:21,683 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 21:20:21,683 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-07 21:20:21,683 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-07 21:20:21,683 INFO L87 Difference]: Start difference. First operand 1929 states and 3111 transitions. Second operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:22,020 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:22,020 INFO L93 Difference]: Finished difference Result 2667 states and 4296 transitions. [2022-04-07 21:20:22,021 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-07 21:20:22,021 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-07 21:20:22,021 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 21:20:22,021 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:22,022 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 167 transitions. [2022-04-07 21:20:22,022 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:22,023 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 167 transitions. [2022-04-07 21:20:22,023 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 167 transitions. [2022-04-07 21:20:22,122 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 167 edges. 167 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:20:22,307 INFO L225 Difference]: With dead ends: 2667 [2022-04-07 21:20:22,308 INFO L226 Difference]: Without dead ends: 2667 [2022-04-07 21:20:22,310 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-07 21:20:22,321 INFO L913 BasicCegarLoop]: 130 mSDtfsCounter, 178 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 83 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 178 SdHoareTripleChecker+Valid, 137 SdHoareTripleChecker+Invalid, 86 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 83 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 21:20:22,322 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [178 Valid, 137 Invalid, 86 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 83 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-07 21:20:22,329 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2667 states. [2022-04-07 21:20:22,389 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2667 to 2665. [2022-04-07 21:20:22,390 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 21:20:22,392 INFO L82 GeneralOperation]: Start isEquivalent. First operand 2667 states. Second operand has 2665 states, 2661 states have (on average 1.6129274708756107) internal successors, (4292), 2661 states have internal predecessors, (4292), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:22,394 INFO L74 IsIncluded]: Start isIncluded. First operand 2667 states. Second operand has 2665 states, 2661 states have (on average 1.6129274708756107) internal successors, (4292), 2661 states have internal predecessors, (4292), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:22,395 INFO L87 Difference]: Start difference. First operand 2667 states. Second operand has 2665 states, 2661 states have (on average 1.6129274708756107) internal successors, (4292), 2661 states have internal predecessors, (4292), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:22,571 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:22,571 INFO L93 Difference]: Finished difference Result 2667 states and 4296 transitions. [2022-04-07 21:20:22,572 INFO L276 IsEmpty]: Start isEmpty. Operand 2667 states and 4296 transitions. [2022-04-07 21:20:22,574 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:20:22,574 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:20:22,577 INFO L74 IsIncluded]: Start isIncluded. First operand has 2665 states, 2661 states have (on average 1.6129274708756107) internal successors, (4292), 2661 states have internal predecessors, (4292), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 2667 states. [2022-04-07 21:20:22,578 INFO L87 Difference]: Start difference. First operand has 2665 states, 2661 states have (on average 1.6129274708756107) internal successors, (4292), 2661 states have internal predecessors, (4292), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 2667 states. [2022-04-07 21:20:22,740 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:22,740 INFO L93 Difference]: Finished difference Result 2667 states and 4296 transitions. [2022-04-07 21:20:22,740 INFO L276 IsEmpty]: Start isEmpty. Operand 2667 states and 4296 transitions. [2022-04-07 21:20:22,742 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:20:22,742 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:20:22,742 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 21:20:22,742 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 21:20:22,745 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2665 states, 2661 states have (on average 1.6129274708756107) internal successors, (4292), 2661 states have internal predecessors, (4292), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:22,920 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2665 states to 2665 states and 4295 transitions. [2022-04-07 21:20:22,921 INFO L78 Accepts]: Start accepts. Automaton has 2665 states and 4295 transitions. Word has length 30 [2022-04-07 21:20:22,921 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 21:20:22,921 INFO L478 AbstractCegarLoop]: Abstraction has 2665 states and 4295 transitions. [2022-04-07 21:20:22,921 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:22,921 INFO L276 IsEmpty]: Start isEmpty. Operand 2665 states and 4295 transitions. [2022-04-07 21:20:22,922 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-04-07 21:20:22,922 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 21:20:22,922 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 21:20:22,922 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2022-04-07 21:20:22,923 INFO L403 AbstractCegarLoop]: === Iteration 18 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 21:20:22,923 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 21:20:22,923 INFO L85 PathProgramCache]: Analyzing trace with hash 2115318588, now seen corresponding path program 1 times [2022-04-07 21:20:22,923 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 21:20:22,923 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1662365616] [2022-04-07 21:20:22,923 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 21:20:22,923 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 21:20:22,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:20:22,961 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 21:20:22,962 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:20:22,965 INFO L290 TraceCheckUtils]: 0: Hoare triple {51628#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {51622#true} is VALID [2022-04-07 21:20:22,965 INFO L290 TraceCheckUtils]: 1: Hoare triple {51622#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {51622#true} is VALID [2022-04-07 21:20:22,965 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {51622#true} {51622#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {51622#true} is VALID [2022-04-07 21:20:22,966 INFO L272 TraceCheckUtils]: 0: Hoare triple {51622#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {51628#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 21:20:22,966 INFO L290 TraceCheckUtils]: 1: Hoare triple {51628#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {51622#true} is VALID [2022-04-07 21:20:22,966 INFO L290 TraceCheckUtils]: 2: Hoare triple {51622#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {51622#true} is VALID [2022-04-07 21:20:22,966 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {51622#true} {51622#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {51622#true} is VALID [2022-04-07 21:20:22,966 INFO L272 TraceCheckUtils]: 4: Hoare triple {51622#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {51622#true} is VALID [2022-04-07 21:20:22,967 INFO L290 TraceCheckUtils]: 5: Hoare triple {51622#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {51622#true} is VALID [2022-04-07 21:20:22,967 INFO L290 TraceCheckUtils]: 6: Hoare triple {51622#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {51622#true} is VALID [2022-04-07 21:20:22,967 INFO L290 TraceCheckUtils]: 7: Hoare triple {51622#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {51622#true} is VALID [2022-04-07 21:20:22,967 INFO L290 TraceCheckUtils]: 8: Hoare triple {51622#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {51622#true} is VALID [2022-04-07 21:20:22,968 INFO L290 TraceCheckUtils]: 9: Hoare triple {51622#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {51622#true} is VALID [2022-04-07 21:20:22,968 INFO L290 TraceCheckUtils]: 10: Hoare triple {51622#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {51622#true} is VALID [2022-04-07 21:20:22,968 INFO L290 TraceCheckUtils]: 11: Hoare triple {51622#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {51622#true} is VALID [2022-04-07 21:20:22,968 INFO L290 TraceCheckUtils]: 12: Hoare triple {51622#true} [293] L100-1-->L104-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {51622#true} is VALID [2022-04-07 21:20:22,968 INFO L290 TraceCheckUtils]: 13: Hoare triple {51622#true} [294] L104-1-->L108-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {51627#(not (= main_~p6~0 0))} is VALID [2022-04-07 21:20:22,969 INFO L290 TraceCheckUtils]: 14: Hoare triple {51627#(not (= main_~p6~0 0))} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {51627#(not (= main_~p6~0 0))} is VALID [2022-04-07 21:20:22,969 INFO L290 TraceCheckUtils]: 15: Hoare triple {51627#(not (= main_~p6~0 0))} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {51627#(not (= main_~p6~0 0))} is VALID [2022-04-07 21:20:22,969 INFO L290 TraceCheckUtils]: 16: Hoare triple {51627#(not (= main_~p6~0 0))} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {51627#(not (= main_~p6~0 0))} is VALID [2022-04-07 21:20:22,969 INFO L290 TraceCheckUtils]: 17: Hoare triple {51627#(not (= main_~p6~0 0))} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {51627#(not (= main_~p6~0 0))} is VALID [2022-04-07 21:20:22,970 INFO L290 TraceCheckUtils]: 18: Hoare triple {51627#(not (= main_~p6~0 0))} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {51627#(not (= main_~p6~0 0))} is VALID [2022-04-07 21:20:22,970 INFO L290 TraceCheckUtils]: 19: Hoare triple {51627#(not (= main_~p6~0 0))} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {51627#(not (= main_~p6~0 0))} is VALID [2022-04-07 21:20:22,970 INFO L290 TraceCheckUtils]: 20: Hoare triple {51627#(not (= main_~p6~0 0))} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {51627#(not (= main_~p6~0 0))} is VALID [2022-04-07 21:20:22,970 INFO L290 TraceCheckUtils]: 21: Hoare triple {51627#(not (= main_~p6~0 0))} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {51627#(not (= main_~p6~0 0))} is VALID [2022-04-07 21:20:22,971 INFO L290 TraceCheckUtils]: 22: Hoare triple {51627#(not (= main_~p6~0 0))} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {51627#(not (= main_~p6~0 0))} is VALID [2022-04-07 21:20:22,971 INFO L290 TraceCheckUtils]: 23: Hoare triple {51627#(not (= main_~p6~0 0))} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {51627#(not (= main_~p6~0 0))} is VALID [2022-04-07 21:20:22,971 INFO L290 TraceCheckUtils]: 24: Hoare triple {51627#(not (= main_~p6~0 0))} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {51627#(not (= main_~p6~0 0))} is VALID [2022-04-07 21:20:22,971 INFO L290 TraceCheckUtils]: 25: Hoare triple {51627#(not (= main_~p6~0 0))} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {51627#(not (= main_~p6~0 0))} is VALID [2022-04-07 21:20:22,972 INFO L290 TraceCheckUtils]: 26: Hoare triple {51627#(not (= main_~p6~0 0))} [331] L161-1-->L166-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {51627#(not (= main_~p6~0 0))} is VALID [2022-04-07 21:20:22,972 INFO L290 TraceCheckUtils]: 27: Hoare triple {51627#(not (= main_~p6~0 0))} [335] L166-1-->L171-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {51623#false} is VALID [2022-04-07 21:20:22,972 INFO L290 TraceCheckUtils]: 28: Hoare triple {51623#false} [338] L171-1-->L177: Formula: (not (= v_main_~p7~0_2 0)) InVars {main_~p7~0=v_main_~p7~0_2} OutVars{main_~p7~0=v_main_~p7~0_2} AuxVars[] AssignedVars[] {51623#false} is VALID [2022-04-07 21:20:22,972 INFO L290 TraceCheckUtils]: 29: Hoare triple {51623#false} [340] L177-->L212-1: Formula: (not (= v_main_~lk7~0_3 1)) InVars {main_~lk7~0=v_main_~lk7~0_3} OutVars{main_~lk7~0=v_main_~lk7~0_3} AuxVars[] AssignedVars[] {51623#false} is VALID [2022-04-07 21:20:22,972 INFO L290 TraceCheckUtils]: 30: Hoare triple {51623#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {51623#false} is VALID [2022-04-07 21:20:22,973 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 21:20:22,973 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 21:20:22,973 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1662365616] [2022-04-07 21:20:22,973 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1662365616] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 21:20:22,973 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 21:20:22,973 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-07 21:20:22,973 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [796003899] [2022-04-07 21:20:22,973 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 21:20:22,974 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-07 21:20:22,974 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 21:20:22,974 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:22,990 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 31 edges. 31 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:20:22,990 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-07 21:20:22,990 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 21:20:22,990 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-07 21:20:22,991 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-07 21:20:22,991 INFO L87 Difference]: Start difference. First operand 2665 states and 4295 transitions. Second operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:23,320 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:23,321 INFO L93 Difference]: Finished difference Result 2699 states and 4296 transitions. [2022-04-07 21:20:23,321 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-07 21:20:23,321 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-07 21:20:23,321 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 21:20:23,322 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:23,322 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 166 transitions. [2022-04-07 21:20:23,323 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:23,324 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 166 transitions. [2022-04-07 21:20:23,324 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 166 transitions. [2022-04-07 21:20:23,432 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 166 edges. 166 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:20:23,639 INFO L225 Difference]: With dead ends: 2699 [2022-04-07 21:20:23,639 INFO L226 Difference]: Without dead ends: 2699 [2022-04-07 21:20:23,639 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-07 21:20:23,639 INFO L913 BasicCegarLoop]: 131 mSDtfsCounter, 178 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 82 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 178 SdHoareTripleChecker+Valid, 138 SdHoareTripleChecker+Invalid, 84 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 82 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 21:20:23,640 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [178 Valid, 138 Invalid, 84 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 82 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 21:20:23,641 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2699 states. [2022-04-07 21:20:23,702 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2699 to 2697. [2022-04-07 21:20:23,702 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 21:20:23,706 INFO L82 GeneralOperation]: Start isEquivalent. First operand 2699 states. Second operand has 2697 states, 2693 states have (on average 1.5937616041589306) internal successors, (4292), 2693 states have internal predecessors, (4292), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:23,708 INFO L74 IsIncluded]: Start isIncluded. First operand 2699 states. Second operand has 2697 states, 2693 states have (on average 1.5937616041589306) internal successors, (4292), 2693 states have internal predecessors, (4292), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:23,710 INFO L87 Difference]: Start difference. First operand 2699 states. Second operand has 2697 states, 2693 states have (on average 1.5937616041589306) internal successors, (4292), 2693 states have internal predecessors, (4292), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:23,935 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:23,936 INFO L93 Difference]: Finished difference Result 2699 states and 4296 transitions. [2022-04-07 21:20:23,936 INFO L276 IsEmpty]: Start isEmpty. Operand 2699 states and 4296 transitions. [2022-04-07 21:20:23,939 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:20:23,939 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:20:23,942 INFO L74 IsIncluded]: Start isIncluded. First operand has 2697 states, 2693 states have (on average 1.5937616041589306) internal successors, (4292), 2693 states have internal predecessors, (4292), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 2699 states. [2022-04-07 21:20:23,943 INFO L87 Difference]: Start difference. First operand has 2697 states, 2693 states have (on average 1.5937616041589306) internal successors, (4292), 2693 states have internal predecessors, (4292), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 2699 states. [2022-04-07 21:20:24,137 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:24,137 INFO L93 Difference]: Finished difference Result 2699 states and 4296 transitions. [2022-04-07 21:20:24,137 INFO L276 IsEmpty]: Start isEmpty. Operand 2699 states and 4296 transitions. [2022-04-07 21:20:24,139 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:20:24,140 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:20:24,140 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 21:20:24,140 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 21:20:24,143 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2697 states, 2693 states have (on average 1.5937616041589306) internal successors, (4292), 2693 states have internal predecessors, (4292), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:24,316 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2697 states to 2697 states and 4295 transitions. [2022-04-07 21:20:24,316 INFO L78 Accepts]: Start accepts. Automaton has 2697 states and 4295 transitions. Word has length 31 [2022-04-07 21:20:24,317 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 21:20:24,317 INFO L478 AbstractCegarLoop]: Abstraction has 2697 states and 4295 transitions. [2022-04-07 21:20:24,317 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:24,317 INFO L276 IsEmpty]: Start isEmpty. Operand 2697 states and 4295 transitions. [2022-04-07 21:20:24,318 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-04-07 21:20:24,318 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 21:20:24,318 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 21:20:24,318 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2022-04-07 21:20:24,318 INFO L403 AbstractCegarLoop]: === Iteration 19 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 21:20:24,319 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 21:20:24,319 INFO L85 PathProgramCache]: Analyzing trace with hash 1118246235, now seen corresponding path program 1 times [2022-04-07 21:20:24,319 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 21:20:24,319 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [421717721] [2022-04-07 21:20:24,319 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 21:20:24,319 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 21:20:24,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:20:24,341 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 21:20:24,342 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:20:24,348 INFO L290 TraceCheckUtils]: 0: Hoare triple {62434#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {62428#true} is VALID [2022-04-07 21:20:24,349 INFO L290 TraceCheckUtils]: 1: Hoare triple {62428#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {62428#true} is VALID [2022-04-07 21:20:24,349 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {62428#true} {62428#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {62428#true} is VALID [2022-04-07 21:20:24,349 INFO L272 TraceCheckUtils]: 0: Hoare triple {62428#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {62434#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 21:20:24,349 INFO L290 TraceCheckUtils]: 1: Hoare triple {62434#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {62428#true} is VALID [2022-04-07 21:20:24,349 INFO L290 TraceCheckUtils]: 2: Hoare triple {62428#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {62428#true} is VALID [2022-04-07 21:20:24,349 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {62428#true} {62428#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {62428#true} is VALID [2022-04-07 21:20:24,349 INFO L272 TraceCheckUtils]: 4: Hoare triple {62428#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {62428#true} is VALID [2022-04-07 21:20:24,350 INFO L290 TraceCheckUtils]: 5: Hoare triple {62428#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {62428#true} is VALID [2022-04-07 21:20:24,350 INFO L290 TraceCheckUtils]: 6: Hoare triple {62428#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {62428#true} is VALID [2022-04-07 21:20:24,350 INFO L290 TraceCheckUtils]: 7: Hoare triple {62428#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {62428#true} is VALID [2022-04-07 21:20:24,350 INFO L290 TraceCheckUtils]: 8: Hoare triple {62428#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {62428#true} is VALID [2022-04-07 21:20:24,350 INFO L290 TraceCheckUtils]: 9: Hoare triple {62428#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {62428#true} is VALID [2022-04-07 21:20:24,350 INFO L290 TraceCheckUtils]: 10: Hoare triple {62428#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {62428#true} is VALID [2022-04-07 21:20:24,350 INFO L290 TraceCheckUtils]: 11: Hoare triple {62428#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {62428#true} is VALID [2022-04-07 21:20:24,350 INFO L290 TraceCheckUtils]: 12: Hoare triple {62428#true} [293] L100-1-->L104-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {62428#true} is VALID [2022-04-07 21:20:24,350 INFO L290 TraceCheckUtils]: 13: Hoare triple {62428#true} [295] L104-1-->L108-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {62428#true} is VALID [2022-04-07 21:20:24,350 INFO L290 TraceCheckUtils]: 14: Hoare triple {62428#true} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {62433#(= main_~lk7~0 1)} is VALID [2022-04-07 21:20:24,351 INFO L290 TraceCheckUtils]: 15: Hoare triple {62433#(= main_~lk7~0 1)} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {62433#(= main_~lk7~0 1)} is VALID [2022-04-07 21:20:24,351 INFO L290 TraceCheckUtils]: 16: Hoare triple {62433#(= main_~lk7~0 1)} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {62433#(= main_~lk7~0 1)} is VALID [2022-04-07 21:20:24,351 INFO L290 TraceCheckUtils]: 17: Hoare triple {62433#(= main_~lk7~0 1)} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {62433#(= main_~lk7~0 1)} is VALID [2022-04-07 21:20:24,352 INFO L290 TraceCheckUtils]: 18: Hoare triple {62433#(= main_~lk7~0 1)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {62433#(= main_~lk7~0 1)} is VALID [2022-04-07 21:20:24,352 INFO L290 TraceCheckUtils]: 19: Hoare triple {62433#(= main_~lk7~0 1)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {62433#(= main_~lk7~0 1)} is VALID [2022-04-07 21:20:24,352 INFO L290 TraceCheckUtils]: 20: Hoare triple {62433#(= main_~lk7~0 1)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {62433#(= main_~lk7~0 1)} is VALID [2022-04-07 21:20:24,352 INFO L290 TraceCheckUtils]: 21: Hoare triple {62433#(= main_~lk7~0 1)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {62433#(= main_~lk7~0 1)} is VALID [2022-04-07 21:20:24,353 INFO L290 TraceCheckUtils]: 22: Hoare triple {62433#(= main_~lk7~0 1)} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {62433#(= main_~lk7~0 1)} is VALID [2022-04-07 21:20:24,353 INFO L290 TraceCheckUtils]: 23: Hoare triple {62433#(= main_~lk7~0 1)} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {62433#(= main_~lk7~0 1)} is VALID [2022-04-07 21:20:24,353 INFO L290 TraceCheckUtils]: 24: Hoare triple {62433#(= main_~lk7~0 1)} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {62433#(= main_~lk7~0 1)} is VALID [2022-04-07 21:20:24,353 INFO L290 TraceCheckUtils]: 25: Hoare triple {62433#(= main_~lk7~0 1)} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {62433#(= main_~lk7~0 1)} is VALID [2022-04-07 21:20:24,354 INFO L290 TraceCheckUtils]: 26: Hoare triple {62433#(= main_~lk7~0 1)} [331] L161-1-->L166-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {62433#(= main_~lk7~0 1)} is VALID [2022-04-07 21:20:24,354 INFO L290 TraceCheckUtils]: 27: Hoare triple {62433#(= main_~lk7~0 1)} [335] L166-1-->L171-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {62433#(= main_~lk7~0 1)} is VALID [2022-04-07 21:20:24,354 INFO L290 TraceCheckUtils]: 28: Hoare triple {62433#(= main_~lk7~0 1)} [338] L171-1-->L177: Formula: (not (= v_main_~p7~0_2 0)) InVars {main_~p7~0=v_main_~p7~0_2} OutVars{main_~p7~0=v_main_~p7~0_2} AuxVars[] AssignedVars[] {62433#(= main_~lk7~0 1)} is VALID [2022-04-07 21:20:24,354 INFO L290 TraceCheckUtils]: 29: Hoare triple {62433#(= main_~lk7~0 1)} [340] L177-->L212-1: Formula: (not (= v_main_~lk7~0_3 1)) InVars {main_~lk7~0=v_main_~lk7~0_3} OutVars{main_~lk7~0=v_main_~lk7~0_3} AuxVars[] AssignedVars[] {62429#false} is VALID [2022-04-07 21:20:24,354 INFO L290 TraceCheckUtils]: 30: Hoare triple {62429#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {62429#false} is VALID [2022-04-07 21:20:24,355 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 21:20:24,355 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 21:20:24,355 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [421717721] [2022-04-07 21:20:24,355 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [421717721] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 21:20:24,355 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 21:20:24,355 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-07 21:20:24,355 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [91845691] [2022-04-07 21:20:24,355 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 21:20:24,356 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-07 21:20:24,356 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 21:20:24,356 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:24,371 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 31 edges. 31 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:20:24,372 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-07 21:20:24,372 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 21:20:24,372 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-07 21:20:24,372 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-07 21:20:24,372 INFO L87 Difference]: Start difference. First operand 2697 states and 4295 transitions. Second operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:25,154 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:25,154 INFO L93 Difference]: Finished difference Result 4875 states and 7880 transitions. [2022-04-07 21:20:25,154 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-07 21:20:25,154 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-07 21:20:25,154 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 21:20:25,154 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:25,155 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 154 transitions. [2022-04-07 21:20:25,155 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:25,156 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 154 transitions. [2022-04-07 21:20:25,156 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 154 transitions. [2022-04-07 21:20:25,257 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 154 edges. 154 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:20:25,905 INFO L225 Difference]: With dead ends: 4875 [2022-04-07 21:20:25,906 INFO L226 Difference]: Without dead ends: 4875 [2022-04-07 21:20:25,906 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-07 21:20:25,906 INFO L913 BasicCegarLoop]: 89 mSDtfsCounter, 194 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 84 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 194 SdHoareTripleChecker+Valid, 96 SdHoareTripleChecker+Invalid, 86 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 84 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 21:20:25,906 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [194 Valid, 96 Invalid, 86 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 84 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 21:20:25,909 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4875 states. [2022-04-07 21:20:25,940 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4875 to 3849. [2022-04-07 21:20:25,940 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 21:20:25,944 INFO L82 GeneralOperation]: Start isEquivalent. First operand 4875 states. Second operand has 3849 states, 3845 states have (on average 1.5490247074122236) internal successors, (5956), 3845 states have internal predecessors, (5956), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:25,947 INFO L74 IsIncluded]: Start isIncluded. First operand 4875 states. Second operand has 3849 states, 3845 states have (on average 1.5490247074122236) internal successors, (5956), 3845 states have internal predecessors, (5956), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:25,949 INFO L87 Difference]: Start difference. First operand 4875 states. Second operand has 3849 states, 3845 states have (on average 1.5490247074122236) internal successors, (5956), 3845 states have internal predecessors, (5956), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:26,542 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:26,542 INFO L93 Difference]: Finished difference Result 4875 states and 7880 transitions. [2022-04-07 21:20:26,543 INFO L276 IsEmpty]: Start isEmpty. Operand 4875 states and 7880 transitions. [2022-04-07 21:20:26,547 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:20:26,547 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:20:26,551 INFO L74 IsIncluded]: Start isIncluded. First operand has 3849 states, 3845 states have (on average 1.5490247074122236) internal successors, (5956), 3845 states have internal predecessors, (5956), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 4875 states. [2022-04-07 21:20:26,553 INFO L87 Difference]: Start difference. First operand has 3849 states, 3845 states have (on average 1.5490247074122236) internal successors, (5956), 3845 states have internal predecessors, (5956), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 4875 states. [2022-04-07 21:20:27,140 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:27,141 INFO L93 Difference]: Finished difference Result 4875 states and 7880 transitions. [2022-04-07 21:20:27,141 INFO L276 IsEmpty]: Start isEmpty. Operand 4875 states and 7880 transitions. [2022-04-07 21:20:27,145 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:20:27,145 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:20:27,145 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 21:20:27,145 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 21:20:27,148 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3849 states, 3845 states have (on average 1.5490247074122236) internal successors, (5956), 3845 states have internal predecessors, (5956), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:27,549 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3849 states to 3849 states and 5959 transitions. [2022-04-07 21:20:27,550 INFO L78 Accepts]: Start accepts. Automaton has 3849 states and 5959 transitions. Word has length 31 [2022-04-07 21:20:27,550 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 21:20:27,550 INFO L478 AbstractCegarLoop]: Abstraction has 3849 states and 5959 transitions. [2022-04-07 21:20:27,550 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:27,550 INFO L276 IsEmpty]: Start isEmpty. Operand 3849 states and 5959 transitions. [2022-04-07 21:20:27,552 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-04-07 21:20:27,553 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 21:20:27,553 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 21:20:27,553 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2022-04-07 21:20:27,553 INFO L403 AbstractCegarLoop]: === Iteration 20 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 21:20:27,553 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 21:20:27,553 INFO L85 PathProgramCache]: Analyzing trace with hash -1823411364, now seen corresponding path program 1 times [2022-04-07 21:20:27,554 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 21:20:27,554 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1399070169] [2022-04-07 21:20:27,554 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 21:20:27,554 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 21:20:27,588 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:20:27,601 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 21:20:27,602 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:20:27,604 INFO L290 TraceCheckUtils]: 0: Hoare triple {80920#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {80914#true} is VALID [2022-04-07 21:20:27,604 INFO L290 TraceCheckUtils]: 1: Hoare triple {80914#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {80914#true} is VALID [2022-04-07 21:20:27,604 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {80914#true} {80914#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {80914#true} is VALID [2022-04-07 21:20:27,605 INFO L272 TraceCheckUtils]: 0: Hoare triple {80914#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {80920#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 21:20:27,605 INFO L290 TraceCheckUtils]: 1: Hoare triple {80920#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {80914#true} is VALID [2022-04-07 21:20:27,605 INFO L290 TraceCheckUtils]: 2: Hoare triple {80914#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {80914#true} is VALID [2022-04-07 21:20:27,605 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {80914#true} {80914#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {80914#true} is VALID [2022-04-07 21:20:27,605 INFO L272 TraceCheckUtils]: 4: Hoare triple {80914#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {80914#true} is VALID [2022-04-07 21:20:27,605 INFO L290 TraceCheckUtils]: 5: Hoare triple {80914#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {80914#true} is VALID [2022-04-07 21:20:27,605 INFO L290 TraceCheckUtils]: 6: Hoare triple {80914#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {80914#true} is VALID [2022-04-07 21:20:27,605 INFO L290 TraceCheckUtils]: 7: Hoare triple {80914#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {80914#true} is VALID [2022-04-07 21:20:27,605 INFO L290 TraceCheckUtils]: 8: Hoare triple {80914#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {80914#true} is VALID [2022-04-07 21:20:27,605 INFO L290 TraceCheckUtils]: 9: Hoare triple {80914#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {80914#true} is VALID [2022-04-07 21:20:27,605 INFO L290 TraceCheckUtils]: 10: Hoare triple {80914#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {80914#true} is VALID [2022-04-07 21:20:27,606 INFO L290 TraceCheckUtils]: 11: Hoare triple {80914#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {80914#true} is VALID [2022-04-07 21:20:27,606 INFO L290 TraceCheckUtils]: 12: Hoare triple {80914#true} [293] L100-1-->L104-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {80914#true} is VALID [2022-04-07 21:20:27,606 INFO L290 TraceCheckUtils]: 13: Hoare triple {80914#true} [295] L104-1-->L108-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {80914#true} is VALID [2022-04-07 21:20:27,606 INFO L290 TraceCheckUtils]: 14: Hoare triple {80914#true} [297] L108-1-->L112-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {80919#(= main_~p7~0 0)} is VALID [2022-04-07 21:20:27,606 INFO L290 TraceCheckUtils]: 15: Hoare triple {80919#(= main_~p7~0 0)} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {80919#(= main_~p7~0 0)} is VALID [2022-04-07 21:20:27,606 INFO L290 TraceCheckUtils]: 16: Hoare triple {80919#(= main_~p7~0 0)} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {80919#(= main_~p7~0 0)} is VALID [2022-04-07 21:20:27,607 INFO L290 TraceCheckUtils]: 17: Hoare triple {80919#(= main_~p7~0 0)} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {80919#(= main_~p7~0 0)} is VALID [2022-04-07 21:20:27,607 INFO L290 TraceCheckUtils]: 18: Hoare triple {80919#(= main_~p7~0 0)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {80919#(= main_~p7~0 0)} is VALID [2022-04-07 21:20:27,607 INFO L290 TraceCheckUtils]: 19: Hoare triple {80919#(= main_~p7~0 0)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {80919#(= main_~p7~0 0)} is VALID [2022-04-07 21:20:27,607 INFO L290 TraceCheckUtils]: 20: Hoare triple {80919#(= main_~p7~0 0)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {80919#(= main_~p7~0 0)} is VALID [2022-04-07 21:20:27,608 INFO L290 TraceCheckUtils]: 21: Hoare triple {80919#(= main_~p7~0 0)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {80919#(= main_~p7~0 0)} is VALID [2022-04-07 21:20:27,608 INFO L290 TraceCheckUtils]: 22: Hoare triple {80919#(= main_~p7~0 0)} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {80919#(= main_~p7~0 0)} is VALID [2022-04-07 21:20:27,608 INFO L290 TraceCheckUtils]: 23: Hoare triple {80919#(= main_~p7~0 0)} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {80919#(= main_~p7~0 0)} is VALID [2022-04-07 21:20:27,608 INFO L290 TraceCheckUtils]: 24: Hoare triple {80919#(= main_~p7~0 0)} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {80919#(= main_~p7~0 0)} is VALID [2022-04-07 21:20:27,609 INFO L290 TraceCheckUtils]: 25: Hoare triple {80919#(= main_~p7~0 0)} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {80919#(= main_~p7~0 0)} is VALID [2022-04-07 21:20:27,609 INFO L290 TraceCheckUtils]: 26: Hoare triple {80919#(= main_~p7~0 0)} [331] L161-1-->L166-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {80919#(= main_~p7~0 0)} is VALID [2022-04-07 21:20:27,609 INFO L290 TraceCheckUtils]: 27: Hoare triple {80919#(= main_~p7~0 0)} [335] L166-1-->L171-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {80919#(= main_~p7~0 0)} is VALID [2022-04-07 21:20:27,609 INFO L290 TraceCheckUtils]: 28: Hoare triple {80919#(= main_~p7~0 0)} [338] L171-1-->L177: Formula: (not (= v_main_~p7~0_2 0)) InVars {main_~p7~0=v_main_~p7~0_2} OutVars{main_~p7~0=v_main_~p7~0_2} AuxVars[] AssignedVars[] {80915#false} is VALID [2022-04-07 21:20:27,610 INFO L290 TraceCheckUtils]: 29: Hoare triple {80915#false} [340] L177-->L212-1: Formula: (not (= v_main_~lk7~0_3 1)) InVars {main_~lk7~0=v_main_~lk7~0_3} OutVars{main_~lk7~0=v_main_~lk7~0_3} AuxVars[] AssignedVars[] {80915#false} is VALID [2022-04-07 21:20:27,610 INFO L290 TraceCheckUtils]: 30: Hoare triple {80915#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {80915#false} is VALID [2022-04-07 21:20:27,610 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 21:20:27,610 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 21:20:27,610 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1399070169] [2022-04-07 21:20:27,610 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1399070169] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 21:20:27,610 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 21:20:27,610 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-07 21:20:27,610 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1392202517] [2022-04-07 21:20:27,610 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 21:20:27,611 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-07 21:20:27,611 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 21:20:27,611 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:27,627 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 31 edges. 31 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:20:27,627 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-07 21:20:27,627 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 21:20:27,628 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-07 21:20:27,628 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-07 21:20:27,628 INFO L87 Difference]: Start difference. First operand 3849 states and 5959 transitions. Second operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:28,925 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:28,926 INFO L93 Difference]: Finished difference Result 5259 states and 8136 transitions. [2022-04-07 21:20:28,926 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-07 21:20:28,926 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-07 21:20:28,926 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 21:20:28,926 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:28,927 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 165 transitions. [2022-04-07 21:20:28,928 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:28,928 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 165 transitions. [2022-04-07 21:20:28,929 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 165 transitions. [2022-04-07 21:20:29,053 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 165 edges. 165 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:20:30,280 INFO L225 Difference]: With dead ends: 5259 [2022-04-07 21:20:30,280 INFO L226 Difference]: Without dead ends: 5259 [2022-04-07 21:20:30,280 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-07 21:20:30,281 INFO L913 BasicCegarLoop]: 132 mSDtfsCounter, 172 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 82 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 172 SdHoareTripleChecker+Valid, 139 SdHoareTripleChecker+Invalid, 85 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 82 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 21:20:30,282 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [172 Valid, 139 Invalid, 85 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 82 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-07 21:20:30,285 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5259 states. [2022-04-07 21:20:30,338 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5259 to 5257. [2022-04-07 21:20:30,339 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 21:20:30,346 INFO L82 GeneralOperation]: Start isEquivalent. First operand 5259 states. Second operand has 5257 states, 5253 states have (on average 1.5480677707976394) internal successors, (8132), 5253 states have internal predecessors, (8132), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:30,352 INFO L74 IsIncluded]: Start isIncluded. First operand 5259 states. Second operand has 5257 states, 5253 states have (on average 1.5480677707976394) internal successors, (8132), 5253 states have internal predecessors, (8132), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:30,358 INFO L87 Difference]: Start difference. First operand 5259 states. Second operand has 5257 states, 5253 states have (on average 1.5480677707976394) internal successors, (8132), 5253 states have internal predecessors, (8132), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:31,443 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:31,443 INFO L93 Difference]: Finished difference Result 5259 states and 8136 transitions. [2022-04-07 21:20:31,443 INFO L276 IsEmpty]: Start isEmpty. Operand 5259 states and 8136 transitions. [2022-04-07 21:20:31,449 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:20:31,449 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:20:31,456 INFO L74 IsIncluded]: Start isIncluded. First operand has 5257 states, 5253 states have (on average 1.5480677707976394) internal successors, (8132), 5253 states have internal predecessors, (8132), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 5259 states. [2022-04-07 21:20:31,463 INFO L87 Difference]: Start difference. First operand has 5257 states, 5253 states have (on average 1.5480677707976394) internal successors, (8132), 5253 states have internal predecessors, (8132), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 5259 states. [2022-04-07 21:20:32,507 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:32,508 INFO L93 Difference]: Finished difference Result 5259 states and 8136 transitions. [2022-04-07 21:20:32,508 INFO L276 IsEmpty]: Start isEmpty. Operand 5259 states and 8136 transitions. [2022-04-07 21:20:32,515 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:20:32,515 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:20:32,515 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 21:20:32,515 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 21:20:32,519 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5257 states, 5253 states have (on average 1.5480677707976394) internal successors, (8132), 5253 states have internal predecessors, (8132), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:33,187 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5257 states to 5257 states and 8135 transitions. [2022-04-07 21:20:33,188 INFO L78 Accepts]: Start accepts. Automaton has 5257 states and 8135 transitions. Word has length 31 [2022-04-07 21:20:33,215 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 21:20:33,215 INFO L478 AbstractCegarLoop]: Abstraction has 5257 states and 8135 transitions. [2022-04-07 21:20:33,215 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:33,216 INFO L276 IsEmpty]: Start isEmpty. Operand 5257 states and 8135 transitions. [2022-04-07 21:20:33,217 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2022-04-07 21:20:33,217 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 21:20:33,218 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 21:20:33,218 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2022-04-07 21:20:33,218 INFO L403 AbstractCegarLoop]: === Iteration 21 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 21:20:33,220 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 21:20:33,220 INFO L85 PathProgramCache]: Analyzing trace with hash 305927754, now seen corresponding path program 1 times [2022-04-07 21:20:33,220 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 21:20:33,220 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [80087517] [2022-04-07 21:20:33,221 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 21:20:33,221 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 21:20:33,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:20:33,245 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 21:20:33,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:20:33,248 INFO L290 TraceCheckUtils]: 0: Hoare triple {101966#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {101960#true} is VALID [2022-04-07 21:20:33,249 INFO L290 TraceCheckUtils]: 1: Hoare triple {101960#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {101960#true} is VALID [2022-04-07 21:20:33,249 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {101960#true} {101960#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {101960#true} is VALID [2022-04-07 21:20:33,249 INFO L272 TraceCheckUtils]: 0: Hoare triple {101960#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {101966#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 21:20:33,249 INFO L290 TraceCheckUtils]: 1: Hoare triple {101966#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {101960#true} is VALID [2022-04-07 21:20:33,249 INFO L290 TraceCheckUtils]: 2: Hoare triple {101960#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {101960#true} is VALID [2022-04-07 21:20:33,249 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {101960#true} {101960#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {101960#true} is VALID [2022-04-07 21:20:33,249 INFO L272 TraceCheckUtils]: 4: Hoare triple {101960#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {101960#true} is VALID [2022-04-07 21:20:33,250 INFO L290 TraceCheckUtils]: 5: Hoare triple {101960#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {101960#true} is VALID [2022-04-07 21:20:33,250 INFO L290 TraceCheckUtils]: 6: Hoare triple {101960#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {101960#true} is VALID [2022-04-07 21:20:33,250 INFO L290 TraceCheckUtils]: 7: Hoare triple {101960#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {101960#true} is VALID [2022-04-07 21:20:33,250 INFO L290 TraceCheckUtils]: 8: Hoare triple {101960#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {101960#true} is VALID [2022-04-07 21:20:33,250 INFO L290 TraceCheckUtils]: 9: Hoare triple {101960#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {101960#true} is VALID [2022-04-07 21:20:33,250 INFO L290 TraceCheckUtils]: 10: Hoare triple {101960#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {101960#true} is VALID [2022-04-07 21:20:33,250 INFO L290 TraceCheckUtils]: 11: Hoare triple {101960#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {101960#true} is VALID [2022-04-07 21:20:33,250 INFO L290 TraceCheckUtils]: 12: Hoare triple {101960#true} [293] L100-1-->L104-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {101960#true} is VALID [2022-04-07 21:20:33,250 INFO L290 TraceCheckUtils]: 13: Hoare triple {101960#true} [295] L104-1-->L108-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {101960#true} is VALID [2022-04-07 21:20:33,251 INFO L290 TraceCheckUtils]: 14: Hoare triple {101960#true} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {101965#(not (= main_~p7~0 0))} is VALID [2022-04-07 21:20:33,251 INFO L290 TraceCheckUtils]: 15: Hoare triple {101965#(not (= main_~p7~0 0))} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {101965#(not (= main_~p7~0 0))} is VALID [2022-04-07 21:20:33,251 INFO L290 TraceCheckUtils]: 16: Hoare triple {101965#(not (= main_~p7~0 0))} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {101965#(not (= main_~p7~0 0))} is VALID [2022-04-07 21:20:33,251 INFO L290 TraceCheckUtils]: 17: Hoare triple {101965#(not (= main_~p7~0 0))} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {101965#(not (= main_~p7~0 0))} is VALID [2022-04-07 21:20:33,252 INFO L290 TraceCheckUtils]: 18: Hoare triple {101965#(not (= main_~p7~0 0))} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {101965#(not (= main_~p7~0 0))} is VALID [2022-04-07 21:20:33,252 INFO L290 TraceCheckUtils]: 19: Hoare triple {101965#(not (= main_~p7~0 0))} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {101965#(not (= main_~p7~0 0))} is VALID [2022-04-07 21:20:33,252 INFO L290 TraceCheckUtils]: 20: Hoare triple {101965#(not (= main_~p7~0 0))} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {101965#(not (= main_~p7~0 0))} is VALID [2022-04-07 21:20:33,252 INFO L290 TraceCheckUtils]: 21: Hoare triple {101965#(not (= main_~p7~0 0))} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {101965#(not (= main_~p7~0 0))} is VALID [2022-04-07 21:20:33,253 INFO L290 TraceCheckUtils]: 22: Hoare triple {101965#(not (= main_~p7~0 0))} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {101965#(not (= main_~p7~0 0))} is VALID [2022-04-07 21:20:33,253 INFO L290 TraceCheckUtils]: 23: Hoare triple {101965#(not (= main_~p7~0 0))} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {101965#(not (= main_~p7~0 0))} is VALID [2022-04-07 21:20:33,253 INFO L290 TraceCheckUtils]: 24: Hoare triple {101965#(not (= main_~p7~0 0))} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {101965#(not (= main_~p7~0 0))} is VALID [2022-04-07 21:20:33,253 INFO L290 TraceCheckUtils]: 25: Hoare triple {101965#(not (= main_~p7~0 0))} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {101965#(not (= main_~p7~0 0))} is VALID [2022-04-07 21:20:33,254 INFO L290 TraceCheckUtils]: 26: Hoare triple {101965#(not (= main_~p7~0 0))} [331] L161-1-->L166-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {101965#(not (= main_~p7~0 0))} is VALID [2022-04-07 21:20:33,254 INFO L290 TraceCheckUtils]: 27: Hoare triple {101965#(not (= main_~p7~0 0))} [335] L166-1-->L171-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {101965#(not (= main_~p7~0 0))} is VALID [2022-04-07 21:20:33,254 INFO L290 TraceCheckUtils]: 28: Hoare triple {101965#(not (= main_~p7~0 0))} [339] L171-1-->L176-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {101961#false} is VALID [2022-04-07 21:20:33,254 INFO L290 TraceCheckUtils]: 29: Hoare triple {101961#false} [342] L176-1-->L182: Formula: (not (= v_main_~p8~0_2 0)) InVars {main_~p8~0=v_main_~p8~0_2} OutVars{main_~p8~0=v_main_~p8~0_2} AuxVars[] AssignedVars[] {101961#false} is VALID [2022-04-07 21:20:33,254 INFO L290 TraceCheckUtils]: 30: Hoare triple {101961#false} [344] L182-->L212-1: Formula: (not (= v_main_~lk8~0_3 1)) InVars {main_~lk8~0=v_main_~lk8~0_3} OutVars{main_~lk8~0=v_main_~lk8~0_3} AuxVars[] AssignedVars[] {101961#false} is VALID [2022-04-07 21:20:33,254 INFO L290 TraceCheckUtils]: 31: Hoare triple {101961#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {101961#false} is VALID [2022-04-07 21:20:33,255 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 21:20:33,255 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 21:20:33,255 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [80087517] [2022-04-07 21:20:33,255 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [80087517] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 21:20:33,255 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 21:20:33,255 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-07 21:20:33,255 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [416284553] [2022-04-07 21:20:33,255 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 21:20:33,255 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-07 21:20:33,255 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 21:20:33,256 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:33,272 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 32 edges. 32 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:20:33,272 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-07 21:20:33,273 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 21:20:33,273 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-07 21:20:33,273 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-07 21:20:33,273 INFO L87 Difference]: Start difference. First operand 5257 states and 8135 transitions. Second operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:34,192 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:34,192 INFO L93 Difference]: Finished difference Result 5323 states and 8136 transitions. [2022-04-07 21:20:34,192 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-07 21:20:34,192 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-07 21:20:34,193 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 21:20:34,193 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:34,193 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 164 transitions. [2022-04-07 21:20:34,194 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:34,194 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 164 transitions. [2022-04-07 21:20:34,194 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 164 transitions. [2022-04-07 21:20:34,305 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 164 edges. 164 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:20:35,101 INFO L225 Difference]: With dead ends: 5323 [2022-04-07 21:20:35,101 INFO L226 Difference]: Without dead ends: 5323 [2022-04-07 21:20:35,101 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-07 21:20:35,102 INFO L913 BasicCegarLoop]: 128 mSDtfsCounter, 177 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 81 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 177 SdHoareTripleChecker+Valid, 135 SdHoareTripleChecker+Invalid, 83 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 81 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 21:20:35,102 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [177 Valid, 135 Invalid, 83 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 81 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 21:20:35,105 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5323 states. [2022-04-07 21:20:35,147 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5323 to 5321. [2022-04-07 21:20:35,148 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 21:20:35,153 INFO L82 GeneralOperation]: Start isEquivalent. First operand 5323 states. Second operand has 5321 states, 5317 states have (on average 1.529433891292082) internal successors, (8132), 5317 states have internal predecessors, (8132), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:35,156 INFO L74 IsIncluded]: Start isIncluded. First operand 5323 states. Second operand has 5321 states, 5317 states have (on average 1.529433891292082) internal successors, (8132), 5317 states have internal predecessors, (8132), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:35,159 INFO L87 Difference]: Start difference. First operand 5323 states. Second operand has 5321 states, 5317 states have (on average 1.529433891292082) internal successors, (8132), 5317 states have internal predecessors, (8132), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:35,863 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:35,863 INFO L93 Difference]: Finished difference Result 5323 states and 8136 transitions. [2022-04-07 21:20:35,864 INFO L276 IsEmpty]: Start isEmpty. Operand 5323 states and 8136 transitions. [2022-04-07 21:20:35,867 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:20:35,867 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:20:35,872 INFO L74 IsIncluded]: Start isIncluded. First operand has 5321 states, 5317 states have (on average 1.529433891292082) internal successors, (8132), 5317 states have internal predecessors, (8132), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 5323 states. [2022-04-07 21:20:35,895 INFO L87 Difference]: Start difference. First operand has 5321 states, 5317 states have (on average 1.529433891292082) internal successors, (8132), 5317 states have internal predecessors, (8132), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 5323 states. [2022-04-07 21:20:36,614 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:36,614 INFO L93 Difference]: Finished difference Result 5323 states and 8136 transitions. [2022-04-07 21:20:36,614 INFO L276 IsEmpty]: Start isEmpty. Operand 5323 states and 8136 transitions. [2022-04-07 21:20:36,617 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:20:36,618 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:20:36,618 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 21:20:36,618 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 21:20:36,622 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5321 states, 5317 states have (on average 1.529433891292082) internal successors, (8132), 5317 states have internal predecessors, (8132), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:37,309 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5321 states to 5321 states and 8135 transitions. [2022-04-07 21:20:37,309 INFO L78 Accepts]: Start accepts. Automaton has 5321 states and 8135 transitions. Word has length 32 [2022-04-07 21:20:37,310 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 21:20:37,310 INFO L478 AbstractCegarLoop]: Abstraction has 5321 states and 8135 transitions. [2022-04-07 21:20:37,310 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:37,310 INFO L276 IsEmpty]: Start isEmpty. Operand 5321 states and 8135 transitions. [2022-04-07 21:20:37,312 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2022-04-07 21:20:37,312 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 21:20:37,312 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 21:20:37,312 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2022-04-07 21:20:37,312 INFO L403 AbstractCegarLoop]: === Iteration 22 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 21:20:37,313 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 21:20:37,313 INFO L85 PathProgramCache]: Analyzing trace with hash -691144599, now seen corresponding path program 1 times [2022-04-07 21:20:37,313 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 21:20:37,313 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1071214527] [2022-04-07 21:20:37,313 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 21:20:37,313 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 21:20:37,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:20:37,343 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 21:20:37,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:20:37,348 INFO L290 TraceCheckUtils]: 0: Hoare triple {123268#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {123262#true} is VALID [2022-04-07 21:20:37,348 INFO L290 TraceCheckUtils]: 1: Hoare triple {123262#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {123262#true} is VALID [2022-04-07 21:20:37,348 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {123262#true} {123262#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {123262#true} is VALID [2022-04-07 21:20:37,349 INFO L272 TraceCheckUtils]: 0: Hoare triple {123262#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {123268#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 21:20:37,349 INFO L290 TraceCheckUtils]: 1: Hoare triple {123268#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {123262#true} is VALID [2022-04-07 21:20:37,349 INFO L290 TraceCheckUtils]: 2: Hoare triple {123262#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {123262#true} is VALID [2022-04-07 21:20:37,349 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {123262#true} {123262#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {123262#true} is VALID [2022-04-07 21:20:37,349 INFO L272 TraceCheckUtils]: 4: Hoare triple {123262#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {123262#true} is VALID [2022-04-07 21:20:37,349 INFO L290 TraceCheckUtils]: 5: Hoare triple {123262#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {123262#true} is VALID [2022-04-07 21:20:37,350 INFO L290 TraceCheckUtils]: 6: Hoare triple {123262#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {123262#true} is VALID [2022-04-07 21:20:37,350 INFO L290 TraceCheckUtils]: 7: Hoare triple {123262#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {123262#true} is VALID [2022-04-07 21:20:37,350 INFO L290 TraceCheckUtils]: 8: Hoare triple {123262#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {123262#true} is VALID [2022-04-07 21:20:37,350 INFO L290 TraceCheckUtils]: 9: Hoare triple {123262#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {123262#true} is VALID [2022-04-07 21:20:37,350 INFO L290 TraceCheckUtils]: 10: Hoare triple {123262#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {123262#true} is VALID [2022-04-07 21:20:37,350 INFO L290 TraceCheckUtils]: 11: Hoare triple {123262#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {123262#true} is VALID [2022-04-07 21:20:37,350 INFO L290 TraceCheckUtils]: 12: Hoare triple {123262#true} [293] L100-1-->L104-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {123262#true} is VALID [2022-04-07 21:20:37,351 INFO L290 TraceCheckUtils]: 13: Hoare triple {123262#true} [295] L104-1-->L108-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {123262#true} is VALID [2022-04-07 21:20:37,351 INFO L290 TraceCheckUtils]: 14: Hoare triple {123262#true} [297] L108-1-->L112-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {123262#true} is VALID [2022-04-07 21:20:37,351 INFO L290 TraceCheckUtils]: 15: Hoare triple {123262#true} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {123267#(= main_~lk8~0 1)} is VALID [2022-04-07 21:20:37,352 INFO L290 TraceCheckUtils]: 16: Hoare triple {123267#(= main_~lk8~0 1)} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {123267#(= main_~lk8~0 1)} is VALID [2022-04-07 21:20:37,352 INFO L290 TraceCheckUtils]: 17: Hoare triple {123267#(= main_~lk8~0 1)} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {123267#(= main_~lk8~0 1)} is VALID [2022-04-07 21:20:37,352 INFO L290 TraceCheckUtils]: 18: Hoare triple {123267#(= main_~lk8~0 1)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {123267#(= main_~lk8~0 1)} is VALID [2022-04-07 21:20:37,353 INFO L290 TraceCheckUtils]: 19: Hoare triple {123267#(= main_~lk8~0 1)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {123267#(= main_~lk8~0 1)} is VALID [2022-04-07 21:20:37,353 INFO L290 TraceCheckUtils]: 20: Hoare triple {123267#(= main_~lk8~0 1)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {123267#(= main_~lk8~0 1)} is VALID [2022-04-07 21:20:37,353 INFO L290 TraceCheckUtils]: 21: Hoare triple {123267#(= main_~lk8~0 1)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {123267#(= main_~lk8~0 1)} is VALID [2022-04-07 21:20:37,354 INFO L290 TraceCheckUtils]: 22: Hoare triple {123267#(= main_~lk8~0 1)} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {123267#(= main_~lk8~0 1)} is VALID [2022-04-07 21:20:37,354 INFO L290 TraceCheckUtils]: 23: Hoare triple {123267#(= main_~lk8~0 1)} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {123267#(= main_~lk8~0 1)} is VALID [2022-04-07 21:20:37,354 INFO L290 TraceCheckUtils]: 24: Hoare triple {123267#(= main_~lk8~0 1)} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {123267#(= main_~lk8~0 1)} is VALID [2022-04-07 21:20:37,355 INFO L290 TraceCheckUtils]: 25: Hoare triple {123267#(= main_~lk8~0 1)} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {123267#(= main_~lk8~0 1)} is VALID [2022-04-07 21:20:37,355 INFO L290 TraceCheckUtils]: 26: Hoare triple {123267#(= main_~lk8~0 1)} [331] L161-1-->L166-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {123267#(= main_~lk8~0 1)} is VALID [2022-04-07 21:20:37,355 INFO L290 TraceCheckUtils]: 27: Hoare triple {123267#(= main_~lk8~0 1)} [335] L166-1-->L171-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {123267#(= main_~lk8~0 1)} is VALID [2022-04-07 21:20:37,356 INFO L290 TraceCheckUtils]: 28: Hoare triple {123267#(= main_~lk8~0 1)} [339] L171-1-->L176-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {123267#(= main_~lk8~0 1)} is VALID [2022-04-07 21:20:37,356 INFO L290 TraceCheckUtils]: 29: Hoare triple {123267#(= main_~lk8~0 1)} [342] L176-1-->L182: Formula: (not (= v_main_~p8~0_2 0)) InVars {main_~p8~0=v_main_~p8~0_2} OutVars{main_~p8~0=v_main_~p8~0_2} AuxVars[] AssignedVars[] {123267#(= main_~lk8~0 1)} is VALID [2022-04-07 21:20:37,357 INFO L290 TraceCheckUtils]: 30: Hoare triple {123267#(= main_~lk8~0 1)} [344] L182-->L212-1: Formula: (not (= v_main_~lk8~0_3 1)) InVars {main_~lk8~0=v_main_~lk8~0_3} OutVars{main_~lk8~0=v_main_~lk8~0_3} AuxVars[] AssignedVars[] {123263#false} is VALID [2022-04-07 21:20:37,357 INFO L290 TraceCheckUtils]: 31: Hoare triple {123263#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {123263#false} is VALID [2022-04-07 21:20:37,357 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 21:20:37,357 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 21:20:37,357 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1071214527] [2022-04-07 21:20:37,358 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1071214527] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 21:20:37,358 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 21:20:37,358 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-07 21:20:37,358 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1967528366] [2022-04-07 21:20:37,358 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 21:20:37,359 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-07 21:20:37,359 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 21:20:37,359 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:37,376 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 32 edges. 32 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:20:37,376 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-07 21:20:37,376 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 21:20:37,377 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-07 21:20:37,377 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-07 21:20:37,377 INFO L87 Difference]: Start difference. First operand 5321 states and 8135 transitions. Second operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:40,234 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:40,234 INFO L93 Difference]: Finished difference Result 9483 states and 14728 transitions. [2022-04-07 21:20:40,234 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-07 21:20:40,234 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-07 21:20:40,234 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 21:20:40,234 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:40,236 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 150 transitions. [2022-04-07 21:20:40,236 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:40,236 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 150 transitions. [2022-04-07 21:20:40,236 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 150 transitions. [2022-04-07 21:20:40,341 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 150 edges. 150 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:20:42,973 INFO L225 Difference]: With dead ends: 9483 [2022-04-07 21:20:42,973 INFO L226 Difference]: Without dead ends: 9483 [2022-04-07 21:20:42,974 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-07 21:20:42,974 INFO L913 BasicCegarLoop]: 88 mSDtfsCounter, 187 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 83 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 187 SdHoareTripleChecker+Valid, 95 SdHoareTripleChecker+Invalid, 85 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 83 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 21:20:42,974 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [187 Valid, 95 Invalid, 85 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 83 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-07 21:20:42,977 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9483 states. [2022-04-07 21:20:43,040 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9483 to 7689. [2022-04-07 21:20:43,040 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 21:20:43,048 INFO L82 GeneralOperation]: Start isEquivalent. First operand 9483 states. Second operand has 7689 states, 7685 states have (on average 1.4828887443070917) internal successors, (11396), 7685 states have internal predecessors, (11396), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:43,054 INFO L74 IsIncluded]: Start isIncluded. First operand 9483 states. Second operand has 7689 states, 7685 states have (on average 1.4828887443070917) internal successors, (11396), 7685 states have internal predecessors, (11396), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:43,060 INFO L87 Difference]: Start difference. First operand 9483 states. Second operand has 7689 states, 7685 states have (on average 1.4828887443070917) internal successors, (11396), 7685 states have internal predecessors, (11396), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:45,176 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:45,176 INFO L93 Difference]: Finished difference Result 9483 states and 14728 transitions. [2022-04-07 21:20:45,176 INFO L276 IsEmpty]: Start isEmpty. Operand 9483 states and 14728 transitions. [2022-04-07 21:20:45,182 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:20:45,182 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:20:45,187 INFO L74 IsIncluded]: Start isIncluded. First operand has 7689 states, 7685 states have (on average 1.4828887443070917) internal successors, (11396), 7685 states have internal predecessors, (11396), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 9483 states. [2022-04-07 21:20:45,191 INFO L87 Difference]: Start difference. First operand has 7689 states, 7685 states have (on average 1.4828887443070917) internal successors, (11396), 7685 states have internal predecessors, (11396), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 9483 states. [2022-04-07 21:20:47,657 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:47,657 INFO L93 Difference]: Finished difference Result 9483 states and 14728 transitions. [2022-04-07 21:20:47,657 INFO L276 IsEmpty]: Start isEmpty. Operand 9483 states and 14728 transitions. [2022-04-07 21:20:47,663 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:20:47,663 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:20:47,664 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 21:20:47,664 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 21:20:47,670 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7689 states, 7685 states have (on average 1.4828887443070917) internal successors, (11396), 7685 states have internal predecessors, (11396), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:49,297 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7689 states to 7689 states and 11399 transitions. [2022-04-07 21:20:49,297 INFO L78 Accepts]: Start accepts. Automaton has 7689 states and 11399 transitions. Word has length 32 [2022-04-07 21:20:49,298 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 21:20:49,298 INFO L478 AbstractCegarLoop]: Abstraction has 7689 states and 11399 transitions. [2022-04-07 21:20:49,298 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:49,298 INFO L276 IsEmpty]: Start isEmpty. Operand 7689 states and 11399 transitions. [2022-04-07 21:20:49,301 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2022-04-07 21:20:49,301 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 21:20:49,301 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 21:20:49,301 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2022-04-07 21:20:49,301 INFO L403 AbstractCegarLoop]: === Iteration 23 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 21:20:49,302 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 21:20:49,302 INFO L85 PathProgramCache]: Analyzing trace with hash 662165098, now seen corresponding path program 1 times [2022-04-07 21:20:49,302 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 21:20:49,302 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1077236595] [2022-04-07 21:20:49,302 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 21:20:49,302 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 21:20:49,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:20:49,324 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 21:20:49,325 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:20:49,327 INFO L290 TraceCheckUtils]: 0: Hoare triple {159418#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {159412#true} is VALID [2022-04-07 21:20:49,327 INFO L290 TraceCheckUtils]: 1: Hoare triple {159412#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {159412#true} is VALID [2022-04-07 21:20:49,327 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {159412#true} {159412#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {159412#true} is VALID [2022-04-07 21:20:49,328 INFO L272 TraceCheckUtils]: 0: Hoare triple {159412#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {159418#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 21:20:49,328 INFO L290 TraceCheckUtils]: 1: Hoare triple {159418#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {159412#true} is VALID [2022-04-07 21:20:49,328 INFO L290 TraceCheckUtils]: 2: Hoare triple {159412#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {159412#true} is VALID [2022-04-07 21:20:49,328 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {159412#true} {159412#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {159412#true} is VALID [2022-04-07 21:20:49,328 INFO L272 TraceCheckUtils]: 4: Hoare triple {159412#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {159412#true} is VALID [2022-04-07 21:20:49,328 INFO L290 TraceCheckUtils]: 5: Hoare triple {159412#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {159412#true} is VALID [2022-04-07 21:20:49,328 INFO L290 TraceCheckUtils]: 6: Hoare triple {159412#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {159412#true} is VALID [2022-04-07 21:20:49,329 INFO L290 TraceCheckUtils]: 7: Hoare triple {159412#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {159412#true} is VALID [2022-04-07 21:20:49,329 INFO L290 TraceCheckUtils]: 8: Hoare triple {159412#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {159412#true} is VALID [2022-04-07 21:20:49,329 INFO L290 TraceCheckUtils]: 9: Hoare triple {159412#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {159412#true} is VALID [2022-04-07 21:20:49,329 INFO L290 TraceCheckUtils]: 10: Hoare triple {159412#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {159412#true} is VALID [2022-04-07 21:20:49,329 INFO L290 TraceCheckUtils]: 11: Hoare triple {159412#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {159412#true} is VALID [2022-04-07 21:20:49,329 INFO L290 TraceCheckUtils]: 12: Hoare triple {159412#true} [293] L100-1-->L104-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {159412#true} is VALID [2022-04-07 21:20:49,329 INFO L290 TraceCheckUtils]: 13: Hoare triple {159412#true} [295] L104-1-->L108-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {159412#true} is VALID [2022-04-07 21:20:49,329 INFO L290 TraceCheckUtils]: 14: Hoare triple {159412#true} [297] L108-1-->L112-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {159412#true} is VALID [2022-04-07 21:20:49,329 INFO L290 TraceCheckUtils]: 15: Hoare triple {159412#true} [299] L112-1-->L116-1: Formula: (= v_main_~p8~0_5 0) InVars {main_~p8~0=v_main_~p8~0_5} OutVars{main_~p8~0=v_main_~p8~0_5} AuxVars[] AssignedVars[] {159417#(= main_~p8~0 0)} is VALID [2022-04-07 21:20:49,330 INFO L290 TraceCheckUtils]: 16: Hoare triple {159417#(= main_~p8~0 0)} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {159417#(= main_~p8~0 0)} is VALID [2022-04-07 21:20:49,330 INFO L290 TraceCheckUtils]: 17: Hoare triple {159417#(= main_~p8~0 0)} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {159417#(= main_~p8~0 0)} is VALID [2022-04-07 21:20:49,330 INFO L290 TraceCheckUtils]: 18: Hoare triple {159417#(= main_~p8~0 0)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {159417#(= main_~p8~0 0)} is VALID [2022-04-07 21:20:49,330 INFO L290 TraceCheckUtils]: 19: Hoare triple {159417#(= main_~p8~0 0)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {159417#(= main_~p8~0 0)} is VALID [2022-04-07 21:20:49,331 INFO L290 TraceCheckUtils]: 20: Hoare triple {159417#(= main_~p8~0 0)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {159417#(= main_~p8~0 0)} is VALID [2022-04-07 21:20:49,331 INFO L290 TraceCheckUtils]: 21: Hoare triple {159417#(= main_~p8~0 0)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {159417#(= main_~p8~0 0)} is VALID [2022-04-07 21:20:49,331 INFO L290 TraceCheckUtils]: 22: Hoare triple {159417#(= main_~p8~0 0)} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {159417#(= main_~p8~0 0)} is VALID [2022-04-07 21:20:49,332 INFO L290 TraceCheckUtils]: 23: Hoare triple {159417#(= main_~p8~0 0)} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {159417#(= main_~p8~0 0)} is VALID [2022-04-07 21:20:49,332 INFO L290 TraceCheckUtils]: 24: Hoare triple {159417#(= main_~p8~0 0)} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {159417#(= main_~p8~0 0)} is VALID [2022-04-07 21:20:49,332 INFO L290 TraceCheckUtils]: 25: Hoare triple {159417#(= main_~p8~0 0)} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {159417#(= main_~p8~0 0)} is VALID [2022-04-07 21:20:49,332 INFO L290 TraceCheckUtils]: 26: Hoare triple {159417#(= main_~p8~0 0)} [331] L161-1-->L166-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {159417#(= main_~p8~0 0)} is VALID [2022-04-07 21:20:49,333 INFO L290 TraceCheckUtils]: 27: Hoare triple {159417#(= main_~p8~0 0)} [335] L166-1-->L171-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {159417#(= main_~p8~0 0)} is VALID [2022-04-07 21:20:49,333 INFO L290 TraceCheckUtils]: 28: Hoare triple {159417#(= main_~p8~0 0)} [339] L171-1-->L176-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {159417#(= main_~p8~0 0)} is VALID [2022-04-07 21:20:49,333 INFO L290 TraceCheckUtils]: 29: Hoare triple {159417#(= main_~p8~0 0)} [342] L176-1-->L182: Formula: (not (= v_main_~p8~0_2 0)) InVars {main_~p8~0=v_main_~p8~0_2} OutVars{main_~p8~0=v_main_~p8~0_2} AuxVars[] AssignedVars[] {159413#false} is VALID [2022-04-07 21:20:49,333 INFO L290 TraceCheckUtils]: 30: Hoare triple {159413#false} [344] L182-->L212-1: Formula: (not (= v_main_~lk8~0_3 1)) InVars {main_~lk8~0=v_main_~lk8~0_3} OutVars{main_~lk8~0=v_main_~lk8~0_3} AuxVars[] AssignedVars[] {159413#false} is VALID [2022-04-07 21:20:49,333 INFO L290 TraceCheckUtils]: 31: Hoare triple {159413#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {159413#false} is VALID [2022-04-07 21:20:49,333 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 21:20:49,334 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 21:20:49,334 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1077236595] [2022-04-07 21:20:49,334 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1077236595] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 21:20:49,334 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 21:20:49,334 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-07 21:20:49,334 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1739508526] [2022-04-07 21:20:49,334 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 21:20:49,334 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-07 21:20:49,334 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 21:20:49,335 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:49,351 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 32 edges. 32 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:20:49,351 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-07 21:20:49,351 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 21:20:49,352 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-07 21:20:49,352 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-07 21:20:49,352 INFO L87 Difference]: Start difference. First operand 7689 states and 11399 transitions. Second operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:52,413 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:52,413 INFO L93 Difference]: Finished difference Result 10379 states and 15368 transitions. [2022-04-07 21:20:52,413 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-07 21:20:52,413 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-07 21:20:52,413 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 21:20:52,413 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:52,414 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 163 transitions. [2022-04-07 21:20:52,414 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:52,415 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 163 transitions. [2022-04-07 21:20:52,415 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 163 transitions. [2022-04-07 21:20:52,523 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 163 edges. 163 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:20:55,619 INFO L225 Difference]: With dead ends: 10379 [2022-04-07 21:20:55,619 INFO L226 Difference]: Without dead ends: 10379 [2022-04-07 21:20:55,619 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-07 21:20:55,619 INFO L913 BasicCegarLoop]: 134 mSDtfsCounter, 166 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 81 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 166 SdHoareTripleChecker+Valid, 141 SdHoareTripleChecker+Invalid, 84 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 81 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 21:20:55,620 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [166 Valid, 141 Invalid, 84 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 81 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-07 21:20:55,622 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10379 states. [2022-04-07 21:20:55,680 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10379 to 10377. [2022-04-07 21:20:55,680 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 21:20:55,690 INFO L82 GeneralOperation]: Start isEquivalent. First operand 10379 states. Second operand has 10377 states, 10373 states have (on average 1.4811529933481153) internal successors, (15364), 10373 states have internal predecessors, (15364), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:55,701 INFO L74 IsIncluded]: Start isIncluded. First operand 10379 states. Second operand has 10377 states, 10373 states have (on average 1.4811529933481153) internal successors, (15364), 10373 states have internal predecessors, (15364), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:55,711 INFO L87 Difference]: Start difference. First operand 10379 states. Second operand has 10377 states, 10373 states have (on average 1.4811529933481153) internal successors, (15364), 10373 states have internal predecessors, (15364), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:20:58,559 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:20:58,559 INFO L93 Difference]: Finished difference Result 10379 states and 15368 transitions. [2022-04-07 21:20:58,559 INFO L276 IsEmpty]: Start isEmpty. Operand 10379 states and 15368 transitions. [2022-04-07 21:20:58,566 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:20:58,566 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:20:58,576 INFO L74 IsIncluded]: Start isIncluded. First operand has 10377 states, 10373 states have (on average 1.4811529933481153) internal successors, (15364), 10373 states have internal predecessors, (15364), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 10379 states. [2022-04-07 21:20:58,585 INFO L87 Difference]: Start difference. First operand has 10377 states, 10373 states have (on average 1.4811529933481153) internal successors, (15364), 10373 states have internal predecessors, (15364), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 10379 states. [2022-04-07 21:21:01,489 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:21:01,490 INFO L93 Difference]: Finished difference Result 10379 states and 15368 transitions. [2022-04-07 21:21:01,490 INFO L276 IsEmpty]: Start isEmpty. Operand 10379 states and 15368 transitions. [2022-04-07 21:21:01,497 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:21:01,497 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:21:01,497 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 21:21:01,497 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 21:21:01,508 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10377 states, 10373 states have (on average 1.4811529933481153) internal successors, (15364), 10373 states have internal predecessors, (15364), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:21:04,628 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10377 states to 10377 states and 15367 transitions. [2022-04-07 21:21:04,629 INFO L78 Accepts]: Start accepts. Automaton has 10377 states and 15367 transitions. Word has length 32 [2022-04-07 21:21:04,629 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 21:21:04,629 INFO L478 AbstractCegarLoop]: Abstraction has 10377 states and 15367 transitions. [2022-04-07 21:21:04,629 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:21:04,629 INFO L276 IsEmpty]: Start isEmpty. Operand 10377 states and 15367 transitions. [2022-04-07 21:21:04,632 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2022-04-07 21:21:04,632 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 21:21:04,632 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 21:21:04,632 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2022-04-07 21:21:04,632 INFO L403 AbstractCegarLoop]: === Iteration 24 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 21:21:04,633 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 21:21:04,633 INFO L85 PathProgramCache]: Analyzing trace with hash 49386872, now seen corresponding path program 1 times [2022-04-07 21:21:04,633 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 21:21:04,633 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [564036160] [2022-04-07 21:21:04,633 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 21:21:04,633 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 21:21:04,664 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:21:04,674 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 21:21:04,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:21:04,676 INFO L290 TraceCheckUtils]: 0: Hoare triple {200944#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {200938#true} is VALID [2022-04-07 21:21:04,677 INFO L290 TraceCheckUtils]: 1: Hoare triple {200938#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {200938#true} is VALID [2022-04-07 21:21:04,677 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {200938#true} {200938#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {200938#true} is VALID [2022-04-07 21:21:04,677 INFO L272 TraceCheckUtils]: 0: Hoare triple {200938#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {200944#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 21:21:04,677 INFO L290 TraceCheckUtils]: 1: Hoare triple {200944#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {200938#true} is VALID [2022-04-07 21:21:04,677 INFO L290 TraceCheckUtils]: 2: Hoare triple {200938#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {200938#true} is VALID [2022-04-07 21:21:04,677 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {200938#true} {200938#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {200938#true} is VALID [2022-04-07 21:21:04,677 INFO L272 TraceCheckUtils]: 4: Hoare triple {200938#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {200938#true} is VALID [2022-04-07 21:21:04,678 INFO L290 TraceCheckUtils]: 5: Hoare triple {200938#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {200938#true} is VALID [2022-04-07 21:21:04,678 INFO L290 TraceCheckUtils]: 6: Hoare triple {200938#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {200938#true} is VALID [2022-04-07 21:21:04,678 INFO L290 TraceCheckUtils]: 7: Hoare triple {200938#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {200938#true} is VALID [2022-04-07 21:21:04,678 INFO L290 TraceCheckUtils]: 8: Hoare triple {200938#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {200938#true} is VALID [2022-04-07 21:21:04,678 INFO L290 TraceCheckUtils]: 9: Hoare triple {200938#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {200938#true} is VALID [2022-04-07 21:21:04,678 INFO L290 TraceCheckUtils]: 10: Hoare triple {200938#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {200938#true} is VALID [2022-04-07 21:21:04,678 INFO L290 TraceCheckUtils]: 11: Hoare triple {200938#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {200938#true} is VALID [2022-04-07 21:21:04,678 INFO L290 TraceCheckUtils]: 12: Hoare triple {200938#true} [293] L100-1-->L104-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {200938#true} is VALID [2022-04-07 21:21:04,678 INFO L290 TraceCheckUtils]: 13: Hoare triple {200938#true} [295] L104-1-->L108-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {200938#true} is VALID [2022-04-07 21:21:04,678 INFO L290 TraceCheckUtils]: 14: Hoare triple {200938#true} [297] L108-1-->L112-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {200938#true} is VALID [2022-04-07 21:21:04,678 INFO L290 TraceCheckUtils]: 15: Hoare triple {200938#true} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {200943#(not (= main_~p8~0 0))} is VALID [2022-04-07 21:21:04,679 INFO L290 TraceCheckUtils]: 16: Hoare triple {200943#(not (= main_~p8~0 0))} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {200943#(not (= main_~p8~0 0))} is VALID [2022-04-07 21:21:04,679 INFO L290 TraceCheckUtils]: 17: Hoare triple {200943#(not (= main_~p8~0 0))} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {200943#(not (= main_~p8~0 0))} is VALID [2022-04-07 21:21:04,679 INFO L290 TraceCheckUtils]: 18: Hoare triple {200943#(not (= main_~p8~0 0))} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {200943#(not (= main_~p8~0 0))} is VALID [2022-04-07 21:21:04,679 INFO L290 TraceCheckUtils]: 19: Hoare triple {200943#(not (= main_~p8~0 0))} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {200943#(not (= main_~p8~0 0))} is VALID [2022-04-07 21:21:04,680 INFO L290 TraceCheckUtils]: 20: Hoare triple {200943#(not (= main_~p8~0 0))} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {200943#(not (= main_~p8~0 0))} is VALID [2022-04-07 21:21:04,680 INFO L290 TraceCheckUtils]: 21: Hoare triple {200943#(not (= main_~p8~0 0))} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {200943#(not (= main_~p8~0 0))} is VALID [2022-04-07 21:21:04,680 INFO L290 TraceCheckUtils]: 22: Hoare triple {200943#(not (= main_~p8~0 0))} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {200943#(not (= main_~p8~0 0))} is VALID [2022-04-07 21:21:04,680 INFO L290 TraceCheckUtils]: 23: Hoare triple {200943#(not (= main_~p8~0 0))} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {200943#(not (= main_~p8~0 0))} is VALID [2022-04-07 21:21:04,681 INFO L290 TraceCheckUtils]: 24: Hoare triple {200943#(not (= main_~p8~0 0))} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {200943#(not (= main_~p8~0 0))} is VALID [2022-04-07 21:21:04,681 INFO L290 TraceCheckUtils]: 25: Hoare triple {200943#(not (= main_~p8~0 0))} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {200943#(not (= main_~p8~0 0))} is VALID [2022-04-07 21:21:04,681 INFO L290 TraceCheckUtils]: 26: Hoare triple {200943#(not (= main_~p8~0 0))} [331] L161-1-->L166-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {200943#(not (= main_~p8~0 0))} is VALID [2022-04-07 21:21:04,681 INFO L290 TraceCheckUtils]: 27: Hoare triple {200943#(not (= main_~p8~0 0))} [335] L166-1-->L171-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {200943#(not (= main_~p8~0 0))} is VALID [2022-04-07 21:21:04,682 INFO L290 TraceCheckUtils]: 28: Hoare triple {200943#(not (= main_~p8~0 0))} [339] L171-1-->L176-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {200943#(not (= main_~p8~0 0))} is VALID [2022-04-07 21:21:04,682 INFO L290 TraceCheckUtils]: 29: Hoare triple {200943#(not (= main_~p8~0 0))} [343] L176-1-->L181-1: Formula: (= v_main_~p8~0_3 0) InVars {main_~p8~0=v_main_~p8~0_3} OutVars{main_~p8~0=v_main_~p8~0_3} AuxVars[] AssignedVars[] {200939#false} is VALID [2022-04-07 21:21:04,682 INFO L290 TraceCheckUtils]: 30: Hoare triple {200939#false} [346] L181-1-->L187: Formula: (not (= v_main_~p9~0_2 0)) InVars {main_~p9~0=v_main_~p9~0_2} OutVars{main_~p9~0=v_main_~p9~0_2} AuxVars[] AssignedVars[] {200939#false} is VALID [2022-04-07 21:21:04,682 INFO L290 TraceCheckUtils]: 31: Hoare triple {200939#false} [348] L187-->L212-1: Formula: (not (= v_main_~lk9~0_3 1)) InVars {main_~lk9~0=v_main_~lk9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_3} AuxVars[] AssignedVars[] {200939#false} is VALID [2022-04-07 21:21:04,682 INFO L290 TraceCheckUtils]: 32: Hoare triple {200939#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {200939#false} is VALID [2022-04-07 21:21:04,682 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 21:21:04,683 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 21:21:04,683 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [564036160] [2022-04-07 21:21:04,683 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [564036160] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 21:21:04,683 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 21:21:04,683 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-07 21:21:04,683 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1690855958] [2022-04-07 21:21:04,683 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 21:21:04,683 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 33 [2022-04-07 21:21:04,683 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 21:21:04,683 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:21:04,700 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 33 edges. 33 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:21:04,700 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-07 21:21:04,700 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 21:21:04,700 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-07 21:21:04,700 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-07 21:21:04,701 INFO L87 Difference]: Start difference. First operand 10377 states and 15367 transitions. Second operand has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:21:07,738 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:21:07,738 INFO L93 Difference]: Finished difference Result 10507 states and 15368 transitions. [2022-04-07 21:21:07,738 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-07 21:21:07,738 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 33 [2022-04-07 21:21:07,739 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 21:21:07,739 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:21:07,739 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 162 transitions. [2022-04-07 21:21:07,739 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:21:07,740 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 162 transitions. [2022-04-07 21:21:07,740 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 162 transitions. [2022-04-07 21:21:07,848 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 162 edges. 162 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:21:11,186 INFO L225 Difference]: With dead ends: 10507 [2022-04-07 21:21:11,186 INFO L226 Difference]: Without dead ends: 10507 [2022-04-07 21:21:11,186 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-07 21:21:11,187 INFO L913 BasicCegarLoop]: 125 mSDtfsCounter, 176 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 80 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 176 SdHoareTripleChecker+Valid, 132 SdHoareTripleChecker+Invalid, 82 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 80 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 21:21:11,187 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [176 Valid, 132 Invalid, 82 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 80 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 21:21:11,190 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10507 states. [2022-04-07 21:21:11,336 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10507 to 10505. [2022-04-07 21:21:11,336 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 21:21:11,346 INFO L82 GeneralOperation]: Start isEquivalent. First operand 10507 states. Second operand has 10505 states, 10501 states have (on average 1.4630987524997618) internal successors, (15364), 10501 states have internal predecessors, (15364), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:21:11,368 INFO L74 IsIncluded]: Start isIncluded. First operand 10507 states. Second operand has 10505 states, 10501 states have (on average 1.4630987524997618) internal successors, (15364), 10501 states have internal predecessors, (15364), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:21:11,377 INFO L87 Difference]: Start difference. First operand 10507 states. Second operand has 10505 states, 10501 states have (on average 1.4630987524997618) internal successors, (15364), 10501 states have internal predecessors, (15364), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:21:14,103 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:21:14,103 INFO L93 Difference]: Finished difference Result 10507 states and 15368 transitions. [2022-04-07 21:21:14,103 INFO L276 IsEmpty]: Start isEmpty. Operand 10507 states and 15368 transitions. [2022-04-07 21:21:14,159 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:21:14,160 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:21:14,169 INFO L74 IsIncluded]: Start isIncluded. First operand has 10505 states, 10501 states have (on average 1.4630987524997618) internal successors, (15364), 10501 states have internal predecessors, (15364), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 10507 states. [2022-04-07 21:21:14,177 INFO L87 Difference]: Start difference. First operand has 10505 states, 10501 states have (on average 1.4630987524997618) internal successors, (15364), 10501 states have internal predecessors, (15364), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 10507 states. [2022-04-07 21:21:16,960 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:21:16,961 INFO L93 Difference]: Finished difference Result 10507 states and 15368 transitions. [2022-04-07 21:21:16,961 INFO L276 IsEmpty]: Start isEmpty. Operand 10507 states and 15368 transitions. [2022-04-07 21:21:16,966 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:21:16,967 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:21:16,967 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 21:21:16,967 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 21:21:16,976 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10505 states, 10501 states have (on average 1.4630987524997618) internal successors, (15364), 10501 states have internal predecessors, (15364), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:21:20,063 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10505 states to 10505 states and 15367 transitions. [2022-04-07 21:21:20,063 INFO L78 Accepts]: Start accepts. Automaton has 10505 states and 15367 transitions. Word has length 33 [2022-04-07 21:21:20,063 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 21:21:20,063 INFO L478 AbstractCegarLoop]: Abstraction has 10505 states and 15367 transitions. [2022-04-07 21:21:20,064 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:21:20,064 INFO L276 IsEmpty]: Start isEmpty. Operand 10505 states and 15367 transitions. [2022-04-07 21:21:20,067 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2022-04-07 21:21:20,067 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 21:21:20,067 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 21:21:20,067 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2022-04-07 21:21:20,067 INFO L403 AbstractCegarLoop]: === Iteration 25 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 21:21:20,067 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 21:21:20,067 INFO L85 PathProgramCache]: Analyzing trace with hash -947685481, now seen corresponding path program 1 times [2022-04-07 21:21:20,067 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 21:21:20,067 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1153214943] [2022-04-07 21:21:20,067 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 21:21:20,068 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 21:21:20,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:21:20,102 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 21:21:20,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:21:20,104 INFO L290 TraceCheckUtils]: 0: Hoare triple {242982#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {242976#true} is VALID [2022-04-07 21:21:20,105 INFO L290 TraceCheckUtils]: 1: Hoare triple {242976#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {242976#true} is VALID [2022-04-07 21:21:20,105 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {242976#true} {242976#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {242976#true} is VALID [2022-04-07 21:21:20,105 INFO L272 TraceCheckUtils]: 0: Hoare triple {242976#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {242982#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 21:21:20,105 INFO L290 TraceCheckUtils]: 1: Hoare triple {242982#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {242976#true} is VALID [2022-04-07 21:21:20,105 INFO L290 TraceCheckUtils]: 2: Hoare triple {242976#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {242976#true} is VALID [2022-04-07 21:21:20,105 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {242976#true} {242976#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {242976#true} is VALID [2022-04-07 21:21:20,105 INFO L272 TraceCheckUtils]: 4: Hoare triple {242976#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {242976#true} is VALID [2022-04-07 21:21:20,106 INFO L290 TraceCheckUtils]: 5: Hoare triple {242976#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {242976#true} is VALID [2022-04-07 21:21:20,106 INFO L290 TraceCheckUtils]: 6: Hoare triple {242976#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {242976#true} is VALID [2022-04-07 21:21:20,106 INFO L290 TraceCheckUtils]: 7: Hoare triple {242976#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {242976#true} is VALID [2022-04-07 21:21:20,106 INFO L290 TraceCheckUtils]: 8: Hoare triple {242976#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {242976#true} is VALID [2022-04-07 21:21:20,106 INFO L290 TraceCheckUtils]: 9: Hoare triple {242976#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {242976#true} is VALID [2022-04-07 21:21:20,106 INFO L290 TraceCheckUtils]: 10: Hoare triple {242976#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {242976#true} is VALID [2022-04-07 21:21:20,106 INFO L290 TraceCheckUtils]: 11: Hoare triple {242976#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {242976#true} is VALID [2022-04-07 21:21:20,106 INFO L290 TraceCheckUtils]: 12: Hoare triple {242976#true} [293] L100-1-->L104-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {242976#true} is VALID [2022-04-07 21:21:20,106 INFO L290 TraceCheckUtils]: 13: Hoare triple {242976#true} [295] L104-1-->L108-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {242976#true} is VALID [2022-04-07 21:21:20,106 INFO L290 TraceCheckUtils]: 14: Hoare triple {242976#true} [297] L108-1-->L112-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {242976#true} is VALID [2022-04-07 21:21:20,106 INFO L290 TraceCheckUtils]: 15: Hoare triple {242976#true} [299] L112-1-->L116-1: Formula: (= v_main_~p8~0_5 0) InVars {main_~p8~0=v_main_~p8~0_5} OutVars{main_~p8~0=v_main_~p8~0_5} AuxVars[] AssignedVars[] {242976#true} is VALID [2022-04-07 21:21:20,107 INFO L290 TraceCheckUtils]: 16: Hoare triple {242976#true} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {242981#(= main_~lk9~0 1)} is VALID [2022-04-07 21:21:20,107 INFO L290 TraceCheckUtils]: 17: Hoare triple {242981#(= main_~lk9~0 1)} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {242981#(= main_~lk9~0 1)} is VALID [2022-04-07 21:21:20,107 INFO L290 TraceCheckUtils]: 18: Hoare triple {242981#(= main_~lk9~0 1)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {242981#(= main_~lk9~0 1)} is VALID [2022-04-07 21:21:20,107 INFO L290 TraceCheckUtils]: 19: Hoare triple {242981#(= main_~lk9~0 1)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {242981#(= main_~lk9~0 1)} is VALID [2022-04-07 21:21:20,108 INFO L290 TraceCheckUtils]: 20: Hoare triple {242981#(= main_~lk9~0 1)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {242981#(= main_~lk9~0 1)} is VALID [2022-04-07 21:21:20,108 INFO L290 TraceCheckUtils]: 21: Hoare triple {242981#(= main_~lk9~0 1)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {242981#(= main_~lk9~0 1)} is VALID [2022-04-07 21:21:20,108 INFO L290 TraceCheckUtils]: 22: Hoare triple {242981#(= main_~lk9~0 1)} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {242981#(= main_~lk9~0 1)} is VALID [2022-04-07 21:21:20,108 INFO L290 TraceCheckUtils]: 23: Hoare triple {242981#(= main_~lk9~0 1)} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {242981#(= main_~lk9~0 1)} is VALID [2022-04-07 21:21:20,109 INFO L290 TraceCheckUtils]: 24: Hoare triple {242981#(= main_~lk9~0 1)} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {242981#(= main_~lk9~0 1)} is VALID [2022-04-07 21:21:20,109 INFO L290 TraceCheckUtils]: 25: Hoare triple {242981#(= main_~lk9~0 1)} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {242981#(= main_~lk9~0 1)} is VALID [2022-04-07 21:21:20,109 INFO L290 TraceCheckUtils]: 26: Hoare triple {242981#(= main_~lk9~0 1)} [331] L161-1-->L166-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {242981#(= main_~lk9~0 1)} is VALID [2022-04-07 21:21:20,109 INFO L290 TraceCheckUtils]: 27: Hoare triple {242981#(= main_~lk9~0 1)} [335] L166-1-->L171-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {242981#(= main_~lk9~0 1)} is VALID [2022-04-07 21:21:20,109 INFO L290 TraceCheckUtils]: 28: Hoare triple {242981#(= main_~lk9~0 1)} [339] L171-1-->L176-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {242981#(= main_~lk9~0 1)} is VALID [2022-04-07 21:21:20,110 INFO L290 TraceCheckUtils]: 29: Hoare triple {242981#(= main_~lk9~0 1)} [343] L176-1-->L181-1: Formula: (= v_main_~p8~0_3 0) InVars {main_~p8~0=v_main_~p8~0_3} OutVars{main_~p8~0=v_main_~p8~0_3} AuxVars[] AssignedVars[] {242981#(= main_~lk9~0 1)} is VALID [2022-04-07 21:21:20,110 INFO L290 TraceCheckUtils]: 30: Hoare triple {242981#(= main_~lk9~0 1)} [346] L181-1-->L187: Formula: (not (= v_main_~p9~0_2 0)) InVars {main_~p9~0=v_main_~p9~0_2} OutVars{main_~p9~0=v_main_~p9~0_2} AuxVars[] AssignedVars[] {242981#(= main_~lk9~0 1)} is VALID [2022-04-07 21:21:20,110 INFO L290 TraceCheckUtils]: 31: Hoare triple {242981#(= main_~lk9~0 1)} [348] L187-->L212-1: Formula: (not (= v_main_~lk9~0_3 1)) InVars {main_~lk9~0=v_main_~lk9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_3} AuxVars[] AssignedVars[] {242977#false} is VALID [2022-04-07 21:21:20,110 INFO L290 TraceCheckUtils]: 32: Hoare triple {242977#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {242977#false} is VALID [2022-04-07 21:21:20,110 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 21:21:20,111 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 21:21:20,111 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1153214943] [2022-04-07 21:21:20,111 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1153214943] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 21:21:20,111 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 21:21:20,111 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-07 21:21:20,111 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1551987804] [2022-04-07 21:21:20,111 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 21:21:20,111 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 33 [2022-04-07 21:21:20,111 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 21:21:20,111 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:21:20,128 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 33 edges. 33 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:21:20,128 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-07 21:21:20,128 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 21:21:20,129 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-07 21:21:20,129 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-07 21:21:20,129 INFO L87 Difference]: Start difference. First operand 10505 states and 15367 transitions. Second operand has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:21:28,487 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:21:28,487 INFO L93 Difference]: Finished difference Result 18443 states and 27400 transitions. [2022-04-07 21:21:28,487 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-07 21:21:28,487 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 33 [2022-04-07 21:21:28,487 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 21:21:28,487 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:21:28,488 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 146 transitions. [2022-04-07 21:21:28,488 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:21:28,489 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 146 transitions. [2022-04-07 21:21:28,489 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 146 transitions. [2022-04-07 21:21:28,566 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 146 edges. 146 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:21:37,541 INFO L225 Difference]: With dead ends: 18443 [2022-04-07 21:21:37,542 INFO L226 Difference]: Without dead ends: 18443 [2022-04-07 21:21:37,542 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-07 21:21:37,542 INFO L913 BasicCegarLoop]: 87 mSDtfsCounter, 180 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 82 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 180 SdHoareTripleChecker+Valid, 94 SdHoareTripleChecker+Invalid, 84 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 82 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 21:21:37,542 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [180 Valid, 94 Invalid, 84 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 82 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 21:21:37,548 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18443 states. [2022-04-07 21:21:37,717 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18443 to 15369. [2022-04-07 21:21:37,718 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 21:21:37,734 INFO L82 GeneralOperation]: Start isEquivalent. First operand 18443 states. Second operand has 15369 states, 15365 states have (on average 1.4164659941425317) internal successors, (21764), 15365 states have internal predecessors, (21764), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:21:37,750 INFO L74 IsIncluded]: Start isIncluded. First operand 18443 states. Second operand has 15369 states, 15365 states have (on average 1.4164659941425317) internal successors, (21764), 15365 states have internal predecessors, (21764), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:21:37,765 INFO L87 Difference]: Start difference. First operand 18443 states. Second operand has 15369 states, 15365 states have (on average 1.4164659941425317) internal successors, (21764), 15365 states have internal predecessors, (21764), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:21:46,158 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:21:46,158 INFO L93 Difference]: Finished difference Result 18443 states and 27400 transitions. [2022-04-07 21:21:46,158 INFO L276 IsEmpty]: Start isEmpty. Operand 18443 states and 27400 transitions. [2022-04-07 21:21:46,168 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:21:46,169 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:21:46,181 INFO L74 IsIncluded]: Start isIncluded. First operand has 15369 states, 15365 states have (on average 1.4164659941425317) internal successors, (21764), 15365 states have internal predecessors, (21764), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 18443 states. [2022-04-07 21:21:46,192 INFO L87 Difference]: Start difference. First operand has 15369 states, 15365 states have (on average 1.4164659941425317) internal successors, (21764), 15365 states have internal predecessors, (21764), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 18443 states. [2022-04-07 21:21:55,335 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:21:55,336 INFO L93 Difference]: Finished difference Result 18443 states and 27400 transitions. [2022-04-07 21:21:55,336 INFO L276 IsEmpty]: Start isEmpty. Operand 18443 states and 27400 transitions. [2022-04-07 21:21:55,381 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:21:55,382 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:21:55,382 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 21:21:55,382 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 21:21:55,392 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15369 states, 15365 states have (on average 1.4164659941425317) internal successors, (21764), 15365 states have internal predecessors, (21764), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:22:01,814 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15369 states to 15369 states and 21767 transitions. [2022-04-07 21:22:01,814 INFO L78 Accepts]: Start accepts. Automaton has 15369 states and 21767 transitions. Word has length 33 [2022-04-07 21:22:01,814 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 21:22:01,814 INFO L478 AbstractCegarLoop]: Abstraction has 15369 states and 21767 transitions. [2022-04-07 21:22:01,814 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:22:01,814 INFO L276 IsEmpty]: Start isEmpty. Operand 15369 states and 21767 transitions. [2022-04-07 21:22:01,820 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2022-04-07 21:22:01,820 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 21:22:01,820 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 21:22:01,820 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2022-04-07 21:22:01,820 INFO L403 AbstractCegarLoop]: === Iteration 26 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 21:22:01,820 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 21:22:01,820 INFO L85 PathProgramCache]: Analyzing trace with hash 405624216, now seen corresponding path program 1 times [2022-04-07 21:22:01,820 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 21:22:01,821 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2027486033] [2022-04-07 21:22:01,821 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 21:22:01,821 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 21:22:01,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:22:01,843 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 21:22:01,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:22:01,846 INFO L290 TraceCheckUtils]: 0: Hoare triple {313692#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {313686#true} is VALID [2022-04-07 21:22:01,846 INFO L290 TraceCheckUtils]: 1: Hoare triple {313686#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {313686#true} is VALID [2022-04-07 21:22:01,846 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {313686#true} {313686#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {313686#true} is VALID [2022-04-07 21:22:01,847 INFO L272 TraceCheckUtils]: 0: Hoare triple {313686#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {313692#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 21:22:01,847 INFO L290 TraceCheckUtils]: 1: Hoare triple {313692#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {313686#true} is VALID [2022-04-07 21:22:01,847 INFO L290 TraceCheckUtils]: 2: Hoare triple {313686#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {313686#true} is VALID [2022-04-07 21:22:01,847 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {313686#true} {313686#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {313686#true} is VALID [2022-04-07 21:22:01,847 INFO L272 TraceCheckUtils]: 4: Hoare triple {313686#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {313686#true} is VALID [2022-04-07 21:22:01,847 INFO L290 TraceCheckUtils]: 5: Hoare triple {313686#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {313686#true} is VALID [2022-04-07 21:22:01,847 INFO L290 TraceCheckUtils]: 6: Hoare triple {313686#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {313686#true} is VALID [2022-04-07 21:22:01,847 INFO L290 TraceCheckUtils]: 7: Hoare triple {313686#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {313686#true} is VALID [2022-04-07 21:22:01,848 INFO L290 TraceCheckUtils]: 8: Hoare triple {313686#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {313686#true} is VALID [2022-04-07 21:22:01,848 INFO L290 TraceCheckUtils]: 9: Hoare triple {313686#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {313686#true} is VALID [2022-04-07 21:22:01,848 INFO L290 TraceCheckUtils]: 10: Hoare triple {313686#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {313686#true} is VALID [2022-04-07 21:22:01,848 INFO L290 TraceCheckUtils]: 11: Hoare triple {313686#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {313686#true} is VALID [2022-04-07 21:22:01,848 INFO L290 TraceCheckUtils]: 12: Hoare triple {313686#true} [293] L100-1-->L104-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {313686#true} is VALID [2022-04-07 21:22:01,848 INFO L290 TraceCheckUtils]: 13: Hoare triple {313686#true} [295] L104-1-->L108-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {313686#true} is VALID [2022-04-07 21:22:01,848 INFO L290 TraceCheckUtils]: 14: Hoare triple {313686#true} [297] L108-1-->L112-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {313686#true} is VALID [2022-04-07 21:22:01,848 INFO L290 TraceCheckUtils]: 15: Hoare triple {313686#true} [299] L112-1-->L116-1: Formula: (= v_main_~p8~0_5 0) InVars {main_~p8~0=v_main_~p8~0_5} OutVars{main_~p8~0=v_main_~p8~0_5} AuxVars[] AssignedVars[] {313686#true} is VALID [2022-04-07 21:22:01,848 INFO L290 TraceCheckUtils]: 16: Hoare triple {313686#true} [301] L116-1-->L120-1: Formula: (= v_main_~p9~0_4 0) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[] {313691#(= main_~p9~0 0)} is VALID [2022-04-07 21:22:01,848 INFO L290 TraceCheckUtils]: 17: Hoare triple {313691#(= main_~p9~0 0)} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {313691#(= main_~p9~0 0)} is VALID [2022-04-07 21:22:01,849 INFO L290 TraceCheckUtils]: 18: Hoare triple {313691#(= main_~p9~0 0)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {313691#(= main_~p9~0 0)} is VALID [2022-04-07 21:22:01,849 INFO L290 TraceCheckUtils]: 19: Hoare triple {313691#(= main_~p9~0 0)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {313691#(= main_~p9~0 0)} is VALID [2022-04-07 21:22:01,849 INFO L290 TraceCheckUtils]: 20: Hoare triple {313691#(= main_~p9~0 0)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {313691#(= main_~p9~0 0)} is VALID [2022-04-07 21:22:01,849 INFO L290 TraceCheckUtils]: 21: Hoare triple {313691#(= main_~p9~0 0)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {313691#(= main_~p9~0 0)} is VALID [2022-04-07 21:22:01,850 INFO L290 TraceCheckUtils]: 22: Hoare triple {313691#(= main_~p9~0 0)} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {313691#(= main_~p9~0 0)} is VALID [2022-04-07 21:22:01,850 INFO L290 TraceCheckUtils]: 23: Hoare triple {313691#(= main_~p9~0 0)} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {313691#(= main_~p9~0 0)} is VALID [2022-04-07 21:22:01,850 INFO L290 TraceCheckUtils]: 24: Hoare triple {313691#(= main_~p9~0 0)} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {313691#(= main_~p9~0 0)} is VALID [2022-04-07 21:22:01,850 INFO L290 TraceCheckUtils]: 25: Hoare triple {313691#(= main_~p9~0 0)} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {313691#(= main_~p9~0 0)} is VALID [2022-04-07 21:22:01,850 INFO L290 TraceCheckUtils]: 26: Hoare triple {313691#(= main_~p9~0 0)} [331] L161-1-->L166-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {313691#(= main_~p9~0 0)} is VALID [2022-04-07 21:22:01,851 INFO L290 TraceCheckUtils]: 27: Hoare triple {313691#(= main_~p9~0 0)} [335] L166-1-->L171-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {313691#(= main_~p9~0 0)} is VALID [2022-04-07 21:22:01,851 INFO L290 TraceCheckUtils]: 28: Hoare triple {313691#(= main_~p9~0 0)} [339] L171-1-->L176-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {313691#(= main_~p9~0 0)} is VALID [2022-04-07 21:22:01,851 INFO L290 TraceCheckUtils]: 29: Hoare triple {313691#(= main_~p9~0 0)} [343] L176-1-->L181-1: Formula: (= v_main_~p8~0_3 0) InVars {main_~p8~0=v_main_~p8~0_3} OutVars{main_~p8~0=v_main_~p8~0_3} AuxVars[] AssignedVars[] {313691#(= main_~p9~0 0)} is VALID [2022-04-07 21:22:01,851 INFO L290 TraceCheckUtils]: 30: Hoare triple {313691#(= main_~p9~0 0)} [346] L181-1-->L187: Formula: (not (= v_main_~p9~0_2 0)) InVars {main_~p9~0=v_main_~p9~0_2} OutVars{main_~p9~0=v_main_~p9~0_2} AuxVars[] AssignedVars[] {313687#false} is VALID [2022-04-07 21:22:01,851 INFO L290 TraceCheckUtils]: 31: Hoare triple {313687#false} [348] L187-->L212-1: Formula: (not (= v_main_~lk9~0_3 1)) InVars {main_~lk9~0=v_main_~lk9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_3} AuxVars[] AssignedVars[] {313687#false} is VALID [2022-04-07 21:22:01,852 INFO L290 TraceCheckUtils]: 32: Hoare triple {313687#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {313687#false} is VALID [2022-04-07 21:22:01,852 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 21:22:01,852 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 21:22:01,852 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2027486033] [2022-04-07 21:22:01,852 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2027486033] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 21:22:01,852 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 21:22:01,852 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-07 21:22:01,852 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [974162879] [2022-04-07 21:22:01,852 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 21:22:01,852 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 33 [2022-04-07 21:22:01,853 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 21:22:01,853 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:22:01,869 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 33 edges. 33 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:22:01,869 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-07 21:22:01,869 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 21:22:01,869 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-07 21:22:01,869 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-07 21:22:01,870 INFO L87 Difference]: Start difference. First operand 15369 states and 21767 transitions. Second operand has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:22:11,329 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:22:11,329 INFO L93 Difference]: Finished difference Result 20491 states and 28936 transitions. [2022-04-07 21:22:11,329 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-07 21:22:11,329 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 33 [2022-04-07 21:22:11,330 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 21:22:11,330 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:22:11,330 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 161 transitions. [2022-04-07 21:22:11,330 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:22:11,331 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 161 transitions. [2022-04-07 21:22:11,331 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 161 transitions. [2022-04-07 21:22:11,434 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 161 edges. 161 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:22:22,024 INFO L225 Difference]: With dead ends: 20491 [2022-04-07 21:22:22,025 INFO L226 Difference]: Without dead ends: 20491 [2022-04-07 21:22:22,025 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-07 21:22:22,025 INFO L913 BasicCegarLoop]: 136 mSDtfsCounter, 160 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 80 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 160 SdHoareTripleChecker+Valid, 143 SdHoareTripleChecker+Invalid, 83 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 80 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 21:22:22,025 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [160 Valid, 143 Invalid, 83 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 80 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-07 21:22:22,030 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20491 states. [2022-04-07 21:22:22,170 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20491 to 20489. [2022-04-07 21:22:22,170 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 21:22:22,194 INFO L82 GeneralOperation]: Start isEquivalent. First operand 20491 states. Second operand has 20489 states, 20485 states have (on average 1.4123505003661216) internal successors, (28932), 20485 states have internal predecessors, (28932), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:22:22,217 INFO L74 IsIncluded]: Start isIncluded. First operand 20491 states. Second operand has 20489 states, 20485 states have (on average 1.4123505003661216) internal successors, (28932), 20485 states have internal predecessors, (28932), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:22:22,240 INFO L87 Difference]: Start difference. First operand 20491 states. Second operand has 20489 states, 20485 states have (on average 1.4123505003661216) internal successors, (28932), 20485 states have internal predecessors, (28932), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:22:32,995 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:22:32,995 INFO L93 Difference]: Finished difference Result 20491 states and 28936 transitions. [2022-04-07 21:22:32,995 INFO L276 IsEmpty]: Start isEmpty. Operand 20491 states and 28936 transitions. [2022-04-07 21:22:33,008 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:22:33,008 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:22:33,031 INFO L74 IsIncluded]: Start isIncluded. First operand has 20489 states, 20485 states have (on average 1.4123505003661216) internal successors, (28932), 20485 states have internal predecessors, (28932), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 20491 states. [2022-04-07 21:22:33,116 INFO L87 Difference]: Start difference. First operand has 20489 states, 20485 states have (on average 1.4123505003661216) internal successors, (28932), 20485 states have internal predecessors, (28932), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 20491 states. [2022-04-07 21:22:44,096 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:22:44,096 INFO L93 Difference]: Finished difference Result 20491 states and 28936 transitions. [2022-04-07 21:22:44,097 INFO L276 IsEmpty]: Start isEmpty. Operand 20491 states and 28936 transitions. [2022-04-07 21:22:44,109 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:22:44,109 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:22:44,109 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 21:22:44,109 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 21:22:44,125 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20489 states, 20485 states have (on average 1.4123505003661216) internal successors, (28932), 20485 states have internal predecessors, (28932), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:22:54,191 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20489 states to 20489 states and 28935 transitions. [2022-04-07 21:22:54,191 INFO L78 Accepts]: Start accepts. Automaton has 20489 states and 28935 transitions. Word has length 33 [2022-04-07 21:22:54,191 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 21:22:54,191 INFO L478 AbstractCegarLoop]: Abstraction has 20489 states and 28935 transitions. [2022-04-07 21:22:54,192 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:22:54,192 INFO L276 IsEmpty]: Start isEmpty. Operand 20489 states and 28935 transitions. [2022-04-07 21:22:54,199 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2022-04-07 21:22:54,199 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 21:22:54,199 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 21:22:54,199 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2022-04-07 21:22:54,199 INFO L403 AbstractCegarLoop]: === Iteration 27 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 21:22:54,200 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 21:22:54,200 INFO L85 PathProgramCache]: Analyzing trace with hash 686554246, now seen corresponding path program 1 times [2022-04-07 21:22:54,200 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 21:22:54,200 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1198164221] [2022-04-07 21:22:54,200 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 21:22:54,200 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 21:22:54,220 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:22:54,230 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 21:22:54,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:22:54,236 INFO L290 TraceCheckUtils]: 0: Hoare triple {395666#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {395660#true} is VALID [2022-04-07 21:22:54,237 INFO L290 TraceCheckUtils]: 1: Hoare triple {395660#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {395660#true} is VALID [2022-04-07 21:22:54,237 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {395660#true} {395660#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {395660#true} is VALID [2022-04-07 21:22:54,237 INFO L272 TraceCheckUtils]: 0: Hoare triple {395660#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {395666#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 21:22:54,237 INFO L290 TraceCheckUtils]: 1: Hoare triple {395666#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {395660#true} is VALID [2022-04-07 21:22:54,237 INFO L290 TraceCheckUtils]: 2: Hoare triple {395660#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {395660#true} is VALID [2022-04-07 21:22:54,237 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {395660#true} {395660#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {395660#true} is VALID [2022-04-07 21:22:54,237 INFO L272 TraceCheckUtils]: 4: Hoare triple {395660#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {395660#true} is VALID [2022-04-07 21:22:54,237 INFO L290 TraceCheckUtils]: 5: Hoare triple {395660#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {395660#true} is VALID [2022-04-07 21:22:54,238 INFO L290 TraceCheckUtils]: 6: Hoare triple {395660#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {395660#true} is VALID [2022-04-07 21:22:54,238 INFO L290 TraceCheckUtils]: 7: Hoare triple {395660#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {395660#true} is VALID [2022-04-07 21:22:54,238 INFO L290 TraceCheckUtils]: 8: Hoare triple {395660#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {395660#true} is VALID [2022-04-07 21:22:54,238 INFO L290 TraceCheckUtils]: 9: Hoare triple {395660#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {395660#true} is VALID [2022-04-07 21:22:54,238 INFO L290 TraceCheckUtils]: 10: Hoare triple {395660#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {395660#true} is VALID [2022-04-07 21:22:54,238 INFO L290 TraceCheckUtils]: 11: Hoare triple {395660#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {395660#true} is VALID [2022-04-07 21:22:54,238 INFO L290 TraceCheckUtils]: 12: Hoare triple {395660#true} [293] L100-1-->L104-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {395660#true} is VALID [2022-04-07 21:22:54,238 INFO L290 TraceCheckUtils]: 13: Hoare triple {395660#true} [295] L104-1-->L108-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {395660#true} is VALID [2022-04-07 21:22:54,238 INFO L290 TraceCheckUtils]: 14: Hoare triple {395660#true} [297] L108-1-->L112-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {395660#true} is VALID [2022-04-07 21:22:54,238 INFO L290 TraceCheckUtils]: 15: Hoare triple {395660#true} [299] L112-1-->L116-1: Formula: (= v_main_~p8~0_5 0) InVars {main_~p8~0=v_main_~p8~0_5} OutVars{main_~p8~0=v_main_~p8~0_5} AuxVars[] AssignedVars[] {395660#true} is VALID [2022-04-07 21:22:54,238 INFO L290 TraceCheckUtils]: 16: Hoare triple {395660#true} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {395665#(not (= main_~p9~0 0))} is VALID [2022-04-07 21:22:54,239 INFO L290 TraceCheckUtils]: 17: Hoare triple {395665#(not (= main_~p9~0 0))} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {395665#(not (= main_~p9~0 0))} is VALID [2022-04-07 21:22:54,239 INFO L290 TraceCheckUtils]: 18: Hoare triple {395665#(not (= main_~p9~0 0))} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {395665#(not (= main_~p9~0 0))} is VALID [2022-04-07 21:22:54,239 INFO L290 TraceCheckUtils]: 19: Hoare triple {395665#(not (= main_~p9~0 0))} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {395665#(not (= main_~p9~0 0))} is VALID [2022-04-07 21:22:54,239 INFO L290 TraceCheckUtils]: 20: Hoare triple {395665#(not (= main_~p9~0 0))} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {395665#(not (= main_~p9~0 0))} is VALID [2022-04-07 21:22:54,240 INFO L290 TraceCheckUtils]: 21: Hoare triple {395665#(not (= main_~p9~0 0))} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {395665#(not (= main_~p9~0 0))} is VALID [2022-04-07 21:22:54,240 INFO L290 TraceCheckUtils]: 22: Hoare triple {395665#(not (= main_~p9~0 0))} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {395665#(not (= main_~p9~0 0))} is VALID [2022-04-07 21:22:54,240 INFO L290 TraceCheckUtils]: 23: Hoare triple {395665#(not (= main_~p9~0 0))} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {395665#(not (= main_~p9~0 0))} is VALID [2022-04-07 21:22:54,240 INFO L290 TraceCheckUtils]: 24: Hoare triple {395665#(not (= main_~p9~0 0))} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {395665#(not (= main_~p9~0 0))} is VALID [2022-04-07 21:22:54,240 INFO L290 TraceCheckUtils]: 25: Hoare triple {395665#(not (= main_~p9~0 0))} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {395665#(not (= main_~p9~0 0))} is VALID [2022-04-07 21:22:54,241 INFO L290 TraceCheckUtils]: 26: Hoare triple {395665#(not (= main_~p9~0 0))} [331] L161-1-->L166-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {395665#(not (= main_~p9~0 0))} is VALID [2022-04-07 21:22:54,241 INFO L290 TraceCheckUtils]: 27: Hoare triple {395665#(not (= main_~p9~0 0))} [335] L166-1-->L171-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {395665#(not (= main_~p9~0 0))} is VALID [2022-04-07 21:22:54,241 INFO L290 TraceCheckUtils]: 28: Hoare triple {395665#(not (= main_~p9~0 0))} [339] L171-1-->L176-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {395665#(not (= main_~p9~0 0))} is VALID [2022-04-07 21:22:54,241 INFO L290 TraceCheckUtils]: 29: Hoare triple {395665#(not (= main_~p9~0 0))} [343] L176-1-->L181-1: Formula: (= v_main_~p8~0_3 0) InVars {main_~p8~0=v_main_~p8~0_3} OutVars{main_~p8~0=v_main_~p8~0_3} AuxVars[] AssignedVars[] {395665#(not (= main_~p9~0 0))} is VALID [2022-04-07 21:22:54,242 INFO L290 TraceCheckUtils]: 30: Hoare triple {395665#(not (= main_~p9~0 0))} [347] L181-1-->L186-1: Formula: (= v_main_~p9~0_5 0) InVars {main_~p9~0=v_main_~p9~0_5} OutVars{main_~p9~0=v_main_~p9~0_5} AuxVars[] AssignedVars[] {395661#false} is VALID [2022-04-07 21:22:54,242 INFO L290 TraceCheckUtils]: 31: Hoare triple {395661#false} [350] L186-1-->L192: Formula: (not (= v_main_~p10~0_3 0)) InVars {main_~p10~0=v_main_~p10~0_3} OutVars{main_~p10~0=v_main_~p10~0_3} AuxVars[] AssignedVars[] {395661#false} is VALID [2022-04-07 21:22:54,242 INFO L290 TraceCheckUtils]: 32: Hoare triple {395661#false} [352] L192-->L212-1: Formula: (not (= v_main_~lk10~0_4 1)) InVars {main_~lk10~0=v_main_~lk10~0_4} OutVars{main_~lk10~0=v_main_~lk10~0_4} AuxVars[] AssignedVars[] {395661#false} is VALID [2022-04-07 21:22:54,242 INFO L290 TraceCheckUtils]: 33: Hoare triple {395661#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {395661#false} is VALID [2022-04-07 21:22:54,242 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 21:22:54,242 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 21:22:54,242 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1198164221] [2022-04-07 21:22:54,242 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1198164221] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 21:22:54,242 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 21:22:54,242 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-07 21:22:54,242 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1313956550] [2022-04-07 21:22:54,243 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 21:22:54,243 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 34 [2022-04-07 21:22:54,243 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 21:22:54,243 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:22:54,259 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 34 edges. 34 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:22:54,260 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-07 21:22:54,260 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 21:22:54,260 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-07 21:22:54,260 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-07 21:22:54,260 INFO L87 Difference]: Start difference. First operand 20489 states and 28935 transitions. Second operand has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:23:04,048 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:23:04,048 INFO L93 Difference]: Finished difference Result 20747 states and 28936 transitions. [2022-04-07 21:23:04,048 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-07 21:23:04,048 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 34 [2022-04-07 21:23:04,048 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 21:23:04,048 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:23:04,049 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 160 transitions. [2022-04-07 21:23:04,049 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:23:04,050 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 160 transitions. [2022-04-07 21:23:04,050 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 160 transitions. [2022-04-07 21:23:04,156 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 160 edges. 160 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:23:16,091 INFO L225 Difference]: With dead ends: 20747 [2022-04-07 21:23:16,092 INFO L226 Difference]: Without dead ends: 20747 [2022-04-07 21:23:16,092 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-07 21:23:16,092 INFO L913 BasicCegarLoop]: 122 mSDtfsCounter, 175 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 79 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 175 SdHoareTripleChecker+Valid, 129 SdHoareTripleChecker+Invalid, 81 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 79 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 21:23:16,092 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [175 Valid, 129 Invalid, 81 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 79 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 21:23:16,098 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20747 states. [2022-04-07 21:23:16,255 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20747 to 20745. [2022-04-07 21:23:16,255 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 21:23:16,281 INFO L82 GeneralOperation]: Start isEquivalent. First operand 20747 states. Second operand has 20745 states, 20741 states have (on average 1.3949182778072418) internal successors, (28932), 20741 states have internal predecessors, (28932), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:23:16,313 INFO L74 IsIncluded]: Start isIncluded. First operand 20747 states. Second operand has 20745 states, 20741 states have (on average 1.3949182778072418) internal successors, (28932), 20741 states have internal predecessors, (28932), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:23:16,354 INFO L87 Difference]: Start difference. First operand 20747 states. Second operand has 20745 states, 20741 states have (on average 1.3949182778072418) internal successors, (28932), 20741 states have internal predecessors, (28932), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:23:26,320 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:23:26,320 INFO L93 Difference]: Finished difference Result 20747 states and 28936 transitions. [2022-04-07 21:23:26,320 INFO L276 IsEmpty]: Start isEmpty. Operand 20747 states and 28936 transitions. [2022-04-07 21:23:26,332 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:23:26,332 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:23:26,346 INFO L74 IsIncluded]: Start isIncluded. First operand has 20745 states, 20741 states have (on average 1.3949182778072418) internal successors, (28932), 20741 states have internal predecessors, (28932), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 20747 states. [2022-04-07 21:23:26,359 INFO L87 Difference]: Start difference. First operand has 20745 states, 20741 states have (on average 1.3949182778072418) internal successors, (28932), 20741 states have internal predecessors, (28932), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 20747 states. [2022-04-07 21:23:37,709 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:23:37,709 INFO L93 Difference]: Finished difference Result 20747 states and 28936 transitions. [2022-04-07 21:23:37,709 INFO L276 IsEmpty]: Start isEmpty. Operand 20747 states and 28936 transitions. [2022-04-07 21:23:37,721 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:23:37,721 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:23:37,721 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 21:23:37,721 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 21:23:37,737 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20745 states, 20741 states have (on average 1.3949182778072418) internal successors, (28932), 20741 states have internal predecessors, (28932), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:23:50,353 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20745 states to 20745 states and 28935 transitions. [2022-04-07 21:23:50,353 INFO L78 Accepts]: Start accepts. Automaton has 20745 states and 28935 transitions. Word has length 34 [2022-04-07 21:23:50,354 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 21:23:50,354 INFO L478 AbstractCegarLoop]: Abstraction has 20745 states and 28935 transitions. [2022-04-07 21:23:50,354 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:23:50,354 INFO L276 IsEmpty]: Start isEmpty. Operand 20745 states and 28935 transitions. [2022-04-07 21:23:50,360 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2022-04-07 21:23:50,360 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 21:23:50,360 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 21:23:50,361 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable26 [2022-04-07 21:23:50,364 INFO L403 AbstractCegarLoop]: === Iteration 28 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 21:23:50,365 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 21:23:50,365 INFO L85 PathProgramCache]: Analyzing trace with hash -310518107, now seen corresponding path program 1 times [2022-04-07 21:23:50,365 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 21:23:50,365 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1733121855] [2022-04-07 21:23:50,365 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 21:23:50,365 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 21:23:50,401 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:23:50,413 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 21:23:50,414 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:23:50,416 INFO L290 TraceCheckUtils]: 0: Hoare triple {478664#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {478658#true} is VALID [2022-04-07 21:23:50,416 INFO L290 TraceCheckUtils]: 1: Hoare triple {478658#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {478658#true} is VALID [2022-04-07 21:23:50,416 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {478658#true} {478658#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {478658#true} is VALID [2022-04-07 21:23:50,416 INFO L272 TraceCheckUtils]: 0: Hoare triple {478658#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {478664#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 21:23:50,417 INFO L290 TraceCheckUtils]: 1: Hoare triple {478664#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {478658#true} is VALID [2022-04-07 21:23:50,417 INFO L290 TraceCheckUtils]: 2: Hoare triple {478658#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {478658#true} is VALID [2022-04-07 21:23:50,417 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {478658#true} {478658#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {478658#true} is VALID [2022-04-07 21:23:50,417 INFO L272 TraceCheckUtils]: 4: Hoare triple {478658#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {478658#true} is VALID [2022-04-07 21:23:50,417 INFO L290 TraceCheckUtils]: 5: Hoare triple {478658#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {478658#true} is VALID [2022-04-07 21:23:50,417 INFO L290 TraceCheckUtils]: 6: Hoare triple {478658#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {478658#true} is VALID [2022-04-07 21:23:50,417 INFO L290 TraceCheckUtils]: 7: Hoare triple {478658#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {478658#true} is VALID [2022-04-07 21:23:50,417 INFO L290 TraceCheckUtils]: 8: Hoare triple {478658#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {478658#true} is VALID [2022-04-07 21:23:50,417 INFO L290 TraceCheckUtils]: 9: Hoare triple {478658#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {478658#true} is VALID [2022-04-07 21:23:50,417 INFO L290 TraceCheckUtils]: 10: Hoare triple {478658#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {478658#true} is VALID [2022-04-07 21:23:50,417 INFO L290 TraceCheckUtils]: 11: Hoare triple {478658#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {478658#true} is VALID [2022-04-07 21:23:50,417 INFO L290 TraceCheckUtils]: 12: Hoare triple {478658#true} [293] L100-1-->L104-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {478658#true} is VALID [2022-04-07 21:23:50,418 INFO L290 TraceCheckUtils]: 13: Hoare triple {478658#true} [295] L104-1-->L108-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {478658#true} is VALID [2022-04-07 21:23:50,418 INFO L290 TraceCheckUtils]: 14: Hoare triple {478658#true} [297] L108-1-->L112-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {478658#true} is VALID [2022-04-07 21:23:50,418 INFO L290 TraceCheckUtils]: 15: Hoare triple {478658#true} [299] L112-1-->L116-1: Formula: (= v_main_~p8~0_5 0) InVars {main_~p8~0=v_main_~p8~0_5} OutVars{main_~p8~0=v_main_~p8~0_5} AuxVars[] AssignedVars[] {478658#true} is VALID [2022-04-07 21:23:50,418 INFO L290 TraceCheckUtils]: 16: Hoare triple {478658#true} [301] L116-1-->L120-1: Formula: (= v_main_~p9~0_4 0) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[] {478658#true} is VALID [2022-04-07 21:23:50,418 INFO L290 TraceCheckUtils]: 17: Hoare triple {478658#true} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {478663#(= main_~lk10~0 1)} is VALID [2022-04-07 21:23:50,418 INFO L290 TraceCheckUtils]: 18: Hoare triple {478663#(= main_~lk10~0 1)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {478663#(= main_~lk10~0 1)} is VALID [2022-04-07 21:23:50,418 INFO L290 TraceCheckUtils]: 19: Hoare triple {478663#(= main_~lk10~0 1)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {478663#(= main_~lk10~0 1)} is VALID [2022-04-07 21:23:50,419 INFO L290 TraceCheckUtils]: 20: Hoare triple {478663#(= main_~lk10~0 1)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {478663#(= main_~lk10~0 1)} is VALID [2022-04-07 21:23:50,419 INFO L290 TraceCheckUtils]: 21: Hoare triple {478663#(= main_~lk10~0 1)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {478663#(= main_~lk10~0 1)} is VALID [2022-04-07 21:23:50,419 INFO L290 TraceCheckUtils]: 22: Hoare triple {478663#(= main_~lk10~0 1)} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {478663#(= main_~lk10~0 1)} is VALID [2022-04-07 21:23:50,419 INFO L290 TraceCheckUtils]: 23: Hoare triple {478663#(= main_~lk10~0 1)} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {478663#(= main_~lk10~0 1)} is VALID [2022-04-07 21:23:50,420 INFO L290 TraceCheckUtils]: 24: Hoare triple {478663#(= main_~lk10~0 1)} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {478663#(= main_~lk10~0 1)} is VALID [2022-04-07 21:23:50,420 INFO L290 TraceCheckUtils]: 25: Hoare triple {478663#(= main_~lk10~0 1)} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {478663#(= main_~lk10~0 1)} is VALID [2022-04-07 21:23:50,420 INFO L290 TraceCheckUtils]: 26: Hoare triple {478663#(= main_~lk10~0 1)} [331] L161-1-->L166-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {478663#(= main_~lk10~0 1)} is VALID [2022-04-07 21:23:50,420 INFO L290 TraceCheckUtils]: 27: Hoare triple {478663#(= main_~lk10~0 1)} [335] L166-1-->L171-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {478663#(= main_~lk10~0 1)} is VALID [2022-04-07 21:23:50,421 INFO L290 TraceCheckUtils]: 28: Hoare triple {478663#(= main_~lk10~0 1)} [339] L171-1-->L176-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {478663#(= main_~lk10~0 1)} is VALID [2022-04-07 21:23:50,421 INFO L290 TraceCheckUtils]: 29: Hoare triple {478663#(= main_~lk10~0 1)} [343] L176-1-->L181-1: Formula: (= v_main_~p8~0_3 0) InVars {main_~p8~0=v_main_~p8~0_3} OutVars{main_~p8~0=v_main_~p8~0_3} AuxVars[] AssignedVars[] {478663#(= main_~lk10~0 1)} is VALID [2022-04-07 21:23:50,421 INFO L290 TraceCheckUtils]: 30: Hoare triple {478663#(= main_~lk10~0 1)} [347] L181-1-->L186-1: Formula: (= v_main_~p9~0_5 0) InVars {main_~p9~0=v_main_~p9~0_5} OutVars{main_~p9~0=v_main_~p9~0_5} AuxVars[] AssignedVars[] {478663#(= main_~lk10~0 1)} is VALID [2022-04-07 21:23:50,421 INFO L290 TraceCheckUtils]: 31: Hoare triple {478663#(= main_~lk10~0 1)} [350] L186-1-->L192: Formula: (not (= v_main_~p10~0_3 0)) InVars {main_~p10~0=v_main_~p10~0_3} OutVars{main_~p10~0=v_main_~p10~0_3} AuxVars[] AssignedVars[] {478663#(= main_~lk10~0 1)} is VALID [2022-04-07 21:23:50,422 INFO L290 TraceCheckUtils]: 32: Hoare triple {478663#(= main_~lk10~0 1)} [352] L192-->L212-1: Formula: (not (= v_main_~lk10~0_4 1)) InVars {main_~lk10~0=v_main_~lk10~0_4} OutVars{main_~lk10~0=v_main_~lk10~0_4} AuxVars[] AssignedVars[] {478659#false} is VALID [2022-04-07 21:23:50,422 INFO L290 TraceCheckUtils]: 33: Hoare triple {478659#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {478659#false} is VALID [2022-04-07 21:23:50,422 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 21:23:50,422 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 21:23:50,422 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1733121855] [2022-04-07 21:23:50,422 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1733121855] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 21:23:50,422 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 21:23:50,422 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-07 21:23:50,422 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1614720724] [2022-04-07 21:23:50,422 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 21:23:50,423 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 34 [2022-04-07 21:23:50,423 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 21:23:50,423 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:23:50,440 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 34 edges. 34 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:23:50,440 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-07 21:23:50,440 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 21:23:50,440 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-07 21:23:50,440 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-07 21:23:50,440 INFO L87 Difference]: Start difference. First operand 20745 states and 28935 transitions. Second operand has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:25:02,450 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:25:02,451 INFO L93 Difference]: Finished difference Result 35851 states and 50696 transitions. [2022-04-07 21:25:02,451 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-07 21:25:02,451 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 34 [2022-04-07 21:25:02,451 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 21:25:02,451 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:25:02,452 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 142 transitions. [2022-04-07 21:25:02,452 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:25:02,453 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 142 transitions. [2022-04-07 21:25:02,453 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 142 transitions. [2022-04-07 21:25:02,547 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 142 edges. 142 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:26:08,858 INFO L225 Difference]: With dead ends: 35851 [2022-04-07 21:26:08,858 INFO L226 Difference]: Without dead ends: 35851 [2022-04-07 21:26:08,858 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-07 21:26:08,858 INFO L913 BasicCegarLoop]: 86 mSDtfsCounter, 173 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 81 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 173 SdHoareTripleChecker+Valid, 93 SdHoareTripleChecker+Invalid, 83 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 81 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 21:26:08,859 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [173 Valid, 93 Invalid, 83 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 81 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 21:26:08,872 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35851 states. [2022-04-07 21:26:09,128 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35851 to 30729. [2022-04-07 21:26:09,128 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 21:26:09,156 INFO L82 GeneralOperation]: Start isEquivalent. First operand 35851 states. Second operand has 30729 states, 30725 states have (on average 1.3499104963384865) internal successors, (41476), 30725 states have internal predecessors, (41476), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:26:09,182 INFO L74 IsIncluded]: Start isIncluded. First operand 35851 states. Second operand has 30729 states, 30725 states have (on average 1.3499104963384865) internal successors, (41476), 30725 states have internal predecessors, (41476), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:26:09,209 INFO L87 Difference]: Start difference. First operand 35851 states. Second operand has 30729 states, 30725 states have (on average 1.3499104963384865) internal successors, (41476), 30725 states have internal predecessors, (41476), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:26:41,095 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:26:41,095 INFO L93 Difference]: Finished difference Result 35851 states and 50696 transitions. [2022-04-07 21:26:41,095 INFO L276 IsEmpty]: Start isEmpty. Operand 35851 states and 50696 transitions. [2022-04-07 21:26:41,115 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:26:41,115 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:26:41,136 INFO L74 IsIncluded]: Start isIncluded. First operand has 30729 states, 30725 states have (on average 1.3499104963384865) internal successors, (41476), 30725 states have internal predecessors, (41476), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 35851 states. [2022-04-07 21:26:41,158 INFO L87 Difference]: Start difference. First operand has 30729 states, 30725 states have (on average 1.3499104963384865) internal successors, (41476), 30725 states have internal predecessors, (41476), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 35851 states. [2022-04-07 21:27:20,300 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:27:20,300 INFO L93 Difference]: Finished difference Result 35851 states and 50696 transitions. [2022-04-07 21:27:20,300 INFO L276 IsEmpty]: Start isEmpty. Operand 35851 states and 50696 transitions. [2022-04-07 21:27:20,325 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:27:20,325 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:27:20,325 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 21:27:20,325 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 21:27:20,347 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 30729 states, 30725 states have (on average 1.3499104963384865) internal successors, (41476), 30725 states have internal predecessors, (41476), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:27:44,477 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30729 states to 30729 states and 41479 transitions. [2022-04-07 21:27:44,478 INFO L78 Accepts]: Start accepts. Automaton has 30729 states and 41479 transitions. Word has length 34 [2022-04-07 21:27:44,478 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 21:27:44,478 INFO L478 AbstractCegarLoop]: Abstraction has 30729 states and 41479 transitions. [2022-04-07 21:27:44,478 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:27:44,478 INFO L276 IsEmpty]: Start isEmpty. Operand 30729 states and 41479 transitions. [2022-04-07 21:27:44,491 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2022-04-07 21:27:44,491 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 21:27:44,491 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 21:27:44,491 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable27 [2022-04-07 21:27:44,491 INFO L403 AbstractCegarLoop]: === Iteration 29 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 21:27:44,491 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 21:27:44,492 INFO L85 PathProgramCache]: Analyzing trace with hash 1042791590, now seen corresponding path program 1 times [2022-04-07 21:27:44,492 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 21:27:44,492 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1821089193] [2022-04-07 21:27:44,492 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 21:27:44,492 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 21:27:44,514 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:27:44,532 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 21:27:44,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:27:44,535 INFO L290 TraceCheckUtils]: 0: Hoare triple {616958#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {616952#true} is VALID [2022-04-07 21:27:44,535 INFO L290 TraceCheckUtils]: 1: Hoare triple {616952#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {616952#true} is VALID [2022-04-07 21:27:44,535 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {616952#true} {616952#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {616952#true} is VALID [2022-04-07 21:27:44,535 INFO L272 TraceCheckUtils]: 0: Hoare triple {616952#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {616958#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 21:27:44,535 INFO L290 TraceCheckUtils]: 1: Hoare triple {616958#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {616952#true} is VALID [2022-04-07 21:27:44,535 INFO L290 TraceCheckUtils]: 2: Hoare triple {616952#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {616952#true} is VALID [2022-04-07 21:27:44,536 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {616952#true} {616952#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {616952#true} is VALID [2022-04-07 21:27:44,536 INFO L272 TraceCheckUtils]: 4: Hoare triple {616952#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {616952#true} is VALID [2022-04-07 21:27:44,536 INFO L290 TraceCheckUtils]: 5: Hoare triple {616952#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {616952#true} is VALID [2022-04-07 21:27:44,536 INFO L290 TraceCheckUtils]: 6: Hoare triple {616952#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {616952#true} is VALID [2022-04-07 21:27:44,536 INFO L290 TraceCheckUtils]: 7: Hoare triple {616952#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {616952#true} is VALID [2022-04-07 21:27:44,536 INFO L290 TraceCheckUtils]: 8: Hoare triple {616952#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {616952#true} is VALID [2022-04-07 21:27:44,536 INFO L290 TraceCheckUtils]: 9: Hoare triple {616952#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {616952#true} is VALID [2022-04-07 21:27:44,536 INFO L290 TraceCheckUtils]: 10: Hoare triple {616952#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {616952#true} is VALID [2022-04-07 21:27:44,536 INFO L290 TraceCheckUtils]: 11: Hoare triple {616952#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {616952#true} is VALID [2022-04-07 21:27:44,536 INFO L290 TraceCheckUtils]: 12: Hoare triple {616952#true} [293] L100-1-->L104-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {616952#true} is VALID [2022-04-07 21:27:44,536 INFO L290 TraceCheckUtils]: 13: Hoare triple {616952#true} [295] L104-1-->L108-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {616952#true} is VALID [2022-04-07 21:27:44,536 INFO L290 TraceCheckUtils]: 14: Hoare triple {616952#true} [297] L108-1-->L112-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {616952#true} is VALID [2022-04-07 21:27:44,536 INFO L290 TraceCheckUtils]: 15: Hoare triple {616952#true} [299] L112-1-->L116-1: Formula: (= v_main_~p8~0_5 0) InVars {main_~p8~0=v_main_~p8~0_5} OutVars{main_~p8~0=v_main_~p8~0_5} AuxVars[] AssignedVars[] {616952#true} is VALID [2022-04-07 21:27:44,537 INFO L290 TraceCheckUtils]: 16: Hoare triple {616952#true} [301] L116-1-->L120-1: Formula: (= v_main_~p9~0_4 0) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[] {616952#true} is VALID [2022-04-07 21:27:44,537 INFO L290 TraceCheckUtils]: 17: Hoare triple {616952#true} [303] L120-1-->L124-1: Formula: (= v_main_~p10~0_4 0) InVars {main_~p10~0=v_main_~p10~0_4} OutVars{main_~p10~0=v_main_~p10~0_4} AuxVars[] AssignedVars[] {616957#(= main_~p10~0 0)} is VALID [2022-04-07 21:27:44,537 INFO L290 TraceCheckUtils]: 18: Hoare triple {616957#(= main_~p10~0 0)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {616957#(= main_~p10~0 0)} is VALID [2022-04-07 21:27:44,537 INFO L290 TraceCheckUtils]: 19: Hoare triple {616957#(= main_~p10~0 0)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {616957#(= main_~p10~0 0)} is VALID [2022-04-07 21:27:44,538 INFO L290 TraceCheckUtils]: 20: Hoare triple {616957#(= main_~p10~0 0)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {616957#(= main_~p10~0 0)} is VALID [2022-04-07 21:27:44,538 INFO L290 TraceCheckUtils]: 21: Hoare triple {616957#(= main_~p10~0 0)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {616957#(= main_~p10~0 0)} is VALID [2022-04-07 21:27:44,538 INFO L290 TraceCheckUtils]: 22: Hoare triple {616957#(= main_~p10~0 0)} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {616957#(= main_~p10~0 0)} is VALID [2022-04-07 21:27:44,539 INFO L290 TraceCheckUtils]: 23: Hoare triple {616957#(= main_~p10~0 0)} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {616957#(= main_~p10~0 0)} is VALID [2022-04-07 21:27:44,539 INFO L290 TraceCheckUtils]: 24: Hoare triple {616957#(= main_~p10~0 0)} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {616957#(= main_~p10~0 0)} is VALID [2022-04-07 21:27:44,539 INFO L290 TraceCheckUtils]: 25: Hoare triple {616957#(= main_~p10~0 0)} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {616957#(= main_~p10~0 0)} is VALID [2022-04-07 21:27:44,540 INFO L290 TraceCheckUtils]: 26: Hoare triple {616957#(= main_~p10~0 0)} [331] L161-1-->L166-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {616957#(= main_~p10~0 0)} is VALID [2022-04-07 21:27:44,540 INFO L290 TraceCheckUtils]: 27: Hoare triple {616957#(= main_~p10~0 0)} [335] L166-1-->L171-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {616957#(= main_~p10~0 0)} is VALID [2022-04-07 21:27:44,540 INFO L290 TraceCheckUtils]: 28: Hoare triple {616957#(= main_~p10~0 0)} [339] L171-1-->L176-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {616957#(= main_~p10~0 0)} is VALID [2022-04-07 21:27:44,540 INFO L290 TraceCheckUtils]: 29: Hoare triple {616957#(= main_~p10~0 0)} [343] L176-1-->L181-1: Formula: (= v_main_~p8~0_3 0) InVars {main_~p8~0=v_main_~p8~0_3} OutVars{main_~p8~0=v_main_~p8~0_3} AuxVars[] AssignedVars[] {616957#(= main_~p10~0 0)} is VALID [2022-04-07 21:27:44,541 INFO L290 TraceCheckUtils]: 30: Hoare triple {616957#(= main_~p10~0 0)} [347] L181-1-->L186-1: Formula: (= v_main_~p9~0_5 0) InVars {main_~p9~0=v_main_~p9~0_5} OutVars{main_~p9~0=v_main_~p9~0_5} AuxVars[] AssignedVars[] {616957#(= main_~p10~0 0)} is VALID [2022-04-07 21:27:44,541 INFO L290 TraceCheckUtils]: 31: Hoare triple {616957#(= main_~p10~0 0)} [350] L186-1-->L192: Formula: (not (= v_main_~p10~0_3 0)) InVars {main_~p10~0=v_main_~p10~0_3} OutVars{main_~p10~0=v_main_~p10~0_3} AuxVars[] AssignedVars[] {616953#false} is VALID [2022-04-07 21:27:44,541 INFO L290 TraceCheckUtils]: 32: Hoare triple {616953#false} [352] L192-->L212-1: Formula: (not (= v_main_~lk10~0_4 1)) InVars {main_~lk10~0=v_main_~lk10~0_4} OutVars{main_~lk10~0=v_main_~lk10~0_4} AuxVars[] AssignedVars[] {616953#false} is VALID [2022-04-07 21:27:44,541 INFO L290 TraceCheckUtils]: 33: Hoare triple {616953#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {616953#false} is VALID [2022-04-07 21:27:44,541 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 21:27:44,541 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 21:27:44,541 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1821089193] [2022-04-07 21:27:44,542 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1821089193] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 21:27:44,542 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 21:27:44,542 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-07 21:27:44,542 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [198340966] [2022-04-07 21:27:44,542 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 21:27:44,542 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 34 [2022-04-07 21:27:44,542 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 21:27:44,542 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:27:44,562 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 34 edges. 34 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:27:44,562 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-07 21:27:44,562 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 21:27:44,562 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-07 21:27:44,562 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-07 21:27:44,563 INFO L87 Difference]: Start difference. First operand 30729 states and 41479 transitions. Second operand has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:28:43,617 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:28:43,618 INFO L93 Difference]: Finished difference Result 40459 states and 54280 transitions. [2022-04-07 21:28:43,618 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-07 21:28:43,618 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 34 [2022-04-07 21:28:43,618 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 21:28:43,618 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:28:43,619 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 159 transitions. [2022-04-07 21:28:43,619 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:28:43,620 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 159 transitions. [2022-04-07 21:28:43,620 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 159 transitions. [2022-04-07 21:28:43,704 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 159 edges. 159 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:29:34,198 INFO L225 Difference]: With dead ends: 40459 [2022-04-07 21:29:34,199 INFO L226 Difference]: Without dead ends: 40459 [2022-04-07 21:29:34,199 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-07 21:29:34,199 INFO L913 BasicCegarLoop]: 138 mSDtfsCounter, 154 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 79 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 154 SdHoareTripleChecker+Valid, 145 SdHoareTripleChecker+Invalid, 82 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 79 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 21:29:34,199 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [154 Valid, 145 Invalid, 82 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 79 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 21:29:34,209 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40459 states. [2022-04-07 21:29:34,597 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40459 to 40457. [2022-04-07 21:29:34,597 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 21:29:34,655 INFO L82 GeneralOperation]: Start isEquivalent. First operand 40459 states. Second operand has 40457 states, 40453 states have (on average 1.3417051887375473) internal successors, (54276), 40453 states have internal predecessors, (54276), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:29:34,699 INFO L74 IsIncluded]: Start isIncluded. First operand 40459 states. Second operand has 40457 states, 40453 states have (on average 1.3417051887375473) internal successors, (54276), 40453 states have internal predecessors, (54276), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:29:34,822 INFO L87 Difference]: Start difference. First operand 40459 states. Second operand has 40457 states, 40453 states have (on average 1.3417051887375473) internal successors, (54276), 40453 states have internal predecessors, (54276), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:30:43,587 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:30:43,587 INFO L93 Difference]: Finished difference Result 40459 states and 54280 transitions. [2022-04-07 21:30:43,587 INFO L276 IsEmpty]: Start isEmpty. Operand 40459 states and 54280 transitions. [2022-04-07 21:30:43,616 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:30:43,616 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:30:43,686 INFO L74 IsIncluded]: Start isIncluded. First operand has 40457 states, 40453 states have (on average 1.3417051887375473) internal successors, (54276), 40453 states have internal predecessors, (54276), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 40459 states. [2022-04-07 21:30:43,722 INFO L87 Difference]: Start difference. First operand has 40457 states, 40453 states have (on average 1.3417051887375473) internal successors, (54276), 40453 states have internal predecessors, (54276), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 40459 states. [2022-04-07 21:32:17,938 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:32:17,938 INFO L93 Difference]: Finished difference Result 40459 states and 54280 transitions. [2022-04-07 21:32:17,938 INFO L276 IsEmpty]: Start isEmpty. Operand 40459 states and 54280 transitions. [2022-04-07 21:32:17,981 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:32:17,981 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:32:17,981 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 21:32:17,981 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 21:32:18,024 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 40457 states, 40453 states have (on average 1.3417051887375473) internal successors, (54276), 40453 states have internal predecessors, (54276), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:33:28,468 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40457 states to 40457 states and 54279 transitions. [2022-04-07 21:33:28,468 INFO L78 Accepts]: Start accepts. Automaton has 40457 states and 54279 transitions. Word has length 34 [2022-04-07 21:33:28,468 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 21:33:28,468 INFO L478 AbstractCegarLoop]: Abstraction has 40457 states and 54279 transitions. [2022-04-07 21:33:28,468 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:33:28,471 INFO L276 IsEmpty]: Start isEmpty. Operand 40457 states and 54279 transitions. [2022-04-07 21:33:28,511 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2022-04-07 21:33:28,511 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 21:33:28,512 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 21:33:28,512 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable28 [2022-04-07 21:33:28,512 INFO L403 AbstractCegarLoop]: === Iteration 30 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 21:33:28,512 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 21:33:28,512 INFO L85 PathProgramCache]: Analyzing trace with hash -1036093516, now seen corresponding path program 1 times [2022-04-07 21:33:28,512 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 21:33:28,512 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [74213974] [2022-04-07 21:33:28,512 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 21:33:28,512 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 21:33:28,540 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:33:28,568 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 21:33:28,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:33:28,571 INFO L290 TraceCheckUtils]: 0: Hoare triple {778804#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {778798#true} is VALID [2022-04-07 21:33:28,571 INFO L290 TraceCheckUtils]: 1: Hoare triple {778798#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {778798#true} is VALID [2022-04-07 21:33:28,571 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {778798#true} {778798#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {778798#true} is VALID [2022-04-07 21:33:28,572 INFO L272 TraceCheckUtils]: 0: Hoare triple {778798#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {778804#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 21:33:28,572 INFO L290 TraceCheckUtils]: 1: Hoare triple {778804#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {778798#true} is VALID [2022-04-07 21:33:28,572 INFO L290 TraceCheckUtils]: 2: Hoare triple {778798#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {778798#true} is VALID [2022-04-07 21:33:28,572 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {778798#true} {778798#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {778798#true} is VALID [2022-04-07 21:33:28,572 INFO L272 TraceCheckUtils]: 4: Hoare triple {778798#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {778798#true} is VALID [2022-04-07 21:33:28,572 INFO L290 TraceCheckUtils]: 5: Hoare triple {778798#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {778798#true} is VALID [2022-04-07 21:33:28,572 INFO L290 TraceCheckUtils]: 6: Hoare triple {778798#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {778798#true} is VALID [2022-04-07 21:33:28,572 INFO L290 TraceCheckUtils]: 7: Hoare triple {778798#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {778798#true} is VALID [2022-04-07 21:33:28,572 INFO L290 TraceCheckUtils]: 8: Hoare triple {778798#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {778798#true} is VALID [2022-04-07 21:33:28,572 INFO L290 TraceCheckUtils]: 9: Hoare triple {778798#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {778798#true} is VALID [2022-04-07 21:33:28,572 INFO L290 TraceCheckUtils]: 10: Hoare triple {778798#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {778798#true} is VALID [2022-04-07 21:33:28,573 INFO L290 TraceCheckUtils]: 11: Hoare triple {778798#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {778798#true} is VALID [2022-04-07 21:33:28,573 INFO L290 TraceCheckUtils]: 12: Hoare triple {778798#true} [293] L100-1-->L104-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {778798#true} is VALID [2022-04-07 21:33:28,573 INFO L290 TraceCheckUtils]: 13: Hoare triple {778798#true} [295] L104-1-->L108-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {778798#true} is VALID [2022-04-07 21:33:28,573 INFO L290 TraceCheckUtils]: 14: Hoare triple {778798#true} [297] L108-1-->L112-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {778798#true} is VALID [2022-04-07 21:33:28,573 INFO L290 TraceCheckUtils]: 15: Hoare triple {778798#true} [299] L112-1-->L116-1: Formula: (= v_main_~p8~0_5 0) InVars {main_~p8~0=v_main_~p8~0_5} OutVars{main_~p8~0=v_main_~p8~0_5} AuxVars[] AssignedVars[] {778798#true} is VALID [2022-04-07 21:33:28,573 INFO L290 TraceCheckUtils]: 16: Hoare triple {778798#true} [301] L116-1-->L120-1: Formula: (= v_main_~p9~0_4 0) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[] {778798#true} is VALID [2022-04-07 21:33:28,573 INFO L290 TraceCheckUtils]: 17: Hoare triple {778798#true} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {778803#(not (= main_~p10~0 0))} is VALID [2022-04-07 21:33:28,573 INFO L290 TraceCheckUtils]: 18: Hoare triple {778803#(not (= main_~p10~0 0))} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {778803#(not (= main_~p10~0 0))} is VALID [2022-04-07 21:33:28,574 INFO L290 TraceCheckUtils]: 19: Hoare triple {778803#(not (= main_~p10~0 0))} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {778803#(not (= main_~p10~0 0))} is VALID [2022-04-07 21:33:28,574 INFO L290 TraceCheckUtils]: 20: Hoare triple {778803#(not (= main_~p10~0 0))} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {778803#(not (= main_~p10~0 0))} is VALID [2022-04-07 21:33:28,574 INFO L290 TraceCheckUtils]: 21: Hoare triple {778803#(not (= main_~p10~0 0))} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {778803#(not (= main_~p10~0 0))} is VALID [2022-04-07 21:33:28,575 INFO L290 TraceCheckUtils]: 22: Hoare triple {778803#(not (= main_~p10~0 0))} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {778803#(not (= main_~p10~0 0))} is VALID [2022-04-07 21:33:28,575 INFO L290 TraceCheckUtils]: 23: Hoare triple {778803#(not (= main_~p10~0 0))} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {778803#(not (= main_~p10~0 0))} is VALID [2022-04-07 21:33:28,575 INFO L290 TraceCheckUtils]: 24: Hoare triple {778803#(not (= main_~p10~0 0))} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {778803#(not (= main_~p10~0 0))} is VALID [2022-04-07 21:33:28,575 INFO L290 TraceCheckUtils]: 25: Hoare triple {778803#(not (= main_~p10~0 0))} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {778803#(not (= main_~p10~0 0))} is VALID [2022-04-07 21:33:28,576 INFO L290 TraceCheckUtils]: 26: Hoare triple {778803#(not (= main_~p10~0 0))} [331] L161-1-->L166-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {778803#(not (= main_~p10~0 0))} is VALID [2022-04-07 21:33:28,576 INFO L290 TraceCheckUtils]: 27: Hoare triple {778803#(not (= main_~p10~0 0))} [335] L166-1-->L171-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {778803#(not (= main_~p10~0 0))} is VALID [2022-04-07 21:33:28,576 INFO L290 TraceCheckUtils]: 28: Hoare triple {778803#(not (= main_~p10~0 0))} [339] L171-1-->L176-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {778803#(not (= main_~p10~0 0))} is VALID [2022-04-07 21:33:28,576 INFO L290 TraceCheckUtils]: 29: Hoare triple {778803#(not (= main_~p10~0 0))} [343] L176-1-->L181-1: Formula: (= v_main_~p8~0_3 0) InVars {main_~p8~0=v_main_~p8~0_3} OutVars{main_~p8~0=v_main_~p8~0_3} AuxVars[] AssignedVars[] {778803#(not (= main_~p10~0 0))} is VALID [2022-04-07 21:33:28,577 INFO L290 TraceCheckUtils]: 30: Hoare triple {778803#(not (= main_~p10~0 0))} [347] L181-1-->L186-1: Formula: (= v_main_~p9~0_5 0) InVars {main_~p9~0=v_main_~p9~0_5} OutVars{main_~p9~0=v_main_~p9~0_5} AuxVars[] AssignedVars[] {778803#(not (= main_~p10~0 0))} is VALID [2022-04-07 21:33:28,577 INFO L290 TraceCheckUtils]: 31: Hoare triple {778803#(not (= main_~p10~0 0))} [351] L186-1-->L191-1: Formula: (= v_main_~p10~0_5 0) InVars {main_~p10~0=v_main_~p10~0_5} OutVars{main_~p10~0=v_main_~p10~0_5} AuxVars[] AssignedVars[] {778799#false} is VALID [2022-04-07 21:33:28,577 INFO L290 TraceCheckUtils]: 32: Hoare triple {778799#false} [354] L191-1-->L197: Formula: (not (= v_main_~p11~0_4 0)) InVars {main_~p11~0=v_main_~p11~0_4} OutVars{main_~p11~0=v_main_~p11~0_4} AuxVars[] AssignedVars[] {778799#false} is VALID [2022-04-07 21:33:28,577 INFO L290 TraceCheckUtils]: 33: Hoare triple {778799#false} [356] L197-->L212-1: Formula: (not (= v_main_~lk11~0_4 1)) InVars {main_~lk11~0=v_main_~lk11~0_4} OutVars{main_~lk11~0=v_main_~lk11~0_4} AuxVars[] AssignedVars[] {778799#false} is VALID [2022-04-07 21:33:28,577 INFO L290 TraceCheckUtils]: 34: Hoare triple {778799#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {778799#false} is VALID [2022-04-07 21:33:28,577 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 21:33:28,581 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 21:33:28,582 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [74213974] [2022-04-07 21:33:28,582 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [74213974] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 21:33:28,582 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 21:33:28,582 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-07 21:33:28,582 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [615837065] [2022-04-07 21:33:28,582 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 21:33:28,582 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 8.0) internal successors, (32), 3 states have internal predecessors, (32), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 35 [2022-04-07 21:33:28,582 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 21:33:28,582 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 8.0) internal successors, (32), 3 states have internal predecessors, (32), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:33:28,612 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 35 edges. 35 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:33:28,612 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-07 21:33:28,613 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 21:33:28,613 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-07 21:33:28,613 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-07 21:33:28,613 INFO L87 Difference]: Start difference. First operand 40457 states and 54279 transitions. Second operand has 4 states, 4 states have (on average 8.0) internal successors, (32), 3 states have internal predecessors, (32), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1)