/usr/bin/java -ea -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --core.log.level.for.class de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN -tc ../../../trunk/examples/toolchains/AutomizerCTransformed.xml -s ../../../trunk/examples/settings/automizer/LoopAccelerationJordanC.epf -i ../../../trunk/examples/svcomp/loops-crafted-1/vnew2.c -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-34549b5 [2022-04-07 17:51:00,175 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-04-07 17:51:00,176 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-04-07 17:51:00,213 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-04-07 17:51:00,214 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-04-07 17:51:00,215 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-04-07 17:51:00,217 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-04-07 17:51:00,219 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-04-07 17:51:00,220 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-04-07 17:51:00,223 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-04-07 17:51:00,224 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-04-07 17:51:00,225 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-04-07 17:51:00,225 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-04-07 17:51:00,227 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-04-07 17:51:00,227 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-04-07 17:51:00,230 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-04-07 17:51:00,230 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-04-07 17:51:00,230 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-04-07 17:51:00,232 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-04-07 17:51:00,236 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-04-07 17:51:00,237 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-04-07 17:51:00,238 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-04-07 17:51:00,239 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-04-07 17:51:00,239 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-04-07 17:51:00,240 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-04-07 17:51:00,245 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2022-04-07 17:51:00,250 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-04-07 17:51:00,251 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-04-07 17:51:00,252 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-04-07 17:51:00,253 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/automizer/LoopAccelerationJordanC.epf [2022-04-07 17:51:00,261 INFO L113 SettingsManager]: Loading preferences was successful [2022-04-07 17:51:00,261 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-04-07 17:51:00,262 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-04-07 17:51:00,262 INFO L138 SettingsManager]: * sizeof long=4 [2022-04-07 17:51:00,262 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-04-07 17:51:00,262 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-04-07 17:51:00,263 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-04-07 17:51:00,263 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-04-07 17:51:00,263 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-04-07 17:51:00,263 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-04-07 17:51:00,263 INFO L138 SettingsManager]: * sizeof long double=12 [2022-04-07 17:51:00,263 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-04-07 17:51:00,264 INFO L138 SettingsManager]: * Use constant arrays=true [2022-04-07 17:51:00,264 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-04-07 17:51:00,264 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-04-07 17:51:00,264 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-04-07 17:51:00,264 INFO L138 SettingsManager]: * To the following directory=./dump/ [2022-04-07 17:51:00,264 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-04-07 17:51:00,264 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-07 17:51:00,264 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-04-07 17:51:00,264 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-04-07 17:51:00,265 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-04-07 17:51:00,265 INFO L138 SettingsManager]: * TransformationType=LOOP_ACCELERATION_JORDAN WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.core: Log level for class -> de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN; [2022-04-07 17:51:00,454 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-04-07 17:51:00,469 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-04-07 17:51:00,471 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-04-07 17:51:00,472 INFO L271 PluginConnector]: Initializing CDTParser... [2022-04-07 17:51:00,473 INFO L275 PluginConnector]: CDTParser initialized [2022-04-07 17:51:00,474 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loops-crafted-1/vnew2.c [2022-04-07 17:51:00,531 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/809338721/3041c8b3b422447d86c4f5eb1cd8ae62/FLAGb445bcdd2 [2022-04-07 17:51:00,842 INFO L306 CDTParser]: Found 1 translation units. [2022-04-07 17:51:00,843 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/vnew2.c [2022-04-07 17:51:00,851 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/809338721/3041c8b3b422447d86c4f5eb1cd8ae62/FLAGb445bcdd2 [2022-04-07 17:51:01,269 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/809338721/3041c8b3b422447d86c4f5eb1cd8ae62 [2022-04-07 17:51:01,271 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-04-07 17:51:01,272 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2022-04-07 17:51:01,273 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-04-07 17:51:01,273 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-04-07 17:51:01,277 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-04-07 17:51:01,278 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.04 05:51:01" (1/1) ... [2022-04-07 17:51:01,279 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6afff686 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:51:01, skipping insertion in model container [2022-04-07 17:51:01,279 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.04 05:51:01" (1/1) ... [2022-04-07 17:51:01,283 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-04-07 17:51:01,293 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-04-07 17:51:01,404 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/vnew2.c[403,416] [2022-04-07 17:51:01,431 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-07 17:51:01,437 INFO L203 MainTranslator]: Completed pre-run [2022-04-07 17:51:01,445 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/vnew2.c[403,416] [2022-04-07 17:51:01,448 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-07 17:51:01,456 INFO L208 MainTranslator]: Completed translation [2022-04-07 17:51:01,456 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:51:01 WrapperNode [2022-04-07 17:51:01,456 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-04-07 17:51:01,457 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-04-07 17:51:01,457 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-04-07 17:51:01,457 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-04-07 17:51:01,463 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:51:01" (1/1) ... [2022-04-07 17:51:01,464 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:51:01" (1/1) ... [2022-04-07 17:51:01,467 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:51:01" (1/1) ... [2022-04-07 17:51:01,467 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:51:01" (1/1) ... [2022-04-07 17:51:01,471 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:51:01" (1/1) ... [2022-04-07 17:51:01,473 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:51:01" (1/1) ... [2022-04-07 17:51:01,474 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:51:01" (1/1) ... [2022-04-07 17:51:01,475 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-04-07 17:51:01,476 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-04-07 17:51:01,476 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-04-07 17:51:01,476 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-04-07 17:51:01,476 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:51:01" (1/1) ... [2022-04-07 17:51:01,481 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-07 17:51:01,489 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:51:01,499 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-04-07 17:51:01,515 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-04-07 17:51:01,541 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2022-04-07 17:51:01,541 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-04-07 17:51:01,542 INFO L138 BoogieDeclarations]: Found implementation of procedure reach_error [2022-04-07 17:51:01,542 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2022-04-07 17:51:01,542 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2022-04-07 17:51:01,542 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2022-04-07 17:51:01,542 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2022-04-07 17:51:01,542 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_fail [2022-04-07 17:51:01,542 INFO L130 BoogieDeclarations]: Found specification of procedure reach_error [2022-04-07 17:51:01,543 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-04-07 17:51:01,543 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2022-04-07 17:51:01,543 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2022-04-07 17:51:01,543 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_uint [2022-04-07 17:51:01,544 INFO L130 BoogieDeclarations]: Found specification of procedure main [2022-04-07 17:51:01,544 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2022-04-07 17:51:01,546 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-04-07 17:51:01,546 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-04-07 17:51:01,546 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-04-07 17:51:01,546 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-04-07 17:51:01,546 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-04-07 17:51:01,588 INFO L234 CfgBuilder]: Building ICFG [2022-04-07 17:51:01,589 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-04-07 17:51:01,700 INFO L275 CfgBuilder]: Performing block encoding [2022-04-07 17:51:01,705 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-04-07 17:51:01,705 INFO L299 CfgBuilder]: Removed 1 assume(true) statements. [2022-04-07 17:51:01,706 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.04 05:51:01 BoogieIcfgContainer [2022-04-07 17:51:01,706 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-04-07 17:51:01,707 INFO L113 PluginConnector]: ------------------------IcfgTransformer---------------------------- [2022-04-07 17:51:01,707 INFO L271 PluginConnector]: Initializing IcfgTransformer... [2022-04-07 17:51:01,708 INFO L275 PluginConnector]: IcfgTransformer initialized [2022-04-07 17:51:01,710 INFO L185 PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.04 05:51:01" (1/1) ... [2022-04-07 17:51:01,711 INFO L168 ansformationObserver]: Applying ICFG transformation LOOP_ACCELERATION_JORDAN [2022-04-07 17:51:02,388 INFO L89 elerationTransformer]: Jordan loop acceleration statistics: 0 HavocedVariables, 3 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=2, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-07 17:51:02,389 INFO L91 elerationTransformer]: Accelerated Formula: (and (= v_main_~i~0_2 (+ v_main_~i~0_3 3)) (= v_main_~j~0_1 (+ v_main_~j~0_2 3)) (= v_main_~k~0_1 (+ v_main_~k~0_2 3)) (< (mod v_main_~i~0_3 4294967296) (mod v_main_~n~0_3 4294967296))) InVars {main_~k~0=v_main_~k~0_2, main_~j~0=v_main_~j~0_2, main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_3} OutVars{main_~k~0=v_main_~k~0_1, main_~j~0=v_main_~j~0_1, main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_3} AuxVars[] AssignedVars[main_~k~0, main_~j~0, main_~i~0] to Formula: (let ((.cse2 (mod v_main_~n~0_3 4294967296)) (.cse1 (mod v_main_~i~0_3 4294967296))) (or (let ((.cse0 (* (div (+ v_main_~k~0_2 (- v_main_~k~0_1)) (- 3)) 3))) (and (= (mod (+ v_main_~k~0_2 (* v_main_~k~0_1 2)) 3) 0) (= (+ v_main_~j~0_2 .cse0) v_main_~j~0_1) (= v_main_~i~0_2 (+ v_main_~i~0_3 .cse0)) (< 0 (div (+ v_main_~k~0_2 (* (- 1) v_main_~k~0_1)) (- 3))) (forall ((v_it_1 Int)) (or (not (<= (+ v_it_1 1) (div (+ v_main_~k~0_2 (* (- 1) v_main_~k~0_1)) (- 3)))) (not (<= 1 v_it_1)) (< (mod (+ v_main_~i~0_3 (* v_it_1 3)) 4294967296) (mod v_main_~n~0_3 4294967296)))) (< .cse1 .cse2))) (and (= v_main_~k~0_2 v_main_~k~0_1) (= v_main_~j~0_2 v_main_~j~0_1) (<= .cse2 .cse1) (= v_main_~i~0_3 v_main_~i~0_2)))) InVars {main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_3, main_~k~0=v_main_~k~0_2, main_~j~0=v_main_~j~0_2} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_3, main_~k~0=v_main_~k~0_1, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~k~0, main_~j~0, main_~i~0] [2022-04-07 17:51:02,397 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 07.04 05:51:02 BasicIcfg [2022-04-07 17:51:02,397 INFO L132 PluginConnector]: ------------------------ END IcfgTransformer---------------------------- [2022-04-07 17:51:02,399 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-04-07 17:51:02,399 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-04-07 17:51:02,402 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-04-07 17:51:02,402 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.04 05:51:01" (1/4) ... [2022-04-07 17:51:02,403 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5b39b764 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.04 05:51:02, skipping insertion in model container [2022-04-07 17:51:02,403 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 05:51:01" (2/4) ... [2022-04-07 17:51:02,403 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5b39b764 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.04 05:51:02, skipping insertion in model container [2022-04-07 17:51:02,403 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.04 05:51:01" (3/4) ... [2022-04-07 17:51:02,405 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5b39b764 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.04 05:51:02, skipping insertion in model container [2022-04-07 17:51:02,405 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 07.04 05:51:02" (4/4) ... [2022-04-07 17:51:02,406 INFO L111 eAbstractionObserver]: Analyzing ICFG vnew2.cJordan [2022-04-07 17:51:02,409 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:ForwardPredicates Determinization: PREDICATE_ABSTRACTION [2022-04-07 17:51:02,410 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-04-07 17:51:02,434 INFO L339 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-04-07 17:51:02,438 INFO L340 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=ForwardPredicates, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=false, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=All, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP [2022-04-07 17:51:02,439 INFO L341 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-04-07 17:51:02,448 INFO L276 IsEmpty]: Start isEmpty. Operand has 21 states, 13 states have (on average 1.4615384615384615) internal successors, (19), 15 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 17:51:02,452 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2022-04-07 17:51:02,452 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:51:02,453 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:51:02,453 INFO L403 AbstractCegarLoop]: === Iteration 1 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:51:02,456 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:51:02,456 INFO L85 PathProgramCache]: Analyzing trace with hash -310389807, now seen corresponding path program 1 times [2022-04-07 17:51:02,463 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:51:02,463 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [302671619] [2022-04-07 17:51:02,463 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:51:02,464 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:51:02,523 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:51:02,557 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 17:51:02,565 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:51:02,587 INFO L290 TraceCheckUtils]: 0: Hoare triple {29#(and (= |old(~SIZE~0)| ~SIZE~0) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [60] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#length_1| 2) 8) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= v_~SIZE~0_4 20000001) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{~SIZE~0=v_~SIZE~0_4, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[~SIZE~0, #NULL.offset, #NULL.base] {24#true} is VALID [2022-04-07 17:51:02,588 INFO L290 TraceCheckUtils]: 1: Hoare triple {24#true} [63] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24#true} is VALID [2022-04-07 17:51:02,588 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {24#true} {24#true} [80] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24#true} is VALID [2022-04-07 17:51:02,589 INFO L272 TraceCheckUtils]: 0: Hoare triple {24#true} [58] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {29#(and (= |old(~SIZE~0)| ~SIZE~0) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 17:51:02,590 INFO L290 TraceCheckUtils]: 1: Hoare triple {29#(and (= |old(~SIZE~0)| ~SIZE~0) (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [60] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#length_1| 2) 8) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= v_~SIZE~0_4 20000001) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{~SIZE~0=v_~SIZE~0_4, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[~SIZE~0, #NULL.offset, #NULL.base] {24#true} is VALID [2022-04-07 17:51:02,590 INFO L290 TraceCheckUtils]: 2: Hoare triple {24#true} [63] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24#true} is VALID [2022-04-07 17:51:02,590 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {24#true} {24#true} [80] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24#true} is VALID [2022-04-07 17:51:02,591 INFO L272 TraceCheckUtils]: 4: Hoare triple {24#true} [59] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24#true} is VALID [2022-04-07 17:51:02,591 INFO L290 TraceCheckUtils]: 5: Hoare triple {24#true} [62] mainENTRY-->L19: Formula: (= v_main_~n~0_4 |v_main_#t~nondet4_2|) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~i~0=v_main_~i~0_4, main_~n~0=v_main_~n~0_4, main_~k~0=v_main_~k~0_3, main_~j~0=v_main_~j~0_3} AuxVars[] AssignedVars[main_#t~nondet4, main_~k~0, main_~j~0, main_~i~0, main_~n~0] {24#true} is VALID [2022-04-07 17:51:02,591 INFO L290 TraceCheckUtils]: 6: Hoare triple {24#true} [65] L19-->L21-2: Formula: (and (= v_main_~k~0_4 0) (<= (mod v_main_~n~0_9 4294967296) (mod v_~SIZE~0_2 4294967296)) (= v_main_~i~0_5 v_main_~j~0_4) (= v_main_~j~0_4 v_main_~k~0_4)) InVars {~SIZE~0=v_~SIZE~0_2, main_~n~0=v_main_~n~0_9} OutVars{~SIZE~0=v_~SIZE~0_2, main_~i~0=v_main_~i~0_5, main_~n~0=v_main_~n~0_9, main_~k~0=v_main_~k~0_4, main_~j~0=v_main_~j~0_4} AuxVars[] AssignedVars[main_~k~0, main_~j~0, main_~i~0] {24#true} is VALID [2022-04-07 17:51:02,592 INFO L290 TraceCheckUtils]: 7: Hoare triple {24#true} [67] L21-2-->L21-3: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {25#false} is VALID [2022-04-07 17:51:02,592 INFO L290 TraceCheckUtils]: 8: Hoare triple {25#false} [70] L21-3-->L27: Formula: (< 0 (mod v_main_~n~0_8 4294967296)) InVars {main_~n~0=v_main_~n~0_8} OutVars{main_~n~0=v_main_~n~0_8} AuxVars[] AssignedVars[] {25#false} is VALID [2022-04-07 17:51:02,593 INFO L272 TraceCheckUtils]: 9: Hoare triple {25#false} [72] L27-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (let ((.cse0 (mod v_main_~j~0_6 4294967296)) (.cse1 (mod v_main_~i~0_7 4294967296))) (and (= .cse0 (mod v_main_~k~0_6 4294967296)) (= .cse1 .cse0) (not (= (mod (mod .cse1 (mod (+ v_~SIZE~0_7 2) 4294967296)) 4294967296) 0)))) 1 0)) InVars {~SIZE~0=v_~SIZE~0_7, main_~i~0=v_main_~i~0_7, main_~k~0=v_main_~k~0_6, main_~j~0=v_main_~j~0_6} OutVars{~SIZE~0=v_~SIZE~0_7, __VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~k~0, main_~j~0, main_~i~0] {25#false} is VALID [2022-04-07 17:51:02,593 INFO L290 TraceCheckUtils]: 10: Hoare triple {25#false} [74] __VERIFIER_assertENTRY-->L9: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {25#false} is VALID [2022-04-07 17:51:02,593 INFO L290 TraceCheckUtils]: 11: Hoare triple {25#false} [75] L9-->L10: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {25#false} is VALID [2022-04-07 17:51:02,593 INFO L290 TraceCheckUtils]: 12: Hoare triple {25#false} [77] L10-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25#false} is VALID [2022-04-07 17:51:02,594 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:51:02,594 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:51:02,594 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [302671619] [2022-04-07 17:51:02,595 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [302671619] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 17:51:02,595 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 17:51:02,595 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-07 17:51:02,596 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1278899744] [2022-04-07 17:51:02,597 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 17:51:02,603 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 3.0) internal successors, (9), 2 states have internal predecessors, (9), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 13 [2022-04-07 17:51:02,605 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:51:02,607 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 3.0) internal successors, (9), 2 states have internal predecessors, (9), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:51:02,622 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 13 edges. 13 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:51:02,622 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-07 17:51:02,622 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:51:02,639 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-07 17:51:02,640 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-07 17:51:02,641 INFO L87 Difference]: Start difference. First operand has 21 states, 13 states have (on average 1.4615384615384615) internal successors, (19), 15 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 3 states, 3 states have (on average 3.0) internal successors, (9), 2 states have internal predecessors, (9), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:51:02,690 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:51:02,690 INFO L93 Difference]: Finished difference Result 21 states and 23 transitions. [2022-04-07 17:51:02,691 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-07 17:51:02,691 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 3.0) internal successors, (9), 2 states have internal predecessors, (9), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 13 [2022-04-07 17:51:02,691 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:51:02,692 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 3.0) internal successors, (9), 2 states have internal predecessors, (9), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:51:02,697 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 25 transitions. [2022-04-07 17:51:02,698 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 3.0) internal successors, (9), 2 states have internal predecessors, (9), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:51:02,699 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 25 transitions. [2022-04-07 17:51:02,699 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 25 transitions. [2022-04-07 17:51:02,736 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 25 edges. 25 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:51:02,741 INFO L225 Difference]: With dead ends: 21 [2022-04-07 17:51:02,741 INFO L226 Difference]: Without dead ends: 14 [2022-04-07 17:51:02,742 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-07 17:51:02,745 INFO L913 BasicCegarLoop]: 20 mSDtfsCounter, 14 mSDsluCounter, 3 mSDsCounter, 0 mSdLazyCounter, 5 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 15 SdHoareTripleChecker+Valid, 23 SdHoareTripleChecker+Invalid, 7 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 5 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 17:51:02,745 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [15 Valid, 23 Invalid, 7 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 5 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 17:51:02,755 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14 states. [2022-04-07 17:51:02,761 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14 to 14. [2022-04-07 17:51:02,761 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:51:02,762 INFO L82 GeneralOperation]: Start isEquivalent. First operand 14 states. Second operand has 14 states, 9 states have (on average 1.1111111111111112) internal successors, (10), 9 states have internal predecessors, (10), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:51:02,762 INFO L74 IsIncluded]: Start isIncluded. First operand 14 states. Second operand has 14 states, 9 states have (on average 1.1111111111111112) internal successors, (10), 9 states have internal predecessors, (10), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:51:02,763 INFO L87 Difference]: Start difference. First operand 14 states. Second operand has 14 states, 9 states have (on average 1.1111111111111112) internal successors, (10), 9 states have internal predecessors, (10), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:51:02,764 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:51:02,764 INFO L93 Difference]: Finished difference Result 14 states and 14 transitions. [2022-04-07 17:51:02,764 INFO L276 IsEmpty]: Start isEmpty. Operand 14 states and 14 transitions. [2022-04-07 17:51:02,765 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:51:02,765 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:51:02,765 INFO L74 IsIncluded]: Start isIncluded. First operand has 14 states, 9 states have (on average 1.1111111111111112) internal successors, (10), 9 states have internal predecessors, (10), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 14 states. [2022-04-07 17:51:02,765 INFO L87 Difference]: Start difference. First operand has 14 states, 9 states have (on average 1.1111111111111112) internal successors, (10), 9 states have internal predecessors, (10), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 14 states. [2022-04-07 17:51:02,767 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:51:02,767 INFO L93 Difference]: Finished difference Result 14 states and 14 transitions. [2022-04-07 17:51:02,767 INFO L276 IsEmpty]: Start isEmpty. Operand 14 states and 14 transitions. [2022-04-07 17:51:02,767 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:51:02,767 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:51:02,767 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:51:02,767 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:51:02,768 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 9 states have (on average 1.1111111111111112) internal successors, (10), 9 states have internal predecessors, (10), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:51:02,768 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 14 transitions. [2022-04-07 17:51:02,769 INFO L78 Accepts]: Start accepts. Automaton has 14 states and 14 transitions. Word has length 13 [2022-04-07 17:51:02,769 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:51:02,770 INFO L478 AbstractCegarLoop]: Abstraction has 14 states and 14 transitions. [2022-04-07 17:51:02,770 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 3.0) internal successors, (9), 2 states have internal predecessors, (9), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:51:02,770 INFO L276 IsEmpty]: Start isEmpty. Operand 14 states and 14 transitions. [2022-04-07 17:51:02,770 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2022-04-07 17:51:02,770 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:51:02,770 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:51:02,771 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-04-07 17:51:02,771 INFO L403 AbstractCegarLoop]: === Iteration 2 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:51:02,771 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:51:02,771 INFO L85 PathProgramCache]: Analyzing trace with hash -281760656, now seen corresponding path program 1 times [2022-04-07 17:51:02,772 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:51:02,772 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1731497213] [2022-04-07 17:51:02,772 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:51:02,772 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:51:02,782 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-04-07 17:51:02,782 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [442971252] [2022-04-07 17:51:02,783 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:51:02,783 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:51:02,783 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:51:02,784 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:51:02,800 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-04-07 17:51:02,820 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:51:02,821 INFO L263 TraceCheckSpWp]: Trace formula consists of 65 conjuncts, 8 conjunts are in the unsatisfiable core [2022-04-07 17:51:02,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:51:02,829 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:51:02,870 INFO L272 TraceCheckUtils]: 0: Hoare triple {95#true} [58] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {95#true} is VALID [2022-04-07 17:51:02,870 INFO L290 TraceCheckUtils]: 1: Hoare triple {95#true} [60] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#length_1| 2) 8) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= v_~SIZE~0_4 20000001) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{~SIZE~0=v_~SIZE~0_4, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[~SIZE~0, #NULL.offset, #NULL.base] {95#true} is VALID [2022-04-07 17:51:02,870 INFO L290 TraceCheckUtils]: 2: Hoare triple {95#true} [63] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {95#true} is VALID [2022-04-07 17:51:02,870 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {95#true} {95#true} [80] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {95#true} is VALID [2022-04-07 17:51:02,871 INFO L272 TraceCheckUtils]: 4: Hoare triple {95#true} [59] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {95#true} is VALID [2022-04-07 17:51:02,871 INFO L290 TraceCheckUtils]: 5: Hoare triple {95#true} [62] mainENTRY-->L19: Formula: (= v_main_~n~0_4 |v_main_#t~nondet4_2|) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~i~0=v_main_~i~0_4, main_~n~0=v_main_~n~0_4, main_~k~0=v_main_~k~0_3, main_~j~0=v_main_~j~0_3} AuxVars[] AssignedVars[main_#t~nondet4, main_~k~0, main_~j~0, main_~i~0, main_~n~0] {95#true} is VALID [2022-04-07 17:51:02,871 INFO L290 TraceCheckUtils]: 6: Hoare triple {95#true} [65] L19-->L21-2: Formula: (and (= v_main_~k~0_4 0) (<= (mod v_main_~n~0_9 4294967296) (mod v_~SIZE~0_2 4294967296)) (= v_main_~i~0_5 v_main_~j~0_4) (= v_main_~j~0_4 v_main_~k~0_4)) InVars {~SIZE~0=v_~SIZE~0_2, main_~n~0=v_main_~n~0_9} OutVars{~SIZE~0=v_~SIZE~0_2, main_~i~0=v_main_~i~0_5, main_~n~0=v_main_~n~0_9, main_~k~0=v_main_~k~0_4, main_~j~0=v_main_~j~0_4} AuxVars[] AssignedVars[main_~k~0, main_~j~0, main_~i~0] {118#(= main_~i~0 0)} is VALID [2022-04-07 17:51:02,872 INFO L290 TraceCheckUtils]: 7: Hoare triple {118#(= main_~i~0 0)} [68] L21-2-->L21-3: Formula: (not (< (mod v_main_~i~0_1 4294967296) (mod v_main_~n~0_2 4294967296))) InVars {main_~i~0=v_main_~i~0_1, main_~n~0=v_main_~n~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[] {122#(not (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 17:51:02,872 INFO L290 TraceCheckUtils]: 8: Hoare triple {122#(not (< 0 (mod main_~n~0 4294967296)))} [70] L21-3-->L27: Formula: (< 0 (mod v_main_~n~0_8 4294967296)) InVars {main_~n~0=v_main_~n~0_8} OutVars{main_~n~0=v_main_~n~0_8} AuxVars[] AssignedVars[] {96#false} is VALID [2022-04-07 17:51:02,872 INFO L272 TraceCheckUtils]: 9: Hoare triple {96#false} [72] L27-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (let ((.cse0 (mod v_main_~j~0_6 4294967296)) (.cse1 (mod v_main_~i~0_7 4294967296))) (and (= .cse0 (mod v_main_~k~0_6 4294967296)) (= .cse1 .cse0) (not (= (mod (mod .cse1 (mod (+ v_~SIZE~0_7 2) 4294967296)) 4294967296) 0)))) 1 0)) InVars {~SIZE~0=v_~SIZE~0_7, main_~i~0=v_main_~i~0_7, main_~k~0=v_main_~k~0_6, main_~j~0=v_main_~j~0_6} OutVars{~SIZE~0=v_~SIZE~0_7, __VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~k~0, main_~j~0, main_~i~0] {96#false} is VALID [2022-04-07 17:51:02,873 INFO L290 TraceCheckUtils]: 10: Hoare triple {96#false} [74] __VERIFIER_assertENTRY-->L9: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {96#false} is VALID [2022-04-07 17:51:02,873 INFO L290 TraceCheckUtils]: 11: Hoare triple {96#false} [75] L9-->L10: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {96#false} is VALID [2022-04-07 17:51:02,873 INFO L290 TraceCheckUtils]: 12: Hoare triple {96#false} [77] L10-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {96#false} is VALID [2022-04-07 17:51:02,873 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:51:02,873 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-07 17:51:02,873 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:51:02,873 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1731497213] [2022-04-07 17:51:02,874 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-04-07 17:51:02,874 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [442971252] [2022-04-07 17:51:02,874 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [442971252] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 17:51:02,874 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 17:51:02,874 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-07 17:51:02,875 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1518295481] [2022-04-07 17:51:02,875 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 17:51:02,875 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 2.25) internal successors, (9), 4 states have internal predecessors, (9), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 13 [2022-04-07 17:51:02,875 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:51:02,876 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 2.25) internal successors, (9), 4 states have internal predecessors, (9), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:51:02,885 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 13 edges. 13 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:51:02,885 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-07 17:51:02,885 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:51:02,886 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-07 17:51:02,886 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-07 17:51:02,886 INFO L87 Difference]: Start difference. First operand 14 states and 14 transitions. Second operand has 4 states, 4 states have (on average 2.25) internal successors, (9), 4 states have internal predecessors, (9), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:51:02,918 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:51:02,918 INFO L93 Difference]: Finished difference Result 16 states and 16 transitions. [2022-04-07 17:51:02,918 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-07 17:51:02,918 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 2.25) internal successors, (9), 4 states have internal predecessors, (9), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 13 [2022-04-07 17:51:02,918 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:51:02,919 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 2.25) internal successors, (9), 4 states have internal predecessors, (9), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:51:02,919 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 17 transitions. [2022-04-07 17:51:02,920 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 2.25) internal successors, (9), 4 states have internal predecessors, (9), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:51:02,920 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 17 transitions. [2022-04-07 17:51:02,920 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 17 transitions. [2022-04-07 17:51:02,933 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 17 edges. 17 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:51:02,934 INFO L225 Difference]: With dead ends: 16 [2022-04-07 17:51:02,934 INFO L226 Difference]: Without dead ends: 15 [2022-04-07 17:51:02,934 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 10 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-07 17:51:02,935 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 1 mSDsluCounter, 18 mSDsCounter, 0 mSdLazyCounter, 8 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1 SdHoareTripleChecker+Valid, 30 SdHoareTripleChecker+Invalid, 9 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 8 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 1 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 17:51:02,936 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [1 Valid, 30 Invalid, 9 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 8 Invalid, 0 Unknown, 1 Unchecked, 0.0s Time] [2022-04-07 17:51:02,936 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15 states. [2022-04-07 17:51:02,937 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15 to 15. [2022-04-07 17:51:02,937 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:51:02,937 INFO L82 GeneralOperation]: Start isEquivalent. First operand 15 states. Second operand has 15 states, 10 states have (on average 1.1) internal successors, (11), 10 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:51:02,937 INFO L74 IsIncluded]: Start isIncluded. First operand 15 states. Second operand has 15 states, 10 states have (on average 1.1) internal successors, (11), 10 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:51:02,938 INFO L87 Difference]: Start difference. First operand 15 states. Second operand has 15 states, 10 states have (on average 1.1) internal successors, (11), 10 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:51:02,938 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:51:02,939 INFO L93 Difference]: Finished difference Result 15 states and 15 transitions. [2022-04-07 17:51:02,939 INFO L276 IsEmpty]: Start isEmpty. Operand 15 states and 15 transitions. [2022-04-07 17:51:02,939 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:51:02,939 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:51:02,939 INFO L74 IsIncluded]: Start isIncluded. First operand has 15 states, 10 states have (on average 1.1) internal successors, (11), 10 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 15 states. [2022-04-07 17:51:02,939 INFO L87 Difference]: Start difference. First operand has 15 states, 10 states have (on average 1.1) internal successors, (11), 10 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 15 states. [2022-04-07 17:51:02,940 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:51:02,940 INFO L93 Difference]: Finished difference Result 15 states and 15 transitions. [2022-04-07 17:51:02,940 INFO L276 IsEmpty]: Start isEmpty. Operand 15 states and 15 transitions. [2022-04-07 17:51:02,940 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:51:02,940 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:51:02,941 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:51:02,941 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:51:02,941 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 10 states have (on average 1.1) internal successors, (11), 10 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:51:02,941 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 15 transitions. [2022-04-07 17:51:02,941 INFO L78 Accepts]: Start accepts. Automaton has 15 states and 15 transitions. Word has length 13 [2022-04-07 17:51:02,942 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:51:02,942 INFO L478 AbstractCegarLoop]: Abstraction has 15 states and 15 transitions. [2022-04-07 17:51:02,942 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 2.25) internal successors, (9), 4 states have internal predecessors, (9), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:51:02,942 INFO L276 IsEmpty]: Start isEmpty. Operand 15 states and 15 transitions. [2022-04-07 17:51:02,942 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2022-04-07 17:51:02,942 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:51:02,942 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:51:02,963 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2022-04-07 17:51:03,155 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1,2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:51:03,156 INFO L403 AbstractCegarLoop]: === Iteration 3 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:51:03,156 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:51:03,156 INFO L85 PathProgramCache]: Analyzing trace with hash 683692065, now seen corresponding path program 1 times [2022-04-07 17:51:03,156 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:51:03,156 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1620144134] [2022-04-07 17:51:03,157 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:51:03,157 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:51:03,169 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (+ main_~n~0_5 (* (- 4294967296) (div main_~n~0_5 4294967296)) (* (- 1) main_~i~0_6) (* (- 3) .v_it_1.0) (* 4294967296 (div (+ main_~i~0_6 (* 3 .v_it_1.0)) 4294967296))) 0)) [2022-04-07 17:51:03,180 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-04-07 17:51:03,181 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1114895278] [2022-04-07 17:51:03,181 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:51:03,181 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:51:03,181 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:51:03,187 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:51:03,188 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-04-07 17:51:03,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:51:03,325 INFO L263 TraceCheckSpWp]: Trace formula consists of 66 conjuncts, 23 conjunts are in the unsatisfiable core [2022-04-07 17:51:03,354 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 17:51:03,355 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 17:51:18,906 INFO L272 TraceCheckUtils]: 0: Hoare triple {200#true} [58] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {200#true} is VALID [2022-04-07 17:51:18,907 INFO L290 TraceCheckUtils]: 1: Hoare triple {200#true} [60] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#length_1| 2) 8) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= v_~SIZE~0_4 20000001) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{~SIZE~0=v_~SIZE~0_4, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[~SIZE~0, #NULL.offset, #NULL.base] {208#(= ~SIZE~0 20000001)} is VALID [2022-04-07 17:51:18,908 INFO L290 TraceCheckUtils]: 2: Hoare triple {208#(= ~SIZE~0 20000001)} [63] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {208#(= ~SIZE~0 20000001)} is VALID [2022-04-07 17:51:18,908 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {208#(= ~SIZE~0 20000001)} {200#true} [80] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {208#(= ~SIZE~0 20000001)} is VALID [2022-04-07 17:51:18,909 INFO L272 TraceCheckUtils]: 4: Hoare triple {208#(= ~SIZE~0 20000001)} [59] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {208#(= ~SIZE~0 20000001)} is VALID [2022-04-07 17:51:18,909 INFO L290 TraceCheckUtils]: 5: Hoare triple {208#(= ~SIZE~0 20000001)} [62] mainENTRY-->L19: Formula: (= v_main_~n~0_4 |v_main_#t~nondet4_2|) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~i~0=v_main_~i~0_4, main_~n~0=v_main_~n~0_4, main_~k~0=v_main_~k~0_3, main_~j~0=v_main_~j~0_3} AuxVars[] AssignedVars[main_#t~nondet4, main_~k~0, main_~j~0, main_~i~0, main_~n~0] {208#(= ~SIZE~0 20000001)} is VALID [2022-04-07 17:51:18,910 INFO L290 TraceCheckUtils]: 6: Hoare triple {208#(= ~SIZE~0 20000001)} [65] L19-->L21-2: Formula: (and (= v_main_~k~0_4 0) (<= (mod v_main_~n~0_9 4294967296) (mod v_~SIZE~0_2 4294967296)) (= v_main_~i~0_5 v_main_~j~0_4) (= v_main_~j~0_4 v_main_~k~0_4)) InVars {~SIZE~0=v_~SIZE~0_2, main_~n~0=v_main_~n~0_9} OutVars{~SIZE~0=v_~SIZE~0_2, main_~i~0=v_main_~i~0_5, main_~n~0=v_main_~n~0_9, main_~k~0=v_main_~k~0_4, main_~j~0=v_main_~j~0_4} AuxVars[] AssignedVars[main_~k~0, main_~j~0, main_~i~0] {224#(and (= main_~i~0 main_~j~0) (= main_~k~0 0) (= ~SIZE~0 20000001) (<= (mod main_~n~0 4294967296) (mod ~SIZE~0 4294967296)) (= main_~k~0 main_~j~0))} is VALID [2022-04-07 17:51:18,912 INFO L290 TraceCheckUtils]: 7: Hoare triple {224#(and (= main_~i~0 main_~j~0) (= main_~k~0 0) (= ~SIZE~0 20000001) (<= (mod main_~n~0 4294967296) (mod ~SIZE~0 4294967296)) (= main_~k~0 main_~j~0))} [69] L21-2-->L21-2: Formula: (let ((.cse2 (mod v_main_~n~0_3 4294967296)) (.cse1 (mod v_main_~i~0_3 4294967296))) (or (let ((.cse0 (* (div (+ v_main_~k~0_2 (- v_main_~k~0_1)) (- 3)) 3))) (and (= (mod (+ v_main_~k~0_2 (* v_main_~k~0_1 2)) 3) 0) (= (+ v_main_~j~0_2 .cse0) v_main_~j~0_1) (= v_main_~i~0_2 (+ v_main_~i~0_3 .cse0)) (< 0 (div (+ v_main_~k~0_2 (* (- 1) v_main_~k~0_1)) (- 3))) (forall ((v_it_1 Int)) (or (not (<= (+ v_it_1 1) (div (+ v_main_~k~0_2 (* (- 1) v_main_~k~0_1)) (- 3)))) (not (<= 1 v_it_1)) (< (mod (+ v_main_~i~0_3 (* v_it_1 3)) 4294967296) (mod v_main_~n~0_3 4294967296)))) (< .cse1 .cse2))) (and (= v_main_~k~0_2 v_main_~k~0_1) (= v_main_~j~0_2 v_main_~j~0_1) (<= .cse2 .cse1) (= v_main_~i~0_3 v_main_~i~0_2)))) InVars {main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_3, main_~k~0=v_main_~k~0_2, main_~j~0=v_main_~j~0_2} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_3, main_~k~0=v_main_~k~0_1, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~k~0, main_~j~0, main_~i~0] {228#(and (or (and (= main_~k~0 0) (<= (mod main_~n~0 4294967296) 0) (= main_~j~0 0) (= main_~i~0 0)) (and (< 0 (div (* (- 1) main_~k~0) (- 3))) (= main_~j~0 (* (div (* (- 1) main_~k~0) (- 3)) 3)) (forall ((v_it_1 Int)) (or (< (mod (* v_it_1 3) 4294967296) (mod main_~n~0 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_it_1 1) (div (* (- 1) main_~k~0) (- 3)))))) (< 0 (mod main_~n~0 4294967296)) (= main_~i~0 (* (div (* (- 1) main_~k~0) (- 3)) 3)) (= (mod (* main_~k~0 2) 3) 0))) (= ~SIZE~0 20000001) (<= (mod main_~n~0 4294967296) (mod ~SIZE~0 4294967296)))} is VALID [2022-04-07 17:51:18,914 INFO L290 TraceCheckUtils]: 8: Hoare triple {228#(and (or (and (= main_~k~0 0) (<= (mod main_~n~0 4294967296) 0) (= main_~j~0 0) (= main_~i~0 0)) (and (< 0 (div (* (- 1) main_~k~0) (- 3))) (= main_~j~0 (* (div (* (- 1) main_~k~0) (- 3)) 3)) (forall ((v_it_1 Int)) (or (< (mod (* v_it_1 3) 4294967296) (mod main_~n~0 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_it_1 1) (div (* (- 1) main_~k~0) (- 3)))))) (< 0 (mod main_~n~0 4294967296)) (= main_~i~0 (* (div (* (- 1) main_~k~0) (- 3)) 3)) (= (mod (* main_~k~0 2) 3) 0))) (= ~SIZE~0 20000001) (<= (mod main_~n~0 4294967296) (mod ~SIZE~0 4294967296)))} [68] L21-2-->L21-3: Formula: (not (< (mod v_main_~i~0_1 4294967296) (mod v_main_~n~0_2 4294967296))) InVars {main_~i~0=v_main_~i~0_1, main_~n~0=v_main_~n~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[] {232#(and (not (< (mod main_~i~0 4294967296) (mod main_~n~0 4294967296))) (= ~SIZE~0 20000001) (<= (mod main_~n~0 4294967296) (mod ~SIZE~0 4294967296)) (or (and (= main_~k~0 0) (= main_~j~0 0) (= main_~i~0 0)) (and (< 0 (div (* (- 1) main_~k~0) (- 3))) (= main_~j~0 (* (div (* (- 1) main_~k~0) (- 3)) 3)) (forall ((v_it_1 Int)) (or (< (mod (* v_it_1 3) 4294967296) (mod main_~n~0 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_it_1 1) (div (* (- 1) main_~k~0) (- 3)))))) (< 0 (mod main_~n~0 4294967296)) (= main_~i~0 (* (div (* (- 1) main_~k~0) (- 3)) 3)) (= (mod (* main_~k~0 2) 3) 0))))} is VALID [2022-04-07 17:51:18,934 INFO L290 TraceCheckUtils]: 9: Hoare triple {232#(and (not (< (mod main_~i~0 4294967296) (mod main_~n~0 4294967296))) (= ~SIZE~0 20000001) (<= (mod main_~n~0 4294967296) (mod ~SIZE~0 4294967296)) (or (and (= main_~k~0 0) (= main_~j~0 0) (= main_~i~0 0)) (and (< 0 (div (* (- 1) main_~k~0) (- 3))) (= main_~j~0 (* (div (* (- 1) main_~k~0) (- 3)) 3)) (forall ((v_it_1 Int)) (or (< (mod (* v_it_1 3) 4294967296) (mod main_~n~0 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_it_1 1) (div (* (- 1) main_~k~0) (- 3)))))) (< 0 (mod main_~n~0 4294967296)) (= main_~i~0 (* (div (* (- 1) main_~k~0) (- 3)) 3)) (= (mod (* main_~k~0 2) 3) 0))))} [70] L21-3-->L27: Formula: (< 0 (mod v_main_~n~0_8 4294967296)) InVars {main_~n~0=v_main_~n~0_8} OutVars{main_~n~0=v_main_~n~0_8} AuxVars[] AssignedVars[] {236#(and (exists ((aux_div_aux_mod_aux_mod_main_~n~0_26_37_48 Int) (aux_mod_aux_mod_aux_mod_main_~n~0_26_37_48 Int) (aux_div_aux_mod_main_~n~0_26_37 Int)) (and (<= (+ (* aux_div_aux_mod_main_~n~0_26_37 4294967296) aux_mod_aux_mod_aux_mod_main_~n~0_26_37_48 (* aux_div_aux_mod_aux_mod_main_~n~0_26_37_48 4294967296)) (mod main_~i~0 4294967296)) (< 0 (div (* (- 1) main_~k~0) (- 3))) (= main_~j~0 (* (div (* (- 1) main_~k~0) (- 3)) 3)) (< 0 (+ aux_mod_aux_mod_aux_mod_main_~n~0_26_37_48 (* aux_div_aux_mod_aux_mod_main_~n~0_26_37_48 4294967296))) (< (+ aux_mod_aux_mod_aux_mod_main_~n~0_26_37_48 (* aux_div_aux_mod_aux_mod_main_~n~0_26_37_48 4294967296)) 4294967296) (forall ((v_it_1 Int)) (or (not (<= 1 v_it_1)) (< (mod (* v_it_1 3) 4294967296) (mod aux_mod_aux_mod_aux_mod_main_~n~0_26_37_48 4294967296)) (not (<= (+ v_it_1 1) (div (* (- 1) main_~k~0) (- 3)))))) (<= aux_mod_aux_mod_aux_mod_main_~n~0_26_37_48 (mod ~SIZE~0 4294967296)) (<= 0 (+ (* aux_div_aux_mod_main_~n~0_26_37 4294967296) aux_mod_aux_mod_aux_mod_main_~n~0_26_37_48 (* aux_div_aux_mod_aux_mod_main_~n~0_26_37_48 4294967296))) (= main_~i~0 (* (div (* (- 1) main_~k~0) (- 3)) 3)) (<= 0 aux_mod_aux_mod_aux_mod_main_~n~0_26_37_48) (= (mod (* main_~k~0 2) 3) 0))) (= ~SIZE~0 20000001))} is VALID [2022-04-07 17:51:18,984 INFO L272 TraceCheckUtils]: 10: Hoare triple {236#(and (exists ((aux_div_aux_mod_aux_mod_main_~n~0_26_37_48 Int) (aux_mod_aux_mod_aux_mod_main_~n~0_26_37_48 Int) (aux_div_aux_mod_main_~n~0_26_37 Int)) (and (<= (+ (* aux_div_aux_mod_main_~n~0_26_37 4294967296) aux_mod_aux_mod_aux_mod_main_~n~0_26_37_48 (* aux_div_aux_mod_aux_mod_main_~n~0_26_37_48 4294967296)) (mod main_~i~0 4294967296)) (< 0 (div (* (- 1) main_~k~0) (- 3))) (= main_~j~0 (* (div (* (- 1) main_~k~0) (- 3)) 3)) (< 0 (+ aux_mod_aux_mod_aux_mod_main_~n~0_26_37_48 (* aux_div_aux_mod_aux_mod_main_~n~0_26_37_48 4294967296))) (< (+ aux_mod_aux_mod_aux_mod_main_~n~0_26_37_48 (* aux_div_aux_mod_aux_mod_main_~n~0_26_37_48 4294967296)) 4294967296) (forall ((v_it_1 Int)) (or (not (<= 1 v_it_1)) (< (mod (* v_it_1 3) 4294967296) (mod aux_mod_aux_mod_aux_mod_main_~n~0_26_37_48 4294967296)) (not (<= (+ v_it_1 1) (div (* (- 1) main_~k~0) (- 3)))))) (<= aux_mod_aux_mod_aux_mod_main_~n~0_26_37_48 (mod ~SIZE~0 4294967296)) (<= 0 (+ (* aux_div_aux_mod_main_~n~0_26_37 4294967296) aux_mod_aux_mod_aux_mod_main_~n~0_26_37_48 (* aux_div_aux_mod_aux_mod_main_~n~0_26_37_48 4294967296))) (= main_~i~0 (* (div (* (- 1) main_~k~0) (- 3)) 3)) (<= 0 aux_mod_aux_mod_aux_mod_main_~n~0_26_37_48) (= (mod (* main_~k~0 2) 3) 0))) (= ~SIZE~0 20000001))} [72] L27-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (let ((.cse0 (mod v_main_~j~0_6 4294967296)) (.cse1 (mod v_main_~i~0_7 4294967296))) (and (= .cse0 (mod v_main_~k~0_6 4294967296)) (= .cse1 .cse0) (not (= (mod (mod .cse1 (mod (+ v_~SIZE~0_7 2) 4294967296)) 4294967296) 0)))) 1 0)) InVars {~SIZE~0=v_~SIZE~0_7, main_~i~0=v_main_~i~0_7, main_~k~0=v_main_~k~0_6, main_~j~0=v_main_~j~0_6} OutVars{~SIZE~0=v_~SIZE~0_7, __VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~k~0, main_~j~0, main_~i~0] {240#(= |__VERIFIER_assert_#in~cond| 1)} is VALID [2022-04-07 17:51:18,985 INFO L290 TraceCheckUtils]: 11: Hoare triple {240#(= |__VERIFIER_assert_#in~cond| 1)} [74] __VERIFIER_assertENTRY-->L9: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {244#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:51:18,986 INFO L290 TraceCheckUtils]: 12: Hoare triple {244#(<= 1 __VERIFIER_assert_~cond)} [75] L9-->L10: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {201#false} is VALID [2022-04-07 17:51:18,986 INFO L290 TraceCheckUtils]: 13: Hoare triple {201#false} [77] L10-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {201#false} is VALID [2022-04-07 17:51:18,986 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:51:18,986 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 17:52:01,132 INFO L290 TraceCheckUtils]: 13: Hoare triple {201#false} [77] L10-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {201#false} is VALID [2022-04-07 17:52:01,133 INFO L290 TraceCheckUtils]: 12: Hoare triple {244#(<= 1 __VERIFIER_assert_~cond)} [75] L9-->L10: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {201#false} is VALID [2022-04-07 17:52:01,134 INFO L290 TraceCheckUtils]: 11: Hoare triple {257#(<= 1 |__VERIFIER_assert_#in~cond|)} [74] __VERIFIER_assertENTRY-->L9: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {244#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 17:52:01,135 INFO L272 TraceCheckUtils]: 10: Hoare triple {261#(and (= (mod main_~i~0 4294967296) (mod main_~j~0 4294967296)) (= (mod main_~j~0 4294967296) (mod main_~k~0 4294967296)) (not (= (mod (mod (mod main_~i~0 4294967296) (mod (+ ~SIZE~0 2) 4294967296)) 4294967296) 0)))} [72] L27-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (let ((.cse0 (mod v_main_~j~0_6 4294967296)) (.cse1 (mod v_main_~i~0_7 4294967296))) (and (= .cse0 (mod v_main_~k~0_6 4294967296)) (= .cse1 .cse0) (not (= (mod (mod .cse1 (mod (+ v_~SIZE~0_7 2) 4294967296)) 4294967296) 0)))) 1 0)) InVars {~SIZE~0=v_~SIZE~0_7, main_~i~0=v_main_~i~0_7, main_~k~0=v_main_~k~0_6, main_~j~0=v_main_~j~0_6} OutVars{~SIZE~0=v_~SIZE~0_7, __VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~k~0, main_~j~0, main_~i~0] {257#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 17:52:01,136 INFO L290 TraceCheckUtils]: 9: Hoare triple {265#(or (and (= (mod main_~i~0 4294967296) (mod main_~j~0 4294967296)) (= (mod main_~j~0 4294967296) (mod main_~k~0 4294967296)) (not (= (mod (mod (mod main_~i~0 4294967296) (mod (+ ~SIZE~0 2) 4294967296)) 4294967296) 0))) (not (< 0 (mod main_~n~0 4294967296))))} [70] L21-3-->L27: Formula: (< 0 (mod v_main_~n~0_8 4294967296)) InVars {main_~n~0=v_main_~n~0_8} OutVars{main_~n~0=v_main_~n~0_8} AuxVars[] AssignedVars[] {261#(and (= (mod main_~i~0 4294967296) (mod main_~j~0 4294967296)) (= (mod main_~j~0 4294967296) (mod main_~k~0 4294967296)) (not (= (mod (mod (mod main_~i~0 4294967296) (mod (+ ~SIZE~0 2) 4294967296)) 4294967296) 0)))} is VALID [2022-04-07 17:52:01,137 INFO L290 TraceCheckUtils]: 8: Hoare triple {269#(or (and (= (mod main_~i~0 4294967296) (mod main_~j~0 4294967296)) (= (mod main_~j~0 4294967296) (mod main_~k~0 4294967296)) (not (= (mod (mod (mod main_~i~0 4294967296) (mod (+ ~SIZE~0 2) 4294967296)) 4294967296) 0))) (not (< 0 (mod main_~n~0 4294967296))) (< (mod main_~i~0 4294967296) (mod main_~n~0 4294967296)))} [68] L21-2-->L21-3: Formula: (not (< (mod v_main_~i~0_1 4294967296) (mod v_main_~n~0_2 4294967296))) InVars {main_~i~0=v_main_~i~0_1, main_~n~0=v_main_~n~0_2} OutVars{main_~i~0=v_main_~i~0_1, main_~n~0=v_main_~n~0_2} AuxVars[] AssignedVars[] {265#(or (and (= (mod main_~i~0 4294967296) (mod main_~j~0 4294967296)) (= (mod main_~j~0 4294967296) (mod main_~k~0 4294967296)) (not (= (mod (mod (mod main_~i~0 4294967296) (mod (+ ~SIZE~0 2) 4294967296)) 4294967296) 0))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 17:52:03,146 WARN L290 TraceCheckUtils]: 7: Hoare triple {273#(or (and (or (and (= (mod main_~i~0 4294967296) (mod main_~j~0 4294967296)) (= (mod main_~j~0 4294967296) (mod main_~k~0 4294967296)) (not (= (mod (mod (mod main_~i~0 4294967296) (mod (+ ~SIZE~0 2) 4294967296)) 4294967296) 0))) (not (<= (mod main_~n~0 4294967296) (mod main_~i~0 4294967296)))) (or (not (< (mod main_~i~0 4294967296) (mod main_~n~0 4294967296))) (forall ((aux_div_aux_mod_v_main_~k~0_11_50_77 Int) (aux_div_v_main_~i~0_12_31 Int) (aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 Int) (aux_div_v_main_~k~0_11_50 Int)) (or (and (= (mod (+ main_~k~0 (* aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 4294967293) (* aux_div_aux_mod_v_main_~k~0_11_50_77 3)) 4294967296) (mod (+ main_~j~0 (* (div (+ (* aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 3) (* aux_div_aux_mod_v_main_~k~0_11_50_77 (- 3))) (- 3)) 3)) 4294967296)) (= (mod (+ (* aux_div_v_main_~k~0_11_50 3) main_~i~0) 4294967296) (mod (+ main_~j~0 (* (div (+ (* aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 3) (* aux_div_aux_mod_v_main_~k~0_11_50_77 (- 3))) (- 3)) 3)) 4294967296)) (not (= (mod (mod (mod (+ (* aux_div_v_main_~k~0_11_50 3) main_~i~0) 4294967296) (mod (+ ~SIZE~0 2) 4294967296)) 4294967296) 0))) (<= aux_div_aux_mod_v_main_~k~0_11_50_77 0) (exists ((v_it_1 Int)) (and (<= (+ aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 v_it_1 1) aux_div_aux_mod_v_main_~k~0_11_50_77) (not (< (mod (+ main_~i~0 (* v_it_1 3)) 4294967296) (mod main_~n~0 4294967296))) (<= 1 v_it_1))) (<= 3 (* aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 3)) (<= (+ (* 4294967296 aux_div_v_main_~i~0_12_31) 4294967296) (+ (* aux_div_v_main_~k~0_11_50 3) main_~i~0)) (< (* aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 3) 0) (< (+ (* aux_div_v_main_~k~0_11_50 3) (* aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 3)) (* aux_div_aux_mod_v_main_~k~0_11_50_77 3)) (< (+ (* aux_div_v_main_~k~0_11_50 3) main_~i~0) (+ (mod main_~n~0 4294967296) (* 4294967296 aux_div_v_main_~i~0_12_31))) (<= (+ 3 (* aux_div_aux_mod_v_main_~k~0_11_50_77 3)) (+ (* aux_div_v_main_~k~0_11_50 3) (* aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 3))))))) (not (< 0 (mod main_~n~0 4294967296))))} [69] L21-2-->L21-2: Formula: (let ((.cse2 (mod v_main_~n~0_3 4294967296)) (.cse1 (mod v_main_~i~0_3 4294967296))) (or (let ((.cse0 (* (div (+ v_main_~k~0_2 (- v_main_~k~0_1)) (- 3)) 3))) (and (= (mod (+ v_main_~k~0_2 (* v_main_~k~0_1 2)) 3) 0) (= (+ v_main_~j~0_2 .cse0) v_main_~j~0_1) (= v_main_~i~0_2 (+ v_main_~i~0_3 .cse0)) (< 0 (div (+ v_main_~k~0_2 (* (- 1) v_main_~k~0_1)) (- 3))) (forall ((v_it_1 Int)) (or (not (<= (+ v_it_1 1) (div (+ v_main_~k~0_2 (* (- 1) v_main_~k~0_1)) (- 3)))) (not (<= 1 v_it_1)) (< (mod (+ v_main_~i~0_3 (* v_it_1 3)) 4294967296) (mod v_main_~n~0_3 4294967296)))) (< .cse1 .cse2))) (and (= v_main_~k~0_2 v_main_~k~0_1) (= v_main_~j~0_2 v_main_~j~0_1) (<= .cse2 .cse1) (= v_main_~i~0_3 v_main_~i~0_2)))) InVars {main_~i~0=v_main_~i~0_3, main_~n~0=v_main_~n~0_3, main_~k~0=v_main_~k~0_2, main_~j~0=v_main_~j~0_2} OutVars{main_~i~0=v_main_~i~0_2, main_~n~0=v_main_~n~0_3, main_~k~0=v_main_~k~0_1, main_~j~0=v_main_~j~0_1} AuxVars[] AssignedVars[main_~k~0, main_~j~0, main_~i~0] {269#(or (and (= (mod main_~i~0 4294967296) (mod main_~j~0 4294967296)) (= (mod main_~j~0 4294967296) (mod main_~k~0 4294967296)) (not (= (mod (mod (mod main_~i~0 4294967296) (mod (+ ~SIZE~0 2) 4294967296)) 4294967296) 0))) (not (< 0 (mod main_~n~0 4294967296))) (< (mod main_~i~0 4294967296) (mod main_~n~0 4294967296)))} is UNKNOWN [2022-04-07 17:52:05,158 WARN L290 TraceCheckUtils]: 6: Hoare triple {277#(or (forall ((aux_div_aux_mod_v_main_~k~0_11_50_77 Int) (aux_div_v_main_~i~0_12_31 Int) (aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 Int) (aux_div_v_main_~k~0_11_50 Int)) (or (<= aux_div_aux_mod_v_main_~k~0_11_50_77 0) (< (* aux_div_v_main_~k~0_11_50 3) (+ (mod main_~n~0 4294967296) (* 4294967296 aux_div_v_main_~i~0_12_31))) (<= 3 (* aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 3)) (exists ((v_it_1 Int)) (and (not (< (mod (* v_it_1 3) 4294967296) (mod main_~n~0 4294967296))) (<= (+ aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 v_it_1 1) aux_div_aux_mod_v_main_~k~0_11_50_77) (<= 1 v_it_1))) (not (= (mod (mod (mod (* aux_div_v_main_~k~0_11_50 3) 4294967296) (mod (+ ~SIZE~0 2) 4294967296)) 4294967296) 0)) (< (* aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 3) 0) (<= (+ (* 4294967296 aux_div_v_main_~i~0_12_31) 4294967296) (* aux_div_v_main_~k~0_11_50 3)) (< (+ (* aux_div_v_main_~k~0_11_50 3) (* aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 3)) (* aux_div_aux_mod_v_main_~k~0_11_50_77 3)) (<= (+ 3 (* aux_div_aux_mod_v_main_~k~0_11_50_77 3)) (+ (* aux_div_v_main_~k~0_11_50 3) (* aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 3))))) (not (<= (mod main_~n~0 4294967296) (mod ~SIZE~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [65] L19-->L21-2: Formula: (and (= v_main_~k~0_4 0) (<= (mod v_main_~n~0_9 4294967296) (mod v_~SIZE~0_2 4294967296)) (= v_main_~i~0_5 v_main_~j~0_4) (= v_main_~j~0_4 v_main_~k~0_4)) InVars {~SIZE~0=v_~SIZE~0_2, main_~n~0=v_main_~n~0_9} OutVars{~SIZE~0=v_~SIZE~0_2, main_~i~0=v_main_~i~0_5, main_~n~0=v_main_~n~0_9, main_~k~0=v_main_~k~0_4, main_~j~0=v_main_~j~0_4} AuxVars[] AssignedVars[main_~k~0, main_~j~0, main_~i~0] {273#(or (and (or (and (= (mod main_~i~0 4294967296) (mod main_~j~0 4294967296)) (= (mod main_~j~0 4294967296) (mod main_~k~0 4294967296)) (not (= (mod (mod (mod main_~i~0 4294967296) (mod (+ ~SIZE~0 2) 4294967296)) 4294967296) 0))) (not (<= (mod main_~n~0 4294967296) (mod main_~i~0 4294967296)))) (or (not (< (mod main_~i~0 4294967296) (mod main_~n~0 4294967296))) (forall ((aux_div_aux_mod_v_main_~k~0_11_50_77 Int) (aux_div_v_main_~i~0_12_31 Int) (aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 Int) (aux_div_v_main_~k~0_11_50 Int)) (or (and (= (mod (+ main_~k~0 (* aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 4294967293) (* aux_div_aux_mod_v_main_~k~0_11_50_77 3)) 4294967296) (mod (+ main_~j~0 (* (div (+ (* aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 3) (* aux_div_aux_mod_v_main_~k~0_11_50_77 (- 3))) (- 3)) 3)) 4294967296)) (= (mod (+ (* aux_div_v_main_~k~0_11_50 3) main_~i~0) 4294967296) (mod (+ main_~j~0 (* (div (+ (* aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 3) (* aux_div_aux_mod_v_main_~k~0_11_50_77 (- 3))) (- 3)) 3)) 4294967296)) (not (= (mod (mod (mod (+ (* aux_div_v_main_~k~0_11_50 3) main_~i~0) 4294967296) (mod (+ ~SIZE~0 2) 4294967296)) 4294967296) 0))) (<= aux_div_aux_mod_v_main_~k~0_11_50_77 0) (exists ((v_it_1 Int)) (and (<= (+ aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 v_it_1 1) aux_div_aux_mod_v_main_~k~0_11_50_77) (not (< (mod (+ main_~i~0 (* v_it_1 3)) 4294967296) (mod main_~n~0 4294967296))) (<= 1 v_it_1))) (<= 3 (* aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 3)) (<= (+ (* 4294967296 aux_div_v_main_~i~0_12_31) 4294967296) (+ (* aux_div_v_main_~k~0_11_50 3) main_~i~0)) (< (* aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 3) 0) (< (+ (* aux_div_v_main_~k~0_11_50 3) (* aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 3)) (* aux_div_aux_mod_v_main_~k~0_11_50_77 3)) (< (+ (* aux_div_v_main_~k~0_11_50 3) main_~i~0) (+ (mod main_~n~0 4294967296) (* 4294967296 aux_div_v_main_~i~0_12_31))) (<= (+ 3 (* aux_div_aux_mod_v_main_~k~0_11_50_77 3)) (+ (* aux_div_v_main_~k~0_11_50 3) (* aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 3))))))) (not (< 0 (mod main_~n~0 4294967296))))} is UNKNOWN [2022-04-07 17:52:07,166 WARN L290 TraceCheckUtils]: 5: Hoare triple {281#(forall ((aux_div_aux_mod_v_main_~n~0_11_31_42 Int) (aux_div_aux_mod_v_main_~k~0_11_50_77 Int) (aux_div_v_main_~i~0_12_31 Int) (aux_mod_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 Int) (aux_div_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 Int) (aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 Int) (aux_div_v_main_~k~0_11_50 Int)) (or (<= aux_div_aux_mod_v_main_~k~0_11_50_77 0) (< (+ aux_mod_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 (* aux_div_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 4294967296) (* aux_div_aux_mod_v_main_~n~0_11_31_42 4294967296)) 0) (< (* aux_div_v_main_~k~0_11_50 3) (+ aux_mod_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 (* aux_div_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 4294967296) (* aux_div_aux_mod_v_main_~n~0_11_31_42 4294967296) (* 4294967296 aux_div_v_main_~i~0_12_31))) (<= 3 (* aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 3)) (< (mod ~SIZE~0 4294967296) aux_mod_aux_mod_aux_mod_v_main_~n~0_11_31_42_53) (< aux_mod_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 0) (<= 4294967296 (+ aux_mod_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 (* aux_div_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 4294967296))) (not (= (mod (mod (mod (* aux_div_v_main_~k~0_11_50 3) 4294967296) (mod (+ ~SIZE~0 2) 4294967296)) 4294967296) 0)) (< (* aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 3) 0) (<= (+ (* 4294967296 aux_div_v_main_~i~0_12_31) 4294967296) (* aux_div_v_main_~k~0_11_50 3)) (< (+ (* aux_div_v_main_~k~0_11_50 3) (* aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 3)) (* aux_div_aux_mod_v_main_~k~0_11_50_77 3)) (<= (+ 3 (* aux_div_aux_mod_v_main_~k~0_11_50_77 3)) (+ (* aux_div_v_main_~k~0_11_50 3) (* aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 3))) (exists ((v_it_1 Int)) (and (not (< (mod (* v_it_1 3) 4294967296) (mod aux_mod_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 4294967296))) (<= (+ aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 v_it_1 1) aux_div_aux_mod_v_main_~k~0_11_50_77) (<= 1 v_it_1))) (<= (+ aux_mod_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 (* aux_div_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 4294967296)) 0)))} [62] mainENTRY-->L19: Formula: (= v_main_~n~0_4 |v_main_#t~nondet4_2|) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~i~0=v_main_~i~0_4, main_~n~0=v_main_~n~0_4, main_~k~0=v_main_~k~0_3, main_~j~0=v_main_~j~0_3} AuxVars[] AssignedVars[main_#t~nondet4, main_~k~0, main_~j~0, main_~i~0, main_~n~0] {277#(or (forall ((aux_div_aux_mod_v_main_~k~0_11_50_77 Int) (aux_div_v_main_~i~0_12_31 Int) (aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 Int) (aux_div_v_main_~k~0_11_50 Int)) (or (<= aux_div_aux_mod_v_main_~k~0_11_50_77 0) (< (* aux_div_v_main_~k~0_11_50 3) (+ (mod main_~n~0 4294967296) (* 4294967296 aux_div_v_main_~i~0_12_31))) (<= 3 (* aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 3)) (exists ((v_it_1 Int)) (and (not (< (mod (* v_it_1 3) 4294967296) (mod main_~n~0 4294967296))) (<= (+ aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 v_it_1 1) aux_div_aux_mod_v_main_~k~0_11_50_77) (<= 1 v_it_1))) (not (= (mod (mod (mod (* aux_div_v_main_~k~0_11_50 3) 4294967296) (mod (+ ~SIZE~0 2) 4294967296)) 4294967296) 0)) (< (* aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 3) 0) (<= (+ (* 4294967296 aux_div_v_main_~i~0_12_31) 4294967296) (* aux_div_v_main_~k~0_11_50 3)) (< (+ (* aux_div_v_main_~k~0_11_50 3) (* aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 3)) (* aux_div_aux_mod_v_main_~k~0_11_50_77 3)) (<= (+ 3 (* aux_div_aux_mod_v_main_~k~0_11_50_77 3)) (+ (* aux_div_v_main_~k~0_11_50 3) (* aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 3))))) (not (<= (mod main_~n~0 4294967296) (mod ~SIZE~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is UNKNOWN [2022-04-07 17:52:07,167 INFO L272 TraceCheckUtils]: 4: Hoare triple {281#(forall ((aux_div_aux_mod_v_main_~n~0_11_31_42 Int) (aux_div_aux_mod_v_main_~k~0_11_50_77 Int) (aux_div_v_main_~i~0_12_31 Int) (aux_mod_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 Int) (aux_div_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 Int) (aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 Int) (aux_div_v_main_~k~0_11_50 Int)) (or (<= aux_div_aux_mod_v_main_~k~0_11_50_77 0) (< (+ aux_mod_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 (* aux_div_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 4294967296) (* aux_div_aux_mod_v_main_~n~0_11_31_42 4294967296)) 0) (< (* aux_div_v_main_~k~0_11_50 3) (+ aux_mod_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 (* aux_div_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 4294967296) (* aux_div_aux_mod_v_main_~n~0_11_31_42 4294967296) (* 4294967296 aux_div_v_main_~i~0_12_31))) (<= 3 (* aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 3)) (< (mod ~SIZE~0 4294967296) aux_mod_aux_mod_aux_mod_v_main_~n~0_11_31_42_53) (< aux_mod_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 0) (<= 4294967296 (+ aux_mod_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 (* aux_div_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 4294967296))) (not (= (mod (mod (mod (* aux_div_v_main_~k~0_11_50 3) 4294967296) (mod (+ ~SIZE~0 2) 4294967296)) 4294967296) 0)) (< (* aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 3) 0) (<= (+ (* 4294967296 aux_div_v_main_~i~0_12_31) 4294967296) (* aux_div_v_main_~k~0_11_50 3)) (< (+ (* aux_div_v_main_~k~0_11_50 3) (* aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 3)) (* aux_div_aux_mod_v_main_~k~0_11_50_77 3)) (<= (+ 3 (* aux_div_aux_mod_v_main_~k~0_11_50_77 3)) (+ (* aux_div_v_main_~k~0_11_50 3) (* aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 3))) (exists ((v_it_1 Int)) (and (not (< (mod (* v_it_1 3) 4294967296) (mod aux_mod_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 4294967296))) (<= (+ aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 v_it_1 1) aux_div_aux_mod_v_main_~k~0_11_50_77) (<= 1 v_it_1))) (<= (+ aux_mod_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 (* aux_div_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 4294967296)) 0)))} [59] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {281#(forall ((aux_div_aux_mod_v_main_~n~0_11_31_42 Int) (aux_div_aux_mod_v_main_~k~0_11_50_77 Int) (aux_div_v_main_~i~0_12_31 Int) (aux_mod_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 Int) (aux_div_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 Int) (aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 Int) (aux_div_v_main_~k~0_11_50 Int)) (or (<= aux_div_aux_mod_v_main_~k~0_11_50_77 0) (< (+ aux_mod_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 (* aux_div_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 4294967296) (* aux_div_aux_mod_v_main_~n~0_11_31_42 4294967296)) 0) (< (* aux_div_v_main_~k~0_11_50 3) (+ aux_mod_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 (* aux_div_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 4294967296) (* aux_div_aux_mod_v_main_~n~0_11_31_42 4294967296) (* 4294967296 aux_div_v_main_~i~0_12_31))) (<= 3 (* aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 3)) (< (mod ~SIZE~0 4294967296) aux_mod_aux_mod_aux_mod_v_main_~n~0_11_31_42_53) (< aux_mod_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 0) (<= 4294967296 (+ aux_mod_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 (* aux_div_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 4294967296))) (not (= (mod (mod (mod (* aux_div_v_main_~k~0_11_50 3) 4294967296) (mod (+ ~SIZE~0 2) 4294967296)) 4294967296) 0)) (< (* aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 3) 0) (<= (+ (* 4294967296 aux_div_v_main_~i~0_12_31) 4294967296) (* aux_div_v_main_~k~0_11_50 3)) (< (+ (* aux_div_v_main_~k~0_11_50 3) (* aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 3)) (* aux_div_aux_mod_v_main_~k~0_11_50_77 3)) (<= (+ 3 (* aux_div_aux_mod_v_main_~k~0_11_50_77 3)) (+ (* aux_div_v_main_~k~0_11_50 3) (* aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 3))) (exists ((v_it_1 Int)) (and (not (< (mod (* v_it_1 3) 4294967296) (mod aux_mod_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 4294967296))) (<= (+ aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 v_it_1 1) aux_div_aux_mod_v_main_~k~0_11_50_77) (<= 1 v_it_1))) (<= (+ aux_mod_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 (* aux_div_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 4294967296)) 0)))} is VALID [2022-04-07 17:52:07,167 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {281#(forall ((aux_div_aux_mod_v_main_~n~0_11_31_42 Int) (aux_div_aux_mod_v_main_~k~0_11_50_77 Int) (aux_div_v_main_~i~0_12_31 Int) (aux_mod_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 Int) (aux_div_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 Int) (aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 Int) (aux_div_v_main_~k~0_11_50 Int)) (or (<= aux_div_aux_mod_v_main_~k~0_11_50_77 0) (< (+ aux_mod_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 (* aux_div_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 4294967296) (* aux_div_aux_mod_v_main_~n~0_11_31_42 4294967296)) 0) (< (* aux_div_v_main_~k~0_11_50 3) (+ aux_mod_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 (* aux_div_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 4294967296) (* aux_div_aux_mod_v_main_~n~0_11_31_42 4294967296) (* 4294967296 aux_div_v_main_~i~0_12_31))) (<= 3 (* aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 3)) (< (mod ~SIZE~0 4294967296) aux_mod_aux_mod_aux_mod_v_main_~n~0_11_31_42_53) (< aux_mod_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 0) (<= 4294967296 (+ aux_mod_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 (* aux_div_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 4294967296))) (not (= (mod (mod (mod (* aux_div_v_main_~k~0_11_50 3) 4294967296) (mod (+ ~SIZE~0 2) 4294967296)) 4294967296) 0)) (< (* aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 3) 0) (<= (+ (* 4294967296 aux_div_v_main_~i~0_12_31) 4294967296) (* aux_div_v_main_~k~0_11_50 3)) (< (+ (* aux_div_v_main_~k~0_11_50 3) (* aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 3)) (* aux_div_aux_mod_v_main_~k~0_11_50_77 3)) (<= (+ 3 (* aux_div_aux_mod_v_main_~k~0_11_50_77 3)) (+ (* aux_div_v_main_~k~0_11_50 3) (* aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 3))) (exists ((v_it_1 Int)) (and (not (< (mod (* v_it_1 3) 4294967296) (mod aux_mod_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 4294967296))) (<= (+ aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 v_it_1 1) aux_div_aux_mod_v_main_~k~0_11_50_77) (<= 1 v_it_1))) (<= (+ aux_mod_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 (* aux_div_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 4294967296)) 0)))} {200#true} [80] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {281#(forall ((aux_div_aux_mod_v_main_~n~0_11_31_42 Int) (aux_div_aux_mod_v_main_~k~0_11_50_77 Int) (aux_div_v_main_~i~0_12_31 Int) (aux_mod_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 Int) (aux_div_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 Int) (aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 Int) (aux_div_v_main_~k~0_11_50 Int)) (or (<= aux_div_aux_mod_v_main_~k~0_11_50_77 0) (< (+ aux_mod_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 (* aux_div_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 4294967296) (* aux_div_aux_mod_v_main_~n~0_11_31_42 4294967296)) 0) (< (* aux_div_v_main_~k~0_11_50 3) (+ aux_mod_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 (* aux_div_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 4294967296) (* aux_div_aux_mod_v_main_~n~0_11_31_42 4294967296) (* 4294967296 aux_div_v_main_~i~0_12_31))) (<= 3 (* aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 3)) (< (mod ~SIZE~0 4294967296) aux_mod_aux_mod_aux_mod_v_main_~n~0_11_31_42_53) (< aux_mod_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 0) (<= 4294967296 (+ aux_mod_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 (* aux_div_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 4294967296))) (not (= (mod (mod (mod (* aux_div_v_main_~k~0_11_50 3) 4294967296) (mod (+ ~SIZE~0 2) 4294967296)) 4294967296) 0)) (< (* aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 3) 0) (<= (+ (* 4294967296 aux_div_v_main_~i~0_12_31) 4294967296) (* aux_div_v_main_~k~0_11_50 3)) (< (+ (* aux_div_v_main_~k~0_11_50 3) (* aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 3)) (* aux_div_aux_mod_v_main_~k~0_11_50_77 3)) (<= (+ 3 (* aux_div_aux_mod_v_main_~k~0_11_50_77 3)) (+ (* aux_div_v_main_~k~0_11_50 3) (* aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 3))) (exists ((v_it_1 Int)) (and (not (< (mod (* v_it_1 3) 4294967296) (mod aux_mod_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 4294967296))) (<= (+ aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 v_it_1 1) aux_div_aux_mod_v_main_~k~0_11_50_77) (<= 1 v_it_1))) (<= (+ aux_mod_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 (* aux_div_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 4294967296)) 0)))} is VALID [2022-04-07 17:52:07,170 INFO L290 TraceCheckUtils]: 2: Hoare triple {281#(forall ((aux_div_aux_mod_v_main_~n~0_11_31_42 Int) (aux_div_aux_mod_v_main_~k~0_11_50_77 Int) (aux_div_v_main_~i~0_12_31 Int) (aux_mod_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 Int) (aux_div_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 Int) (aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 Int) (aux_div_v_main_~k~0_11_50 Int)) (or (<= aux_div_aux_mod_v_main_~k~0_11_50_77 0) (< (+ aux_mod_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 (* aux_div_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 4294967296) (* aux_div_aux_mod_v_main_~n~0_11_31_42 4294967296)) 0) (< (* aux_div_v_main_~k~0_11_50 3) (+ aux_mod_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 (* aux_div_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 4294967296) (* aux_div_aux_mod_v_main_~n~0_11_31_42 4294967296) (* 4294967296 aux_div_v_main_~i~0_12_31))) (<= 3 (* aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 3)) (< (mod ~SIZE~0 4294967296) aux_mod_aux_mod_aux_mod_v_main_~n~0_11_31_42_53) (< aux_mod_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 0) (<= 4294967296 (+ aux_mod_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 (* aux_div_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 4294967296))) (not (= (mod (mod (mod (* aux_div_v_main_~k~0_11_50 3) 4294967296) (mod (+ ~SIZE~0 2) 4294967296)) 4294967296) 0)) (< (* aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 3) 0) (<= (+ (* 4294967296 aux_div_v_main_~i~0_12_31) 4294967296) (* aux_div_v_main_~k~0_11_50 3)) (< (+ (* aux_div_v_main_~k~0_11_50 3) (* aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 3)) (* aux_div_aux_mod_v_main_~k~0_11_50_77 3)) (<= (+ 3 (* aux_div_aux_mod_v_main_~k~0_11_50_77 3)) (+ (* aux_div_v_main_~k~0_11_50 3) (* aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 3))) (exists ((v_it_1 Int)) (and (not (< (mod (* v_it_1 3) 4294967296) (mod aux_mod_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 4294967296))) (<= (+ aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 v_it_1 1) aux_div_aux_mod_v_main_~k~0_11_50_77) (<= 1 v_it_1))) (<= (+ aux_mod_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 (* aux_div_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 4294967296)) 0)))} [63] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {281#(forall ((aux_div_aux_mod_v_main_~n~0_11_31_42 Int) (aux_div_aux_mod_v_main_~k~0_11_50_77 Int) (aux_div_v_main_~i~0_12_31 Int) (aux_mod_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 Int) (aux_div_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 Int) (aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 Int) (aux_div_v_main_~k~0_11_50 Int)) (or (<= aux_div_aux_mod_v_main_~k~0_11_50_77 0) (< (+ aux_mod_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 (* aux_div_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 4294967296) (* aux_div_aux_mod_v_main_~n~0_11_31_42 4294967296)) 0) (< (* aux_div_v_main_~k~0_11_50 3) (+ aux_mod_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 (* aux_div_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 4294967296) (* aux_div_aux_mod_v_main_~n~0_11_31_42 4294967296) (* 4294967296 aux_div_v_main_~i~0_12_31))) (<= 3 (* aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 3)) (< (mod ~SIZE~0 4294967296) aux_mod_aux_mod_aux_mod_v_main_~n~0_11_31_42_53) (< aux_mod_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 0) (<= 4294967296 (+ aux_mod_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 (* aux_div_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 4294967296))) (not (= (mod (mod (mod (* aux_div_v_main_~k~0_11_50 3) 4294967296) (mod (+ ~SIZE~0 2) 4294967296)) 4294967296) 0)) (< (* aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 3) 0) (<= (+ (* 4294967296 aux_div_v_main_~i~0_12_31) 4294967296) (* aux_div_v_main_~k~0_11_50 3)) (< (+ (* aux_div_v_main_~k~0_11_50 3) (* aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 3)) (* aux_div_aux_mod_v_main_~k~0_11_50_77 3)) (<= (+ 3 (* aux_div_aux_mod_v_main_~k~0_11_50_77 3)) (+ (* aux_div_v_main_~k~0_11_50 3) (* aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 3))) (exists ((v_it_1 Int)) (and (not (< (mod (* v_it_1 3) 4294967296) (mod aux_mod_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 4294967296))) (<= (+ aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 v_it_1 1) aux_div_aux_mod_v_main_~k~0_11_50_77) (<= 1 v_it_1))) (<= (+ aux_mod_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 (* aux_div_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 4294967296)) 0)))} is VALID [2022-04-07 17:52:07,203 INFO L290 TraceCheckUtils]: 1: Hoare triple {200#true} [60] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#length_1| 2) 8) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= v_~SIZE~0_4 20000001) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{~SIZE~0=v_~SIZE~0_4, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[~SIZE~0, #NULL.offset, #NULL.base] {281#(forall ((aux_div_aux_mod_v_main_~n~0_11_31_42 Int) (aux_div_aux_mod_v_main_~k~0_11_50_77 Int) (aux_div_v_main_~i~0_12_31 Int) (aux_mod_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 Int) (aux_div_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 Int) (aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 Int) (aux_div_v_main_~k~0_11_50 Int)) (or (<= aux_div_aux_mod_v_main_~k~0_11_50_77 0) (< (+ aux_mod_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 (* aux_div_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 4294967296) (* aux_div_aux_mod_v_main_~n~0_11_31_42 4294967296)) 0) (< (* aux_div_v_main_~k~0_11_50 3) (+ aux_mod_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 (* aux_div_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 4294967296) (* aux_div_aux_mod_v_main_~n~0_11_31_42 4294967296) (* 4294967296 aux_div_v_main_~i~0_12_31))) (<= 3 (* aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 3)) (< (mod ~SIZE~0 4294967296) aux_mod_aux_mod_aux_mod_v_main_~n~0_11_31_42_53) (< aux_mod_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 0) (<= 4294967296 (+ aux_mod_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 (* aux_div_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 4294967296))) (not (= (mod (mod (mod (* aux_div_v_main_~k~0_11_50 3) 4294967296) (mod (+ ~SIZE~0 2) 4294967296)) 4294967296) 0)) (< (* aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 3) 0) (<= (+ (* 4294967296 aux_div_v_main_~i~0_12_31) 4294967296) (* aux_div_v_main_~k~0_11_50 3)) (< (+ (* aux_div_v_main_~k~0_11_50 3) (* aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 3)) (* aux_div_aux_mod_v_main_~k~0_11_50_77 3)) (<= (+ 3 (* aux_div_aux_mod_v_main_~k~0_11_50_77 3)) (+ (* aux_div_v_main_~k~0_11_50 3) (* aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 3))) (exists ((v_it_1 Int)) (and (not (< (mod (* v_it_1 3) 4294967296) (mod aux_mod_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 4294967296))) (<= (+ aux_div_aux_mod_aux_mod_v_main_~k~0_11_50_77_44 v_it_1 1) aux_div_aux_mod_v_main_~k~0_11_50_77) (<= 1 v_it_1))) (<= (+ aux_mod_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 (* aux_div_aux_mod_aux_mod_v_main_~n~0_11_31_42_53 4294967296)) 0)))} is VALID [2022-04-07 17:52:07,203 INFO L272 TraceCheckUtils]: 0: Hoare triple {200#true} [58] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {200#true} is VALID [2022-04-07 17:52:07,204 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 17:52:07,204 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 17:52:07,204 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1620144134] [2022-04-07 17:52:07,204 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-04-07 17:52:07,204 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1114895278] [2022-04-07 17:52:07,204 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1114895278] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 17:52:07,205 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-04-07 17:52:07,205 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 10] total 16 [2022-04-07 17:52:07,205 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1012712089] [2022-04-07 17:52:07,205 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-04-07 17:52:07,205 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 14 states have (on average 1.2857142857142858) internal successors, (18), 13 states have internal predecessors, (18), 5 states have call successors, (5), 5 states have call predecessors, (5), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) Word has length 14 [2022-04-07 17:52:07,206 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 17:52:07,206 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 16 states, 14 states have (on average 1.2857142857142858) internal successors, (18), 13 states have internal predecessors, (18), 5 states have call successors, (5), 5 states have call predecessors, (5), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-07 17:52:19,778 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 25 edges. 19 inductive. 0 not inductive. 6 times theorem prover too weak to decide inductivity. [2022-04-07 17:52:19,778 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2022-04-07 17:52:19,778 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 17:52:19,779 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2022-04-07 17:52:19,779 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=60, Invalid=176, Unknown=4, NotChecked=0, Total=240 [2022-04-07 17:52:19,779 INFO L87 Difference]: Start difference. First operand 15 states and 15 transitions. Second operand has 16 states, 14 states have (on average 1.2857142857142858) internal successors, (18), 13 states have internal predecessors, (18), 5 states have call successors, (5), 5 states have call predecessors, (5), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-07 17:52:20,686 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:52:20,687 INFO L93 Difference]: Finished difference Result 23 states and 24 transitions. [2022-04-07 17:52:20,687 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-04-07 17:52:20,687 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 14 states have (on average 1.2857142857142858) internal successors, (18), 13 states have internal predecessors, (18), 5 states have call successors, (5), 5 states have call predecessors, (5), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) Word has length 14 [2022-04-07 17:52:20,687 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 17:52:20,687 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 14 states have (on average 1.2857142857142858) internal successors, (18), 13 states have internal predecessors, (18), 5 states have call successors, (5), 5 states have call predecessors, (5), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-07 17:52:20,688 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 25 transitions. [2022-04-07 17:52:20,689 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 14 states have (on average 1.2857142857142858) internal successors, (18), 13 states have internal predecessors, (18), 5 states have call successors, (5), 5 states have call predecessors, (5), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-07 17:52:20,689 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 25 transitions. [2022-04-07 17:52:20,690 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 12 states and 25 transitions. [2022-04-07 17:52:21,523 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 25 edges. 25 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 17:52:21,524 INFO L225 Difference]: With dead ends: 23 [2022-04-07 17:52:21,524 INFO L226 Difference]: Without dead ends: 17 [2022-04-07 17:52:21,524 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 12 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 71 ImplicationChecksByTransitivity, 17.8s TimeCoverageRelationStatistics Valid=65, Invalid=203, Unknown=4, NotChecked=0, Total=272 [2022-04-07 17:52:21,525 INFO L913 BasicCegarLoop]: 9 mSDtfsCounter, 5 mSDsluCounter, 37 mSDsCounter, 0 mSdLazyCounter, 21 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 5 SdHoareTripleChecker+Valid, 46 SdHoareTripleChecker+Invalid, 34 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 21 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 11 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 17:52:21,525 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [5 Valid, 46 Invalid, 34 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 21 Invalid, 0 Unknown, 11 Unchecked, 0.0s Time] [2022-04-07 17:52:21,526 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17 states. [2022-04-07 17:52:21,527 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17 to 17. [2022-04-07 17:52:21,527 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 17:52:21,527 INFO L82 GeneralOperation]: Start isEquivalent. First operand 17 states. Second operand has 17 states, 12 states have (on average 1.0833333333333333) internal successors, (13), 12 states have internal predecessors, (13), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:52:21,528 INFO L74 IsIncluded]: Start isIncluded. First operand 17 states. Second operand has 17 states, 12 states have (on average 1.0833333333333333) internal successors, (13), 12 states have internal predecessors, (13), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:52:21,528 INFO L87 Difference]: Start difference. First operand 17 states. Second operand has 17 states, 12 states have (on average 1.0833333333333333) internal successors, (13), 12 states have internal predecessors, (13), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:52:21,528 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:52:21,529 INFO L93 Difference]: Finished difference Result 17 states and 17 transitions. [2022-04-07 17:52:21,529 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 17 transitions. [2022-04-07 17:52:21,529 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:52:21,529 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:52:21,529 INFO L74 IsIncluded]: Start isIncluded. First operand has 17 states, 12 states have (on average 1.0833333333333333) internal successors, (13), 12 states have internal predecessors, (13), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 17 states. [2022-04-07 17:52:21,529 INFO L87 Difference]: Start difference. First operand has 17 states, 12 states have (on average 1.0833333333333333) internal successors, (13), 12 states have internal predecessors, (13), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 17 states. [2022-04-07 17:52:21,530 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 17:52:21,530 INFO L93 Difference]: Finished difference Result 17 states and 17 transitions. [2022-04-07 17:52:21,530 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 17 transitions. [2022-04-07 17:52:21,530 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 17:52:21,530 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 17:52:21,530 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 17:52:21,530 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 17:52:21,531 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 12 states have (on average 1.0833333333333333) internal successors, (13), 12 states have internal predecessors, (13), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 17:52:21,531 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 17 transitions. [2022-04-07 17:52:21,531 INFO L78 Accepts]: Start accepts. Automaton has 17 states and 17 transitions. Word has length 14 [2022-04-07 17:52:21,531 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 17:52:21,531 INFO L478 AbstractCegarLoop]: Abstraction has 17 states and 17 transitions. [2022-04-07 17:52:21,532 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 14 states have (on average 1.2857142857142858) internal successors, (18), 13 states have internal predecessors, (18), 5 states have call successors, (5), 5 states have call predecessors, (5), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-07 17:52:21,532 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 17 transitions. [2022-04-07 17:52:21,532 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-04-07 17:52:21,532 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 17:52:21,532 INFO L499 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 17:52:21,540 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Ended with exit code 0 [2022-04-07 17:52:21,733 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable2 [2022-04-07 17:52:21,734 INFO L403 AbstractCegarLoop]: === Iteration 4 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 17:52:21,734 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 17:52:21,734 INFO L85 PathProgramCache]: Analyzing trace with hash 635084289, now seen corresponding path program 2 times [2022-04-07 17:52:21,734 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 17:52:21,734 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [541326352] [2022-04-07 17:52:21,734 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 17:52:21,735 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 17:52:21,755 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (+ main_~n~0_5 (* (- 4294967296) (div main_~n~0_5 4294967296)) (* (- 1) main_~i~0_6) (* (- 3) .v_it_1.0) (* 4294967296 (div (+ main_~i~0_6 (* 3 .v_it_1.0)) 4294967296))) 0)) [2022-04-07 17:52:21,758 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (+ main_~n~0_5 (* (- 4294967296) (div main_~n~0_5 4294967296)) (* (- 1) main_~i~0_7) (* (- 3) .v_it_1.1) (* 4294967296 (div (+ main_~i~0_7 (* 3 .v_it_1.1)) 4294967296))) 0)) [2022-04-07 17:52:21,760 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (+ main_~n~0_5 (* (- 4294967296) (div main_~n~0_5 4294967296)) (* (- 1) main_~i~0_8) (* (- 3) .v_it_1.2) (* 4294967296 (div (+ main_~i~0_8 (* 3 .v_it_1.2)) 4294967296))) 0)) [2022-04-07 17:52:21,765 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-04-07 17:52:21,765 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1106280171] [2022-04-07 17:52:21,765 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-07 17:52:21,765 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 17:52:21,765 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 17:52:21,766 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 17:52:21,783 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process